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iwlwifi: document shared Tx structures
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1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
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30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
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41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
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49#include "iwl-4965.h"
50#include "iwl-helpers.h"
51
c8b0e6e1 52#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 53u32 iwl4965_debug_level;
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54#endif
55
bb8c093b
CH
56static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
57 struct iwl4965_tx_queue *txq);
416e1438 58
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59/******************************************************************************
60 *
61 * module boiler plate
62 *
63 ******************************************************************************/
64
65/* module parameters */
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66static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
67static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
9fbab516
BC
68static int iwl4965_param_disable; /* def: enable radio */
69static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
70int iwl4965_param_hwcrypto; /* def: using software encryption */
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BC
71static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
72int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
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73
74/*
75 * module name, copyright, version, etc.
76 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
77 */
78
79#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
80
c8b0e6e1 81#ifdef CONFIG_IWL4965_DEBUG
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82#define VD "d"
83#else
84#define VD
85#endif
86
c8b0e6e1 87#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
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88#define VS "s"
89#else
90#define VS
91#endif
92
80f3e024 93#define IWLWIFI_VERSION "1.1.19k" VD VS
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94#define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
95#define DRV_VERSION IWLWIFI_VERSION
96
97/* Change firmware file name, using "-" and incrementing number,
98 * *only* when uCode interface or architecture changes so that it
99 * is not compatible with earlier drivers.
100 * This number will also appear in << 8 position of 1st dword of uCode file */
101#define IWL4965_UCODE_API "-1"
102
103MODULE_DESCRIPTION(DRV_DESCRIPTION);
104MODULE_VERSION(DRV_VERSION);
105MODULE_AUTHOR(DRV_COPYRIGHT);
106MODULE_LICENSE("GPL");
107
108__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
109{
110 u16 fc = le16_to_cpu(hdr->frame_control);
111 int hdr_len = ieee80211_get_hdrlen(fc);
112
113 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
114 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
115 return NULL;
116}
117
bb8c093b
CH
118static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
119 struct iwl4965_priv *priv, int mode)
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120{
121 int i;
122
123 for (i = 0; i < 3; i++)
124 if (priv->modes[i].mode == mode)
125 return &priv->modes[i];
126
127 return NULL;
128}
129
bb8c093b 130static int iwl4965_is_empty_essid(const char *essid, int essid_len)
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131{
132 /* Single white space is for Linksys APs */
133 if (essid_len == 1 && essid[0] == ' ')
134 return 1;
135
136 /* Otherwise, if the entire essid is 0, we assume it is hidden */
137 while (essid_len) {
138 essid_len--;
139 if (essid[essid_len] != '\0')
140 return 0;
141 }
142
143 return 1;
144}
145
bb8c093b 146static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
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147{
148 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
149 const char *s = essid;
150 char *d = escaped;
151
bb8c093b 152 if (iwl4965_is_empty_essid(essid, essid_len)) {
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153 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
154 return escaped;
155 }
156
157 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
158 while (essid_len--) {
159 if (*s == '\0') {
160 *d++ = '\\';
161 *d++ = '0';
162 s++;
163 } else
164 *d++ = *s++;
165 }
166 *d = '\0';
167 return escaped;
168}
169
bb8c093b 170static void iwl4965_print_hex_dump(int level, void *p, u32 len)
b481de9c 171{
c8b0e6e1 172#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 173 if (!(iwl4965_debug_level & level))
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174 return;
175
176 print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
177 p, len, 1);
178#endif
179}
180
181/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
182 * DMA services
183 *
184 * Theory of operation
185 *
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186 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
187 * of buffer descriptors, each of which points to one or more data buffers for
188 * the device to read from or fill. Driver and device exchange status of each
189 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
190 * entries in each circular buffer, to protect against confusing empty and full
191 * queue states.
192 *
193 * The device reads or writes the data in the queues via the device's several
194 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
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195 *
196 * For Tx queue, there are low mark and high mark limits. If, after queuing
197 * the packet for Tx, free space become < low mark, Tx queue stopped. When
198 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
199 * Tx queue resumed.
200 *
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201 * The 4965 operates with up to 17 queues: One receive queue, one transmit
202 * queue (#4) for sending commands to the device firmware, and 15 other
203 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
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204 ***************************************************/
205
bb8c093b 206static int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 207{
fc4b6853 208 int s = q->read_ptr - q->write_ptr;
b481de9c 209
fc4b6853 210 if (q->read_ptr > q->write_ptr)
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211 s -= q->n_bd;
212
213 if (s <= 0)
214 s += q->n_window;
215 /* keep some reserve to not confuse empty and full situations */
216 s -= 2;
217 if (s < 0)
218 s = 0;
219 return s;
220}
221
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222/**
223 * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
224 * @index -- current index
225 * @n_bd -- total number of entries in queue (must be power of 2)
226 */
bb8c093b 227static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
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228{
229 return ++index & (n_bd - 1);
230}
231
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232/**
233 * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
234 * @index -- current index
235 * @n_bd -- total number of entries in queue (must be power of 2)
236 */
bb8c093b 237static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
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238{
239 return --index & (n_bd - 1);
240}
241
bb8c093b 242static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 243{
fc4b6853
TW
244 return q->write_ptr > q->read_ptr ?
245 (i >= q->read_ptr && i < q->write_ptr) :
246 !(i < q->read_ptr && i >= q->write_ptr);
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247}
248
bb8c093b 249static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 250{
6440adb5 251 /* This is for scan command, the big buffer at end of command array */
b481de9c 252 if (is_huge)
6440adb5 253 return q->n_window; /* must be power of 2 */
b481de9c 254
6440adb5 255 /* Otherwise, use normal size buffers */
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256 return index & (q->n_window - 1);
257}
258
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BC
259/**
260 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
261 */
bb8c093b 262static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
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263 int count, int slots_num, u32 id)
264{
265 q->n_bd = count;
266 q->n_window = slots_num;
267 q->id = id;
268
bb8c093b
CH
269 /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
270 * and iwl4965_queue_dec_wrap are broken. */
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271 BUG_ON(!is_power_of_2(count));
272
273 /* slots_num must be power-of-two size, otherwise
274 * get_cmd_index is broken. */
275 BUG_ON(!is_power_of_2(slots_num));
276
277 q->low_mark = q->n_window / 4;
278 if (q->low_mark < 4)
279 q->low_mark = 4;
280
281 q->high_mark = q->n_window / 8;
282 if (q->high_mark < 2)
283 q->high_mark = 2;
284
fc4b6853 285 q->write_ptr = q->read_ptr = 0;
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286
287 return 0;
288}
289
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290/**
291 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
292 */
bb8c093b
CH
293static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
294 struct iwl4965_tx_queue *txq, u32 id)
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295{
296 struct pci_dev *dev = priv->pci_dev;
297
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298 /* Driver private data, only for Tx (not command) queues,
299 * not shared with device. */
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300 if (id != IWL_CMD_QUEUE_NUM) {
301 txq->txb = kmalloc(sizeof(txq->txb[0]) *
302 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
303 if (!txq->txb) {
01ebd063 304 IWL_ERROR("kmalloc for auxiliary BD "
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305 "structures failed\n");
306 goto error;
307 }
308 } else
309 txq->txb = NULL;
310
6440adb5
BC
311 /* Circular buffer of transmit frame descriptors (TFDs),
312 * shared with device */
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313 txq->bd = pci_alloc_consistent(dev,
314 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
315 &txq->q.dma_addr);
316
317 if (!txq->bd) {
318 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
319 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
320 goto error;
321 }
322 txq->q.id = id;
323
324 return 0;
325
326 error:
327 if (txq->txb) {
328 kfree(txq->txb);
329 txq->txb = NULL;
330 }
331
332 return -ENOMEM;
333}
334
8b6eaea8
BC
335/**
336 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
337 */
bb8c093b
CH
338int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
339 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
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340{
341 struct pci_dev *dev = priv->pci_dev;
342 int len;
343 int rc = 0;
344
8b6eaea8
BC
345 /*
346 * Alloc buffer array for commands (Tx or other types of commands).
347 * For the command queue (#4), allocate command space + one big
348 * command for scan, since scan command is very huge; the system will
349 * not have two scans at the same time, so only one is needed.
6440adb5 350 * For data Tx queues (all other queues), no super-size command
8b6eaea8
BC
351 * space is needed.
352 */
bb8c093b 353 len = sizeof(struct iwl4965_cmd) * slots_num;
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354 if (txq_id == IWL_CMD_QUEUE_NUM)
355 len += IWL_MAX_SCAN_SIZE;
356 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
357 if (!txq->cmd)
358 return -ENOMEM;
359
8b6eaea8 360 /* Alloc driver data array and TFD circular buffer */
bb8c093b 361 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
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362 if (rc) {
363 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
364
365 return -ENOMEM;
366 }
367 txq->need_update = 0;
368
369 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
bb8c093b 370 * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
b481de9c 371 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
BC
372
373 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 374 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 375
8b6eaea8 376 /* Tell device where to find queue */
bb8c093b 377 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
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378
379 return 0;
380}
381
382/**
bb8c093b 383 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
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384 * @txq: Transmit queue to deallocate.
385 *
386 * Empty queue by removing and destroying all BD's.
6440adb5
BC
387 * Free all buffers.
388 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 389 */
bb8c093b 390void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 391{
bb8c093b 392 struct iwl4965_queue *q = &txq->q;
b481de9c
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393 struct pci_dev *dev = priv->pci_dev;
394 int len;
395
396 if (q->n_bd == 0)
397 return;
398
399 /* first, empty all BD's */
fc4b6853 400 for (; q->write_ptr != q->read_ptr;
bb8c093b
CH
401 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
402 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 403
bb8c093b 404 len = sizeof(struct iwl4965_cmd) * q->n_window;
b481de9c
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405 if (q->id == IWL_CMD_QUEUE_NUM)
406 len += IWL_MAX_SCAN_SIZE;
407
6440adb5 408 /* De-alloc array of command/tx buffers */
b481de9c
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409 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
410
6440adb5 411 /* De-alloc circular buffer of TFDs */
b481de9c 412 if (txq->q.n_bd)
bb8c093b 413 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
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414 txq->q.n_bd, txq->bd, txq->q.dma_addr);
415
6440adb5 416 /* De-alloc array of per-TFD driver data */
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417 if (txq->txb) {
418 kfree(txq->txb);
419 txq->txb = NULL;
420 }
421
6440adb5 422 /* 0-fill queue descriptor structure */
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423 memset(txq, 0, sizeof(*txq));
424}
425
bb8c093b 426const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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427
428/*************** STATION TABLE MANAGEMENT ****
9fbab516 429 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
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430 * the functionality provided here
431 */
432
433/**************************************************************/
434
01ebd063 435#if 0 /* temporary disable till we add real remove station */
6440adb5
BC
436/**
437 * iwl4965_remove_station - Remove driver's knowledge of station.
438 *
439 * NOTE: This does not remove station from device's station table.
440 */
bb8c093b 441static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
b481de9c
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442{
443 int index = IWL_INVALID_STATION;
444 int i;
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 if (is_ap)
450 index = IWL_AP_ID;
451 else if (is_broadcast_ether_addr(addr))
452 index = priv->hw_setting.bcast_sta_id;
453 else
454 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
455 if (priv->stations[i].used &&
456 !compare_ether_addr(priv->stations[i].sta.sta.addr,
457 addr)) {
458 index = i;
459 break;
460 }
461
462 if (unlikely(index == IWL_INVALID_STATION))
463 goto out;
464
465 if (priv->stations[index].used) {
466 priv->stations[index].used = 0;
467 priv->num_stations--;
468 }
469
470 BUG_ON(priv->num_stations < 0);
471
472out:
473 spin_unlock_irqrestore(&priv->sta_lock, flags);
474 return 0;
475}
556f8db7 476#endif
b481de9c 477
6440adb5
BC
478/**
479 * iwl4965_clear_stations_table - Clear the driver's station table
480 *
481 * NOTE: This does not clear or otherwise alter the device's station table.
482 */
bb8c093b 483static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
b481de9c
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484{
485 unsigned long flags;
486
487 spin_lock_irqsave(&priv->sta_lock, flags);
488
489 priv->num_stations = 0;
490 memset(priv->stations, 0, sizeof(priv->stations));
491
492 spin_unlock_irqrestore(&priv->sta_lock, flags);
493}
494
6440adb5
BC
495/**
496 * iwl4965_add_station_flags - Add station to tables in driver and device
497 */
bb8c093b 498u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr, int is_ap, u8 flags)
b481de9c
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499{
500 int i;
501 int index = IWL_INVALID_STATION;
bb8c093b 502 struct iwl4965_station_entry *station;
b481de9c 503 unsigned long flags_spin;
0795af57 504 DECLARE_MAC_BUF(mac);
b481de9c
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505
506 spin_lock_irqsave(&priv->sta_lock, flags_spin);
507 if (is_ap)
508 index = IWL_AP_ID;
509 else if (is_broadcast_ether_addr(addr))
510 index = priv->hw_setting.bcast_sta_id;
511 else
512 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
513 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
514 addr)) {
515 index = i;
516 break;
517 }
518
519 if (!priv->stations[i].used &&
520 index == IWL_INVALID_STATION)
521 index = i;
522 }
523
524
9fbab516
BC
525 /* These two conditions have the same outcome, but keep them separate
526 since they have different meanings */
b481de9c
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527 if (unlikely(index == IWL_INVALID_STATION)) {
528 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
529 return index;
530 }
531
532 if (priv->stations[index].used &&
533 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
534 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
535 return index;
536 }
537
538
0795af57 539 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
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540 station = &priv->stations[index];
541 station->used = 1;
542 priv->num_stations++;
543
6440adb5 544 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 545 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
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546 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
547 station->sta.mode = 0;
548 station->sta.sta.sta_id = index;
549 station->sta.station_flags = 0;
550
c8b0e6e1 551#ifdef CONFIG_IWL4965_HT
b481de9c
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552 /* BCAST station and IBSS stations do not work in HT mode */
553 if (index != priv->hw_setting.bcast_sta_id &&
554 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
555 iwl4965_set_ht_add_station(priv, index);
c8b0e6e1 556#endif /*CONFIG_IWL4965_HT*/
b481de9c
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557
558 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
BC
559
560 /* Add station to device's station table */
bb8c093b 561 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
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562 return index;
563
564}
565
566/*************** DRIVER STATUS FUNCTIONS *****/
567
bb8c093b 568static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
b481de9c
ZY
569{
570 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
571 * set but EXIT_PENDING is not */
572 return test_bit(STATUS_READY, &priv->status) &&
573 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
574 !test_bit(STATUS_EXIT_PENDING, &priv->status);
575}
576
bb8c093b 577static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
b481de9c
ZY
578{
579 return test_bit(STATUS_ALIVE, &priv->status);
580}
581
bb8c093b 582static inline int iwl4965_is_init(struct iwl4965_priv *priv)
b481de9c
ZY
583{
584 return test_bit(STATUS_INIT, &priv->status);
585}
586
bb8c093b 587static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
b481de9c
ZY
588{
589 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
590 test_bit(STATUS_RF_KILL_SW, &priv->status);
591}
592
bb8c093b 593static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
b481de9c
ZY
594{
595
bb8c093b 596 if (iwl4965_is_rfkill(priv))
b481de9c
ZY
597 return 0;
598
bb8c093b 599 return iwl4965_is_ready(priv);
b481de9c
ZY
600}
601
602/*************** HOST COMMAND QUEUE FUNCTIONS *****/
603
604#define IWL_CMD(x) case x : return #x
605
606static const char *get_cmd_string(u8 cmd)
607{
608 switch (cmd) {
609 IWL_CMD(REPLY_ALIVE);
610 IWL_CMD(REPLY_ERROR);
611 IWL_CMD(REPLY_RXON);
612 IWL_CMD(REPLY_RXON_ASSOC);
613 IWL_CMD(REPLY_QOS_PARAM);
614 IWL_CMD(REPLY_RXON_TIMING);
615 IWL_CMD(REPLY_ADD_STA);
616 IWL_CMD(REPLY_REMOVE_STA);
617 IWL_CMD(REPLY_REMOVE_ALL_STA);
618 IWL_CMD(REPLY_TX);
619 IWL_CMD(REPLY_RATE_SCALE);
620 IWL_CMD(REPLY_LEDS_CMD);
621 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
622 IWL_CMD(RADAR_NOTIFICATION);
623 IWL_CMD(REPLY_QUIET_CMD);
624 IWL_CMD(REPLY_CHANNEL_SWITCH);
625 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
626 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
627 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
628 IWL_CMD(POWER_TABLE_CMD);
629 IWL_CMD(PM_SLEEP_NOTIFICATION);
630 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
631 IWL_CMD(REPLY_SCAN_CMD);
632 IWL_CMD(REPLY_SCAN_ABORT_CMD);
633 IWL_CMD(SCAN_START_NOTIFICATION);
634 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
635 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
636 IWL_CMD(BEACON_NOTIFICATION);
637 IWL_CMD(REPLY_TX_BEACON);
638 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
639 IWL_CMD(QUIET_NOTIFICATION);
640 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
641 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
642 IWL_CMD(REPLY_BT_CONFIG);
643 IWL_CMD(REPLY_STATISTICS_CMD);
644 IWL_CMD(STATISTICS_NOTIFICATION);
645 IWL_CMD(REPLY_CARD_STATE_CMD);
646 IWL_CMD(CARD_STATE_NOTIFICATION);
647 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
648 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
649 IWL_CMD(SENSITIVITY_CMD);
650 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
651 IWL_CMD(REPLY_RX_PHY_CMD);
652 IWL_CMD(REPLY_RX_MPDU_CMD);
653 IWL_CMD(REPLY_4965_RX);
654 IWL_CMD(REPLY_COMPRESSED_BA);
655 default:
656 return "UNKNOWN";
657
658 }
659}
660
661#define HOST_COMPLETE_TIMEOUT (HZ / 2)
662
663/**
bb8c093b 664 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY
665 * @priv: device private data point
666 * @cmd: a point to the ucode command structure
667 *
668 * The function returns < 0 values to indicate the operation is
669 * failed. On success, it turns the index (> 0) of command in the
670 * command queue.
671 */
bb8c093b 672static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 673{
bb8c093b
CH
674 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
675 struct iwl4965_queue *q = &txq->q;
676 struct iwl4965_tfd_frame *tfd;
b481de9c 677 u32 *control_flags;
bb8c093b 678 struct iwl4965_cmd *out_cmd;
b481de9c
ZY
679 u32 idx;
680 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
681 dma_addr_t phys_addr;
682 int ret;
683 unsigned long flags;
684
685 /* If any of the command structures end up being larger than
686 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
687 * we will need to increase the size of the TFD entries */
688 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
689 !(cmd->meta.flags & CMD_SIZE_HUGE));
690
bb8c093b 691 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY
692 IWL_ERROR("No space for Tx\n");
693 return -ENOSPC;
694 }
695
696 spin_lock_irqsave(&priv->hcmd_lock, flags);
697
fc4b6853 698 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY
699 memset(tfd, 0, sizeof(*tfd));
700
701 control_flags = (u32 *) tfd;
702
fc4b6853 703 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY
704 out_cmd = &txq->cmd[idx];
705
706 out_cmd->hdr.cmd = cmd->id;
707 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
708 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
709
710 /* At this point, the out_cmd now has all of the incoming cmd
711 * information */
712
713 out_cmd->hdr.flags = 0;
714 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 715 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY
716 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
717 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
718
719 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
bb8c093b
CH
720 offsetof(struct iwl4965_cmd, hdr);
721 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY
722
723 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
724 "%d bytes at %d[%d]:%d\n",
725 get_cmd_string(out_cmd->hdr.cmd),
726 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 727 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY
728
729 txq->need_update = 1;
6440adb5
BC
730
731 /* Set up entry in queue's byte count circular buffer */
b481de9c 732 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
6440adb5
BC
733
734 /* Increment and update queue's write index */
bb8c093b
CH
735 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
736 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
737
738 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
739 return ret ? ret : idx;
740}
741
bb8c093b 742static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY
743{
744 int ret;
745
746 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
747
748 /* An asynchronous command can not expect an SKB to be set. */
749 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
750
751 /* An asynchronous command MUST have a callback. */
752 BUG_ON(!cmd->meta.u.callback);
753
754 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
755 return -EBUSY;
756
bb8c093b 757 ret = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c 758 if (ret < 0) {
bb8c093b 759 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY
760 get_cmd_string(cmd->id), ret);
761 return ret;
762 }
763 return 0;
764}
765
bb8c093b 766static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY
767{
768 int cmd_idx;
769 int ret;
770 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
771
772 BUG_ON(cmd->meta.flags & CMD_ASYNC);
773
774 /* A synchronous command can not have a callback set. */
775 BUG_ON(cmd->meta.u.callback != NULL);
776
777 if (atomic_xchg(&entry, 1)) {
778 IWL_ERROR("Error sending %s: Already sending a host command\n",
779 get_cmd_string(cmd->id));
780 return -EBUSY;
781 }
782
783 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
784
785 if (cmd->meta.flags & CMD_WANT_SKB)
786 cmd->meta.source = &cmd->meta;
787
bb8c093b 788 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c
ZY
789 if (cmd_idx < 0) {
790 ret = cmd_idx;
bb8c093b 791 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY
792 get_cmd_string(cmd->id), ret);
793 goto out;
794 }
795
796 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
797 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
798 HOST_COMPLETE_TIMEOUT);
799 if (!ret) {
800 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
801 IWL_ERROR("Error sending %s: time out after %dms.\n",
802 get_cmd_string(cmd->id),
803 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
804
805 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
806 ret = -ETIMEDOUT;
807 goto cancel;
808 }
809 }
810
811 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
812 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
813 get_cmd_string(cmd->id));
814 ret = -ECANCELED;
815 goto fail;
816 }
817 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
818 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
819 get_cmd_string(cmd->id));
820 ret = -EIO;
821 goto fail;
822 }
823 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
824 IWL_ERROR("Error: Response NULL in '%s'\n",
825 get_cmd_string(cmd->id));
826 ret = -EIO;
827 goto out;
828 }
829
830 ret = 0;
831 goto out;
832
833cancel:
834 if (cmd->meta.flags & CMD_WANT_SKB) {
bb8c093b 835 struct iwl4965_cmd *qcmd;
b481de9c
ZY
836
837 /* Cancel the CMD_WANT_SKB flag for the cmd in the
838 * TX cmd queue. Otherwise in case the cmd comes
839 * in later, it will possibly set an invalid
840 * address (cmd->meta.source). */
841 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
842 qcmd->meta.flags &= ~CMD_WANT_SKB;
843 }
844fail:
845 if (cmd->meta.u.skb) {
846 dev_kfree_skb_any(cmd->meta.u.skb);
847 cmd->meta.u.skb = NULL;
848 }
849out:
850 atomic_set(&entry, 0);
851 return ret;
852}
853
bb8c093b 854int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 855{
b481de9c 856 if (cmd->meta.flags & CMD_ASYNC)
bb8c093b 857 return iwl4965_send_cmd_async(priv, cmd);
b481de9c 858
bb8c093b 859 return iwl4965_send_cmd_sync(priv, cmd);
b481de9c
ZY
860}
861
bb8c093b 862int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
b481de9c 863{
bb8c093b 864 struct iwl4965_host_cmd cmd = {
b481de9c
ZY
865 .id = id,
866 .len = len,
867 .data = data,
868 };
869
bb8c093b 870 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY
871}
872
bb8c093b 873static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
b481de9c 874{
bb8c093b 875 struct iwl4965_host_cmd cmd = {
b481de9c
ZY
876 .id = id,
877 .len = sizeof(val),
878 .data = &val,
879 };
880
bb8c093b 881 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY
882}
883
bb8c093b 884int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
b481de9c 885{
bb8c093b 886 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
b481de9c
ZY
887}
888
889/**
bb8c093b 890 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY
891 *
892 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC
893 * NOTE: mutex must be held before calling this fnction
894 */
bb8c093b 895static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
b481de9c
ZY
896 const u8 *addr, int is_ap)
897{
556f8db7 898 u8 sta_id;
b481de9c 899
6440adb5 900 /* Add station to device's station table */
bb8c093b 901 sta_id = iwl4965_add_station_flags(priv, addr, is_ap, 0);
6440adb5
BC
902
903 /* Set up default rate scaling table in device's station table */
b481de9c
ZY
904 iwl4965_add_station(priv, addr, is_ap);
905
556f8db7 906 return sta_id;
b481de9c
ZY
907}
908
909/**
bb8c093b 910 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
b481de9c
ZY
911 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
912 * @channel: Any channel valid for the requested phymode
913
914 * In addition to setting the staging RXON, priv->phymode is also set.
915 *
916 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
917 * in the staging RXON flag structure based on the phymode
918 */
9fbab516
BC
919static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
920 u16 channel)
b481de9c 921{
bb8c093b 922 if (!iwl4965_get_channel_info(priv, phymode, channel)) {
b481de9c
ZY
923 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
924 channel, phymode);
925 return -EINVAL;
926 }
927
928 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
929 (priv->phymode == phymode))
930 return 0;
931
932 priv->staging_rxon.channel = cpu_to_le16(channel);
933 if (phymode == MODE_IEEE80211A)
934 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
935 else
936 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
937
938 priv->phymode = phymode;
939
940 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
941
942 return 0;
943}
944
945/**
bb8c093b 946 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY
947 *
948 * NOTE: This is really only useful during development and can eventually
949 * be #ifdef'd out once the driver is stable and folks aren't actively
950 * making changes
951 */
bb8c093b 952static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY
953{
954 int error = 0;
955 int counter = 1;
956
957 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
958 error |= le32_to_cpu(rxon->flags &
959 (RXON_FLG_TGJ_NARROW_BAND_MSK |
960 RXON_FLG_RADAR_DETECT_MSK));
961 if (error)
962 IWL_WARNING("check 24G fields %d | %d\n",
963 counter++, error);
964 } else {
965 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
966 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
967 if (error)
968 IWL_WARNING("check 52 fields %d | %d\n",
969 counter++, error);
970 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
971 if (error)
972 IWL_WARNING("check 52 CCK %d | %d\n",
973 counter++, error);
974 }
975 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
976 if (error)
977 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
978
979 /* make sure basic rates 6Mbps and 1Mbps are supported */
980 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
981 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
982 if (error)
983 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
984
985 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
986 if (error)
987 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
988
989 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
990 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
991 if (error)
992 IWL_WARNING("check CCK and short slot %d | %d\n",
993 counter++, error);
994
995 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
996 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
997 if (error)
998 IWL_WARNING("check CCK & auto detect %d | %d\n",
999 counter++, error);
1000
1001 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
1002 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
1003 if (error)
1004 IWL_WARNING("check TGG and auto detect %d | %d\n",
1005 counter++, error);
1006
1007 if (error)
1008 IWL_WARNING("Tuning to channel %d\n",
1009 le16_to_cpu(rxon->channel));
1010
1011 if (error) {
bb8c093b 1012 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY
1013 return -1;
1014 }
1015 return 0;
1016}
1017
1018/**
9fbab516 1019 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 1020 * @priv: staging_rxon is compared to active_rxon
b481de9c 1021 *
9fbab516
BC
1022 * If the RXON structure is changing enough to require a new tune,
1023 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1024 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 1025 */
bb8c093b 1026static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
b481de9c
ZY
1027{
1028
1029 /* These items are only settable from the full RXON command */
1030 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1031 compare_ether_addr(priv->staging_rxon.bssid_addr,
1032 priv->active_rxon.bssid_addr) ||
1033 compare_ether_addr(priv->staging_rxon.node_addr,
1034 priv->active_rxon.node_addr) ||
1035 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1036 priv->active_rxon.wlap_bssid_addr) ||
1037 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1038 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1039 (priv->staging_rxon.air_propagation !=
1040 priv->active_rxon.air_propagation) ||
1041 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1042 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1043 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1044 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1045 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1046 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1047 return 1;
1048
1049 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1050 * be updated with the RXON_ASSOC command -- however only some
1051 * flag transitions are allowed using RXON_ASSOC */
1052
1053 /* Check if we are not switching bands */
1054 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1055 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1056 return 1;
1057
1058 /* Check if we are switching association toggle */
1059 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1060 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1061 return 1;
1062
1063 return 0;
1064}
1065
bb8c093b 1066static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
b481de9c
ZY
1067{
1068 int rc = 0;
bb8c093b
CH
1069 struct iwl4965_rx_packet *res = NULL;
1070 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1071 struct iwl4965_host_cmd cmd = {
b481de9c
ZY
1072 .id = REPLY_RXON_ASSOC,
1073 .len = sizeof(rxon_assoc),
1074 .meta.flags = CMD_WANT_SKB,
1075 .data = &rxon_assoc,
1076 };
bb8c093b
CH
1077 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1078 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
b481de9c
ZY
1079
1080 if ((rxon1->flags == rxon2->flags) &&
1081 (rxon1->filter_flags == rxon2->filter_flags) &&
1082 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1083 (rxon1->ofdm_ht_single_stream_basic_rates ==
1084 rxon2->ofdm_ht_single_stream_basic_rates) &&
1085 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1086 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1087 (rxon1->rx_chain == rxon2->rx_chain) &&
1088 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1089 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1090 return 0;
1091 }
1092
1093 rxon_assoc.flags = priv->staging_rxon.flags;
1094 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1095 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1096 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1097 rxon_assoc.reserved = 0;
1098 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1099 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1100 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1101 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1102 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1103
bb8c093b 1104 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1105 if (rc)
1106 return rc;
1107
bb8c093b 1108 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
1109 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1110 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1111 rc = -EIO;
1112 }
1113
1114 priv->alloc_rxb_skb--;
1115 dev_kfree_skb_any(cmd.meta.u.skb);
1116
1117 return rc;
1118}
1119
1120/**
bb8c093b 1121 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 1122 *
01ebd063 1123 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY
1124 * the active_rxon structure is updated with the new data. This
1125 * function correctly transitions out of the RXON_ASSOC_MSK state if
1126 * a HW tune is required based on the RXON structure changes.
1127 */
bb8c093b 1128static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
b481de9c
ZY
1129{
1130 /* cast away the const for active_rxon in this function */
bb8c093b 1131 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 1132 DECLARE_MAC_BUF(mac);
b481de9c
ZY
1133 int rc = 0;
1134
bb8c093b 1135 if (!iwl4965_is_alive(priv))
b481de9c
ZY
1136 return -1;
1137
1138 /* always get timestamp with Rx frame */
1139 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1140
bb8c093b 1141 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY
1142 if (rc) {
1143 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1144 return -EINVAL;
1145 }
1146
1147 /* If we don't need to send a full RXON, we can use
bb8c093b 1148 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 1149 * and other flags for the current radio configuration. */
bb8c093b
CH
1150 if (!iwl4965_full_rxon_required(priv)) {
1151 rc = iwl4965_send_rxon_assoc(priv);
b481de9c
ZY
1152 if (rc) {
1153 IWL_ERROR("Error setting RXON_ASSOC "
1154 "configuration (%d).\n", rc);
1155 return rc;
1156 }
1157
1158 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1159
1160 return 0;
1161 }
1162
1163 /* station table will be cleared */
1164 priv->assoc_station_added = 0;
1165
c8b0e6e1 1166#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY
1167 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1168 if (!priv->error_recovering)
1169 priv->start_calib = 0;
1170
1171 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1172#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY
1173
1174 /* If we are currently associated and the new config requires
1175 * an RXON_ASSOC and the new config wants the associated mask enabled,
1176 * we must clear the associated from the active configuration
1177 * before we apply the new config */
bb8c093b 1178 if (iwl4965_is_associated(priv) &&
b481de9c
ZY
1179 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1180 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1181 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1182
bb8c093b
CH
1183 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1184 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY
1185 &priv->active_rxon);
1186
1187 /* If the mask clearing failed then we set
1188 * active_rxon back to what it was previously */
1189 if (rc) {
1190 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1191 IWL_ERROR("Error clearing ASSOC_MSK on current "
1192 "configuration (%d).\n", rc);
1193 return rc;
1194 }
b481de9c
ZY
1195 }
1196
1197 IWL_DEBUG_INFO("Sending RXON\n"
1198 "* with%s RXON_FILTER_ASSOC_MSK\n"
1199 "* channel = %d\n"
0795af57 1200 "* bssid = %s\n",
b481de9c
ZY
1201 ((priv->staging_rxon.filter_flags &
1202 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1203 le16_to_cpu(priv->staging_rxon.channel),
0795af57 1204 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c
ZY
1205
1206 /* Apply the new configuration */
bb8c093b
CH
1207 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1208 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY
1209 if (rc) {
1210 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1211 return rc;
1212 }
1213
bb8c093b 1214 iwl4965_clear_stations_table(priv);
556f8db7 1215
c8b0e6e1 1216#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY
1217 if (!priv->error_recovering)
1218 priv->start_calib = 0;
1219
1220 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1221 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1222#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY
1223
1224 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1225
1226 /* If we issue a new RXON command which required a tune then we must
1227 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 1228 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
1229 if (rc) {
1230 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1231 return rc;
1232 }
1233
1234 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 1235 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY
1236 IWL_INVALID_STATION) {
1237 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1238 return -EIO;
1239 }
1240
1241 /* If we have set the ASSOC_MSK and we are in BSS mode then
1242 * add the IWL_AP_ID to the station rate table */
bb8c093b 1243 if (iwl4965_is_associated(priv) &&
b481de9c 1244 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 1245 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY
1246 == IWL_INVALID_STATION) {
1247 IWL_ERROR("Error adding AP address for transmit.\n");
1248 return -EIO;
1249 }
1250 priv->assoc_station_added = 1;
1251 }
1252
1253 return 0;
1254}
1255
bb8c093b 1256static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
b481de9c 1257{
bb8c093b 1258 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY
1259 .flags = 3,
1260 .lead_time = 0xAA,
1261 .max_kill = 1,
1262 .kill_ack_mask = 0,
1263 .kill_cts_mask = 0,
1264 };
1265
bb8c093b
CH
1266 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1267 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY
1268}
1269
bb8c093b 1270static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
b481de9c
ZY
1271{
1272 int rc = 0;
bb8c093b
CH
1273 struct iwl4965_rx_packet *res;
1274 struct iwl4965_host_cmd cmd = {
b481de9c
ZY
1275 .id = REPLY_SCAN_ABORT_CMD,
1276 .meta.flags = CMD_WANT_SKB,
1277 };
1278
1279 /* If there isn't a scan actively going on in the hardware
1280 * then we are in between scan bands and not actually
1281 * actively scanning, so don't send the abort command */
1282 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1283 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1284 return 0;
1285 }
1286
bb8c093b 1287 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY
1288 if (rc) {
1289 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1290 return rc;
1291 }
1292
bb8c093b 1293 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
1294 if (res->u.status != CAN_ABORT_STATUS) {
1295 /* The scan abort will return 1 for success or
1296 * 2 for "failure". A failure condition can be
1297 * due to simply not being in an active scan which
1298 * can occur if we send the scan abort before we
1299 * the microcode has notified us that a scan is
1300 * completed. */
1301 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1302 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1303 clear_bit(STATUS_SCAN_HW, &priv->status);
1304 }
1305
1306 dev_kfree_skb_any(cmd.meta.u.skb);
1307
1308 return rc;
1309}
1310
bb8c093b
CH
1311static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
1312 struct iwl4965_cmd *cmd,
b481de9c
ZY
1313 struct sk_buff *skb)
1314{
1315 return 1;
1316}
1317
1318/*
1319 * CARD_STATE_CMD
1320 *
9fbab516 1321 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY
1322 *
1323 * When in the 'enable' state the card operates as normal.
1324 * When in the 'disable' state, the card enters into a low power mode.
1325 * When in the 'halt' state, the card is shut down and must be fully
1326 * restarted to come back on.
1327 */
bb8c093b 1328static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
b481de9c 1329{
bb8c093b 1330 struct iwl4965_host_cmd cmd = {
b481de9c
ZY
1331 .id = REPLY_CARD_STATE_CMD,
1332 .len = sizeof(u32),
1333 .data = &flags,
1334 .meta.flags = meta_flag,
1335 };
1336
1337 if (meta_flag & CMD_ASYNC)
bb8c093b 1338 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 1339
bb8c093b 1340 return iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY
1341}
1342
bb8c093b
CH
1343static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
1344 struct iwl4965_cmd *cmd, struct sk_buff *skb)
b481de9c 1345{
bb8c093b 1346 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY
1347
1348 if (!skb) {
1349 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1350 return 1;
1351 }
1352
bb8c093b 1353 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY
1354 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1355 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1356 res->hdr.flags);
1357 return 1;
1358 }
1359
1360 switch (res->u.add_sta.status) {
1361 case ADD_STA_SUCCESS_MSK:
1362 break;
1363 default:
1364 break;
1365 }
1366
1367 /* We didn't cache the SKB; let the caller free it */
1368 return 1;
1369}
1370
bb8c093b
CH
1371int iwl4965_send_add_station(struct iwl4965_priv *priv,
1372 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1373{
bb8c093b 1374 struct iwl4965_rx_packet *res = NULL;
b481de9c 1375 int rc = 0;
bb8c093b 1376 struct iwl4965_host_cmd cmd = {
b481de9c 1377 .id = REPLY_ADD_STA,
bb8c093b 1378 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY
1379 .meta.flags = flags,
1380 .data = sta,
1381 };
1382
1383 if (flags & CMD_ASYNC)
bb8c093b 1384 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY
1385 else
1386 cmd.meta.flags |= CMD_WANT_SKB;
1387
bb8c093b 1388 rc = iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY
1389
1390 if (rc || (flags & CMD_ASYNC))
1391 return rc;
1392
bb8c093b 1393 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
1394 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1395 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1396 res->hdr.flags);
1397 rc = -EIO;
1398 }
1399
1400 if (rc == 0) {
1401 switch (res->u.add_sta.status) {
1402 case ADD_STA_SUCCESS_MSK:
1403 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1404 break;
1405 default:
1406 rc = -EIO;
1407 IWL_WARNING("REPLY_ADD_STA failed\n");
1408 break;
1409 }
1410 }
1411
1412 priv->alloc_rxb_skb--;
1413 dev_kfree_skb_any(cmd.meta.u.skb);
1414
1415 return rc;
1416}
1417
bb8c093b 1418static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
b481de9c
ZY
1419 struct ieee80211_key_conf *keyconf,
1420 u8 sta_id)
1421{
1422 unsigned long flags;
1423 __le16 key_flags = 0;
1424
1425 switch (keyconf->alg) {
1426 case ALG_CCMP:
1427 key_flags |= STA_KEY_FLG_CCMP;
1428 key_flags |= cpu_to_le16(
1429 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1430 key_flags &= ~STA_KEY_FLG_INVALID;
1431 break;
1432 case ALG_TKIP:
1433 case ALG_WEP:
b481de9c
ZY
1434 default:
1435 return -EINVAL;
1436 }
1437 spin_lock_irqsave(&priv->sta_lock, flags);
1438 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1439 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1440 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1441 keyconf->keylen);
1442
1443 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1444 keyconf->keylen);
1445 priv->stations[sta_id].sta.key.key_flags = key_flags;
1446 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1447 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1448
1449 spin_unlock_irqrestore(&priv->sta_lock, flags);
1450
1451 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
bb8c093b 1452 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY
1453 return 0;
1454}
1455
bb8c093b 1456static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
b481de9c
ZY
1457{
1458 unsigned long flags;
1459
1460 spin_lock_irqsave(&priv->sta_lock, flags);
bb8c093b
CH
1461 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1462 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
b481de9c
ZY
1463 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1464 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1465 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1466 spin_unlock_irqrestore(&priv->sta_lock, flags);
1467
1468 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
bb8c093b 1469 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY
1470 return 0;
1471}
1472
bb8c093b 1473static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
b481de9c
ZY
1474{
1475 struct list_head *element;
1476
1477 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1478 priv->frames_count);
1479
1480 while (!list_empty(&priv->free_frames)) {
1481 element = priv->free_frames.next;
1482 list_del(element);
bb8c093b 1483 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY
1484 priv->frames_count--;
1485 }
1486
1487 if (priv->frames_count) {
1488 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1489 priv->frames_count);
1490 priv->frames_count = 0;
1491 }
1492}
1493
bb8c093b 1494static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
b481de9c 1495{
bb8c093b 1496 struct iwl4965_frame *frame;
b481de9c
ZY
1497 struct list_head *element;
1498 if (list_empty(&priv->free_frames)) {
1499 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1500 if (!frame) {
1501 IWL_ERROR("Could not allocate frame!\n");
1502 return NULL;
1503 }
1504
1505 priv->frames_count++;
1506 return frame;
1507 }
1508
1509 element = priv->free_frames.next;
1510 list_del(element);
bb8c093b 1511 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY
1512}
1513
bb8c093b 1514static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY
1515{
1516 memset(frame, 0, sizeof(*frame));
1517 list_add(&frame->list, &priv->free_frames);
1518}
1519
bb8c093b 1520unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
b481de9c
ZY
1521 struct ieee80211_hdr *hdr,
1522 const u8 *dest, int left)
1523{
1524
bb8c093b 1525 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY
1526 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1527 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1528 return 0;
1529
1530 if (priv->ibss_beacon->len > left)
1531 return 0;
1532
1533 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1534
1535 return priv->ibss_beacon->len;
1536}
1537
bb8c093b 1538int iwl4965_rate_index_from_plcp(int plcp)
b481de9c
ZY
1539{
1540 int i = 0;
1541
77626355 1542 /* 4965 HT rate format */
b481de9c
ZY
1543 if (plcp & RATE_MCS_HT_MSK) {
1544 i = (plcp & 0xff);
1545
1546 if (i >= IWL_RATE_MIMO_6M_PLCP)
1547 i = i - IWL_RATE_MIMO_6M_PLCP;
1548
1549 i += IWL_FIRST_OFDM_RATE;
1550 /* skip 9M not supported in ht*/
1551 if (i >= IWL_RATE_9M_INDEX)
1552 i += 1;
1553 if ((i >= IWL_FIRST_OFDM_RATE) &&
1554 (i <= IWL_LAST_OFDM_RATE))
1555 return i;
77626355
BC
1556
1557 /* 4965 legacy rate format, search for match in table */
b481de9c 1558 } else {
bb8c093b
CH
1559 for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
1560 if (iwl4965_rates[i].plcp == (plcp &0xFF))
b481de9c
ZY
1561 return i;
1562 }
1563 return -1;
1564}
1565
bb8c093b 1566static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY
1567{
1568 u8 i;
1569
1570 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1571 i = iwl4965_rates[i].next_ieee) {
b481de9c 1572 if (rate_mask & (1 << i))
bb8c093b 1573 return iwl4965_rates[i].plcp;
b481de9c
ZY
1574 }
1575
1576 return IWL_RATE_INVALID;
1577}
1578
bb8c093b 1579static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
b481de9c 1580{
bb8c093b 1581 struct iwl4965_frame *frame;
b481de9c
ZY
1582 unsigned int frame_size;
1583 int rc;
1584 u8 rate;
1585
bb8c093b 1586 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY
1587
1588 if (!frame) {
1589 IWL_ERROR("Could not obtain free frame buffer for beacon "
1590 "command.\n");
1591 return -ENOMEM;
1592 }
1593
1594 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1595 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY
1596 0xFF0);
1597 if (rate == IWL_INVALID_RATE)
1598 rate = IWL_RATE_6M_PLCP;
1599 } else {
bb8c093b 1600 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY
1601 if (rate == IWL_INVALID_RATE)
1602 rate = IWL_RATE_1M_PLCP;
1603 }
1604
bb8c093b 1605 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1606
bb8c093b 1607 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY
1608 &frame->u.cmd[0]);
1609
bb8c093b 1610 iwl4965_free_frame(priv, frame);
b481de9c
ZY
1611
1612 return rc;
1613}
1614
1615/******************************************************************************
1616 *
1617 * EEPROM related functions
1618 *
1619 ******************************************************************************/
1620
bb8c093b 1621static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
b481de9c
ZY
1622{
1623 memcpy(mac, priv->eeprom.mac_address, 6);
1624}
1625
1626/**
bb8c093b 1627 * iwl4965_eeprom_init - read EEPROM contents
b481de9c 1628 *
6440adb5 1629 * Load the EEPROM contents from adapter into priv->eeprom
b481de9c
ZY
1630 *
1631 * NOTE: This routine uses the non-debug IO access functions.
1632 */
bb8c093b 1633int iwl4965_eeprom_init(struct iwl4965_priv *priv)
b481de9c
ZY
1634{
1635 u16 *e = (u16 *)&priv->eeprom;
bb8c093b 1636 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
b481de9c
ZY
1637 u32 r;
1638 int sz = sizeof(priv->eeprom);
1639 int rc;
1640 int i;
1641 u16 addr;
1642
1643 /* The EEPROM structure has several padding buffers within it
1644 * and when adding new EEPROM maps is subject to programmer errors
1645 * which may be very difficult to identify without explicitly
1646 * checking the resulting size of the eeprom map. */
1647 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1648
1649 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1650 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1651 return -ENOENT;
1652 }
1653
6440adb5 1654 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
bb8c093b 1655 rc = iwl4965_eeprom_acquire_semaphore(priv);
b481de9c 1656 if (rc < 0) {
91e17473 1657 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
b481de9c
ZY
1658 return -ENOENT;
1659 }
1660
1661 /* eeprom is an array of 16bit values */
1662 for (addr = 0; addr < sz; addr += sizeof(u16)) {
bb8c093b
CH
1663 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
1664 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
b481de9c
ZY
1665
1666 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1667 i += IWL_EEPROM_ACCESS_DELAY) {
bb8c093b 1668 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
b481de9c
ZY
1669 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1670 break;
1671 udelay(IWL_EEPROM_ACCESS_DELAY);
1672 }
1673
1674 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1675 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1676 rc = -ETIMEDOUT;
1677 goto done;
1678 }
1679 e[addr / 2] = le16_to_cpu(r >> 16);
1680 }
1681 rc = 0;
1682
1683done:
bb8c093b 1684 iwl4965_eeprom_release_semaphore(priv);
b481de9c
ZY
1685 return rc;
1686}
1687
1688/******************************************************************************
1689 *
1690 * Misc. internal state and helper functions
1691 *
1692 ******************************************************************************/
c8b0e6e1 1693#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY
1694
1695/**
bb8c093b 1696 * iwl4965_report_frame - dump frame to syslog during debug sessions
b481de9c 1697 *
9fbab516 1698 * You may hack this function to show different aspects of received frames,
b481de9c
ZY
1699 * including selective frame dumps.
1700 * group100 parameter selects whether to show 1 out of 100 good frames.
1701 *
9fbab516
BC
1702 * TODO: This was originally written for 3945, need to audit for
1703 * proper operation with 4965.
b481de9c 1704 */
bb8c093b
CH
1705void iwl4965_report_frame(struct iwl4965_priv *priv,
1706 struct iwl4965_rx_packet *pkt,
b481de9c
ZY
1707 struct ieee80211_hdr *header, int group100)
1708{
1709 u32 to_us;
1710 u32 print_summary = 0;
1711 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
1712 u32 hundred = 0;
1713 u32 dataframe = 0;
1714 u16 fc;
1715 u16 seq_ctl;
1716 u16 channel;
1717 u16 phy_flags;
1718 int rate_sym;
1719 u16 length;
1720 u16 status;
1721 u16 bcn_tmr;
1722 u32 tsf_low;
1723 u64 tsf;
1724 u8 rssi;
1725 u8 agc;
1726 u16 sig_avg;
1727 u16 noise_diff;
bb8c093b
CH
1728 struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
1729 struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
1730 struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
b481de9c
ZY
1731 u8 *data = IWL_RX_DATA(pkt);
1732
1733 /* MAC header */
1734 fc = le16_to_cpu(header->frame_control);
1735 seq_ctl = le16_to_cpu(header->seq_ctrl);
1736
1737 /* metadata */
1738 channel = le16_to_cpu(rx_hdr->channel);
1739 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
1740 rate_sym = rx_hdr->rate;
1741 length = le16_to_cpu(rx_hdr->len);
1742
1743 /* end-of-frame status and timestamp */
1744 status = le32_to_cpu(rx_end->status);
1745 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
1746 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
1747 tsf = le64_to_cpu(rx_end->timestamp);
1748
1749 /* signal statistics */
1750 rssi = rx_stats->rssi;
1751 agc = rx_stats->agc;
1752 sig_avg = le16_to_cpu(rx_stats->sig_avg);
1753 noise_diff = le16_to_cpu(rx_stats->noise_diff);
1754
1755 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
1756
1757 /* if data frame is to us and all is good,
1758 * (optionally) print summary for only 1 out of every 100 */
1759 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
1760 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
1761 dataframe = 1;
1762 if (!group100)
1763 print_summary = 1; /* print each frame */
1764 else if (priv->framecnt_to_us < 100) {
1765 priv->framecnt_to_us++;
1766 print_summary = 0;
1767 } else {
1768 priv->framecnt_to_us = 0;
1769 print_summary = 1;
1770 hundred = 1;
1771 }
1772 } else {
1773 /* print summary for all other frames */
1774 print_summary = 1;
1775 }
1776
1777 if (print_summary) {
1778 char *title;
1779 u32 rate;
1780
1781 if (hundred)
1782 title = "100Frames";
1783 else if (fc & IEEE80211_FCTL_RETRY)
1784 title = "Retry";
1785 else if (ieee80211_is_assoc_response(fc))
1786 title = "AscRsp";
1787 else if (ieee80211_is_reassoc_response(fc))
1788 title = "RasRsp";
1789 else if (ieee80211_is_probe_response(fc)) {
1790 title = "PrbRsp";
1791 print_dump = 1; /* dump frame contents */
1792 } else if (ieee80211_is_beacon(fc)) {
1793 title = "Beacon";
1794 print_dump = 1; /* dump frame contents */
1795 } else if (ieee80211_is_atim(fc))
1796 title = "ATIM";
1797 else if (ieee80211_is_auth(fc))
1798 title = "Auth";
1799 else if (ieee80211_is_deauth(fc))
1800 title = "DeAuth";
1801 else if (ieee80211_is_disassoc(fc))
1802 title = "DisAssoc";
1803 else
1804 title = "Frame";
1805
bb8c093b 1806 rate = iwl4965_rate_index_from_plcp(rate_sym);
b481de9c
ZY
1807 if (rate == -1)
1808 rate = 0;
1809 else
bb8c093b 1810 rate = iwl4965_rates[rate].ieee / 2;
b481de9c
ZY
1811
1812 /* print frame summary.
1813 * MAC addresses show just the last byte (for brevity),
1814 * but you can hack it to show more, if you'd like to. */
1815 if (dataframe)
1816 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
1817 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
1818 title, fc, header->addr1[5],
1819 length, rssi, channel, rate);
1820 else {
1821 /* src/dst addresses assume managed mode */
1822 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
1823 "src=0x%02x, rssi=%u, tim=%lu usec, "
1824 "phy=0x%02x, chnl=%d\n",
1825 title, fc, header->addr1[5],
1826 header->addr3[5], rssi,
1827 tsf_low - priv->scan_start_tsf,
1828 phy_flags, channel);
1829 }
1830 }
1831 if (print_dump)
bb8c093b 1832 iwl4965_print_hex_dump(IWL_DL_RX, data, length);
b481de9c
ZY
1833}
1834#endif
1835
bb8c093b 1836static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
b481de9c
ZY
1837{
1838 if (priv->hw_setting.shared_virt)
1839 pci_free_consistent(priv->pci_dev,
bb8c093b 1840 sizeof(struct iwl4965_shared),
b481de9c
ZY
1841 priv->hw_setting.shared_virt,
1842 priv->hw_setting.shared_phys);
1843}
1844
1845/**
bb8c093b 1846 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY
1847 *
1848 * return : set the bit for each supported rate insert in ie
1849 */
bb8c093b 1850static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1851 u16 basic_rate, int *left)
b481de9c
ZY
1852{
1853 u16 ret_rates = 0, bit;
1854 int i;
c7c46676
TW
1855 u8 *cnt = ie;
1856 u8 *rates = ie + 1;
b481de9c
ZY
1857
1858 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1859 if (bit & supported_rate) {
1860 ret_rates |= bit;
bb8c093b 1861 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW
1862 ((bit & basic_rate) ? 0x80 : 0x00);
1863 (*cnt)++;
1864 (*left)--;
1865 if ((*left <= 0) ||
1866 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY
1867 break;
1868 }
1869 }
1870
1871 return ret_rates;
1872}
1873
c8b0e6e1 1874#ifdef CONFIG_IWL4965_HT
bb8c093b 1875void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
b481de9c
ZY
1876 struct ieee80211_ht_capability *ht_cap,
1877 u8 use_wide_chan);
1878#endif
1879
1880/**
bb8c093b 1881 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1882 */
bb8c093b 1883static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
b481de9c
ZY
1884 struct ieee80211_mgmt *frame,
1885 int left, int is_direct)
1886{
1887 int len = 0;
1888 u8 *pos = NULL;
bee488db 1889 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
b481de9c
ZY
1890
1891 /* Make sure there is enough space for the probe request,
1892 * two mandatory IEs and the data */
1893 left -= 24;
1894 if (left < 0)
1895 return 0;
1896 len += 24;
1897
1898 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1899 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1900 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1901 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY
1902 frame->seq_ctrl = 0;
1903
1904 /* fill in our indirect SSID IE */
1905 /* ...next IE... */
1906
1907 left -= 2;
1908 if (left < 0)
1909 return 0;
1910 len += 2;
1911 pos = &(frame->u.probe_req.variable[0]);
1912 *pos++ = WLAN_EID_SSID;
1913 *pos++ = 0;
1914
1915 /* fill in our direct SSID IE... */
1916 if (is_direct) {
1917 /* ...next IE... */
1918 left -= 2 + priv->essid_len;
1919 if (left < 0)
1920 return 0;
1921 /* ... fill it in... */
1922 *pos++ = WLAN_EID_SSID;
1923 *pos++ = priv->essid_len;
1924 memcpy(pos, priv->essid, priv->essid_len);
1925 pos += priv->essid_len;
1926 len += 2 + priv->essid_len;
1927 }
1928
1929 /* fill in supported rate */
1930 /* ...next IE... */
1931 left -= 2;
1932 if (left < 0)
1933 return 0;
c7c46676 1934
b481de9c
ZY
1935 /* ... fill it in... */
1936 *pos++ = WLAN_EID_SUPP_RATES;
1937 *pos = 0;
c7c46676 1938
bee488db 1939 /* exclude 60M rate */
1940 active_rates = priv->rates_mask;
1941 active_rates &= ~IWL_RATE_60M_MASK;
1942
1943 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1944
c7c46676 1945 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1946 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1947 active_rate_basic, &left);
c7c46676
TW
1948 active_rates &= ~ret_rates;
1949
bb8c093b 1950 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1951 active_rate_basic, &left);
c7c46676
TW
1952 active_rates &= ~ret_rates;
1953
b481de9c
ZY
1954 len += 2 + *pos;
1955 pos += (*pos) + 1;
c7c46676 1956 if (active_rates == 0)
b481de9c
ZY
1957 goto fill_end;
1958
1959 /* fill in supported extended rate */
1960 /* ...next IE... */
1961 left -= 2;
1962 if (left < 0)
1963 return 0;
1964 /* ... fill it in... */
1965 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1966 *pos = 0;
bb8c093b 1967 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1968 active_rate_basic, &left);
b481de9c
ZY
1969 if (*pos > 0)
1970 len += 2 + *pos;
1971
c8b0e6e1 1972#ifdef CONFIG_IWL4965_HT
b481de9c
ZY
1973 if (is_direct && priv->is_ht_enabled) {
1974 u8 use_wide_chan = 1;
1975
1976 if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
1977 use_wide_chan = 0;
1978 pos += (*pos) + 1;
1979 *pos++ = WLAN_EID_HT_CAPABILITY;
1980 *pos++ = sizeof(struct ieee80211_ht_capability);
bb8c093b 1981 iwl4965_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
b481de9c
ZY
1982 use_wide_chan);
1983 len += 2 + sizeof(struct ieee80211_ht_capability);
1984 }
c8b0e6e1 1985#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY
1986
1987 fill_end:
1988 return (u16)len;
1989}
1990
1991/*
1992 * QoS support
1993*/
c8b0e6e1 1994#ifdef CONFIG_IWL4965_QOS
bb8c093b
CH
1995static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
1996 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY
1997{
1998
bb8c093b
CH
1999 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
2000 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY
2001}
2002
bb8c093b 2003static void iwl4965_reset_qos(struct iwl4965_priv *priv)
b481de9c
ZY
2004{
2005 u16 cw_min = 15;
2006 u16 cw_max = 1023;
2007 u8 aifs = 2;
2008 u8 is_legacy = 0;
2009 unsigned long flags;
2010 int i;
2011
2012 spin_lock_irqsave(&priv->lock, flags);
2013 priv->qos_data.qos_active = 0;
2014
2015 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
2016 if (priv->qos_data.qos_enable)
2017 priv->qos_data.qos_active = 1;
2018 if (!(priv->active_rate & 0xfff0)) {
2019 cw_min = 31;
2020 is_legacy = 1;
2021 }
2022 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2023 if (priv->qos_data.qos_enable)
2024 priv->qos_data.qos_active = 1;
2025 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
2026 cw_min = 31;
2027 is_legacy = 1;
2028 }
2029
2030 if (priv->qos_data.qos_active)
2031 aifs = 3;
2032
2033 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
2034 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
2035 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
2036 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
2037 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
2038
2039 if (priv->qos_data.qos_active) {
2040 i = 1;
2041 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
2042 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
2043 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
2044 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2045 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2046
2047 i = 2;
2048 priv->qos_data.def_qos_parm.ac[i].cw_min =
2049 cpu_to_le16((cw_min + 1) / 2 - 1);
2050 priv->qos_data.def_qos_parm.ac[i].cw_max =
2051 cpu_to_le16(cw_max);
2052 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2053 if (is_legacy)
2054 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2055 cpu_to_le16(6016);
2056 else
2057 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2058 cpu_to_le16(3008);
2059 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2060
2061 i = 3;
2062 priv->qos_data.def_qos_parm.ac[i].cw_min =
2063 cpu_to_le16((cw_min + 1) / 4 - 1);
2064 priv->qos_data.def_qos_parm.ac[i].cw_max =
2065 cpu_to_le16((cw_max + 1) / 2 - 1);
2066 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
2067 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2068 if (is_legacy)
2069 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2070 cpu_to_le16(3264);
2071 else
2072 priv->qos_data.def_qos_parm.ac[i].edca_txop =
2073 cpu_to_le16(1504);
2074 } else {
2075 for (i = 1; i < 4; i++) {
2076 priv->qos_data.def_qos_parm.ac[i].cw_min =
2077 cpu_to_le16(cw_min);
2078 priv->qos_data.def_qos_parm.ac[i].cw_max =
2079 cpu_to_le16(cw_max);
2080 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
2081 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
2082 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
2083 }
2084 }
2085 IWL_DEBUG_QOS("set QoS to default \n");
2086
2087 spin_unlock_irqrestore(&priv->lock, flags);
2088}
2089
bb8c093b 2090static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
b481de9c
ZY
2091{
2092 unsigned long flags;
2093
b481de9c
ZY
2094 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2095 return;
2096
2097 if (!priv->qos_data.qos_enable)
2098 return;
2099
2100 spin_lock_irqsave(&priv->lock, flags);
2101 priv->qos_data.def_qos_parm.qos_flags = 0;
2102
2103 if (priv->qos_data.qos_cap.q_AP.queue_request &&
2104 !priv->qos_data.qos_cap.q_AP.txop_request)
2105 priv->qos_data.def_qos_parm.qos_flags |=
2106 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY
2107 if (priv->qos_data.qos_active)
2108 priv->qos_data.def_qos_parm.qos_flags |=
2109 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
2110
c8b0e6e1 2111#ifdef CONFIG_IWL4965_HT
f1f1f5c7
TW
2112 if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
2113 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 2114#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 2115
b481de9c
ZY
2116 spin_unlock_irqrestore(&priv->lock, flags);
2117
bb8c093b 2118 if (force || iwl4965_is_associated(priv)) {
f1f1f5c7
TW
2119 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
2120 priv->qos_data.qos_active,
2121 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 2122
bb8c093b 2123 iwl4965_send_qos_params_command(priv,
b481de9c
ZY
2124 &(priv->qos_data.def_qos_parm));
2125 }
2126}
2127
c8b0e6e1 2128#endif /* CONFIG_IWL4965_QOS */
b481de9c
ZY
2129/*
2130 * Power management (not Tx power!) functions
2131 */
2132#define MSEC_TO_USEC 1024
2133
2134#define NOSLP __constant_cpu_to_le16(0), 0, 0
2135#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
2136#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
2137#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
2138 __constant_cpu_to_le32(X1), \
2139 __constant_cpu_to_le32(X2), \
2140 __constant_cpu_to_le32(X3), \
2141 __constant_cpu_to_le32(X4)}
2142
2143
2144/* default power management (not Tx power) table values */
2145/* for tim 0-10 */
bb8c093b 2146static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY
2147 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2148 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
2149 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
2150 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
2151 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
2152 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
2153};
2154
2155/* for tim > 10 */
bb8c093b 2156static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY
2157 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
2158 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
2159 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
2160 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
2161 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
2162 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
2163 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
2164 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
2165 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
2166 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
2167};
2168
bb8c093b 2169int iwl4965_power_init_handle(struct iwl4965_priv *priv)
b481de9c
ZY
2170{
2171 int rc = 0, i;
bb8c093b
CH
2172 struct iwl4965_power_mgr *pow_data;
2173 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY
2174 u16 pci_pm;
2175
2176 IWL_DEBUG_POWER("Initialize power \n");
2177
2178 pow_data = &(priv->power_data);
2179
2180 memset(pow_data, 0, sizeof(*pow_data));
2181
2182 pow_data->active_index = IWL_POWER_RANGE_0;
2183 pow_data->dtim_val = 0xffff;
2184
2185 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
2186 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
2187
2188 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
2189 if (rc != 0)
2190 return 0;
2191 else {
bb8c093b 2192 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY
2193
2194 IWL_DEBUG_POWER("adjust power command flags\n");
2195
2196 for (i = 0; i < IWL_POWER_AC; i++) {
2197 cmd = &pow_data->pwr_range_0[i].cmd;
2198
2199 if (pci_pm & 0x1)
2200 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
2201 else
2202 cmd->flags |= IWL_POWER_PCI_PM_MSK;
2203 }
2204 }
2205 return rc;
2206}
2207
bb8c093b
CH
2208static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
2209 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY
2210{
2211 int rc = 0, i;
2212 u8 skip;
2213 u32 max_sleep = 0;
bb8c093b 2214 struct iwl4965_power_vec_entry *range;
b481de9c 2215 u8 period = 0;
bb8c093b 2216 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY
2217
2218 if (mode > IWL_POWER_INDEX_5) {
2219 IWL_DEBUG_POWER("Error invalid power mode \n");
2220 return -1;
2221 }
2222 pow_data = &(priv->power_data);
2223
2224 if (pow_data->active_index == IWL_POWER_RANGE_0)
2225 range = &pow_data->pwr_range_0[0];
2226 else
2227 range = &pow_data->pwr_range_1[1];
2228
bb8c093b 2229 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY
2230
2231#ifdef IWL_MAC80211_DISABLE
2232 if (priv->assoc_network != NULL) {
2233 unsigned long flags;
2234
2235 period = priv->assoc_network->tim.tim_period;
2236 }
2237#endif /*IWL_MAC80211_DISABLE */
2238 skip = range[mode].no_dtim;
2239
2240 if (period == 0) {
2241 period = 1;
2242 skip = 0;
2243 }
2244
2245 if (skip == 0) {
2246 max_sleep = period;
2247 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
2248 } else {
2249 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
2250 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
2251 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
2252 }
2253
2254 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
2255 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
2256 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
2257 }
2258
2259 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
2260 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
2261 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
2262 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
2263 le32_to_cpu(cmd->sleep_interval[0]),
2264 le32_to_cpu(cmd->sleep_interval[1]),
2265 le32_to_cpu(cmd->sleep_interval[2]),
2266 le32_to_cpu(cmd->sleep_interval[3]),
2267 le32_to_cpu(cmd->sleep_interval[4]));
2268
2269 return rc;
2270}
2271
bb8c093b 2272static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
b481de9c 2273{
9a62f73b 2274 u32 uninitialized_var(final_mode);
b481de9c 2275 int rc;
bb8c093b 2276 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY
2277
2278 /* If on battery, set to 3,
01ebd063 2279 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY
2280 * else user level */
2281 switch (mode) {
2282 case IWL_POWER_BATTERY:
2283 final_mode = IWL_POWER_INDEX_3;
2284 break;
2285 case IWL_POWER_AC:
2286 final_mode = IWL_POWER_MODE_CAM;
2287 break;
2288 default:
2289 final_mode = mode;
2290 break;
2291 }
2292
2293 cmd.keep_alive_beacons = 0;
2294
bb8c093b 2295 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 2296
bb8c093b 2297 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY
2298
2299 if (final_mode == IWL_POWER_MODE_CAM)
2300 clear_bit(STATUS_POWER_PMI, &priv->status);
2301 else
2302 set_bit(STATUS_POWER_PMI, &priv->status);
2303
2304 return rc;
2305}
2306
bb8c093b 2307int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
2308{
2309 /* Filter incoming packets to determine if they are targeted toward
2310 * this network, discarding packets coming from ourselves */
2311 switch (priv->iw_mode) {
2312 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2313 /* packets from our adapter are dropped (echo) */
2314 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2315 return 0;
2316 /* {broad,multi}cast packets to our IBSS go through */
2317 if (is_multicast_ether_addr(header->addr1))
2318 return !compare_ether_addr(header->addr3, priv->bssid);
2319 /* packets to our adapter go through */
2320 return !compare_ether_addr(header->addr1, priv->mac_addr);
2321 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2322 /* packets from our adapter are dropped (echo) */
2323 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2324 return 0;
2325 /* {broad,multi}cast packets to our BSS go through */
2326 if (is_multicast_ether_addr(header->addr1))
2327 return !compare_ether_addr(header->addr2, priv->bssid);
2328 /* packets to our adapter go through */
2329 return !compare_ether_addr(header->addr1, priv->mac_addr);
2330 }
2331
2332 return 1;
2333}
2334
2335#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2336
bb8c093b 2337static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY
2338{
2339 switch (status & TX_STATUS_MSK) {
2340 case TX_STATUS_SUCCESS:
2341 return "SUCCESS";
2342 TX_STATUS_ENTRY(SHORT_LIMIT);
2343 TX_STATUS_ENTRY(LONG_LIMIT);
2344 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2345 TX_STATUS_ENTRY(MGMNT_ABORT);
2346 TX_STATUS_ENTRY(NEXT_FRAG);
2347 TX_STATUS_ENTRY(LIFE_EXPIRE);
2348 TX_STATUS_ENTRY(DEST_PS);
2349 TX_STATUS_ENTRY(ABORTED);
2350 TX_STATUS_ENTRY(BT_RETRY);
2351 TX_STATUS_ENTRY(STA_INVALID);
2352 TX_STATUS_ENTRY(FRAG_DROPPED);
2353 TX_STATUS_ENTRY(TID_DISABLE);
2354 TX_STATUS_ENTRY(FRAME_FLUSHED);
2355 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2356 TX_STATUS_ENTRY(TX_LOCKED);
2357 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2358 }
2359
2360 return "UNKNOWN";
2361}
2362
2363/**
bb8c093b 2364 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY
2365 *
2366 * NOTE: priv->mutex is not required before calling this function
2367 */
bb8c093b 2368static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
b481de9c
ZY
2369{
2370 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2371 clear_bit(STATUS_SCANNING, &priv->status);
2372 return 0;
2373 }
2374
2375 if (test_bit(STATUS_SCANNING, &priv->status)) {
2376 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2377 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2378 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2379 queue_work(priv->workqueue, &priv->abort_scan);
2380
2381 } else
2382 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2383
2384 return test_bit(STATUS_SCANNING, &priv->status);
2385 }
2386
2387 return 0;
2388}
2389
2390/**
bb8c093b 2391 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY
2392 * @ms: amount of time to wait (in milliseconds) for scan to abort
2393 *
2394 * NOTE: priv->mutex must be held before calling this function
2395 */
bb8c093b 2396static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
b481de9c
ZY
2397{
2398 unsigned long now = jiffies;
2399 int ret;
2400
bb8c093b 2401 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY
2402 if (ret && ms) {
2403 mutex_unlock(&priv->mutex);
2404 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2405 test_bit(STATUS_SCANNING, &priv->status))
2406 msleep(1);
2407 mutex_lock(&priv->mutex);
2408
2409 return test_bit(STATUS_SCANNING, &priv->status);
2410 }
2411
2412 return ret;
2413}
2414
bb8c093b 2415static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
b481de9c
ZY
2416{
2417 /* Reset ieee stats */
2418
2419 /* We don't reset the net_device_stats (ieee->stats) on
2420 * re-association */
2421
2422 priv->last_seq_num = -1;
2423 priv->last_frag_num = -1;
2424 priv->last_packet_time = 0;
2425
bb8c093b 2426 iwl4965_scan_cancel(priv);
b481de9c
ZY
2427}
2428
2429#define MAX_UCODE_BEACON_INTERVAL 4096
2430#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2431
bb8c093b 2432static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY
2433{
2434 u16 new_val = 0;
2435 u16 beacon_factor = 0;
2436
2437 beacon_factor =
2438 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2439 / MAX_UCODE_BEACON_INTERVAL;
2440 new_val = beacon_val / beacon_factor;
2441
2442 return cpu_to_le16(new_val);
2443}
2444
bb8c093b 2445static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
b481de9c
ZY
2446{
2447 u64 interval_tm_unit;
2448 u64 tsf, result;
2449 unsigned long flags;
2450 struct ieee80211_conf *conf = NULL;
2451 u16 beacon_int = 0;
2452
2453 conf = ieee80211_get_hw_conf(priv->hw);
2454
2455 spin_lock_irqsave(&priv->lock, flags);
2456 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2457 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2458
2459 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2460
2461 tsf = priv->timestamp1;
2462 tsf = ((tsf << 32) | priv->timestamp0);
2463
2464 beacon_int = priv->beacon_int;
2465 spin_unlock_irqrestore(&priv->lock, flags);
2466
2467 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2468 if (beacon_int == 0) {
2469 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2470 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2471 } else {
2472 priv->rxon_timing.beacon_interval =
2473 cpu_to_le16(beacon_int);
2474 priv->rxon_timing.beacon_interval =
bb8c093b 2475 iwl4965_adjust_beacon_interval(
b481de9c
ZY
2476 le16_to_cpu(priv->rxon_timing.beacon_interval));
2477 }
2478
2479 priv->rxon_timing.atim_window = 0;
2480 } else {
2481 priv->rxon_timing.beacon_interval =
bb8c093b 2482 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY
2483 /* TODO: we need to get atim_window from upper stack
2484 * for now we set to 0 */
2485 priv->rxon_timing.atim_window = 0;
2486 }
2487
2488 interval_tm_unit =
2489 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2490 result = do_div(tsf, interval_tm_unit);
2491 priv->rxon_timing.beacon_init_val =
2492 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2493
2494 IWL_DEBUG_ASSOC
2495 ("beacon interval %d beacon timer %d beacon tim %d\n",
2496 le16_to_cpu(priv->rxon_timing.beacon_interval),
2497 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2498 le16_to_cpu(priv->rxon_timing.atim_window));
2499}
2500
bb8c093b 2501static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
b481de9c
ZY
2502{
2503 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2504 IWL_ERROR("APs don't scan.\n");
2505 return 0;
2506 }
2507
bb8c093b 2508 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY
2509 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2510 return -EIO;
2511 }
2512
2513 if (test_bit(STATUS_SCANNING, &priv->status)) {
2514 IWL_DEBUG_SCAN("Scan already in progress.\n");
2515 return -EAGAIN;
2516 }
2517
2518 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2519 IWL_DEBUG_SCAN("Scan request while abort pending. "
2520 "Queuing.\n");
2521 return -EAGAIN;
2522 }
2523
2524 IWL_DEBUG_INFO("Starting scan...\n");
2525 priv->scan_bands = 2;
2526 set_bit(STATUS_SCANNING, &priv->status);
2527 priv->scan_start = jiffies;
2528 priv->scan_pass_start = priv->scan_start;
2529
2530 queue_work(priv->workqueue, &priv->request_scan);
2531
2532 return 0;
2533}
2534
bb8c093b 2535static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
b481de9c 2536{
bb8c093b 2537 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
b481de9c
ZY
2538
2539 if (hw_decrypt)
2540 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2541 else
2542 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2543
2544 return 0;
2545}
2546
bb8c093b 2547static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
b481de9c
ZY
2548{
2549 if (phymode == MODE_IEEE80211A) {
2550 priv->staging_rxon.flags &=
2551 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2552 | RXON_FLG_CCK_MSK);
2553 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2554 } else {
bb8c093b 2555 /* Copied from iwl4965_bg_post_associate() */
b481de9c
ZY
2556 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2557 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2558 else
2559 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2560
2561 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2562 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2563
2564 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2565 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2566 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2567 }
2568}
2569
2570/*
01ebd063 2571 * initialize rxon structure with default values from eeprom
b481de9c 2572 */
bb8c093b 2573static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
b481de9c 2574{
bb8c093b 2575 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY
2576
2577 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2578
2579 switch (priv->iw_mode) {
2580 case IEEE80211_IF_TYPE_AP:
2581 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2582 break;
2583
2584 case IEEE80211_IF_TYPE_STA:
2585 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2586 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2587 break;
2588
2589 case IEEE80211_IF_TYPE_IBSS:
2590 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2591 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2592 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2593 RXON_FILTER_ACCEPT_GRP_MSK;
2594 break;
2595
2596 case IEEE80211_IF_TYPE_MNTR:
2597 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2598 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2599 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2600 break;
2601 }
2602
2603#if 0
2604 /* TODO: Figure out when short_preamble would be set and cache from
2605 * that */
2606 if (!hw_to_local(priv->hw)->short_preamble)
2607 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2608 else
2609 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2610#endif
2611
bb8c093b 2612 ch_info = iwl4965_get_channel_info(priv, priv->phymode,
b481de9c
ZY
2613 le16_to_cpu(priv->staging_rxon.channel));
2614
2615 if (!ch_info)
2616 ch_info = &priv->channel_info[0];
2617
2618 /*
2619 * in some case A channels are all non IBSS
2620 * in this case force B/G channel
2621 */
2622 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2623 !(is_channel_ibss(ch_info)))
2624 ch_info = &priv->channel_info[0];
2625
2626 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2627 if (is_channel_a_band(ch_info))
2628 priv->phymode = MODE_IEEE80211A;
2629 else
2630 priv->phymode = MODE_IEEE80211G;
2631
bb8c093b 2632 iwl4965_set_flags_for_phymode(priv, priv->phymode);
b481de9c
ZY
2633
2634 priv->staging_rxon.ofdm_basic_rates =
2635 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2636 priv->staging_rxon.cck_basic_rates =
2637 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2638
2639 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2640 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2641 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2642 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2643 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2644 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2645 iwl4965_set_rxon_chain(priv);
2646}
2647
bb8c093b 2648static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
b481de9c 2649{
bb8c093b 2650 if (!iwl4965_is_ready_rf(priv))
b481de9c
ZY
2651 return -EAGAIN;
2652
2653 if (mode == IEEE80211_IF_TYPE_IBSS) {
bb8c093b 2654 const struct iwl4965_channel_info *ch_info;
b481de9c 2655
bb8c093b 2656 ch_info = iwl4965_get_channel_info(priv,
b481de9c
ZY
2657 priv->phymode,
2658 le16_to_cpu(priv->staging_rxon.channel));
2659
2660 if (!ch_info || !is_channel_ibss(ch_info)) {
2661 IWL_ERROR("channel %d not IBSS channel\n",
2662 le16_to_cpu(priv->staging_rxon.channel));
2663 return -EINVAL;
2664 }
2665 }
2666
2667 cancel_delayed_work(&priv->scan_check);
bb8c093b 2668 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
2669 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2670 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2671 return -EAGAIN;
2672 }
2673
2674 priv->iw_mode = mode;
2675
bb8c093b 2676 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
2677 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2678
bb8c093b 2679 iwl4965_clear_stations_table(priv);
b481de9c 2680
bb8c093b 2681 iwl4965_commit_rxon(priv);
b481de9c
ZY
2682
2683 return 0;
2684}
2685
bb8c093b 2686static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
b481de9c 2687 struct ieee80211_tx_control *ctl,
bb8c093b 2688 struct iwl4965_cmd *cmd,
b481de9c
ZY
2689 struct sk_buff *skb_frag,
2690 int last_frag)
2691{
bb8c093b 2692 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
b481de9c
ZY
2693
2694 switch (keyinfo->alg) {
2695 case ALG_CCMP:
2696 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2697 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2698 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2699 break;
2700
2701 case ALG_TKIP:
2702#if 0
2703 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2704
2705 if (last_frag)
2706 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2707 8);
2708 else
2709 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2710#endif
2711 break;
2712
2713 case ALG_WEP:
2714 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2715 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2716
2717 if (keyinfo->keylen == 13)
2718 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2719
2720 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2721
2722 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2723 "with key %d\n", ctl->key_idx);
2724 break;
2725
b481de9c
ZY
2726 default:
2727 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2728 break;
2729 }
2730}
2731
2732/*
2733 * handle build REPLY_TX command notification.
2734 */
bb8c093b
CH
2735static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
2736 struct iwl4965_cmd *cmd,
b481de9c
ZY
2737 struct ieee80211_tx_control *ctrl,
2738 struct ieee80211_hdr *hdr,
2739 int is_unicast, u8 std_id)
2740{
2741 __le16 *qc;
2742 u16 fc = le16_to_cpu(hdr->frame_control);
2743 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2744
2745 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2746 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2747 tx_flags |= TX_CMD_FLG_ACK_MSK;
2748 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2749 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2750 if (ieee80211_is_probe_response(fc) &&
2751 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2752 tx_flags |= TX_CMD_FLG_TSF_MSK;
2753 } else {
2754 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2755 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2756 }
2757
2758 cmd->cmd.tx.sta_id = std_id;
2759 if (ieee80211_get_morefrag(hdr))
2760 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2761
2762 qc = ieee80211_get_qos_ctrl(hdr);
2763 if (qc) {
2764 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2765 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2766 } else
2767 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2768
2769 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2770 tx_flags |= TX_CMD_FLG_RTS_MSK;
2771 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2772 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2773 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2774 tx_flags |= TX_CMD_FLG_CTS_MSK;
2775 }
2776
2777 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2778 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2779
2780 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2781 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2782 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2783 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2784 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2785 else
bc434dd2 2786 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
b481de9c
ZY
2787 } else
2788 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2789
2790 cmd->cmd.tx.driver_txop = 0;
2791 cmd->cmd.tx.tx_flags = tx_flags;
2792 cmd->cmd.tx.next_frame_len = 0;
2793}
2794
6440adb5
BC
2795/**
2796 * iwl4965_get_sta_id - Find station's index within station table
2797 *
2798 * If new IBSS station, create new entry in station table
2799 */
9fbab516
BC
2800static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
2801 struct ieee80211_hdr *hdr)
b481de9c
ZY
2802{
2803 int sta_id;
2804 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2805 DECLARE_MAC_BUF(mac);
b481de9c 2806
6440adb5 2807 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY
2808 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2809 is_multicast_ether_addr(hdr->addr1))
2810 return priv->hw_setting.bcast_sta_id;
2811
2812 switch (priv->iw_mode) {
2813
6440adb5
BC
2814 /* If we are a client station in a BSS network, use the special
2815 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY
2816 case IEEE80211_IF_TYPE_STA:
2817 return IWL_AP_ID;
2818
2819 /* If we are an AP, then find the station, or use BCAST */
2820 case IEEE80211_IF_TYPE_AP:
bb8c093b 2821 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
2822 if (sta_id != IWL_INVALID_STATION)
2823 return sta_id;
2824 return priv->hw_setting.bcast_sta_id;
2825
6440adb5
BC
2826 /* If this frame is going out to an IBSS network, find the station,
2827 * or create a new station table entry */
b481de9c 2828 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2829 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY
2830 if (sta_id != IWL_INVALID_STATION)
2831 return sta_id;
2832
6440adb5 2833 /* Create new station table entry */
bb8c093b 2834 sta_id = iwl4965_add_station_flags(priv, hdr->addr1, 0, CMD_ASYNC);
b481de9c
ZY
2835
2836 if (sta_id != IWL_INVALID_STATION)
2837 return sta_id;
2838
0795af57 2839 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2840 "Defaulting to broadcast...\n",
0795af57 2841 print_mac(mac, hdr->addr1));
bb8c093b 2842 iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
b481de9c
ZY
2843 return priv->hw_setting.bcast_sta_id;
2844
2845 default:
01ebd063 2846 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
b481de9c
ZY
2847 return priv->hw_setting.bcast_sta_id;
2848 }
2849}
2850
2851/*
2852 * start REPLY_TX command process
2853 */
bb8c093b 2854static int iwl4965_tx_skb(struct iwl4965_priv *priv,
b481de9c
ZY
2855 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2856{
2857 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2858 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY
2859 u32 *control_flags;
2860 int txq_id = ctl->queue;
bb8c093b
CH
2861 struct iwl4965_tx_queue *txq = NULL;
2862 struct iwl4965_queue *q = NULL;
b481de9c
ZY
2863 dma_addr_t phys_addr;
2864 dma_addr_t txcmd_phys;
bb8c093b 2865 struct iwl4965_cmd *out_cmd = NULL;
b481de9c
ZY
2866 u16 len, idx, len_org;
2867 u8 id, hdr_len, unicast;
2868 u8 sta_id;
2869 u16 seq_number = 0;
2870 u16 fc;
2871 __le16 *qc;
2872 u8 wait_write_ptr = 0;
2873 unsigned long flags;
2874 int rc;
2875
2876 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2877 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY
2878 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2879 goto drop_unlock;
2880 }
2881
2882 if (!priv->interface_id) {
2883 IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
2884 goto drop_unlock;
2885 }
2886
2887 if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
2888 IWL_ERROR("ERROR: No TX rate available.\n");
2889 goto drop_unlock;
2890 }
2891
2892 unicast = !is_multicast_ether_addr(hdr->addr1);
2893 id = 0;
2894
2895 fc = le16_to_cpu(hdr->frame_control);
2896
c8b0e6e1 2897#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY
2898 if (ieee80211_is_auth(fc))
2899 IWL_DEBUG_TX("Sending AUTH frame\n");
2900 else if (ieee80211_is_assoc_request(fc))
2901 IWL_DEBUG_TX("Sending ASSOC frame\n");
2902 else if (ieee80211_is_reassoc_request(fc))
2903 IWL_DEBUG_TX("Sending REASSOC frame\n");
2904#endif
2905
bb8c093b 2906 if (!iwl4965_is_associated(priv) &&
b481de9c 2907 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
bb8c093b 2908 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
b481de9c
ZY
2909 goto drop_unlock;
2910 }
2911
2912 spin_unlock_irqrestore(&priv->lock, flags);
2913
2914 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
BC
2915
2916 /* Find (or create) index into station table for destination station */
bb8c093b 2917 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2918 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP
2919 DECLARE_MAC_BUF(mac);
2920
2921 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2922 print_mac(mac, hdr->addr1));
b481de9c
ZY
2923 goto drop;
2924 }
2925
2926 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2927
2928 qc = ieee80211_get_qos_ctrl(hdr);
2929 if (qc) {
2930 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2931 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2932 IEEE80211_SCTL_SEQ;
2933 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2934 (hdr->seq_ctrl &
2935 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2936 seq_number += 0x10;
c8b0e6e1
CH
2937#ifdef CONFIG_IWL4965_HT
2938#ifdef CONFIG_IWL4965_HT_AGG
b481de9c
ZY
2939 /* aggregation is on for this <sta,tid> */
2940 if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
2941 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
c8b0e6e1
CH
2942#endif /* CONFIG_IWL4965_HT_AGG */
2943#endif /* CONFIG_IWL4965_HT */
b481de9c 2944 }
6440adb5
BC
2945
2946 /* Descriptor for chosen Tx queue */
b481de9c
ZY
2947 txq = &priv->txq[txq_id];
2948 q = &txq->q;
2949
2950 spin_lock_irqsave(&priv->lock, flags);
2951
6440adb5 2952 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2953 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY
2954 memset(tfd, 0, sizeof(*tfd));
2955 control_flags = (u32 *) tfd;
fc4b6853 2956 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2957
6440adb5 2958 /* Set up driver data for this TFD */
bb8c093b 2959 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW
2960 txq->txb[q->write_ptr].skb[0] = skb;
2961 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2962 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
BC
2963
2964 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY
2965 out_cmd = &txq->cmd[idx];
2966 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2967 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
BC
2968
2969 /*
2970 * Set up the Tx-command (not MAC!) header.
2971 * Store the chosen Tx queue and TFD index within the sequence field;
2972 * after Tx, uCode's Tx response will return this value so driver can
2973 * locate the frame within the tx queue and do post-tx processing.
2974 */
b481de9c
ZY
2975 out_cmd->hdr.cmd = REPLY_TX;
2976 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2977 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC
2978
2979 /* Copy MAC header from skb into command buffer */
b481de9c
ZY
2980 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2981
6440adb5
BC
2982 /*
2983 * Use the first empty entry in this queue's command buffer array
2984 * to contain the Tx command and MAC header concatenated together
2985 * (payload data will be in another buffer).
2986 * Size of this varies, due to varying MAC header length.
2987 * If end is not dword aligned, we'll have 2 extra bytes at the end
2988 * of the MAC header (device reads on dword boundaries).
2989 * We'll tell device about this padding later.
2990 */
b481de9c 2991 len = priv->hw_setting.tx_cmd_len +
bb8c093b 2992 sizeof(struct iwl4965_cmd_header) + hdr_len;
b481de9c
ZY
2993
2994 len_org = len;
2995 len = (len + 3) & ~3;
2996
2997 if (len_org != len)
2998 len_org = 1;
2999 else
3000 len_org = 0;
3001
6440adb5
BC
3002 /* Physical address of this Tx command's header (not MAC header!),
3003 * within command buffer array. */
bb8c093b
CH
3004 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
3005 offsetof(struct iwl4965_cmd, hdr);
b481de9c 3006
6440adb5
BC
3007 /* Add buffer containing Tx command and MAC(!) header to TFD's
3008 * first entry */
bb8c093b 3009 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY
3010
3011 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
bb8c093b 3012 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
b481de9c 3013
6440adb5
BC
3014 /* Set up TFD's 2nd entry to point directly to remainder of skb,
3015 * if any (802.11 null frames have no payload). */
b481de9c
ZY
3016 len = skb->len - hdr_len;
3017 if (len) {
3018 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
3019 len, PCI_DMA_TODEVICE);
bb8c093b 3020 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY
3021 }
3022
6440adb5 3023 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY
3024 if (len_org)
3025 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
3026
6440adb5 3027 /* Total # bytes to be transmitted */
b481de9c
ZY
3028 len = (u16)skb->len;
3029 out_cmd->cmd.tx.len = cpu_to_le16(len);
3030
3031 /* TODO need this for burst mode later on */
bb8c093b 3032 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY
3033
3034 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 3035 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c
ZY
3036
3037 iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
3038 hdr, hdr_len, ctl, NULL);
3039
3040 if (!ieee80211_get_morefrag(hdr)) {
3041 txq->need_update = 1;
3042 if (qc) {
3043 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
3044 priv->stations[sta_id].tid[tid].seq_number = seq_number;
3045 }
3046 } else {
3047 wait_write_ptr = 1;
3048 txq->need_update = 0;
3049 }
3050
bb8c093b 3051 iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY
3052 sizeof(out_cmd->cmd.tx));
3053
bb8c093b 3054 iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY
3055 ieee80211_get_hdrlen(fc));
3056
6440adb5 3057 /* Set up entry for this TFD in Tx byte-count array */
b481de9c
ZY
3058 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
3059
6440adb5 3060 /* Tell device the write index *just past* this latest filled TFD */
bb8c093b
CH
3061 q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
3062 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
3063 spin_unlock_irqrestore(&priv->lock, flags);
3064
3065 if (rc)
3066 return rc;
3067
bb8c093b 3068 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY
3069 && priv->mac80211_registered) {
3070 if (wait_write_ptr) {
3071 spin_lock_irqsave(&priv->lock, flags);
3072 txq->need_update = 1;
bb8c093b 3073 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY
3074 spin_unlock_irqrestore(&priv->lock, flags);
3075 }
3076
3077 ieee80211_stop_queue(priv->hw, ctl->queue);
3078 }
3079
3080 return 0;
3081
3082drop_unlock:
3083 spin_unlock_irqrestore(&priv->lock, flags);
3084drop:
3085 return -1;
3086}
3087
bb8c093b 3088static void iwl4965_set_rate(struct iwl4965_priv *priv)
b481de9c
ZY
3089{
3090 const struct ieee80211_hw_mode *hw = NULL;
3091 struct ieee80211_rate *rate;
3092 int i;
3093
bb8c093b 3094 hw = iwl4965_get_hw_mode(priv, priv->phymode);
c4ba9621
SA
3095 if (!hw) {
3096 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
3097 return;
3098 }
b481de9c
ZY
3099
3100 priv->active_rate = 0;
3101 priv->active_rate_basic = 0;
3102
3103 IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
3104 hw->mode == MODE_IEEE80211A ?
3105 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
3106
3107 for (i = 0; i < hw->num_rates; i++) {
3108 rate = &(hw->rates[i]);
3109 if ((rate->val < IWL_RATE_COUNT) &&
3110 (rate->flags & IEEE80211_RATE_SUPPORTED)) {
3111 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
bb8c093b 3112 rate->val, iwl4965_rates[rate->val].plcp,
b481de9c
ZY
3113 (rate->flags & IEEE80211_RATE_BASIC) ?
3114 "*" : "");
3115 priv->active_rate |= (1 << rate->val);
3116 if (rate->flags & IEEE80211_RATE_BASIC)
3117 priv->active_rate_basic |= (1 << rate->val);
3118 } else
3119 IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
bb8c093b 3120 rate->val, iwl4965_rates[rate->val].plcp);
b481de9c
ZY
3121 }
3122
3123 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
3124 priv->active_rate, priv->active_rate_basic);
3125
3126 /*
3127 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
3128 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
3129 * OFDM
3130 */
3131 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
3132 priv->staging_rxon.cck_basic_rates =
3133 ((priv->active_rate_basic &
3134 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
3135 else
3136 priv->staging_rxon.cck_basic_rates =
3137 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
3138
3139 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
3140 priv->staging_rxon.ofdm_basic_rates =
3141 ((priv->active_rate_basic &
3142 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
3143 IWL_FIRST_OFDM_RATE) & 0xFF;
3144 else
3145 priv->staging_rxon.ofdm_basic_rates =
3146 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
3147}
3148
bb8c093b 3149static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
b481de9c
ZY
3150{
3151 unsigned long flags;
3152
3153 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
3154 return;
3155
3156 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
3157 disable_radio ? "OFF" : "ON");
3158
3159 if (disable_radio) {
bb8c093b 3160 iwl4965_scan_cancel(priv);
b481de9c
ZY
3161 /* FIXME: This is a workaround for AP */
3162 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
3163 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3164 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
3165 CSR_UCODE_SW_BIT_RFKILL);
3166 spin_unlock_irqrestore(&priv->lock, flags);
bb8c093b 3167 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY
3168 set_bit(STATUS_RF_KILL_SW, &priv->status);
3169 }
3170 return;
3171 }
3172
3173 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3174 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
3175
3176 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3177 spin_unlock_irqrestore(&priv->lock, flags);
3178
3179 /* wake up ucode */
3180 msleep(10);
3181
3182 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH
3183 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3184 if (!iwl4965_grab_nic_access(priv))
3185 iwl4965_release_nic_access(priv);
b481de9c
ZY
3186 spin_unlock_irqrestore(&priv->lock, flags);
3187
3188 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
3189 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
3190 "disabled by HW switch\n");
3191 return;
3192 }
3193
3194 queue_work(priv->workqueue, &priv->restart);
3195 return;
3196}
3197
bb8c093b 3198void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
b481de9c
ZY
3199 u32 decrypt_res, struct ieee80211_rx_status *stats)
3200{
3201 u16 fc =
3202 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
3203
3204 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
3205 return;
3206
3207 if (!(fc & IEEE80211_FCTL_PROTECTED))
3208 return;
3209
3210 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
3211 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
3212 case RX_RES_STATUS_SEC_TYPE_TKIP:
3213 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3214 RX_RES_STATUS_BAD_ICV_MIC)
3215 stats->flag |= RX_FLAG_MMIC_ERROR;
3216 case RX_RES_STATUS_SEC_TYPE_WEP:
3217 case RX_RES_STATUS_SEC_TYPE_CCMP:
3218 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
3219 RX_RES_STATUS_DECRYPT_OK) {
3220 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
3221 stats->flag |= RX_FLAG_DECRYPTED;
3222 }
3223 break;
3224
3225 default:
3226 break;
3227 }
3228}
3229
bb8c093b
CH
3230void iwl4965_handle_data_packet_monitor(struct iwl4965_priv *priv,
3231 struct iwl4965_rx_mem_buffer *rxb,
b481de9c
ZY
3232 void *data, short len,
3233 struct ieee80211_rx_status *stats,
3234 u16 phy_flags)
3235{
bb8c093b 3236 struct iwl4965_rt_rx_hdr *iwl4965_rt;
b481de9c
ZY
3237
3238 /* First cache any information we need before we overwrite
3239 * the information provided in the skb from the hardware */
3240 s8 signal = stats->ssi;
3241 s8 noise = 0;
3242 int rate = stats->rate;
3243 u64 tsf = stats->mactime;
3244 __le16 phy_flags_hw = cpu_to_le16(phy_flags);
3245
3246 /* We received data from the HW, so stop the watchdog */
bb8c093b 3247 if (len > IWL_RX_BUF_SIZE - sizeof(*iwl4965_rt)) {
b481de9c
ZY
3248 IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
3249 return;
3250 }
3251
3252 /* copy the frame data to write after where the radiotap header goes */
bb8c093b
CH
3253 iwl4965_rt = (void *)rxb->skb->data;
3254 memmove(iwl4965_rt->payload, data, len);
b481de9c 3255
bb8c093b
CH
3256 iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
3257 iwl4965_rt->rt_hdr.it_pad = 0; /* always good to zero */
b481de9c
ZY
3258
3259 /* total header + data */
bb8c093b 3260 iwl4965_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl4965_rt));
b481de9c
ZY
3261
3262 /* Set the size of the skb to the size of the frame */
bb8c093b 3263 skb_put(rxb->skb, sizeof(*iwl4965_rt) + len);
b481de9c
ZY
3264
3265 /* Big bitfield of all the fields we provide in radiotap */
bb8c093b 3266 iwl4965_rt->rt_hdr.it_present =
b481de9c
ZY
3267 cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
3268 (1 << IEEE80211_RADIOTAP_FLAGS) |
3269 (1 << IEEE80211_RADIOTAP_RATE) |
3270 (1 << IEEE80211_RADIOTAP_CHANNEL) |
3271 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
3272 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
3273 (1 << IEEE80211_RADIOTAP_ANTENNA));
3274
3275 /* Zero the flags, we'll add to them as we go */
bb8c093b 3276 iwl4965_rt->rt_flags = 0;
b481de9c 3277
bb8c093b 3278 iwl4965_rt->rt_tsf = cpu_to_le64(tsf);
b481de9c
ZY
3279
3280 /* Convert to dBm */
bb8c093b
CH
3281 iwl4965_rt->rt_dbmsignal = signal;
3282 iwl4965_rt->rt_dbmnoise = noise;
b481de9c
ZY
3283
3284 /* Convert the channel frequency and set the flags */
bb8c093b 3285 iwl4965_rt->rt_channelMHz = cpu_to_le16(stats->freq);
b481de9c 3286 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
bb8c093b 3287 iwl4965_rt->rt_chbitmask =
b481de9c
ZY
3288 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
3289 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
bb8c093b 3290 iwl4965_rt->rt_chbitmask =
b481de9c
ZY
3291 cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
3292 else /* 802.11g */
bb8c093b 3293 iwl4965_rt->rt_chbitmask =
b481de9c
ZY
3294 cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
3295
bb8c093b 3296 rate = iwl4965_rate_index_from_plcp(rate);
b481de9c 3297 if (rate == -1)
bb8c093b 3298 iwl4965_rt->rt_rate = 0;
b481de9c 3299 else
bb8c093b 3300 iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
b481de9c
ZY
3301
3302 /* antenna number */
bb8c093b 3303 iwl4965_rt->rt_antenna =
b481de9c
ZY
3304 le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
3305
3306 /* set the preamble flag if we have it */
3307 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
bb8c093b 3308 iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
b481de9c
ZY
3309
3310 IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
3311
3312 stats->flag |= RX_FLAG_RADIOTAP;
3313 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3314 rxb->skb = NULL;
3315}
3316
3317
3318#define IWL_PACKET_RETRY_TIME HZ
3319
bb8c093b 3320int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY
3321{
3322 u16 sc = le16_to_cpu(header->seq_ctrl);
3323 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
3324 u16 frag = sc & IEEE80211_SCTL_FRAG;
3325 u16 *last_seq, *last_frag;
3326 unsigned long *last_time;
3327
3328 switch (priv->iw_mode) {
3329 case IEEE80211_IF_TYPE_IBSS:{
3330 struct list_head *p;
bb8c093b 3331 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY
3332 u8 *mac = header->addr2;
3333 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
3334
3335 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 3336 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY
3337 if (!compare_ether_addr(entry->mac, mac))
3338 break;
3339 }
3340 if (p == &priv->ibss_mac_hash[index]) {
3341 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
3342 if (!entry) {
bc434dd2 3343 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY
3344 return 0;
3345 }
3346 memcpy(entry->mac, mac, ETH_ALEN);
3347 entry->seq_num = seq;
3348 entry->frag_num = frag;
3349 entry->packet_time = jiffies;
bc434dd2 3350 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY
3351 return 0;
3352 }
3353 last_seq = &entry->seq_num;
3354 last_frag = &entry->frag_num;
3355 last_time = &entry->packet_time;
3356 break;
3357 }
3358 case IEEE80211_IF_TYPE_STA:
3359 last_seq = &priv->last_seq_num;
3360 last_frag = &priv->last_frag_num;
3361 last_time = &priv->last_packet_time;
3362 break;
3363 default:
3364 return 0;
3365 }
3366 if ((*last_seq == seq) &&
3367 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3368 if (*last_frag == frag)
3369 goto drop;
3370 if (*last_frag + 1 != frag)
3371 /* out-of-order fragment */
3372 goto drop;
3373 } else
3374 *last_seq = seq;
3375
3376 *last_frag = frag;
3377 *last_time = jiffies;
3378 return 0;
3379
3380 drop:
3381 return 1;
3382}
3383
c8b0e6e1 3384#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
3385
3386#include "iwl-spectrum.h"
3387
3388#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3389#define BEACON_TIME_MASK_HIGH 0xFF000000
3390#define TIME_UNIT 1024
3391
3392/*
3393 * extended beacon time format
3394 * time in usec will be changed into a 32-bit value in 8:24 format
3395 * the high 1 byte is the beacon counts
3396 * the lower 3 bytes is the time in usec within one beacon interval
3397 */
3398
bb8c093b 3399static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY
3400{
3401 u32 quot;
3402 u32 rem;
3403 u32 interval = beacon_interval * 1024;
3404
3405 if (!interval || !usec)
3406 return 0;
3407
3408 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3409 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3410
3411 return (quot << 24) + rem;
3412}
3413
3414/* base is usually what we get from ucode with each received frame,
3415 * the same as HW timer counter counting down
3416 */
3417
bb8c093b 3418static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY
3419{
3420 u32 base_low = base & BEACON_TIME_MASK_LOW;
3421 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3422 u32 interval = beacon_interval * TIME_UNIT;
3423 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3424 (addon & BEACON_TIME_MASK_HIGH);
3425
3426 if (base_low > addon_low)
3427 res += base_low - addon_low;
3428 else if (base_low < addon_low) {
3429 res += interval + base_low - addon_low;
3430 res += (1 << 24);
3431 } else
3432 res += (1 << 24);
3433
3434 return cpu_to_le32(res);
3435}
3436
bb8c093b 3437static int iwl4965_get_measurement(struct iwl4965_priv *priv,
b481de9c
ZY
3438 struct ieee80211_measurement_params *params,
3439 u8 type)
3440{
bb8c093b
CH
3441 struct iwl4965_spectrum_cmd spectrum;
3442 struct iwl4965_rx_packet *res;
3443 struct iwl4965_host_cmd cmd = {
b481de9c
ZY
3444 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3445 .data = (void *)&spectrum,
3446 .meta.flags = CMD_WANT_SKB,
3447 };
3448 u32 add_time = le64_to_cpu(params->start_time);
3449 int rc;
3450 int spectrum_resp_status;
3451 int duration = le16_to_cpu(params->duration);
3452
bb8c093b 3453 if (iwl4965_is_associated(priv))
b481de9c 3454 add_time =
bb8c093b 3455 iwl4965_usecs_to_beacons(
b481de9c
ZY
3456 le64_to_cpu(params->start_time) - priv->last_tsf,
3457 le16_to_cpu(priv->rxon_timing.beacon_interval));
3458
3459 memset(&spectrum, 0, sizeof(spectrum));
3460
3461 spectrum.channel_count = cpu_to_le16(1);
3462 spectrum.flags =
3463 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3464 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3465 cmd.len = sizeof(spectrum);
3466 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3467
bb8c093b 3468 if (iwl4965_is_associated(priv))
b481de9c 3469 spectrum.start_time =
bb8c093b 3470 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY
3471 add_time,
3472 le16_to_cpu(priv->rxon_timing.beacon_interval));
3473 else
3474 spectrum.start_time = 0;
3475
3476 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3477 spectrum.channels[0].channel = params->channel;
3478 spectrum.channels[0].type = type;
3479 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3480 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3481 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3482
bb8c093b 3483 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY
3484 if (rc)
3485 return rc;
3486
bb8c093b 3487 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY
3488 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3489 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3490 rc = -EIO;
3491 }
3492
3493 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3494 switch (spectrum_resp_status) {
3495 case 0: /* Command will be handled */
3496 if (res->u.spectrum.id != 0xff) {
3497 IWL_DEBUG_INFO
3498 ("Replaced existing measurement: %d\n",
3499 res->u.spectrum.id);
3500 priv->measurement_status &= ~MEASUREMENT_READY;
3501 }
3502 priv->measurement_status |= MEASUREMENT_ACTIVE;
3503 rc = 0;
3504 break;
3505
3506 case 1: /* Command will not be handled */
3507 rc = -EAGAIN;
3508 break;
3509 }
3510
3511 dev_kfree_skb_any(cmd.meta.u.skb);
3512
3513 return rc;
3514}
3515#endif
3516
bb8c093b
CH
3517static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
3518 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY
3519{
3520
3521 tx_sta->status.ack_signal = 0;
3522 tx_sta->status.excessive_retries = 0;
3523 tx_sta->status.queue_length = 0;
3524 tx_sta->status.queue_number = 0;
3525
3526 if (in_interrupt())
3527 ieee80211_tx_status_irqsafe(priv->hw,
3528 tx_sta->skb[0], &(tx_sta->status));
3529 else
3530 ieee80211_tx_status(priv->hw,
3531 tx_sta->skb[0], &(tx_sta->status));
3532
3533 tx_sta->skb[0] = NULL;
3534}
3535
3536/**
6440adb5 3537 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 3538 *
6440adb5
BC
3539 * When FW advances 'R' index, all entries between old and new 'R' index
3540 * need to be reclaimed. As result, some free space forms. If there is
3541 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 3542 */
bb8c093b 3543int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
b481de9c 3544{
bb8c093b
CH
3545 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3546 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY
3547 int nfreed = 0;
3548
3549 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3550 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3551 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 3552 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY
3553 return 0;
3554 }
3555
bb8c093b 3556 for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
fc4b6853 3557 q->read_ptr != index;
bb8c093b 3558 q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 3559 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 3560 iwl4965_txstatus_to_ieee(priv,
fc4b6853 3561 &(txq->txb[txq->q.read_ptr]));
bb8c093b 3562 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY
3563 } else if (nfreed > 1) {
3564 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 3565 q->write_ptr, q->read_ptr);
b481de9c
ZY
3566 queue_work(priv->workqueue, &priv->restart);
3567 }
3568 nfreed++;
3569 }
3570
bb8c093b 3571 if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY
3572 (txq_id != IWL_CMD_QUEUE_NUM) &&
3573 priv->mac80211_registered)
3574 ieee80211_wake_queue(priv->hw, txq_id);
3575
3576
3577 return nfreed;
3578}
3579
bb8c093b 3580static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY
3581{
3582 status &= TX_STATUS_MSK;
3583 return (status == TX_STATUS_SUCCESS)
3584 || (status == TX_STATUS_DIRECT_DONE);
3585}
3586
3587/******************************************************************************
3588 *
3589 * Generic RX handler implementations
3590 *
3591 ******************************************************************************/
c8b0e6e1
CH
3592#ifdef CONFIG_IWL4965_HT
3593#ifdef CONFIG_IWL4965_HT_AGG
b481de9c 3594
bb8c093b 3595static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
b481de9c
ZY
3596 struct ieee80211_hdr *hdr)
3597{
3598 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3599 return IWL_AP_ID;
3600 else {
3601 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 3602 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY
3603 }
3604}
3605
bb8c093b
CH
3606static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
3607 struct iwl4965_priv *priv, int txq_id, int idx)
b481de9c
ZY
3608{
3609 if (priv->txq[txq_id].txb[idx].skb[0])
3610 return (struct ieee80211_hdr *)priv->txq[txq_id].
3611 txb[idx].skb[0]->data;
3612 return NULL;
3613}
3614
bb8c093b 3615static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY
3616{
3617 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3618 tx_resp->frame_count);
3619 return le32_to_cpu(*scd_ssn) & MAX_SN;
3620
3621}
6440adb5
BC
3622
3623/**
3624 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3625 */
bb8c093b
CH
3626static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
3627 struct iwl4965_ht_agg *agg,
3628 struct iwl4965_tx_resp *tx_resp,
b481de9c
ZY
3629 u16 start_idx)
3630{
3631 u32 status;
3632 __le32 *frame_status = &tx_resp->status;
3633 struct ieee80211_tx_status *tx_status = NULL;
3634 struct ieee80211_hdr *hdr = NULL;
3635 int i, sh;
3636 int txq_id, idx;
3637 u16 seq;
3638
3639 if (agg->wait_for_ba)
6440adb5 3640 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY
3641
3642 agg->frame_count = tx_resp->frame_count;
3643 agg->start_idx = start_idx;
3644 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3645 agg->bitmap0 = agg->bitmap1 = 0;
3646
6440adb5 3647 /* # frames attempted by Tx command */
b481de9c 3648 if (agg->frame_count == 1) {
6440adb5 3649 /* Only one frame was attempted; no block-ack will arrive */
bb8c093b 3650 struct iwl4965_tx_queue *txq ;
b481de9c
ZY
3651 status = le32_to_cpu(frame_status[0]);
3652
3653 txq_id = agg->txq_id;
3654 txq = &priv->txq[txq_id];
3655 /* FIXME: code repetition */
3656 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
3657 agg->frame_count, agg->start_idx);
3658
fc4b6853 3659 tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
b481de9c
ZY
3660 tx_status->retry_count = tx_resp->failure_frame;
3661 tx_status->queue_number = status & 0xff;
3662 tx_status->queue_length = tx_resp->bt_kill_count;
3663 tx_status->queue_length |= tx_resp->failure_rts;
3664
bb8c093b 3665 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c
ZY
3666 IEEE80211_TX_STATUS_ACK : 0;
3667 tx_status->control.tx_rate =
bb8c093b 3668 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
b481de9c
ZY
3669 /* FIXME: code repetition end */
3670
3671 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3672 status & 0xff, tx_resp->failure_frame);
3673 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 3674 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY
3675
3676 agg->wait_for_ba = 0;
3677 } else {
6440adb5 3678 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY
3679 u64 bitmap = 0;
3680 int start = agg->start_idx;
3681
6440adb5 3682 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY
3683 for (i = 0; i < agg->frame_count; i++) {
3684 u16 sc;
3685 status = le32_to_cpu(frame_status[i]);
3686 seq = status >> 16;
3687 idx = SEQ_TO_INDEX(seq);
3688 txq_id = SEQ_TO_QUEUE(seq);
3689
3690 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3691 AGG_TX_STATE_ABORT_MSK))
3692 continue;
3693
3694 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3695 agg->frame_count, txq_id, idx);
3696
bb8c093b 3697 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY
3698
3699 sc = le16_to_cpu(hdr->seq_ctrl);
3700 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3701 IWL_ERROR("BUG_ON idx doesn't match seq control"
3702 " idx=%d, seq_idx=%d, seq=%d\n",
3703 idx, SEQ_TO_SN(sc),
3704 hdr->seq_ctrl);
3705 return -1;
3706 }
3707
3708 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3709 i, idx, SEQ_TO_SN(sc));
3710
3711 sh = idx - start;
3712 if (sh > 64) {
3713 sh = (start - idx) + 0xff;
3714 bitmap = bitmap << sh;
3715 sh = 0;
3716 start = idx;
3717 } else if (sh < -64)
3718 sh = 0xff - (start - idx);
3719 else if (sh < 0) {
3720 sh = start - idx;
3721 start = idx;
3722 bitmap = bitmap << sh;
3723 sh = 0;
3724 }
3725 bitmap |= (1 << sh);
3726 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3727 start, (u32)(bitmap & 0xFFFFFFFF));
3728 }
3729
3730 agg->bitmap0 = bitmap & 0xFFFFFFFF;
3731 agg->bitmap1 = bitmap >> 32;
3732 agg->start_idx = start;
3733 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
3734 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
3735 agg->frame_count, agg->start_idx,
3736 agg->bitmap0);
3737
3738 if (bitmap)
3739 agg->wait_for_ba = 1;
3740 }
3741 return 0;
3742}
3743#endif
3744#endif
3745
6440adb5
BC
3746/**
3747 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3748 */
bb8c093b
CH
3749static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
3750 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3751{
bb8c093b 3752 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3753 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3754 int txq_id = SEQ_TO_QUEUE(sequence);
3755 int index = SEQ_TO_INDEX(sequence);
bb8c093b 3756 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 3757 struct ieee80211_tx_status *tx_status;
bb8c093b 3758 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 3759 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1
CH
3760#ifdef CONFIG_IWL4965_HT
3761#ifdef CONFIG_IWL4965_HT_AGG
b481de9c
ZY
3762 int tid, sta_id;
3763#endif
3764#endif
3765
3766 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3767 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3768 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW
3769 index, txq->q.n_bd, txq->q.write_ptr,
3770 txq->q.read_ptr);
b481de9c
ZY
3771 return;
3772 }
3773
c8b0e6e1
CH
3774#ifdef CONFIG_IWL4965_HT
3775#ifdef CONFIG_IWL4965_HT_AGG
b481de9c 3776 if (txq->sched_retry) {
bb8c093b 3777 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
b481de9c 3778 struct ieee80211_hdr *hdr =
bb8c093b
CH
3779 iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3780 struct iwl4965_ht_agg *agg = NULL;
b481de9c
ZY
3781 __le16 *qc = ieee80211_get_qos_ctrl(hdr);
3782
3783 if (qc == NULL) {
3784 IWL_ERROR("BUG_ON qc is null!!!!\n");
3785 return;
3786 }
3787
3788 tid = le16_to_cpu(*qc) & 0xf;
3789
bb8c093b 3790 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
b481de9c
ZY
3791 if (unlikely(sta_id == IWL_INVALID_STATION)) {
3792 IWL_ERROR("Station not known for\n");
3793 return;
3794 }
3795
3796 agg = &priv->stations[sta_id].tid[tid].agg;
3797
3798 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
3799
3800 if ((tx_resp->frame_count == 1) &&
bb8c093b 3801 !iwl4965_is_tx_success(status)) {
b481de9c
ZY
3802 /* TODO: send BAR */
3803 }
3804
fc4b6853 3805 if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
bb8c093b 3806 index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY
3807 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3808 "%d index %d\n", scd_ssn , index);
bb8c093b 3809 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
3810 }
3811 } else {
c8b0e6e1
CH
3812#endif /* CONFIG_IWL4965_HT_AGG */
3813#endif /* CONFIG_IWL4965_HT */
fc4b6853 3814 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY
3815
3816 tx_status->retry_count = tx_resp->failure_frame;
3817 tx_status->queue_number = status;
3818 tx_status->queue_length = tx_resp->bt_kill_count;
3819 tx_status->queue_length |= tx_resp->failure_rts;
3820
3821 tx_status->flags =
bb8c093b 3822 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
b481de9c
ZY
3823
3824 tx_status->control.tx_rate =
bb8c093b 3825 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
b481de9c
ZY
3826
3827 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3828 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY
3829 status, le32_to_cpu(tx_resp->rate_n_flags),
3830 tx_resp->failure_frame);
3831
3832 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
3833 if (index != -1)
bb8c093b 3834 iwl4965_tx_queue_reclaim(priv, txq_id, index);
c8b0e6e1
CH
3835#ifdef CONFIG_IWL4965_HT
3836#ifdef CONFIG_IWL4965_HT_AGG
b481de9c 3837 }
c8b0e6e1
CH
3838#endif /* CONFIG_IWL4965_HT_AGG */
3839#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY
3840
3841 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3842 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3843}
3844
3845
bb8c093b
CH
3846static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
3847 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3848{
bb8c093b
CH
3849 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3850 struct iwl4965_alive_resp *palive;
b481de9c
ZY
3851 struct delayed_work *pwork;
3852
3853 palive = &pkt->u.alive_frame;
3854
3855 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3856 "0x%01X 0x%01X\n",
3857 palive->is_valid, palive->ver_type,
3858 palive->ver_subtype);
3859
3860 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3861 IWL_DEBUG_INFO("Initialization Alive received.\n");
3862 memcpy(&priv->card_alive_init,
3863 &pkt->u.alive_frame,
bb8c093b 3864 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY
3865 pwork = &priv->init_alive_start;
3866 } else {
3867 IWL_DEBUG_INFO("Runtime Alive received.\n");
3868 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3869 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
3870 pwork = &priv->alive_start;
3871 }
3872
3873 /* We delay the ALIVE response by 5ms to
3874 * give the HW RF Kill time to activate... */
3875 if (palive->is_valid == UCODE_VALID_OK)
3876 queue_delayed_work(priv->workqueue, pwork,
3877 msecs_to_jiffies(5));
3878 else
3879 IWL_WARNING("uCode did not respond OK.\n");
3880}
3881
bb8c093b
CH
3882static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
3883 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3884{
bb8c093b 3885 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3886
3887 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3888 return;
3889}
3890
bb8c093b
CH
3891static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
3892 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3893{
bb8c093b 3894 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3895
3896 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3897 "seq 0x%04X ser 0x%08X\n",
3898 le32_to_cpu(pkt->u.err_resp.error_type),
3899 get_cmd_string(pkt->u.err_resp.cmd_id),
3900 pkt->u.err_resp.cmd_id,
3901 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3902 le32_to_cpu(pkt->u.err_resp.error_info));
3903}
3904
3905#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3906
bb8c093b 3907static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3908{
bb8c093b
CH
3909 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3910 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3911 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY
3912 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3913 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3914 rxon->channel = csa->channel;
3915 priv->staging_rxon.channel = csa->channel;
3916}
3917
bb8c093b
CH
3918static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
3919 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3920{
c8b0e6e1 3921#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH
3922 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3923 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY
3924
3925 if (!report->state) {
3926 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3927 "Spectrum Measure Notification: Start\n");
3928 return;
3929 }
3930
3931 memcpy(&priv->measure_report, report, sizeof(*report));
3932 priv->measurement_status |= MEASUREMENT_READY;
3933#endif
3934}
3935
bb8c093b
CH
3936static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
3937 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3938{
c8b0e6e1 3939#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH
3940 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3941 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY
3942 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3943 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3944#endif
3945}
3946
bb8c093b
CH
3947static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
3948 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3949{
bb8c093b 3950 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
3951 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3952 "notification for %s:\n",
3953 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
bb8c093b 3954 iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY
3955}
3956
bb8c093b 3957static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3958{
bb8c093b
CH
3959 struct iwl4965_priv *priv =
3960 container_of(work, struct iwl4965_priv, beacon_update);
b481de9c
ZY
3961 struct sk_buff *beacon;
3962
3963 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
3964 beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
3965
3966 if (!beacon) {
3967 IWL_ERROR("update beacon failed\n");
3968 return;
3969 }
3970
3971 mutex_lock(&priv->mutex);
3972 /* new beacon skb is allocated every time; dispose previous.*/
3973 if (priv->ibss_beacon)
3974 dev_kfree_skb(priv->ibss_beacon);
3975
3976 priv->ibss_beacon = beacon;
3977 mutex_unlock(&priv->mutex);
3978
bb8c093b 3979 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
3980}
3981
bb8c093b
CH
3982static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
3983 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3984{
c8b0e6e1 3985#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH
3986 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3987 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3988 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY
3989
3990 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3991 "tsf %d %d rate %d\n",
3992 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3993 beacon->beacon_notify_hdr.failure_frame,
3994 le32_to_cpu(beacon->ibss_mgr_status),
3995 le32_to_cpu(beacon->high_tsf),
3996 le32_to_cpu(beacon->low_tsf), rate);
3997#endif
3998
3999 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
4000 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
4001 queue_work(priv->workqueue, &priv->beacon_update);
4002}
4003
4004/* Service response to REPLY_SCAN_CMD (0x80) */
bb8c093b
CH
4005static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
4006 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4007{
c8b0e6e1 4008#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH
4009 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4010 struct iwl4965_scanreq_notification *notif =
4011 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY
4012
4013 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
4014#endif
4015}
4016
4017/* Service SCAN_START_NOTIFICATION (0x82) */
bb8c093b
CH
4018static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
4019 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4020{
bb8c093b
CH
4021 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4022 struct iwl4965_scanstart_notification *notif =
4023 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY
4024 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
4025 IWL_DEBUG_SCAN("Scan start: "
4026 "%d [802.11%s] "
4027 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
4028 notif->channel,
4029 notif->band ? "bg" : "a",
4030 notif->tsf_high,
4031 notif->tsf_low, notif->status, notif->beacon_timer);
4032}
4033
4034/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
bb8c093b
CH
4035static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
4036 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4037{
bb8c093b
CH
4038 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4039 struct iwl4965_scanresults_notification *notif =
4040 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY
4041
4042 IWL_DEBUG_SCAN("Scan ch.res: "
4043 "%d [802.11%s] "
4044 "(TSF: 0x%08X:%08X) - %d "
4045 "elapsed=%lu usec (%dms since last)\n",
4046 notif->channel,
4047 notif->band ? "bg" : "a",
4048 le32_to_cpu(notif->tsf_high),
4049 le32_to_cpu(notif->tsf_low),
4050 le32_to_cpu(notif->statistics[0]),
4051 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
4052 jiffies_to_msecs(elapsed_jiffies
4053 (priv->last_scan_jiffies, jiffies)));
4054
4055 priv->last_scan_jiffies = jiffies;
4056}
4057
4058/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
bb8c093b
CH
4059static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
4060 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4061{
bb8c093b
CH
4062 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
4063 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY
4064
4065 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
4066 scan_notif->scanned_channels,
4067 scan_notif->tsf_low,
4068 scan_notif->tsf_high, scan_notif->status);
4069
4070 /* The HW is no longer scanning */
4071 clear_bit(STATUS_SCAN_HW, &priv->status);
4072
4073 /* The scan completion notification came in, so kill that timer... */
4074 cancel_delayed_work(&priv->scan_check);
4075
4076 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
4077 (priv->scan_bands == 2) ? "2.4" : "5.2",
4078 jiffies_to_msecs(elapsed_jiffies
4079 (priv->scan_pass_start, jiffies)));
4080
4081 /* Remove this scanned band from the list
4082 * of pending bands to scan */
4083 priv->scan_bands--;
4084
4085 /* If a request to abort was given, or the scan did not succeed
4086 * then we reset the scan state machine and terminate,
4087 * re-queuing another scan if one has been requested */
4088 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
4089 IWL_DEBUG_INFO("Aborted scan completed.\n");
4090 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
4091 } else {
4092 /* If there are more bands on this scan pass reschedule */
4093 if (priv->scan_bands > 0)
4094 goto reschedule;
4095 }
4096
4097 priv->last_scan_jiffies = jiffies;
4098 IWL_DEBUG_INFO("Setting scan to off\n");
4099
4100 clear_bit(STATUS_SCANNING, &priv->status);
4101
4102 IWL_DEBUG_INFO("Scan took %dms\n",
4103 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
4104
4105 queue_work(priv->workqueue, &priv->scan_completed);
4106
4107 return;
4108
4109reschedule:
4110 priv->scan_pass_start = jiffies;
4111 queue_work(priv->workqueue, &priv->request_scan);
4112}
4113
4114/* Handle notification from uCode that card's power state is changing
4115 * due to software, hardware, or critical temperature RFKILL */
bb8c093b
CH
4116static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
4117 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4118{
bb8c093b 4119 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY
4120 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4121 unsigned long status = priv->status;
4122
4123 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
4124 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4125 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
4126
4127 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
4128 RF_CARD_DISABLED)) {
4129
bb8c093b 4130 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY
4131 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4132
bb8c093b
CH
4133 if (!iwl4965_grab_nic_access(priv)) {
4134 iwl4965_write_direct32(
b481de9c
ZY
4135 priv, HBUS_TARG_MBX_C,
4136 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4137
bb8c093b 4138 iwl4965_release_nic_access(priv);
b481de9c
ZY
4139 }
4140
4141 if (!(flags & RXON_CARD_DISABLED)) {
bb8c093b 4142 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 4143 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH
4144 if (!iwl4965_grab_nic_access(priv)) {
4145 iwl4965_write_direct32(
b481de9c
ZY
4146 priv, HBUS_TARG_MBX_C,
4147 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4148
bb8c093b 4149 iwl4965_release_nic_access(priv);
b481de9c
ZY
4150 }
4151 }
4152
4153 if (flags & RF_CARD_DISABLED) {
bb8c093b 4154 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 4155 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
bb8c093b
CH
4156 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
4157 if (!iwl4965_grab_nic_access(priv))
4158 iwl4965_release_nic_access(priv);
b481de9c
ZY
4159 }
4160 }
4161
4162 if (flags & HW_CARD_DISABLED)
4163 set_bit(STATUS_RF_KILL_HW, &priv->status);
4164 else
4165 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4166
4167
4168 if (flags & SW_CARD_DISABLED)
4169 set_bit(STATUS_RF_KILL_SW, &priv->status);
4170 else
4171 clear_bit(STATUS_RF_KILL_SW, &priv->status);
4172
4173 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 4174 iwl4965_scan_cancel(priv);
b481de9c
ZY
4175
4176 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
4177 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
4178 (test_bit(STATUS_RF_KILL_SW, &status) !=
4179 test_bit(STATUS_RF_KILL_SW, &priv->status)))
4180 queue_work(priv->workqueue, &priv->rf_kill);
4181 else
4182 wake_up_interruptible(&priv->wait_command_queue);
4183}
4184
4185/**
bb8c093b 4186 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY
4187 *
4188 * Setup the RX handlers for each of the reply types sent from the uCode
4189 * to the host.
4190 *
4191 * This function chains into the hardware specific files for them to setup
4192 * any hardware specific handlers as well.
4193 */
bb8c093b 4194static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
b481de9c 4195{
bb8c093b
CH
4196 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
4197 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
4198 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
4199 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 4200 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH
4201 iwl4965_rx_spectrum_measure_notif;
4202 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 4203 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH
4204 iwl4965_rx_pm_debug_statistics_notif;
4205 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 4206
9fbab516
BC
4207 /*
4208 * The same handler is used for both the REPLY to a discrete
4209 * statistics request from the host as well as for the periodic
4210 * statistics notifications (after received beacons) from the uCode.
b481de9c 4211 */
bb8c093b
CH
4212 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
4213 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 4214
bb8c093b
CH
4215 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
4216 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 4217 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 4218 iwl4965_rx_scan_results_notif;
b481de9c 4219 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH
4220 iwl4965_rx_scan_complete_notif;
4221 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
4222 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 4223
9fbab516 4224 /* Set up hardware specific Rx handlers */
bb8c093b 4225 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY
4226}
4227
4228/**
bb8c093b 4229 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY
4230 * @rxb: Rx buffer to reclaim
4231 *
4232 * If an Rx buffer has an async callback associated with it the callback
4233 * will be executed. The attached skb (if present) will only be freed
4234 * if the callback returns 1
4235 */
bb8c093b
CH
4236static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
4237 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 4238{
bb8c093b 4239 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
4240 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
4241 int txq_id = SEQ_TO_QUEUE(sequence);
4242 int index = SEQ_TO_INDEX(sequence);
4243 int huge = sequence & SEQ_HUGE_FRAME;
4244 int cmd_index;
bb8c093b 4245 struct iwl4965_cmd *cmd;
b481de9c
ZY
4246
4247 /* If a Tx command is being handled and it isn't in the actual
4248 * command queue then there a command routing bug has been introduced
4249 * in the queue management code. */
4250 if (txq_id != IWL_CMD_QUEUE_NUM)
4251 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
4252 txq_id, pkt->hdr.cmd);
4253 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
4254
4255 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
4256 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
4257
4258 /* Input error checking is done when commands are added to queue. */
4259 if (cmd->meta.flags & CMD_WANT_SKB) {
4260 cmd->meta.source->u.skb = rxb->skb;
4261 rxb->skb = NULL;
4262 } else if (cmd->meta.u.callback &&
4263 !cmd->meta.u.callback(priv, cmd, rxb->skb))
4264 rxb->skb = NULL;
4265
bb8c093b 4266 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY
4267
4268 if (!(cmd->meta.flags & CMD_ASYNC)) {
4269 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4270 wake_up_interruptible(&priv->wait_command_queue);
4271 }
4272}
4273
4274/************************** RX-FUNCTIONS ****************************/
4275/*
4276 * Rx theory of operation
4277 *
9fbab516
BC
4278 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
4279 * each of which point to Receive Buffers to be filled by 4965. These get
4280 * used not only for Rx frames, but for any command response or notification
4281 * from the 4965. The driver and 4965 manage the Rx buffers by means
4282 * of indexes into the circular buffer.
b481de9c
ZY
4283 *
4284 * Rx Queue Indexes
4285 * The host/firmware share two index registers for managing the Rx buffers.
4286 *
4287 * The READ index maps to the first position that the firmware may be writing
4288 * to -- the driver can read up to (but not including) this position and get
4289 * good data.
4290 * The READ index is managed by the firmware once the card is enabled.
4291 *
4292 * The WRITE index maps to the last position the driver has read from -- the
4293 * position preceding WRITE is the last slot the firmware can place a packet.
4294 *
4295 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
4296 * WRITE = READ.
4297 *
9fbab516 4298 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY
4299 * INDEX position, and WRITE to the last (READ - 1 wrapped)
4300 *
9fbab516 4301 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY
4302 * and fire the RX interrupt. The driver can then query the READ index and
4303 * process as many packets as possible, moving the WRITE index forward as it
4304 * resets the Rx queue buffers with new memory.
4305 *
4306 * The management in the driver is as follows:
4307 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
4308 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 4309 * to replenish the iwl->rxq->rx_free.
bb8c093b 4310 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY
4311 * iwl->rxq is replenished and the READ INDEX is updated (updating the
4312 * 'processed' and 'read' driver indexes as well)
4313 * + A received packet is processed and handed to the kernel network stack,
4314 * detached from the iwl->rxq. The driver 'processed' index is updated.
4315 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
4316 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
4317 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
4318 * were enough free buffers and RX_STALLED is set it is cleared.
4319 *
4320 *
4321 * Driver sequence:
4322 *
9fbab516
BC
4323 * iwl4965_rx_queue_alloc() Allocates rx_free
4324 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 4325 * iwl4965_rx_queue_restock
9fbab516 4326 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY
4327 * queue, updates firmware pointers, and updates
4328 * the WRITE index. If insufficient rx_free buffers
bb8c093b 4329 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY
4330 *
4331 * -- enable interrupts --
9fbab516 4332 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY
4333 * READ INDEX, detaching the SKB from the pool.
4334 * Moves the packet buffer from queue to rx_used.
bb8c093b 4335 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY
4336 * slots.
4337 * ...
4338 *
4339 */
4340
4341/**
bb8c093b 4342 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 4343 */
bb8c093b 4344static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY
4345{
4346 int s = q->read - q->write;
4347 if (s <= 0)
4348 s += RX_QUEUE_SIZE;
4349 /* keep some buffer to not confuse full and empty queue */
4350 s -= 2;
4351 if (s < 0)
4352 s = 0;
4353 return s;
4354}
4355
4356/**
bb8c093b 4357 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 4358 */
bb8c093b 4359int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY
4360{
4361 u32 reg = 0;
4362 int rc = 0;
4363 unsigned long flags;
4364
4365 spin_lock_irqsave(&q->lock, flags);
4366
4367 if (q->need_update == 0)
4368 goto exit_unlock;
4369
6440adb5 4370 /* If power-saving is in use, make sure device is awake */
b481de9c 4371 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
bb8c093b 4372 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
4373
4374 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
bb8c093b 4375 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
4376 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4377 goto exit_unlock;
4378 }
4379
bb8c093b 4380 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
4381 if (rc)
4382 goto exit_unlock;
4383
6440adb5 4384 /* Device expects a multiple of 8 */
bb8c093b 4385 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 4386 q->write & ~0x7);
bb8c093b 4387 iwl4965_release_nic_access(priv);
6440adb5
BC
4388
4389 /* Else device is assumed to be awake */
b481de9c 4390 } else
6440adb5 4391 /* Device expects a multiple of 8 */
bb8c093b 4392 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY
4393
4394
4395 q->need_update = 0;
4396
4397 exit_unlock:
4398 spin_unlock_irqrestore(&q->lock, flags);
4399 return rc;
4400}
4401
4402/**
9fbab516 4403 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 4404 */
bb8c093b 4405static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
b481de9c
ZY
4406 dma_addr_t dma_addr)
4407{
4408 return cpu_to_le32((u32)(dma_addr >> 8));
4409}
4410
4411
4412/**
bb8c093b 4413 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 4414 *
9fbab516 4415 * If there are slots in the RX queue that need to be restocked,
b481de9c 4416 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 4417 * as we can, pulling from rx_free.
b481de9c
ZY
4418 *
4419 * This moves the 'write' index forward to catch up with 'processed', and
4420 * also updates the memory address in the firmware to reference the new
4421 * target buffer.
4422 */
bb8c093b 4423static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
b481de9c 4424{
bb8c093b 4425 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4426 struct list_head *element;
bb8c093b 4427 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
4428 unsigned long flags;
4429 int write, rc;
4430
4431 spin_lock_irqsave(&rxq->lock, flags);
4432 write = rxq->write & ~0x7;
bb8c093b 4433 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 4434 /* Get next free Rx buffer, remove from free list */
b481de9c 4435 element = rxq->rx_free.next;
bb8c093b 4436 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 4437 list_del(element);
6440adb5
BC
4438
4439 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 4440 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY
4441 rxq->queue[rxq->write] = rxb;
4442 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4443 rxq->free_count--;
4444 }
4445 spin_unlock_irqrestore(&rxq->lock, flags);
4446 /* If the pre-allocated buffer pool is dropping low, schedule to
4447 * refill it */
4448 if (rxq->free_count <= RX_LOW_WATERMARK)
4449 queue_work(priv->workqueue, &priv->rx_replenish);
4450
4451
6440adb5
BC
4452 /* If we've added more space for the firmware to place data, tell it.
4453 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY
4454 if ((write != (rxq->write & ~0x7))
4455 || (abs(rxq->write - rxq->read) > 7)) {
4456 spin_lock_irqsave(&rxq->lock, flags);
4457 rxq->need_update = 1;
4458 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 4459 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY
4460 if (rc)
4461 return rc;
4462 }
4463
4464 return 0;
4465}
4466
4467/**
bb8c093b 4468 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY
4469 *
4470 * When moving to rx_free an SKB is allocated for the slot.
4471 *
bb8c093b 4472 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 4473 * This is called as a scheduled work item (except for during initialization)
b481de9c 4474 */
bb8c093b 4475void iwl4965_rx_replenish(void *data)
b481de9c 4476{
bb8c093b
CH
4477 struct iwl4965_priv *priv = data;
4478 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4479 struct list_head *element;
bb8c093b 4480 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY
4481 unsigned long flags;
4482 spin_lock_irqsave(&rxq->lock, flags);
4483 while (!list_empty(&rxq->rx_used)) {
4484 element = rxq->rx_used.next;
bb8c093b 4485 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
BC
4486
4487 /* Alloc a new receive buffer */
b481de9c
ZY
4488 rxb->skb =
4489 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
4490 if (!rxb->skb) {
4491 if (net_ratelimit())
4492 printk(KERN_CRIT DRV_NAME
4493 ": Can not allocate SKB buffers\n");
4494 /* We don't reschedule replenish work here -- we will
4495 * call the restock method and if it still needs
4496 * more buffers it will schedule replenish */
4497 break;
4498 }
4499 priv->alloc_rxb_skb++;
4500 list_del(element);
6440adb5
BC
4501
4502 /* Get physical address of RB/SKB */
b481de9c
ZY
4503 rxb->dma_addr =
4504 pci_map_single(priv->pci_dev, rxb->skb->data,
4505 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4506 list_add_tail(&rxb->list, &rxq->rx_free);
4507 rxq->free_count++;
4508 }
4509 spin_unlock_irqrestore(&rxq->lock, flags);
4510
4511 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 4512 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
4513 spin_unlock_irqrestore(&priv->lock, flags);
4514}
4515
4516/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 4517 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY
4518 * This free routine walks the list of POOL entries and if SKB is set to
4519 * non NULL it is unmapped and freed
4520 */
bb8c093b 4521static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
4522{
4523 int i;
4524 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4525 if (rxq->pool[i].skb != NULL) {
4526 pci_unmap_single(priv->pci_dev,
4527 rxq->pool[i].dma_addr,
4528 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4529 dev_kfree_skb(rxq->pool[i].skb);
4530 }
4531 }
4532
4533 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4534 rxq->dma_addr);
4535 rxq->bd = NULL;
4536}
4537
bb8c093b 4538int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
b481de9c 4539{
bb8c093b 4540 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
4541 struct pci_dev *dev = priv->pci_dev;
4542 int i;
4543
4544 spin_lock_init(&rxq->lock);
4545 INIT_LIST_HEAD(&rxq->rx_free);
4546 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
BC
4547
4548 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY
4549 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4550 if (!rxq->bd)
4551 return -ENOMEM;
6440adb5 4552
b481de9c
ZY
4553 /* Fill the rx_used queue with _all_ of the Rx buffers */
4554 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4555 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 4556
b481de9c
ZY
4557 /* Set us so that we have processed and used all buffers, but have
4558 * not restocked the Rx queue with fresh buffers */
4559 rxq->read = rxq->write = 0;
4560 rxq->free_count = 0;
4561 rxq->need_update = 0;
4562 return 0;
4563}
4564
bb8c093b 4565void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY
4566{
4567 unsigned long flags;
4568 int i;
4569 spin_lock_irqsave(&rxq->lock, flags);
4570 INIT_LIST_HEAD(&rxq->rx_free);
4571 INIT_LIST_HEAD(&rxq->rx_used);
4572 /* Fill the rx_used queue with _all_ of the Rx buffers */
4573 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4574 /* In the reset function, these buffers may have been allocated
4575 * to an SKB, so we need to unmap and free potential storage */
4576 if (rxq->pool[i].skb != NULL) {
4577 pci_unmap_single(priv->pci_dev,
4578 rxq->pool[i].dma_addr,
4579 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4580 priv->alloc_rxb_skb--;
4581 dev_kfree_skb(rxq->pool[i].skb);
4582 rxq->pool[i].skb = NULL;
4583 }
4584 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4585 }
4586
4587 /* Set us so that we have processed and used all buffers, but have
4588 * not restocked the Rx queue with fresh buffers */
4589 rxq->read = rxq->write = 0;
4590 rxq->free_count = 0;
4591 spin_unlock_irqrestore(&rxq->lock, flags);
4592}
4593
4594/* Convert linear signal-to-noise ratio into dB */
4595static u8 ratio2dB[100] = {
4596/* 0 1 2 3 4 5 6 7 8 9 */
4597 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4598 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4599 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4600 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4601 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4602 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4603 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4604 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4605 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4606 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4607};
4608
4609/* Calculates a relative dB value from a ratio of linear
4610 * (i.e. not dB) signal levels.
4611 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 4612int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 4613{
c899a575
AB
4614 /* 1000:1 or higher just report as 60 dB */
4615 if (sig_ratio >= 1000)
b481de9c
ZY
4616 return 60;
4617
c899a575 4618 /* 100:1 or higher, divide by 10 and use table,
b481de9c 4619 * add 20 dB to make up for divide by 10 */
c899a575 4620 if (sig_ratio >= 100)
b481de9c
ZY
4621 return (20 + (int)ratio2dB[sig_ratio/10]);
4622
4623 /* We shouldn't see this */
4624 if (sig_ratio < 1)
4625 return 0;
4626
4627 /* Use table for ratios 1:1 - 99:1 */
4628 return (int)ratio2dB[sig_ratio];
4629}
4630
4631#define PERFECT_RSSI (-20) /* dBm */
4632#define WORST_RSSI (-95) /* dBm */
4633#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4634
4635/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4636 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4637 * about formulas used below. */
bb8c093b 4638int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY
4639{
4640 int sig_qual;
4641 int degradation = PERFECT_RSSI - rssi_dbm;
4642
4643 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4644 * as indicator; formula is (signal dbm - noise dbm).
4645 * SNR at or above 40 is a great signal (100%).
4646 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4647 * Weakest usable signal is usually 10 - 15 dB SNR. */
4648 if (noise_dbm) {
4649 if (rssi_dbm - noise_dbm >= 40)
4650 return 100;
4651 else if (rssi_dbm < noise_dbm)
4652 return 0;
4653 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4654
4655 /* Else use just the signal level.
4656 * This formula is a least squares fit of data points collected and
4657 * compared with a reference system that had a percentage (%) display
4658 * for signal quality. */
4659 } else
4660 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4661 (15 * RSSI_RANGE + 62 * degradation)) /
4662 (RSSI_RANGE * RSSI_RANGE);
4663
4664 if (sig_qual > 100)
4665 sig_qual = 100;
4666 else if (sig_qual < 1)
4667 sig_qual = 0;
4668
4669 return sig_qual;
4670}
4671
4672/**
9fbab516 4673 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY
4674 *
4675 * Uses the priv->rx_handlers callback function array to invoke
4676 * the appropriate handlers, including command responses,
4677 * frame-received notifications, and other notifications.
4678 */
bb8c093b 4679static void iwl4965_rx_handle(struct iwl4965_priv *priv)
b481de9c 4680{
bb8c093b
CH
4681 struct iwl4965_rx_mem_buffer *rxb;
4682 struct iwl4965_rx_packet *pkt;
4683 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY
4684 u32 r, i;
4685 int reclaim;
4686 unsigned long flags;
4687
6440adb5
BC
4688 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4689 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 4690 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY
4691 i = rxq->read;
4692
4693 /* Rx interrupt, but nothing sent from uCode */
4694 if (i == r)
4695 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4696
4697 while (i != r) {
4698 rxb = rxq->queue[i];
4699
9fbab516 4700 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY
4701 * then a bug has been introduced in the queue refilling
4702 * routines -- catch it here */
4703 BUG_ON(rxb == NULL);
4704
4705 rxq->queue[i] = NULL;
4706
4707 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
4708 IWL_RX_BUF_SIZE,
4709 PCI_DMA_FROMDEVICE);
bb8c093b 4710 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY
4711
4712 /* Reclaim a command buffer only if this packet is a response
4713 * to a (driver-originated) command.
4714 * If the packet (e.g. Rx frame) originated from uCode,
4715 * there is no command buffer to reclaim.
4716 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4717 * but apparently a few don't get set; catch them here. */
4718 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4719 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4720 (pkt->hdr.cmd != REPLY_4965_RX) &&
cfe01709 4721 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY
4722 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4723 (pkt->hdr.cmd != REPLY_TX);
4724
4725 /* Based on type of command response or notification,
4726 * handle those that need handling via function in
bb8c093b 4727 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY
4728 if (priv->rx_handlers[pkt->hdr.cmd]) {
4729 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4730 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4731 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4732 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4733 } else {
4734 /* No handling needed */
4735 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4736 "r %d i %d No handler needed for %s, 0x%02x\n",
4737 r, i, get_cmd_string(pkt->hdr.cmd),
4738 pkt->hdr.cmd);
4739 }
4740
4741 if (reclaim) {
9fbab516
BC
4742 /* Invoke any callbacks, transfer the skb to caller, and
4743 * fire off the (possibly) blocking iwl4965_send_cmd()
b481de9c
ZY
4744 * as we reclaim the driver command queue */
4745 if (rxb && rxb->skb)
bb8c093b 4746 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY
4747 else
4748 IWL_WARNING("Claim null rxb?\n");
4749 }
4750
4751 /* For now we just don't re-use anything. We can tweak this
4752 * later to try and re-use notification packets and SKBs that
4753 * fail to Rx correctly */
4754 if (rxb->skb != NULL) {
4755 priv->alloc_rxb_skb--;
4756 dev_kfree_skb_any(rxb->skb);
4757 rxb->skb = NULL;
4758 }
4759
4760 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4761 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4762 spin_lock_irqsave(&rxq->lock, flags);
4763 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4764 spin_unlock_irqrestore(&rxq->lock, flags);
4765 i = (i + 1) & RX_QUEUE_MASK;
4766 }
4767
4768 /* Backtrack one entry */
4769 priv->rxq.read = i;
bb8c093b 4770 iwl4965_rx_queue_restock(priv);
b481de9c
ZY
4771}
4772
6440adb5
BC
4773/**
4774 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4775 */
bb8c093b
CH
4776static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
4777 struct iwl4965_tx_queue *txq)
b481de9c
ZY
4778{
4779 u32 reg = 0;
4780 int rc = 0;
4781 int txq_id = txq->q.id;
4782
4783 if (txq->need_update == 0)
4784 return rc;
4785
4786 /* if we're trying to save power */
4787 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4788 /* wake up nic if it's powered down ...
4789 * uCode will wake up, and interrupt us again, so next
4790 * time we'll skip this part. */
bb8c093b 4791 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY
4792
4793 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4794 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
bb8c093b 4795 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY
4796 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4797 return rc;
4798 }
4799
4800 /* restore this queue's parameters in nic hardware. */
bb8c093b 4801 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
4802 if (rc)
4803 return rc;
bb8c093b 4804 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4805 txq->q.write_ptr | (txq_id << 8));
bb8c093b 4806 iwl4965_release_nic_access(priv);
b481de9c
ZY
4807
4808 /* else not in power-save mode, uCode will never sleep when we're
4809 * trying to tx (during RFKILL, we're not trying to tx). */
4810 } else
bb8c093b 4811 iwl4965_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4812 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY
4813
4814 txq->need_update = 0;
4815
4816 return rc;
4817}
4818
c8b0e6e1 4819#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 4820static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4821{
0795af57
JP
4822 DECLARE_MAC_BUF(mac);
4823
b481de9c 4824 IWL_DEBUG_RADIO("RX CONFIG:\n");
bb8c093b 4825 iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY
4826 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4827 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4828 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4829 le32_to_cpu(rxon->filter_flags));
4830 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4831 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4832 rxon->ofdm_basic_rates);
4833 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP
4834 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4835 print_mac(mac, rxon->node_addr));
4836 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4837 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY
4838 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4839}
4840#endif
4841
bb8c093b 4842static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
b481de9c
ZY
4843{
4844 IWL_DEBUG_ISR("Enabling interrupts\n");
4845 set_bit(STATUS_INT_ENABLED, &priv->status);
bb8c093b 4846 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY
4847}
4848
bb8c093b 4849static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
b481de9c
ZY
4850{
4851 clear_bit(STATUS_INT_ENABLED, &priv->status);
4852
4853 /* disable interrupts from uCode/NIC to host */
bb8c093b 4854 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
4855
4856 /* acknowledge/clear/reset any interrupts still pending
4857 * from uCode or flow handler (Rx/Tx DMA) */
bb8c093b
CH
4858 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4859 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY
4860 IWL_DEBUG_ISR("Disabled interrupts\n");
4861}
4862
4863static const char *desc_lookup(int i)
4864{
4865 switch (i) {
4866 case 1:
4867 return "FAIL";
4868 case 2:
4869 return "BAD_PARAM";
4870 case 3:
4871 return "BAD_CHECKSUM";
4872 case 4:
4873 return "NMI_INTERRUPT";
4874 case 5:
4875 return "SYSASSERT";
4876 case 6:
4877 return "FATAL_ERROR";
4878 }
4879
4880 return "UNKNOWN";
4881}
4882
4883#define ERROR_START_OFFSET (1 * sizeof(u32))
4884#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4885
bb8c093b 4886static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
b481de9c
ZY
4887{
4888 u32 data2, line;
4889 u32 desc, time, count, base, data1;
4890 u32 blink1, blink2, ilink1, ilink2;
4891 int rc;
4892
4893 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4894
bb8c093b 4895 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY
4896 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4897 return;
4898 }
4899
bb8c093b 4900 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
4901 if (rc) {
4902 IWL_WARNING("Can not read from adapter at this time.\n");
4903 return;
4904 }
4905
bb8c093b 4906 count = iwl4965_read_targ_mem(priv, base);
b481de9c
ZY
4907
4908 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4909 IWL_ERROR("Start IWL Error Log Dump:\n");
4910 IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
4911 priv->status, priv->config, count);
4912 }
4913
bb8c093b
CH
4914 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4915 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4916 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4917 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4918 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4919 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4920 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4921 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4922 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY
4923
4924 IWL_ERROR("Desc Time "
4925 "data1 data2 line\n");
4926 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4927 desc_lookup(desc), desc, time, data1, data2, line);
4928 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4929 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4930 ilink1, ilink2);
4931
bb8c093b 4932 iwl4965_release_nic_access(priv);
b481de9c
ZY
4933}
4934
4935#define EVENT_START_OFFSET (4 * sizeof(u32))
4936
4937/**
bb8c093b 4938 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4939 *
bb8c093b 4940 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
b481de9c 4941 */
bb8c093b 4942static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
b481de9c
ZY
4943 u32 num_events, u32 mode)
4944{
4945 u32 i;
4946 u32 base; /* SRAM byte address of event log header */
4947 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4948 u32 ptr; /* SRAM byte address of log data */
4949 u32 ev, time, data; /* event log data */
4950
4951 if (num_events == 0)
4952 return;
4953
4954 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4955
4956 if (mode == 0)
4957 event_size = 2 * sizeof(u32);
4958 else
4959 event_size = 3 * sizeof(u32);
4960
4961 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4962
4963 /* "time" is actually "data" for mode 0 (no timestamp).
4964 * place event id # at far right for easier visual parsing. */
4965 for (i = 0; i < num_events; i++) {
bb8c093b 4966 ev = iwl4965_read_targ_mem(priv, ptr);
b481de9c 4967 ptr += sizeof(u32);
bb8c093b 4968 time = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY
4969 ptr += sizeof(u32);
4970 if (mode == 0)
4971 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4972 else {
bb8c093b 4973 data = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY
4974 ptr += sizeof(u32);
4975 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4976 }
4977 }
4978}
4979
bb8c093b 4980static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
b481de9c
ZY
4981{
4982 int rc;
4983 u32 base; /* SRAM byte address of event log header */
4984 u32 capacity; /* event log capacity in # entries */
4985 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4986 u32 num_wraps; /* # times uCode wrapped to top of log */
4987 u32 next_entry; /* index of next entry to be written by uCode */
4988 u32 size; /* # entries that we'll print */
4989
4990 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 4991 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY
4992 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4993 return;
4994 }
4995
bb8c093b 4996 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
4997 if (rc) {
4998 IWL_WARNING("Can not read from adapter at this time.\n");
4999 return;
5000 }
5001
5002 /* event log header */
bb8c093b
CH
5003 capacity = iwl4965_read_targ_mem(priv, base);
5004 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
5005 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
5006 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY
5007
5008 size = num_wraps ? capacity : next_entry;
5009
5010 /* bail out if nothing in log */
5011 if (size == 0) {
583fab37 5012 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
bb8c093b 5013 iwl4965_release_nic_access(priv);
b481de9c
ZY
5014 return;
5015 }
5016
583fab37 5017 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY
5018 size, num_wraps);
5019
5020 /* if uCode has wrapped back to top of log, start at the oldest entry,
5021 * i.e the next one that uCode would fill. */
5022 if (num_wraps)
bb8c093b 5023 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY
5024 capacity - next_entry, mode);
5025
5026 /* (then/else) start at top of log */
bb8c093b 5027 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 5028
bb8c093b 5029 iwl4965_release_nic_access(priv);
b481de9c
ZY
5030}
5031
5032/**
bb8c093b 5033 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 5034 */
bb8c093b 5035static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
b481de9c 5036{
bb8c093b 5037 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY
5038 set_bit(STATUS_FW_ERROR, &priv->status);
5039
5040 /* Cancel currently queued command. */
5041 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
5042
c8b0e6e1 5043#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH
5044 if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
5045 iwl4965_dump_nic_error_log(priv);
5046 iwl4965_dump_nic_event_log(priv);
5047 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY
5048 }
5049#endif
5050
5051 wake_up_interruptible(&priv->wait_command_queue);
5052
5053 /* Keep the restart process from trying to send host
5054 * commands by clearing the INIT status bit */
5055 clear_bit(STATUS_READY, &priv->status);
5056
5057 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5058 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
5059 "Restarting adapter due to uCode error.\n");
5060
bb8c093b 5061 if (iwl4965_is_associated(priv)) {
b481de9c
ZY
5062 memcpy(&priv->recovery_rxon, &priv->active_rxon,
5063 sizeof(priv->recovery_rxon));
5064 priv->error_recovering = 1;
5065 }
5066 queue_work(priv->workqueue, &priv->restart);
5067 }
5068}
5069
bb8c093b 5070static void iwl4965_error_recovery(struct iwl4965_priv *priv)
b481de9c
ZY
5071{
5072 unsigned long flags;
5073
5074 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
5075 sizeof(priv->staging_rxon));
5076 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 5077 iwl4965_commit_rxon(priv);
b481de9c 5078
bb8c093b 5079 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY
5080
5081 spin_lock_irqsave(&priv->lock, flags);
5082 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
5083 priv->error_recovering = 0;
5084 spin_unlock_irqrestore(&priv->lock, flags);
5085}
5086
bb8c093b 5087static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
b481de9c
ZY
5088{
5089 u32 inta, handled = 0;
5090 u32 inta_fh;
5091 unsigned long flags;
c8b0e6e1 5092#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY
5093 u32 inta_mask;
5094#endif
5095
5096 spin_lock_irqsave(&priv->lock, flags);
5097
5098 /* Ack/clear/reset pending uCode interrupts.
5099 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
5100 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
bb8c093b
CH
5101 inta = iwl4965_read32(priv, CSR_INT);
5102 iwl4965_write32(priv, CSR_INT, inta);
b481de9c
ZY
5103
5104 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
5105 * Any new interrupts that happen after this, either while we're
5106 * in this tasklet, or later, will show up in next ISR/tasklet. */
bb8c093b
CH
5107 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
5108 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 5109
c8b0e6e1 5110#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 5111 if (iwl4965_debug_level & IWL_DL_ISR) {
9fbab516
BC
5112 /* just for debug */
5113 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
b481de9c
ZY
5114 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5115 inta, inta_mask, inta_fh);
5116 }
5117#endif
5118
5119 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
5120 * atomic, make sure that inta covers all the interrupts that
5121 * we've discovered, even if FH interrupt came in just after
5122 * reading CSR_INT. */
5123 if (inta_fh & CSR_FH_INT_RX_MASK)
5124 inta |= CSR_INT_BIT_FH_RX;
5125 if (inta_fh & CSR_FH_INT_TX_MASK)
5126 inta |= CSR_INT_BIT_FH_TX;
5127
5128 /* Now service all interrupt bits discovered above. */
5129 if (inta & CSR_INT_BIT_HW_ERR) {
5130 IWL_ERROR("Microcode HW error detected. Restarting.\n");
5131
5132 /* Tell the device to stop sending interrupts */
bb8c093b 5133 iwl4965_disable_interrupts(priv);
b481de9c 5134
bb8c093b 5135 iwl4965_irq_handle_error(priv);
b481de9c
ZY
5136
5137 handled |= CSR_INT_BIT_HW_ERR;
5138
5139 spin_unlock_irqrestore(&priv->lock, flags);
5140
5141 return;
5142 }
5143
c8b0e6e1 5144#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 5145 if (iwl4965_debug_level & (IWL_DL_ISR)) {
b481de9c
ZY
5146 /* NIC fires this, but we don't use it, redundant with WAKEUP */
5147 if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
5148 IWL_DEBUG_ISR("Microcode started or stopped.\n");
5149
5150 /* Alive notification via Rx interrupt will do the real work */
5151 if (inta & CSR_INT_BIT_ALIVE)
5152 IWL_DEBUG_ISR("Alive interrupt\n");
5153 }
5154#endif
5155 /* Safely ignore these bits for debug checks below */
5156 inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
5157
9fbab516 5158 /* HW RF KILL switch toggled */
b481de9c
ZY
5159 if (inta & CSR_INT_BIT_RF_KILL) {
5160 int hw_rf_kill = 0;
bb8c093b 5161 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
5162 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
5163 hw_rf_kill = 1;
5164
5165 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
5166 "RF_KILL bit toggled to %s.\n",
5167 hw_rf_kill ? "disable radio":"enable radio");
5168
5169 /* Queue restart only if RF_KILL switch was set to "kill"
5170 * when we loaded driver, and is now set to "enable".
5171 * After we're Alive, RF_KILL gets handled by
5172 * iwl_rx_card_state_notif() */
53e49093
ZY
5173 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
5174 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 5175 queue_work(priv->workqueue, &priv->restart);
53e49093 5176 }
b481de9c
ZY
5177
5178 handled |= CSR_INT_BIT_RF_KILL;
5179 }
5180
9fbab516 5181 /* Chip got too hot and stopped itself */
b481de9c
ZY
5182 if (inta & CSR_INT_BIT_CT_KILL) {
5183 IWL_ERROR("Microcode CT kill error detected.\n");
5184 handled |= CSR_INT_BIT_CT_KILL;
5185 }
5186
5187 /* Error detected by uCode */
5188 if (inta & CSR_INT_BIT_SW_ERR) {
5189 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
5190 inta);
bb8c093b 5191 iwl4965_irq_handle_error(priv);
b481de9c
ZY
5192 handled |= CSR_INT_BIT_SW_ERR;
5193 }
5194
5195 /* uCode wakes up after power-down sleep */
5196 if (inta & CSR_INT_BIT_WAKEUP) {
5197 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH
5198 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
5199 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
5200 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
5201 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
5202 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
5203 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
5204 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY
5205
5206 handled |= CSR_INT_BIT_WAKEUP;
5207 }
5208
5209 /* All uCode command responses, including Tx command responses,
5210 * Rx "responses" (frame-received notification), and other
5211 * notifications from uCode come through here*/
5212 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 5213 iwl4965_rx_handle(priv);
b481de9c
ZY
5214 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
5215 }
5216
5217 if (inta & CSR_INT_BIT_FH_TX) {
5218 IWL_DEBUG_ISR("Tx interrupt\n");
5219 handled |= CSR_INT_BIT_FH_TX;
5220 }
5221
5222 if (inta & ~handled)
5223 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
5224
5225 if (inta & ~CSR_INI_SET_MASK) {
5226 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
5227 inta & ~CSR_INI_SET_MASK);
5228 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
5229 }
5230
5231 /* Re-enable all interrupts */
bb8c093b 5232 iwl4965_enable_interrupts(priv);
b481de9c 5233
c8b0e6e1 5234#ifdef CONFIG_IWL4965_DEBUG
bb8c093b
CH
5235 if (iwl4965_debug_level & (IWL_DL_ISR)) {
5236 inta = iwl4965_read32(priv, CSR_INT);
5237 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
5238 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
5239 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
5240 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
5241 }
5242#endif
5243 spin_unlock_irqrestore(&priv->lock, flags);
5244}
5245
bb8c093b 5246static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 5247{
bb8c093b 5248 struct iwl4965_priv *priv = data;
b481de9c
ZY
5249 u32 inta, inta_mask;
5250 u32 inta_fh;
5251 if (!priv)
5252 return IRQ_NONE;
5253
5254 spin_lock(&priv->lock);
5255
5256 /* Disable (but don't clear!) interrupts here to avoid
5257 * back-to-back ISRs and sporadic interrupts from our NIC.
5258 * If we have something to service, the tasklet will re-enable ints.
5259 * If we *don't* have something, we'll re-enable before leaving here. */
bb8c093b
CH
5260 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
5261 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY
5262
5263 /* Discover which interrupts are active/pending */
bb8c093b
CH
5264 inta = iwl4965_read32(priv, CSR_INT);
5265 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY
5266
5267 /* Ignore interrupt if there's nothing in NIC to service.
5268 * This may be due to IRQ shared with another device,
5269 * or due to sporadic interrupts thrown from our NIC. */
5270 if (!inta && !inta_fh) {
5271 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5272 goto none;
5273 }
5274
5275 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON
5276 /* Hardware disappeared. It might have already raised
5277 * an interrupt */
b481de9c 5278 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 5279 goto unplugged;
b481de9c
ZY
5280 }
5281
5282 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
5283 inta, inta_mask, inta_fh);
5284
bb8c093b 5285 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
b481de9c 5286 tasklet_schedule(&priv->irq_tasklet);
b481de9c 5287
66fbb541
ON
5288 unplugged:
5289 spin_unlock(&priv->lock);
b481de9c
ZY
5290 return IRQ_HANDLED;
5291
5292 none:
5293 /* re-enable interrupts here since we don't have anything to service. */
bb8c093b 5294 iwl4965_enable_interrupts(priv);
b481de9c
ZY
5295 spin_unlock(&priv->lock);
5296 return IRQ_NONE;
5297}
5298
5299/************************** EEPROM BANDS ****************************
5300 *
bb8c093b 5301 * The iwl4965_eeprom_band definitions below provide the mapping from the
b481de9c
ZY
5302 * EEPROM contents to the specific channel number supported for each
5303 * band.
5304 *
bb8c093b 5305 * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
b481de9c
ZY
5306 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5307 * The specific geography and calibration information for that channel
5308 * is contained in the eeprom map itself.
5309 *
5310 * During init, we copy the eeprom information and channel map
5311 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5312 *
5313 * channel_map_24/52 provides the index in the channel_info array for a
5314 * given channel. We have to have two separate maps as there is channel
5315 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5316 * band_2
5317 *
5318 * A value of 0xff stored in the channel_map indicates that the channel
5319 * is not supported by the hardware at all.
5320 *
5321 * A value of 0xfe in the channel_map indicates that the channel is not
5322 * valid for Tx with the current hardware. This means that
5323 * while the system can tune and receive on a given channel, it may not
5324 * be able to associate or transmit any frames on that
5325 * channel. There is no corresponding channel information for that
5326 * entry.
5327 *
5328 *********************************************************************/
5329
5330/* 2.4 GHz */
bb8c093b 5331static const u8 iwl4965_eeprom_band_1[14] = {
b481de9c
ZY
5332 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5333};
5334
5335/* 5.2 GHz bands */
9fbab516 5336static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
b481de9c
ZY
5337 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5338};
5339
9fbab516 5340static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
b481de9c
ZY
5341 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5342};
5343
bb8c093b 5344static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
b481de9c
ZY
5345 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5346};
5347
bb8c093b 5348static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
b481de9c
ZY
5349 145, 149, 153, 157, 161, 165
5350};
5351
bb8c093b 5352static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
b481de9c
ZY
5353 1, 2, 3, 4, 5, 6, 7
5354};
5355
bb8c093b 5356static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
b481de9c
ZY
5357 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5358};
5359
9fbab516
BC
5360static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
5361 int band,
b481de9c 5362 int *eeprom_ch_count,
bb8c093b 5363 const struct iwl4965_eeprom_channel
b481de9c
ZY
5364 **eeprom_ch_info,
5365 const u8 **eeprom_ch_index)
5366{
5367 switch (band) {
5368 case 1: /* 2.4GHz band */
bb8c093b 5369 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
b481de9c 5370 *eeprom_ch_info = priv->eeprom.band_1_channels;
bb8c093b 5371 *eeprom_ch_index = iwl4965_eeprom_band_1;
b481de9c 5372 break;
9fbab516 5373 case 2: /* 4.9GHz band */
bb8c093b 5374 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
b481de9c 5375 *eeprom_ch_info = priv->eeprom.band_2_channels;
bb8c093b 5376 *eeprom_ch_index = iwl4965_eeprom_band_2;
b481de9c
ZY
5377 break;
5378 case 3: /* 5.2GHz band */
bb8c093b 5379 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
b481de9c 5380 *eeprom_ch_info = priv->eeprom.band_3_channels;
bb8c093b 5381 *eeprom_ch_index = iwl4965_eeprom_band_3;
b481de9c 5382 break;
9fbab516 5383 case 4: /* 5.5GHz band */
bb8c093b 5384 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
b481de9c 5385 *eeprom_ch_info = priv->eeprom.band_4_channels;
bb8c093b 5386 *eeprom_ch_index = iwl4965_eeprom_band_4;
b481de9c 5387 break;
9fbab516 5388 case 5: /* 5.7GHz band */
bb8c093b 5389 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c 5390 *eeprom_ch_info = priv->eeprom.band_5_channels;
bb8c093b 5391 *eeprom_ch_index = iwl4965_eeprom_band_5;
b481de9c 5392 break;
9fbab516 5393 case 6: /* 2.4GHz FAT channels */
bb8c093b 5394 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
b481de9c 5395 *eeprom_ch_info = priv->eeprom.band_24_channels;
bb8c093b 5396 *eeprom_ch_index = iwl4965_eeprom_band_6;
b481de9c 5397 break;
9fbab516 5398 case 7: /* 5 GHz FAT channels */
bb8c093b 5399 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
b481de9c 5400 *eeprom_ch_info = priv->eeprom.band_52_channels;
bb8c093b 5401 *eeprom_ch_index = iwl4965_eeprom_band_7;
b481de9c
ZY
5402 break;
5403 default:
5404 BUG();
5405 return;
5406 }
5407}
5408
6440adb5
BC
5409/**
5410 * iwl4965_get_channel_info - Find driver's private channel info
5411 *
5412 * Based on band and channel number.
5413 */
bb8c093b 5414const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
b481de9c
ZY
5415 int phymode, u16 channel)
5416{
5417 int i;
5418
5419 switch (phymode) {
5420 case MODE_IEEE80211A:
5421 for (i = 14; i < priv->channel_count; i++) {
5422 if (priv->channel_info[i].channel == channel)
5423 return &priv->channel_info[i];
5424 }
5425 break;
5426
5427 case MODE_IEEE80211B:
5428 case MODE_IEEE80211G:
5429 if (channel >= 1 && channel <= 14)
5430 return &priv->channel_info[channel - 1];
5431 break;
5432
5433 }
5434
5435 return NULL;
5436}
5437
5438#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5439 ? # x " " : "")
5440
6440adb5
BC
5441/**
5442 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5443 */
bb8c093b 5444static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
b481de9c
ZY
5445{
5446 int eeprom_ch_count = 0;
5447 const u8 *eeprom_ch_index = NULL;
bb8c093b 5448 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
b481de9c 5449 int band, ch;
bb8c093b 5450 struct iwl4965_channel_info *ch_info;
b481de9c
ZY
5451
5452 if (priv->channel_count) {
5453 IWL_DEBUG_INFO("Channel map already initialized.\n");
5454 return 0;
5455 }
5456
5457 if (priv->eeprom.version < 0x2f) {
5458 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5459 priv->eeprom.version);
5460 return -EINVAL;
5461 }
5462
5463 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5464
5465 priv->channel_count =
bb8c093b
CH
5466 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5467 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5468 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5469 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5470 ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c
ZY
5471
5472 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5473
bb8c093b 5474 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
b481de9c
ZY
5475 priv->channel_count, GFP_KERNEL);
5476 if (!priv->channel_info) {
5477 IWL_ERROR("Could not allocate channel_info\n");
5478 priv->channel_count = 0;
5479 return -ENOMEM;
5480 }
5481
5482 ch_info = priv->channel_info;
5483
5484 /* Loop through the 5 EEPROM bands adding them in order to the
5485 * channel map we maintain (that contains additional information than
5486 * what just in the EEPROM) */
5487 for (band = 1; band <= 5; band++) {
5488
bb8c093b 5489 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY
5490 &eeprom_ch_info, &eeprom_ch_index);
5491
5492 /* Loop through each band adding each of the channels */
5493 for (ch = 0; ch < eeprom_ch_count; ch++) {
5494 ch_info->channel = eeprom_ch_index[ch];
5495 ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
5496 MODE_IEEE80211A;
5497
5498 /* permanently store EEPROM's channel regulatory flags
5499 * and max power in channel info database. */
5500 ch_info->eeprom = eeprom_ch_info[ch];
5501
5502 /* Copy the run-time flags so they are there even on
5503 * invalid channels */
5504 ch_info->flags = eeprom_ch_info[ch].flags;
5505
5506 if (!(is_channel_valid(ch_info))) {
5507 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5508 "No traffic\n",
5509 ch_info->channel,
5510 ch_info->flags,
5511 is_channel_a_band(ch_info) ?
5512 "5.2" : "2.4");
5513 ch_info++;
5514 continue;
5515 }
5516
5517 /* Initialize regulatory-based run-time data */
5518 ch_info->max_power_avg = ch_info->curr_txpow =
5519 eeprom_ch_info[ch].max_power_avg;
5520 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5521 ch_info->min_power = 0;
5522
5523 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
5524 " %ddBm): Ad-Hoc %ssupported\n",
5525 ch_info->channel,
5526 is_channel_a_band(ch_info) ?
5527 "5.2" : "2.4",
5528 CHECK_AND_PRINT(IBSS),
5529 CHECK_AND_PRINT(ACTIVE),
5530 CHECK_AND_PRINT(RADAR),
5531 CHECK_AND_PRINT(WIDE),
5532 CHECK_AND_PRINT(NARROW),
5533 CHECK_AND_PRINT(DFS),
5534 eeprom_ch_info[ch].flags,
5535 eeprom_ch_info[ch].max_power_avg,
5536 ((eeprom_ch_info[ch].
5537 flags & EEPROM_CHANNEL_IBSS)
5538 && !(eeprom_ch_info[ch].
5539 flags & EEPROM_CHANNEL_RADAR))
5540 ? "" : "not ");
5541
5542 /* Set the user_txpower_limit to the highest power
5543 * supported by any channel */
5544 if (eeprom_ch_info[ch].max_power_avg >
5545 priv->user_txpower_limit)
5546 priv->user_txpower_limit =
5547 eeprom_ch_info[ch].max_power_avg;
5548
5549 ch_info++;
5550 }
5551 }
5552
6440adb5 5553 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
b481de9c
ZY
5554 for (band = 6; band <= 7; band++) {
5555 int phymode;
5556 u8 fat_extension_chan;
5557
bb8c093b 5558 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY
5559 &eeprom_ch_info, &eeprom_ch_index);
5560
6440adb5 5561 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
b481de9c 5562 phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
6440adb5 5563
b481de9c
ZY
5564 /* Loop through each band adding each of the channels */
5565 for (ch = 0; ch < eeprom_ch_count; ch++) {
5566
5567 if ((band == 6) &&
5568 ((eeprom_ch_index[ch] == 5) ||
5569 (eeprom_ch_index[ch] == 6) ||
5570 (eeprom_ch_index[ch] == 7)))
5571 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5572 else
5573 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5574
6440adb5 5575 /* Set up driver's info for lower half */
b481de9c
ZY
5576 iwl4965_set_fat_chan_info(priv, phymode,
5577 eeprom_ch_index[ch],
5578 &(eeprom_ch_info[ch]),
5579 fat_extension_chan);
5580
6440adb5 5581 /* Set up driver's info for upper half */
b481de9c
ZY
5582 iwl4965_set_fat_chan_info(priv, phymode,
5583 (eeprom_ch_index[ch] + 4),
5584 &(eeprom_ch_info[ch]),
5585 HT_IE_EXT_CHANNEL_BELOW);
5586 }
5587 }
5588
5589 return 0;
5590}
5591
5592/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5593 * sending probe req. This should be set long enough to hear probe responses
5594 * from more than one AP. */
5595#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5596#define IWL_ACTIVE_DWELL_TIME_52 (10)
5597
5598/* For faster active scanning, scan will move to the next channel if fewer than
5599 * PLCP_QUIET_THRESH packets are heard on this channel within
5600 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5601 * time if it's a quiet channel (nothing responded to our probe, and there's
5602 * no other traffic).
5603 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5604#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5605#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5606
5607/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5608 * Must be set longer than active dwell time.
5609 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5610#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5611#define IWL_PASSIVE_DWELL_TIME_52 (10)
5612#define IWL_PASSIVE_DWELL_BASE (100)
5613#define IWL_CHANNEL_TUNE_TIME 5
5614
bb8c093b 5615static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
b481de9c
ZY
5616{
5617 if (phymode == MODE_IEEE80211A)
5618 return IWL_ACTIVE_DWELL_TIME_52;
5619 else
5620 return IWL_ACTIVE_DWELL_TIME_24;
5621}
5622
bb8c093b 5623static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
b481de9c 5624{
bb8c093b 5625 u16 active = iwl4965_get_active_dwell_time(priv, phymode);
b481de9c
ZY
5626 u16 passive = (phymode != MODE_IEEE80211A) ?
5627 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5628 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5629
bb8c093b 5630 if (iwl4965_is_associated(priv)) {
b481de9c
ZY
5631 /* If we're associated, we clamp the maximum passive
5632 * dwell time to be 98% of the beacon interval (minus
5633 * 2 * channel tune time) */
5634 passive = priv->beacon_int;
5635 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5636 passive = IWL_PASSIVE_DWELL_BASE;
5637 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5638 }
5639
5640 if (passive <= active)
5641 passive = active + 1;
5642
5643 return passive;
5644}
5645
bb8c093b 5646static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
b481de9c 5647 u8 is_active, u8 direct_mask,
bb8c093b 5648 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY
5649{
5650 const struct ieee80211_channel *channels = NULL;
5651 const struct ieee80211_hw_mode *hw_mode;
bb8c093b 5652 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY
5653 u16 passive_dwell = 0;
5654 u16 active_dwell = 0;
5655 int added, i;
5656
bb8c093b 5657 hw_mode = iwl4965_get_hw_mode(priv, phymode);
b481de9c
ZY
5658 if (!hw_mode)
5659 return 0;
5660
5661 channels = hw_mode->channels;
5662
bb8c093b
CH
5663 active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
5664 passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
b481de9c
ZY
5665
5666 for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
5667 if (channels[i].chan ==
5668 le16_to_cpu(priv->active_rxon.channel)) {
bb8c093b 5669 if (iwl4965_is_associated(priv)) {
b481de9c
ZY
5670 IWL_DEBUG_SCAN
5671 ("Skipping current channel %d\n",
5672 le16_to_cpu(priv->active_rxon.channel));
5673 continue;
5674 }
5675 } else if (priv->only_active_channel)
5676 continue;
5677
5678 scan_ch->channel = channels[i].chan;
5679
9fbab516
BC
5680 ch_info = iwl4965_get_channel_info(priv, phymode,
5681 scan_ch->channel);
b481de9c
ZY
5682 if (!is_channel_valid(ch_info)) {
5683 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5684 scan_ch->channel);
5685 continue;
5686 }
5687
5688 if (!is_active || is_channel_passive(ch_info) ||
5689 !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
5690 scan_ch->type = 0; /* passive */
5691 else
5692 scan_ch->type = 1; /* active */
5693
5694 if (scan_ch->type & 1)
5695 scan_ch->type |= (direct_mask << 1);
5696
5697 if (is_channel_narrow(ch_info))
5698 scan_ch->type |= (1 << 7);
5699
5700 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5701 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5702
9fbab516 5703 /* Set txpower levels to defaults */
b481de9c
ZY
5704 scan_ch->tpc.dsp_atten = 110;
5705 /* scan_pwr_info->tpc.dsp_atten; */
5706
5707 /*scan_pwr_info->tpc.tx_gain; */
5708 if (phymode == MODE_IEEE80211A)
5709 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5710 else {
5711 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5712 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516
BC
5713 * power level:
5714 * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
b481de9c
ZY
5715 */
5716 }
5717
5718 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5719 scan_ch->channel,
5720 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5721 (scan_ch->type & 1) ?
5722 active_dwell : passive_dwell);
5723
5724 scan_ch++;
5725 added++;
5726 }
5727
5728 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5729 return added;
5730}
5731
bb8c093b 5732static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
b481de9c
ZY
5733{
5734 int i, j;
5735 for (i = 0; i < 3; i++) {
5736 struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
5737 for (j = 0; j < hw_mode->num_channels; j++)
5738 hw_mode->channels[j].flag = hw_mode->channels[j].val;
5739 }
5740}
5741
bb8c093b 5742static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
b481de9c
ZY
5743 struct ieee80211_rate *rates)
5744{
5745 int i;
5746
5747 for (i = 0; i < IWL_RATE_COUNT; i++) {
bb8c093b 5748 rates[i].rate = iwl4965_rates[i].ieee * 5;
b481de9c
ZY
5749 rates[i].val = i; /* Rate scaling will work on indexes */
5750 rates[i].val2 = i;
5751 rates[i].flags = IEEE80211_RATE_SUPPORTED;
5752 /* Only OFDM have the bits-per-symbol set */
5753 if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
5754 rates[i].flags |= IEEE80211_RATE_OFDM;
5755 else {
5756 /*
5757 * If CCK 1M then set rate flag to CCK else CCK_2
5758 * which is CCK | PREAMBLE2
5759 */
bb8c093b 5760 rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
b481de9c
ZY
5761 IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
5762 }
5763
5764 /* Set up which ones are basic rates... */
5765 if (IWL_BASIC_RATES_MASK & (1 << i))
5766 rates[i].flags |= IEEE80211_RATE_BASIC;
5767 }
b481de9c
ZY
5768}
5769
5770/**
bb8c093b 5771 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 5772 */
bb8c093b 5773static int iwl4965_init_geos(struct iwl4965_priv *priv)
b481de9c 5774{
bb8c093b 5775 struct iwl4965_channel_info *ch;
b481de9c
ZY
5776 struct ieee80211_hw_mode *modes;
5777 struct ieee80211_channel *channels;
5778 struct ieee80211_channel *geo_ch;
5779 struct ieee80211_rate *rates;
5780 int i = 0;
5781 enum {
5782 A = 0,
5783 B = 1,
5784 G = 2,
5785 A_11N = 3,
5786 G_11N = 4,
5787 };
5788 int mode_count = 5;
5789
5790 if (priv->modes) {
5791 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5792 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5793 return 0;
5794 }
5795
5796 modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
5797 GFP_KERNEL);
5798 if (!modes)
5799 return -ENOMEM;
5800
5801 channels = kzalloc(sizeof(struct ieee80211_channel) *
5802 priv->channel_count, GFP_KERNEL);
5803 if (!channels) {
5804 kfree(modes);
5805 return -ENOMEM;
5806 }
5807
5808 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
5809 GFP_KERNEL);
5810 if (!rates) {
5811 kfree(modes);
5812 kfree(channels);
5813 return -ENOMEM;
5814 }
5815
5816 /* 0 = 802.11a
5817 * 1 = 802.11b
5818 * 2 = 802.11g
5819 */
5820
5821 /* 5.2GHz channels start after the 2.4GHz channels */
5822 modes[A].mode = MODE_IEEE80211A;
bb8c093b 5823 modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
b481de9c
ZY
5824 modes[A].rates = rates;
5825 modes[A].num_rates = 8; /* just OFDM */
5826 modes[A].rates = &rates[4];
5827 modes[A].num_channels = 0;
5828
5829 modes[B].mode = MODE_IEEE80211B;
5830 modes[B].channels = channels;
5831 modes[B].rates = rates;
5832 modes[B].num_rates = 4; /* just CCK */
5833 modes[B].num_channels = 0;
5834
5835 modes[G].mode = MODE_IEEE80211G;
5836 modes[G].channels = channels;
5837 modes[G].rates = rates;
5838 modes[G].num_rates = 12; /* OFDM & CCK */
5839 modes[G].num_channels = 0;
5840
5841 modes[G_11N].mode = MODE_IEEE80211G;
5842 modes[G_11N].channels = channels;
5843 modes[G_11N].num_rates = 13; /* OFDM & CCK */
5844 modes[G_11N].rates = rates;
5845 modes[G_11N].num_channels = 0;
5846
5847 modes[A_11N].mode = MODE_IEEE80211A;
bb8c093b 5848 modes[A_11N].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
b481de9c
ZY
5849 modes[A_11N].rates = &rates[4];
5850 modes[A_11N].num_rates = 9; /* just OFDM */
5851 modes[A_11N].num_channels = 0;
5852
5853 priv->ieee_channels = channels;
5854 priv->ieee_rates = rates;
5855
bb8c093b 5856 iwl4965_init_hw_rates(priv, rates);
b481de9c
ZY
5857
5858 for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
5859 ch = &priv->channel_info[i];
5860
5861 if (!is_channel_valid(ch)) {
5862 IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
5863 "skipping.\n",
5864 ch->channel, is_channel_a_band(ch) ?
5865 "5.2" : "2.4");
5866 continue;
5867 }
5868
5869 if (is_channel_a_band(ch)) {
5870 geo_ch = &modes[A].channels[modes[A].num_channels++];
5871 modes[A_11N].num_channels++;
5872 } else {
5873 geo_ch = &modes[B].channels[modes[B].num_channels++];
5874 modes[G].num_channels++;
5875 modes[G_11N].num_channels++;
5876 }
5877
5878 geo_ch->freq = ieee80211chan2mhz(ch->channel);
5879 geo_ch->chan = ch->channel;
5880 geo_ch->power_level = ch->max_power_avg;
5881 geo_ch->antenna_max = 0xff;
5882
5883 if (is_channel_valid(ch)) {
5884 geo_ch->flag = IEEE80211_CHAN_W_SCAN;
5885 if (ch->flags & EEPROM_CHANNEL_IBSS)
5886 geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
5887
5888 if (ch->flags & EEPROM_CHANNEL_ACTIVE)
5889 geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
5890
5891 if (ch->flags & EEPROM_CHANNEL_RADAR)
5892 geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
5893
5894 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5895 priv->max_channel_txpower_limit =
5896 ch->max_power_avg;
5897 }
5898
5899 geo_ch->val = geo_ch->flag;
5900 }
5901
5902 if ((modes[A].num_channels == 0) && priv->is_abg) {
5903 printk(KERN_INFO DRV_NAME
5904 ": Incorrectly detected BG card as ABG. Please send "
5905 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5906 priv->pci_dev->device, priv->pci_dev->subsystem_device);
5907 priv->is_abg = 0;
5908 }
5909
5910 printk(KERN_INFO DRV_NAME
5911 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
5912 modes[G].num_channels, modes[A].num_channels);
5913
5914 /*
5915 * NOTE: We register these in preference of order -- the
5916 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
5917 * a phymode based on rates or AP capabilities but seems to
5918 * configure it purely on if the channel being configured
5919 * is supported by a mode -- and the first match is taken
5920 */
5921
5922 if (modes[G].num_channels)
5923 ieee80211_register_hwmode(priv->hw, &modes[G]);
5924 if (modes[B].num_channels)
5925 ieee80211_register_hwmode(priv->hw, &modes[B]);
5926 if (modes[A].num_channels)
5927 ieee80211_register_hwmode(priv->hw, &modes[A]);
5928
5929 priv->modes = modes;
5930 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5931
5932 return 0;
5933}
5934
5935/******************************************************************************
5936 *
5937 * uCode download functions
5938 *
5939 ******************************************************************************/
5940
bb8c093b 5941static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
b481de9c
ZY
5942{
5943 if (priv->ucode_code.v_addr != NULL) {
5944 pci_free_consistent(priv->pci_dev,
5945 priv->ucode_code.len,
5946 priv->ucode_code.v_addr,
5947 priv->ucode_code.p_addr);
5948 priv->ucode_code.v_addr = NULL;
5949 }
5950 if (priv->ucode_data.v_addr != NULL) {
5951 pci_free_consistent(priv->pci_dev,
5952 priv->ucode_data.len,
5953 priv->ucode_data.v_addr,
5954 priv->ucode_data.p_addr);
5955 priv->ucode_data.v_addr = NULL;
5956 }
5957 if (priv->ucode_data_backup.v_addr != NULL) {
5958 pci_free_consistent(priv->pci_dev,
5959 priv->ucode_data_backup.len,
5960 priv->ucode_data_backup.v_addr,
5961 priv->ucode_data_backup.p_addr);
5962 priv->ucode_data_backup.v_addr = NULL;
5963 }
5964 if (priv->ucode_init.v_addr != NULL) {
5965 pci_free_consistent(priv->pci_dev,
5966 priv->ucode_init.len,
5967 priv->ucode_init.v_addr,
5968 priv->ucode_init.p_addr);
5969 priv->ucode_init.v_addr = NULL;
5970 }
5971 if (priv->ucode_init_data.v_addr != NULL) {
5972 pci_free_consistent(priv->pci_dev,
5973 priv->ucode_init_data.len,
5974 priv->ucode_init_data.v_addr,
5975 priv->ucode_init_data.p_addr);
5976 priv->ucode_init_data.v_addr = NULL;
5977 }
5978 if (priv->ucode_boot.v_addr != NULL) {
5979 pci_free_consistent(priv->pci_dev,
5980 priv->ucode_boot.len,
5981 priv->ucode_boot.v_addr,
5982 priv->ucode_boot.p_addr);
5983 priv->ucode_boot.v_addr = NULL;
5984 }
5985}
5986
5987/**
bb8c093b 5988 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY
5989 * looking at all data.
5990 */
9fbab516
BC
5991static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 * image,
5992 u32 len)
b481de9c
ZY
5993{
5994 u32 val;
5995 u32 save_len = len;
5996 int rc = 0;
5997 u32 errcnt;
5998
5999 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6000
bb8c093b 6001 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
6002 if (rc)
6003 return rc;
6004
bb8c093b 6005 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY
6006
6007 errcnt = 0;
6008 for (; len > 0; len -= sizeof(u32), image++) {
6009 /* read data comes through single port, auto-incr addr */
6010 /* NOTE: Use the debugless read so we don't flood kernel log
6011 * if IWL_DL_IO is set */
bb8c093b 6012 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
6013 if (val != le32_to_cpu(*image)) {
6014 IWL_ERROR("uCode INST section is invalid at "
6015 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6016 save_len - len, val, le32_to_cpu(*image));
6017 rc = -EIO;
6018 errcnt++;
6019 if (errcnt >= 20)
6020 break;
6021 }
6022 }
6023
bb8c093b 6024 iwl4965_release_nic_access(priv);
b481de9c
ZY
6025
6026 if (!errcnt)
6027 IWL_DEBUG_INFO
6028 ("ucode image in INSTRUCTION memory is good\n");
6029
6030 return rc;
6031}
6032
6033
6034/**
bb8c093b 6035 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY
6036 * using sample data 100 bytes apart. If these sample points are good,
6037 * it's a pretty good bet that everything between them is good, too.
6038 */
bb8c093b 6039static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
b481de9c
ZY
6040{
6041 u32 val;
6042 int rc = 0;
6043 u32 errcnt = 0;
6044 u32 i;
6045
6046 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
6047
bb8c093b 6048 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
6049 if (rc)
6050 return rc;
6051
6052 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
6053 /* read data comes through single port, auto-incr addr */
6054 /* NOTE: Use the debugless read so we don't flood kernel log
6055 * if IWL_DL_IO is set */
bb8c093b 6056 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 6057 i + RTC_INST_LOWER_BOUND);
bb8c093b 6058 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY
6059 if (val != le32_to_cpu(*image)) {
6060#if 0 /* Enable this if you want to see details */
6061 IWL_ERROR("uCode INST section is invalid at "
6062 "offset 0x%x, is 0x%x, s/b 0x%x\n",
6063 i, val, *image);
6064#endif
6065 rc = -EIO;
6066 errcnt++;
6067 if (errcnt >= 3)
6068 break;
6069 }
6070 }
6071
bb8c093b 6072 iwl4965_release_nic_access(priv);
b481de9c
ZY
6073
6074 return rc;
6075}
6076
6077
6078/**
bb8c093b 6079 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY
6080 * and verify its contents
6081 */
bb8c093b 6082static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
b481de9c
ZY
6083{
6084 __le32 *image;
6085 u32 len;
6086 int rc = 0;
6087
6088 /* Try bootstrap */
6089 image = (__le32 *)priv->ucode_boot.v_addr;
6090 len = priv->ucode_boot.len;
bb8c093b 6091 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
6092 if (rc == 0) {
6093 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
6094 return 0;
6095 }
6096
6097 /* Try initialize */
6098 image = (__le32 *)priv->ucode_init.v_addr;
6099 len = priv->ucode_init.len;
bb8c093b 6100 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
6101 if (rc == 0) {
6102 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
6103 return 0;
6104 }
6105
6106 /* Try runtime/protocol */
6107 image = (__le32 *)priv->ucode_code.v_addr;
6108 len = priv->ucode_code.len;
bb8c093b 6109 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY
6110 if (rc == 0) {
6111 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
6112 return 0;
6113 }
6114
6115 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
6116
9fbab516
BC
6117 /* Since nothing seems to match, show first several data entries in
6118 * instruction SRAM, so maybe visual inspection will give a clue.
6119 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY
6120 image = (__le32 *)priv->ucode_boot.v_addr;
6121 len = priv->ucode_boot.len;
bb8c093b 6122 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY
6123
6124 return rc;
6125}
6126
6127
6128/* check contents of special bootstrap uCode SRAM */
bb8c093b 6129static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
b481de9c
ZY
6130{
6131 __le32 *image = priv->ucode_boot.v_addr;
6132 u32 len = priv->ucode_boot.len;
6133 u32 reg;
6134 u32 val;
6135
6136 IWL_DEBUG_INFO("Begin verify bsm\n");
6137
6138 /* verify BSM SRAM contents */
bb8c093b 6139 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
b481de9c
ZY
6140 for (reg = BSM_SRAM_LOWER_BOUND;
6141 reg < BSM_SRAM_LOWER_BOUND + len;
6142 reg += sizeof(u32), image ++) {
bb8c093b 6143 val = iwl4965_read_prph(priv, reg);
b481de9c
ZY
6144 if (val != le32_to_cpu(*image)) {
6145 IWL_ERROR("BSM uCode verification failed at "
6146 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
6147 BSM_SRAM_LOWER_BOUND,
6148 reg - BSM_SRAM_LOWER_BOUND, len,
6149 val, le32_to_cpu(*image));
6150 return -EIO;
6151 }
6152 }
6153
6154 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
6155
6156 return 0;
6157}
6158
6159/**
bb8c093b 6160 * iwl4965_load_bsm - Load bootstrap instructions
b481de9c
ZY
6161 *
6162 * BSM operation:
6163 *
6164 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
6165 * in special SRAM that does not power down during RFKILL. When powering back
6166 * up after power-saving sleeps (or during initial uCode load), the BSM loads
6167 * the bootstrap program into the on-board processor, and starts it.
6168 *
6169 * The bootstrap program loads (via DMA) instructions and data for a new
6170 * program from host DRAM locations indicated by the host driver in the
6171 * BSM_DRAM_* registers. Once the new program is loaded, it starts
6172 * automatically.
6173 *
6174 * When initializing the NIC, the host driver points the BSM to the
6175 * "initialize" uCode image. This uCode sets up some internal data, then
6176 * notifies host via "initialize alive" that it is complete.
6177 *
6178 * The host then replaces the BSM_DRAM_* pointer values to point to the
6179 * normal runtime uCode instructions and a backup uCode data cache buffer
6180 * (filled initially with starting data values for the on-board processor),
6181 * then triggers the "initialize" uCode to load and launch the runtime uCode,
6182 * which begins normal operation.
6183 *
6184 * When doing a power-save shutdown, runtime uCode saves data SRAM into
6185 * the backup data cache in DRAM before SRAM is powered down.
6186 *
6187 * When powering back up, the BSM loads the bootstrap program. This reloads
6188 * the runtime uCode instructions and the backup data cache into SRAM,
6189 * and re-launches the runtime uCode from where it left off.
6190 */
bb8c093b 6191static int iwl4965_load_bsm(struct iwl4965_priv *priv)
b481de9c
ZY
6192{
6193 __le32 *image = priv->ucode_boot.v_addr;
6194 u32 len = priv->ucode_boot.len;
6195 dma_addr_t pinst;
6196 dma_addr_t pdata;
6197 u32 inst_len;
6198 u32 data_len;
6199 int rc;
6200 int i;
6201 u32 done;
6202 u32 reg_offset;
6203
6204 IWL_DEBUG_INFO("Begin load bsm\n");
6205
6206 /* make sure bootstrap program is no larger than BSM's SRAM size */
6207 if (len > IWL_MAX_BSM_SIZE)
6208 return -EINVAL;
6209
6210 /* Tell bootstrap uCode where to find the "Initialize" uCode
9fbab516 6211 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
bb8c093b 6212 * NOTE: iwl4965_initialize_alive_start() will replace these values,
b481de9c
ZY
6213 * after the "initialize" uCode has run, to point to
6214 * runtime/protocol instructions and backup data cache. */
6215 pinst = priv->ucode_init.p_addr >> 4;
6216 pdata = priv->ucode_init_data.p_addr >> 4;
6217 inst_len = priv->ucode_init.len;
6218 data_len = priv->ucode_init_data.len;
6219
bb8c093b 6220 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
6221 if (rc)
6222 return rc;
6223
bb8c093b
CH
6224 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6225 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6226 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
6227 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
b481de9c
ZY
6228
6229 /* Fill BSM memory with bootstrap instructions */
6230 for (reg_offset = BSM_SRAM_LOWER_BOUND;
6231 reg_offset < BSM_SRAM_LOWER_BOUND + len;
6232 reg_offset += sizeof(u32), image++)
bb8c093b 6233 _iwl4965_write_prph(priv, reg_offset,
b481de9c
ZY
6234 le32_to_cpu(*image));
6235
bb8c093b 6236 rc = iwl4965_verify_bsm(priv);
b481de9c 6237 if (rc) {
bb8c093b 6238 iwl4965_release_nic_access(priv);
b481de9c
ZY
6239 return rc;
6240 }
6241
6242 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
bb8c093b
CH
6243 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
6244 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
b481de9c 6245 RTC_INST_LOWER_BOUND);
bb8c093b 6246 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
b481de9c
ZY
6247
6248 /* Load bootstrap code into instruction SRAM now,
6249 * to prepare to load "initialize" uCode */
bb8c093b 6250 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY
6251 BSM_WR_CTRL_REG_BIT_START);
6252
6253 /* Wait for load of bootstrap uCode to finish */
6254 for (i = 0; i < 100; i++) {
bb8c093b 6255 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
b481de9c
ZY
6256 if (!(done & BSM_WR_CTRL_REG_BIT_START))
6257 break;
6258 udelay(10);
6259 }
6260 if (i < 100)
6261 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
6262 else {
6263 IWL_ERROR("BSM write did not complete!\n");
6264 return -EIO;
6265 }
6266
6267 /* Enable future boot loads whenever power management unit triggers it
6268 * (e.g. when powering back up after power-save shutdown) */
bb8c093b 6269 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY
6270 BSM_WR_CTRL_REG_BIT_START_EN);
6271
bb8c093b 6272 iwl4965_release_nic_access(priv);
b481de9c
ZY
6273
6274 return 0;
6275}
6276
bb8c093b 6277static void iwl4965_nic_start(struct iwl4965_priv *priv)
b481de9c
ZY
6278{
6279 /* Remove all resets to allow NIC to operate */
bb8c093b 6280 iwl4965_write32(priv, CSR_RESET, 0);
b481de9c
ZY
6281}
6282
90e759d1
TW
6283static int iwl4965_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
6284{
6285 desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
6286 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
6287}
6288
b481de9c 6289/**
bb8c093b 6290 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY
6291 *
6292 * Copy into buffers for card to fetch via bus-mastering
6293 */
bb8c093b 6294static int iwl4965_read_ucode(struct iwl4965_priv *priv)
b481de9c 6295{
bb8c093b 6296 struct iwl4965_ucode *ucode;
90e759d1 6297 int ret;
b481de9c
ZY
6298 const struct firmware *ucode_raw;
6299 const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
6300 u8 *src;
6301 size_t len;
6302 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
6303
6304 /* Ask kernel firmware_class module to get the boot firmware off disk.
6305 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW
6306 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
6307 if (ret < 0) {
6308 IWL_ERROR("%s firmware file req failed: Reason %d\n",
6309 name, ret);
b481de9c
ZY
6310 goto error;
6311 }
6312
6313 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
6314 name, ucode_raw->size);
6315
6316 /* Make sure that we got at least our header! */
6317 if (ucode_raw->size < sizeof(*ucode)) {
6318 IWL_ERROR("File size way too small!\n");
90e759d1 6319 ret = -EINVAL;
b481de9c
ZY
6320 goto err_release;
6321 }
6322
6323 /* Data from ucode file: header followed by uCode images */
6324 ucode = (void *)ucode_raw->data;
6325
6326 ver = le32_to_cpu(ucode->ver);
6327 inst_size = le32_to_cpu(ucode->inst_size);
6328 data_size = le32_to_cpu(ucode->data_size);
6329 init_size = le32_to_cpu(ucode->init_size);
6330 init_data_size = le32_to_cpu(ucode->init_data_size);
6331 boot_size = le32_to_cpu(ucode->boot_size);
6332
6333 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
6334 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
6335 inst_size);
6336 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
6337 data_size);
6338 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
6339 init_size);
6340 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
6341 init_data_size);
6342 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
6343 boot_size);
6344
6345 /* Verify size of file vs. image size info in file's header */
6346 if (ucode_raw->size < sizeof(*ucode) +
6347 inst_size + data_size + init_size +
6348 init_data_size + boot_size) {
6349
6350 IWL_DEBUG_INFO("uCode file size %d too small\n",
6351 (int)ucode_raw->size);
90e759d1 6352 ret = -EINVAL;
b481de9c
ZY
6353 goto err_release;
6354 }
6355
6356 /* Verify that uCode images will fit in card's SRAM */
6357 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW
6358 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
6359 inst_size);
6360 ret = -EINVAL;
b481de9c
ZY
6361 goto err_release;
6362 }
6363
6364 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW
6365 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
6366 data_size);
6367 ret = -EINVAL;
b481de9c
ZY
6368 goto err_release;
6369 }
6370 if (init_size > IWL_MAX_INST_SIZE) {
6371 IWL_DEBUG_INFO
90e759d1
TW
6372 ("uCode init instr len %d too large to fit in\n",
6373 init_size);
6374 ret = -EINVAL;
b481de9c
ZY
6375 goto err_release;
6376 }
6377 if (init_data_size > IWL_MAX_DATA_SIZE) {
6378 IWL_DEBUG_INFO
90e759d1
TW
6379 ("uCode init data len %d too large to fit in\n",
6380 init_data_size);
6381 ret = -EINVAL;
b481de9c
ZY
6382 goto err_release;
6383 }
6384 if (boot_size > IWL_MAX_BSM_SIZE) {
6385 IWL_DEBUG_INFO
90e759d1
TW
6386 ("uCode boot instr len %d too large to fit in\n",
6387 boot_size);
6388 ret = -EINVAL;
b481de9c
ZY
6389 goto err_release;
6390 }
6391
6392 /* Allocate ucode buffers for card's bus-master loading ... */
6393
6394 /* Runtime instructions and 2 copies of data:
6395 * 1) unmodified from disk
6396 * 2) backup cache for save/restore during power-downs */
6397 priv->ucode_code.len = inst_size;
90e759d1 6398 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY
6399
6400 priv->ucode_data.len = data_size;
90e759d1 6401 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY
6402
6403 priv->ucode_data_backup.len = data_size;
90e759d1 6404 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY
6405
6406 /* Initialization instructions and data */
90e759d1
TW
6407 if (init_size && init_data_size) {
6408 priv->ucode_init.len = init_size;
6409 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
6410
6411 priv->ucode_init_data.len = init_data_size;
6412 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
6413
6414 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6415 goto err_pci_alloc;
6416 }
b481de9c
ZY
6417
6418 /* Bootstrap (instructions only, no data) */
90e759d1
TW
6419 if (boot_size) {
6420 priv->ucode_boot.len = boot_size;
6421 iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 6422
90e759d1
TW
6423 if (!priv->ucode_boot.v_addr)
6424 goto err_pci_alloc;
6425 }
b481de9c
ZY
6426
6427 /* Copy images into buffers for card's bus-master reads ... */
6428
6429 /* Runtime instructions (first block of data in file) */
6430 src = &ucode->data[0];
6431 len = priv->ucode_code.len;
90e759d1 6432 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY
6433 memcpy(priv->ucode_code.v_addr, src, len);
6434 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6435 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6436
6437 /* Runtime data (2nd block)
bb8c093b 6438 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY
6439 src = &ucode->data[inst_size];
6440 len = priv->ucode_data.len;
90e759d1 6441 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY
6442 memcpy(priv->ucode_data.v_addr, src, len);
6443 memcpy(priv->ucode_data_backup.v_addr, src, len);
6444
6445 /* Initialization instructions (3rd block) */
6446 if (init_size) {
6447 src = &ucode->data[inst_size + data_size];
6448 len = priv->ucode_init.len;
90e759d1
TW
6449 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6450 len);
b481de9c
ZY
6451 memcpy(priv->ucode_init.v_addr, src, len);
6452 }
6453
6454 /* Initialization data (4th block) */
6455 if (init_data_size) {
6456 src = &ucode->data[inst_size + data_size + init_size];
6457 len = priv->ucode_init_data.len;
90e759d1
TW
6458 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6459 len);
b481de9c
ZY
6460 memcpy(priv->ucode_init_data.v_addr, src, len);
6461 }
6462
6463 /* Bootstrap instructions (5th block) */
6464 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6465 len = priv->ucode_boot.len;
90e759d1 6466 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY
6467 memcpy(priv->ucode_boot.v_addr, src, len);
6468
6469 /* We have our copies now, allow OS release its copies */
6470 release_firmware(ucode_raw);
6471 return 0;
6472
6473 err_pci_alloc:
6474 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 6475 ret = -ENOMEM;
bb8c093b 6476 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
6477
6478 err_release:
6479 release_firmware(ucode_raw);
6480
6481 error:
90e759d1 6482 return ret;
b481de9c
ZY
6483}
6484
6485
6486/**
bb8c093b 6487 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY
6488 *
6489 * Tell initialization uCode where to find runtime uCode.
6490 *
6491 * BSM registers initially contain pointers to initialization uCode.
6492 * We need to replace them to load runtime uCode inst and data,
6493 * and to save runtime data when powering down.
6494 */
bb8c093b 6495static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
b481de9c
ZY
6496{
6497 dma_addr_t pinst;
6498 dma_addr_t pdata;
6499 int rc = 0;
6500 unsigned long flags;
6501
6502 /* bits 35:4 for 4965 */
6503 pinst = priv->ucode_code.p_addr >> 4;
6504 pdata = priv->ucode_data_backup.p_addr >> 4;
6505
6506 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 6507 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY
6508 if (rc) {
6509 spin_unlock_irqrestore(&priv->lock, flags);
6510 return rc;
6511 }
6512
6513 /* Tell bootstrap uCode where to find image to load */
bb8c093b
CH
6514 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6515 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6516 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY
6517 priv->ucode_data.len);
6518
6519 /* Inst bytecount must be last to set up, bit 31 signals uCode
6520 * that all new ptr/size info is in place */
bb8c093b 6521 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY
6522 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6523
bb8c093b 6524 iwl4965_release_nic_access(priv);
b481de9c
ZY
6525
6526 spin_unlock_irqrestore(&priv->lock, flags);
6527
6528 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6529
6530 return rc;
6531}
6532
6533/**
bb8c093b 6534 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY
6535 *
6536 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6537 *
6538 * The 4965 "initialize" ALIVE reply contains calibration data for:
6539 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6540 * (3945 does not contain this data).
6541 *
6542 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6543*/
bb8c093b 6544static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
b481de9c
ZY
6545{
6546 /* Check alive response for "valid" sign from uCode */
6547 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6548 /* We had an error bringing up the hardware, so take it
6549 * all the way back down so we can try again */
6550 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6551 goto restart;
6552 }
6553
6554 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6555 * This is a paranoid check, because we would not have gotten the
6556 * "initialize" alive if code weren't properly loaded. */
bb8c093b 6557 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
6558 /* Runtime instruction load was bad;
6559 * take it all the way back down so we can try again */
6560 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6561 goto restart;
6562 }
6563
6564 /* Calculate temperature */
6565 priv->temperature = iwl4965_get_temperature(priv);
6566
6567 /* Send pointers to protocol/runtime uCode image ... init code will
6568 * load and launch runtime uCode, which will send us another "Alive"
6569 * notification. */
6570 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 6571 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY
6572 /* Runtime instruction load won't happen;
6573 * take it all the way back down so we can try again */
6574 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6575 goto restart;
6576 }
6577 return;
6578
6579 restart:
6580 queue_work(priv->workqueue, &priv->restart);
6581}
6582
6583
6584/**
bb8c093b 6585 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 6586 * from protocol/runtime uCode (initialization uCode's
bb8c093b 6587 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 6588 */
bb8c093b 6589static void iwl4965_alive_start(struct iwl4965_priv *priv)
b481de9c
ZY
6590{
6591 int rc = 0;
6592
6593 IWL_DEBUG_INFO("Runtime Alive received.\n");
6594
6595 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6596 /* We had an error bringing up the hardware, so take it
6597 * all the way back down so we can try again */
6598 IWL_DEBUG_INFO("Alive failed.\n");
6599 goto restart;
6600 }
6601
6602 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6603 * This is a paranoid check, because we would not have gotten the
6604 * "runtime" alive if code weren't properly loaded. */
bb8c093b 6605 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY
6606 /* Runtime instruction load was bad;
6607 * take it all the way back down so we can try again */
6608 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6609 goto restart;
6610 }
6611
bb8c093b 6612 iwl4965_clear_stations_table(priv);
b481de9c
ZY
6613
6614 rc = iwl4965_alive_notify(priv);
6615 if (rc) {
6616 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6617 rc);
6618 goto restart;
6619 }
6620
9fbab516 6621 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY
6622 set_bit(STATUS_ALIVE, &priv->status);
6623
6624 /* Clear out the uCode error bit if it is set */
6625 clear_bit(STATUS_FW_ERROR, &priv->status);
6626
bb8c093b 6627 rc = iwl4965_init_channel_map(priv);
b481de9c
ZY
6628 if (rc) {
6629 IWL_ERROR("initializing regulatory failed: %d\n", rc);
6630 return;
6631 }
6632
bb8c093b 6633 iwl4965_init_geos(priv);
b481de9c 6634
bb8c093b 6635 if (iwl4965_is_rfkill(priv))
b481de9c
ZY
6636 return;
6637
6638 if (!priv->mac80211_registered) {
6639 /* Unlock so any user space entry points can call back into
6640 * the driver without a deadlock... */
6641 mutex_unlock(&priv->mutex);
bb8c093b 6642 iwl4965_rate_control_register(priv->hw);
b481de9c
ZY
6643 rc = ieee80211_register_hw(priv->hw);
6644 priv->hw->conf.beacon_int = 100;
6645 mutex_lock(&priv->mutex);
6646
6647 if (rc) {
bb8c093b 6648 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY
6649 IWL_ERROR("Failed to register network "
6650 "device (error %d)\n", rc);
6651 return;
6652 }
6653
6654 priv->mac80211_registered = 1;
6655
bb8c093b 6656 iwl4965_reset_channel_flag(priv);
b481de9c
ZY
6657 } else
6658 ieee80211_start_queues(priv->hw);
6659
6660 priv->active_rate = priv->rates_mask;
6661 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6662
bb8c093b 6663 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 6664
bb8c093b
CH
6665 if (iwl4965_is_associated(priv)) {
6666 struct iwl4965_rxon_cmd *active_rxon =
6667 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY
6668
6669 memcpy(&priv->staging_rxon, &priv->active_rxon,
6670 sizeof(priv->staging_rxon));
6671 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6672 } else {
6673 /* Initialize our rx_config data */
bb8c093b 6674 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY
6675 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6676 }
6677
9fbab516 6678 /* Configure Bluetooth device coexistence support */
bb8c093b 6679 iwl4965_send_bt_config(priv);
b481de9c
ZY
6680
6681 /* Configure the adapter for unassociated operation */
bb8c093b 6682 iwl4965_commit_rxon(priv);
b481de9c
ZY
6683
6684 /* At this point, the NIC is initialized and operational */
6685 priv->notif_missed_beacons = 0;
6686 set_bit(STATUS_READY, &priv->status);
6687
6688 iwl4965_rf_kill_ct_config(priv);
6689 IWL_DEBUG_INFO("ALIVE processing complete.\n");
6690
6691 if (priv->error_recovering)
bb8c093b 6692 iwl4965_error_recovery(priv);
b481de9c
ZY
6693
6694 return;
6695
6696 restart:
6697 queue_work(priv->workqueue, &priv->restart);
6698}
6699
bb8c093b 6700static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
b481de9c 6701
bb8c093b 6702static void __iwl4965_down(struct iwl4965_priv *priv)
b481de9c
ZY
6703{
6704 unsigned long flags;
6705 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6706 struct ieee80211_conf *conf = NULL;
6707
6708 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6709
6710 conf = ieee80211_get_hw_conf(priv->hw);
6711
6712 if (!exit_pending)
6713 set_bit(STATUS_EXIT_PENDING, &priv->status);
6714
bb8c093b 6715 iwl4965_clear_stations_table(priv);
b481de9c
ZY
6716
6717 /* Unblock any waiting calls */
6718 wake_up_interruptible_all(&priv->wait_command_queue);
6719
b481de9c
ZY
6720 /* Wipe out the EXIT_PENDING status bit if we are not actually
6721 * exiting the module */
6722 if (!exit_pending)
6723 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6724
6725 /* stop and reset the on-board processor */
bb8c093b 6726 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY
6727
6728 /* tell the device to stop sending interrupts */
bb8c093b 6729 iwl4965_disable_interrupts(priv);
b481de9c
ZY
6730
6731 if (priv->mac80211_registered)
6732 ieee80211_stop_queues(priv->hw);
6733
bb8c093b 6734 /* If we have not previously called iwl4965_init() then
b481de9c 6735 * clear all bits but the RF Kill and SUSPEND bits and return */
bb8c093b 6736 if (!iwl4965_is_init(priv)) {
b481de9c
ZY
6737 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6738 STATUS_RF_KILL_HW |
6739 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6740 STATUS_RF_KILL_SW |
6741 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6742 STATUS_IN_SUSPEND;
6743 goto exit;
6744 }
6745
6746 /* ...otherwise clear out all the status bits but the RF Kill and
6747 * SUSPEND bits and continue taking the NIC down. */
6748 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6749 STATUS_RF_KILL_HW |
6750 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6751 STATUS_RF_KILL_SW |
6752 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6753 STATUS_IN_SUSPEND |
6754 test_bit(STATUS_FW_ERROR, &priv->status) <<
6755 STATUS_FW_ERROR;
6756
6757 spin_lock_irqsave(&priv->lock, flags);
9fbab516
BC
6758 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6759 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY
6760 spin_unlock_irqrestore(&priv->lock, flags);
6761
bb8c093b
CH
6762 iwl4965_hw_txq_ctx_stop(priv);
6763 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY
6764
6765 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH
6766 if (!iwl4965_grab_nic_access(priv)) {
6767 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 6768 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 6769 iwl4965_release_nic_access(priv);
b481de9c
ZY
6770 }
6771 spin_unlock_irqrestore(&priv->lock, flags);
6772
6773 udelay(5);
6774
bb8c093b
CH
6775 iwl4965_hw_nic_stop_master(priv);
6776 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6777 iwl4965_hw_nic_reset(priv);
b481de9c
ZY
6778
6779 exit:
bb8c093b 6780 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY
6781
6782 if (priv->ibss_beacon)
6783 dev_kfree_skb(priv->ibss_beacon);
6784 priv->ibss_beacon = NULL;
6785
6786 /* clear out any free frames */
bb8c093b 6787 iwl4965_clear_free_frames(priv);
b481de9c
ZY
6788}
6789
bb8c093b 6790static void iwl4965_down(struct iwl4965_priv *priv)
b481de9c
ZY
6791{
6792 mutex_lock(&priv->mutex);
bb8c093b 6793 __iwl4965_down(priv);
b481de9c 6794 mutex_unlock(&priv->mutex);
b24d22b1 6795
bb8c093b 6796 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY
6797}
6798
6799#define MAX_HW_RESTARTS 5
6800
bb8c093b 6801static int __iwl4965_up(struct iwl4965_priv *priv)
b481de9c 6802{
0795af57 6803 DECLARE_MAC_BUF(mac);
b481de9c
ZY
6804 int rc, i;
6805 u32 hw_rf_kill = 0;
6806
6807 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6808 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6809 return -EIO;
6810 }
6811
6812 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6813 IWL_WARNING("Radio disabled by SW RF kill (module "
6814 "parameter)\n");
6815 return 0;
6816 }
6817
a781cf94
RC
6818 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6819 IWL_ERROR("ucode not available for device bringup\n");
6820 return -EIO;
6821 }
6822
bb8c093b 6823 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 6824
bb8c093b 6825 rc = iwl4965_hw_nic_init(priv);
b481de9c
ZY
6826 if (rc) {
6827 IWL_ERROR("Unable to int nic\n");
6828 return rc;
6829 }
6830
6831 /* make sure rfkill handshake bits are cleared */
bb8c093b
CH
6832 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6833 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY
6834 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6835
6836 /* clear (again), then enable host interrupts */
bb8c093b
CH
6837 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6838 iwl4965_enable_interrupts(priv);
b481de9c
ZY
6839
6840 /* really make sure rfkill handshake bits are cleared */
bb8c093b
CH
6841 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6842 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
6843
6844 /* Copy original ucode data image from disk into backup cache.
6845 * This will be used to initialize the on-board processor's
6846 * data SRAM for a clean start when the runtime program first loads. */
6847 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
6848 priv->ucode_data.len);
6849
6850 /* If platform's RF_KILL switch is set to KILL,
6851 * wait for BIT_INT_RF_KILL interrupt before loading uCode
6852 * and getting things started */
bb8c093b 6853 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY
6854 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
6855 hw_rf_kill = 1;
6856
6857 if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
6858 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6859 return 0;
6860 }
6861
6862 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6863
bb8c093b 6864 iwl4965_clear_stations_table(priv);
b481de9c
ZY
6865
6866 /* load bootstrap state machine,
6867 * load bootstrap program into processor's memory,
6868 * prepare to load the "initialize" uCode */
bb8c093b 6869 rc = iwl4965_load_bsm(priv);
b481de9c
ZY
6870
6871 if (rc) {
6872 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6873 continue;
6874 }
6875
6876 /* start card; "initialize" will load runtime ucode */
bb8c093b 6877 iwl4965_nic_start(priv);
b481de9c 6878
9fbab516 6879 /* MAC Address location in EEPROM is same for 3945/4965 */
b481de9c 6880 get_eeprom_mac(priv, priv->mac_addr);
0795af57
JP
6881 IWL_DEBUG_INFO("MAC address: %s\n",
6882 print_mac(mac, priv->mac_addr));
b481de9c
ZY
6883
6884 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
6885
6886 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6887
6888 return 0;
6889 }
6890
6891 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 6892 __iwl4965_down(priv);
b481de9c
ZY
6893
6894 /* tried to restart and config the device for as long as our
6895 * patience could withstand */
6896 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6897 return -EIO;
6898}
6899
6900
6901/*****************************************************************************
6902 *
6903 * Workqueue callbacks
6904 *
6905 *****************************************************************************/
6906
bb8c093b 6907static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 6908{
bb8c093b
CH
6909 struct iwl4965_priv *priv =
6910 container_of(data, struct iwl4965_priv, init_alive_start.work);
b481de9c
ZY
6911
6912 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6913 return;
6914
6915 mutex_lock(&priv->mutex);
bb8c093b 6916 iwl4965_init_alive_start(priv);
b481de9c
ZY
6917 mutex_unlock(&priv->mutex);
6918}
6919
bb8c093b 6920static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 6921{
bb8c093b
CH
6922 struct iwl4965_priv *priv =
6923 container_of(data, struct iwl4965_priv, alive_start.work);
b481de9c
ZY
6924
6925 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6926 return;
6927
6928 mutex_lock(&priv->mutex);
bb8c093b 6929 iwl4965_alive_start(priv);
b481de9c
ZY
6930 mutex_unlock(&priv->mutex);
6931}
6932
bb8c093b 6933static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 6934{
bb8c093b 6935 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
b481de9c
ZY
6936
6937 wake_up_interruptible(&priv->wait_command_queue);
6938
6939 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6940 return;
6941
6942 mutex_lock(&priv->mutex);
6943
bb8c093b 6944 if (!iwl4965_is_rfkill(priv)) {
b481de9c
ZY
6945 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6946 "HW and/or SW RF Kill no longer active, restarting "
6947 "device\n");
6948 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6949 queue_work(priv->workqueue, &priv->restart);
6950 } else {
6951
6952 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6953 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6954 "disabled by SW switch\n");
6955 else
6956 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6957 "Kill switch must be turned off for "
6958 "wireless networking to work.\n");
6959 }
6960 mutex_unlock(&priv->mutex);
6961}
6962
6963#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6964
bb8c093b 6965static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 6966{
bb8c093b
CH
6967 struct iwl4965_priv *priv =
6968 container_of(data, struct iwl4965_priv, scan_check.work);
b481de9c
ZY
6969
6970 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6971 return;
6972
6973 mutex_lock(&priv->mutex);
6974 if (test_bit(STATUS_SCANNING, &priv->status) ||
6975 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6976 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6977 "Scan completion watchdog resetting adapter (%dms)\n",
6978 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 6979
b481de9c 6980 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 6981 iwl4965_send_scan_abort(priv);
b481de9c
ZY
6982 }
6983 mutex_unlock(&priv->mutex);
6984}
6985
bb8c093b 6986static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 6987{
bb8c093b
CH
6988 struct iwl4965_priv *priv =
6989 container_of(data, struct iwl4965_priv, request_scan);
6990 struct iwl4965_host_cmd cmd = {
b481de9c 6991 .id = REPLY_SCAN_CMD,
bb8c093b 6992 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY
6993 .meta.flags = CMD_SIZE_HUGE,
6994 };
6995 int rc = 0;
bb8c093b 6996 struct iwl4965_scan_cmd *scan;
b481de9c
ZY
6997 struct ieee80211_conf *conf = NULL;
6998 u8 direct_mask;
6999 int phymode;
7000
7001 conf = ieee80211_get_hw_conf(priv->hw);
7002
7003 mutex_lock(&priv->mutex);
7004
bb8c093b 7005 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY
7006 IWL_WARNING("request scan called when driver not ready.\n");
7007 goto done;
7008 }
7009
7010 /* Make sure the scan wasn't cancelled before this queued work
7011 * was given the chance to run... */
7012 if (!test_bit(STATUS_SCANNING, &priv->status))
7013 goto done;
7014
7015 /* This should never be called or scheduled if there is currently
7016 * a scan active in the hardware. */
7017 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
7018 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
7019 "Ignoring second request.\n");
7020 rc = -EIO;
7021 goto done;
7022 }
7023
7024 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
7025 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
7026 goto done;
7027 }
7028
7029 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
7030 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
7031 goto done;
7032 }
7033
bb8c093b 7034 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY
7035 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
7036 goto done;
7037 }
7038
7039 if (!test_bit(STATUS_READY, &priv->status)) {
7040 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
7041 goto done;
7042 }
7043
7044 if (!priv->scan_bands) {
7045 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
7046 goto done;
7047 }
7048
7049 if (!priv->scan) {
bb8c093b 7050 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY
7051 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
7052 if (!priv->scan) {
7053 rc = -ENOMEM;
7054 goto done;
7055 }
7056 }
7057 scan = priv->scan;
bb8c093b 7058 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY
7059
7060 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
7061 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
7062
bb8c093b 7063 if (iwl4965_is_associated(priv)) {
b481de9c
ZY
7064 u16 interval = 0;
7065 u32 extra;
7066 u32 suspend_time = 100;
7067 u32 scan_suspend_time = 100;
7068 unsigned long flags;
7069
7070 IWL_DEBUG_INFO("Scanning while associated...\n");
7071
7072 spin_lock_irqsave(&priv->lock, flags);
7073 interval = priv->beacon_int;
7074 spin_unlock_irqrestore(&priv->lock, flags);
7075
7076 scan->suspend_time = 0;
052c4b9f 7077 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY
7078 if (!interval)
7079 interval = suspend_time;
7080
7081 extra = (suspend_time / interval) << 22;
7082 scan_suspend_time = (extra |
7083 ((suspend_time % interval) * 1024));
7084 scan->suspend_time = cpu_to_le32(scan_suspend_time);
7085 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
7086 scan_suspend_time, interval);
7087 }
7088
7089 /* We should add the ability for user to lock to PASSIVE ONLY */
7090 if (priv->one_direct_scan) {
7091 IWL_DEBUG_SCAN
7092 ("Kicking off one direct scan for '%s'\n",
bb8c093b 7093 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY
7094 priv->direct_ssid_len));
7095 scan->direct_scan[0].id = WLAN_EID_SSID;
7096 scan->direct_scan[0].len = priv->direct_ssid_len;
7097 memcpy(scan->direct_scan[0].ssid,
7098 priv->direct_ssid, priv->direct_ssid_len);
7099 direct_mask = 1;
bb8c093b 7100 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
b481de9c
ZY
7101 scan->direct_scan[0].id = WLAN_EID_SSID;
7102 scan->direct_scan[0].len = priv->essid_len;
7103 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
7104 direct_mask = 1;
7105 } else
7106 direct_mask = 0;
7107
7108 /* We don't build a direct scan probe request; the uCode will do
7109 * that based on the direct_mask added to each channel entry */
7110 scan->tx_cmd.len = cpu_to_le16(
bb8c093b 7111 iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
b481de9c
ZY
7112 IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
7113 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
7114 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
7115 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
7116
7117 /* flags + rate selection */
7118
7119 scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
7120
7121 switch (priv->scan_bands) {
7122 case 2:
7123 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
7124 scan->tx_cmd.rate_n_flags =
bb8c093b 7125 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY
7126 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
7127
7128 scan->good_CRC_th = 0;
7129 phymode = MODE_IEEE80211G;
7130 break;
7131
7132 case 1:
7133 scan->tx_cmd.rate_n_flags =
bb8c093b 7134 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY
7135 RATE_MCS_ANT_B_MSK);
7136 scan->good_CRC_th = IWL_GOOD_CRC_TH;
7137 phymode = MODE_IEEE80211A;
7138 break;
7139
7140 default:
7141 IWL_WARNING("Invalid scan band count\n");
7142 goto done;
7143 }
7144
7145 /* select Rx chains */
7146
7147 /* Force use of chains B and C (0x6) for scan Rx.
7148 * Avoid A (0x1) because of its off-channel reception on A-band.
7149 * MIMO is not used here, but value is required to make uCode happy. */
7150 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
7151 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
7152 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
7153 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
7154
7155 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
7156 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
7157
7158 if (direct_mask)
7159 IWL_DEBUG_SCAN
7160 ("Initiating direct scan for %s.\n",
bb8c093b 7161 iwl4965_escape_essid(priv->essid, priv->essid_len));
b481de9c
ZY
7162 else
7163 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
7164
7165 scan->channel_count =
bb8c093b 7166 iwl4965_get_channels_for_scan(
b481de9c
ZY
7167 priv, phymode, 1, /* active */
7168 direct_mask,
7169 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
7170
7171 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 7172 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY
7173 cmd.data = scan;
7174 scan->len = cpu_to_le16(cmd.len);
7175
7176 set_bit(STATUS_SCAN_HW, &priv->status);
bb8c093b 7177 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY
7178 if (rc)
7179 goto done;
7180
7181 queue_delayed_work(priv->workqueue, &priv->scan_check,
7182 IWL_SCAN_CHECK_WATCHDOG);
7183
7184 mutex_unlock(&priv->mutex);
7185 return;
7186
7187 done:
01ebd063 7188 /* inform mac80211 scan aborted */
b481de9c
ZY
7189 queue_work(priv->workqueue, &priv->scan_completed);
7190 mutex_unlock(&priv->mutex);
7191}
7192
bb8c093b 7193static void iwl4965_bg_up(struct work_struct *data)
b481de9c 7194{
bb8c093b 7195 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
b481de9c
ZY
7196
7197 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7198 return;
7199
7200 mutex_lock(&priv->mutex);
bb8c093b 7201 __iwl4965_up(priv);
b481de9c
ZY
7202 mutex_unlock(&priv->mutex);
7203}
7204
bb8c093b 7205static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 7206{
bb8c093b 7207 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
b481de9c
ZY
7208
7209 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7210 return;
7211
bb8c093b 7212 iwl4965_down(priv);
b481de9c
ZY
7213 queue_work(priv->workqueue, &priv->up);
7214}
7215
bb8c093b 7216static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 7217{
bb8c093b
CH
7218 struct iwl4965_priv *priv =
7219 container_of(data, struct iwl4965_priv, rx_replenish);
b481de9c
ZY
7220
7221 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7222 return;
7223
7224 mutex_lock(&priv->mutex);
bb8c093b 7225 iwl4965_rx_replenish(priv);
b481de9c
ZY
7226 mutex_unlock(&priv->mutex);
7227}
7228
bb8c093b 7229static void iwl4965_bg_post_associate(struct work_struct *data)
b481de9c 7230{
bb8c093b 7231 struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
b481de9c
ZY
7232 post_associate.work);
7233
7234 int rc = 0;
7235 struct ieee80211_conf *conf = NULL;
0795af57 7236 DECLARE_MAC_BUF(mac);
b481de9c
ZY
7237
7238 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7239 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
7240 return;
7241 }
7242
0795af57
JP
7243 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
7244 priv->assoc_id,
7245 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY
7246
7247
7248 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7249 return;
7250
7251 mutex_lock(&priv->mutex);
7252
948c171c
MA
7253 if (!priv->interface_id || !priv->is_open) {
7254 mutex_unlock(&priv->mutex);
7255 return;
7256 }
bb8c093b 7257 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 7258
b481de9c
ZY
7259 conf = ieee80211_get_hw_conf(priv->hw);
7260
7261 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7262 iwl4965_commit_rxon(priv);
b481de9c 7263
bb8c093b
CH
7264 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7265 iwl4965_setup_rxon_timing(priv);
7266 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
7267 sizeof(priv->rxon_timing), &priv->rxon_timing);
7268 if (rc)
7269 IWL_WARNING("REPLY_RXON_TIMING failed - "
7270 "Attempting to continue.\n");
7271
7272 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7273
c8b0e6e1 7274#ifdef CONFIG_IWL4965_HT
b481de9c
ZY
7275 if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
7276 iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
7277 else {
7278 priv->active_rate_ht[0] = 0;
7279 priv->active_rate_ht[1] = 0;
7280 priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
7281 }
c8b0e6e1 7282#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY
7283 iwl4965_set_rxon_chain(priv);
7284 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7285
7286 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
7287 priv->assoc_id, priv->beacon_int);
7288
7289 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7290 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7291 else
7292 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7293
7294 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7295 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
7296 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
7297 else
7298 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7299
7300 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7301 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
7302
7303 }
7304
bb8c093b 7305 iwl4965_commit_rxon(priv);
b481de9c
ZY
7306
7307 switch (priv->iw_mode) {
7308 case IEEE80211_IF_TYPE_STA:
bb8c093b 7309 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY
7310 break;
7311
7312 case IEEE80211_IF_TYPE_IBSS:
7313
7314 /* clear out the station table */
bb8c093b 7315 iwl4965_clear_stations_table(priv);
b481de9c 7316
bb8c093b
CH
7317 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
7318 iwl4965_rxon_add_station(priv, priv->bssid, 0);
7319 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
7320 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
7321
7322 break;
7323
7324 default:
7325 IWL_ERROR("%s Should not be called in %d mode\n",
7326 __FUNCTION__, priv->iw_mode);
7327 break;
7328 }
7329
bb8c093b 7330 iwl4965_sequence_reset(priv);
b481de9c 7331
c8b0e6e1 7332#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY
7333 /* Enable Rx differential gain and sensitivity calibrations */
7334 iwl4965_chain_noise_reset(priv);
7335 priv->start_calib = 1;
c8b0e6e1 7336#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY
7337
7338 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7339 priv->assoc_station_added = 1;
7340
c8b0e6e1 7341#ifdef CONFIG_IWL4965_QOS
bb8c093b 7342 iwl4965_activate_qos(priv, 0);
c8b0e6e1 7343#endif /* CONFIG_IWL4965_QOS */
b481de9c
ZY
7344 mutex_unlock(&priv->mutex);
7345}
7346
bb8c093b 7347static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 7348{
bb8c093b 7349 struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
b481de9c 7350
bb8c093b 7351 if (!iwl4965_is_ready(priv))
b481de9c
ZY
7352 return;
7353
7354 mutex_lock(&priv->mutex);
7355
7356 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 7357 iwl4965_send_scan_abort(priv);
b481de9c
ZY
7358
7359 mutex_unlock(&priv->mutex);
7360}
7361
bb8c093b 7362static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 7363{
bb8c093b
CH
7364 struct iwl4965_priv *priv =
7365 container_of(work, struct iwl4965_priv, scan_completed);
b481de9c
ZY
7366
7367 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
7368
7369 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
7370 return;
7371
7372 ieee80211_scan_completed(priv->hw);
7373
7374 /* Since setting the TXPOWER may have been deferred while
7375 * performing the scan, fire one off */
7376 mutex_lock(&priv->mutex);
bb8c093b 7377 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY
7378 mutex_unlock(&priv->mutex);
7379}
7380
7381/*****************************************************************************
7382 *
7383 * mac80211 entry point functions
7384 *
7385 *****************************************************************************/
7386
bb8c093b 7387static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 7388{
bb8c093b 7389 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
7390
7391 IWL_DEBUG_MAC80211("enter\n");
7392
7393 /* we should be verifying the device is ready to be opened */
7394 mutex_lock(&priv->mutex);
7395
7396 priv->is_open = 1;
7397
bb8c093b 7398 if (!iwl4965_is_rfkill(priv))
b481de9c
ZY
7399 ieee80211_start_queues(priv->hw);
7400
7401 mutex_unlock(&priv->mutex);
7402 IWL_DEBUG_MAC80211("leave\n");
7403 return 0;
7404}
7405
bb8c093b 7406static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 7407{
bb8c093b 7408 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
7409
7410 IWL_DEBUG_MAC80211("enter\n");
948c171c
MA
7411
7412
7413 mutex_lock(&priv->mutex);
7414 /* stop mac, cancel any scan request and clear
7415 * RXON_FILTER_ASSOC_MSK BIT
7416 */
b481de9c 7417 priv->is_open = 0;
bb8c093b 7418 iwl4965_scan_cancel_timeout(priv, 100);
948c171c
MA
7419 cancel_delayed_work(&priv->post_associate);
7420 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7421 iwl4965_commit_rxon(priv);
948c171c
MA
7422 mutex_unlock(&priv->mutex);
7423
b481de9c 7424 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY
7425}
7426
bb8c093b 7427static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
7428 struct ieee80211_tx_control *ctl)
7429{
bb8c093b 7430 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
7431
7432 IWL_DEBUG_MAC80211("enter\n");
7433
7434 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7435 IWL_DEBUG_MAC80211("leave - monitor\n");
7436 return -1;
7437 }
7438
7439 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
7440 ctl->tx_rate);
7441
bb8c093b 7442 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY
7443 dev_kfree_skb_any(skb);
7444
7445 IWL_DEBUG_MAC80211("leave\n");
7446 return 0;
7447}
7448
bb8c093b 7449static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY
7450 struct ieee80211_if_init_conf *conf)
7451{
bb8c093b 7452 struct iwl4965_priv *priv = hw->priv;
b481de9c 7453 unsigned long flags;
0795af57 7454 DECLARE_MAC_BUF(mac);
b481de9c
ZY
7455
7456 IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
b481de9c
ZY
7457
7458 if (priv->interface_id) {
7459 IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
7460 return 0;
7461 }
7462
7463 spin_lock_irqsave(&priv->lock, flags);
7464 priv->interface_id = conf->if_id;
7465
7466 spin_unlock_irqrestore(&priv->lock, flags);
7467
7468 mutex_lock(&priv->mutex);
864792e3
TW
7469
7470 if (conf->mac_addr) {
7471 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7472 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7473 }
bb8c093b 7474 iwl4965_set_mode(priv, conf->type);
b481de9c
ZY
7475
7476 IWL_DEBUG_MAC80211("leave\n");
7477 mutex_unlock(&priv->mutex);
7478
7479 return 0;
7480}
7481
7482/**
bb8c093b 7483 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY
7484 *
7485 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7486 * be set inappropriately and the driver currently sets the hardware up to
7487 * use it whenever needed.
7488 */
bb8c093b 7489static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 7490{
bb8c093b
CH
7491 struct iwl4965_priv *priv = hw->priv;
7492 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY
7493 unsigned long flags;
7494
7495 mutex_lock(&priv->mutex);
7496 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
7497
bb8c093b 7498 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY
7499 IWL_DEBUG_MAC80211("leave - not ready\n");
7500 mutex_unlock(&priv->mutex);
7501 return -EIO;
7502 }
7503
7504 /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
01ebd063 7505 * what is exposed through include/ declarations */
bb8c093b 7506 if (unlikely(!iwl4965_param_disable_hw_scan &&
b481de9c
ZY
7507 test_bit(STATUS_SCANNING, &priv->status))) {
7508 IWL_DEBUG_MAC80211("leave - scanning\n");
7509 mutex_unlock(&priv->mutex);
7510 return 0;
7511 }
7512
7513 spin_lock_irqsave(&priv->lock, flags);
7514
bb8c093b 7515 ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
b481de9c
ZY
7516 if (!is_channel_valid(ch_info)) {
7517 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
7518 conf->channel, conf->phymode);
7519 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7520 spin_unlock_irqrestore(&priv->lock, flags);
7521 mutex_unlock(&priv->mutex);
7522 return -EINVAL;
7523 }
7524
c8b0e6e1 7525#ifdef CONFIG_IWL4965_HT
b481de9c
ZY
7526 /* if we are switching fron ht to 2.4 clear flags
7527 * from any ht related info since 2.4 does not
7528 * support ht */
7529 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
7530#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7531 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7532#endif
7533 )
7534 priv->staging_rxon.flags = 0;
c8b0e6e1 7535#endif /* CONFIG_IWL4965_HT */
b481de9c 7536
bb8c093b 7537 iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
b481de9c 7538
bb8c093b 7539 iwl4965_set_flags_for_phymode(priv, conf->phymode);
b481de9c
ZY
7540
7541 /* The list of supported rates and rate mask can be different
7542 * for each phymode; since the phymode may have changed, reset
7543 * the rate mask to what mac80211 lists */
bb8c093b 7544 iwl4965_set_rate(priv);
b481de9c
ZY
7545
7546 spin_unlock_irqrestore(&priv->lock, flags);
7547
7548#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7549 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 7550 iwl4965_hw_channel_switch(priv, conf->channel);
b481de9c
ZY
7551 mutex_unlock(&priv->mutex);
7552 return 0;
7553 }
7554#endif
7555
bb8c093b 7556 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY
7557
7558 if (!conf->radio_enabled) {
7559 IWL_DEBUG_MAC80211("leave - radio disabled\n");
7560 mutex_unlock(&priv->mutex);
7561 return 0;
7562 }
7563
bb8c093b 7564 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY
7565 IWL_DEBUG_MAC80211("leave - RF kill\n");
7566 mutex_unlock(&priv->mutex);
7567 return -EIO;
7568 }
7569
bb8c093b 7570 iwl4965_set_rate(priv);
b481de9c
ZY
7571
7572 if (memcmp(&priv->active_rxon,
7573 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 7574 iwl4965_commit_rxon(priv);
b481de9c
ZY
7575 else
7576 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7577
7578 IWL_DEBUG_MAC80211("leave\n");
7579
7580 mutex_unlock(&priv->mutex);
7581
7582 return 0;
7583}
7584
bb8c093b 7585static void iwl4965_config_ap(struct iwl4965_priv *priv)
b481de9c
ZY
7586{
7587 int rc = 0;
7588
7589 if (priv->status & STATUS_EXIT_PENDING)
7590 return;
7591
7592 /* The following should be done only at AP bring up */
7593 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7594
7595 /* RXON - unassoc (to set timing command) */
7596 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7597 iwl4965_commit_rxon(priv);
b481de9c
ZY
7598
7599 /* RXON Timing */
bb8c093b
CH
7600 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7601 iwl4965_setup_rxon_timing(priv);
7602 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY
7603 sizeof(priv->rxon_timing), &priv->rxon_timing);
7604 if (rc)
7605 IWL_WARNING("REPLY_RXON_TIMING failed - "
7606 "Attempting to continue.\n");
7607
7608 iwl4965_set_rxon_chain(priv);
7609
7610 /* FIXME: what should be the assoc_id for AP? */
7611 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7612 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7613 priv->staging_rxon.flags |=
7614 RXON_FLG_SHORT_PREAMBLE_MSK;
7615 else
7616 priv->staging_rxon.flags &=
7617 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7618
7619 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7620 if (priv->assoc_capability &
7621 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7622 priv->staging_rxon.flags |=
7623 RXON_FLG_SHORT_SLOT_MSK;
7624 else
7625 priv->staging_rxon.flags &=
7626 ~RXON_FLG_SHORT_SLOT_MSK;
7627
7628 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7629 priv->staging_rxon.flags &=
7630 ~RXON_FLG_SHORT_SLOT_MSK;
7631 }
7632 /* restore RXON assoc */
7633 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 7634 iwl4965_commit_rxon(priv);
c8b0e6e1 7635#ifdef CONFIG_IWL4965_QOS
bb8c093b 7636 iwl4965_activate_qos(priv, 1);
b481de9c 7637#endif
bb8c093b 7638 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 7639 }
bb8c093b 7640 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY
7641
7642 /* FIXME - we need to add code here to detect a totally new
7643 * configuration, reset the AP, unassoc, rxon timing, assoc,
7644 * clear sta table, add BCAST sta... */
7645}
7646
bb8c093b 7647static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, int if_id,
b481de9c
ZY
7648 struct ieee80211_if_conf *conf)
7649{
bb8c093b 7650 struct iwl4965_priv *priv = hw->priv;
0795af57 7651 DECLARE_MAC_BUF(mac);
b481de9c
ZY
7652 unsigned long flags;
7653 int rc;
7654
7655 if (conf == NULL)
7656 return -EIO;
7657
7658 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7659 (!conf->beacon || !conf->ssid_len)) {
7660 IWL_DEBUG_MAC80211
7661 ("Leaving in AP mode because HostAPD is not ready.\n");
7662 return 0;
7663 }
7664
7665 mutex_lock(&priv->mutex);
7666
7667 IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
7668 if (conf->bssid)
0795af57
JP
7669 IWL_DEBUG_MAC80211("bssid: %s\n",
7670 print_mac(mac, conf->bssid));
b481de9c 7671
4150c572
JB
7672/*
7673 * very dubious code was here; the probe filtering flag is never set:
7674 *
b481de9c
ZY
7675 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7676 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572
JB
7677 */
7678 if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
b481de9c
ZY
7679 IWL_DEBUG_MAC80211("leave - scanning\n");
7680 mutex_unlock(&priv->mutex);
7681 return 0;
7682 }
7683
7684 if (priv->interface_id != if_id) {
7685 IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
7686 mutex_unlock(&priv->mutex);
7687 return 0;
7688 }
7689
7690 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7691 if (!conf->bssid) {
7692 conf->bssid = priv->mac_addr;
7693 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP
7694 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7695 print_mac(mac, conf->bssid));
b481de9c
ZY
7696 }
7697 if (priv->ibss_beacon)
7698 dev_kfree_skb(priv->ibss_beacon);
7699
7700 priv->ibss_beacon = conf->beacon;
7701 }
7702
7703 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7704 !is_multicast_ether_addr(conf->bssid)) {
7705 /* If there is currently a HW scan going on in the background
7706 * then we need to cancel it else the RXON below will fail. */
bb8c093b 7707 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY
7708 IWL_WARNING("Aborted scan still in progress "
7709 "after 100ms\n");
7710 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7711 mutex_unlock(&priv->mutex);
7712 return -EAGAIN;
7713 }
7714 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7715
7716 /* TODO: Audit driver for usage of these members and see
7717 * if mac80211 deprecates them (priv->bssid looks like it
7718 * shouldn't be there, but I haven't scanned the IBSS code
7719 * to verify) - jpk */
7720 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7721
7722 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 7723 iwl4965_config_ap(priv);
b481de9c 7724 else {
bb8c093b 7725 rc = iwl4965_commit_rxon(priv);
b481de9c 7726 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 7727 iwl4965_rxon_add_station(
b481de9c
ZY
7728 priv, priv->active_rxon.bssid_addr, 1);
7729 }
7730
7731 } else {
bb8c093b 7732 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 7733 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7734 iwl4965_commit_rxon(priv);
b481de9c
ZY
7735 }
7736
7737 spin_lock_irqsave(&priv->lock, flags);
7738 if (!conf->ssid_len)
7739 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7740 else
7741 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7742
7743 priv->essid_len = conf->ssid_len;
7744 spin_unlock_irqrestore(&priv->lock, flags);
7745
7746 IWL_DEBUG_MAC80211("leave\n");
7747 mutex_unlock(&priv->mutex);
7748
7749 return 0;
7750}
7751
bb8c093b 7752static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB
7753 unsigned int changed_flags,
7754 unsigned int *total_flags,
7755 int mc_count, struct dev_addr_list *mc_list)
7756{
7757 /*
7758 * XXX: dummy
bb8c093b 7759 * see also iwl4965_connection_init_rx_config
4150c572
JB
7760 */
7761 *total_flags = 0;
7762}
7763
bb8c093b 7764static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY
7765 struct ieee80211_if_init_conf *conf)
7766{
bb8c093b 7767 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
7768
7769 IWL_DEBUG_MAC80211("enter\n");
7770
7771 mutex_lock(&priv->mutex);
948c171c 7772
bb8c093b 7773 iwl4965_scan_cancel_timeout(priv, 100);
948c171c
MA
7774 cancel_delayed_work(&priv->post_associate);
7775 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7776 iwl4965_commit_rxon(priv);
948c171c 7777
b481de9c
ZY
7778 if (priv->interface_id == conf->if_id) {
7779 priv->interface_id = 0;
7780 memset(priv->bssid, 0, ETH_ALEN);
7781 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7782 priv->essid_len = 0;
7783 }
7784 mutex_unlock(&priv->mutex);
7785
7786 IWL_DEBUG_MAC80211("leave\n");
7787
7788}
bb8c093b 7789static void iwl4965_mac_erp_ie_changed(struct ieee80211_hw *hw,
220173b0
TW
7790 u8 changes, int cts_protection, int preamble)
7791{
bb8c093b 7792 struct iwl4965_priv *priv = hw->priv;
220173b0
TW
7793
7794 if (changes & IEEE80211_ERP_CHANGE_PREAMBLE) {
7795 if (preamble == WLAN_ERP_PREAMBLE_SHORT)
7796 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7797 else
7798 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7799 }
7800
7801 if (changes & IEEE80211_ERP_CHANGE_PROTECTION) {
797a54c6 7802 if (cts_protection && (priv->phymode != MODE_IEEE80211A))
220173b0
TW
7803 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7804 else
7805 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7806 }
7807
bb8c093b
CH
7808 if (iwl4965_is_associated(priv))
7809 iwl4965_send_rxon_assoc(priv);
220173b0 7810}
b481de9c
ZY
7811
7812#define IWL_DELAY_NEXT_SCAN (HZ*2)
bb8c093b 7813static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY
7814{
7815 int rc = 0;
7816 unsigned long flags;
bb8c093b 7817 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
7818
7819 IWL_DEBUG_MAC80211("enter\n");
7820
052c4b9f 7821 mutex_lock(&priv->mutex);
b481de9c
ZY
7822 spin_lock_irqsave(&priv->lock, flags);
7823
bb8c093b 7824 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY
7825 rc = -EIO;
7826 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7827 goto out_unlock;
7828 }
7829
7830 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7831 rc = -EIO;
7832 IWL_ERROR("ERROR: APs don't scan\n");
7833 goto out_unlock;
7834 }
7835
7836 /* if we just finished scan ask for delay */
7837 if (priv->last_scan_jiffies &&
7838 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
7839 jiffies)) {
7840 rc = -EAGAIN;
7841 goto out_unlock;
7842 }
7843 if (len) {
7844 IWL_DEBUG_SCAN("direct scan for "
7845 "%s [%d]\n ",
bb8c093b 7846 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY
7847
7848 priv->one_direct_scan = 1;
7849 priv->direct_ssid_len = (u8)
7850 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7851 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA
7852 } else
7853 priv->one_direct_scan = 0;
b481de9c 7854
bb8c093b 7855 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY
7856
7857 IWL_DEBUG_MAC80211("leave\n");
7858
7859out_unlock:
7860 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 7861 mutex_unlock(&priv->mutex);
b481de9c
ZY
7862
7863 return rc;
7864}
7865
bb8c093b 7866static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY
7867 const u8 *local_addr, const u8 *addr,
7868 struct ieee80211_key_conf *key)
7869{
bb8c093b 7870 struct iwl4965_priv *priv = hw->priv;
0795af57 7871 DECLARE_MAC_BUF(mac);
b481de9c
ZY
7872 int rc = 0;
7873 u8 sta_id;
7874
7875 IWL_DEBUG_MAC80211("enter\n");
7876
bb8c093b 7877 if (!iwl4965_param_hwcrypto) {
b481de9c
ZY
7878 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7879 return -EOPNOTSUPP;
7880 }
7881
7882 if (is_zero_ether_addr(addr))
7883 /* only support pairwise keys */
7884 return -EOPNOTSUPP;
7885
bb8c093b 7886 sta_id = iwl4965_hw_find_station(priv, addr);
b481de9c 7887 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP
7888 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7889 print_mac(mac, addr));
b481de9c
ZY
7890 return -EINVAL;
7891 }
7892
7893 mutex_lock(&priv->mutex);
7894
bb8c093b 7895 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7896
b481de9c
ZY
7897 switch (cmd) {
7898 case SET_KEY:
bb8c093b 7899 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
b481de9c 7900 if (!rc) {
bb8c093b
CH
7901 iwl4965_set_rxon_hwcrypto(priv, 1);
7902 iwl4965_commit_rxon(priv);
b481de9c
ZY
7903 key->hw_key_idx = sta_id;
7904 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7905 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7906 }
7907 break;
7908 case DISABLE_KEY:
bb8c093b 7909 rc = iwl4965_clear_sta_key_info(priv, sta_id);
b481de9c 7910 if (!rc) {
bb8c093b
CH
7911 iwl4965_set_rxon_hwcrypto(priv, 0);
7912 iwl4965_commit_rxon(priv);
b481de9c
ZY
7913 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7914 }
7915 break;
7916 default:
7917 rc = -EINVAL;
7918 }
7919
7920 IWL_DEBUG_MAC80211("leave\n");
7921 mutex_unlock(&priv->mutex);
7922
7923 return rc;
7924}
7925
bb8c093b 7926static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY
7927 const struct ieee80211_tx_queue_params *params)
7928{
bb8c093b 7929 struct iwl4965_priv *priv = hw->priv;
c8b0e6e1 7930#ifdef CONFIG_IWL4965_QOS
b481de9c
ZY
7931 unsigned long flags;
7932 int q;
0054b34d 7933#endif /* CONFIG_IWL4965_QOS */
b481de9c
ZY
7934
7935 IWL_DEBUG_MAC80211("enter\n");
7936
bb8c093b 7937 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY
7938 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7939 return -EIO;
7940 }
7941
7942 if (queue >= AC_NUM) {
7943 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7944 return 0;
7945 }
7946
c8b0e6e1 7947#ifdef CONFIG_IWL4965_QOS
b481de9c
ZY
7948 if (!priv->qos_data.qos_enable) {
7949 priv->qos_data.qos_active = 0;
7950 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7951 return 0;
7952 }
7953 q = AC_NUM - 1 - queue;
7954
7955 spin_lock_irqsave(&priv->lock, flags);
7956
7957 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7958 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7959 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7960 priv->qos_data.def_qos_parm.ac[q].edca_txop =
7961 cpu_to_le16((params->burst_time * 100));
7962
7963 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7964 priv->qos_data.qos_active = 1;
7965
7966 spin_unlock_irqrestore(&priv->lock, flags);
7967
7968 mutex_lock(&priv->mutex);
7969 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b
CH
7970 iwl4965_activate_qos(priv, 1);
7971 else if (priv->assoc_id && iwl4965_is_associated(priv))
7972 iwl4965_activate_qos(priv, 0);
b481de9c
ZY
7973
7974 mutex_unlock(&priv->mutex);
7975
c8b0e6e1 7976#endif /*CONFIG_IWL4965_QOS */
b481de9c
ZY
7977
7978 IWL_DEBUG_MAC80211("leave\n");
7979 return 0;
7980}
7981
bb8c093b 7982static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY
7983 struct ieee80211_tx_queue_stats *stats)
7984{
bb8c093b 7985 struct iwl4965_priv *priv = hw->priv;
b481de9c 7986 int i, avail;
bb8c093b
CH
7987 struct iwl4965_tx_queue *txq;
7988 struct iwl4965_queue *q;
b481de9c
ZY
7989 unsigned long flags;
7990
7991 IWL_DEBUG_MAC80211("enter\n");
7992
bb8c093b 7993 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY
7994 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7995 return -EIO;
7996 }
7997
7998 spin_lock_irqsave(&priv->lock, flags);
7999
8000 for (i = 0; i < AC_NUM; i++) {
8001 txq = &priv->txq[i];
8002 q = &txq->q;
bb8c093b 8003 avail = iwl4965_queue_space(q);
b481de9c
ZY
8004
8005 stats->data[i].len = q->n_window - avail;
8006 stats->data[i].limit = q->n_window - q->high_mark;
8007 stats->data[i].count = q->n_window;
8008
8009 }
8010 spin_unlock_irqrestore(&priv->lock, flags);
8011
8012 IWL_DEBUG_MAC80211("leave\n");
8013
8014 return 0;
8015}
8016
bb8c093b 8017static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY
8018 struct ieee80211_low_level_stats *stats)
8019{
8020 IWL_DEBUG_MAC80211("enter\n");
8021 IWL_DEBUG_MAC80211("leave\n");
8022
8023 return 0;
8024}
8025
bb8c093b 8026static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY
8027{
8028 IWL_DEBUG_MAC80211("enter\n");
8029 IWL_DEBUG_MAC80211("leave\n");
8030
8031 return 0;
8032}
8033
bb8c093b 8034static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 8035{
bb8c093b 8036 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
8037 unsigned long flags;
8038
8039 mutex_lock(&priv->mutex);
8040 IWL_DEBUG_MAC80211("enter\n");
8041
8042 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 8043#ifdef CONFIG_IWL4965_HT
b481de9c
ZY
8044 spin_lock_irqsave(&priv->lock, flags);
8045 memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
8046 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 8047#ifdef CONFIG_IWL4965_HT_AGG
b481de9c
ZY
8048/* if (priv->lq_mngr.agg_ctrl.granted_ba)
8049 iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
8050
bb8c093b 8051 memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
b481de9c
ZY
8052 priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
8053 priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
8054 priv->lq_mngr.agg_ctrl.auto_agg = 1;
8055
8056 if (priv->lq_mngr.agg_ctrl.auto_agg)
8057 priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
c8b0e6e1
CH
8058#endif /*CONFIG_IWL4965_HT_AGG */
8059#endif /* CONFIG_IWL4965_HT */
b481de9c 8060
c8b0e6e1 8061#ifdef CONFIG_IWL4965_QOS
bb8c093b 8062 iwl4965_reset_qos(priv);
b481de9c
ZY
8063#endif
8064
8065 cancel_delayed_work(&priv->post_associate);
8066
8067 spin_lock_irqsave(&priv->lock, flags);
8068 priv->assoc_id = 0;
8069 priv->assoc_capability = 0;
8070 priv->call_post_assoc_from_beacon = 0;
8071 priv->assoc_station_added = 0;
8072
8073 /* new association get rid of ibss beacon skb */
8074 if (priv->ibss_beacon)
8075 dev_kfree_skb(priv->ibss_beacon);
8076
8077 priv->ibss_beacon = NULL;
8078
8079 priv->beacon_int = priv->hw->conf.beacon_int;
8080 priv->timestamp1 = 0;
8081 priv->timestamp0 = 0;
8082 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
8083 priv->beacon_int = 0;
8084
8085 spin_unlock_irqrestore(&priv->lock, flags);
8086
052c4b9f 8087 /* we are restarting association process
8088 * clear RXON_FILTER_ASSOC_MSK bit
8089 */
8090 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 8091 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 8092 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 8093 iwl4965_commit_rxon(priv);
052c4b9f 8094 }
8095
b481de9c
ZY
8096 /* Per mac80211.h: This is only used in IBSS mode... */
8097 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 8098
b481de9c
ZY
8099 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
8100 mutex_unlock(&priv->mutex);
8101 return;
8102 }
8103
bb8c093b 8104 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY
8105 IWL_DEBUG_MAC80211("leave - not ready\n");
8106 mutex_unlock(&priv->mutex);
8107 return;
8108 }
8109
8110 priv->only_active_channel = 0;
8111
bb8c093b 8112 iwl4965_set_rate(priv);
b481de9c
ZY
8113
8114 mutex_unlock(&priv->mutex);
8115
8116 IWL_DEBUG_MAC80211("leave\n");
8117
8118}
8119
bb8c093b 8120static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY
8121 struct ieee80211_tx_control *control)
8122{
bb8c093b 8123 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
8124 unsigned long flags;
8125
8126 mutex_lock(&priv->mutex);
8127 IWL_DEBUG_MAC80211("enter\n");
8128
bb8c093b 8129 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY
8130 IWL_DEBUG_MAC80211("leave - RF not ready\n");
8131 mutex_unlock(&priv->mutex);
8132 return -EIO;
8133 }
8134
8135 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
8136 IWL_DEBUG_MAC80211("leave - not IBSS\n");
8137 mutex_unlock(&priv->mutex);
8138 return -EIO;
8139 }
8140
8141 spin_lock_irqsave(&priv->lock, flags);
8142
8143 if (priv->ibss_beacon)
8144 dev_kfree_skb(priv->ibss_beacon);
8145
8146 priv->ibss_beacon = skb;
8147
8148 priv->assoc_id = 0;
8149
8150 IWL_DEBUG_MAC80211("leave\n");
8151 spin_unlock_irqrestore(&priv->lock, flags);
8152
c8b0e6e1 8153#ifdef CONFIG_IWL4965_QOS
bb8c093b 8154 iwl4965_reset_qos(priv);
b481de9c
ZY
8155#endif
8156
8157 queue_work(priv->workqueue, &priv->post_associate.work);
8158
8159 mutex_unlock(&priv->mutex);
8160
8161 return 0;
8162}
8163
c8b0e6e1 8164#ifdef CONFIG_IWL4965_HT
b481de9c
ZY
8165union ht_cap_info {
8166 struct {
8167 u16 advanced_coding_cap :1;
8168 u16 supported_chan_width_set :1;
8169 u16 mimo_power_save_mode :2;
8170 u16 green_field :1;
8171 u16 short_GI20 :1;
8172 u16 short_GI40 :1;
8173 u16 tx_stbc :1;
8174 u16 rx_stbc :1;
8175 u16 beam_forming :1;
8176 u16 delayed_ba :1;
8177 u16 maximal_amsdu_size :1;
8178 u16 cck_mode_at_40MHz :1;
8179 u16 psmp_support :1;
8180 u16 stbc_ctrl_frame_support :1;
8181 u16 sig_txop_protection_support :1;
8182 };
8183 u16 val;
8184} __attribute__ ((packed));
8185
8186union ht_param_info{
8187 struct {
8188 u8 max_rx_ampdu_factor :2;
8189 u8 mpdu_density :3;
8190 u8 reserved :3;
8191 };
8192 u8 val;
8193} __attribute__ ((packed));
8194
8195union ht_exra_param_info {
8196 struct {
8197 u8 ext_chan_offset :2;
8198 u8 tx_chan_width :1;
8199 u8 rifs_mode :1;
8200 u8 controlled_access_only :1;
8201 u8 service_interval_granularity :3;
8202 };
8203 u8 val;
8204} __attribute__ ((packed));
8205
8206union ht_operation_mode{
8207 struct {
8208 u16 op_mode :2;
8209 u16 non_GF :1;
8210 u16 reserved :13;
8211 };
8212 u16 val;
8213} __attribute__ ((packed));
8214
8215
8216static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
8217 struct ieee80211_ht_additional_info *ht_extra,
8218 struct sta_ht_info *ht_info_ap,
8219 struct sta_ht_info *ht_info)
8220{
8221 union ht_cap_info cap;
8222 union ht_operation_mode op_mode;
8223 union ht_param_info param_info;
8224 union ht_exra_param_info extra_param_info;
8225
8226 IWL_DEBUG_MAC80211("enter: \n");
8227
8228 if (!ht_info) {
8229 IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
8230 return -1;
8231 }
8232
8233 if (ht_cap) {
8234 cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
8235 param_info.val = ht_cap->mac_ht_params_info;
8236 ht_info->is_ht = 1;
8237 if (cap.short_GI20)
8238 ht_info->sgf |= 0x1;
8239 if (cap.short_GI40)
8240 ht_info->sgf |= 0x2;
8241 ht_info->is_green_field = cap.green_field;
8242 ht_info->max_amsdu_size = cap.maximal_amsdu_size;
8243 ht_info->supported_chan_width = cap.supported_chan_width_set;
8244 ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
8245 memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
8246
8247 ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
8248 ht_info->mpdu_density = param_info.mpdu_density;
8249
8250 IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
8251 ht_cap->supported_mcs_set[0],
8252 ht_cap->supported_mcs_set[1]);
8253
8254 if (ht_info_ap) {
8255 ht_info->control_channel = ht_info_ap->control_channel;
8256 ht_info->extension_chan_offset =
8257 ht_info_ap->extension_chan_offset;
8258 ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
8259 ht_info->operating_mode = ht_info_ap->operating_mode;
8260 }
8261
8262 if (ht_extra) {
8263 extra_param_info.val = ht_extra->ht_param;
8264 ht_info->control_channel = ht_extra->control_chan;
8265 ht_info->extension_chan_offset =
8266 extra_param_info.ext_chan_offset;
8267 ht_info->tx_chan_width = extra_param_info.tx_chan_width;
8268 op_mode.val = (u16)
8269 le16_to_cpu(ht_extra->operation_mode);
8270 ht_info->operating_mode = op_mode.op_mode;
8271 IWL_DEBUG_MAC80211("control channel %d\n",
8272 ht_extra->control_chan);
8273 }
8274 } else
8275 ht_info->is_ht = 0;
8276
8277 IWL_DEBUG_MAC80211("leave\n");
8278 return 0;
8279}
8280
bb8c093b 8281static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
b481de9c
ZY
8282 struct ieee80211_ht_capability *ht_cap,
8283 struct ieee80211_ht_additional_info *ht_extra)
8284{
bb8c093b 8285 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
8286 int rs;
8287
8288 IWL_DEBUG_MAC80211("enter: \n");
8289
8290 rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
8291 iwl4965_set_rxon_chain(priv);
8292
8293 if (priv && priv->assoc_id &&
8294 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
8295 unsigned long flags;
8296
8297 spin_lock_irqsave(&priv->lock, flags);
8298 if (priv->beacon_int)
8299 queue_work(priv->workqueue, &priv->post_associate.work);
8300 else
8301 priv->call_post_assoc_from_beacon = 1;
8302 spin_unlock_irqrestore(&priv->lock, flags);
8303 }
8304
8305 IWL_DEBUG_MAC80211("leave: control channel %d\n",
8306 ht_extra->control_chan);
8307 return rs;
8308
8309}
8310
bb8c093b 8311static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
b481de9c
ZY
8312 struct ieee80211_ht_capability *ht_cap,
8313 u8 use_wide_chan)
8314{
8315 union ht_cap_info cap;
8316 union ht_param_info param_info;
8317
8318 memset(&cap, 0, sizeof(union ht_cap_info));
8319 memset(&param_info, 0, sizeof(union ht_param_info));
8320
8321 cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
8322 cap.green_field = 1;
8323 cap.short_GI20 = 1;
8324 cap.short_GI40 = 1;
8325 cap.supported_chan_width_set = use_wide_chan;
8326 cap.mimo_power_save_mode = 0x3;
8327
8328 param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
8329 param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
8330 ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
8331 ht_cap->mac_ht_params_info = (u8) param_info.val;
8332
8333 ht_cap->supported_mcs_set[0] = 0xff;
8334 ht_cap->supported_mcs_set[1] = 0xff;
8335 ht_cap->supported_mcs_set[4] =
8336 (cap.supported_chan_width_set) ? 0x1: 0x0;
8337}
8338
bb8c093b 8339static void iwl4965_mac_get_ht_capab(struct ieee80211_hw *hw,
b481de9c
ZY
8340 struct ieee80211_ht_capability *ht_cap)
8341{
8342 u8 use_wide_channel = 1;
bb8c093b 8343 struct iwl4965_priv *priv = hw->priv;
b481de9c
ZY
8344
8345 IWL_DEBUG_MAC80211("enter: \n");
8346 if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
8347 use_wide_channel = 0;
8348
8349 /* no fat tx allowed on 2.4GHZ */
8350 if (priv->phymode != MODE_IEEE80211A)
8351 use_wide_channel = 0;
8352
bb8c093b 8353 iwl4965_set_ht_capab(hw, ht_cap, use_wide_channel);
b481de9c
ZY
8354 IWL_DEBUG_MAC80211("leave: \n");
8355}
c8b0e6e1 8356#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY
8357
8358/*****************************************************************************
8359 *
8360 * sysfs attributes
8361 *
8362 *****************************************************************************/
8363
c8b0e6e1 8364#ifdef CONFIG_IWL4965_DEBUG
b481de9c
ZY
8365
8366/*
8367 * The following adds a new attribute to the sysfs representation
8368 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
8369 * used for controlling the debug level.
8370 *
8371 * See the level definitions in iwl for details.
8372 */
8373
8374static ssize_t show_debug_level(struct device_driver *d, char *buf)
8375{
bb8c093b 8376 return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
b481de9c
ZY
8377}
8378static ssize_t store_debug_level(struct device_driver *d,
8379 const char *buf, size_t count)
8380{
8381 char *p = (char *)buf;
8382 u32 val;
8383
8384 val = simple_strtoul(p, &p, 0);
8385 if (p == buf)
8386 printk(KERN_INFO DRV_NAME
8387 ": %s is not in hex or decimal form.\n", buf);
8388 else
bb8c093b 8389 iwl4965_debug_level = val;
b481de9c
ZY
8390
8391 return strnlen(buf, count);
8392}
8393
8394static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
8395 show_debug_level, store_debug_level);
8396
c8b0e6e1 8397#endif /* CONFIG_IWL4965_DEBUG */
b481de9c
ZY
8398
8399static ssize_t show_rf_kill(struct device *d,
8400 struct device_attribute *attr, char *buf)
8401{
8402 /*
8403 * 0 - RF kill not enabled
8404 * 1 - SW based RF kill active (sysfs)
8405 * 2 - HW based RF kill active
8406 * 3 - Both HW and SW based RF kill active
8407 */
bb8c093b 8408 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8409 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
8410 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
8411
8412 return sprintf(buf, "%i\n", val);
8413}
8414
8415static ssize_t store_rf_kill(struct device *d,
8416 struct device_attribute *attr,
8417 const char *buf, size_t count)
8418{
bb8c093b 8419 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8420
8421 mutex_lock(&priv->mutex);
bb8c093b 8422 iwl4965_radio_kill_sw(priv, buf[0] == '1');
b481de9c
ZY
8423 mutex_unlock(&priv->mutex);
8424
8425 return count;
8426}
8427
8428static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
8429
8430static ssize_t show_temperature(struct device *d,
8431 struct device_attribute *attr, char *buf)
8432{
bb8c093b 8433 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c 8434
bb8c093b 8435 if (!iwl4965_is_alive(priv))
b481de9c
ZY
8436 return -EAGAIN;
8437
bb8c093b 8438 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY
8439}
8440
8441static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8442
8443static ssize_t show_rs_window(struct device *d,
8444 struct device_attribute *attr,
8445 char *buf)
8446{
bb8c093b
CH
8447 struct iwl4965_priv *priv = d->driver_data;
8448 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY
8449}
8450static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8451
8452static ssize_t show_tx_power(struct device *d,
8453 struct device_attribute *attr, char *buf)
8454{
bb8c093b 8455 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8456 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8457}
8458
8459static ssize_t store_tx_power(struct device *d,
8460 struct device_attribute *attr,
8461 const char *buf, size_t count)
8462{
bb8c093b 8463 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8464 char *p = (char *)buf;
8465 u32 val;
8466
8467 val = simple_strtoul(p, &p, 10);
8468 if (p == buf)
8469 printk(KERN_INFO DRV_NAME
8470 ": %s is not in decimal form.\n", buf);
8471 else
bb8c093b 8472 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY
8473
8474 return count;
8475}
8476
8477static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8478
8479static ssize_t show_flags(struct device *d,
8480 struct device_attribute *attr, char *buf)
8481{
bb8c093b 8482 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8483
8484 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8485}
8486
8487static ssize_t store_flags(struct device *d,
8488 struct device_attribute *attr,
8489 const char *buf, size_t count)
8490{
bb8c093b 8491 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8492 u32 flags = simple_strtoul(buf, NULL, 0);
8493
8494 mutex_lock(&priv->mutex);
8495 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8496 /* Cancel any currently running scans... */
bb8c093b 8497 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
8498 IWL_WARNING("Could not cancel scan.\n");
8499 else {
8500 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8501 flags);
8502 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 8503 iwl4965_commit_rxon(priv);
b481de9c
ZY
8504 }
8505 }
8506 mutex_unlock(&priv->mutex);
8507
8508 return count;
8509}
8510
8511static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8512
8513static ssize_t show_filter_flags(struct device *d,
8514 struct device_attribute *attr, char *buf)
8515{
bb8c093b 8516 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8517
8518 return sprintf(buf, "0x%04X\n",
8519 le32_to_cpu(priv->active_rxon.filter_flags));
8520}
8521
8522static ssize_t store_filter_flags(struct device *d,
8523 struct device_attribute *attr,
8524 const char *buf, size_t count)
8525{
bb8c093b 8526 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8527 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8528
8529 mutex_lock(&priv->mutex);
8530 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8531 /* Cancel any currently running scans... */
bb8c093b 8532 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
8533 IWL_WARNING("Could not cancel scan.\n");
8534 else {
8535 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8536 "0x%04X\n", filter_flags);
8537 priv->staging_rxon.filter_flags =
8538 cpu_to_le32(filter_flags);
bb8c093b 8539 iwl4965_commit_rxon(priv);
b481de9c
ZY
8540 }
8541 }
8542 mutex_unlock(&priv->mutex);
8543
8544 return count;
8545}
8546
8547static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8548 store_filter_flags);
8549
8550static ssize_t show_tune(struct device *d,
8551 struct device_attribute *attr, char *buf)
8552{
bb8c093b 8553 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8554
8555 return sprintf(buf, "0x%04X\n",
8556 (priv->phymode << 8) |
8557 le16_to_cpu(priv->active_rxon.channel));
8558}
8559
bb8c093b 8560static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
b481de9c
ZY
8561
8562static ssize_t store_tune(struct device *d,
8563 struct device_attribute *attr,
8564 const char *buf, size_t count)
8565{
bb8c093b 8566 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
b481de9c
ZY
8567 char *p = (char *)buf;
8568 u16 tune = simple_strtoul(p, &p, 0);
8569 u8 phymode = (tune >> 8) & 0xff;
8570 u16 channel = tune & 0xff;
8571
8572 IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
8573
8574 mutex_lock(&priv->mutex);
8575 if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
8576 (priv->phymode != phymode)) {
bb8c093b 8577 const struct iwl4965_channel_info *ch_info;
b481de9c 8578
bb8c093b 8579 ch_info = iwl4965_get_channel_info(priv, phymode, channel);
b481de9c
ZY
8580 if (!ch_info) {
8581 IWL_WARNING("Requested invalid phymode/channel "
8582 "combination: %d %d\n", phymode, channel);
8583 mutex_unlock(&priv->mutex);
8584 return -EINVAL;
8585 }
8586
8587 /* Cancel any currently running scans... */
bb8c093b 8588 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY
8589 IWL_WARNING("Could not cancel scan.\n");
8590 else {
8591 IWL_DEBUG_INFO("Committing phymode and "
8592 "rxon.channel = %d %d\n",
8593 phymode, channel);
8594
bb8c093b
CH
8595 iwl4965_set_rxon_channel(priv, phymode, channel);
8596 iwl4965_set_flags_for_phymode(priv, phymode);
b481de9c 8597
bb8c093b
CH
8598 iwl4965_set_rate(priv);
8599 iwl4965_commit_rxon(priv);
b481de9c
ZY
8600 }
8601 }
8602 mutex_unlock(&priv->mutex);
8603
8604 return count;
8605}
8606
8607static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
8608
c8b0e6e1 8609#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
8610
8611static ssize_t show_measurement(struct device *d,
8612 struct device_attribute *attr, char *buf)
8613{
bb8c093b
CH
8614 struct iwl4965_priv *priv = dev_get_drvdata(d);
8615 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY
8616 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8617 u8 *data = (u8 *) & measure_report;
8618 unsigned long flags;
8619
8620 spin_lock_irqsave(&priv->lock, flags);
8621 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8622 spin_unlock_irqrestore(&priv->lock, flags);
8623 return 0;
8624 }
8625 memcpy(&measure_report, &priv->measure_report, size);
8626 priv->measurement_status = 0;
8627 spin_unlock_irqrestore(&priv->lock, flags);
8628
8629 while (size && (PAGE_SIZE - len)) {
8630 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8631 PAGE_SIZE - len, 1);
8632 len = strlen(buf);
8633 if (PAGE_SIZE - len)
8634 buf[len++] = '\n';
8635
8636 ofs += 16;
8637 size -= min(size, 16U);
8638 }
8639
8640 return len;
8641}
8642
8643static ssize_t store_measurement(struct device *d,
8644 struct device_attribute *attr,
8645 const char *buf, size_t count)
8646{
bb8c093b 8647 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
8648 struct ieee80211_measurement_params params = {
8649 .channel = le16_to_cpu(priv->active_rxon.channel),
8650 .start_time = cpu_to_le64(priv->last_tsf),
8651 .duration = cpu_to_le16(1),
8652 };
8653 u8 type = IWL_MEASURE_BASIC;
8654 u8 buffer[32];
8655 u8 channel;
8656
8657 if (count) {
8658 char *p = buffer;
8659 strncpy(buffer, buf, min(sizeof(buffer), count));
8660 channel = simple_strtoul(p, NULL, 0);
8661 if (channel)
8662 params.channel = channel;
8663
8664 p = buffer;
8665 while (*p && *p != ' ')
8666 p++;
8667 if (*p)
8668 type = simple_strtoul(p + 1, NULL, 0);
8669 }
8670
8671 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8672 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 8673 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY
8674
8675 return count;
8676}
8677
8678static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8679 show_measurement, store_measurement);
c8b0e6e1 8680#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY
8681
8682static ssize_t store_retry_rate(struct device *d,
8683 struct device_attribute *attr,
8684 const char *buf, size_t count)
8685{
bb8c093b 8686 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
8687
8688 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8689 if (priv->retry_rate <= 0)
8690 priv->retry_rate = 1;
8691
8692 return count;
8693}
8694
8695static ssize_t show_retry_rate(struct device *d,
8696 struct device_attribute *attr, char *buf)
8697{
bb8c093b 8698 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
8699 return sprintf(buf, "%d", priv->retry_rate);
8700}
8701
8702static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8703 store_retry_rate);
8704
8705static ssize_t store_power_level(struct device *d,
8706 struct device_attribute *attr,
8707 const char *buf, size_t count)
8708{
bb8c093b 8709 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
8710 int rc;
8711 int mode;
8712
8713 mode = simple_strtoul(buf, NULL, 0);
8714 mutex_lock(&priv->mutex);
8715
bb8c093b 8716 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY
8717 rc = -EAGAIN;
8718 goto out;
8719 }
8720
8721 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8722 mode = IWL_POWER_AC;
8723 else
8724 mode |= IWL_POWER_ENABLED;
8725
8726 if (mode != priv->power_mode) {
bb8c093b 8727 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY
8728 if (rc) {
8729 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8730 goto out;
8731 }
8732 priv->power_mode = mode;
8733 }
8734
8735 rc = count;
8736
8737 out:
8738 mutex_unlock(&priv->mutex);
8739 return rc;
8740}
8741
8742#define MAX_WX_STRING 80
8743
8744/* Values are in microsecond */
8745static const s32 timeout_duration[] = {
8746 350000,
8747 250000,
8748 75000,
8749 37000,
8750 25000,
8751};
8752static const s32 period_duration[] = {
8753 400000,
8754 700000,
8755 1000000,
8756 1000000,
8757 1000000
8758};
8759
8760static ssize_t show_power_level(struct device *d,
8761 struct device_attribute *attr, char *buf)
8762{
bb8c093b 8763 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
8764 int level = IWL_POWER_LEVEL(priv->power_mode);
8765 char *p = buf;
8766
8767 p += sprintf(p, "%d ", level);
8768 switch (level) {
8769 case IWL_POWER_MODE_CAM:
8770 case IWL_POWER_AC:
8771 p += sprintf(p, "(AC)");
8772 break;
8773 case IWL_POWER_BATTERY:
8774 p += sprintf(p, "(BATTERY)");
8775 break;
8776 default:
8777 p += sprintf(p,
8778 "(Timeout %dms, Period %dms)",
8779 timeout_duration[level - 1] / 1000,
8780 period_duration[level - 1] / 1000);
8781 }
8782
8783 if (!(priv->power_mode & IWL_POWER_ENABLED))
8784 p += sprintf(p, " OFF\n");
8785 else
8786 p += sprintf(p, " \n");
8787
8788 return (p - buf + 1);
8789
8790}
8791
8792static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8793 store_power_level);
8794
8795static ssize_t show_channels(struct device *d,
8796 struct device_attribute *attr, char *buf)
8797{
bb8c093b 8798 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
8799 int len = 0, i;
8800 struct ieee80211_channel *channels = NULL;
8801 const struct ieee80211_hw_mode *hw_mode = NULL;
8802 int count = 0;
8803
bb8c093b 8804 if (!iwl4965_is_ready(priv))
b481de9c
ZY
8805 return -EAGAIN;
8806
bb8c093b 8807 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
b481de9c 8808 if (!hw_mode)
bb8c093b 8809 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
b481de9c
ZY
8810 if (hw_mode) {
8811 channels = hw_mode->channels;
8812 count = hw_mode->num_channels;
8813 }
8814
8815 len +=
8816 sprintf(&buf[len],
8817 "Displaying %d channels in 2.4GHz band "
8818 "(802.11bg):\n", count);
8819
8820 for (i = 0; i < count; i++)
8821 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8822 channels[i].chan,
8823 channels[i].power_level,
8824 channels[i].
8825 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8826 " (IEEE 802.11h required)" : "",
8827 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8828 || (channels[i].
8829 flag &
8830 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8831 ", IBSS",
8832 channels[i].
8833 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8834 "active/passive" : "passive only");
8835
bb8c093b 8836 hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
b481de9c
ZY
8837 if (hw_mode) {
8838 channels = hw_mode->channels;
8839 count = hw_mode->num_channels;
8840 } else {
8841 channels = NULL;
8842 count = 0;
8843 }
8844
8845 len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
8846 "(802.11a):\n", count);
8847
8848 for (i = 0; i < count; i++)
8849 len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
8850 channels[i].chan,
8851 channels[i].power_level,
8852 channels[i].
8853 flag & IEEE80211_CHAN_W_RADAR_DETECT ?
8854 " (IEEE 802.11h required)" : "",
8855 (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
8856 || (channels[i].
8857 flag &
8858 IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
8859 ", IBSS",
8860 channels[i].
8861 flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
8862 "active/passive" : "passive only");
8863
8864 return len;
8865}
8866
8867static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8868
8869static ssize_t show_statistics(struct device *d,
8870 struct device_attribute *attr, char *buf)
8871{
bb8c093b
CH
8872 struct iwl4965_priv *priv = dev_get_drvdata(d);
8873 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY
8874 u32 len = 0, ofs = 0;
8875 u8 *data = (u8 *) & priv->statistics;
8876 int rc = 0;
8877
bb8c093b 8878 if (!iwl4965_is_alive(priv))
b481de9c
ZY
8879 return -EAGAIN;
8880
8881 mutex_lock(&priv->mutex);
bb8c093b 8882 rc = iwl4965_send_statistics_request(priv);
b481de9c
ZY
8883 mutex_unlock(&priv->mutex);
8884
8885 if (rc) {
8886 len = sprintf(buf,
8887 "Error sending statistics request: 0x%08X\n", rc);
8888 return len;
8889 }
8890
8891 while (size && (PAGE_SIZE - len)) {
8892 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8893 PAGE_SIZE - len, 1);
8894 len = strlen(buf);
8895 if (PAGE_SIZE - len)
8896 buf[len++] = '\n';
8897
8898 ofs += 16;
8899 size -= min(size, 16U);
8900 }
8901
8902 return len;
8903}
8904
8905static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8906
8907static ssize_t show_antenna(struct device *d,
8908 struct device_attribute *attr, char *buf)
8909{
bb8c093b 8910 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c 8911
bb8c093b 8912 if (!iwl4965_is_alive(priv))
b481de9c
ZY
8913 return -EAGAIN;
8914
8915 return sprintf(buf, "%d\n", priv->antenna);
8916}
8917
8918static ssize_t store_antenna(struct device *d,
8919 struct device_attribute *attr,
8920 const char *buf, size_t count)
8921{
8922 int ant;
bb8c093b 8923 struct iwl4965_priv *priv = dev_get_drvdata(d);
b481de9c
ZY
8924
8925 if (count == 0)
8926 return 0;
8927
8928 if (sscanf(buf, "%1i", &ant) != 1) {
8929 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8930 return count;
8931 }
8932
8933 if ((ant >= 0) && (ant <= 2)) {
8934 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 8935 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY
8936 } else
8937 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8938
8939
8940 return count;
8941}
8942
8943static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8944
8945static ssize_t show_status(struct device *d,
8946 struct device_attribute *attr, char *buf)
8947{
bb8c093b
CH
8948 struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
8949 if (!iwl4965_is_alive(priv))
b481de9c
ZY
8950 return -EAGAIN;
8951 return sprintf(buf, "0x%08x\n", (int)priv->status);
8952}
8953
8954static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8955
8956static ssize_t dump_error_log(struct device *d,
8957 struct device_attribute *attr,
8958 const char *buf, size_t count)
8959{
8960 char *p = (char *)buf;
8961
8962 if (p[0] == '1')
bb8c093b 8963 iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
b481de9c
ZY
8964
8965 return strnlen(buf, count);
8966}
8967
8968static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8969
8970static ssize_t dump_event_log(struct device *d,
8971 struct device_attribute *attr,
8972 const char *buf, size_t count)
8973{
8974 char *p = (char *)buf;
8975
8976 if (p[0] == '1')
bb8c093b 8977 iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
b481de9c
ZY
8978
8979 return strnlen(buf, count);
8980}
8981
8982static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8983
8984/*****************************************************************************
8985 *
8986 * driver setup and teardown
8987 *
8988 *****************************************************************************/
8989
bb8c093b 8990static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
b481de9c
ZY
8991{
8992 priv->workqueue = create_workqueue(DRV_NAME);
8993
8994 init_waitqueue_head(&priv->wait_command_queue);
8995
bb8c093b
CH
8996 INIT_WORK(&priv->up, iwl4965_bg_up);
8997 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8998 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8999 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
9000 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
9001 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
9002 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
9003 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
9004 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
9005 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
9006 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
9007 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
9008
9009 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY
9010
9011 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 9012 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY
9013}
9014
bb8c093b 9015static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
b481de9c 9016{
bb8c093b 9017 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 9018
3ae6a054 9019 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY
9020 cancel_delayed_work(&priv->scan_check);
9021 cancel_delayed_work(&priv->alive_start);
9022 cancel_delayed_work(&priv->post_associate);
9023 cancel_work_sync(&priv->beacon_update);
9024}
9025
bb8c093b 9026static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY
9027 &dev_attr_antenna.attr,
9028 &dev_attr_channels.attr,
9029 &dev_attr_dump_errors.attr,
9030 &dev_attr_dump_events.attr,
9031 &dev_attr_flags.attr,
9032 &dev_attr_filter_flags.attr,
c8b0e6e1 9033#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY
9034 &dev_attr_measurement.attr,
9035#endif
9036 &dev_attr_power_level.attr,
9037 &dev_attr_retry_rate.attr,
9038 &dev_attr_rf_kill.attr,
9039 &dev_attr_rs_window.attr,
9040 &dev_attr_statistics.attr,
9041 &dev_attr_status.attr,
9042 &dev_attr_temperature.attr,
9043 &dev_attr_tune.attr,
9044 &dev_attr_tx_power.attr,
9045
9046 NULL
9047};
9048
bb8c093b 9049static struct attribute_group iwl4965_attribute_group = {
b481de9c 9050 .name = NULL, /* put in device directory */
bb8c093b 9051 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY
9052};
9053
bb8c093b
CH
9054static struct ieee80211_ops iwl4965_hw_ops = {
9055 .tx = iwl4965_mac_tx,
9056 .start = iwl4965_mac_start,
9057 .stop = iwl4965_mac_stop,
9058 .add_interface = iwl4965_mac_add_interface,
9059 .remove_interface = iwl4965_mac_remove_interface,
9060 .config = iwl4965_mac_config,
9061 .config_interface = iwl4965_mac_config_interface,
9062 .configure_filter = iwl4965_configure_filter,
9063 .set_key = iwl4965_mac_set_key,
9064 .get_stats = iwl4965_mac_get_stats,
9065 .get_tx_stats = iwl4965_mac_get_tx_stats,
9066 .conf_tx = iwl4965_mac_conf_tx,
9067 .get_tsf = iwl4965_mac_get_tsf,
9068 .reset_tsf = iwl4965_mac_reset_tsf,
9069 .beacon_update = iwl4965_mac_beacon_update,
9070 .erp_ie_changed = iwl4965_mac_erp_ie_changed,
c8b0e6e1 9071#ifdef CONFIG_IWL4965_HT
bb8c093b
CH
9072 .conf_ht = iwl4965_mac_conf_ht,
9073 .get_ht_capab = iwl4965_mac_get_ht_capab,
c8b0e6e1 9074#ifdef CONFIG_IWL4965_HT_AGG
bb8c093b
CH
9075 .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
9076 .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
9077 .ht_rx_agg_start = iwl4965_mac_ht_rx_agg_start,
9078 .ht_rx_agg_stop = iwl4965_mac_ht_rx_agg_stop,
c8b0e6e1
CH
9079#endif /* CONFIG_IWL4965_HT_AGG */
9080#endif /* CONFIG_IWL4965_HT */
bb8c093b 9081 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY
9082};
9083
bb8c093b 9084static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY
9085{
9086 int err = 0;
bb8c093b 9087 struct iwl4965_priv *priv;
b481de9c
ZY
9088 struct ieee80211_hw *hw;
9089 int i;
9090
6440adb5
BC
9091 /* Disabling hardware scan means that mac80211 will perform scans
9092 * "the hard way", rather than using device's scan. */
bb8c093b 9093 if (iwl4965_param_disable_hw_scan) {
b481de9c 9094 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 9095 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY
9096 }
9097
bb8c093b
CH
9098 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
9099 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
b481de9c
ZY
9100 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
9101 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
9102 err = -EINVAL;
9103 goto out;
9104 }
9105
9106 /* mac80211 allocates memory for this device instance, including
9107 * space for this driver's private structure */
bb8c093b 9108 hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
b481de9c
ZY
9109 if (hw == NULL) {
9110 IWL_ERROR("Can not allocate network device\n");
9111 err = -ENOMEM;
9112 goto out;
9113 }
9114 SET_IEEE80211_DEV(hw, &pdev->dev);
9115
f51359a8
JB
9116 hw->rate_control_algorithm = "iwl-4965-rs";
9117
b481de9c
ZY
9118 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
9119 priv = hw->priv;
9120 priv->hw = hw;
9121
9122 priv->pci_dev = pdev;
bb8c093b 9123 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
c8b0e6e1 9124#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9125 iwl4965_debug_level = iwl4965_param_debug;
b481de9c
ZY
9126 atomic_set(&priv->restrict_refcnt, 0);
9127#endif
9128 priv->retry_rate = 1;
9129
9130 priv->ibss_beacon = NULL;
9131
9132 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
9133 * the range of signal quality values that we'll provide.
9134 * Negative values for level/noise indicate that we'll provide dBm.
9135 * For WE, at least, non-0 values here *enable* display of values
9136 * in app (iwconfig). */
9137 hw->max_rssi = -20; /* signal level, negative indicates dBm */
9138 hw->max_noise = -20; /* noise level, negative indicates dBm */
9139 hw->max_signal = 100; /* link quality indication (%) */
9140
9141 /* Tell mac80211 our Tx characteristics */
9142 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
9143
6440adb5 9144 /* Default value; 4 EDCA QOS priorities */
b481de9c 9145 hw->queues = 4;
c8b0e6e1
CH
9146#ifdef CONFIG_IWL4965_HT
9147#ifdef CONFIG_IWL4965_HT_AGG
6440adb5 9148 /* Enhanced value; more queues, to support 11n aggregation */
b481de9c 9149 hw->queues = 16;
c8b0e6e1
CH
9150#endif /* CONFIG_IWL4965_HT_AGG */
9151#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY
9152
9153 spin_lock_init(&priv->lock);
9154 spin_lock_init(&priv->power_data.lock);
9155 spin_lock_init(&priv->sta_lock);
9156 spin_lock_init(&priv->hcmd_lock);
9157 spin_lock_init(&priv->lq_mngr.lock);
9158
9159 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
9160 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
9161
9162 INIT_LIST_HEAD(&priv->free_frames);
9163
9164 mutex_init(&priv->mutex);
9165 if (pci_enable_device(pdev)) {
9166 err = -ENODEV;
9167 goto out_ieee80211_free_hw;
9168 }
9169
9170 pci_set_master(pdev);
9171
6440adb5 9172 /* Clear the driver's (not device's) station table */
bb8c093b 9173 iwl4965_clear_stations_table(priv);
b481de9c
ZY
9174
9175 priv->data_retry_limit = -1;
9176 priv->ieee_channels = NULL;
9177 priv->ieee_rates = NULL;
9178 priv->phymode = -1;
9179
9180 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
9181 if (!err)
9182 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
9183 if (err) {
9184 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
9185 goto out_pci_disable_device;
9186 }
9187
9188 pci_set_drvdata(pdev, priv);
9189 err = pci_request_regions(pdev, DRV_NAME);
9190 if (err)
9191 goto out_pci_disable_device;
6440adb5 9192
b481de9c
ZY
9193 /* We disable the RETRY_TIMEOUT register (0x41) to keep
9194 * PCI Tx retries from interfering with C3 CPU state */
9195 pci_write_config_byte(pdev, 0x41, 0x00);
6440adb5 9196
b481de9c
ZY
9197 priv->hw_base = pci_iomap(pdev, 0, 0);
9198 if (!priv->hw_base) {
9199 err = -ENODEV;
9200 goto out_pci_release_regions;
9201 }
9202
9203 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
9204 (unsigned long long) pci_resource_len(pdev, 0));
9205 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
9206
9207 /* Initialize module parameter values here */
9208
6440adb5 9209 /* Disable radio (SW RF KILL) via parameter when loading driver */
bb8c093b 9210 if (iwl4965_param_disable) {
b481de9c
ZY
9211 set_bit(STATUS_RF_KILL_SW, &priv->status);
9212 IWL_DEBUG_INFO("Radio disabled.\n");
9213 }
9214
9215 priv->iw_mode = IEEE80211_IF_TYPE_STA;
9216
9217 priv->ps_mode = 0;
9218 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
9219 priv->is_ht_enabled = 1;
9220 priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
9221 priv->valid_antenna = 0x7; /* assume all 3 connected */
9222 priv->ps_mode = IWL_MIMO_PS_NONE;
b481de9c 9223
6440adb5 9224 /* Choose which receivers/antennas to use */
b481de9c
ZY
9225 iwl4965_set_rxon_chain(priv);
9226
9227 printk(KERN_INFO DRV_NAME
9228 ": Detected Intel Wireless WiFi Link 4965AGN\n");
9229
9230 /* Device-specific setup */
bb8c093b 9231 if (iwl4965_hw_set_hw_setting(priv)) {
b481de9c
ZY
9232 IWL_ERROR("failed to set hw settings\n");
9233 mutex_unlock(&priv->mutex);
9234 goto out_iounmap;
9235 }
9236
c8b0e6e1 9237#ifdef CONFIG_IWL4965_QOS
bb8c093b 9238 if (iwl4965_param_qos_enable)
b481de9c
ZY
9239 priv->qos_data.qos_enable = 1;
9240
bb8c093b 9241 iwl4965_reset_qos(priv);
b481de9c
ZY
9242
9243 priv->qos_data.qos_active = 0;
9244 priv->qos_data.qos_cap.val = 0;
c8b0e6e1 9245#endif /* CONFIG_IWL4965_QOS */
b481de9c 9246
bb8c093b
CH
9247 iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
9248 iwl4965_setup_deferred_work(priv);
9249 iwl4965_setup_rx_handlers(priv);
b481de9c
ZY
9250
9251 priv->rates_mask = IWL_RATES_MASK;
9252 /* If power management is turned on, default to AC mode */
9253 priv->power_mode = IWL_POWER_AC;
9254 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
9255
bb8c093b 9256 iwl4965_disable_interrupts(priv);
49df2b33 9257
b481de9c
ZY
9258 pci_enable_msi(pdev);
9259
bb8c093b 9260 err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv);
b481de9c
ZY
9261 if (err) {
9262 IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
9263 goto out_disable_msi;
9264 }
9265
9266 mutex_lock(&priv->mutex);
9267
bb8c093b 9268 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY
9269 if (err) {
9270 IWL_ERROR("failed to create sysfs device attributes\n");
9271 mutex_unlock(&priv->mutex);
9272 goto out_release_irq;
9273 }
9274
9275 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
9276 * ucode filename and max sizes are card-specific. */
bb8c093b 9277 err = iwl4965_read_ucode(priv);
b481de9c
ZY
9278 if (err) {
9279 IWL_ERROR("Could not read microcode: %d\n", err);
9280 mutex_unlock(&priv->mutex);
9281 goto out_pci_alloc;
9282 }
9283
9284 mutex_unlock(&priv->mutex);
9285
01ebd063 9286 IWL_DEBUG_INFO("Queueing UP work.\n");
b481de9c
ZY
9287
9288 queue_work(priv->workqueue, &priv->up);
9289
9290 return 0;
9291
9292 out_pci_alloc:
bb8c093b 9293 iwl4965_dealloc_ucode_pci(priv);
b481de9c 9294
bb8c093b 9295 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY
9296
9297 out_release_irq:
9298 free_irq(pdev->irq, priv);
9299
9300 out_disable_msi:
9301 pci_disable_msi(pdev);
9302 destroy_workqueue(priv->workqueue);
9303 priv->workqueue = NULL;
bb8c093b 9304 iwl4965_unset_hw_setting(priv);
b481de9c
ZY
9305
9306 out_iounmap:
9307 pci_iounmap(pdev, priv->hw_base);
9308 out_pci_release_regions:
9309 pci_release_regions(pdev);
9310 out_pci_disable_device:
9311 pci_disable_device(pdev);
9312 pci_set_drvdata(pdev, NULL);
9313 out_ieee80211_free_hw:
9314 ieee80211_free_hw(priv->hw);
9315 out:
9316 return err;
9317}
9318
bb8c093b 9319static void iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 9320{
bb8c093b 9321 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY
9322 struct list_head *p, *q;
9323 int i;
9324
9325 if (!priv)
9326 return;
9327
9328 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
9329
b481de9c 9330 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 9331
bb8c093b 9332 iwl4965_down(priv);
b481de9c
ZY
9333
9334 /* Free MAC hash list for ADHOC */
9335 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
9336 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
9337 list_del(p);
bb8c093b 9338 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY
9339 }
9340 }
9341
bb8c093b 9342 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 9343
bb8c093b 9344 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY
9345
9346 if (priv->rxq.bd)
bb8c093b
CH
9347 iwl4965_rx_queue_free(priv, &priv->rxq);
9348 iwl4965_hw_txq_ctx_free(priv);
b481de9c 9349
bb8c093b
CH
9350 iwl4965_unset_hw_setting(priv);
9351 iwl4965_clear_stations_table(priv);
b481de9c
ZY
9352
9353 if (priv->mac80211_registered) {
9354 ieee80211_unregister_hw(priv->hw);
bb8c093b 9355 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY
9356 }
9357
948c171c
MA
9358 /*netif_stop_queue(dev); */
9359 flush_workqueue(priv->workqueue);
9360
bb8c093b 9361 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY
9362 * priv->workqueue... so we can't take down the workqueue
9363 * until now... */
9364 destroy_workqueue(priv->workqueue);
9365 priv->workqueue = NULL;
9366
9367 free_irq(pdev->irq, priv);
9368 pci_disable_msi(pdev);
9369 pci_iounmap(pdev, priv->hw_base);
9370 pci_release_regions(pdev);
9371 pci_disable_device(pdev);
9372 pci_set_drvdata(pdev, NULL);
9373
9374 kfree(priv->channel_info);
9375
9376 kfree(priv->ieee_channels);
9377 kfree(priv->ieee_rates);
9378
9379 if (priv->ibss_beacon)
9380 dev_kfree_skb(priv->ibss_beacon);
9381
9382 ieee80211_free_hw(priv->hw);
9383}
9384
9385#ifdef CONFIG_PM
9386
bb8c093b 9387static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 9388{
bb8c093b 9389 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c 9390
b481de9c
ZY
9391 set_bit(STATUS_IN_SUSPEND, &priv->status);
9392
9393 /* Take down the device; powers it off, etc. */
bb8c093b 9394 iwl4965_down(priv);
b481de9c
ZY
9395
9396 if (priv->mac80211_registered)
9397 ieee80211_stop_queues(priv->hw);
9398
9399 pci_save_state(pdev);
9400 pci_disable_device(pdev);
9401 pci_set_power_state(pdev, PCI_D3hot);
9402
b481de9c
ZY
9403 return 0;
9404}
9405
bb8c093b 9406static void iwl4965_resume(struct iwl4965_priv *priv)
b481de9c
ZY
9407{
9408 unsigned long flags;
9409
9410 /* The following it a temporary work around due to the
9411 * suspend / resume not fully initializing the NIC correctly.
9412 * Without all of the following, resume will not attempt to take
9413 * down the NIC (it shouldn't really need to) and will just try
9414 * and bring the NIC back up. However that fails during the
bb8c093b
CH
9415 * ucode verification process. This then causes iwl4965_down to be
9416 * called *after* iwl4965_hw_nic_init() has succeeded -- which
b481de9c
ZY
9417 * then lets the next init sequence succeed. So, we've
9418 * replicated all of that NIC init code here... */
9419
bb8c093b 9420 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 9421
bb8c093b 9422 iwl4965_hw_nic_init(priv);
b481de9c 9423
bb8c093b
CH
9424 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9425 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 9426 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH
9427 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
9428 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
9429 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY
9430
9431 /* tell the device to stop sending interrupts */
bb8c093b 9432 iwl4965_disable_interrupts(priv);
b481de9c
ZY
9433
9434 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 9435 iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c 9436
bb8c093b
CH
9437 if (!iwl4965_grab_nic_access(priv)) {
9438 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
ac17a947 9439 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 9440 iwl4965_release_nic_access(priv);
b481de9c
ZY
9441 }
9442 spin_unlock_irqrestore(&priv->lock, flags);
9443
9444 udelay(5);
9445
bb8c093b 9446 iwl4965_hw_nic_reset(priv);
b481de9c
ZY
9447
9448 /* Bring the device back up */
9449 clear_bit(STATUS_IN_SUSPEND, &priv->status);
9450 queue_work(priv->workqueue, &priv->up);
9451}
9452
bb8c093b 9453static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 9454{
bb8c093b 9455 struct iwl4965_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY
9456 int err;
9457
9458 printk(KERN_INFO "Coming out of suspend...\n");
9459
b481de9c
ZY
9460 pci_set_power_state(pdev, PCI_D0);
9461 err = pci_enable_device(pdev);
9462 pci_restore_state(pdev);
9463
9464 /*
9465 * Suspend/Resume resets the PCI configuration space, so we have to
9466 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
9467 * from interfering with C3 CPU state. pci_restore_state won't help
9468 * here since it only restores the first 64 bytes pci config header.
9469 */
9470 pci_write_config_byte(pdev, 0x41, 0x00);
9471
bb8c093b 9472 iwl4965_resume(priv);
b481de9c
ZY
9473
9474 return 0;
9475}
9476
9477#endif /* CONFIG_PM */
9478
9479/*****************************************************************************
9480 *
9481 * driver and module entry point
9482 *
9483 *****************************************************************************/
9484
bb8c093b 9485static struct pci_driver iwl4965_driver = {
b481de9c 9486 .name = DRV_NAME,
bb8c093b
CH
9487 .id_table = iwl4965_hw_card_ids,
9488 .probe = iwl4965_pci_probe,
9489 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 9490#ifdef CONFIG_PM
bb8c093b
CH
9491 .suspend = iwl4965_pci_suspend,
9492 .resume = iwl4965_pci_resume,
b481de9c
ZY
9493#endif
9494};
9495
bb8c093b 9496static int __init iwl4965_init(void)
b481de9c
ZY
9497{
9498
9499 int ret;
9500 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
9501 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
bb8c093b 9502 ret = pci_register_driver(&iwl4965_driver);
b481de9c
ZY
9503 if (ret) {
9504 IWL_ERROR("Unable to initialize PCI module\n");
9505 return ret;
9506 }
c8b0e6e1 9507#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9508 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c
ZY
9509 if (ret) {
9510 IWL_ERROR("Unable to create driver sysfs file\n");
bb8c093b 9511 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY
9512 return ret;
9513 }
9514#endif
9515
9516 return ret;
9517}
9518
bb8c093b 9519static void __exit iwl4965_exit(void)
b481de9c 9520{
c8b0e6e1 9521#ifdef CONFIG_IWL4965_DEBUG
bb8c093b 9522 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c 9523#endif
bb8c093b 9524 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY
9525}
9526
bb8c093b 9527module_param_named(antenna, iwl4965_param_antenna, int, 0444);
b481de9c 9528MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
bb8c093b 9529module_param_named(disable, iwl4965_param_disable, int, 0444);
b481de9c 9530MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
bb8c093b 9531module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
b481de9c
ZY
9532MODULE_PARM_DESC(hwcrypto,
9533 "using hardware crypto engine (default 0 [software])\n");
bb8c093b 9534module_param_named(debug, iwl4965_param_debug, int, 0444);
b481de9c 9535MODULE_PARM_DESC(debug, "debug output mask");
bb8c093b 9536module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
b481de9c
ZY
9537MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
9538
bb8c093b 9539module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
b481de9c
ZY
9540MODULE_PARM_DESC(queues_num, "number of hw queues.");
9541
9542/* QoS */
bb8c093b 9543module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
b481de9c
ZY
9544MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9545
bb8c093b
CH
9546module_exit(iwl4965_exit);
9547module_init(iwl4965_init);