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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/version.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/skbuff.h> | |
38 | #include <linux/netdevice.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/firmware.h> | |
b481de9c ZY |
41 | #include <linux/etherdevice.h> |
42 | #include <linux/if_arp.h> | |
43 | ||
b481de9c ZY |
44 | #include <net/mac80211.h> |
45 | ||
46 | #include <asm/div64.h> | |
47 | ||
6bc913bd | 48 | #include "iwl-eeprom.h" |
82b9a121 | 49 | #include "iwl-core.h" |
b481de9c ZY |
50 | #include "iwl-4965.h" |
51 | #include "iwl-helpers.h" | |
52 | ||
c79dd5b5 | 53 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 54 | struct iwl4965_tx_queue *txq); |
416e1438 | 55 | |
b481de9c ZY |
56 | /****************************************************************************** |
57 | * | |
58 | * module boiler plate | |
59 | * | |
60 | ******************************************************************************/ | |
61 | ||
62 | /* module parameters */ | |
00acbc91 AK |
63 | struct iwl_mod_params iwl4965_mod_params = { |
64 | .num_of_queues = IWL_MAX_NUM_QUEUES, | |
65 | .enable_qos = 1, | |
66 | .amsdu_size_8K = 1, | |
67 | /* the rest are 0 by default */ | |
68 | }; | |
b481de9c ZY |
69 | |
70 | /* | |
71 | * module name, copyright, version, etc. | |
72 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
73 | */ | |
74 | ||
75 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | |
76 | ||
0a6857e7 | 77 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
78 | #define VD "d" |
79 | #else | |
80 | #define VD | |
81 | #endif | |
82 | ||
c8b0e6e1 | 83 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
84 | #define VS "s" |
85 | #else | |
86 | #define VS | |
87 | #endif | |
88 | ||
df48c323 | 89 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 90 | |
b481de9c ZY |
91 | |
92 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
93 | MODULE_VERSION(DRV_VERSION); | |
94 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
95 | MODULE_LICENSE("GPL"); | |
96 | ||
97 | __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr) | |
98 | { | |
99 | u16 fc = le16_to_cpu(hdr->frame_control); | |
100 | int hdr_len = ieee80211_get_hdrlen(fc); | |
101 | ||
102 | if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA)) | |
103 | return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN); | |
104 | return NULL; | |
105 | } | |
106 | ||
8318d78a | 107 | static const struct ieee80211_supported_band *iwl4965_get_hw_mode( |
c79dd5b5 | 108 | struct iwl_priv *priv, enum ieee80211_band band) |
b481de9c | 109 | { |
8318d78a | 110 | return priv->hw->wiphy->bands[band]; |
b481de9c ZY |
111 | } |
112 | ||
bb8c093b | 113 | static int iwl4965_is_empty_essid(const char *essid, int essid_len) |
b481de9c ZY |
114 | { |
115 | /* Single white space is for Linksys APs */ | |
116 | if (essid_len == 1 && essid[0] == ' ') | |
117 | return 1; | |
118 | ||
119 | /* Otherwise, if the entire essid is 0, we assume it is hidden */ | |
120 | while (essid_len) { | |
121 | essid_len--; | |
122 | if (essid[essid_len] != '\0') | |
123 | return 0; | |
124 | } | |
125 | ||
126 | return 1; | |
127 | } | |
128 | ||
bb8c093b | 129 | static const char *iwl4965_escape_essid(const char *essid, u8 essid_len) |
b481de9c ZY |
130 | { |
131 | static char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | |
132 | const char *s = essid; | |
133 | char *d = escaped; | |
134 | ||
bb8c093b | 135 | if (iwl4965_is_empty_essid(essid, essid_len)) { |
b481de9c ZY |
136 | memcpy(escaped, "<hidden>", sizeof("<hidden>")); |
137 | return escaped; | |
138 | } | |
139 | ||
140 | essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE); | |
141 | while (essid_len--) { | |
142 | if (*s == '\0') { | |
143 | *d++ = '\\'; | |
144 | *d++ = '0'; | |
145 | s++; | |
146 | } else | |
147 | *d++ = *s++; | |
148 | } | |
149 | *d = '\0'; | |
150 | return escaped; | |
151 | } | |
152 | ||
b481de9c ZY |
153 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** |
154 | * DMA services | |
155 | * | |
156 | * Theory of operation | |
157 | * | |
6440adb5 BC |
158 | * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer |
159 | * of buffer descriptors, each of which points to one or more data buffers for | |
160 | * the device to read from or fill. Driver and device exchange status of each | |
161 | * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty | |
162 | * entries in each circular buffer, to protect against confusing empty and full | |
163 | * queue states. | |
164 | * | |
165 | * The device reads or writes the data in the queues via the device's several | |
166 | * DMA/FIFO channels. Each queue is mapped to a single DMA channel. | |
b481de9c ZY |
167 | * |
168 | * For Tx queue, there are low mark and high mark limits. If, after queuing | |
169 | * the packet for Tx, free space become < low mark, Tx queue stopped. When | |
170 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | |
171 | * Tx queue resumed. | |
172 | * | |
6440adb5 BC |
173 | * The 4965 operates with up to 17 queues: One receive queue, one transmit |
174 | * queue (#4) for sending commands to the device firmware, and 15 other | |
175 | * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels. | |
e3851447 BC |
176 | * |
177 | * See more detailed info in iwl-4965-hw.h. | |
b481de9c ZY |
178 | ***************************************************/ |
179 | ||
fe01b477 | 180 | int iwl4965_queue_space(const struct iwl4965_queue *q) |
b481de9c | 181 | { |
fc4b6853 | 182 | int s = q->read_ptr - q->write_ptr; |
b481de9c | 183 | |
fc4b6853 | 184 | if (q->read_ptr > q->write_ptr) |
b481de9c ZY |
185 | s -= q->n_bd; |
186 | ||
187 | if (s <= 0) | |
188 | s += q->n_window; | |
189 | /* keep some reserve to not confuse empty and full situations */ | |
190 | s -= 2; | |
191 | if (s < 0) | |
192 | s = 0; | |
193 | return s; | |
194 | } | |
195 | ||
b481de9c | 196 | |
bb8c093b | 197 | static inline int x2_queue_used(const struct iwl4965_queue *q, int i) |
b481de9c | 198 | { |
fc4b6853 TW |
199 | return q->write_ptr > q->read_ptr ? |
200 | (i >= q->read_ptr && i < q->write_ptr) : | |
201 | !(i < q->read_ptr && i >= q->write_ptr); | |
b481de9c ZY |
202 | } |
203 | ||
bb8c093b | 204 | static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge) |
b481de9c | 205 | { |
6440adb5 | 206 | /* This is for scan command, the big buffer at end of command array */ |
b481de9c | 207 | if (is_huge) |
6440adb5 | 208 | return q->n_window; /* must be power of 2 */ |
b481de9c | 209 | |
6440adb5 | 210 | /* Otherwise, use normal size buffers */ |
b481de9c ZY |
211 | return index & (q->n_window - 1); |
212 | } | |
213 | ||
6440adb5 BC |
214 | /** |
215 | * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes | |
216 | */ | |
c79dd5b5 | 217 | static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q, |
b481de9c ZY |
218 | int count, int slots_num, u32 id) |
219 | { | |
220 | q->n_bd = count; | |
221 | q->n_window = slots_num; | |
222 | q->id = id; | |
223 | ||
c54b679d TW |
224 | /* count must be power-of-two size, otherwise iwl_queue_inc_wrap |
225 | * and iwl_queue_dec_wrap are broken. */ | |
b481de9c ZY |
226 | BUG_ON(!is_power_of_2(count)); |
227 | ||
228 | /* slots_num must be power-of-two size, otherwise | |
229 | * get_cmd_index is broken. */ | |
230 | BUG_ON(!is_power_of_2(slots_num)); | |
231 | ||
232 | q->low_mark = q->n_window / 4; | |
233 | if (q->low_mark < 4) | |
234 | q->low_mark = 4; | |
235 | ||
236 | q->high_mark = q->n_window / 8; | |
237 | if (q->high_mark < 2) | |
238 | q->high_mark = 2; | |
239 | ||
fc4b6853 | 240 | q->write_ptr = q->read_ptr = 0; |
b481de9c ZY |
241 | |
242 | return 0; | |
243 | } | |
244 | ||
6440adb5 BC |
245 | /** |
246 | * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue | |
247 | */ | |
c79dd5b5 | 248 | static int iwl4965_tx_queue_alloc(struct iwl_priv *priv, |
bb8c093b | 249 | struct iwl4965_tx_queue *txq, u32 id) |
b481de9c ZY |
250 | { |
251 | struct pci_dev *dev = priv->pci_dev; | |
252 | ||
6440adb5 BC |
253 | /* Driver private data, only for Tx (not command) queues, |
254 | * not shared with device. */ | |
b481de9c ZY |
255 | if (id != IWL_CMD_QUEUE_NUM) { |
256 | txq->txb = kmalloc(sizeof(txq->txb[0]) * | |
257 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | |
258 | if (!txq->txb) { | |
01ebd063 | 259 | IWL_ERROR("kmalloc for auxiliary BD " |
b481de9c ZY |
260 | "structures failed\n"); |
261 | goto error; | |
262 | } | |
263 | } else | |
264 | txq->txb = NULL; | |
265 | ||
6440adb5 BC |
266 | /* Circular buffer of transmit frame descriptors (TFDs), |
267 | * shared with device */ | |
b481de9c ZY |
268 | txq->bd = pci_alloc_consistent(dev, |
269 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX, | |
270 | &txq->q.dma_addr); | |
271 | ||
272 | if (!txq->bd) { | |
273 | IWL_ERROR("pci_alloc_consistent(%zd) failed\n", | |
274 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX); | |
275 | goto error; | |
276 | } | |
277 | txq->q.id = id; | |
278 | ||
279 | return 0; | |
280 | ||
281 | error: | |
282 | if (txq->txb) { | |
283 | kfree(txq->txb); | |
284 | txq->txb = NULL; | |
285 | } | |
286 | ||
287 | return -ENOMEM; | |
288 | } | |
289 | ||
8b6eaea8 BC |
290 | /** |
291 | * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue | |
292 | */ | |
c79dd5b5 | 293 | int iwl4965_tx_queue_init(struct iwl_priv *priv, |
bb8c093b | 294 | struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id) |
b481de9c ZY |
295 | { |
296 | struct pci_dev *dev = priv->pci_dev; | |
297 | int len; | |
298 | int rc = 0; | |
299 | ||
8b6eaea8 BC |
300 | /* |
301 | * Alloc buffer array for commands (Tx or other types of commands). | |
302 | * For the command queue (#4), allocate command space + one big | |
303 | * command for scan, since scan command is very huge; the system will | |
304 | * not have two scans at the same time, so only one is needed. | |
bb54244b | 305 | * For normal Tx queues (all other queues), no super-size command |
8b6eaea8 BC |
306 | * space is needed. |
307 | */ | |
857485c0 | 308 | len = sizeof(struct iwl_cmd) * slots_num; |
b481de9c ZY |
309 | if (txq_id == IWL_CMD_QUEUE_NUM) |
310 | len += IWL_MAX_SCAN_SIZE; | |
311 | txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd); | |
312 | if (!txq->cmd) | |
313 | return -ENOMEM; | |
314 | ||
8b6eaea8 | 315 | /* Alloc driver data array and TFD circular buffer */ |
bb8c093b | 316 | rc = iwl4965_tx_queue_alloc(priv, txq, txq_id); |
b481de9c ZY |
317 | if (rc) { |
318 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | |
319 | ||
320 | return -ENOMEM; | |
321 | } | |
322 | txq->need_update = 0; | |
323 | ||
324 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise | |
c54b679d | 325 | * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ |
b481de9c | 326 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); |
8b6eaea8 BC |
327 | |
328 | /* Initialize queue's high/low-water marks, and head/tail indexes */ | |
bb8c093b | 329 | iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); |
b481de9c | 330 | |
8b6eaea8 | 331 | /* Tell device where to find queue */ |
bb8c093b | 332 | iwl4965_hw_tx_queue_init(priv, txq); |
b481de9c ZY |
333 | |
334 | return 0; | |
335 | } | |
336 | ||
337 | /** | |
bb8c093b | 338 | * iwl4965_tx_queue_free - Deallocate DMA queue. |
b481de9c ZY |
339 | * @txq: Transmit queue to deallocate. |
340 | * | |
341 | * Empty queue by removing and destroying all BD's. | |
6440adb5 BC |
342 | * Free all buffers. |
343 | * 0-fill, but do not free "txq" descriptor structure. | |
b481de9c | 344 | */ |
c79dd5b5 | 345 | void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq) |
b481de9c | 346 | { |
bb8c093b | 347 | struct iwl4965_queue *q = &txq->q; |
b481de9c ZY |
348 | struct pci_dev *dev = priv->pci_dev; |
349 | int len; | |
350 | ||
351 | if (q->n_bd == 0) | |
352 | return; | |
353 | ||
354 | /* first, empty all BD's */ | |
fc4b6853 | 355 | for (; q->write_ptr != q->read_ptr; |
c54b679d | 356 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) |
bb8c093b | 357 | iwl4965_hw_txq_free_tfd(priv, txq); |
b481de9c | 358 | |
857485c0 | 359 | len = sizeof(struct iwl_cmd) * q->n_window; |
b481de9c ZY |
360 | if (q->id == IWL_CMD_QUEUE_NUM) |
361 | len += IWL_MAX_SCAN_SIZE; | |
362 | ||
6440adb5 | 363 | /* De-alloc array of command/tx buffers */ |
b481de9c ZY |
364 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); |
365 | ||
6440adb5 | 366 | /* De-alloc circular buffer of TFDs */ |
b481de9c | 367 | if (txq->q.n_bd) |
bb8c093b | 368 | pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) * |
b481de9c ZY |
369 | txq->q.n_bd, txq->bd, txq->q.dma_addr); |
370 | ||
6440adb5 | 371 | /* De-alloc array of per-TFD driver data */ |
b481de9c ZY |
372 | if (txq->txb) { |
373 | kfree(txq->txb); | |
374 | txq->txb = NULL; | |
375 | } | |
376 | ||
6440adb5 | 377 | /* 0-fill queue descriptor structure */ |
b481de9c ZY |
378 | memset(txq, 0, sizeof(*txq)); |
379 | } | |
380 | ||
bb8c093b | 381 | const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
b481de9c ZY |
382 | |
383 | /*************** STATION TABLE MANAGEMENT **** | |
9fbab516 | 384 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
385 | * the functionality provided here |
386 | */ | |
387 | ||
388 | /**************************************************************/ | |
389 | ||
01ebd063 | 390 | #if 0 /* temporary disable till we add real remove station */ |
6440adb5 BC |
391 | /** |
392 | * iwl4965_remove_station - Remove driver's knowledge of station. | |
393 | * | |
394 | * NOTE: This does not remove station from device's station table. | |
395 | */ | |
c79dd5b5 | 396 | static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap) |
b481de9c ZY |
397 | { |
398 | int index = IWL_INVALID_STATION; | |
399 | int i; | |
400 | unsigned long flags; | |
401 | ||
402 | spin_lock_irqsave(&priv->sta_lock, flags); | |
403 | ||
404 | if (is_ap) | |
405 | index = IWL_AP_ID; | |
406 | else if (is_broadcast_ether_addr(addr)) | |
407 | index = priv->hw_setting.bcast_sta_id; | |
408 | else | |
409 | for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) | |
410 | if (priv->stations[i].used && | |
411 | !compare_ether_addr(priv->stations[i].sta.sta.addr, | |
412 | addr)) { | |
413 | index = i; | |
414 | break; | |
415 | } | |
416 | ||
417 | if (unlikely(index == IWL_INVALID_STATION)) | |
418 | goto out; | |
419 | ||
420 | if (priv->stations[index].used) { | |
421 | priv->stations[index].used = 0; | |
422 | priv->num_stations--; | |
423 | } | |
424 | ||
425 | BUG_ON(priv->num_stations < 0); | |
426 | ||
427 | out: | |
428 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
429 | return 0; | |
430 | } | |
556f8db7 | 431 | #endif |
b481de9c | 432 | |
6440adb5 BC |
433 | /** |
434 | * iwl4965_add_station_flags - Add station to tables in driver and device | |
435 | */ | |
c79dd5b5 | 436 | u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr, |
67d62035 | 437 | int is_ap, u8 flags, void *ht_data) |
b481de9c ZY |
438 | { |
439 | int i; | |
440 | int index = IWL_INVALID_STATION; | |
bb8c093b | 441 | struct iwl4965_station_entry *station; |
b481de9c | 442 | unsigned long flags_spin; |
0795af57 | 443 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
444 | |
445 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | |
446 | if (is_ap) | |
447 | index = IWL_AP_ID; | |
448 | else if (is_broadcast_ether_addr(addr)) | |
449 | index = priv->hw_setting.bcast_sta_id; | |
450 | else | |
451 | for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) { | |
452 | if (!compare_ether_addr(priv->stations[i].sta.sta.addr, | |
453 | addr)) { | |
454 | index = i; | |
455 | break; | |
456 | } | |
457 | ||
458 | if (!priv->stations[i].used && | |
459 | index == IWL_INVALID_STATION) | |
460 | index = i; | |
461 | } | |
462 | ||
463 | ||
9fbab516 BC |
464 | /* These two conditions have the same outcome, but keep them separate |
465 | since they have different meanings */ | |
b481de9c ZY |
466 | if (unlikely(index == IWL_INVALID_STATION)) { |
467 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
468 | return index; | |
469 | } | |
470 | ||
471 | if (priv->stations[index].used && | |
472 | !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) { | |
473 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
474 | return index; | |
475 | } | |
476 | ||
477 | ||
0795af57 | 478 | IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr)); |
b481de9c ZY |
479 | station = &priv->stations[index]; |
480 | station->used = 1; | |
481 | priv->num_stations++; | |
482 | ||
6440adb5 | 483 | /* Set up the REPLY_ADD_STA command to send to device */ |
bb8c093b | 484 | memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd)); |
b481de9c ZY |
485 | memcpy(station->sta.sta.addr, addr, ETH_ALEN); |
486 | station->sta.mode = 0; | |
487 | station->sta.sta.sta_id = index; | |
488 | station->sta.station_flags = 0; | |
489 | ||
c8b0e6e1 | 490 | #ifdef CONFIG_IWL4965_HT |
b481de9c ZY |
491 | /* BCAST station and IBSS stations do not work in HT mode */ |
492 | if (index != priv->hw_setting.bcast_sta_id && | |
493 | priv->iw_mode != IEEE80211_IF_TYPE_IBSS) | |
67d62035 RR |
494 | iwl4965_set_ht_add_station(priv, index, |
495 | (struct ieee80211_ht_info *) ht_data); | |
c8b0e6e1 | 496 | #endif /*CONFIG_IWL4965_HT*/ |
b481de9c ZY |
497 | |
498 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
6440adb5 BC |
499 | |
500 | /* Add station to device's station table */ | |
bb8c093b | 501 | iwl4965_send_add_station(priv, &station->sta, flags); |
b481de9c ZY |
502 | return index; |
503 | ||
504 | } | |
505 | ||
506 | /*************** DRIVER STATUS FUNCTIONS *****/ | |
507 | ||
c79dd5b5 | 508 | static inline int iwl4965_is_ready(struct iwl_priv *priv) |
b481de9c ZY |
509 | { |
510 | /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are | |
511 | * set but EXIT_PENDING is not */ | |
512 | return test_bit(STATUS_READY, &priv->status) && | |
513 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) && | |
514 | !test_bit(STATUS_EXIT_PENDING, &priv->status); | |
515 | } | |
516 | ||
c79dd5b5 | 517 | static inline int iwl4965_is_alive(struct iwl_priv *priv) |
b481de9c ZY |
518 | { |
519 | return test_bit(STATUS_ALIVE, &priv->status); | |
520 | } | |
521 | ||
c79dd5b5 | 522 | static inline int iwl4965_is_init(struct iwl_priv *priv) |
b481de9c ZY |
523 | { |
524 | return test_bit(STATUS_INIT, &priv->status); | |
525 | } | |
526 | ||
c79dd5b5 | 527 | static inline int iwl4965_is_rfkill(struct iwl_priv *priv) |
b481de9c ZY |
528 | { |
529 | return test_bit(STATUS_RF_KILL_HW, &priv->status) || | |
530 | test_bit(STATUS_RF_KILL_SW, &priv->status); | |
531 | } | |
532 | ||
c79dd5b5 | 533 | static inline int iwl4965_is_ready_rf(struct iwl_priv *priv) |
b481de9c ZY |
534 | { |
535 | ||
bb8c093b | 536 | if (iwl4965_is_rfkill(priv)) |
b481de9c ZY |
537 | return 0; |
538 | ||
bb8c093b | 539 | return iwl4965_is_ready(priv); |
b481de9c ZY |
540 | } |
541 | ||
542 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ | |
543 | ||
b481de9c | 544 | /** |
bb8c093b | 545 | * iwl4965_enqueue_hcmd - enqueue a uCode command |
b481de9c ZY |
546 | * @priv: device private data point |
547 | * @cmd: a point to the ucode command structure | |
548 | * | |
549 | * The function returns < 0 values to indicate the operation is | |
550 | * failed. On success, it turns the index (> 0) of command in the | |
551 | * command queue. | |
552 | */ | |
857485c0 | 553 | int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) |
b481de9c | 554 | { |
bb8c093b CH |
555 | struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; |
556 | struct iwl4965_queue *q = &txq->q; | |
557 | struct iwl4965_tfd_frame *tfd; | |
b481de9c | 558 | u32 *control_flags; |
857485c0 | 559 | struct iwl_cmd *out_cmd; |
b481de9c ZY |
560 | u32 idx; |
561 | u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr)); | |
562 | dma_addr_t phys_addr; | |
563 | int ret; | |
564 | unsigned long flags; | |
565 | ||
566 | /* If any of the command structures end up being larger than | |
567 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then | |
568 | * we will need to increase the size of the TFD entries */ | |
569 | BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && | |
570 | !(cmd->meta.flags & CMD_SIZE_HUGE)); | |
571 | ||
c342a1b9 GG |
572 | if (iwl4965_is_rfkill(priv)) { |
573 | IWL_DEBUG_INFO("Not sending command - RF KILL"); | |
574 | return -EIO; | |
575 | } | |
576 | ||
bb8c093b | 577 | if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { |
b481de9c ZY |
578 | IWL_ERROR("No space for Tx\n"); |
579 | return -ENOSPC; | |
580 | } | |
581 | ||
582 | spin_lock_irqsave(&priv->hcmd_lock, flags); | |
583 | ||
fc4b6853 | 584 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
585 | memset(tfd, 0, sizeof(*tfd)); |
586 | ||
587 | control_flags = (u32 *) tfd; | |
588 | ||
fc4b6853 | 589 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); |
b481de9c ZY |
590 | out_cmd = &txq->cmd[idx]; |
591 | ||
592 | out_cmd->hdr.cmd = cmd->id; | |
593 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); | |
594 | memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len); | |
595 | ||
596 | /* At this point, the out_cmd now has all of the incoming cmd | |
597 | * information */ | |
598 | ||
599 | out_cmd->hdr.flags = 0; | |
600 | out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) | | |
fc4b6853 | 601 | INDEX_TO_SEQ(q->write_ptr)); |
b481de9c ZY |
602 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) |
603 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); | |
604 | ||
605 | phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx + | |
857485c0 | 606 | offsetof(struct iwl_cmd, hdr); |
bb8c093b | 607 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); |
b481de9c ZY |
608 | |
609 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " | |
610 | "%d bytes at %d[%d]:%d\n", | |
611 | get_cmd_string(out_cmd->hdr.cmd), | |
612 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), | |
fc4b6853 | 613 | fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM); |
b481de9c ZY |
614 | |
615 | txq->need_update = 1; | |
6440adb5 BC |
616 | |
617 | /* Set up entry in queue's byte count circular buffer */ | |
b481de9c | 618 | ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0); |
6440adb5 BC |
619 | |
620 | /* Increment and update queue's write index */ | |
c54b679d | 621 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
bb8c093b | 622 | iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
623 | |
624 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | |
625 | return ret ? ret : idx; | |
626 | } | |
627 | ||
deb09c43 EG |
628 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
629 | { | |
630 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; | |
631 | ||
632 | if (hw_decrypt) | |
633 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
634 | else | |
635 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
636 | ||
637 | } | |
638 | ||
c79dd5b5 | 639 | int iwl4965_send_statistics_request(struct iwl_priv *priv) |
b481de9c | 640 | { |
857485c0 TW |
641 | u32 flags = 0; |
642 | return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD, | |
643 | sizeof(flags), &flags); | |
b481de9c ZY |
644 | } |
645 | ||
646 | /** | |
bb8c093b | 647 | * iwl4965_rxon_add_station - add station into station table. |
b481de9c ZY |
648 | * |
649 | * there is only one AP station with id= IWL_AP_ID | |
9fbab516 BC |
650 | * NOTE: mutex must be held before calling this fnction |
651 | */ | |
c79dd5b5 | 652 | static int iwl4965_rxon_add_station(struct iwl_priv *priv, |
b481de9c ZY |
653 | const u8 *addr, int is_ap) |
654 | { | |
556f8db7 | 655 | u8 sta_id; |
b481de9c | 656 | |
6440adb5 | 657 | /* Add station to device's station table */ |
67d62035 RR |
658 | #ifdef CONFIG_IWL4965_HT |
659 | struct ieee80211_conf *conf = &priv->hw->conf; | |
660 | struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf; | |
661 | ||
662 | if ((is_ap) && | |
663 | (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) && | |
664 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) | |
665 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
666 | 0, cur_ht_config); | |
667 | else | |
668 | #endif /* CONFIG_IWL4965_HT */ | |
669 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
670 | 0, NULL); | |
6440adb5 BC |
671 | |
672 | /* Set up default rate scaling table in device's station table */ | |
b481de9c ZY |
673 | iwl4965_add_station(priv, addr, is_ap); |
674 | ||
556f8db7 | 675 | return sta_id; |
b481de9c ZY |
676 | } |
677 | ||
b481de9c | 678 | /** |
bb8c093b | 679 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
680 | * |
681 | * NOTE: This is really only useful during development and can eventually | |
682 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
683 | * making changes | |
684 | */ | |
bb8c093b | 685 | static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c ZY |
686 | { |
687 | int error = 0; | |
688 | int counter = 1; | |
689 | ||
690 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
691 | error |= le32_to_cpu(rxon->flags & | |
692 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
693 | RXON_FLG_RADAR_DETECT_MSK)); | |
694 | if (error) | |
695 | IWL_WARNING("check 24G fields %d | %d\n", | |
696 | counter++, error); | |
697 | } else { | |
698 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
699 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
700 | if (error) | |
701 | IWL_WARNING("check 52 fields %d | %d\n", | |
702 | counter++, error); | |
703 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
704 | if (error) | |
705 | IWL_WARNING("check 52 CCK %d | %d\n", | |
706 | counter++, error); | |
707 | } | |
708 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
709 | if (error) | |
710 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
711 | ||
712 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
713 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
714 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
715 | if (error) | |
716 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
717 | ||
718 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
719 | if (error) | |
720 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
721 | ||
722 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
723 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
724 | if (error) | |
725 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
726 | counter++, error); | |
727 | ||
728 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
729 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
730 | if (error) | |
731 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
732 | counter++, error); | |
733 | ||
734 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
735 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
736 | if (error) | |
737 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
738 | counter++, error); | |
739 | ||
740 | if (error) | |
741 | IWL_WARNING("Tuning to channel %d\n", | |
742 | le16_to_cpu(rxon->channel)); | |
743 | ||
744 | if (error) { | |
bb8c093b | 745 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
746 | return -1; |
747 | } | |
748 | return 0; | |
749 | } | |
750 | ||
751 | /** | |
9fbab516 | 752 | * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 753 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 754 | * |
9fbab516 BC |
755 | * If the RXON structure is changing enough to require a new tune, |
756 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
757 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 758 | */ |
c79dd5b5 | 759 | static int iwl4965_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
760 | { |
761 | ||
762 | /* These items are only settable from the full RXON command */ | |
763 | if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) || | |
764 | compare_ether_addr(priv->staging_rxon.bssid_addr, | |
765 | priv->active_rxon.bssid_addr) || | |
766 | compare_ether_addr(priv->staging_rxon.node_addr, | |
767 | priv->active_rxon.node_addr) || | |
768 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
769 | priv->active_rxon.wlap_bssid_addr) || | |
770 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
771 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
772 | (priv->staging_rxon.air_propagation != | |
773 | priv->active_rxon.air_propagation) || | |
774 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
775 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
776 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
777 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
778 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
779 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
780 | return 1; | |
781 | ||
782 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
783 | * be updated with the RXON_ASSOC command -- however only some | |
784 | * flag transitions are allowed using RXON_ASSOC */ | |
785 | ||
786 | /* Check if we are not switching bands */ | |
787 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
788 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
789 | return 1; | |
790 | ||
791 | /* Check if we are switching association toggle */ | |
792 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
793 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
794 | return 1; | |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
c79dd5b5 | 799 | static int iwl4965_send_rxon_assoc(struct iwl_priv *priv) |
b481de9c ZY |
800 | { |
801 | int rc = 0; | |
bb8c093b CH |
802 | struct iwl4965_rx_packet *res = NULL; |
803 | struct iwl4965_rxon_assoc_cmd rxon_assoc; | |
857485c0 | 804 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
805 | .id = REPLY_RXON_ASSOC, |
806 | .len = sizeof(rxon_assoc), | |
807 | .meta.flags = CMD_WANT_SKB, | |
808 | .data = &rxon_assoc, | |
809 | }; | |
bb8c093b CH |
810 | const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon; |
811 | const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon; | |
b481de9c ZY |
812 | |
813 | if ((rxon1->flags == rxon2->flags) && | |
814 | (rxon1->filter_flags == rxon2->filter_flags) && | |
815 | (rxon1->cck_basic_rates == rxon2->cck_basic_rates) && | |
816 | (rxon1->ofdm_ht_single_stream_basic_rates == | |
817 | rxon2->ofdm_ht_single_stream_basic_rates) && | |
818 | (rxon1->ofdm_ht_dual_stream_basic_rates == | |
819 | rxon2->ofdm_ht_dual_stream_basic_rates) && | |
820 | (rxon1->rx_chain == rxon2->rx_chain) && | |
821 | (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) { | |
822 | IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n"); | |
823 | return 0; | |
824 | } | |
825 | ||
826 | rxon_assoc.flags = priv->staging_rxon.flags; | |
827 | rxon_assoc.filter_flags = priv->staging_rxon.filter_flags; | |
828 | rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates; | |
829 | rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates; | |
830 | rxon_assoc.reserved = 0; | |
831 | rxon_assoc.ofdm_ht_single_stream_basic_rates = | |
832 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates; | |
833 | rxon_assoc.ofdm_ht_dual_stream_basic_rates = | |
834 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates; | |
835 | rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain; | |
836 | ||
857485c0 | 837 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
838 | if (rc) |
839 | return rc; | |
840 | ||
bb8c093b | 841 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
842 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
843 | IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n"); | |
844 | rc = -EIO; | |
845 | } | |
846 | ||
847 | priv->alloc_rxb_skb--; | |
848 | dev_kfree_skb_any(cmd.meta.u.skb); | |
849 | ||
850 | return rc; | |
851 | } | |
852 | ||
853 | /** | |
bb8c093b | 854 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 855 | * |
01ebd063 | 856 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
857 | * the active_rxon structure is updated with the new data. This |
858 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
859 | * a HW tune is required based on the RXON structure changes. | |
860 | */ | |
c79dd5b5 | 861 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
862 | { |
863 | /* cast away the const for active_rxon in this function */ | |
bb8c093b | 864 | struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 865 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
866 | int rc = 0; |
867 | ||
bb8c093b | 868 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
869 | return -1; |
870 | ||
871 | /* always get timestamp with Rx frame */ | |
872 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
873 | ||
bb8c093b | 874 | rc = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
b481de9c ZY |
875 | if (rc) { |
876 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | |
877 | return -EINVAL; | |
878 | } | |
879 | ||
880 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 881 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 882 | * and other flags for the current radio configuration. */ |
bb8c093b CH |
883 | if (!iwl4965_full_rxon_required(priv)) { |
884 | rc = iwl4965_send_rxon_assoc(priv); | |
b481de9c ZY |
885 | if (rc) { |
886 | IWL_ERROR("Error setting RXON_ASSOC " | |
887 | "configuration (%d).\n", rc); | |
888 | return rc; | |
889 | } | |
890 | ||
891 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
892 | ||
893 | return 0; | |
894 | } | |
895 | ||
896 | /* station table will be cleared */ | |
897 | priv->assoc_station_added = 0; | |
898 | ||
c8b0e6e1 | 899 | #ifdef CONFIG_IWL4965_SENSITIVITY |
b481de9c ZY |
900 | priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT; |
901 | if (!priv->error_recovering) | |
902 | priv->start_calib = 0; | |
903 | ||
904 | iwl4965_init_sensitivity(priv, CMD_ASYNC, 1); | |
c8b0e6e1 | 905 | #endif /* CONFIG_IWL4965_SENSITIVITY */ |
b481de9c ZY |
906 | |
907 | /* If we are currently associated and the new config requires | |
908 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
909 | * we must clear the associated from the active configuration | |
910 | * before we apply the new config */ | |
bb8c093b | 911 | if (iwl4965_is_associated(priv) && |
b481de9c ZY |
912 | (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { |
913 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); | |
914 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
915 | ||
857485c0 | 916 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 917 | sizeof(struct iwl4965_rxon_cmd), |
b481de9c ZY |
918 | &priv->active_rxon); |
919 | ||
920 | /* If the mask clearing failed then we set | |
921 | * active_rxon back to what it was previously */ | |
922 | if (rc) { | |
923 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
924 | IWL_ERROR("Error clearing ASSOC_MSK on current " | |
925 | "configuration (%d).\n", rc); | |
926 | return rc; | |
927 | } | |
b481de9c ZY |
928 | } |
929 | ||
930 | IWL_DEBUG_INFO("Sending RXON\n" | |
931 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
932 | "* channel = %d\n" | |
0795af57 | 933 | "* bssid = %s\n", |
b481de9c ZY |
934 | ((priv->staging_rxon.filter_flags & |
935 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), | |
936 | le16_to_cpu(priv->staging_rxon.channel), | |
0795af57 | 937 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 938 | |
deb09c43 | 939 | iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto); |
b481de9c | 940 | /* Apply the new configuration */ |
857485c0 | 941 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 942 | sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon); |
b481de9c ZY |
943 | if (rc) { |
944 | IWL_ERROR("Error setting new configuration (%d).\n", rc); | |
945 | return rc; | |
946 | } | |
947 | ||
bf85ea4f | 948 | iwlcore_clear_stations_table(priv); |
556f8db7 | 949 | |
c8b0e6e1 | 950 | #ifdef CONFIG_IWL4965_SENSITIVITY |
b481de9c ZY |
951 | if (!priv->error_recovering) |
952 | priv->start_calib = 0; | |
953 | ||
954 | priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT; | |
955 | iwl4965_init_sensitivity(priv, CMD_ASYNC, 1); | |
c8b0e6e1 | 956 | #endif /* CONFIG_IWL4965_SENSITIVITY */ |
b481de9c ZY |
957 | |
958 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
959 | ||
960 | /* If we issue a new RXON command which required a tune then we must | |
961 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
bb8c093b | 962 | rc = iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
963 | if (rc) { |
964 | IWL_ERROR("Error setting Tx power (%d).\n", rc); | |
965 | return rc; | |
966 | } | |
967 | ||
968 | /* Add the broadcast address so we can send broadcast frames */ | |
bb8c093b | 969 | if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) == |
b481de9c ZY |
970 | IWL_INVALID_STATION) { |
971 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | |
972 | return -EIO; | |
973 | } | |
974 | ||
975 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
976 | * add the IWL_AP_ID to the station rate table */ | |
bb8c093b | 977 | if (iwl4965_is_associated(priv) && |
b481de9c | 978 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { |
bb8c093b | 979 | if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1) |
b481de9c ZY |
980 | == IWL_INVALID_STATION) { |
981 | IWL_ERROR("Error adding AP address for transmit.\n"); | |
982 | return -EIO; | |
983 | } | |
984 | priv->assoc_station_added = 1; | |
985 | } | |
986 | ||
987 | return 0; | |
988 | } | |
989 | ||
c79dd5b5 | 990 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 991 | { |
bb8c093b | 992 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
993 | .flags = 3, |
994 | .lead_time = 0xAA, | |
995 | .max_kill = 1, | |
996 | .kill_ack_mask = 0, | |
997 | .kill_cts_mask = 0, | |
998 | }; | |
999 | ||
857485c0 | 1000 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 1001 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
1002 | } |
1003 | ||
c79dd5b5 | 1004 | static int iwl4965_send_scan_abort(struct iwl_priv *priv) |
b481de9c ZY |
1005 | { |
1006 | int rc = 0; | |
bb8c093b | 1007 | struct iwl4965_rx_packet *res; |
857485c0 | 1008 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
1009 | .id = REPLY_SCAN_ABORT_CMD, |
1010 | .meta.flags = CMD_WANT_SKB, | |
1011 | }; | |
1012 | ||
1013 | /* If there isn't a scan actively going on in the hardware | |
1014 | * then we are in between scan bands and not actually | |
1015 | * actively scanning, so don't send the abort command */ | |
1016 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
1017 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1018 | return 0; | |
1019 | } | |
1020 | ||
857485c0 | 1021 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
1022 | if (rc) { |
1023 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1024 | return rc; | |
1025 | } | |
1026 | ||
bb8c093b | 1027 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
1028 | if (res->u.status != CAN_ABORT_STATUS) { |
1029 | /* The scan abort will return 1 for success or | |
1030 | * 2 for "failure". A failure condition can be | |
1031 | * due to simply not being in an active scan which | |
1032 | * can occur if we send the scan abort before we | |
1033 | * the microcode has notified us that a scan is | |
1034 | * completed. */ | |
1035 | IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status); | |
1036 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1037 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
1038 | } | |
1039 | ||
1040 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1041 | ||
1042 | return rc; | |
1043 | } | |
1044 | ||
c79dd5b5 | 1045 | static int iwl4965_card_state_sync_callback(struct iwl_priv *priv, |
857485c0 | 1046 | struct iwl_cmd *cmd, |
b481de9c ZY |
1047 | struct sk_buff *skb) |
1048 | { | |
1049 | return 1; | |
1050 | } | |
1051 | ||
1052 | /* | |
1053 | * CARD_STATE_CMD | |
1054 | * | |
9fbab516 | 1055 | * Use: Sets the device's internal card state to enable, disable, or halt |
b481de9c ZY |
1056 | * |
1057 | * When in the 'enable' state the card operates as normal. | |
1058 | * When in the 'disable' state, the card enters into a low power mode. | |
1059 | * When in the 'halt' state, the card is shut down and must be fully | |
1060 | * restarted to come back on. | |
1061 | */ | |
c79dd5b5 | 1062 | static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) |
b481de9c | 1063 | { |
857485c0 | 1064 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
1065 | .id = REPLY_CARD_STATE_CMD, |
1066 | .len = sizeof(u32), | |
1067 | .data = &flags, | |
1068 | .meta.flags = meta_flag, | |
1069 | }; | |
1070 | ||
1071 | if (meta_flag & CMD_ASYNC) | |
bb8c093b | 1072 | cmd.meta.u.callback = iwl4965_card_state_sync_callback; |
b481de9c | 1073 | |
857485c0 | 1074 | return iwl_send_cmd(priv, &cmd); |
b481de9c ZY |
1075 | } |
1076 | ||
c79dd5b5 | 1077 | static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv, |
857485c0 | 1078 | struct iwl_cmd *cmd, struct sk_buff *skb) |
b481de9c | 1079 | { |
bb8c093b | 1080 | struct iwl4965_rx_packet *res = NULL; |
b481de9c ZY |
1081 | |
1082 | if (!skb) { | |
1083 | IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n"); | |
1084 | return 1; | |
1085 | } | |
1086 | ||
bb8c093b | 1087 | res = (struct iwl4965_rx_packet *)skb->data; |
b481de9c ZY |
1088 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1089 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | |
1090 | res->hdr.flags); | |
1091 | return 1; | |
1092 | } | |
1093 | ||
1094 | switch (res->u.add_sta.status) { | |
1095 | case ADD_STA_SUCCESS_MSK: | |
1096 | break; | |
1097 | default: | |
1098 | break; | |
1099 | } | |
1100 | ||
1101 | /* We didn't cache the SKB; let the caller free it */ | |
1102 | return 1; | |
1103 | } | |
1104 | ||
c79dd5b5 | 1105 | int iwl4965_send_add_station(struct iwl_priv *priv, |
bb8c093b | 1106 | struct iwl4965_addsta_cmd *sta, u8 flags) |
b481de9c | 1107 | { |
bb8c093b | 1108 | struct iwl4965_rx_packet *res = NULL; |
b481de9c | 1109 | int rc = 0; |
857485c0 | 1110 | struct iwl_host_cmd cmd = { |
b481de9c | 1111 | .id = REPLY_ADD_STA, |
bb8c093b | 1112 | .len = sizeof(struct iwl4965_addsta_cmd), |
b481de9c ZY |
1113 | .meta.flags = flags, |
1114 | .data = sta, | |
1115 | }; | |
1116 | ||
1117 | if (flags & CMD_ASYNC) | |
bb8c093b | 1118 | cmd.meta.u.callback = iwl4965_add_sta_sync_callback; |
b481de9c ZY |
1119 | else |
1120 | cmd.meta.flags |= CMD_WANT_SKB; | |
1121 | ||
857485c0 | 1122 | rc = iwl_send_cmd(priv, &cmd); |
b481de9c ZY |
1123 | |
1124 | if (rc || (flags & CMD_ASYNC)) | |
1125 | return rc; | |
1126 | ||
bb8c093b | 1127 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
1128 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
1129 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | |
1130 | res->hdr.flags); | |
1131 | rc = -EIO; | |
1132 | } | |
1133 | ||
1134 | if (rc == 0) { | |
1135 | switch (res->u.add_sta.status) { | |
1136 | case ADD_STA_SUCCESS_MSK: | |
1137 | IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n"); | |
1138 | break; | |
1139 | default: | |
1140 | rc = -EIO; | |
1141 | IWL_WARNING("REPLY_ADD_STA failed\n"); | |
1142 | break; | |
1143 | } | |
1144 | } | |
1145 | ||
1146 | priv->alloc_rxb_skb--; | |
1147 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1148 | ||
1149 | return rc; | |
1150 | } | |
1151 | ||
deb09c43 | 1152 | static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv, |
b481de9c ZY |
1153 | struct ieee80211_key_conf *keyconf, |
1154 | u8 sta_id) | |
1155 | { | |
1156 | unsigned long flags; | |
1157 | __le16 key_flags = 0; | |
1158 | ||
deb09c43 EG |
1159 | key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK); |
1160 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
1161 | ||
1162 | if (sta_id == priv->hw_setting.bcast_sta_id) | |
1163 | key_flags |= STA_KEY_MULTICAST_MSK; | |
1164 | ||
1165 | keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
1166 | keyconf->hw_key_idx = keyconf->keyidx; | |
1167 | ||
1168 | key_flags &= ~STA_KEY_FLG_INVALID; | |
1169 | ||
b481de9c ZY |
1170 | spin_lock_irqsave(&priv->sta_lock, flags); |
1171 | priv->stations[sta_id].keyinfo.alg = keyconf->alg; | |
1172 | priv->stations[sta_id].keyinfo.keylen = keyconf->keylen; | |
deb09c43 | 1173 | |
b481de9c ZY |
1174 | memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, |
1175 | keyconf->keylen); | |
1176 | ||
1177 | memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, | |
1178 | keyconf->keylen); | |
deb09c43 EG |
1179 | |
1180 | priv->stations[sta_id].sta.key.key_offset | |
1181 | = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/ | |
b481de9c ZY |
1182 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
1183 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
1184 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
1185 | ||
1186 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
1187 | ||
1188 | IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n"); | |
deb09c43 EG |
1189 | return iwl4965_send_add_station(priv, |
1190 | &priv->stations[sta_id].sta, CMD_ASYNC); | |
1191 | } | |
1192 | ||
1193 | static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv, | |
1194 | struct ieee80211_key_conf *keyconf, | |
1195 | u8 sta_id) | |
1196 | { | |
2bc75089 EG |
1197 | unsigned long flags; |
1198 | int ret = 0; | |
1199 | ||
1200 | keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
1201 | keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC; | |
1202 | keyconf->hw_key_idx = keyconf->keyidx; | |
1203 | ||
1204 | spin_lock_irqsave(&priv->sta_lock, flags); | |
1205 | ||
1206 | priv->stations[sta_id].keyinfo.alg = keyconf->alg; | |
1207 | priv->stations[sta_id].keyinfo.conf = keyconf; | |
1208 | priv->stations[sta_id].keyinfo.keylen = 16; | |
1209 | ||
1210 | /* This copy is acutally not needed: we get the key with each TX */ | |
1211 | memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16); | |
1212 | ||
1213 | memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16); | |
1214 | ||
1215 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
1216 | ||
1217 | return ret; | |
b481de9c ZY |
1218 | } |
1219 | ||
c79dd5b5 | 1220 | static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id) |
b481de9c ZY |
1221 | { |
1222 | unsigned long flags; | |
1223 | ||
1224 | spin_lock_irqsave(&priv->sta_lock, flags); | |
bb8c093b CH |
1225 | memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key)); |
1226 | memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo)); | |
b481de9c ZY |
1227 | priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; |
1228 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
1229 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
1230 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
1231 | ||
1232 | IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n"); | |
bb8c093b | 1233 | iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0); |
b481de9c ZY |
1234 | return 0; |
1235 | } | |
1236 | ||
deb09c43 EG |
1237 | static int iwl4965_set_dynamic_key(struct iwl_priv *priv, |
1238 | struct ieee80211_key_conf *key, u8 sta_id) | |
1239 | { | |
1240 | int ret; | |
1241 | ||
1242 | switch (key->alg) { | |
1243 | case ALG_CCMP: | |
1244 | ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id); | |
1245 | break; | |
1246 | case ALG_TKIP: | |
1247 | ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id); | |
1248 | break; | |
1249 | case ALG_WEP: | |
1250 | ret = -EOPNOTSUPP; | |
1251 | break; | |
1252 | default: | |
1253 | IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg); | |
1254 | ret = -EINVAL; | |
1255 | } | |
1256 | ||
1257 | return ret; | |
1258 | } | |
1259 | ||
1260 | static int iwl4965_remove_static_key(struct iwl_priv *priv) | |
1261 | { | |
1262 | int ret = -EOPNOTSUPP; | |
1263 | ||
1264 | return ret; | |
1265 | } | |
1266 | ||
1267 | static int iwl4965_set_static_key(struct iwl_priv *priv, | |
1268 | struct ieee80211_key_conf *key) | |
1269 | { | |
1270 | if (key->alg == ALG_WEP) | |
1271 | return -EOPNOTSUPP; | |
1272 | ||
1273 | IWL_ERROR("Static key invalid: alg %d\n", key->alg); | |
1274 | return -EINVAL; | |
1275 | } | |
1276 | ||
c79dd5b5 | 1277 | static void iwl4965_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
1278 | { |
1279 | struct list_head *element; | |
1280 | ||
1281 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
1282 | priv->frames_count); | |
1283 | ||
1284 | while (!list_empty(&priv->free_frames)) { | |
1285 | element = priv->free_frames.next; | |
1286 | list_del(element); | |
bb8c093b | 1287 | kfree(list_entry(element, struct iwl4965_frame, list)); |
b481de9c ZY |
1288 | priv->frames_count--; |
1289 | } | |
1290 | ||
1291 | if (priv->frames_count) { | |
1292 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
1293 | priv->frames_count); | |
1294 | priv->frames_count = 0; | |
1295 | } | |
1296 | } | |
1297 | ||
c79dd5b5 | 1298 | static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv) |
b481de9c | 1299 | { |
bb8c093b | 1300 | struct iwl4965_frame *frame; |
b481de9c ZY |
1301 | struct list_head *element; |
1302 | if (list_empty(&priv->free_frames)) { | |
1303 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
1304 | if (!frame) { | |
1305 | IWL_ERROR("Could not allocate frame!\n"); | |
1306 | return NULL; | |
1307 | } | |
1308 | ||
1309 | priv->frames_count++; | |
1310 | return frame; | |
1311 | } | |
1312 | ||
1313 | element = priv->free_frames.next; | |
1314 | list_del(element); | |
bb8c093b | 1315 | return list_entry(element, struct iwl4965_frame, list); |
b481de9c ZY |
1316 | } |
1317 | ||
c79dd5b5 | 1318 | static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame) |
b481de9c ZY |
1319 | { |
1320 | memset(frame, 0, sizeof(*frame)); | |
1321 | list_add(&frame->list, &priv->free_frames); | |
1322 | } | |
1323 | ||
c79dd5b5 | 1324 | unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, |
b481de9c ZY |
1325 | struct ieee80211_hdr *hdr, |
1326 | const u8 *dest, int left) | |
1327 | { | |
1328 | ||
bb8c093b | 1329 | if (!iwl4965_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
1330 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
1331 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
1332 | return 0; | |
1333 | ||
1334 | if (priv->ibss_beacon->len > left) | |
1335 | return 0; | |
1336 | ||
1337 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
1338 | ||
1339 | return priv->ibss_beacon->len; | |
1340 | } | |
1341 | ||
bb8c093b | 1342 | static u8 iwl4965_rate_get_lowest_plcp(int rate_mask) |
b481de9c ZY |
1343 | { |
1344 | u8 i; | |
1345 | ||
1346 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; | |
bb8c093b | 1347 | i = iwl4965_rates[i].next_ieee) { |
b481de9c | 1348 | if (rate_mask & (1 << i)) |
bb8c093b | 1349 | return iwl4965_rates[i].plcp; |
b481de9c ZY |
1350 | } |
1351 | ||
1352 | return IWL_RATE_INVALID; | |
1353 | } | |
1354 | ||
c79dd5b5 | 1355 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 1356 | { |
bb8c093b | 1357 | struct iwl4965_frame *frame; |
b481de9c ZY |
1358 | unsigned int frame_size; |
1359 | int rc; | |
1360 | u8 rate; | |
1361 | ||
bb8c093b | 1362 | frame = iwl4965_get_free_frame(priv); |
b481de9c ZY |
1363 | |
1364 | if (!frame) { | |
1365 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
1366 | "command.\n"); | |
1367 | return -ENOMEM; | |
1368 | } | |
1369 | ||
1370 | if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) { | |
bb8c093b | 1371 | rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & |
b481de9c ZY |
1372 | 0xFF0); |
1373 | if (rate == IWL_INVALID_RATE) | |
1374 | rate = IWL_RATE_6M_PLCP; | |
1375 | } else { | |
bb8c093b | 1376 | rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF); |
b481de9c ZY |
1377 | if (rate == IWL_INVALID_RATE) |
1378 | rate = IWL_RATE_1M_PLCP; | |
1379 | } | |
1380 | ||
bb8c093b | 1381 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 1382 | |
857485c0 | 1383 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
1384 | &frame->u.cmd[0]); |
1385 | ||
bb8c093b | 1386 | iwl4965_free_frame(priv, frame); |
b481de9c ZY |
1387 | |
1388 | return rc; | |
1389 | } | |
1390 | ||
b481de9c ZY |
1391 | /****************************************************************************** |
1392 | * | |
1393 | * Misc. internal state and helper functions | |
1394 | * | |
1395 | ******************************************************************************/ | |
b481de9c | 1396 | |
c79dd5b5 | 1397 | static void iwl4965_unset_hw_setting(struct iwl_priv *priv) |
b481de9c ZY |
1398 | { |
1399 | if (priv->hw_setting.shared_virt) | |
1400 | pci_free_consistent(priv->pci_dev, | |
bb8c093b | 1401 | sizeof(struct iwl4965_shared), |
b481de9c ZY |
1402 | priv->hw_setting.shared_virt, |
1403 | priv->hw_setting.shared_phys); | |
1404 | } | |
1405 | ||
1406 | /** | |
bb8c093b | 1407 | * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field |
b481de9c ZY |
1408 | * |
1409 | * return : set the bit for each supported rate insert in ie | |
1410 | */ | |
bb8c093b | 1411 | static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate, |
c7c46676 | 1412 | u16 basic_rate, int *left) |
b481de9c ZY |
1413 | { |
1414 | u16 ret_rates = 0, bit; | |
1415 | int i; | |
c7c46676 TW |
1416 | u8 *cnt = ie; |
1417 | u8 *rates = ie + 1; | |
b481de9c ZY |
1418 | |
1419 | for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) { | |
1420 | if (bit & supported_rate) { | |
1421 | ret_rates |= bit; | |
bb8c093b | 1422 | rates[*cnt] = iwl4965_rates[i].ieee | |
c7c46676 TW |
1423 | ((bit & basic_rate) ? 0x80 : 0x00); |
1424 | (*cnt)++; | |
1425 | (*left)--; | |
1426 | if ((*left <= 0) || | |
1427 | (*cnt >= IWL_SUPPORTED_RATES_IE_LEN)) | |
b481de9c ZY |
1428 | break; |
1429 | } | |
1430 | } | |
1431 | ||
1432 | return ret_rates; | |
1433 | } | |
1434 | ||
b481de9c | 1435 | /** |
bb8c093b | 1436 | * iwl4965_fill_probe_req - fill in all required fields and IE for probe request |
b481de9c | 1437 | */ |
c79dd5b5 | 1438 | static u16 iwl4965_fill_probe_req(struct iwl_priv *priv, |
78330fdd TW |
1439 | enum ieee80211_band band, |
1440 | struct ieee80211_mgmt *frame, | |
1441 | int left, int is_direct) | |
b481de9c ZY |
1442 | { |
1443 | int len = 0; | |
1444 | u8 *pos = NULL; | |
bee488db | 1445 | u16 active_rates, ret_rates, cck_rates, active_rate_basic; |
8fb88032 | 1446 | #ifdef CONFIG_IWL4965_HT |
78330fdd TW |
1447 | const struct ieee80211_supported_band *sband = |
1448 | iwl4965_get_hw_mode(priv, band); | |
8fb88032 | 1449 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c ZY |
1450 | |
1451 | /* Make sure there is enough space for the probe request, | |
1452 | * two mandatory IEs and the data */ | |
1453 | left -= 24; | |
1454 | if (left < 0) | |
1455 | return 0; | |
1456 | len += 24; | |
1457 | ||
1458 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); | |
bb8c093b | 1459 | memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c | 1460 | memcpy(frame->sa, priv->mac_addr, ETH_ALEN); |
bb8c093b | 1461 | memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c ZY |
1462 | frame->seq_ctrl = 0; |
1463 | ||
1464 | /* fill in our indirect SSID IE */ | |
1465 | /* ...next IE... */ | |
1466 | ||
1467 | left -= 2; | |
1468 | if (left < 0) | |
1469 | return 0; | |
1470 | len += 2; | |
1471 | pos = &(frame->u.probe_req.variable[0]); | |
1472 | *pos++ = WLAN_EID_SSID; | |
1473 | *pos++ = 0; | |
1474 | ||
1475 | /* fill in our direct SSID IE... */ | |
1476 | if (is_direct) { | |
1477 | /* ...next IE... */ | |
1478 | left -= 2 + priv->essid_len; | |
1479 | if (left < 0) | |
1480 | return 0; | |
1481 | /* ... fill it in... */ | |
1482 | *pos++ = WLAN_EID_SSID; | |
1483 | *pos++ = priv->essid_len; | |
1484 | memcpy(pos, priv->essid, priv->essid_len); | |
1485 | pos += priv->essid_len; | |
1486 | len += 2 + priv->essid_len; | |
1487 | } | |
1488 | ||
1489 | /* fill in supported rate */ | |
1490 | /* ...next IE... */ | |
1491 | left -= 2; | |
1492 | if (left < 0) | |
1493 | return 0; | |
c7c46676 | 1494 | |
b481de9c ZY |
1495 | /* ... fill it in... */ |
1496 | *pos++ = WLAN_EID_SUPP_RATES; | |
1497 | *pos = 0; | |
c7c46676 | 1498 | |
bee488db | 1499 | /* exclude 60M rate */ |
1500 | active_rates = priv->rates_mask; | |
1501 | active_rates &= ~IWL_RATE_60M_MASK; | |
1502 | ||
1503 | active_rate_basic = active_rates & IWL_BASIC_RATES_MASK; | |
b481de9c | 1504 | |
c7c46676 | 1505 | cck_rates = IWL_CCK_RATES_MASK & active_rates; |
bb8c093b | 1506 | ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates, |
bee488db | 1507 | active_rate_basic, &left); |
c7c46676 TW |
1508 | active_rates &= ~ret_rates; |
1509 | ||
bb8c093b | 1510 | ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1511 | active_rate_basic, &left); |
c7c46676 TW |
1512 | active_rates &= ~ret_rates; |
1513 | ||
b481de9c ZY |
1514 | len += 2 + *pos; |
1515 | pos += (*pos) + 1; | |
c7c46676 | 1516 | if (active_rates == 0) |
b481de9c ZY |
1517 | goto fill_end; |
1518 | ||
1519 | /* fill in supported extended rate */ | |
1520 | /* ...next IE... */ | |
1521 | left -= 2; | |
1522 | if (left < 0) | |
1523 | return 0; | |
1524 | /* ... fill it in... */ | |
1525 | *pos++ = WLAN_EID_EXT_SUPP_RATES; | |
1526 | *pos = 0; | |
bb8c093b | 1527 | iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1528 | active_rate_basic, &left); |
b481de9c ZY |
1529 | if (*pos > 0) |
1530 | len += 2 + *pos; | |
1531 | ||
c8b0e6e1 | 1532 | #ifdef CONFIG_IWL4965_HT |
78330fdd TW |
1533 | if (sband && sband->ht_info.ht_supported) { |
1534 | struct ieee80211_ht_cap *ht_cap; | |
b481de9c ZY |
1535 | pos += (*pos) + 1; |
1536 | *pos++ = WLAN_EID_HT_CAPABILITY; | |
8fb88032 | 1537 | *pos++ = sizeof(struct ieee80211_ht_cap); |
78330fdd TW |
1538 | ht_cap = (struct ieee80211_ht_cap *)pos; |
1539 | ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap); | |
1540 | memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16); | |
1541 | ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor & | |
1542 | IEEE80211_HT_CAP_AMPDU_FACTOR) | | |
1543 | ((sband->ht_info.ampdu_density << 2) & | |
1544 | IEEE80211_HT_CAP_AMPDU_DENSITY); | |
8fb88032 | 1545 | len += 2 + sizeof(struct ieee80211_ht_cap); |
b481de9c | 1546 | } |
c8b0e6e1 | 1547 | #endif /*CONFIG_IWL4965_HT */ |
b481de9c ZY |
1548 | |
1549 | fill_end: | |
1550 | return (u16)len; | |
1551 | } | |
1552 | ||
1553 | /* | |
1554 | * QoS support | |
1555 | */ | |
c79dd5b5 | 1556 | static int iwl4965_send_qos_params_command(struct iwl_priv *priv, |
bb8c093b | 1557 | struct iwl4965_qosparam_cmd *qos) |
b481de9c ZY |
1558 | { |
1559 | ||
857485c0 | 1560 | return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
bb8c093b | 1561 | sizeof(struct iwl4965_qosparam_cmd), qos); |
b481de9c ZY |
1562 | } |
1563 | ||
c79dd5b5 | 1564 | static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c ZY |
1565 | { |
1566 | unsigned long flags; | |
1567 | ||
b481de9c ZY |
1568 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
1569 | return; | |
1570 | ||
1571 | if (!priv->qos_data.qos_enable) | |
1572 | return; | |
1573 | ||
1574 | spin_lock_irqsave(&priv->lock, flags); | |
1575 | priv->qos_data.def_qos_parm.qos_flags = 0; | |
1576 | ||
1577 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
1578 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
1579 | priv->qos_data.def_qos_parm.qos_flags |= | |
1580 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
1581 | if (priv->qos_data.qos_active) |
1582 | priv->qos_data.def_qos_parm.qos_flags |= | |
1583 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
1584 | ||
c8b0e6e1 | 1585 | #ifdef CONFIG_IWL4965_HT |
fd105e79 | 1586 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 1587 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
c8b0e6e1 | 1588 | #endif /* CONFIG_IWL4965_HT */ |
f1f1f5c7 | 1589 | |
b481de9c ZY |
1590 | spin_unlock_irqrestore(&priv->lock, flags); |
1591 | ||
bb8c093b | 1592 | if (force || iwl4965_is_associated(priv)) { |
f1f1f5c7 TW |
1593 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
1594 | priv->qos_data.qos_active, | |
1595 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 1596 | |
bb8c093b | 1597 | iwl4965_send_qos_params_command(priv, |
b481de9c ZY |
1598 | &(priv->qos_data.def_qos_parm)); |
1599 | } | |
1600 | } | |
1601 | ||
b481de9c ZY |
1602 | /* |
1603 | * Power management (not Tx power!) functions | |
1604 | */ | |
1605 | #define MSEC_TO_USEC 1024 | |
1606 | ||
1607 | #define NOSLP __constant_cpu_to_le16(0), 0, 0 | |
1608 | #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 | |
1609 | #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC) | |
1610 | #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \ | |
1611 | __constant_cpu_to_le32(X1), \ | |
1612 | __constant_cpu_to_le32(X2), \ | |
1613 | __constant_cpu_to_le32(X3), \ | |
1614 | __constant_cpu_to_le32(X4)} | |
1615 | ||
1616 | ||
1617 | /* default power management (not Tx power) table values */ | |
1618 | /* for tim 0-10 */ | |
bb8c093b | 1619 | static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = { |
b481de9c ZY |
1620 | {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
1621 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, | |
1622 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0}, | |
1623 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0}, | |
1624 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1}, | |
1625 | {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1} | |
1626 | }; | |
1627 | ||
1628 | /* for tim > 10 */ | |
bb8c093b | 1629 | static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = { |
b481de9c ZY |
1630 | {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0}, |
1631 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), | |
1632 | SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, | |
1633 | {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), | |
1634 | SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, | |
1635 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), | |
1636 | SLP_VEC(2, 6, 9, 9, 0xFF)}, 0}, | |
1637 | {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0}, | |
1638 | {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), | |
1639 | SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} | |
1640 | }; | |
1641 | ||
c79dd5b5 | 1642 | int iwl4965_power_init_handle(struct iwl_priv *priv) |
b481de9c ZY |
1643 | { |
1644 | int rc = 0, i; | |
bb8c093b CH |
1645 | struct iwl4965_power_mgr *pow_data; |
1646 | int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC; | |
b481de9c ZY |
1647 | u16 pci_pm; |
1648 | ||
1649 | IWL_DEBUG_POWER("Initialize power \n"); | |
1650 | ||
1651 | pow_data = &(priv->power_data); | |
1652 | ||
1653 | memset(pow_data, 0, sizeof(*pow_data)); | |
1654 | ||
1655 | pow_data->active_index = IWL_POWER_RANGE_0; | |
1656 | pow_data->dtim_val = 0xffff; | |
1657 | ||
1658 | memcpy(&pow_data->pwr_range_0[0], &range_0[0], size); | |
1659 | memcpy(&pow_data->pwr_range_1[0], &range_1[0], size); | |
1660 | ||
1661 | rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm); | |
1662 | if (rc != 0) | |
1663 | return 0; | |
1664 | else { | |
bb8c093b | 1665 | struct iwl4965_powertable_cmd *cmd; |
b481de9c ZY |
1666 | |
1667 | IWL_DEBUG_POWER("adjust power command flags\n"); | |
1668 | ||
1669 | for (i = 0; i < IWL_POWER_AC; i++) { | |
1670 | cmd = &pow_data->pwr_range_0[i].cmd; | |
1671 | ||
1672 | if (pci_pm & 0x1) | |
1673 | cmd->flags &= ~IWL_POWER_PCI_PM_MSK; | |
1674 | else | |
1675 | cmd->flags |= IWL_POWER_PCI_PM_MSK; | |
1676 | } | |
1677 | } | |
1678 | return rc; | |
1679 | } | |
1680 | ||
c79dd5b5 | 1681 | static int iwl4965_update_power_cmd(struct iwl_priv *priv, |
bb8c093b | 1682 | struct iwl4965_powertable_cmd *cmd, u32 mode) |
b481de9c ZY |
1683 | { |
1684 | int rc = 0, i; | |
1685 | u8 skip; | |
1686 | u32 max_sleep = 0; | |
bb8c093b | 1687 | struct iwl4965_power_vec_entry *range; |
b481de9c | 1688 | u8 period = 0; |
bb8c093b | 1689 | struct iwl4965_power_mgr *pow_data; |
b481de9c ZY |
1690 | |
1691 | if (mode > IWL_POWER_INDEX_5) { | |
1692 | IWL_DEBUG_POWER("Error invalid power mode \n"); | |
1693 | return -1; | |
1694 | } | |
1695 | pow_data = &(priv->power_data); | |
1696 | ||
1697 | if (pow_data->active_index == IWL_POWER_RANGE_0) | |
1698 | range = &pow_data->pwr_range_0[0]; | |
1699 | else | |
1700 | range = &pow_data->pwr_range_1[1]; | |
1701 | ||
bb8c093b | 1702 | memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd)); |
b481de9c ZY |
1703 | |
1704 | #ifdef IWL_MAC80211_DISABLE | |
1705 | if (priv->assoc_network != NULL) { | |
1706 | unsigned long flags; | |
1707 | ||
1708 | period = priv->assoc_network->tim.tim_period; | |
1709 | } | |
1710 | #endif /*IWL_MAC80211_DISABLE */ | |
1711 | skip = range[mode].no_dtim; | |
1712 | ||
1713 | if (period == 0) { | |
1714 | period = 1; | |
1715 | skip = 0; | |
1716 | } | |
1717 | ||
1718 | if (skip == 0) { | |
1719 | max_sleep = period; | |
1720 | cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; | |
1721 | } else { | |
1722 | __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]; | |
1723 | max_sleep = (le32_to_cpu(slp_itrvl) / period) * period; | |
1724 | cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; | |
1725 | } | |
1726 | ||
1727 | for (i = 0; i < IWL_POWER_VEC_SIZE; i++) { | |
1728 | if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) | |
1729 | cmd->sleep_interval[i] = cpu_to_le32(max_sleep); | |
1730 | } | |
1731 | ||
1732 | IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags); | |
1733 | IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout)); | |
1734 | IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout)); | |
1735 | IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n", | |
1736 | le32_to_cpu(cmd->sleep_interval[0]), | |
1737 | le32_to_cpu(cmd->sleep_interval[1]), | |
1738 | le32_to_cpu(cmd->sleep_interval[2]), | |
1739 | le32_to_cpu(cmd->sleep_interval[3]), | |
1740 | le32_to_cpu(cmd->sleep_interval[4])); | |
1741 | ||
1742 | return rc; | |
1743 | } | |
1744 | ||
c79dd5b5 | 1745 | static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode) |
b481de9c | 1746 | { |
9a62f73b | 1747 | u32 uninitialized_var(final_mode); |
b481de9c | 1748 | int rc; |
bb8c093b | 1749 | struct iwl4965_powertable_cmd cmd; |
b481de9c ZY |
1750 | |
1751 | /* If on battery, set to 3, | |
01ebd063 | 1752 | * if plugged into AC power, set to CAM ("continuously aware mode"), |
b481de9c ZY |
1753 | * else user level */ |
1754 | switch (mode) { | |
1755 | case IWL_POWER_BATTERY: | |
1756 | final_mode = IWL_POWER_INDEX_3; | |
1757 | break; | |
1758 | case IWL_POWER_AC: | |
1759 | final_mode = IWL_POWER_MODE_CAM; | |
1760 | break; | |
1761 | default: | |
1762 | final_mode = mode; | |
1763 | break; | |
1764 | } | |
1765 | ||
1766 | cmd.keep_alive_beacons = 0; | |
1767 | ||
bb8c093b | 1768 | iwl4965_update_power_cmd(priv, &cmd, final_mode); |
b481de9c | 1769 | |
857485c0 | 1770 | rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd); |
b481de9c ZY |
1771 | |
1772 | if (final_mode == IWL_POWER_MODE_CAM) | |
1773 | clear_bit(STATUS_POWER_PMI, &priv->status); | |
1774 | else | |
1775 | set_bit(STATUS_POWER_PMI, &priv->status); | |
1776 | ||
1777 | return rc; | |
1778 | } | |
1779 | ||
c79dd5b5 | 1780 | int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
1781 | { |
1782 | /* Filter incoming packets to determine if they are targeted toward | |
1783 | * this network, discarding packets coming from ourselves */ | |
1784 | switch (priv->iw_mode) { | |
1785 | case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */ | |
1786 | /* packets from our adapter are dropped (echo) */ | |
1787 | if (!compare_ether_addr(header->addr2, priv->mac_addr)) | |
1788 | return 0; | |
1789 | /* {broad,multi}cast packets to our IBSS go through */ | |
1790 | if (is_multicast_ether_addr(header->addr1)) | |
1791 | return !compare_ether_addr(header->addr3, priv->bssid); | |
1792 | /* packets to our adapter go through */ | |
1793 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
1794 | case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */ | |
1795 | /* packets from our adapter are dropped (echo) */ | |
1796 | if (!compare_ether_addr(header->addr3, priv->mac_addr)) | |
1797 | return 0; | |
1798 | /* {broad,multi}cast packets to our BSS go through */ | |
1799 | if (is_multicast_ether_addr(header->addr1)) | |
1800 | return !compare_ether_addr(header->addr2, priv->bssid); | |
1801 | /* packets to our adapter go through */ | |
1802 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
1803 | } | |
1804 | ||
1805 | return 1; | |
1806 | } | |
1807 | ||
1808 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1809 | ||
bb8c093b | 1810 | static const char *iwl4965_get_tx_fail_reason(u32 status) |
b481de9c ZY |
1811 | { |
1812 | switch (status & TX_STATUS_MSK) { | |
1813 | case TX_STATUS_SUCCESS: | |
1814 | return "SUCCESS"; | |
1815 | TX_STATUS_ENTRY(SHORT_LIMIT); | |
1816 | TX_STATUS_ENTRY(LONG_LIMIT); | |
1817 | TX_STATUS_ENTRY(FIFO_UNDERRUN); | |
1818 | TX_STATUS_ENTRY(MGMNT_ABORT); | |
1819 | TX_STATUS_ENTRY(NEXT_FRAG); | |
1820 | TX_STATUS_ENTRY(LIFE_EXPIRE); | |
1821 | TX_STATUS_ENTRY(DEST_PS); | |
1822 | TX_STATUS_ENTRY(ABORTED); | |
1823 | TX_STATUS_ENTRY(BT_RETRY); | |
1824 | TX_STATUS_ENTRY(STA_INVALID); | |
1825 | TX_STATUS_ENTRY(FRAG_DROPPED); | |
1826 | TX_STATUS_ENTRY(TID_DISABLE); | |
1827 | TX_STATUS_ENTRY(FRAME_FLUSHED); | |
1828 | TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL); | |
1829 | TX_STATUS_ENTRY(TX_LOCKED); | |
1830 | TX_STATUS_ENTRY(NO_BEACON_ON_RADAR); | |
1831 | } | |
1832 | ||
1833 | return "UNKNOWN"; | |
1834 | } | |
1835 | ||
1836 | /** | |
bb8c093b | 1837 | * iwl4965_scan_cancel - Cancel any currently executing HW scan |
b481de9c ZY |
1838 | * |
1839 | * NOTE: priv->mutex is not required before calling this function | |
1840 | */ | |
c79dd5b5 | 1841 | static int iwl4965_scan_cancel(struct iwl_priv *priv) |
b481de9c ZY |
1842 | { |
1843 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
1844 | clear_bit(STATUS_SCANNING, &priv->status); | |
1845 | return 0; | |
1846 | } | |
1847 | ||
1848 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1849 | if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1850 | IWL_DEBUG_SCAN("Queuing scan abort.\n"); | |
1851 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1852 | queue_work(priv->workqueue, &priv->abort_scan); | |
1853 | ||
1854 | } else | |
1855 | IWL_DEBUG_SCAN("Scan abort already in progress.\n"); | |
1856 | ||
1857 | return test_bit(STATUS_SCANNING, &priv->status); | |
1858 | } | |
1859 | ||
1860 | return 0; | |
1861 | } | |
1862 | ||
1863 | /** | |
bb8c093b | 1864 | * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan |
b481de9c ZY |
1865 | * @ms: amount of time to wait (in milliseconds) for scan to abort |
1866 | * | |
1867 | * NOTE: priv->mutex must be held before calling this function | |
1868 | */ | |
c79dd5b5 | 1869 | static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms) |
b481de9c ZY |
1870 | { |
1871 | unsigned long now = jiffies; | |
1872 | int ret; | |
1873 | ||
bb8c093b | 1874 | ret = iwl4965_scan_cancel(priv); |
b481de9c ZY |
1875 | if (ret && ms) { |
1876 | mutex_unlock(&priv->mutex); | |
1877 | while (!time_after(jiffies, now + msecs_to_jiffies(ms)) && | |
1878 | test_bit(STATUS_SCANNING, &priv->status)) | |
1879 | msleep(1); | |
1880 | mutex_lock(&priv->mutex); | |
1881 | ||
1882 | return test_bit(STATUS_SCANNING, &priv->status); | |
1883 | } | |
1884 | ||
1885 | return ret; | |
1886 | } | |
1887 | ||
c79dd5b5 | 1888 | static void iwl4965_sequence_reset(struct iwl_priv *priv) |
b481de9c ZY |
1889 | { |
1890 | /* Reset ieee stats */ | |
1891 | ||
1892 | /* We don't reset the net_device_stats (ieee->stats) on | |
1893 | * re-association */ | |
1894 | ||
1895 | priv->last_seq_num = -1; | |
1896 | priv->last_frag_num = -1; | |
1897 | priv->last_packet_time = 0; | |
1898 | ||
bb8c093b | 1899 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
1900 | } |
1901 | ||
1902 | #define MAX_UCODE_BEACON_INTERVAL 4096 | |
1903 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | |
1904 | ||
bb8c093b | 1905 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
1906 | { |
1907 | u16 new_val = 0; | |
1908 | u16 beacon_factor = 0; | |
1909 | ||
1910 | beacon_factor = | |
1911 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
1912 | / MAX_UCODE_BEACON_INTERVAL; | |
1913 | new_val = beacon_val / beacon_factor; | |
1914 | ||
1915 | return cpu_to_le16(new_val); | |
1916 | } | |
1917 | ||
c79dd5b5 | 1918 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
1919 | { |
1920 | u64 interval_tm_unit; | |
1921 | u64 tsf, result; | |
1922 | unsigned long flags; | |
1923 | struct ieee80211_conf *conf = NULL; | |
1924 | u16 beacon_int = 0; | |
1925 | ||
1926 | conf = ieee80211_get_hw_conf(priv->hw); | |
1927 | ||
1928 | spin_lock_irqsave(&priv->lock, flags); | |
1929 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1); | |
1930 | priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0); | |
1931 | ||
1932 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | |
1933 | ||
1934 | tsf = priv->timestamp1; | |
1935 | tsf = ((tsf << 32) | priv->timestamp0); | |
1936 | ||
1937 | beacon_int = priv->beacon_int; | |
1938 | spin_unlock_irqrestore(&priv->lock, flags); | |
1939 | ||
1940 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
1941 | if (beacon_int == 0) { | |
1942 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
1943 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
1944 | } else { | |
1945 | priv->rxon_timing.beacon_interval = | |
1946 | cpu_to_le16(beacon_int); | |
1947 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1948 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
1949 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
1950 | } | |
1951 | ||
1952 | priv->rxon_timing.atim_window = 0; | |
1953 | } else { | |
1954 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1955 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
1956 | /* TODO: we need to get atim_window from upper stack |
1957 | * for now we set to 0 */ | |
1958 | priv->rxon_timing.atim_window = 0; | |
1959 | } | |
1960 | ||
1961 | interval_tm_unit = | |
1962 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
1963 | result = do_div(tsf, interval_tm_unit); | |
1964 | priv->rxon_timing.beacon_init_val = | |
1965 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
1966 | ||
1967 | IWL_DEBUG_ASSOC | |
1968 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
1969 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
1970 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
1971 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
1972 | } | |
1973 | ||
c79dd5b5 | 1974 | static int iwl4965_scan_initiate(struct iwl_priv *priv) |
b481de9c ZY |
1975 | { |
1976 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
1977 | IWL_ERROR("APs don't scan.\n"); | |
1978 | return 0; | |
1979 | } | |
1980 | ||
bb8c093b | 1981 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
1982 | IWL_DEBUG_SCAN("Aborting scan due to not ready.\n"); |
1983 | return -EIO; | |
1984 | } | |
1985 | ||
1986 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1987 | IWL_DEBUG_SCAN("Scan already in progress.\n"); | |
1988 | return -EAGAIN; | |
1989 | } | |
1990 | ||
1991 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1992 | IWL_DEBUG_SCAN("Scan request while abort pending. " | |
1993 | "Queuing.\n"); | |
1994 | return -EAGAIN; | |
1995 | } | |
1996 | ||
1997 | IWL_DEBUG_INFO("Starting scan...\n"); | |
1998 | priv->scan_bands = 2; | |
1999 | set_bit(STATUS_SCANNING, &priv->status); | |
2000 | priv->scan_start = jiffies; | |
2001 | priv->scan_pass_start = priv->scan_start; | |
2002 | ||
2003 | queue_work(priv->workqueue, &priv->request_scan); | |
2004 | ||
2005 | return 0; | |
2006 | } | |
2007 | ||
b481de9c | 2008 | |
c79dd5b5 | 2009 | static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv, |
8318d78a | 2010 | enum ieee80211_band band) |
b481de9c | 2011 | { |
8318d78a | 2012 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
2013 | priv->staging_rxon.flags &= |
2014 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
2015 | | RXON_FLG_CCK_MSK); | |
2016 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2017 | } else { | |
bb8c093b | 2018 | /* Copied from iwl4965_bg_post_associate() */ |
b481de9c ZY |
2019 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
2020 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
2021 | else | |
2022 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2023 | ||
2024 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
2025 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
2026 | ||
2027 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
2028 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
2029 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
2030 | } | |
2031 | } | |
2032 | ||
2033 | /* | |
01ebd063 | 2034 | * initialize rxon structure with default values from eeprom |
b481de9c | 2035 | */ |
c79dd5b5 | 2036 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 2037 | { |
bf85ea4f | 2038 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
2039 | |
2040 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
2041 | ||
2042 | switch (priv->iw_mode) { | |
2043 | case IEEE80211_IF_TYPE_AP: | |
2044 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
2045 | break; | |
2046 | ||
2047 | case IEEE80211_IF_TYPE_STA: | |
2048 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
2049 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
2050 | break; | |
2051 | ||
2052 | case IEEE80211_IF_TYPE_IBSS: | |
2053 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
2054 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
2055 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
2056 | RXON_FILTER_ACCEPT_GRP_MSK; | |
2057 | break; | |
2058 | ||
2059 | case IEEE80211_IF_TYPE_MNTR: | |
2060 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
2061 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
2062 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
2063 | break; | |
2064 | } | |
2065 | ||
2066 | #if 0 | |
2067 | /* TODO: Figure out when short_preamble would be set and cache from | |
2068 | * that */ | |
2069 | if (!hw_to_local(priv->hw)->short_preamble) | |
2070 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
2071 | else | |
2072 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
2073 | #endif | |
2074 | ||
8622e705 | 2075 | ch_info = iwl_get_channel_info(priv, priv->band, |
b481de9c ZY |
2076 | le16_to_cpu(priv->staging_rxon.channel)); |
2077 | ||
2078 | if (!ch_info) | |
2079 | ch_info = &priv->channel_info[0]; | |
2080 | ||
2081 | /* | |
2082 | * in some case A channels are all non IBSS | |
2083 | * in this case force B/G channel | |
2084 | */ | |
2085 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
2086 | !(is_channel_ibss(ch_info))) | |
2087 | ch_info = &priv->channel_info[0]; | |
2088 | ||
2089 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 2090 | priv->band = ch_info->band; |
b481de9c | 2091 | |
8318d78a | 2092 | iwl4965_set_flags_for_phymode(priv, priv->band); |
b481de9c ZY |
2093 | |
2094 | priv->staging_rxon.ofdm_basic_rates = | |
2095 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
2096 | priv->staging_rxon.cck_basic_rates = | |
2097 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
2098 | ||
2099 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
2100 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
2101 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
2102 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
2103 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
2104 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
2105 | iwl4965_set_rxon_chain(priv); | |
2106 | } | |
2107 | ||
c79dd5b5 | 2108 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 2109 | { |
b481de9c | 2110 | if (mode == IEEE80211_IF_TYPE_IBSS) { |
bf85ea4f | 2111 | const struct iwl_channel_info *ch_info; |
b481de9c | 2112 | |
8622e705 | 2113 | ch_info = iwl_get_channel_info(priv, |
8318d78a | 2114 | priv->band, |
b481de9c ZY |
2115 | le16_to_cpu(priv->staging_rxon.channel)); |
2116 | ||
2117 | if (!ch_info || !is_channel_ibss(ch_info)) { | |
2118 | IWL_ERROR("channel %d not IBSS channel\n", | |
2119 | le16_to_cpu(priv->staging_rxon.channel)); | |
2120 | return -EINVAL; | |
2121 | } | |
2122 | } | |
2123 | ||
b481de9c ZY |
2124 | priv->iw_mode = mode; |
2125 | ||
bb8c093b | 2126 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
2127 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
2128 | ||
bf85ea4f | 2129 | iwlcore_clear_stations_table(priv); |
b481de9c | 2130 | |
fde3571f MA |
2131 | /* dont commit rxon if rf-kill is on*/ |
2132 | if (!iwl4965_is_ready_rf(priv)) | |
2133 | return -EAGAIN; | |
2134 | ||
2135 | cancel_delayed_work(&priv->scan_check); | |
2136 | if (iwl4965_scan_cancel_timeout(priv, 100)) { | |
2137 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); | |
2138 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
2139 | return -EAGAIN; | |
2140 | } | |
2141 | ||
bb8c093b | 2142 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
2143 | |
2144 | return 0; | |
2145 | } | |
2146 | ||
c79dd5b5 | 2147 | static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv, |
b481de9c | 2148 | struct ieee80211_tx_control *ctl, |
857485c0 | 2149 | struct iwl_cmd *cmd, |
b481de9c | 2150 | struct sk_buff *skb_frag, |
deb09c43 | 2151 | int sta_id) |
b481de9c | 2152 | { |
deb09c43 | 2153 | struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo; |
b481de9c ZY |
2154 | |
2155 | switch (keyinfo->alg) { | |
2156 | case ALG_CCMP: | |
2157 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM; | |
2158 | memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen); | |
8236e183 MS |
2159 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
2160 | cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK; | |
b481de9c ZY |
2161 | IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n"); |
2162 | break; | |
2163 | ||
2164 | case ALG_TKIP: | |
b481de9c | 2165 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP; |
2bc75089 EG |
2166 | ieee80211_get_tkip_key(keyinfo->conf, skb_frag, |
2167 | IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key); | |
2168 | IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n"); | |
b481de9c ZY |
2169 | break; |
2170 | ||
2171 | case ALG_WEP: | |
2172 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP | | |
2173 | (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; | |
2174 | ||
2175 | if (keyinfo->keylen == 13) | |
2176 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
2177 | ||
2178 | memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen); | |
2179 | ||
2180 | IWL_DEBUG_TX("Configuring packet for WEP encryption " | |
2181 | "with key %d\n", ctl->key_idx); | |
2182 | break; | |
2183 | ||
b481de9c ZY |
2184 | default: |
2185 | printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg); | |
2186 | break; | |
2187 | } | |
2188 | } | |
2189 | ||
2190 | /* | |
2191 | * handle build REPLY_TX command notification. | |
2192 | */ | |
c79dd5b5 | 2193 | static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv, |
857485c0 | 2194 | struct iwl_cmd *cmd, |
b481de9c ZY |
2195 | struct ieee80211_tx_control *ctrl, |
2196 | struct ieee80211_hdr *hdr, | |
2197 | int is_unicast, u8 std_id) | |
2198 | { | |
2199 | __le16 *qc; | |
2200 | u16 fc = le16_to_cpu(hdr->frame_control); | |
2201 | __le32 tx_flags = cmd->cmd.tx.tx_flags; | |
2202 | ||
2203 | cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
2204 | if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) { | |
2205 | tx_flags |= TX_CMD_FLG_ACK_MSK; | |
2206 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
2207 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
2208 | if (ieee80211_is_probe_response(fc) && | |
2209 | !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) | |
2210 | tx_flags |= TX_CMD_FLG_TSF_MSK; | |
2211 | } else { | |
2212 | tx_flags &= (~TX_CMD_FLG_ACK_MSK); | |
2213 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
2214 | } | |
2215 | ||
87e4f7df TW |
2216 | if (ieee80211_is_back_request(fc)) |
2217 | tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK; | |
2218 | ||
2219 | ||
b481de9c ZY |
2220 | cmd->cmd.tx.sta_id = std_id; |
2221 | if (ieee80211_get_morefrag(hdr)) | |
2222 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; | |
2223 | ||
2224 | qc = ieee80211_get_qos_ctrl(hdr); | |
2225 | if (qc) { | |
2226 | cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf); | |
2227 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | |
2228 | } else | |
2229 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
2230 | ||
2231 | if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) { | |
2232 | tx_flags |= TX_CMD_FLG_RTS_MSK; | |
2233 | tx_flags &= ~TX_CMD_FLG_CTS_MSK; | |
2234 | } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) { | |
2235 | tx_flags &= ~TX_CMD_FLG_RTS_MSK; | |
2236 | tx_flags |= TX_CMD_FLG_CTS_MSK; | |
2237 | } | |
2238 | ||
2239 | if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK)) | |
2240 | tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; | |
2241 | ||
2242 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | |
2243 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) { | |
2244 | if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ || | |
2245 | (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ) | |
bc434dd2 | 2246 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); |
b481de9c | 2247 | else |
bc434dd2 | 2248 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); |
b481de9c ZY |
2249 | } else |
2250 | cmd->cmd.tx.timeout.pm_frame_timeout = 0; | |
2251 | ||
2252 | cmd->cmd.tx.driver_txop = 0; | |
2253 | cmd->cmd.tx.tx_flags = tx_flags; | |
2254 | cmd->cmd.tx.next_frame_len = 0; | |
2255 | } | |
19758bef TW |
2256 | static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len) |
2257 | { | |
2258 | /* 0 - mgmt, 1 - cnt, 2 - data */ | |
2259 | int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2; | |
2260 | priv->tx_stats[idx].cnt++; | |
2261 | priv->tx_stats[idx].bytes += len; | |
2262 | } | |
6440adb5 BC |
2263 | /** |
2264 | * iwl4965_get_sta_id - Find station's index within station table | |
2265 | * | |
2266 | * If new IBSS station, create new entry in station table | |
2267 | */ | |
c79dd5b5 | 2268 | static int iwl4965_get_sta_id(struct iwl_priv *priv, |
9fbab516 | 2269 | struct ieee80211_hdr *hdr) |
b481de9c ZY |
2270 | { |
2271 | int sta_id; | |
2272 | u16 fc = le16_to_cpu(hdr->frame_control); | |
0795af57 | 2273 | DECLARE_MAC_BUF(mac); |
b481de9c | 2274 | |
6440adb5 | 2275 | /* If this frame is broadcast or management, use broadcast station id */ |
b481de9c ZY |
2276 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || |
2277 | is_multicast_ether_addr(hdr->addr1)) | |
2278 | return priv->hw_setting.bcast_sta_id; | |
2279 | ||
2280 | switch (priv->iw_mode) { | |
2281 | ||
6440adb5 BC |
2282 | /* If we are a client station in a BSS network, use the special |
2283 | * AP station entry (that's the only station we communicate with) */ | |
b481de9c ZY |
2284 | case IEEE80211_IF_TYPE_STA: |
2285 | return IWL_AP_ID; | |
2286 | ||
2287 | /* If we are an AP, then find the station, or use BCAST */ | |
2288 | case IEEE80211_IF_TYPE_AP: | |
bb8c093b | 2289 | sta_id = iwl4965_hw_find_station(priv, hdr->addr1); |
b481de9c ZY |
2290 | if (sta_id != IWL_INVALID_STATION) |
2291 | return sta_id; | |
2292 | return priv->hw_setting.bcast_sta_id; | |
2293 | ||
6440adb5 BC |
2294 | /* If this frame is going out to an IBSS network, find the station, |
2295 | * or create a new station table entry */ | |
b481de9c | 2296 | case IEEE80211_IF_TYPE_IBSS: |
bb8c093b | 2297 | sta_id = iwl4965_hw_find_station(priv, hdr->addr1); |
b481de9c ZY |
2298 | if (sta_id != IWL_INVALID_STATION) |
2299 | return sta_id; | |
2300 | ||
6440adb5 | 2301 | /* Create new station table entry */ |
67d62035 RR |
2302 | sta_id = iwl4965_add_station_flags(priv, hdr->addr1, |
2303 | 0, CMD_ASYNC, NULL); | |
b481de9c ZY |
2304 | |
2305 | if (sta_id != IWL_INVALID_STATION) | |
2306 | return sta_id; | |
2307 | ||
0795af57 | 2308 | IWL_DEBUG_DROP("Station %s not in station map. " |
b481de9c | 2309 | "Defaulting to broadcast...\n", |
0795af57 | 2310 | print_mac(mac, hdr->addr1)); |
0a6857e7 | 2311 | iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); |
b481de9c ZY |
2312 | return priv->hw_setting.bcast_sta_id; |
2313 | ||
2314 | default: | |
01ebd063 | 2315 | IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode); |
b481de9c ZY |
2316 | return priv->hw_setting.bcast_sta_id; |
2317 | } | |
2318 | } | |
2319 | ||
2320 | /* | |
2321 | * start REPLY_TX command process | |
2322 | */ | |
c79dd5b5 | 2323 | static int iwl4965_tx_skb(struct iwl_priv *priv, |
b481de9c ZY |
2324 | struct sk_buff *skb, struct ieee80211_tx_control *ctl) |
2325 | { | |
2326 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
bb8c093b | 2327 | struct iwl4965_tfd_frame *tfd; |
b481de9c ZY |
2328 | u32 *control_flags; |
2329 | int txq_id = ctl->queue; | |
bb8c093b CH |
2330 | struct iwl4965_tx_queue *txq = NULL; |
2331 | struct iwl4965_queue *q = NULL; | |
b481de9c ZY |
2332 | dma_addr_t phys_addr; |
2333 | dma_addr_t txcmd_phys; | |
87e4f7df | 2334 | dma_addr_t scratch_phys; |
857485c0 | 2335 | struct iwl_cmd *out_cmd = NULL; |
b481de9c ZY |
2336 | u16 len, idx, len_org; |
2337 | u8 id, hdr_len, unicast; | |
2338 | u8 sta_id; | |
2339 | u16 seq_number = 0; | |
2340 | u16 fc; | |
2341 | __le16 *qc; | |
2342 | u8 wait_write_ptr = 0; | |
2343 | unsigned long flags; | |
2344 | int rc; | |
2345 | ||
2346 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 2347 | if (iwl4965_is_rfkill(priv)) { |
b481de9c ZY |
2348 | IWL_DEBUG_DROP("Dropping - RF KILL\n"); |
2349 | goto drop_unlock; | |
2350 | } | |
2351 | ||
32bfd35d JB |
2352 | if (!priv->vif) { |
2353 | IWL_DEBUG_DROP("Dropping - !priv->vif\n"); | |
b481de9c ZY |
2354 | goto drop_unlock; |
2355 | } | |
2356 | ||
8318d78a | 2357 | if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) { |
b481de9c ZY |
2358 | IWL_ERROR("ERROR: No TX rate available.\n"); |
2359 | goto drop_unlock; | |
2360 | } | |
2361 | ||
2362 | unicast = !is_multicast_ether_addr(hdr->addr1); | |
2363 | id = 0; | |
2364 | ||
2365 | fc = le16_to_cpu(hdr->frame_control); | |
2366 | ||
0a6857e7 | 2367 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
2368 | if (ieee80211_is_auth(fc)) |
2369 | IWL_DEBUG_TX("Sending AUTH frame\n"); | |
2370 | else if (ieee80211_is_assoc_request(fc)) | |
2371 | IWL_DEBUG_TX("Sending ASSOC frame\n"); | |
2372 | else if (ieee80211_is_reassoc_request(fc)) | |
2373 | IWL_DEBUG_TX("Sending REASSOC frame\n"); | |
2374 | #endif | |
2375 | ||
7878a5a4 | 2376 | /* drop all data frame if we are not associated */ |
76f3915b GG |
2377 | if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) && |
2378 | (!iwl4965_is_associated(priv) || | |
a6477249 | 2379 | ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) || |
76f3915b | 2380 | !priv->assoc_station_added)) { |
bb8c093b | 2381 | IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n"); |
b481de9c ZY |
2382 | goto drop_unlock; |
2383 | } | |
2384 | ||
2385 | spin_unlock_irqrestore(&priv->lock, flags); | |
2386 | ||
2387 | hdr_len = ieee80211_get_hdrlen(fc); | |
6440adb5 BC |
2388 | |
2389 | /* Find (or create) index into station table for destination station */ | |
bb8c093b | 2390 | sta_id = iwl4965_get_sta_id(priv, hdr); |
b481de9c | 2391 | if (sta_id == IWL_INVALID_STATION) { |
0795af57 JP |
2392 | DECLARE_MAC_BUF(mac); |
2393 | ||
2394 | IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n", | |
2395 | print_mac(mac, hdr->addr1)); | |
b481de9c ZY |
2396 | goto drop; |
2397 | } | |
2398 | ||
2399 | IWL_DEBUG_RATE("station Id %d\n", sta_id); | |
2400 | ||
2401 | qc = ieee80211_get_qos_ctrl(hdr); | |
2402 | if (qc) { | |
2403 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
2404 | seq_number = priv->stations[sta_id].tid[tid].seq_number & | |
2405 | IEEE80211_SCTL_SEQ; | |
2406 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | |
2407 | (hdr->seq_ctrl & | |
2408 | __constant_cpu_to_le16(IEEE80211_SCTL_FRAG)); | |
2409 | seq_number += 0x10; | |
c8b0e6e1 | 2410 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 2411 | /* aggregation is on for this <sta,tid> */ |
fe01b477 | 2412 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
b481de9c | 2413 | txq_id = priv->stations[sta_id].tid[tid].agg.txq_id; |
fe01b477 | 2414 | priv->stations[sta_id].tid[tid].tfds_in_queue++; |
c8b0e6e1 | 2415 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 2416 | } |
6440adb5 BC |
2417 | |
2418 | /* Descriptor for chosen Tx queue */ | |
b481de9c ZY |
2419 | txq = &priv->txq[txq_id]; |
2420 | q = &txq->q; | |
2421 | ||
2422 | spin_lock_irqsave(&priv->lock, flags); | |
2423 | ||
6440adb5 | 2424 | /* Set up first empty TFD within this queue's circular TFD buffer */ |
fc4b6853 | 2425 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
2426 | memset(tfd, 0, sizeof(*tfd)); |
2427 | control_flags = (u32 *) tfd; | |
fc4b6853 | 2428 | idx = get_cmd_index(q, q->write_ptr, 0); |
b481de9c | 2429 | |
6440adb5 | 2430 | /* Set up driver data for this TFD */ |
bb8c093b | 2431 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info)); |
fc4b6853 TW |
2432 | txq->txb[q->write_ptr].skb[0] = skb; |
2433 | memcpy(&(txq->txb[q->write_ptr].status.control), | |
b481de9c | 2434 | ctl, sizeof(struct ieee80211_tx_control)); |
6440adb5 BC |
2435 | |
2436 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ | |
b481de9c ZY |
2437 | out_cmd = &txq->cmd[idx]; |
2438 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | |
2439 | memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx)); | |
6440adb5 BC |
2440 | |
2441 | /* | |
2442 | * Set up the Tx-command (not MAC!) header. | |
2443 | * Store the chosen Tx queue and TFD index within the sequence field; | |
2444 | * after Tx, uCode's Tx response will return this value so driver can | |
2445 | * locate the frame within the tx queue and do post-tx processing. | |
2446 | */ | |
b481de9c ZY |
2447 | out_cmd->hdr.cmd = REPLY_TX; |
2448 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | |
fc4b6853 | 2449 | INDEX_TO_SEQ(q->write_ptr))); |
6440adb5 BC |
2450 | |
2451 | /* Copy MAC header from skb into command buffer */ | |
b481de9c ZY |
2452 | memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len); |
2453 | ||
6440adb5 BC |
2454 | /* |
2455 | * Use the first empty entry in this queue's command buffer array | |
2456 | * to contain the Tx command and MAC header concatenated together | |
2457 | * (payload data will be in another buffer). | |
2458 | * Size of this varies, due to varying MAC header length. | |
2459 | * If end is not dword aligned, we'll have 2 extra bytes at the end | |
2460 | * of the MAC header (device reads on dword boundaries). | |
2461 | * We'll tell device about this padding later. | |
2462 | */ | |
b481de9c | 2463 | len = priv->hw_setting.tx_cmd_len + |
857485c0 | 2464 | sizeof(struct iwl_cmd_header) + hdr_len; |
b481de9c ZY |
2465 | |
2466 | len_org = len; | |
2467 | len = (len + 3) & ~3; | |
2468 | ||
2469 | if (len_org != len) | |
2470 | len_org = 1; | |
2471 | else | |
2472 | len_org = 0; | |
2473 | ||
6440adb5 BC |
2474 | /* Physical address of this Tx command's header (not MAC header!), |
2475 | * within command buffer array. */ | |
857485c0 TW |
2476 | txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx + |
2477 | offsetof(struct iwl_cmd, hdr); | |
b481de9c | 2478 | |
6440adb5 BC |
2479 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
2480 | * first entry */ | |
bb8c093b | 2481 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); |
b481de9c ZY |
2482 | |
2483 | if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT)) | |
deb09c43 | 2484 | iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id); |
b481de9c | 2485 | |
6440adb5 BC |
2486 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
2487 | * if any (802.11 null frames have no payload). */ | |
b481de9c ZY |
2488 | len = skb->len - hdr_len; |
2489 | if (len) { | |
2490 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | |
2491 | len, PCI_DMA_TODEVICE); | |
bb8c093b | 2492 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len); |
b481de9c ZY |
2493 | } |
2494 | ||
6440adb5 | 2495 | /* Tell 4965 about any 2-byte padding after MAC header */ |
b481de9c ZY |
2496 | if (len_org) |
2497 | out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK; | |
2498 | ||
6440adb5 | 2499 | /* Total # bytes to be transmitted */ |
b481de9c ZY |
2500 | len = (u16)skb->len; |
2501 | out_cmd->cmd.tx.len = cpu_to_le16(len); | |
2502 | ||
2503 | /* TODO need this for burst mode later on */ | |
bb8c093b | 2504 | iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id); |
b481de9c ZY |
2505 | |
2506 | /* set is_hcca to 0; it probably will never be implemented */ | |
bb8c093b | 2507 | iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0); |
b481de9c | 2508 | |
19758bef TW |
2509 | iwl_update_tx_stats(priv, fc, len); |
2510 | ||
857485c0 | 2511 | scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + |
87e4f7df TW |
2512 | offsetof(struct iwl4965_tx_cmd, scratch); |
2513 | out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys); | |
2514 | out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys); | |
2515 | ||
b481de9c ZY |
2516 | if (!ieee80211_get_morefrag(hdr)) { |
2517 | txq->need_update = 1; | |
2518 | if (qc) { | |
2519 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
2520 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | |
2521 | } | |
2522 | } else { | |
2523 | wait_write_ptr = 1; | |
2524 | txq->need_update = 0; | |
2525 | } | |
2526 | ||
0a6857e7 | 2527 | iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload, |
b481de9c ZY |
2528 | sizeof(out_cmd->cmd.tx)); |
2529 | ||
0a6857e7 | 2530 | iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr, |
b481de9c ZY |
2531 | ieee80211_get_hdrlen(fc)); |
2532 | ||
6440adb5 | 2533 | /* Set up entry for this TFD in Tx byte-count array */ |
b481de9c ZY |
2534 | iwl4965_tx_queue_update_wr_ptr(priv, txq, len); |
2535 | ||
6440adb5 | 2536 | /* Tell device the write index *just past* this latest filled TFD */ |
c54b679d | 2537 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
bb8c093b | 2538 | rc = iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
2539 | spin_unlock_irqrestore(&priv->lock, flags); |
2540 | ||
2541 | if (rc) | |
2542 | return rc; | |
2543 | ||
bb8c093b | 2544 | if ((iwl4965_queue_space(q) < q->high_mark) |
b481de9c ZY |
2545 | && priv->mac80211_registered) { |
2546 | if (wait_write_ptr) { | |
2547 | spin_lock_irqsave(&priv->lock, flags); | |
2548 | txq->need_update = 1; | |
bb8c093b | 2549 | iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
2550 | spin_unlock_irqrestore(&priv->lock, flags); |
2551 | } | |
2552 | ||
2553 | ieee80211_stop_queue(priv->hw, ctl->queue); | |
2554 | } | |
2555 | ||
2556 | return 0; | |
2557 | ||
2558 | drop_unlock: | |
2559 | spin_unlock_irqrestore(&priv->lock, flags); | |
2560 | drop: | |
2561 | return -1; | |
2562 | } | |
2563 | ||
c79dd5b5 | 2564 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 2565 | { |
8318d78a | 2566 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
2567 | struct ieee80211_rate *rate; |
2568 | int i; | |
2569 | ||
8318d78a | 2570 | hw = iwl4965_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
2571 | if (!hw) { |
2572 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
2573 | return; | |
2574 | } | |
b481de9c ZY |
2575 | |
2576 | priv->active_rate = 0; | |
2577 | priv->active_rate_basic = 0; | |
2578 | ||
8318d78a JB |
2579 | for (i = 0; i < hw->n_bitrates; i++) { |
2580 | rate = &(hw->bitrates[i]); | |
2581 | if (rate->hw_value < IWL_RATE_COUNT) | |
2582 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
2583 | } |
2584 | ||
2585 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
2586 | priv->active_rate, priv->active_rate_basic); | |
2587 | ||
2588 | /* | |
2589 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
2590 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
2591 | * OFDM | |
2592 | */ | |
2593 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
2594 | priv->staging_rxon.cck_basic_rates = | |
2595 | ((priv->active_rate_basic & | |
2596 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
2597 | else | |
2598 | priv->staging_rxon.cck_basic_rates = | |
2599 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
2600 | ||
2601 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
2602 | priv->staging_rxon.ofdm_basic_rates = | |
2603 | ((priv->active_rate_basic & | |
2604 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
2605 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
2606 | else | |
2607 | priv->staging_rxon.ofdm_basic_rates = | |
2608 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
2609 | } | |
2610 | ||
c79dd5b5 | 2611 | static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio) |
b481de9c ZY |
2612 | { |
2613 | unsigned long flags; | |
2614 | ||
2615 | if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
2616 | return; | |
2617 | ||
2618 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n", | |
2619 | disable_radio ? "OFF" : "ON"); | |
2620 | ||
2621 | if (disable_radio) { | |
bb8c093b | 2622 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
2623 | /* FIXME: This is a workaround for AP */ |
2624 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2625 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 2626 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
2627 | CSR_UCODE_SW_BIT_RFKILL); |
2628 | spin_unlock_irqrestore(&priv->lock, flags); | |
bb8c093b | 2629 | iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0); |
b481de9c ZY |
2630 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
2631 | } | |
2632 | return; | |
2633 | } | |
2634 | ||
2635 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 2636 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
b481de9c ZY |
2637 | |
2638 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
2639 | spin_unlock_irqrestore(&priv->lock, flags); | |
2640 | ||
2641 | /* wake up ucode */ | |
2642 | msleep(10); | |
2643 | ||
2644 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b CH |
2645 | iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
2646 | if (!iwl4965_grab_nic_access(priv)) | |
2647 | iwl4965_release_nic_access(priv); | |
b481de9c ZY |
2648 | spin_unlock_irqrestore(&priv->lock, flags); |
2649 | ||
2650 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | |
2651 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2652 | "disabled by HW switch\n"); | |
2653 | return; | |
2654 | } | |
2655 | ||
2656 | queue_work(priv->workqueue, &priv->restart); | |
2657 | return; | |
2658 | } | |
2659 | ||
c79dd5b5 | 2660 | void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb, |
b481de9c ZY |
2661 | u32 decrypt_res, struct ieee80211_rx_status *stats) |
2662 | { | |
2663 | u16 fc = | |
2664 | le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control); | |
2665 | ||
2666 | if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK) | |
2667 | return; | |
2668 | ||
2669 | if (!(fc & IEEE80211_FCTL_PROTECTED)) | |
2670 | return; | |
2671 | ||
2672 | IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res); | |
2673 | switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) { | |
2674 | case RX_RES_STATUS_SEC_TYPE_TKIP: | |
17e476b8 EG |
2675 | /* The uCode has got a bad phase 1 Key, pushes the packet. |
2676 | * Decryption will be done in SW. */ | |
2677 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == | |
2678 | RX_RES_STATUS_BAD_KEY_TTAK) | |
2679 | break; | |
2680 | ||
b481de9c ZY |
2681 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == |
2682 | RX_RES_STATUS_BAD_ICV_MIC) | |
2683 | stats->flag |= RX_FLAG_MMIC_ERROR; | |
2684 | case RX_RES_STATUS_SEC_TYPE_WEP: | |
2685 | case RX_RES_STATUS_SEC_TYPE_CCMP: | |
2686 | if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) == | |
2687 | RX_RES_STATUS_DECRYPT_OK) { | |
2688 | IWL_DEBUG_RX("hw decrypt successfully!!!\n"); | |
2689 | stats->flag |= RX_FLAG_DECRYPTED; | |
2690 | } | |
2691 | break; | |
2692 | ||
2693 | default: | |
2694 | break; | |
2695 | } | |
2696 | } | |
2697 | ||
b481de9c ZY |
2698 | |
2699 | #define IWL_PACKET_RETRY_TIME HZ | |
2700 | ||
c79dd5b5 | 2701 | int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
2702 | { |
2703 | u16 sc = le16_to_cpu(header->seq_ctrl); | |
2704 | u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4; | |
2705 | u16 frag = sc & IEEE80211_SCTL_FRAG; | |
2706 | u16 *last_seq, *last_frag; | |
2707 | unsigned long *last_time; | |
2708 | ||
2709 | switch (priv->iw_mode) { | |
2710 | case IEEE80211_IF_TYPE_IBSS:{ | |
2711 | struct list_head *p; | |
bb8c093b | 2712 | struct iwl4965_ibss_seq *entry = NULL; |
b481de9c ZY |
2713 | u8 *mac = header->addr2; |
2714 | int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1); | |
2715 | ||
2716 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
bb8c093b | 2717 | entry = list_entry(p, struct iwl4965_ibss_seq, list); |
b481de9c ZY |
2718 | if (!compare_ether_addr(entry->mac, mac)) |
2719 | break; | |
2720 | } | |
2721 | if (p == &priv->ibss_mac_hash[index]) { | |
2722 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
2723 | if (!entry) { | |
bc434dd2 | 2724 | IWL_ERROR("Cannot malloc new mac entry\n"); |
b481de9c ZY |
2725 | return 0; |
2726 | } | |
2727 | memcpy(entry->mac, mac, ETH_ALEN); | |
2728 | entry->seq_num = seq; | |
2729 | entry->frag_num = frag; | |
2730 | entry->packet_time = jiffies; | |
bc434dd2 | 2731 | list_add(&entry->list, &priv->ibss_mac_hash[index]); |
b481de9c ZY |
2732 | return 0; |
2733 | } | |
2734 | last_seq = &entry->seq_num; | |
2735 | last_frag = &entry->frag_num; | |
2736 | last_time = &entry->packet_time; | |
2737 | break; | |
2738 | } | |
2739 | case IEEE80211_IF_TYPE_STA: | |
2740 | last_seq = &priv->last_seq_num; | |
2741 | last_frag = &priv->last_frag_num; | |
2742 | last_time = &priv->last_packet_time; | |
2743 | break; | |
2744 | default: | |
2745 | return 0; | |
2746 | } | |
2747 | if ((*last_seq == seq) && | |
2748 | time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) { | |
2749 | if (*last_frag == frag) | |
2750 | goto drop; | |
2751 | if (*last_frag + 1 != frag) | |
2752 | /* out-of-order fragment */ | |
2753 | goto drop; | |
2754 | } else | |
2755 | *last_seq = seq; | |
2756 | ||
2757 | *last_frag = frag; | |
2758 | *last_time = jiffies; | |
2759 | return 0; | |
2760 | ||
2761 | drop: | |
2762 | return 1; | |
2763 | } | |
2764 | ||
c8b0e6e1 | 2765 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
2766 | |
2767 | #include "iwl-spectrum.h" | |
2768 | ||
2769 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
2770 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
2771 | #define TIME_UNIT 1024 | |
2772 | ||
2773 | /* | |
2774 | * extended beacon time format | |
2775 | * time in usec will be changed into a 32-bit value in 8:24 format | |
2776 | * the high 1 byte is the beacon counts | |
2777 | * the lower 3 bytes is the time in usec within one beacon interval | |
2778 | */ | |
2779 | ||
bb8c093b | 2780 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
2781 | { |
2782 | u32 quot; | |
2783 | u32 rem; | |
2784 | u32 interval = beacon_interval * 1024; | |
2785 | ||
2786 | if (!interval || !usec) | |
2787 | return 0; | |
2788 | ||
2789 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
2790 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
2791 | ||
2792 | return (quot << 24) + rem; | |
2793 | } | |
2794 | ||
2795 | /* base is usually what we get from ucode with each received frame, | |
2796 | * the same as HW timer counter counting down | |
2797 | */ | |
2798 | ||
bb8c093b | 2799 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
2800 | { |
2801 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
2802 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
2803 | u32 interval = beacon_interval * TIME_UNIT; | |
2804 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
2805 | (addon & BEACON_TIME_MASK_HIGH); | |
2806 | ||
2807 | if (base_low > addon_low) | |
2808 | res += base_low - addon_low; | |
2809 | else if (base_low < addon_low) { | |
2810 | res += interval + base_low - addon_low; | |
2811 | res += (1 << 24); | |
2812 | } else | |
2813 | res += (1 << 24); | |
2814 | ||
2815 | return cpu_to_le32(res); | |
2816 | } | |
2817 | ||
c79dd5b5 | 2818 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
2819 | struct ieee80211_measurement_params *params, |
2820 | u8 type) | |
2821 | { | |
bb8c093b CH |
2822 | struct iwl4965_spectrum_cmd spectrum; |
2823 | struct iwl4965_rx_packet *res; | |
857485c0 | 2824 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
2825 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
2826 | .data = (void *)&spectrum, | |
2827 | .meta.flags = CMD_WANT_SKB, | |
2828 | }; | |
2829 | u32 add_time = le64_to_cpu(params->start_time); | |
2830 | int rc; | |
2831 | int spectrum_resp_status; | |
2832 | int duration = le16_to_cpu(params->duration); | |
2833 | ||
bb8c093b | 2834 | if (iwl4965_is_associated(priv)) |
b481de9c | 2835 | add_time = |
bb8c093b | 2836 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
2837 | le64_to_cpu(params->start_time) - priv->last_tsf, |
2838 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2839 | ||
2840 | memset(&spectrum, 0, sizeof(spectrum)); | |
2841 | ||
2842 | spectrum.channel_count = cpu_to_le16(1); | |
2843 | spectrum.flags = | |
2844 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
2845 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
2846 | cmd.len = sizeof(spectrum); | |
2847 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
2848 | ||
bb8c093b | 2849 | if (iwl4965_is_associated(priv)) |
b481de9c | 2850 | spectrum.start_time = |
bb8c093b | 2851 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
2852 | add_time, |
2853 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2854 | else | |
2855 | spectrum.start_time = 0; | |
2856 | ||
2857 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
2858 | spectrum.channels[0].channel = params->channel; | |
2859 | spectrum.channels[0].type = type; | |
2860 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
2861 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
2862 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
2863 | ||
857485c0 | 2864 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
2865 | if (rc) |
2866 | return rc; | |
2867 | ||
bb8c093b | 2868 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
2869 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
2870 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
2871 | rc = -EIO; | |
2872 | } | |
2873 | ||
2874 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
2875 | switch (spectrum_resp_status) { | |
2876 | case 0: /* Command will be handled */ | |
2877 | if (res->u.spectrum.id != 0xff) { | |
2878 | IWL_DEBUG_INFO | |
2879 | ("Replaced existing measurement: %d\n", | |
2880 | res->u.spectrum.id); | |
2881 | priv->measurement_status &= ~MEASUREMENT_READY; | |
2882 | } | |
2883 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
2884 | rc = 0; | |
2885 | break; | |
2886 | ||
2887 | case 1: /* Command will not be handled */ | |
2888 | rc = -EAGAIN; | |
2889 | break; | |
2890 | } | |
2891 | ||
2892 | dev_kfree_skb_any(cmd.meta.u.skb); | |
2893 | ||
2894 | return rc; | |
2895 | } | |
2896 | #endif | |
2897 | ||
c79dd5b5 | 2898 | static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv, |
bb8c093b | 2899 | struct iwl4965_tx_info *tx_sta) |
b481de9c ZY |
2900 | { |
2901 | ||
2902 | tx_sta->status.ack_signal = 0; | |
2903 | tx_sta->status.excessive_retries = 0; | |
2904 | tx_sta->status.queue_length = 0; | |
2905 | tx_sta->status.queue_number = 0; | |
2906 | ||
2907 | if (in_interrupt()) | |
2908 | ieee80211_tx_status_irqsafe(priv->hw, | |
2909 | tx_sta->skb[0], &(tx_sta->status)); | |
2910 | else | |
2911 | ieee80211_tx_status(priv->hw, | |
2912 | tx_sta->skb[0], &(tx_sta->status)); | |
2913 | ||
2914 | tx_sta->skb[0] = NULL; | |
2915 | } | |
2916 | ||
2917 | /** | |
6440adb5 | 2918 | * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd |
b481de9c | 2919 | * |
6440adb5 BC |
2920 | * When FW advances 'R' index, all entries between old and new 'R' index |
2921 | * need to be reclaimed. As result, some free space forms. If there is | |
2922 | * enough free space (> low mark), wake the stack that feeds us. | |
b481de9c | 2923 | */ |
c79dd5b5 | 2924 | int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) |
b481de9c | 2925 | { |
bb8c093b CH |
2926 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
2927 | struct iwl4965_queue *q = &txq->q; | |
b481de9c ZY |
2928 | int nfreed = 0; |
2929 | ||
2930 | if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) { | |
2931 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | |
2932 | "is out of range [0-%d] %d %d.\n", txq_id, | |
fc4b6853 | 2933 | index, q->n_bd, q->write_ptr, q->read_ptr); |
b481de9c ZY |
2934 | return 0; |
2935 | } | |
2936 | ||
c54b679d | 2937 | for (index = iwl_queue_inc_wrap(index, q->n_bd); |
fc4b6853 | 2938 | q->read_ptr != index; |
c54b679d | 2939 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
b481de9c | 2940 | if (txq_id != IWL_CMD_QUEUE_NUM) { |
bb8c093b | 2941 | iwl4965_txstatus_to_ieee(priv, |
fc4b6853 | 2942 | &(txq->txb[txq->q.read_ptr])); |
bb8c093b | 2943 | iwl4965_hw_txq_free_tfd(priv, txq); |
b481de9c ZY |
2944 | } else if (nfreed > 1) { |
2945 | IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index, | |
fc4b6853 | 2946 | q->write_ptr, q->read_ptr); |
b481de9c ZY |
2947 | queue_work(priv->workqueue, &priv->restart); |
2948 | } | |
2949 | nfreed++; | |
2950 | } | |
2951 | ||
fe01b477 | 2952 | /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) && |
b481de9c ZY |
2953 | (txq_id != IWL_CMD_QUEUE_NUM) && |
2954 | priv->mac80211_registered) | |
fe01b477 | 2955 | ieee80211_wake_queue(priv->hw, txq_id); */ |
b481de9c ZY |
2956 | |
2957 | ||
2958 | return nfreed; | |
2959 | } | |
2960 | ||
bb8c093b | 2961 | static int iwl4965_is_tx_success(u32 status) |
b481de9c ZY |
2962 | { |
2963 | status &= TX_STATUS_MSK; | |
2964 | return (status == TX_STATUS_SUCCESS) | |
2965 | || (status == TX_STATUS_DIRECT_DONE); | |
2966 | } | |
2967 | ||
2968 | /****************************************************************************** | |
2969 | * | |
2970 | * Generic RX handler implementations | |
2971 | * | |
2972 | ******************************************************************************/ | |
c8b0e6e1 | 2973 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 2974 | |
c79dd5b5 | 2975 | static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv, |
b481de9c ZY |
2976 | struct ieee80211_hdr *hdr) |
2977 | { | |
2978 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) | |
2979 | return IWL_AP_ID; | |
2980 | else { | |
2981 | u8 *da = ieee80211_get_DA(hdr); | |
bb8c093b | 2982 | return iwl4965_hw_find_station(priv, da); |
b481de9c ZY |
2983 | } |
2984 | } | |
2985 | ||
bb8c093b | 2986 | static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr( |
c79dd5b5 | 2987 | struct iwl_priv *priv, int txq_id, int idx) |
b481de9c ZY |
2988 | { |
2989 | if (priv->txq[txq_id].txb[idx].skb[0]) | |
2990 | return (struct ieee80211_hdr *)priv->txq[txq_id]. | |
2991 | txb[idx].skb[0]->data; | |
2992 | return NULL; | |
2993 | } | |
2994 | ||
bb8c093b | 2995 | static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp) |
b481de9c ZY |
2996 | { |
2997 | __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status + | |
2998 | tx_resp->frame_count); | |
2999 | return le32_to_cpu(*scd_ssn) & MAX_SN; | |
3000 | ||
3001 | } | |
6440adb5 BC |
3002 | |
3003 | /** | |
3004 | * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue | |
3005 | */ | |
c79dd5b5 | 3006 | static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, |
bb8c093b | 3007 | struct iwl4965_ht_agg *agg, |
fe01b477 | 3008 | struct iwl4965_tx_resp_agg *tx_resp, |
b481de9c ZY |
3009 | u16 start_idx) |
3010 | { | |
fe01b477 RR |
3011 | u16 status; |
3012 | struct agg_tx_status *frame_status = &tx_resp->status; | |
b481de9c ZY |
3013 | struct ieee80211_tx_status *tx_status = NULL; |
3014 | struct ieee80211_hdr *hdr = NULL; | |
3015 | int i, sh; | |
3016 | int txq_id, idx; | |
3017 | u16 seq; | |
3018 | ||
3019 | if (agg->wait_for_ba) | |
6440adb5 | 3020 | IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n"); |
b481de9c ZY |
3021 | |
3022 | agg->frame_count = tx_resp->frame_count; | |
3023 | agg->start_idx = start_idx; | |
3024 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 3025 | agg->bitmap = 0; |
b481de9c | 3026 | |
6440adb5 | 3027 | /* # frames attempted by Tx command */ |
b481de9c | 3028 | if (agg->frame_count == 1) { |
6440adb5 | 3029 | /* Only one frame was attempted; no block-ack will arrive */ |
fe01b477 RR |
3030 | status = le16_to_cpu(frame_status[0].status); |
3031 | seq = le16_to_cpu(frame_status[0].sequence); | |
3032 | idx = SEQ_TO_INDEX(seq); | |
3033 | txq_id = SEQ_TO_QUEUE(seq); | |
b481de9c | 3034 | |
b481de9c | 3035 | /* FIXME: code repetition */ |
fe01b477 RR |
3036 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n", |
3037 | agg->frame_count, agg->start_idx, idx); | |
b481de9c | 3038 | |
fe01b477 | 3039 | tx_status = &(priv->txq[txq_id].txb[idx].status); |
b481de9c ZY |
3040 | tx_status->retry_count = tx_resp->failure_frame; |
3041 | tx_status->queue_number = status & 0xff; | |
fe01b477 RR |
3042 | tx_status->queue_length = tx_resp->failure_rts; |
3043 | tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU; | |
bb8c093b | 3044 | tx_status->flags = iwl4965_is_tx_success(status)? |
b481de9c | 3045 | IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
3046 | iwl4965_hwrate_to_tx_control(priv, |
3047 | le32_to_cpu(tx_resp->rate_n_flags), | |
3048 | &tx_status->control); | |
b481de9c ZY |
3049 | /* FIXME: code repetition end */ |
3050 | ||
3051 | IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n", | |
3052 | status & 0xff, tx_resp->failure_frame); | |
3053 | IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", | |
bb8c093b | 3054 | iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags)); |
b481de9c ZY |
3055 | |
3056 | agg->wait_for_ba = 0; | |
3057 | } else { | |
6440adb5 | 3058 | /* Two or more frames were attempted; expect block-ack */ |
b481de9c ZY |
3059 | u64 bitmap = 0; |
3060 | int start = agg->start_idx; | |
3061 | ||
6440adb5 | 3062 | /* Construct bit-map of pending frames within Tx window */ |
b481de9c ZY |
3063 | for (i = 0; i < agg->frame_count; i++) { |
3064 | u16 sc; | |
fe01b477 RR |
3065 | status = le16_to_cpu(frame_status[i].status); |
3066 | seq = le16_to_cpu(frame_status[i].sequence); | |
b481de9c ZY |
3067 | idx = SEQ_TO_INDEX(seq); |
3068 | txq_id = SEQ_TO_QUEUE(seq); | |
3069 | ||
3070 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | |
3071 | AGG_TX_STATE_ABORT_MSK)) | |
3072 | continue; | |
3073 | ||
3074 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", | |
3075 | agg->frame_count, txq_id, idx); | |
3076 | ||
bb8c093b | 3077 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx); |
b481de9c ZY |
3078 | |
3079 | sc = le16_to_cpu(hdr->seq_ctrl); | |
3080 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | |
3081 | IWL_ERROR("BUG_ON idx doesn't match seq control" | |
3082 | " idx=%d, seq_idx=%d, seq=%d\n", | |
3083 | idx, SEQ_TO_SN(sc), | |
3084 | hdr->seq_ctrl); | |
3085 | return -1; | |
3086 | } | |
3087 | ||
3088 | IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", | |
3089 | i, idx, SEQ_TO_SN(sc)); | |
3090 | ||
3091 | sh = idx - start; | |
3092 | if (sh > 64) { | |
3093 | sh = (start - idx) + 0xff; | |
3094 | bitmap = bitmap << sh; | |
3095 | sh = 0; | |
3096 | start = idx; | |
3097 | } else if (sh < -64) | |
3098 | sh = 0xff - (start - idx); | |
3099 | else if (sh < 0) { | |
3100 | sh = start - idx; | |
3101 | start = idx; | |
3102 | bitmap = bitmap << sh; | |
3103 | sh = 0; | |
3104 | } | |
3105 | bitmap |= (1 << sh); | |
3106 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n", | |
3107 | start, (u32)(bitmap & 0xFFFFFFFF)); | |
3108 | } | |
3109 | ||
fe01b477 | 3110 | agg->bitmap = bitmap; |
b481de9c ZY |
3111 | agg->start_idx = start; |
3112 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 3113 | IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n", |
b481de9c | 3114 | agg->frame_count, agg->start_idx, |
fe01b477 | 3115 | agg->bitmap); |
b481de9c ZY |
3116 | |
3117 | if (bitmap) | |
3118 | agg->wait_for_ba = 1; | |
3119 | } | |
3120 | return 0; | |
3121 | } | |
3122 | #endif | |
b481de9c | 3123 | |
6440adb5 BC |
3124 | /** |
3125 | * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response | |
3126 | */ | |
c79dd5b5 | 3127 | static void iwl4965_rx_reply_tx(struct iwl_priv *priv, |
bb8c093b | 3128 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3129 | { |
bb8c093b | 3130 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3131 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
3132 | int txq_id = SEQ_TO_QUEUE(sequence); | |
3133 | int index = SEQ_TO_INDEX(sequence); | |
bb8c093b | 3134 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
b481de9c | 3135 | struct ieee80211_tx_status *tx_status; |
bb8c093b | 3136 | struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
b481de9c | 3137 | u32 status = le32_to_cpu(tx_resp->status); |
c8b0e6e1 | 3138 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
3139 | int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION; |
3140 | struct ieee80211_hdr *hdr; | |
3141 | __le16 *qc; | |
b481de9c ZY |
3142 | #endif |
3143 | ||
3144 | if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) { | |
3145 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | |
3146 | "is out of range [0-%d] %d %d\n", txq_id, | |
fc4b6853 TW |
3147 | index, txq->q.n_bd, txq->q.write_ptr, |
3148 | txq->q.read_ptr); | |
b481de9c ZY |
3149 | return; |
3150 | } | |
3151 | ||
c8b0e6e1 | 3152 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
3153 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index); |
3154 | qc = ieee80211_get_qos_ctrl(hdr); | |
3155 | ||
3156 | if (qc) | |
3157 | tid = le16_to_cpu(*qc) & 0xf; | |
3158 | ||
3159 | sta_id = iwl4965_get_ra_sta_id(priv, hdr); | |
3160 | if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) { | |
3161 | IWL_ERROR("Station not known\n"); | |
3162 | return; | |
3163 | } | |
3164 | ||
b481de9c | 3165 | if (txq->sched_retry) { |
bb8c093b | 3166 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); |
bb8c093b | 3167 | struct iwl4965_ht_agg *agg = NULL; |
b481de9c | 3168 | |
fe01b477 | 3169 | if (!qc) |
b481de9c | 3170 | return; |
b481de9c ZY |
3171 | |
3172 | agg = &priv->stations[sta_id].tid[tid].agg; | |
3173 | ||
fe01b477 RR |
3174 | iwl4965_tx_status_reply_tx(priv, agg, |
3175 | (struct iwl4965_tx_resp_agg *)tx_resp, index); | |
b481de9c ZY |
3176 | |
3177 | if ((tx_resp->frame_count == 1) && | |
bb8c093b | 3178 | !iwl4965_is_tx_success(status)) { |
b481de9c ZY |
3179 | /* TODO: send BAR */ |
3180 | } | |
3181 | ||
fe01b477 RR |
3182 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { |
3183 | int freed; | |
c54b679d | 3184 | index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd); |
b481de9c ZY |
3185 | IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn " |
3186 | "%d index %d\n", scd_ssn , index); | |
fe01b477 RR |
3187 | freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); |
3188 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
3189 | ||
3190 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
3191 | txq_id >= 0 && priv->mac80211_registered && | |
3192 | agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) | |
3193 | ieee80211_wake_queue(priv->hw, txq_id); | |
3194 | ||
3195 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); | |
b481de9c ZY |
3196 | } |
3197 | } else { | |
c8b0e6e1 | 3198 | #endif /* CONFIG_IWL4965_HT */ |
fc4b6853 | 3199 | tx_status = &(txq->txb[txq->q.read_ptr].status); |
b481de9c ZY |
3200 | |
3201 | tx_status->retry_count = tx_resp->failure_frame; | |
3202 | tx_status->queue_number = status; | |
3203 | tx_status->queue_length = tx_resp->bt_kill_count; | |
3204 | tx_status->queue_length |= tx_resp->failure_rts; | |
b481de9c | 3205 | tx_status->flags = |
bb8c093b | 3206 | iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
3207 | iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags), |
3208 | &tx_status->control); | |
b481de9c | 3209 | |
b481de9c | 3210 | IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x " |
bb8c093b | 3211 | "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status), |
b481de9c ZY |
3212 | status, le32_to_cpu(tx_resp->rate_n_flags), |
3213 | tx_resp->failure_frame); | |
3214 | ||
3215 | IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index); | |
fe01b477 RR |
3216 | if (index != -1) { |
3217 | int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); | |
3218 | #ifdef CONFIG_IWL4965_HT | |
3219 | if (tid != MAX_TID_COUNT) | |
3220 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
3221 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
3222 | (txq_id >= 0) && | |
3223 | priv->mac80211_registered) | |
3224 | ieee80211_wake_queue(priv->hw, txq_id); | |
3225 | if (tid != MAX_TID_COUNT) | |
3226 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); | |
3227 | #endif | |
3228 | } | |
c8b0e6e1 | 3229 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 3230 | } |
c8b0e6e1 | 3231 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c ZY |
3232 | |
3233 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | |
3234 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | |
3235 | } | |
3236 | ||
3237 | ||
c79dd5b5 | 3238 | static void iwl4965_rx_reply_alive(struct iwl_priv *priv, |
bb8c093b | 3239 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3240 | { |
bb8c093b CH |
3241 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3242 | struct iwl4965_alive_resp *palive; | |
b481de9c ZY |
3243 | struct delayed_work *pwork; |
3244 | ||
3245 | palive = &pkt->u.alive_frame; | |
3246 | ||
3247 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
3248 | "0x%01X 0x%01X\n", | |
3249 | palive->is_valid, palive->ver_type, | |
3250 | palive->ver_subtype); | |
3251 | ||
3252 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
3253 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
3254 | memcpy(&priv->card_alive_init, | |
3255 | &pkt->u.alive_frame, | |
bb8c093b | 3256 | sizeof(struct iwl4965_init_alive_resp)); |
b481de9c ZY |
3257 | pwork = &priv->init_alive_start; |
3258 | } else { | |
3259 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
3260 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
bb8c093b | 3261 | sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
3262 | pwork = &priv->alive_start; |
3263 | } | |
3264 | ||
3265 | /* We delay the ALIVE response by 5ms to | |
3266 | * give the HW RF Kill time to activate... */ | |
3267 | if (palive->is_valid == UCODE_VALID_OK) | |
3268 | queue_delayed_work(priv->workqueue, pwork, | |
3269 | msecs_to_jiffies(5)); | |
3270 | else | |
3271 | IWL_WARNING("uCode did not respond OK.\n"); | |
3272 | } | |
3273 | ||
c79dd5b5 | 3274 | static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv, |
bb8c093b | 3275 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3276 | { |
bb8c093b | 3277 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3278 | |
3279 | IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); | |
3280 | return; | |
3281 | } | |
3282 | ||
c79dd5b5 | 3283 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
bb8c093b | 3284 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3285 | { |
bb8c093b | 3286 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3287 | |
3288 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
3289 | "seq 0x%04X ser 0x%08X\n", | |
3290 | le32_to_cpu(pkt->u.err_resp.error_type), | |
3291 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
3292 | pkt->u.err_resp.cmd_id, | |
3293 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
3294 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
3295 | } | |
3296 | ||
3297 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
3298 | ||
c79dd5b5 | 3299 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3300 | { |
bb8c093b CH |
3301 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3302 | struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon; | |
3303 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); | |
b481de9c ZY |
3304 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
3305 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
3306 | rxon->channel = csa->channel; | |
3307 | priv->staging_rxon.channel = csa->channel; | |
3308 | } | |
3309 | ||
c79dd5b5 | 3310 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
bb8c093b | 3311 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3312 | { |
c8b0e6e1 | 3313 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
bb8c093b CH |
3314 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3315 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); | |
b481de9c ZY |
3316 | |
3317 | if (!report->state) { | |
3318 | IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO, | |
3319 | "Spectrum Measure Notification: Start\n"); | |
3320 | return; | |
3321 | } | |
3322 | ||
3323 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
3324 | priv->measurement_status |= MEASUREMENT_READY; | |
3325 | #endif | |
3326 | } | |
3327 | ||
c79dd5b5 | 3328 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
bb8c093b | 3329 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3330 | { |
0a6857e7 | 3331 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b CH |
3332 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3333 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); | |
b481de9c ZY |
3334 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
3335 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
3336 | #endif | |
3337 | } | |
3338 | ||
c79dd5b5 | 3339 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
bb8c093b | 3340 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3341 | { |
bb8c093b | 3342 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3343 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
3344 | "notification for %s:\n", | |
3345 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
0a6857e7 | 3346 | iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
3347 | } |
3348 | ||
bb8c093b | 3349 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 3350 | { |
c79dd5b5 TW |
3351 | struct iwl_priv *priv = |
3352 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
3353 | struct sk_buff *beacon; |
3354 | ||
3355 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
32bfd35d | 3356 | beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL); |
b481de9c ZY |
3357 | |
3358 | if (!beacon) { | |
3359 | IWL_ERROR("update beacon failed\n"); | |
3360 | return; | |
3361 | } | |
3362 | ||
3363 | mutex_lock(&priv->mutex); | |
3364 | /* new beacon skb is allocated every time; dispose previous.*/ | |
3365 | if (priv->ibss_beacon) | |
3366 | dev_kfree_skb(priv->ibss_beacon); | |
3367 | ||
3368 | priv->ibss_beacon = beacon; | |
3369 | mutex_unlock(&priv->mutex); | |
3370 | ||
bb8c093b | 3371 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
3372 | } |
3373 | ||
c79dd5b5 | 3374 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
bb8c093b | 3375 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3376 | { |
0a6857e7 | 3377 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b CH |
3378 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3379 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); | |
3380 | u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | |
b481de9c ZY |
3381 | |
3382 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
3383 | "tsf %d %d rate %d\n", | |
3384 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | |
3385 | beacon->beacon_notify_hdr.failure_frame, | |
3386 | le32_to_cpu(beacon->ibss_mgr_status), | |
3387 | le32_to_cpu(beacon->high_tsf), | |
3388 | le32_to_cpu(beacon->low_tsf), rate); | |
3389 | #endif | |
3390 | ||
3391 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
3392 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
3393 | queue_work(priv->workqueue, &priv->beacon_update); | |
3394 | } | |
3395 | ||
3396 | /* Service response to REPLY_SCAN_CMD (0x80) */ | |
c79dd5b5 | 3397 | static void iwl4965_rx_reply_scan(struct iwl_priv *priv, |
bb8c093b | 3398 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3399 | { |
0a6857e7 | 3400 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b CH |
3401 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3402 | struct iwl4965_scanreq_notification *notif = | |
3403 | (struct iwl4965_scanreq_notification *)pkt->u.raw; | |
b481de9c ZY |
3404 | |
3405 | IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status); | |
3406 | #endif | |
3407 | } | |
3408 | ||
3409 | /* Service SCAN_START_NOTIFICATION (0x82) */ | |
c79dd5b5 | 3410 | static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv, |
bb8c093b | 3411 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3412 | { |
bb8c093b CH |
3413 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3414 | struct iwl4965_scanstart_notification *notif = | |
3415 | (struct iwl4965_scanstart_notification *)pkt->u.raw; | |
b481de9c ZY |
3416 | priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); |
3417 | IWL_DEBUG_SCAN("Scan start: " | |
3418 | "%d [802.11%s] " | |
3419 | "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", | |
3420 | notif->channel, | |
3421 | notif->band ? "bg" : "a", | |
3422 | notif->tsf_high, | |
3423 | notif->tsf_low, notif->status, notif->beacon_timer); | |
3424 | } | |
3425 | ||
3426 | /* Service SCAN_RESULTS_NOTIFICATION (0x83) */ | |
c79dd5b5 | 3427 | static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv, |
bb8c093b | 3428 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3429 | { |
bb8c093b CH |
3430 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3431 | struct iwl4965_scanresults_notification *notif = | |
3432 | (struct iwl4965_scanresults_notification *)pkt->u.raw; | |
b481de9c ZY |
3433 | |
3434 | IWL_DEBUG_SCAN("Scan ch.res: " | |
3435 | "%d [802.11%s] " | |
3436 | "(TSF: 0x%08X:%08X) - %d " | |
3437 | "elapsed=%lu usec (%dms since last)\n", | |
3438 | notif->channel, | |
3439 | notif->band ? "bg" : "a", | |
3440 | le32_to_cpu(notif->tsf_high), | |
3441 | le32_to_cpu(notif->tsf_low), | |
3442 | le32_to_cpu(notif->statistics[0]), | |
3443 | le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf, | |
3444 | jiffies_to_msecs(elapsed_jiffies | |
3445 | (priv->last_scan_jiffies, jiffies))); | |
3446 | ||
3447 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 3448 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
3449 | } |
3450 | ||
3451 | /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ | |
c79dd5b5 | 3452 | static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv, |
bb8c093b | 3453 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3454 | { |
bb8c093b CH |
3455 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3456 | struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw; | |
b481de9c ZY |
3457 | |
3458 | IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", | |
3459 | scan_notif->scanned_channels, | |
3460 | scan_notif->tsf_low, | |
3461 | scan_notif->tsf_high, scan_notif->status); | |
3462 | ||
3463 | /* The HW is no longer scanning */ | |
3464 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
3465 | ||
3466 | /* The scan completion notification came in, so kill that timer... */ | |
3467 | cancel_delayed_work(&priv->scan_check); | |
3468 | ||
3469 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", | |
3470 | (priv->scan_bands == 2) ? "2.4" : "5.2", | |
3471 | jiffies_to_msecs(elapsed_jiffies | |
3472 | (priv->scan_pass_start, jiffies))); | |
3473 | ||
3474 | /* Remove this scanned band from the list | |
3475 | * of pending bands to scan */ | |
3476 | priv->scan_bands--; | |
3477 | ||
3478 | /* If a request to abort was given, or the scan did not succeed | |
3479 | * then we reset the scan state machine and terminate, | |
3480 | * re-queuing another scan if one has been requested */ | |
3481 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
3482 | IWL_DEBUG_INFO("Aborted scan completed.\n"); | |
3483 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
3484 | } else { | |
3485 | /* If there are more bands on this scan pass reschedule */ | |
3486 | if (priv->scan_bands > 0) | |
3487 | goto reschedule; | |
3488 | } | |
3489 | ||
3490 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 3491 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
3492 | IWL_DEBUG_INFO("Setting scan to off\n"); |
3493 | ||
3494 | clear_bit(STATUS_SCANNING, &priv->status); | |
3495 | ||
3496 | IWL_DEBUG_INFO("Scan took %dms\n", | |
3497 | jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies))); | |
3498 | ||
3499 | queue_work(priv->workqueue, &priv->scan_completed); | |
3500 | ||
3501 | return; | |
3502 | ||
3503 | reschedule: | |
3504 | priv->scan_pass_start = jiffies; | |
3505 | queue_work(priv->workqueue, &priv->request_scan); | |
3506 | } | |
3507 | ||
3508 | /* Handle notification from uCode that card's power state is changing | |
3509 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 3510 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
bb8c093b | 3511 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3512 | { |
bb8c093b | 3513 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3514 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
3515 | unsigned long status = priv->status; | |
3516 | ||
3517 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
3518 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
3519 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
3520 | ||
3521 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
3522 | RF_CARD_DISABLED)) { | |
3523 | ||
bb8c093b | 3524 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
3525 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3526 | ||
bb8c093b CH |
3527 | if (!iwl4965_grab_nic_access(priv)) { |
3528 | iwl4965_write_direct32( | |
b481de9c ZY |
3529 | priv, HBUS_TARG_MBX_C, |
3530 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
3531 | ||
bb8c093b | 3532 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
3533 | } |
3534 | ||
3535 | if (!(flags & RXON_CARD_DISABLED)) { | |
bb8c093b | 3536 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 3537 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
bb8c093b CH |
3538 | if (!iwl4965_grab_nic_access(priv)) { |
3539 | iwl4965_write_direct32( | |
b481de9c ZY |
3540 | priv, HBUS_TARG_MBX_C, |
3541 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
3542 | ||
bb8c093b | 3543 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
3544 | } |
3545 | } | |
3546 | ||
3547 | if (flags & RF_CARD_DISABLED) { | |
bb8c093b | 3548 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 3549 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
bb8c093b CH |
3550 | iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
3551 | if (!iwl4965_grab_nic_access(priv)) | |
3552 | iwl4965_release_nic_access(priv); | |
b481de9c ZY |
3553 | } |
3554 | } | |
3555 | ||
3556 | if (flags & HW_CARD_DISABLED) | |
3557 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
3558 | else | |
3559 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
3560 | ||
3561 | ||
3562 | if (flags & SW_CARD_DISABLED) | |
3563 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
3564 | else | |
3565 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
3566 | ||
3567 | if (!(flags & RXON_CARD_DISABLED)) | |
bb8c093b | 3568 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
3569 | |
3570 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
3571 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
3572 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
3573 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
3574 | queue_work(priv->workqueue, &priv->rf_kill); | |
3575 | else | |
3576 | wake_up_interruptible(&priv->wait_command_queue); | |
3577 | } | |
3578 | ||
3579 | /** | |
bb8c093b | 3580 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
3581 | * |
3582 | * Setup the RX handlers for each of the reply types sent from the uCode | |
3583 | * to the host. | |
3584 | * | |
3585 | * This function chains into the hardware specific files for them to setup | |
3586 | * any hardware specific handlers as well. | |
3587 | */ | |
c79dd5b5 | 3588 | static void iwl4965_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 3589 | { |
bb8c093b CH |
3590 | priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive; |
3591 | priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta; | |
3592 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; | |
3593 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 3594 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
3595 | iwl4965_rx_spectrum_measure_notif; |
3596 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 3597 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
3598 | iwl4965_rx_pm_debug_statistics_notif; |
3599 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 3600 | |
9fbab516 BC |
3601 | /* |
3602 | * The same handler is used for both the REPLY to a discrete | |
3603 | * statistics request from the host as well as for the periodic | |
3604 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 3605 | */ |
bb8c093b CH |
3606 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics; |
3607 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics; | |
b481de9c | 3608 | |
bb8c093b CH |
3609 | priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan; |
3610 | priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif; | |
b481de9c | 3611 | priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] = |
bb8c093b | 3612 | iwl4965_rx_scan_results_notif; |
b481de9c | 3613 | priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] = |
bb8c093b CH |
3614 | iwl4965_rx_scan_complete_notif; |
3615 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; | |
3616 | priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx; | |
b481de9c | 3617 | |
9fbab516 | 3618 | /* Set up hardware specific Rx handlers */ |
bb8c093b | 3619 | iwl4965_hw_rx_handler_setup(priv); |
b481de9c ZY |
3620 | } |
3621 | ||
3622 | /** | |
bb8c093b | 3623 | * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them |
b481de9c ZY |
3624 | * @rxb: Rx buffer to reclaim |
3625 | * | |
3626 | * If an Rx buffer has an async callback associated with it the callback | |
3627 | * will be executed. The attached skb (if present) will only be freed | |
3628 | * if the callback returns 1 | |
3629 | */ | |
c79dd5b5 | 3630 | static void iwl4965_tx_cmd_complete(struct iwl_priv *priv, |
bb8c093b | 3631 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3632 | { |
bb8c093b | 3633 | struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3634 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
3635 | int txq_id = SEQ_TO_QUEUE(sequence); | |
3636 | int index = SEQ_TO_INDEX(sequence); | |
3637 | int huge = sequence & SEQ_HUGE_FRAME; | |
3638 | int cmd_index; | |
857485c0 | 3639 | struct iwl_cmd *cmd; |
b481de9c ZY |
3640 | |
3641 | /* If a Tx command is being handled and it isn't in the actual | |
3642 | * command queue then there a command routing bug has been introduced | |
3643 | * in the queue management code. */ | |
3644 | if (txq_id != IWL_CMD_QUEUE_NUM) | |
3645 | IWL_ERROR("Error wrong command queue %d command id 0x%X\n", | |
3646 | txq_id, pkt->hdr.cmd); | |
3647 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); | |
3648 | ||
3649 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | |
3650 | cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | |
3651 | ||
3652 | /* Input error checking is done when commands are added to queue. */ | |
3653 | if (cmd->meta.flags & CMD_WANT_SKB) { | |
3654 | cmd->meta.source->u.skb = rxb->skb; | |
3655 | rxb->skb = NULL; | |
3656 | } else if (cmd->meta.u.callback && | |
3657 | !cmd->meta.u.callback(priv, cmd, rxb->skb)) | |
3658 | rxb->skb = NULL; | |
3659 | ||
bb8c093b | 3660 | iwl4965_tx_queue_reclaim(priv, txq_id, index); |
b481de9c ZY |
3661 | |
3662 | if (!(cmd->meta.flags & CMD_ASYNC)) { | |
3663 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
3664 | wake_up_interruptible(&priv->wait_command_queue); | |
3665 | } | |
3666 | } | |
3667 | ||
3668 | /************************** RX-FUNCTIONS ****************************/ | |
3669 | /* | |
3670 | * Rx theory of operation | |
3671 | * | |
9fbab516 BC |
3672 | * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs), |
3673 | * each of which point to Receive Buffers to be filled by 4965. These get | |
3674 | * used not only for Rx frames, but for any command response or notification | |
3675 | * from the 4965. The driver and 4965 manage the Rx buffers by means | |
3676 | * of indexes into the circular buffer. | |
b481de9c ZY |
3677 | * |
3678 | * Rx Queue Indexes | |
3679 | * The host/firmware share two index registers for managing the Rx buffers. | |
3680 | * | |
3681 | * The READ index maps to the first position that the firmware may be writing | |
3682 | * to -- the driver can read up to (but not including) this position and get | |
3683 | * good data. | |
3684 | * The READ index is managed by the firmware once the card is enabled. | |
3685 | * | |
3686 | * The WRITE index maps to the last position the driver has read from -- the | |
3687 | * position preceding WRITE is the last slot the firmware can place a packet. | |
3688 | * | |
3689 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if | |
3690 | * WRITE = READ. | |
3691 | * | |
9fbab516 | 3692 | * During initialization, the host sets up the READ queue position to the first |
b481de9c ZY |
3693 | * INDEX position, and WRITE to the last (READ - 1 wrapped) |
3694 | * | |
9fbab516 | 3695 | * When the firmware places a packet in a buffer, it will advance the READ index |
b481de9c ZY |
3696 | * and fire the RX interrupt. The driver can then query the READ index and |
3697 | * process as many packets as possible, moving the WRITE index forward as it | |
3698 | * resets the Rx queue buffers with new memory. | |
3699 | * | |
3700 | * The management in the driver is as follows: | |
3701 | * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When | |
3702 | * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled | |
01ebd063 | 3703 | * to replenish the iwl->rxq->rx_free. |
bb8c093b | 3704 | * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the |
b481de9c ZY |
3705 | * iwl->rxq is replenished and the READ INDEX is updated (updating the |
3706 | * 'processed' and 'read' driver indexes as well) | |
3707 | * + A received packet is processed and handed to the kernel network stack, | |
3708 | * detached from the iwl->rxq. The driver 'processed' index is updated. | |
3709 | * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free | |
3710 | * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ | |
3711 | * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there | |
3712 | * were enough free buffers and RX_STALLED is set it is cleared. | |
3713 | * | |
3714 | * | |
3715 | * Driver sequence: | |
3716 | * | |
9fbab516 BC |
3717 | * iwl4965_rx_queue_alloc() Allocates rx_free |
3718 | * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls | |
bb8c093b | 3719 | * iwl4965_rx_queue_restock |
9fbab516 | 3720 | * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx |
b481de9c ZY |
3721 | * queue, updates firmware pointers, and updates |
3722 | * the WRITE index. If insufficient rx_free buffers | |
bb8c093b | 3723 | * are available, schedules iwl4965_rx_replenish |
b481de9c ZY |
3724 | * |
3725 | * -- enable interrupts -- | |
9fbab516 | 3726 | * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the |
b481de9c ZY |
3727 | * READ INDEX, detaching the SKB from the pool. |
3728 | * Moves the packet buffer from queue to rx_used. | |
bb8c093b | 3729 | * Calls iwl4965_rx_queue_restock to refill any empty |
b481de9c ZY |
3730 | * slots. |
3731 | * ... | |
3732 | * | |
3733 | */ | |
3734 | ||
3735 | /** | |
bb8c093b | 3736 | * iwl4965_rx_queue_space - Return number of free slots available in queue. |
b481de9c | 3737 | */ |
bb8c093b | 3738 | static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q) |
b481de9c ZY |
3739 | { |
3740 | int s = q->read - q->write; | |
3741 | if (s <= 0) | |
3742 | s += RX_QUEUE_SIZE; | |
3743 | /* keep some buffer to not confuse full and empty queue */ | |
3744 | s -= 2; | |
3745 | if (s < 0) | |
3746 | s = 0; | |
3747 | return s; | |
3748 | } | |
3749 | ||
3750 | /** | |
bb8c093b | 3751 | * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue |
b481de9c | 3752 | */ |
c79dd5b5 | 3753 | int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q) |
b481de9c ZY |
3754 | { |
3755 | u32 reg = 0; | |
3756 | int rc = 0; | |
3757 | unsigned long flags; | |
3758 | ||
3759 | spin_lock_irqsave(&q->lock, flags); | |
3760 | ||
3761 | if (q->need_update == 0) | |
3762 | goto exit_unlock; | |
3763 | ||
6440adb5 | 3764 | /* If power-saving is in use, make sure device is awake */ |
b481de9c | 3765 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { |
bb8c093b | 3766 | reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
3767 | |
3768 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
bb8c093b | 3769 | iwl4965_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
3770 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
3771 | goto exit_unlock; | |
3772 | } | |
3773 | ||
bb8c093b | 3774 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
3775 | if (rc) |
3776 | goto exit_unlock; | |
3777 | ||
6440adb5 | 3778 | /* Device expects a multiple of 8 */ |
bb8c093b | 3779 | iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR, |
b481de9c | 3780 | q->write & ~0x7); |
bb8c093b | 3781 | iwl4965_release_nic_access(priv); |
6440adb5 BC |
3782 | |
3783 | /* Else device is assumed to be awake */ | |
b481de9c | 3784 | } else |
6440adb5 | 3785 | /* Device expects a multiple of 8 */ |
bb8c093b | 3786 | iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7); |
b481de9c ZY |
3787 | |
3788 | ||
3789 | q->need_update = 0; | |
3790 | ||
3791 | exit_unlock: | |
3792 | spin_unlock_irqrestore(&q->lock, flags); | |
3793 | return rc; | |
3794 | } | |
3795 | ||
3796 | /** | |
9fbab516 | 3797 | * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr |
b481de9c | 3798 | */ |
c79dd5b5 | 3799 | static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv, |
b481de9c ZY |
3800 | dma_addr_t dma_addr) |
3801 | { | |
3802 | return cpu_to_le32((u32)(dma_addr >> 8)); | |
3803 | } | |
3804 | ||
3805 | ||
3806 | /** | |
bb8c093b | 3807 | * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool |
b481de9c | 3808 | * |
9fbab516 | 3809 | * If there are slots in the RX queue that need to be restocked, |
b481de9c | 3810 | * and we have free pre-allocated buffers, fill the ranks as much |
9fbab516 | 3811 | * as we can, pulling from rx_free. |
b481de9c ZY |
3812 | * |
3813 | * This moves the 'write' index forward to catch up with 'processed', and | |
3814 | * also updates the memory address in the firmware to reference the new | |
3815 | * target buffer. | |
3816 | */ | |
c79dd5b5 | 3817 | static int iwl4965_rx_queue_restock(struct iwl_priv *priv) |
b481de9c | 3818 | { |
bb8c093b | 3819 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c | 3820 | struct list_head *element; |
bb8c093b | 3821 | struct iwl4965_rx_mem_buffer *rxb; |
b481de9c ZY |
3822 | unsigned long flags; |
3823 | int write, rc; | |
3824 | ||
3825 | spin_lock_irqsave(&rxq->lock, flags); | |
3826 | write = rxq->write & ~0x7; | |
bb8c093b | 3827 | while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) { |
6440adb5 | 3828 | /* Get next free Rx buffer, remove from free list */ |
b481de9c | 3829 | element = rxq->rx_free.next; |
bb8c093b | 3830 | rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list); |
b481de9c | 3831 | list_del(element); |
6440adb5 BC |
3832 | |
3833 | /* Point to Rx buffer via next RBD in circular buffer */ | |
bb8c093b | 3834 | rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr); |
b481de9c ZY |
3835 | rxq->queue[rxq->write] = rxb; |
3836 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | |
3837 | rxq->free_count--; | |
3838 | } | |
3839 | spin_unlock_irqrestore(&rxq->lock, flags); | |
3840 | /* If the pre-allocated buffer pool is dropping low, schedule to | |
3841 | * refill it */ | |
3842 | if (rxq->free_count <= RX_LOW_WATERMARK) | |
3843 | queue_work(priv->workqueue, &priv->rx_replenish); | |
3844 | ||
3845 | ||
6440adb5 BC |
3846 | /* If we've added more space for the firmware to place data, tell it. |
3847 | * Increment device's write pointer in multiples of 8. */ | |
b481de9c ZY |
3848 | if ((write != (rxq->write & ~0x7)) |
3849 | || (abs(rxq->write - rxq->read) > 7)) { | |
3850 | spin_lock_irqsave(&rxq->lock, flags); | |
3851 | rxq->need_update = 1; | |
3852 | spin_unlock_irqrestore(&rxq->lock, flags); | |
bb8c093b | 3853 | rc = iwl4965_rx_queue_update_write_ptr(priv, rxq); |
b481de9c ZY |
3854 | if (rc) |
3855 | return rc; | |
3856 | } | |
3857 | ||
3858 | return 0; | |
3859 | } | |
3860 | ||
3861 | /** | |
bb8c093b | 3862 | * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free |
b481de9c ZY |
3863 | * |
3864 | * When moving to rx_free an SKB is allocated for the slot. | |
3865 | * | |
bb8c093b | 3866 | * Also restock the Rx queue via iwl4965_rx_queue_restock. |
01ebd063 | 3867 | * This is called as a scheduled work item (except for during initialization) |
b481de9c | 3868 | */ |
c79dd5b5 | 3869 | static void iwl4965_rx_allocate(struct iwl_priv *priv) |
b481de9c | 3870 | { |
bb8c093b | 3871 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c | 3872 | struct list_head *element; |
bb8c093b | 3873 | struct iwl4965_rx_mem_buffer *rxb; |
b481de9c ZY |
3874 | unsigned long flags; |
3875 | spin_lock_irqsave(&rxq->lock, flags); | |
3876 | while (!list_empty(&rxq->rx_used)) { | |
3877 | element = rxq->rx_used.next; | |
bb8c093b | 3878 | rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list); |
6440adb5 BC |
3879 | |
3880 | /* Alloc a new receive buffer */ | |
b481de9c | 3881 | rxb->skb = |
9ee1ba47 RR |
3882 | alloc_skb(priv->hw_setting.rx_buf_size, |
3883 | __GFP_NOWARN | GFP_ATOMIC); | |
b481de9c ZY |
3884 | if (!rxb->skb) { |
3885 | if (net_ratelimit()) | |
3886 | printk(KERN_CRIT DRV_NAME | |
3887 | ": Can not allocate SKB buffers\n"); | |
3888 | /* We don't reschedule replenish work here -- we will | |
3889 | * call the restock method and if it still needs | |
3890 | * more buffers it will schedule replenish */ | |
3891 | break; | |
3892 | } | |
3893 | priv->alloc_rxb_skb++; | |
3894 | list_del(element); | |
6440adb5 BC |
3895 | |
3896 | /* Get physical address of RB/SKB */ | |
b481de9c ZY |
3897 | rxb->dma_addr = |
3898 | pci_map_single(priv->pci_dev, rxb->skb->data, | |
9ee1ba47 | 3899 | priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE); |
b481de9c ZY |
3900 | list_add_tail(&rxb->list, &rxq->rx_free); |
3901 | rxq->free_count++; | |
3902 | } | |
3903 | spin_unlock_irqrestore(&rxq->lock, flags); | |
5c0eef96 MA |
3904 | } |
3905 | ||
3906 | /* | |
3907 | * this should be called while priv->lock is locked | |
3908 | */ | |
4fd1f841 | 3909 | static void __iwl4965_rx_replenish(void *data) |
5c0eef96 | 3910 | { |
c79dd5b5 | 3911 | struct iwl_priv *priv = data; |
5c0eef96 MA |
3912 | |
3913 | iwl4965_rx_allocate(priv); | |
3914 | iwl4965_rx_queue_restock(priv); | |
3915 | } | |
3916 | ||
3917 | ||
3918 | void iwl4965_rx_replenish(void *data) | |
3919 | { | |
c79dd5b5 | 3920 | struct iwl_priv *priv = data; |
5c0eef96 MA |
3921 | unsigned long flags; |
3922 | ||
3923 | iwl4965_rx_allocate(priv); | |
b481de9c ZY |
3924 | |
3925 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 3926 | iwl4965_rx_queue_restock(priv); |
b481de9c ZY |
3927 | spin_unlock_irqrestore(&priv->lock, flags); |
3928 | } | |
3929 | ||
3930 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. | |
9fbab516 | 3931 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL |
b481de9c ZY |
3932 | * This free routine walks the list of POOL entries and if SKB is set to |
3933 | * non NULL it is unmapped and freed | |
3934 | */ | |
c79dd5b5 | 3935 | static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq) |
b481de9c ZY |
3936 | { |
3937 | int i; | |
3938 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | |
3939 | if (rxq->pool[i].skb != NULL) { | |
3940 | pci_unmap_single(priv->pci_dev, | |
3941 | rxq->pool[i].dma_addr, | |
9ee1ba47 RR |
3942 | priv->hw_setting.rx_buf_size, |
3943 | PCI_DMA_FROMDEVICE); | |
b481de9c ZY |
3944 | dev_kfree_skb(rxq->pool[i].skb); |
3945 | } | |
3946 | } | |
3947 | ||
3948 | pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, | |
3949 | rxq->dma_addr); | |
3950 | rxq->bd = NULL; | |
3951 | } | |
3952 | ||
c79dd5b5 | 3953 | int iwl4965_rx_queue_alloc(struct iwl_priv *priv) |
b481de9c | 3954 | { |
bb8c093b | 3955 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
3956 | struct pci_dev *dev = priv->pci_dev; |
3957 | int i; | |
3958 | ||
3959 | spin_lock_init(&rxq->lock); | |
3960 | INIT_LIST_HEAD(&rxq->rx_free); | |
3961 | INIT_LIST_HEAD(&rxq->rx_used); | |
6440adb5 BC |
3962 | |
3963 | /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ | |
b481de9c ZY |
3964 | rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr); |
3965 | if (!rxq->bd) | |
3966 | return -ENOMEM; | |
6440adb5 | 3967 | |
b481de9c ZY |
3968 | /* Fill the rx_used queue with _all_ of the Rx buffers */ |
3969 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) | |
3970 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
6440adb5 | 3971 | |
b481de9c ZY |
3972 | /* Set us so that we have processed and used all buffers, but have |
3973 | * not restocked the Rx queue with fresh buffers */ | |
3974 | rxq->read = rxq->write = 0; | |
3975 | rxq->free_count = 0; | |
3976 | rxq->need_update = 0; | |
3977 | return 0; | |
3978 | } | |
3979 | ||
c79dd5b5 | 3980 | void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq) |
b481de9c ZY |
3981 | { |
3982 | unsigned long flags; | |
3983 | int i; | |
3984 | spin_lock_irqsave(&rxq->lock, flags); | |
3985 | INIT_LIST_HEAD(&rxq->rx_free); | |
3986 | INIT_LIST_HEAD(&rxq->rx_used); | |
3987 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
3988 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | |
3989 | /* In the reset function, these buffers may have been allocated | |
3990 | * to an SKB, so we need to unmap and free potential storage */ | |
3991 | if (rxq->pool[i].skb != NULL) { | |
3992 | pci_unmap_single(priv->pci_dev, | |
3993 | rxq->pool[i].dma_addr, | |
9ee1ba47 RR |
3994 | priv->hw_setting.rx_buf_size, |
3995 | PCI_DMA_FROMDEVICE); | |
b481de9c ZY |
3996 | priv->alloc_rxb_skb--; |
3997 | dev_kfree_skb(rxq->pool[i].skb); | |
3998 | rxq->pool[i].skb = NULL; | |
3999 | } | |
4000 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
4001 | } | |
4002 | ||
4003 | /* Set us so that we have processed and used all buffers, but have | |
4004 | * not restocked the Rx queue with fresh buffers */ | |
4005 | rxq->read = rxq->write = 0; | |
4006 | rxq->free_count = 0; | |
4007 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4008 | } | |
4009 | ||
4010 | /* Convert linear signal-to-noise ratio into dB */ | |
4011 | static u8 ratio2dB[100] = { | |
4012 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
4013 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | |
4014 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | |
4015 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | |
4016 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | |
4017 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | |
4018 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | |
4019 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | |
4020 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | |
4021 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | |
4022 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | |
4023 | }; | |
4024 | ||
4025 | /* Calculates a relative dB value from a ratio of linear | |
4026 | * (i.e. not dB) signal levels. | |
4027 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | |
bb8c093b | 4028 | int iwl4965_calc_db_from_ratio(int sig_ratio) |
b481de9c | 4029 | { |
c899a575 AB |
4030 | /* 1000:1 or higher just report as 60 dB */ |
4031 | if (sig_ratio >= 1000) | |
b481de9c ZY |
4032 | return 60; |
4033 | ||
c899a575 | 4034 | /* 100:1 or higher, divide by 10 and use table, |
b481de9c | 4035 | * add 20 dB to make up for divide by 10 */ |
c899a575 | 4036 | if (sig_ratio >= 100) |
b481de9c ZY |
4037 | return (20 + (int)ratio2dB[sig_ratio/10]); |
4038 | ||
4039 | /* We shouldn't see this */ | |
4040 | if (sig_ratio < 1) | |
4041 | return 0; | |
4042 | ||
4043 | /* Use table for ratios 1:1 - 99:1 */ | |
4044 | return (int)ratio2dB[sig_ratio]; | |
4045 | } | |
4046 | ||
4047 | #define PERFECT_RSSI (-20) /* dBm */ | |
4048 | #define WORST_RSSI (-95) /* dBm */ | |
4049 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
4050 | ||
4051 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
4052 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
4053 | * about formulas used below. */ | |
bb8c093b | 4054 | int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm) |
b481de9c ZY |
4055 | { |
4056 | int sig_qual; | |
4057 | int degradation = PERFECT_RSSI - rssi_dbm; | |
4058 | ||
4059 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
4060 | * as indicator; formula is (signal dbm - noise dbm). | |
4061 | * SNR at or above 40 is a great signal (100%). | |
4062 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
4063 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
4064 | if (noise_dbm) { | |
4065 | if (rssi_dbm - noise_dbm >= 40) | |
4066 | return 100; | |
4067 | else if (rssi_dbm < noise_dbm) | |
4068 | return 0; | |
4069 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
4070 | ||
4071 | /* Else use just the signal level. | |
4072 | * This formula is a least squares fit of data points collected and | |
4073 | * compared with a reference system that had a percentage (%) display | |
4074 | * for signal quality. */ | |
4075 | } else | |
4076 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
4077 | (15 * RSSI_RANGE + 62 * degradation)) / | |
4078 | (RSSI_RANGE * RSSI_RANGE); | |
4079 | ||
4080 | if (sig_qual > 100) | |
4081 | sig_qual = 100; | |
4082 | else if (sig_qual < 1) | |
4083 | sig_qual = 0; | |
4084 | ||
4085 | return sig_qual; | |
4086 | } | |
4087 | ||
4088 | /** | |
9fbab516 | 4089 | * iwl4965_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
4090 | * |
4091 | * Uses the priv->rx_handlers callback function array to invoke | |
4092 | * the appropriate handlers, including command responses, | |
4093 | * frame-received notifications, and other notifications. | |
4094 | */ | |
c79dd5b5 | 4095 | static void iwl4965_rx_handle(struct iwl_priv *priv) |
b481de9c | 4096 | { |
bb8c093b CH |
4097 | struct iwl4965_rx_mem_buffer *rxb; |
4098 | struct iwl4965_rx_packet *pkt; | |
4099 | struct iwl4965_rx_queue *rxq = &priv->rxq; | |
b481de9c ZY |
4100 | u32 r, i; |
4101 | int reclaim; | |
4102 | unsigned long flags; | |
5c0eef96 | 4103 | u8 fill_rx = 0; |
d68ab680 | 4104 | u32 count = 8; |
b481de9c | 4105 | |
6440adb5 BC |
4106 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
4107 | * buffer that the driver may process (last buffer filled by ucode). */ | |
bb8c093b | 4108 | r = iwl4965_hw_get_rx_read(priv); |
b481de9c ZY |
4109 | i = rxq->read; |
4110 | ||
4111 | /* Rx interrupt, but nothing sent from uCode */ | |
4112 | if (i == r) | |
4113 | IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i); | |
4114 | ||
5c0eef96 MA |
4115 | if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
4116 | fill_rx = 1; | |
4117 | ||
b481de9c ZY |
4118 | while (i != r) { |
4119 | rxb = rxq->queue[i]; | |
4120 | ||
9fbab516 | 4121 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
4122 | * then a bug has been introduced in the queue refilling |
4123 | * routines -- catch it here */ | |
4124 | BUG_ON(rxb == NULL); | |
4125 | ||
4126 | rxq->queue[i] = NULL; | |
4127 | ||
4128 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
9ee1ba47 | 4129 | priv->hw_setting.rx_buf_size, |
b481de9c | 4130 | PCI_DMA_FROMDEVICE); |
bb8c093b | 4131 | pkt = (struct iwl4965_rx_packet *)rxb->skb->data; |
b481de9c ZY |
4132 | |
4133 | /* Reclaim a command buffer only if this packet is a response | |
4134 | * to a (driver-originated) command. | |
4135 | * If the packet (e.g. Rx frame) originated from uCode, | |
4136 | * there is no command buffer to reclaim. | |
4137 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
4138 | * but apparently a few don't get set; catch them here. */ | |
4139 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
4140 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 4141 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 4142 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
4143 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
4144 | (pkt->hdr.cmd != REPLY_TX); | |
4145 | ||
4146 | /* Based on type of command response or notification, | |
4147 | * handle those that need handling via function in | |
bb8c093b | 4148 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c ZY |
4149 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
4150 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
4151 | "r = %d, i = %d, %s, 0x%02x\n", r, i, | |
4152 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
4153 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | |
4154 | } else { | |
4155 | /* No handling needed */ | |
4156 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
4157 | "r %d i %d No handler needed for %s, 0x%02x\n", | |
4158 | r, i, get_cmd_string(pkt->hdr.cmd), | |
4159 | pkt->hdr.cmd); | |
4160 | } | |
4161 | ||
4162 | if (reclaim) { | |
9fbab516 | 4163 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 4164 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
4165 | * as we reclaim the driver command queue */ |
4166 | if (rxb && rxb->skb) | |
bb8c093b | 4167 | iwl4965_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
4168 | else |
4169 | IWL_WARNING("Claim null rxb?\n"); | |
4170 | } | |
4171 | ||
4172 | /* For now we just don't re-use anything. We can tweak this | |
4173 | * later to try and re-use notification packets and SKBs that | |
4174 | * fail to Rx correctly */ | |
4175 | if (rxb->skb != NULL) { | |
4176 | priv->alloc_rxb_skb--; | |
4177 | dev_kfree_skb_any(rxb->skb); | |
4178 | rxb->skb = NULL; | |
4179 | } | |
4180 | ||
4181 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
9ee1ba47 RR |
4182 | priv->hw_setting.rx_buf_size, |
4183 | PCI_DMA_FROMDEVICE); | |
b481de9c ZY |
4184 | spin_lock_irqsave(&rxq->lock, flags); |
4185 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
4186 | spin_unlock_irqrestore(&rxq->lock, flags); | |
4187 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
4188 | /* If there are a lot of unused frames, |
4189 | * restock the Rx queue so ucode wont assert. */ | |
4190 | if (fill_rx) { | |
4191 | count++; | |
4192 | if (count >= 8) { | |
4193 | priv->rxq.read = i; | |
4194 | __iwl4965_rx_replenish(priv); | |
4195 | count = 0; | |
4196 | } | |
4197 | } | |
b481de9c ZY |
4198 | } |
4199 | ||
4200 | /* Backtrack one entry */ | |
4201 | priv->rxq.read = i; | |
bb8c093b | 4202 | iwl4965_rx_queue_restock(priv); |
b481de9c ZY |
4203 | } |
4204 | ||
6440adb5 BC |
4205 | /** |
4206 | * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware | |
4207 | */ | |
c79dd5b5 | 4208 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 4209 | struct iwl4965_tx_queue *txq) |
b481de9c ZY |
4210 | { |
4211 | u32 reg = 0; | |
4212 | int rc = 0; | |
4213 | int txq_id = txq->q.id; | |
4214 | ||
4215 | if (txq->need_update == 0) | |
4216 | return rc; | |
4217 | ||
4218 | /* if we're trying to save power */ | |
4219 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | |
4220 | /* wake up nic if it's powered down ... | |
4221 | * uCode will wake up, and interrupt us again, so next | |
4222 | * time we'll skip this part. */ | |
bb8c093b | 4223 | reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
4224 | |
4225 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
4226 | IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); | |
bb8c093b | 4227 | iwl4965_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
4228 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
4229 | return rc; | |
4230 | } | |
4231 | ||
4232 | /* restore this queue's parameters in nic hardware. */ | |
bb8c093b | 4233 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
4234 | if (rc) |
4235 | return rc; | |
bb8c093b | 4236 | iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 4237 | txq->q.write_ptr | (txq_id << 8)); |
bb8c093b | 4238 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4239 | |
4240 | /* else not in power-save mode, uCode will never sleep when we're | |
4241 | * trying to tx (during RFKILL, we're not trying to tx). */ | |
4242 | } else | |
bb8c093b | 4243 | iwl4965_write32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 4244 | txq->q.write_ptr | (txq_id << 8)); |
b481de9c ZY |
4245 | |
4246 | txq->need_update = 0; | |
4247 | ||
4248 | return rc; | |
4249 | } | |
4250 | ||
0a6857e7 | 4251 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b | 4252 | static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c | 4253 | { |
0795af57 JP |
4254 | DECLARE_MAC_BUF(mac); |
4255 | ||
b481de9c | 4256 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
0a6857e7 | 4257 | iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
4258 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
4259 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
4260 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
4261 | le32_to_cpu(rxon->filter_flags)); | |
4262 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
4263 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
4264 | rxon->ofdm_basic_rates); | |
4265 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
4266 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
4267 | print_mac(mac, rxon->node_addr)); | |
4268 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
4269 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
4270 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
4271 | } | |
4272 | #endif | |
4273 | ||
c79dd5b5 | 4274 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
4275 | { |
4276 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
4277 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
bb8c093b | 4278 | iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
4279 | } |
4280 | ||
c79dd5b5 | 4281 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
4282 | { |
4283 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
4284 | ||
4285 | /* disable interrupts from uCode/NIC to host */ | |
bb8c093b | 4286 | iwl4965_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
4287 | |
4288 | /* acknowledge/clear/reset any interrupts still pending | |
4289 | * from uCode or flow handler (Rx/Tx DMA) */ | |
bb8c093b CH |
4290 | iwl4965_write32(priv, CSR_INT, 0xffffffff); |
4291 | iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
4292 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
4293 | } | |
4294 | ||
4295 | static const char *desc_lookup(int i) | |
4296 | { | |
4297 | switch (i) { | |
4298 | case 1: | |
4299 | return "FAIL"; | |
4300 | case 2: | |
4301 | return "BAD_PARAM"; | |
4302 | case 3: | |
4303 | return "BAD_CHECKSUM"; | |
4304 | case 4: | |
4305 | return "NMI_INTERRUPT"; | |
4306 | case 5: | |
4307 | return "SYSASSERT"; | |
4308 | case 6: | |
4309 | return "FATAL_ERROR"; | |
4310 | } | |
4311 | ||
4312 | return "UNKNOWN"; | |
4313 | } | |
4314 | ||
4315 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | |
4316 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
4317 | ||
c79dd5b5 | 4318 | static void iwl4965_dump_nic_error_log(struct iwl_priv *priv) |
b481de9c ZY |
4319 | { |
4320 | u32 data2, line; | |
4321 | u32 desc, time, count, base, data1; | |
4322 | u32 blink1, blink2, ilink1, ilink2; | |
4323 | int rc; | |
4324 | ||
4325 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | |
4326 | ||
bb8c093b | 4327 | if (!iwl4965_hw_valid_rtc_data_addr(base)) { |
b481de9c ZY |
4328 | IWL_ERROR("Not valid error log pointer 0x%08X\n", base); |
4329 | return; | |
4330 | } | |
4331 | ||
bb8c093b | 4332 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
4333 | if (rc) { |
4334 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
4335 | return; | |
4336 | } | |
4337 | ||
bb8c093b | 4338 | count = iwl4965_read_targ_mem(priv, base); |
b481de9c ZY |
4339 | |
4340 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | |
4341 | IWL_ERROR("Start IWL Error Log Dump:\n"); | |
2acae16e | 4342 | IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count); |
b481de9c ZY |
4343 | } |
4344 | ||
bb8c093b CH |
4345 | desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32)); |
4346 | blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32)); | |
4347 | blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32)); | |
4348 | ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32)); | |
4349 | ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32)); | |
4350 | data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32)); | |
4351 | data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32)); | |
4352 | line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32)); | |
4353 | time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32)); | |
b481de9c ZY |
4354 | |
4355 | IWL_ERROR("Desc Time " | |
4356 | "data1 data2 line\n"); | |
4357 | IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n", | |
4358 | desc_lookup(desc), desc, time, data1, data2, line); | |
4359 | IWL_ERROR("blink1 blink2 ilink1 ilink2\n"); | |
4360 | IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, | |
4361 | ilink1, ilink2); | |
4362 | ||
bb8c093b | 4363 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4364 | } |
4365 | ||
4366 | #define EVENT_START_OFFSET (4 * sizeof(u32)) | |
4367 | ||
4368 | /** | |
bb8c093b | 4369 | * iwl4965_print_event_log - Dump error event log to syslog |
b481de9c | 4370 | * |
bb8c093b | 4371 | * NOTE: Must be called with iwl4965_grab_nic_access() already obtained! |
b481de9c | 4372 | */ |
c79dd5b5 | 4373 | static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx, |
b481de9c ZY |
4374 | u32 num_events, u32 mode) |
4375 | { | |
4376 | u32 i; | |
4377 | u32 base; /* SRAM byte address of event log header */ | |
4378 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | |
4379 | u32 ptr; /* SRAM byte address of log data */ | |
4380 | u32 ev, time, data; /* event log data */ | |
4381 | ||
4382 | if (num_events == 0) | |
4383 | return; | |
4384 | ||
4385 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
4386 | ||
4387 | if (mode == 0) | |
4388 | event_size = 2 * sizeof(u32); | |
4389 | else | |
4390 | event_size = 3 * sizeof(u32); | |
4391 | ||
4392 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | |
4393 | ||
4394 | /* "time" is actually "data" for mode 0 (no timestamp). | |
4395 | * place event id # at far right for easier visual parsing. */ | |
4396 | for (i = 0; i < num_events; i++) { | |
bb8c093b | 4397 | ev = iwl4965_read_targ_mem(priv, ptr); |
b481de9c | 4398 | ptr += sizeof(u32); |
bb8c093b | 4399 | time = iwl4965_read_targ_mem(priv, ptr); |
b481de9c ZY |
4400 | ptr += sizeof(u32); |
4401 | if (mode == 0) | |
4402 | IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */ | |
4403 | else { | |
bb8c093b | 4404 | data = iwl4965_read_targ_mem(priv, ptr); |
b481de9c ZY |
4405 | ptr += sizeof(u32); |
4406 | IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev); | |
4407 | } | |
4408 | } | |
4409 | } | |
4410 | ||
c79dd5b5 | 4411 | static void iwl4965_dump_nic_event_log(struct iwl_priv *priv) |
b481de9c ZY |
4412 | { |
4413 | int rc; | |
4414 | u32 base; /* SRAM byte address of event log header */ | |
4415 | u32 capacity; /* event log capacity in # entries */ | |
4416 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
4417 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
4418 | u32 next_entry; /* index of next entry to be written by uCode */ | |
4419 | u32 size; /* # entries that we'll print */ | |
4420 | ||
4421 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
bb8c093b | 4422 | if (!iwl4965_hw_valid_rtc_data_addr(base)) { |
b481de9c ZY |
4423 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); |
4424 | return; | |
4425 | } | |
4426 | ||
bb8c093b | 4427 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
4428 | if (rc) { |
4429 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
4430 | return; | |
4431 | } | |
4432 | ||
4433 | /* event log header */ | |
bb8c093b CH |
4434 | capacity = iwl4965_read_targ_mem(priv, base); |
4435 | mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32))); | |
4436 | num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32))); | |
4437 | next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32))); | |
b481de9c ZY |
4438 | |
4439 | size = num_wraps ? capacity : next_entry; | |
4440 | ||
4441 | /* bail out if nothing in log */ | |
4442 | if (size == 0) { | |
583fab37 | 4443 | IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); |
bb8c093b | 4444 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4445 | return; |
4446 | } | |
4447 | ||
583fab37 | 4448 | IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n", |
b481de9c ZY |
4449 | size, num_wraps); |
4450 | ||
4451 | /* if uCode has wrapped back to top of log, start at the oldest entry, | |
4452 | * i.e the next one that uCode would fill. */ | |
4453 | if (num_wraps) | |
bb8c093b | 4454 | iwl4965_print_event_log(priv, next_entry, |
b481de9c ZY |
4455 | capacity - next_entry, mode); |
4456 | ||
4457 | /* (then/else) start at top of log */ | |
bb8c093b | 4458 | iwl4965_print_event_log(priv, 0, next_entry, mode); |
b481de9c | 4459 | |
bb8c093b | 4460 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
4461 | } |
4462 | ||
4463 | /** | |
bb8c093b | 4464 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 4465 | */ |
c79dd5b5 | 4466 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 4467 | { |
bb8c093b | 4468 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
4469 | set_bit(STATUS_FW_ERROR, &priv->status); |
4470 | ||
4471 | /* Cancel currently queued command. */ | |
4472 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
4473 | ||
0a6857e7 TW |
4474 | #ifdef CONFIG_IWLWIFI_DEBUG |
4475 | if (iwl_debug_level & IWL_DL_FW_ERRORS) { | |
bb8c093b CH |
4476 | iwl4965_dump_nic_error_log(priv); |
4477 | iwl4965_dump_nic_event_log(priv); | |
4478 | iwl4965_print_rx_config_cmd(&priv->staging_rxon); | |
b481de9c ZY |
4479 | } |
4480 | #endif | |
4481 | ||
4482 | wake_up_interruptible(&priv->wait_command_queue); | |
4483 | ||
4484 | /* Keep the restart process from trying to send host | |
4485 | * commands by clearing the INIT status bit */ | |
4486 | clear_bit(STATUS_READY, &priv->status); | |
4487 | ||
4488 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
4489 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS, | |
4490 | "Restarting adapter due to uCode error.\n"); | |
4491 | ||
bb8c093b | 4492 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
4493 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
4494 | sizeof(priv->recovery_rxon)); | |
4495 | priv->error_recovering = 1; | |
4496 | } | |
4497 | queue_work(priv->workqueue, &priv->restart); | |
4498 | } | |
4499 | } | |
4500 | ||
c79dd5b5 | 4501 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
4502 | { |
4503 | unsigned long flags; | |
4504 | ||
4505 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
4506 | sizeof(priv->staging_rxon)); | |
4507 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 4508 | iwl4965_commit_rxon(priv); |
b481de9c | 4509 | |
bb8c093b | 4510 | iwl4965_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
4511 | |
4512 | spin_lock_irqsave(&priv->lock, flags); | |
4513 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
4514 | priv->error_recovering = 0; | |
4515 | spin_unlock_irqrestore(&priv->lock, flags); | |
4516 | } | |
4517 | ||
c79dd5b5 | 4518 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
4519 | { |
4520 | u32 inta, handled = 0; | |
4521 | u32 inta_fh; | |
4522 | unsigned long flags; | |
0a6857e7 | 4523 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
4524 | u32 inta_mask; |
4525 | #endif | |
4526 | ||
4527 | spin_lock_irqsave(&priv->lock, flags); | |
4528 | ||
4529 | /* Ack/clear/reset pending uCode interrupts. | |
4530 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
4531 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
bb8c093b CH |
4532 | inta = iwl4965_read32(priv, CSR_INT); |
4533 | iwl4965_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
4534 | |
4535 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
4536 | * Any new interrupts that happen after this, either while we're | |
4537 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
bb8c093b CH |
4538 | inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); |
4539 | iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 4540 | |
0a6857e7 TW |
4541 | #ifdef CONFIG_IWLWIFI_DEBUG |
4542 | if (iwl_debug_level & IWL_DL_ISR) { | |
9fbab516 BC |
4543 | /* just for debug */ |
4544 | inta_mask = iwl4965_read32(priv, CSR_INT_MASK); | |
b481de9c ZY |
4545 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
4546 | inta, inta_mask, inta_fh); | |
4547 | } | |
4548 | #endif | |
4549 | ||
4550 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
4551 | * atomic, make sure that inta covers all the interrupts that | |
4552 | * we've discovered, even if FH interrupt came in just after | |
4553 | * reading CSR_INT. */ | |
6f83eaa1 | 4554 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 4555 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 4556 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
4557 | inta |= CSR_INT_BIT_FH_TX; |
4558 | ||
4559 | /* Now service all interrupt bits discovered above. */ | |
4560 | if (inta & CSR_INT_BIT_HW_ERR) { | |
4561 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
4562 | ||
4563 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 4564 | iwl4965_disable_interrupts(priv); |
b481de9c | 4565 | |
bb8c093b | 4566 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
4567 | |
4568 | handled |= CSR_INT_BIT_HW_ERR; | |
4569 | ||
4570 | spin_unlock_irqrestore(&priv->lock, flags); | |
4571 | ||
4572 | return; | |
4573 | } | |
4574 | ||
0a6857e7 TW |
4575 | #ifdef CONFIG_IWLWIFI_DEBUG |
4576 | if (iwl_debug_level & (IWL_DL_ISR)) { | |
b481de9c | 4577 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
4578 | if (inta & CSR_INT_BIT_SCD) |
4579 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
4580 | "the frame/frames.\n"); | |
b481de9c ZY |
4581 | |
4582 | /* Alive notification via Rx interrupt will do the real work */ | |
4583 | if (inta & CSR_INT_BIT_ALIVE) | |
4584 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
4585 | } | |
4586 | #endif | |
4587 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 4588 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 4589 | |
9fbab516 | 4590 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
4591 | if (inta & CSR_INT_BIT_RF_KILL) { |
4592 | int hw_rf_kill = 0; | |
bb8c093b | 4593 | if (!(iwl4965_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
4594 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
4595 | hw_rf_kill = 1; | |
4596 | ||
4597 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR, | |
4598 | "RF_KILL bit toggled to %s.\n", | |
4599 | hw_rf_kill ? "disable radio":"enable radio"); | |
4600 | ||
4601 | /* Queue restart only if RF_KILL switch was set to "kill" | |
4602 | * when we loaded driver, and is now set to "enable". | |
4603 | * After we're Alive, RF_KILL gets handled by | |
3230455d | 4604 | * iwl4965_rx_card_state_notif() */ |
53e49093 ZY |
4605 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
4606 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
b481de9c | 4607 | queue_work(priv->workqueue, &priv->restart); |
53e49093 | 4608 | } |
b481de9c ZY |
4609 | |
4610 | handled |= CSR_INT_BIT_RF_KILL; | |
4611 | } | |
4612 | ||
9fbab516 | 4613 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
4614 | if (inta & CSR_INT_BIT_CT_KILL) { |
4615 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
4616 | handled |= CSR_INT_BIT_CT_KILL; | |
4617 | } | |
4618 | ||
4619 | /* Error detected by uCode */ | |
4620 | if (inta & CSR_INT_BIT_SW_ERR) { | |
4621 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
4622 | inta); | |
bb8c093b | 4623 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
4624 | handled |= CSR_INT_BIT_SW_ERR; |
4625 | } | |
4626 | ||
4627 | /* uCode wakes up after power-down sleep */ | |
4628 | if (inta & CSR_INT_BIT_WAKEUP) { | |
4629 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
bb8c093b CH |
4630 | iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq); |
4631 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]); | |
4632 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]); | |
4633 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]); | |
4634 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]); | |
4635 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]); | |
4636 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
4637 | |
4638 | handled |= CSR_INT_BIT_WAKEUP; | |
4639 | } | |
4640 | ||
4641 | /* All uCode command responses, including Tx command responses, | |
4642 | * Rx "responses" (frame-received notification), and other | |
4643 | * notifications from uCode come through here*/ | |
4644 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
bb8c093b | 4645 | iwl4965_rx_handle(priv); |
b481de9c ZY |
4646 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
4647 | } | |
4648 | ||
4649 | if (inta & CSR_INT_BIT_FH_TX) { | |
4650 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
4651 | handled |= CSR_INT_BIT_FH_TX; | |
4652 | } | |
4653 | ||
4654 | if (inta & ~handled) | |
4655 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
4656 | ||
4657 | if (inta & ~CSR_INI_SET_MASK) { | |
4658 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
4659 | inta & ~CSR_INI_SET_MASK); | |
4660 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
4661 | } | |
4662 | ||
4663 | /* Re-enable all interrupts */ | |
bb8c093b | 4664 | iwl4965_enable_interrupts(priv); |
b481de9c | 4665 | |
0a6857e7 TW |
4666 | #ifdef CONFIG_IWLWIFI_DEBUG |
4667 | if (iwl_debug_level & (IWL_DL_ISR)) { | |
bb8c093b CH |
4668 | inta = iwl4965_read32(priv, CSR_INT); |
4669 | inta_mask = iwl4965_read32(priv, CSR_INT_MASK); | |
4670 | inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
4671 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
4672 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
4673 | } | |
4674 | #endif | |
4675 | spin_unlock_irqrestore(&priv->lock, flags); | |
4676 | } | |
4677 | ||
bb8c093b | 4678 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 4679 | { |
c79dd5b5 | 4680 | struct iwl_priv *priv = data; |
b481de9c ZY |
4681 | u32 inta, inta_mask; |
4682 | u32 inta_fh; | |
4683 | if (!priv) | |
4684 | return IRQ_NONE; | |
4685 | ||
4686 | spin_lock(&priv->lock); | |
4687 | ||
4688 | /* Disable (but don't clear!) interrupts here to avoid | |
4689 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
4690 | * If we have something to service, the tasklet will re-enable ints. | |
4691 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
bb8c093b CH |
4692 | inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */ |
4693 | iwl4965_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
4694 | |
4695 | /* Discover which interrupts are active/pending */ | |
bb8c093b CH |
4696 | inta = iwl4965_read32(priv, CSR_INT); |
4697 | inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
4698 | |
4699 | /* Ignore interrupt if there's nothing in NIC to service. | |
4700 | * This may be due to IRQ shared with another device, | |
4701 | * or due to sporadic interrupts thrown from our NIC. */ | |
4702 | if (!inta && !inta_fh) { | |
4703 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
4704 | goto none; | |
4705 | } | |
4706 | ||
4707 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
4708 | /* Hardware disappeared. It might have already raised |
4709 | * an interrupt */ | |
b481de9c | 4710 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 4711 | goto unplugged; |
b481de9c ZY |
4712 | } |
4713 | ||
4714 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
4715 | inta, inta_mask, inta_fh); | |
4716 | ||
25c03d8e JP |
4717 | inta &= ~CSR_INT_BIT_SCD; |
4718 | ||
bb8c093b | 4719 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
4720 | if (likely(inta || inta_fh)) |
4721 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 4722 | |
66fbb541 ON |
4723 | unplugged: |
4724 | spin_unlock(&priv->lock); | |
b481de9c ZY |
4725 | return IRQ_HANDLED; |
4726 | ||
4727 | none: | |
4728 | /* re-enable interrupts here since we don't have anything to service. */ | |
bb8c093b | 4729 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
4730 | spin_unlock(&priv->lock); |
4731 | return IRQ_NONE; | |
4732 | } | |
4733 | ||
b481de9c ZY |
4734 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after |
4735 | * sending probe req. This should be set long enough to hear probe responses | |
4736 | * from more than one AP. */ | |
4737 | #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
4738 | #define IWL_ACTIVE_DWELL_TIME_52 (10) | |
4739 | ||
4740 | /* For faster active scanning, scan will move to the next channel if fewer than | |
4741 | * PLCP_QUIET_THRESH packets are heard on this channel within | |
4742 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | |
4743 | * time if it's a quiet channel (nothing responded to our probe, and there's | |
4744 | * no other traffic). | |
4745 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | |
4746 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | |
4747 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */ | |
4748 | ||
4749 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | |
4750 | * Must be set longer than active dwell time. | |
4751 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | |
4752 | #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
4753 | #define IWL_PASSIVE_DWELL_TIME_52 (10) | |
4754 | #define IWL_PASSIVE_DWELL_BASE (100) | |
4755 | #define IWL_CHANNEL_TUNE_TIME 5 | |
4756 | ||
c79dd5b5 | 4757 | static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv, |
8318d78a | 4758 | enum ieee80211_band band) |
b481de9c | 4759 | { |
8318d78a | 4760 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
4761 | return IWL_ACTIVE_DWELL_TIME_52; |
4762 | else | |
4763 | return IWL_ACTIVE_DWELL_TIME_24; | |
4764 | } | |
4765 | ||
c79dd5b5 | 4766 | static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv, |
8318d78a | 4767 | enum ieee80211_band band) |
b481de9c | 4768 | { |
8318d78a JB |
4769 | u16 active = iwl4965_get_active_dwell_time(priv, band); |
4770 | u16 passive = (band != IEEE80211_BAND_5GHZ) ? | |
b481de9c ZY |
4771 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : |
4772 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52; | |
4773 | ||
bb8c093b | 4774 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
4775 | /* If we're associated, we clamp the maximum passive |
4776 | * dwell time to be 98% of the beacon interval (minus | |
4777 | * 2 * channel tune time) */ | |
4778 | passive = priv->beacon_int; | |
4779 | if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive) | |
4780 | passive = IWL_PASSIVE_DWELL_BASE; | |
4781 | passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2; | |
4782 | } | |
4783 | ||
4784 | if (passive <= active) | |
4785 | passive = active + 1; | |
4786 | ||
4787 | return passive; | |
4788 | } | |
4789 | ||
c79dd5b5 | 4790 | static int iwl4965_get_channels_for_scan(struct iwl_priv *priv, |
8318d78a | 4791 | enum ieee80211_band band, |
b481de9c | 4792 | u8 is_active, u8 direct_mask, |
bb8c093b | 4793 | struct iwl4965_scan_channel *scan_ch) |
b481de9c ZY |
4794 | { |
4795 | const struct ieee80211_channel *channels = NULL; | |
8318d78a | 4796 | const struct ieee80211_supported_band *sband; |
bf85ea4f | 4797 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
4798 | u16 passive_dwell = 0; |
4799 | u16 active_dwell = 0; | |
4800 | int added, i; | |
4801 | ||
8318d78a JB |
4802 | sband = iwl4965_get_hw_mode(priv, band); |
4803 | if (!sband) | |
b481de9c ZY |
4804 | return 0; |
4805 | ||
8318d78a | 4806 | channels = sband->channels; |
b481de9c | 4807 | |
8318d78a JB |
4808 | active_dwell = iwl4965_get_active_dwell_time(priv, band); |
4809 | passive_dwell = iwl4965_get_passive_dwell_time(priv, band); | |
b481de9c | 4810 | |
8318d78a JB |
4811 | for (i = 0, added = 0; i < sband->n_channels; i++) { |
4812 | if (ieee80211_frequency_to_channel(channels[i].center_freq) == | |
b481de9c | 4813 | le16_to_cpu(priv->active_rxon.channel)) { |
bb8c093b | 4814 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
4815 | IWL_DEBUG_SCAN |
4816 | ("Skipping current channel %d\n", | |
4817 | le16_to_cpu(priv->active_rxon.channel)); | |
4818 | continue; | |
4819 | } | |
4820 | } else if (priv->only_active_channel) | |
4821 | continue; | |
4822 | ||
8318d78a | 4823 | scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq); |
b481de9c | 4824 | |
8622e705 | 4825 | ch_info = iwl_get_channel_info(priv, band, |
9fbab516 | 4826 | scan_ch->channel); |
b481de9c ZY |
4827 | if (!is_channel_valid(ch_info)) { |
4828 | IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n", | |
4829 | scan_ch->channel); | |
4830 | continue; | |
4831 | } | |
4832 | ||
4833 | if (!is_active || is_channel_passive(ch_info) || | |
8318d78a | 4834 | (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) |
b481de9c ZY |
4835 | scan_ch->type = 0; /* passive */ |
4836 | else | |
4837 | scan_ch->type = 1; /* active */ | |
4838 | ||
4839 | if (scan_ch->type & 1) | |
4840 | scan_ch->type |= (direct_mask << 1); | |
4841 | ||
4842 | if (is_channel_narrow(ch_info)) | |
4843 | scan_ch->type |= (1 << 7); | |
4844 | ||
4845 | scan_ch->active_dwell = cpu_to_le16(active_dwell); | |
4846 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | |
4847 | ||
9fbab516 | 4848 | /* Set txpower levels to defaults */ |
b481de9c ZY |
4849 | scan_ch->tpc.dsp_atten = 110; |
4850 | /* scan_pwr_info->tpc.dsp_atten; */ | |
4851 | ||
4852 | /*scan_pwr_info->tpc.tx_gain; */ | |
8318d78a | 4853 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
4854 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; |
4855 | else { | |
4856 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | |
4857 | /* NOTE: if we were doing 6Mb OFDM for scans we'd use | |
9fbab516 | 4858 | * power level: |
8a1b0245 | 4859 | * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; |
b481de9c ZY |
4860 | */ |
4861 | } | |
4862 | ||
4863 | IWL_DEBUG_SCAN("Scanning %d [%s %d]\n", | |
4864 | scan_ch->channel, | |
4865 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | |
4866 | (scan_ch->type & 1) ? | |
4867 | active_dwell : passive_dwell); | |
4868 | ||
4869 | scan_ch++; | |
4870 | added++; | |
4871 | } | |
4872 | ||
4873 | IWL_DEBUG_SCAN("total channels to scan %d \n", added); | |
4874 | return added; | |
4875 | } | |
4876 | ||
c79dd5b5 | 4877 | static void iwl4965_init_hw_rates(struct iwl_priv *priv, |
b481de9c ZY |
4878 | struct ieee80211_rate *rates) |
4879 | { | |
4880 | int i; | |
4881 | ||
4882 | for (i = 0; i < IWL_RATE_COUNT; i++) { | |
8318d78a JB |
4883 | rates[i].bitrate = iwl4965_rates[i].ieee * 5; |
4884 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ | |
4885 | rates[i].hw_value_short = i; | |
4886 | rates[i].flags = 0; | |
4887 | if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) { | |
b481de9c | 4888 | /* |
8318d78a | 4889 | * If CCK != 1M then set short preamble rate flag. |
b481de9c | 4890 | */ |
35cdeaf4 TW |
4891 | rates[i].flags |= |
4892 | (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ? | |
4893 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; | |
b481de9c | 4894 | } |
b481de9c | 4895 | } |
b481de9c ZY |
4896 | } |
4897 | ||
4898 | /** | |
bb8c093b | 4899 | * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom |
b481de9c | 4900 | */ |
bf85ea4f | 4901 | int iwl4965_init_geos(struct iwl_priv *priv) |
b481de9c | 4902 | { |
bf85ea4f | 4903 | struct iwl_channel_info *ch; |
8211ef78 | 4904 | struct ieee80211_supported_band *sband; |
b481de9c ZY |
4905 | struct ieee80211_channel *channels; |
4906 | struct ieee80211_channel *geo_ch; | |
4907 | struct ieee80211_rate *rates; | |
4908 | int i = 0; | |
b481de9c | 4909 | |
8318d78a JB |
4910 | if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates || |
4911 | priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) { | |
b481de9c ZY |
4912 | IWL_DEBUG_INFO("Geography modes already initialized.\n"); |
4913 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
4914 | return 0; | |
4915 | } | |
4916 | ||
b481de9c ZY |
4917 | channels = kzalloc(sizeof(struct ieee80211_channel) * |
4918 | priv->channel_count, GFP_KERNEL); | |
8318d78a | 4919 | if (!channels) |
b481de9c | 4920 | return -ENOMEM; |
b481de9c | 4921 | |
8211ef78 | 4922 | rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)), |
b481de9c ZY |
4923 | GFP_KERNEL); |
4924 | if (!rates) { | |
b481de9c ZY |
4925 | kfree(channels); |
4926 | return -ENOMEM; | |
4927 | } | |
4928 | ||
b481de9c | 4929 | /* 5.2GHz channels start after the 2.4GHz channels */ |
8211ef78 | 4930 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; |
bf85ea4f | 4931 | sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)]; |
8211ef78 TW |
4932 | /* just OFDM */ |
4933 | sband->bitrates = &rates[IWL_FIRST_OFDM_RATE]; | |
4934 | sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE; | |
8318d78a | 4935 | |
8211ef78 | 4936 | iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ); |
78330fdd | 4937 | |
8211ef78 TW |
4938 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; |
4939 | sband->channels = channels; | |
4940 | /* OFDM & CCK */ | |
4941 | sband->bitrates = rates; | |
4942 | sband->n_bitrates = IWL_RATE_COUNT; | |
b481de9c | 4943 | |
8211ef78 | 4944 | iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ); |
78330fdd | 4945 | |
b481de9c ZY |
4946 | priv->ieee_channels = channels; |
4947 | priv->ieee_rates = rates; | |
4948 | ||
bb8c093b | 4949 | iwl4965_init_hw_rates(priv, rates); |
b481de9c | 4950 | |
8211ef78 | 4951 | for (i = 0; i < priv->channel_count; i++) { |
b481de9c ZY |
4952 | ch = &priv->channel_info[i]; |
4953 | ||
8211ef78 TW |
4954 | /* FIXME: might be removed if scan is OK */ |
4955 | if (!is_channel_valid(ch)) | |
b481de9c | 4956 | continue; |
b481de9c | 4957 | |
8211ef78 TW |
4958 | if (is_channel_a_band(ch)) |
4959 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; | |
4960 | else | |
4961 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; | |
b481de9c | 4962 | |
8211ef78 TW |
4963 | geo_ch = &sband->channels[sband->n_channels++]; |
4964 | ||
4965 | geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel); | |
8318d78a JB |
4966 | geo_ch->max_power = ch->max_power_avg; |
4967 | geo_ch->max_antenna_gain = 0xff; | |
7b72304d | 4968 | geo_ch->hw_value = ch->channel; |
b481de9c ZY |
4969 | |
4970 | if (is_channel_valid(ch)) { | |
8318d78a JB |
4971 | if (!(ch->flags & EEPROM_CHANNEL_IBSS)) |
4972 | geo_ch->flags |= IEEE80211_CHAN_NO_IBSS; | |
b481de9c | 4973 | |
8318d78a JB |
4974 | if (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) |
4975 | geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN; | |
b481de9c ZY |
4976 | |
4977 | if (ch->flags & EEPROM_CHANNEL_RADAR) | |
8318d78a | 4978 | geo_ch->flags |= IEEE80211_CHAN_RADAR; |
b481de9c ZY |
4979 | |
4980 | if (ch->max_power_avg > priv->max_channel_txpower_limit) | |
4981 | priv->max_channel_txpower_limit = | |
4982 | ch->max_power_avg; | |
8211ef78 | 4983 | } else { |
8318d78a | 4984 | geo_ch->flags |= IEEE80211_CHAN_DISABLED; |
8211ef78 TW |
4985 | } |
4986 | ||
4987 | /* Save flags for reg domain usage */ | |
4988 | geo_ch->orig_flags = geo_ch->flags; | |
4989 | ||
4990 | IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n", | |
4991 | ch->channel, geo_ch->center_freq, | |
4992 | is_channel_a_band(ch) ? "5.2" : "2.4", | |
4993 | geo_ch->flags & IEEE80211_CHAN_DISABLED ? | |
4994 | "restricted" : "valid", | |
4995 | geo_ch->flags); | |
b481de9c ZY |
4996 | } |
4997 | ||
82b9a121 TW |
4998 | if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && |
4999 | priv->cfg->sku & IWL_SKU_A) { | |
b481de9c ZY |
5000 | printk(KERN_INFO DRV_NAME |
5001 | ": Incorrectly detected BG card as ABG. Please send " | |
5002 | "your PCI ID 0x%04X:0x%04X to maintainer.\n", | |
5003 | priv->pci_dev->device, priv->pci_dev->subsystem_device); | |
82b9a121 | 5004 | priv->cfg->sku &= ~IWL_SKU_A; |
b481de9c ZY |
5005 | } |
5006 | ||
5007 | printk(KERN_INFO DRV_NAME | |
5008 | ": Tunable channels: %d 802.11bg, %d 802.11a channels\n", | |
8318d78a JB |
5009 | priv->bands[IEEE80211_BAND_2GHZ].n_channels, |
5010 | priv->bands[IEEE80211_BAND_5GHZ].n_channels); | |
b481de9c | 5011 | |
8318d78a JB |
5012 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ]; |
5013 | priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ]; | |
b481de9c | 5014 | |
b481de9c ZY |
5015 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); |
5016 | ||
5017 | return 0; | |
5018 | } | |
5019 | ||
849e0dce RC |
5020 | /* |
5021 | * iwl4965_free_geos - undo allocations in iwl4965_init_geos | |
5022 | */ | |
bf85ea4f | 5023 | void iwl4965_free_geos(struct iwl_priv *priv) |
849e0dce | 5024 | { |
849e0dce RC |
5025 | kfree(priv->ieee_channels); |
5026 | kfree(priv->ieee_rates); | |
5027 | clear_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
5028 | } | |
5029 | ||
b481de9c ZY |
5030 | /****************************************************************************** |
5031 | * | |
5032 | * uCode download functions | |
5033 | * | |
5034 | ******************************************************************************/ | |
5035 | ||
c79dd5b5 | 5036 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 5037 | { |
98c92211 TW |
5038 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
5039 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
5040 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
5041 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
5042 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
5043 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
5044 | } |
5045 | ||
5046 | /** | |
bb8c093b | 5047 | * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host, |
b481de9c ZY |
5048 | * looking at all data. |
5049 | */ | |
c79dd5b5 | 5050 | static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image, |
9fbab516 | 5051 | u32 len) |
b481de9c ZY |
5052 | { |
5053 | u32 val; | |
5054 | u32 save_len = len; | |
5055 | int rc = 0; | |
5056 | u32 errcnt; | |
5057 | ||
5058 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | |
5059 | ||
bb8c093b | 5060 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
5061 | if (rc) |
5062 | return rc; | |
5063 | ||
bb8c093b | 5064 | iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND); |
b481de9c ZY |
5065 | |
5066 | errcnt = 0; | |
5067 | for (; len > 0; len -= sizeof(u32), image++) { | |
5068 | /* read data comes through single port, auto-incr addr */ | |
5069 | /* NOTE: Use the debugless read so we don't flood kernel log | |
5070 | * if IWL_DL_IO is set */ | |
bb8c093b | 5071 | val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c ZY |
5072 | if (val != le32_to_cpu(*image)) { |
5073 | IWL_ERROR("uCode INST section is invalid at " | |
5074 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | |
5075 | save_len - len, val, le32_to_cpu(*image)); | |
5076 | rc = -EIO; | |
5077 | errcnt++; | |
5078 | if (errcnt >= 20) | |
5079 | break; | |
5080 | } | |
5081 | } | |
5082 | ||
bb8c093b | 5083 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5084 | |
5085 | if (!errcnt) | |
5086 | IWL_DEBUG_INFO | |
5087 | ("ucode image in INSTRUCTION memory is good\n"); | |
5088 | ||
5089 | return rc; | |
5090 | } | |
5091 | ||
5092 | ||
5093 | /** | |
bb8c093b | 5094 | * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host, |
b481de9c ZY |
5095 | * using sample data 100 bytes apart. If these sample points are good, |
5096 | * it's a pretty good bet that everything between them is good, too. | |
5097 | */ | |
c79dd5b5 | 5098 | static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) |
b481de9c ZY |
5099 | { |
5100 | u32 val; | |
5101 | int rc = 0; | |
5102 | u32 errcnt = 0; | |
5103 | u32 i; | |
5104 | ||
5105 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | |
5106 | ||
bb8c093b | 5107 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
5108 | if (rc) |
5109 | return rc; | |
5110 | ||
5111 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | |
5112 | /* read data comes through single port, auto-incr addr */ | |
5113 | /* NOTE: Use the debugless read so we don't flood kernel log | |
5114 | * if IWL_DL_IO is set */ | |
bb8c093b | 5115 | iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
b481de9c | 5116 | i + RTC_INST_LOWER_BOUND); |
bb8c093b | 5117 | val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c ZY |
5118 | if (val != le32_to_cpu(*image)) { |
5119 | #if 0 /* Enable this if you want to see details */ | |
5120 | IWL_ERROR("uCode INST section is invalid at " | |
5121 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | |
5122 | i, val, *image); | |
5123 | #endif | |
5124 | rc = -EIO; | |
5125 | errcnt++; | |
5126 | if (errcnt >= 3) | |
5127 | break; | |
5128 | } | |
5129 | } | |
5130 | ||
bb8c093b | 5131 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5132 | |
5133 | return rc; | |
5134 | } | |
5135 | ||
5136 | ||
5137 | /** | |
bb8c093b | 5138 | * iwl4965_verify_ucode - determine which instruction image is in SRAM, |
b481de9c ZY |
5139 | * and verify its contents |
5140 | */ | |
c79dd5b5 | 5141 | static int iwl4965_verify_ucode(struct iwl_priv *priv) |
b481de9c ZY |
5142 | { |
5143 | __le32 *image; | |
5144 | u32 len; | |
5145 | int rc = 0; | |
5146 | ||
5147 | /* Try bootstrap */ | |
5148 | image = (__le32 *)priv->ucode_boot.v_addr; | |
5149 | len = priv->ucode_boot.len; | |
bb8c093b | 5150 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
5151 | if (rc == 0) { |
5152 | IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n"); | |
5153 | return 0; | |
5154 | } | |
5155 | ||
5156 | /* Try initialize */ | |
5157 | image = (__le32 *)priv->ucode_init.v_addr; | |
5158 | len = priv->ucode_init.len; | |
bb8c093b | 5159 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
5160 | if (rc == 0) { |
5161 | IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n"); | |
5162 | return 0; | |
5163 | } | |
5164 | ||
5165 | /* Try runtime/protocol */ | |
5166 | image = (__le32 *)priv->ucode_code.v_addr; | |
5167 | len = priv->ucode_code.len; | |
bb8c093b | 5168 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
5169 | if (rc == 0) { |
5170 | IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n"); | |
5171 | return 0; | |
5172 | } | |
5173 | ||
5174 | IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | |
5175 | ||
9fbab516 BC |
5176 | /* Since nothing seems to match, show first several data entries in |
5177 | * instruction SRAM, so maybe visual inspection will give a clue. | |
5178 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | |
b481de9c ZY |
5179 | image = (__le32 *)priv->ucode_boot.v_addr; |
5180 | len = priv->ucode_boot.len; | |
bb8c093b | 5181 | rc = iwl4965_verify_inst_full(priv, image, len); |
b481de9c ZY |
5182 | |
5183 | return rc; | |
5184 | } | |
5185 | ||
5186 | ||
5187 | /* check contents of special bootstrap uCode SRAM */ | |
c79dd5b5 | 5188 | static int iwl4965_verify_bsm(struct iwl_priv *priv) |
b481de9c ZY |
5189 | { |
5190 | __le32 *image = priv->ucode_boot.v_addr; | |
5191 | u32 len = priv->ucode_boot.len; | |
5192 | u32 reg; | |
5193 | u32 val; | |
5194 | ||
5195 | IWL_DEBUG_INFO("Begin verify bsm\n"); | |
5196 | ||
5197 | /* verify BSM SRAM contents */ | |
bb8c093b | 5198 | val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG); |
b481de9c ZY |
5199 | for (reg = BSM_SRAM_LOWER_BOUND; |
5200 | reg < BSM_SRAM_LOWER_BOUND + len; | |
5201 | reg += sizeof(u32), image ++) { | |
bb8c093b | 5202 | val = iwl4965_read_prph(priv, reg); |
b481de9c ZY |
5203 | if (val != le32_to_cpu(*image)) { |
5204 | IWL_ERROR("BSM uCode verification failed at " | |
5205 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | |
5206 | BSM_SRAM_LOWER_BOUND, | |
5207 | reg - BSM_SRAM_LOWER_BOUND, len, | |
5208 | val, le32_to_cpu(*image)); | |
5209 | return -EIO; | |
5210 | } | |
5211 | } | |
5212 | ||
5213 | IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n"); | |
5214 | ||
5215 | return 0; | |
5216 | } | |
5217 | ||
5218 | /** | |
bb8c093b | 5219 | * iwl4965_load_bsm - Load bootstrap instructions |
b481de9c ZY |
5220 | * |
5221 | * BSM operation: | |
5222 | * | |
5223 | * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program | |
5224 | * in special SRAM that does not power down during RFKILL. When powering back | |
5225 | * up after power-saving sleeps (or during initial uCode load), the BSM loads | |
5226 | * the bootstrap program into the on-board processor, and starts it. | |
5227 | * | |
5228 | * The bootstrap program loads (via DMA) instructions and data for a new | |
5229 | * program from host DRAM locations indicated by the host driver in the | |
5230 | * BSM_DRAM_* registers. Once the new program is loaded, it starts | |
5231 | * automatically. | |
5232 | * | |
5233 | * When initializing the NIC, the host driver points the BSM to the | |
5234 | * "initialize" uCode image. This uCode sets up some internal data, then | |
5235 | * notifies host via "initialize alive" that it is complete. | |
5236 | * | |
5237 | * The host then replaces the BSM_DRAM_* pointer values to point to the | |
5238 | * normal runtime uCode instructions and a backup uCode data cache buffer | |
5239 | * (filled initially with starting data values for the on-board processor), | |
5240 | * then triggers the "initialize" uCode to load and launch the runtime uCode, | |
5241 | * which begins normal operation. | |
5242 | * | |
5243 | * When doing a power-save shutdown, runtime uCode saves data SRAM into | |
5244 | * the backup data cache in DRAM before SRAM is powered down. | |
5245 | * | |
5246 | * When powering back up, the BSM loads the bootstrap program. This reloads | |
5247 | * the runtime uCode instructions and the backup data cache into SRAM, | |
5248 | * and re-launches the runtime uCode from where it left off. | |
5249 | */ | |
c79dd5b5 | 5250 | static int iwl4965_load_bsm(struct iwl_priv *priv) |
b481de9c ZY |
5251 | { |
5252 | __le32 *image = priv->ucode_boot.v_addr; | |
5253 | u32 len = priv->ucode_boot.len; | |
5254 | dma_addr_t pinst; | |
5255 | dma_addr_t pdata; | |
5256 | u32 inst_len; | |
5257 | u32 data_len; | |
5258 | int rc; | |
5259 | int i; | |
5260 | u32 done; | |
5261 | u32 reg_offset; | |
5262 | ||
5263 | IWL_DEBUG_INFO("Begin load bsm\n"); | |
5264 | ||
5265 | /* make sure bootstrap program is no larger than BSM's SRAM size */ | |
5266 | if (len > IWL_MAX_BSM_SIZE) | |
5267 | return -EINVAL; | |
5268 | ||
5269 | /* Tell bootstrap uCode where to find the "Initialize" uCode | |
9fbab516 | 5270 | * in host DRAM ... host DRAM physical address bits 35:4 for 4965. |
bb8c093b | 5271 | * NOTE: iwl4965_initialize_alive_start() will replace these values, |
b481de9c ZY |
5272 | * after the "initialize" uCode has run, to point to |
5273 | * runtime/protocol instructions and backup data cache. */ | |
5274 | pinst = priv->ucode_init.p_addr >> 4; | |
5275 | pdata = priv->ucode_init_data.p_addr >> 4; | |
5276 | inst_len = priv->ucode_init.len; | |
5277 | data_len = priv->ucode_init_data.len; | |
5278 | ||
bb8c093b | 5279 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
5280 | if (rc) |
5281 | return rc; | |
5282 | ||
bb8c093b CH |
5283 | iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
5284 | iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
5285 | iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | |
5286 | iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); | |
b481de9c ZY |
5287 | |
5288 | /* Fill BSM memory with bootstrap instructions */ | |
5289 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | |
5290 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | |
5291 | reg_offset += sizeof(u32), image++) | |
bb8c093b | 5292 | _iwl4965_write_prph(priv, reg_offset, |
b481de9c ZY |
5293 | le32_to_cpu(*image)); |
5294 | ||
bb8c093b | 5295 | rc = iwl4965_verify_bsm(priv); |
b481de9c | 5296 | if (rc) { |
bb8c093b | 5297 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5298 | return rc; |
5299 | } | |
5300 | ||
5301 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | |
bb8c093b CH |
5302 | iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); |
5303 | iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG, | |
b481de9c | 5304 | RTC_INST_LOWER_BOUND); |
bb8c093b | 5305 | iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
b481de9c ZY |
5306 | |
5307 | /* Load bootstrap code into instruction SRAM now, | |
5308 | * to prepare to load "initialize" uCode */ | |
bb8c093b | 5309 | iwl4965_write_prph(priv, BSM_WR_CTRL_REG, |
b481de9c ZY |
5310 | BSM_WR_CTRL_REG_BIT_START); |
5311 | ||
5312 | /* Wait for load of bootstrap uCode to finish */ | |
5313 | for (i = 0; i < 100; i++) { | |
bb8c093b | 5314 | done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG); |
b481de9c ZY |
5315 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) |
5316 | break; | |
5317 | udelay(10); | |
5318 | } | |
5319 | if (i < 100) | |
5320 | IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i); | |
5321 | else { | |
5322 | IWL_ERROR("BSM write did not complete!\n"); | |
5323 | return -EIO; | |
5324 | } | |
5325 | ||
5326 | /* Enable future boot loads whenever power management unit triggers it | |
5327 | * (e.g. when powering back up after power-save shutdown) */ | |
bb8c093b | 5328 | iwl4965_write_prph(priv, BSM_WR_CTRL_REG, |
b481de9c ZY |
5329 | BSM_WR_CTRL_REG_BIT_START_EN); |
5330 | ||
bb8c093b | 5331 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5332 | |
5333 | return 0; | |
5334 | } | |
5335 | ||
c79dd5b5 | 5336 | static void iwl4965_nic_start(struct iwl_priv *priv) |
b481de9c ZY |
5337 | { |
5338 | /* Remove all resets to allow NIC to operate */ | |
bb8c093b | 5339 | iwl4965_write32(priv, CSR_RESET, 0); |
b481de9c ZY |
5340 | } |
5341 | ||
90e759d1 | 5342 | |
b481de9c | 5343 | /** |
bb8c093b | 5344 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
5345 | * |
5346 | * Copy into buffers for card to fetch via bus-mastering | |
5347 | */ | |
c79dd5b5 | 5348 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 5349 | { |
bb8c093b | 5350 | struct iwl4965_ucode *ucode; |
90e759d1 | 5351 | int ret; |
b481de9c | 5352 | const struct firmware *ucode_raw; |
4bf775cd | 5353 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
5354 | u8 *src; |
5355 | size_t len; | |
5356 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
5357 | ||
5358 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
5359 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
5360 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
5361 | if (ret < 0) { | |
5362 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
5363 | name, ret); | |
b481de9c ZY |
5364 | goto error; |
5365 | } | |
5366 | ||
5367 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
5368 | name, ucode_raw->size); | |
5369 | ||
5370 | /* Make sure that we got at least our header! */ | |
5371 | if (ucode_raw->size < sizeof(*ucode)) { | |
5372 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 5373 | ret = -EINVAL; |
b481de9c ZY |
5374 | goto err_release; |
5375 | } | |
5376 | ||
5377 | /* Data from ucode file: header followed by uCode images */ | |
5378 | ucode = (void *)ucode_raw->data; | |
5379 | ||
5380 | ver = le32_to_cpu(ucode->ver); | |
5381 | inst_size = le32_to_cpu(ucode->inst_size); | |
5382 | data_size = le32_to_cpu(ucode->data_size); | |
5383 | init_size = le32_to_cpu(ucode->init_size); | |
5384 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
5385 | boot_size = le32_to_cpu(ucode->boot_size); | |
5386 | ||
5387 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
5388 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
5389 | inst_size); | |
5390 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
5391 | data_size); | |
5392 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
5393 | init_size); | |
5394 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
5395 | init_data_size); | |
5396 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
5397 | boot_size); | |
5398 | ||
5399 | /* Verify size of file vs. image size info in file's header */ | |
5400 | if (ucode_raw->size < sizeof(*ucode) + | |
5401 | inst_size + data_size + init_size + | |
5402 | init_data_size + boot_size) { | |
5403 | ||
5404 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
5405 | (int)ucode_raw->size); | |
90e759d1 | 5406 | ret = -EINVAL; |
b481de9c ZY |
5407 | goto err_release; |
5408 | } | |
5409 | ||
5410 | /* Verify that uCode images will fit in card's SRAM */ | |
5411 | if (inst_size > IWL_MAX_INST_SIZE) { | |
90e759d1 TW |
5412 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
5413 | inst_size); | |
5414 | ret = -EINVAL; | |
b481de9c ZY |
5415 | goto err_release; |
5416 | } | |
5417 | ||
5418 | if (data_size > IWL_MAX_DATA_SIZE) { | |
90e759d1 TW |
5419 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
5420 | data_size); | |
5421 | ret = -EINVAL; | |
b481de9c ZY |
5422 | goto err_release; |
5423 | } | |
5424 | if (init_size > IWL_MAX_INST_SIZE) { | |
5425 | IWL_DEBUG_INFO | |
90e759d1 TW |
5426 | ("uCode init instr len %d too large to fit in\n", |
5427 | init_size); | |
5428 | ret = -EINVAL; | |
b481de9c ZY |
5429 | goto err_release; |
5430 | } | |
5431 | if (init_data_size > IWL_MAX_DATA_SIZE) { | |
5432 | IWL_DEBUG_INFO | |
90e759d1 TW |
5433 | ("uCode init data len %d too large to fit in\n", |
5434 | init_data_size); | |
5435 | ret = -EINVAL; | |
b481de9c ZY |
5436 | goto err_release; |
5437 | } | |
5438 | if (boot_size > IWL_MAX_BSM_SIZE) { | |
5439 | IWL_DEBUG_INFO | |
90e759d1 TW |
5440 | ("uCode boot instr len %d too large to fit in\n", |
5441 | boot_size); | |
5442 | ret = -EINVAL; | |
b481de9c ZY |
5443 | goto err_release; |
5444 | } | |
5445 | ||
5446 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
5447 | ||
5448 | /* Runtime instructions and 2 copies of data: | |
5449 | * 1) unmodified from disk | |
5450 | * 2) backup cache for save/restore during power-downs */ | |
5451 | priv->ucode_code.len = inst_size; | |
98c92211 | 5452 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
5453 | |
5454 | priv->ucode_data.len = data_size; | |
98c92211 | 5455 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
5456 | |
5457 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 5458 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
5459 | |
5460 | /* Initialization instructions and data */ | |
90e759d1 TW |
5461 | if (init_size && init_data_size) { |
5462 | priv->ucode_init.len = init_size; | |
98c92211 | 5463 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
5464 | |
5465 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 5466 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
5467 | |
5468 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
5469 | goto err_pci_alloc; | |
5470 | } | |
b481de9c ZY |
5471 | |
5472 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
5473 | if (boot_size) { |
5474 | priv->ucode_boot.len = boot_size; | |
98c92211 | 5475 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 5476 | |
90e759d1 TW |
5477 | if (!priv->ucode_boot.v_addr) |
5478 | goto err_pci_alloc; | |
5479 | } | |
b481de9c ZY |
5480 | |
5481 | /* Copy images into buffers for card's bus-master reads ... */ | |
5482 | ||
5483 | /* Runtime instructions (first block of data in file) */ | |
5484 | src = &ucode->data[0]; | |
5485 | len = priv->ucode_code.len; | |
90e759d1 | 5486 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
5487 | memcpy(priv->ucode_code.v_addr, src, len); |
5488 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
5489 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
5490 | ||
5491 | /* Runtime data (2nd block) | |
bb8c093b | 5492 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
5493 | src = &ucode->data[inst_size]; |
5494 | len = priv->ucode_data.len; | |
90e759d1 | 5495 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
5496 | memcpy(priv->ucode_data.v_addr, src, len); |
5497 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
5498 | ||
5499 | /* Initialization instructions (3rd block) */ | |
5500 | if (init_size) { | |
5501 | src = &ucode->data[inst_size + data_size]; | |
5502 | len = priv->ucode_init.len; | |
90e759d1 TW |
5503 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
5504 | len); | |
b481de9c ZY |
5505 | memcpy(priv->ucode_init.v_addr, src, len); |
5506 | } | |
5507 | ||
5508 | /* Initialization data (4th block) */ | |
5509 | if (init_data_size) { | |
5510 | src = &ucode->data[inst_size + data_size + init_size]; | |
5511 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
5512 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
5513 | len); | |
b481de9c ZY |
5514 | memcpy(priv->ucode_init_data.v_addr, src, len); |
5515 | } | |
5516 | ||
5517 | /* Bootstrap instructions (5th block) */ | |
5518 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
5519 | len = priv->ucode_boot.len; | |
90e759d1 | 5520 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
5521 | memcpy(priv->ucode_boot.v_addr, src, len); |
5522 | ||
5523 | /* We have our copies now, allow OS release its copies */ | |
5524 | release_firmware(ucode_raw); | |
5525 | return 0; | |
5526 | ||
5527 | err_pci_alloc: | |
5528 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 5529 | ret = -ENOMEM; |
bb8c093b | 5530 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
5531 | |
5532 | err_release: | |
5533 | release_firmware(ucode_raw); | |
5534 | ||
5535 | error: | |
90e759d1 | 5536 | return ret; |
b481de9c ZY |
5537 | } |
5538 | ||
5539 | ||
5540 | /** | |
bb8c093b | 5541 | * iwl4965_set_ucode_ptrs - Set uCode address location |
b481de9c ZY |
5542 | * |
5543 | * Tell initialization uCode where to find runtime uCode. | |
5544 | * | |
5545 | * BSM registers initially contain pointers to initialization uCode. | |
5546 | * We need to replace them to load runtime uCode inst and data, | |
5547 | * and to save runtime data when powering down. | |
5548 | */ | |
c79dd5b5 | 5549 | static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv) |
b481de9c ZY |
5550 | { |
5551 | dma_addr_t pinst; | |
5552 | dma_addr_t pdata; | |
5553 | int rc = 0; | |
5554 | unsigned long flags; | |
5555 | ||
5556 | /* bits 35:4 for 4965 */ | |
5557 | pinst = priv->ucode_code.p_addr >> 4; | |
5558 | pdata = priv->ucode_data_backup.p_addr >> 4; | |
5559 | ||
5560 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 5561 | rc = iwl4965_grab_nic_access(priv); |
b481de9c ZY |
5562 | if (rc) { |
5563 | spin_unlock_irqrestore(&priv->lock, flags); | |
5564 | return rc; | |
5565 | } | |
5566 | ||
5567 | /* Tell bootstrap uCode where to find image to load */ | |
bb8c093b CH |
5568 | iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
5569 | iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
5570 | iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | |
b481de9c ZY |
5571 | priv->ucode_data.len); |
5572 | ||
5573 | /* Inst bytecount must be last to set up, bit 31 signals uCode | |
5574 | * that all new ptr/size info is in place */ | |
bb8c093b | 5575 | iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
b481de9c ZY |
5576 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
5577 | ||
bb8c093b | 5578 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5579 | |
5580 | spin_unlock_irqrestore(&priv->lock, flags); | |
5581 | ||
5582 | IWL_DEBUG_INFO("Runtime uCode pointers are set.\n"); | |
5583 | ||
5584 | return rc; | |
5585 | } | |
5586 | ||
5587 | /** | |
bb8c093b | 5588 | * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received |
b481de9c ZY |
5589 | * |
5590 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
5591 | * | |
5592 | * The 4965 "initialize" ALIVE reply contains calibration data for: | |
5593 | * Voltage, temperature, and MIMO tx gain correction, now stored in priv | |
5594 | * (3945 does not contain this data). | |
5595 | * | |
5596 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | |
5597 | */ | |
c79dd5b5 | 5598 | static void iwl4965_init_alive_start(struct iwl_priv *priv) |
b481de9c ZY |
5599 | { |
5600 | /* Check alive response for "valid" sign from uCode */ | |
5601 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | |
5602 | /* We had an error bringing up the hardware, so take it | |
5603 | * all the way back down so we can try again */ | |
5604 | IWL_DEBUG_INFO("Initialize Alive failed.\n"); | |
5605 | goto restart; | |
5606 | } | |
5607 | ||
5608 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
5609 | * This is a paranoid check, because we would not have gotten the | |
5610 | * "initialize" alive if code weren't properly loaded. */ | |
bb8c093b | 5611 | if (iwl4965_verify_ucode(priv)) { |
b481de9c ZY |
5612 | /* Runtime instruction load was bad; |
5613 | * take it all the way back down so we can try again */ | |
5614 | IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n"); | |
5615 | goto restart; | |
5616 | } | |
5617 | ||
5618 | /* Calculate temperature */ | |
5619 | priv->temperature = iwl4965_get_temperature(priv); | |
5620 | ||
5621 | /* Send pointers to protocol/runtime uCode image ... init code will | |
5622 | * load and launch runtime uCode, which will send us another "Alive" | |
5623 | * notification. */ | |
5624 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
bb8c093b | 5625 | if (iwl4965_set_ucode_ptrs(priv)) { |
b481de9c ZY |
5626 | /* Runtime instruction load won't happen; |
5627 | * take it all the way back down so we can try again */ | |
5628 | IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n"); | |
5629 | goto restart; | |
5630 | } | |
5631 | return; | |
5632 | ||
5633 | restart: | |
5634 | queue_work(priv->workqueue, &priv->restart); | |
5635 | } | |
5636 | ||
5637 | ||
5638 | /** | |
bb8c093b | 5639 | * iwl4965_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 5640 | * from protocol/runtime uCode (initialization uCode's |
bb8c093b | 5641 | * Alive gets handled by iwl4965_init_alive_start()). |
b481de9c | 5642 | */ |
c79dd5b5 | 5643 | static void iwl4965_alive_start(struct iwl_priv *priv) |
b481de9c ZY |
5644 | { |
5645 | int rc = 0; | |
5646 | ||
5647 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
5648 | ||
5649 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
5650 | /* We had an error bringing up the hardware, so take it | |
5651 | * all the way back down so we can try again */ | |
5652 | IWL_DEBUG_INFO("Alive failed.\n"); | |
5653 | goto restart; | |
5654 | } | |
5655 | ||
5656 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
5657 | * This is a paranoid check, because we would not have gotten the | |
5658 | * "runtime" alive if code weren't properly loaded. */ | |
bb8c093b | 5659 | if (iwl4965_verify_ucode(priv)) { |
b481de9c ZY |
5660 | /* Runtime instruction load was bad; |
5661 | * take it all the way back down so we can try again */ | |
5662 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
5663 | goto restart; | |
5664 | } | |
5665 | ||
bf85ea4f | 5666 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
5667 | |
5668 | rc = iwl4965_alive_notify(priv); | |
5669 | if (rc) { | |
5670 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", | |
5671 | rc); | |
5672 | goto restart; | |
5673 | } | |
5674 | ||
9fbab516 | 5675 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
5676 | set_bit(STATUS_ALIVE, &priv->status); |
5677 | ||
5678 | /* Clear out the uCode error bit if it is set */ | |
5679 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
5680 | ||
bb8c093b | 5681 | if (iwl4965_is_rfkill(priv)) |
b481de9c ZY |
5682 | return; |
5683 | ||
5a66926a | 5684 | ieee80211_start_queues(priv->hw); |
b481de9c ZY |
5685 | |
5686 | priv->active_rate = priv->rates_mask; | |
5687 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
5688 | ||
bb8c093b | 5689 | iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode)); |
b481de9c | 5690 | |
bb8c093b CH |
5691 | if (iwl4965_is_associated(priv)) { |
5692 | struct iwl4965_rxon_cmd *active_rxon = | |
5693 | (struct iwl4965_rxon_cmd *)(&priv->active_rxon); | |
b481de9c ZY |
5694 | |
5695 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
5696 | sizeof(priv->staging_rxon)); | |
5697 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5698 | } else { | |
5699 | /* Initialize our rx_config data */ | |
bb8c093b | 5700 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
5701 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
5702 | } | |
5703 | ||
9fbab516 | 5704 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 5705 | iwl4965_send_bt_config(priv); |
b481de9c ZY |
5706 | |
5707 | /* Configure the adapter for unassociated operation */ | |
bb8c093b | 5708 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5709 | |
5710 | /* At this point, the NIC is initialized and operational */ | |
5711 | priv->notif_missed_beacons = 0; | |
5712 | set_bit(STATUS_READY, &priv->status); | |
5713 | ||
5714 | iwl4965_rf_kill_ct_config(priv); | |
5a66926a | 5715 | |
b481de9c | 5716 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
5a66926a | 5717 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
5718 | |
5719 | if (priv->error_recovering) | |
bb8c093b | 5720 | iwl4965_error_recovery(priv); |
b481de9c ZY |
5721 | |
5722 | return; | |
5723 | ||
5724 | restart: | |
5725 | queue_work(priv->workqueue, &priv->restart); | |
5726 | } | |
5727 | ||
c79dd5b5 | 5728 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 5729 | |
c79dd5b5 | 5730 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
5731 | { |
5732 | unsigned long flags; | |
5733 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
5734 | struct ieee80211_conf *conf = NULL; | |
5735 | ||
5736 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
5737 | ||
5738 | conf = ieee80211_get_hw_conf(priv->hw); | |
5739 | ||
5740 | if (!exit_pending) | |
5741 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
5742 | ||
bf85ea4f | 5743 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
5744 | |
5745 | /* Unblock any waiting calls */ | |
5746 | wake_up_interruptible_all(&priv->wait_command_queue); | |
5747 | ||
b481de9c ZY |
5748 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
5749 | * exiting the module */ | |
5750 | if (!exit_pending) | |
5751 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
5752 | ||
5753 | /* stop and reset the on-board processor */ | |
bb8c093b | 5754 | iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
5755 | |
5756 | /* tell the device to stop sending interrupts */ | |
bb8c093b | 5757 | iwl4965_disable_interrupts(priv); |
b481de9c ZY |
5758 | |
5759 | if (priv->mac80211_registered) | |
5760 | ieee80211_stop_queues(priv->hw); | |
5761 | ||
bb8c093b | 5762 | /* If we have not previously called iwl4965_init() then |
b481de9c | 5763 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
bb8c093b | 5764 | if (!iwl4965_is_init(priv)) { |
b481de9c ZY |
5765 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
5766 | STATUS_RF_KILL_HW | | |
5767 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
5768 | STATUS_RF_KILL_SW | | |
9788864e RC |
5769 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
5770 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
5771 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
5772 | STATUS_IN_SUSPEND; | |
5773 | goto exit; | |
5774 | } | |
5775 | ||
5776 | /* ...otherwise clear out all the status bits but the RF Kill and | |
5777 | * SUSPEND bits and continue taking the NIC down. */ | |
5778 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
5779 | STATUS_RF_KILL_HW | | |
5780 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
5781 | STATUS_RF_KILL_SW | | |
9788864e RC |
5782 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
5783 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
5784 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
5785 | STATUS_IN_SUSPEND | | |
5786 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
5787 | STATUS_FW_ERROR; | |
5788 | ||
5789 | spin_lock_irqsave(&priv->lock, flags); | |
9fbab516 BC |
5790 | iwl4965_clear_bit(priv, CSR_GP_CNTRL, |
5791 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | |
b481de9c ZY |
5792 | spin_unlock_irqrestore(&priv->lock, flags); |
5793 | ||
bb8c093b CH |
5794 | iwl4965_hw_txq_ctx_stop(priv); |
5795 | iwl4965_hw_rxq_stop(priv); | |
b481de9c ZY |
5796 | |
5797 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b CH |
5798 | if (!iwl4965_grab_nic_access(priv)) { |
5799 | iwl4965_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 5800 | APMG_CLK_VAL_DMA_CLK_RQT); |
bb8c093b | 5801 | iwl4965_release_nic_access(priv); |
b481de9c ZY |
5802 | } |
5803 | spin_unlock_irqrestore(&priv->lock, flags); | |
5804 | ||
5805 | udelay(5); | |
5806 | ||
bb8c093b CH |
5807 | iwl4965_hw_nic_stop_master(priv); |
5808 | iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); | |
5809 | iwl4965_hw_nic_reset(priv); | |
b481de9c ZY |
5810 | |
5811 | exit: | |
bb8c093b | 5812 | memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
5813 | |
5814 | if (priv->ibss_beacon) | |
5815 | dev_kfree_skb(priv->ibss_beacon); | |
5816 | priv->ibss_beacon = NULL; | |
5817 | ||
5818 | /* clear out any free frames */ | |
bb8c093b | 5819 | iwl4965_clear_free_frames(priv); |
b481de9c ZY |
5820 | } |
5821 | ||
c79dd5b5 | 5822 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
5823 | { |
5824 | mutex_lock(&priv->mutex); | |
bb8c093b | 5825 | __iwl4965_down(priv); |
b481de9c | 5826 | mutex_unlock(&priv->mutex); |
b24d22b1 | 5827 | |
bb8c093b | 5828 | iwl4965_cancel_deferred_work(priv); |
b481de9c ZY |
5829 | } |
5830 | ||
5831 | #define MAX_HW_RESTARTS 5 | |
5832 | ||
c79dd5b5 | 5833 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c ZY |
5834 | { |
5835 | int rc, i; | |
b481de9c ZY |
5836 | |
5837 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
5838 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
5839 | return -EIO; | |
5840 | } | |
5841 | ||
5842 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { | |
5843 | IWL_WARNING("Radio disabled by SW RF kill (module " | |
5844 | "parameter)\n"); | |
e655b9f0 ZY |
5845 | return -ENODEV; |
5846 | } | |
5847 | ||
e903fbd4 RC |
5848 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
5849 | IWL_ERROR("ucode not available for device bringup\n"); | |
5850 | return -EIO; | |
5851 | } | |
5852 | ||
e655b9f0 ZY |
5853 | /* If platform's RF_KILL switch is NOT set to KILL */ |
5854 | if (iwl4965_read32(priv, CSR_GP_CNTRL) & | |
5855 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | |
5856 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
5857 | else { | |
5858 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
5859 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | |
5860 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); | |
5861 | return -ENODEV; | |
5862 | } | |
b481de9c ZY |
5863 | } |
5864 | ||
bb8c093b | 5865 | iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 5866 | |
bb8c093b | 5867 | rc = iwl4965_hw_nic_init(priv); |
b481de9c ZY |
5868 | if (rc) { |
5869 | IWL_ERROR("Unable to int nic\n"); | |
5870 | return rc; | |
5871 | } | |
5872 | ||
5873 | /* make sure rfkill handshake bits are cleared */ | |
bb8c093b CH |
5874 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5875 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
5876 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
5877 | ||
5878 | /* clear (again), then enable host interrupts */ | |
bb8c093b CH |
5879 | iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); |
5880 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
5881 | |
5882 | /* really make sure rfkill handshake bits are cleared */ | |
bb8c093b CH |
5883 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5884 | iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
5885 | |
5886 | /* Copy original ucode data image from disk into backup cache. | |
5887 | * This will be used to initialize the on-board processor's | |
5888 | * data SRAM for a clean start when the runtime program first loads. */ | |
5889 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 5890 | priv->ucode_data.len); |
b481de9c | 5891 | |
e655b9f0 ZY |
5892 | /* We return success when we resume from suspend and rf_kill is on. */ |
5893 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
b481de9c | 5894 | return 0; |
b481de9c ZY |
5895 | |
5896 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
5897 | ||
bf85ea4f | 5898 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
5899 | |
5900 | /* load bootstrap state machine, | |
5901 | * load bootstrap program into processor's memory, | |
5902 | * prepare to load the "initialize" uCode */ | |
bb8c093b | 5903 | rc = iwl4965_load_bsm(priv); |
b481de9c ZY |
5904 | |
5905 | if (rc) { | |
5906 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc); | |
5907 | continue; | |
5908 | } | |
5909 | ||
5910 | /* start card; "initialize" will load runtime ucode */ | |
bb8c093b | 5911 | iwl4965_nic_start(priv); |
b481de9c | 5912 | |
b481de9c ZY |
5913 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
5914 | ||
5915 | return 0; | |
5916 | } | |
5917 | ||
5918 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 5919 | __iwl4965_down(priv); |
b481de9c ZY |
5920 | |
5921 | /* tried to restart and config the device for as long as our | |
5922 | * patience could withstand */ | |
5923 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
5924 | return -EIO; | |
5925 | } | |
5926 | ||
5927 | ||
5928 | /***************************************************************************** | |
5929 | * | |
5930 | * Workqueue callbacks | |
5931 | * | |
5932 | *****************************************************************************/ | |
5933 | ||
bb8c093b | 5934 | static void iwl4965_bg_init_alive_start(struct work_struct *data) |
b481de9c | 5935 | { |
c79dd5b5 TW |
5936 | struct iwl_priv *priv = |
5937 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
5938 | |
5939 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5940 | return; | |
5941 | ||
5942 | mutex_lock(&priv->mutex); | |
bb8c093b | 5943 | iwl4965_init_alive_start(priv); |
b481de9c ZY |
5944 | mutex_unlock(&priv->mutex); |
5945 | } | |
5946 | ||
bb8c093b | 5947 | static void iwl4965_bg_alive_start(struct work_struct *data) |
b481de9c | 5948 | { |
c79dd5b5 TW |
5949 | struct iwl_priv *priv = |
5950 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
5951 | |
5952 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5953 | return; | |
5954 | ||
5955 | mutex_lock(&priv->mutex); | |
bb8c093b | 5956 | iwl4965_alive_start(priv); |
b481de9c ZY |
5957 | mutex_unlock(&priv->mutex); |
5958 | } | |
5959 | ||
bb8c093b | 5960 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 5961 | { |
c79dd5b5 | 5962 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
5963 | |
5964 | wake_up_interruptible(&priv->wait_command_queue); | |
5965 | ||
5966 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5967 | return; | |
5968 | ||
5969 | mutex_lock(&priv->mutex); | |
5970 | ||
bb8c093b | 5971 | if (!iwl4965_is_rfkill(priv)) { |
b481de9c ZY |
5972 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL, |
5973 | "HW and/or SW RF Kill no longer active, restarting " | |
5974 | "device\n"); | |
5975 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5976 | queue_work(priv->workqueue, &priv->restart); | |
5977 | } else { | |
5978 | ||
5979 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
5980 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
5981 | "disabled by SW switch\n"); | |
5982 | else | |
5983 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
5984 | "Kill switch must be turned off for " | |
5985 | "wireless networking to work.\n"); | |
5986 | } | |
5987 | mutex_unlock(&priv->mutex); | |
5988 | } | |
5989 | ||
5990 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) | |
5991 | ||
bb8c093b | 5992 | static void iwl4965_bg_scan_check(struct work_struct *data) |
b481de9c | 5993 | { |
c79dd5b5 TW |
5994 | struct iwl_priv *priv = |
5995 | container_of(data, struct iwl_priv, scan_check.work); | |
b481de9c ZY |
5996 | |
5997 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5998 | return; | |
5999 | ||
6000 | mutex_lock(&priv->mutex); | |
6001 | if (test_bit(STATUS_SCANNING, &priv->status) || | |
6002 | test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
6003 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, | |
6004 | "Scan completion watchdog resetting adapter (%dms)\n", | |
6005 | jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG)); | |
052c4b9f | 6006 | |
b481de9c | 6007 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) |
bb8c093b | 6008 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
6009 | } |
6010 | mutex_unlock(&priv->mutex); | |
6011 | } | |
6012 | ||
bb8c093b | 6013 | static void iwl4965_bg_request_scan(struct work_struct *data) |
b481de9c | 6014 | { |
c79dd5b5 TW |
6015 | struct iwl_priv *priv = |
6016 | container_of(data, struct iwl_priv, request_scan); | |
857485c0 | 6017 | struct iwl_host_cmd cmd = { |
b481de9c | 6018 | .id = REPLY_SCAN_CMD, |
bb8c093b | 6019 | .len = sizeof(struct iwl4965_scan_cmd), |
b481de9c ZY |
6020 | .meta.flags = CMD_SIZE_HUGE, |
6021 | }; | |
bb8c093b | 6022 | struct iwl4965_scan_cmd *scan; |
b481de9c | 6023 | struct ieee80211_conf *conf = NULL; |
78330fdd | 6024 | u16 cmd_len; |
8318d78a | 6025 | enum ieee80211_band band; |
78330fdd | 6026 | u8 direct_mask; |
857485c0 | 6027 | int ret = 0; |
b481de9c ZY |
6028 | |
6029 | conf = ieee80211_get_hw_conf(priv->hw); | |
6030 | ||
6031 | mutex_lock(&priv->mutex); | |
6032 | ||
bb8c093b | 6033 | if (!iwl4965_is_ready(priv)) { |
b481de9c ZY |
6034 | IWL_WARNING("request scan called when driver not ready.\n"); |
6035 | goto done; | |
6036 | } | |
6037 | ||
6038 | /* Make sure the scan wasn't cancelled before this queued work | |
6039 | * was given the chance to run... */ | |
6040 | if (!test_bit(STATUS_SCANNING, &priv->status)) | |
6041 | goto done; | |
6042 | ||
6043 | /* This should never be called or scheduled if there is currently | |
6044 | * a scan active in the hardware. */ | |
6045 | if (test_bit(STATUS_SCAN_HW, &priv->status)) { | |
6046 | IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. " | |
6047 | "Ignoring second request.\n"); | |
857485c0 | 6048 | ret = -EIO; |
b481de9c ZY |
6049 | goto done; |
6050 | } | |
6051 | ||
6052 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
6053 | IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n"); | |
6054 | goto done; | |
6055 | } | |
6056 | ||
6057 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
6058 | IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n"); | |
6059 | goto done; | |
6060 | } | |
6061 | ||
bb8c093b | 6062 | if (iwl4965_is_rfkill(priv)) { |
b481de9c ZY |
6063 | IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n"); |
6064 | goto done; | |
6065 | } | |
6066 | ||
6067 | if (!test_bit(STATUS_READY, &priv->status)) { | |
6068 | IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n"); | |
6069 | goto done; | |
6070 | } | |
6071 | ||
6072 | if (!priv->scan_bands) { | |
6073 | IWL_DEBUG_HC("Aborting scan due to no requested bands\n"); | |
6074 | goto done; | |
6075 | } | |
6076 | ||
6077 | if (!priv->scan) { | |
bb8c093b | 6078 | priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) + |
b481de9c ZY |
6079 | IWL_MAX_SCAN_SIZE, GFP_KERNEL); |
6080 | if (!priv->scan) { | |
857485c0 | 6081 | ret = -ENOMEM; |
b481de9c ZY |
6082 | goto done; |
6083 | } | |
6084 | } | |
6085 | scan = priv->scan; | |
bb8c093b | 6086 | memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE); |
b481de9c ZY |
6087 | |
6088 | scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; | |
6089 | scan->quiet_time = IWL_ACTIVE_QUIET_TIME; | |
6090 | ||
bb8c093b | 6091 | if (iwl4965_is_associated(priv)) { |
b481de9c ZY |
6092 | u16 interval = 0; |
6093 | u32 extra; | |
6094 | u32 suspend_time = 100; | |
6095 | u32 scan_suspend_time = 100; | |
6096 | unsigned long flags; | |
6097 | ||
6098 | IWL_DEBUG_INFO("Scanning while associated...\n"); | |
6099 | ||
6100 | spin_lock_irqsave(&priv->lock, flags); | |
6101 | interval = priv->beacon_int; | |
6102 | spin_unlock_irqrestore(&priv->lock, flags); | |
6103 | ||
6104 | scan->suspend_time = 0; | |
052c4b9f | 6105 | scan->max_out_time = cpu_to_le32(200 * 1024); |
b481de9c ZY |
6106 | if (!interval) |
6107 | interval = suspend_time; | |
6108 | ||
6109 | extra = (suspend_time / interval) << 22; | |
6110 | scan_suspend_time = (extra | | |
6111 | ((suspend_time % interval) * 1024)); | |
6112 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | |
6113 | IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n", | |
6114 | scan_suspend_time, interval); | |
6115 | } | |
6116 | ||
6117 | /* We should add the ability for user to lock to PASSIVE ONLY */ | |
6118 | if (priv->one_direct_scan) { | |
6119 | IWL_DEBUG_SCAN | |
6120 | ("Kicking off one direct scan for '%s'\n", | |
bb8c093b | 6121 | iwl4965_escape_essid(priv->direct_ssid, |
b481de9c ZY |
6122 | priv->direct_ssid_len)); |
6123 | scan->direct_scan[0].id = WLAN_EID_SSID; | |
6124 | scan->direct_scan[0].len = priv->direct_ssid_len; | |
6125 | memcpy(scan->direct_scan[0].ssid, | |
6126 | priv->direct_ssid, priv->direct_ssid_len); | |
6127 | direct_mask = 1; | |
bb8c093b | 6128 | } else if (!iwl4965_is_associated(priv) && priv->essid_len) { |
b481de9c ZY |
6129 | scan->direct_scan[0].id = WLAN_EID_SSID; |
6130 | scan->direct_scan[0].len = priv->essid_len; | |
6131 | memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len); | |
6132 | direct_mask = 1; | |
857485c0 | 6133 | } else { |
b481de9c | 6134 | direct_mask = 0; |
857485c0 | 6135 | } |
b481de9c | 6136 | |
b481de9c ZY |
6137 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; |
6138 | scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id; | |
6139 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
6140 | ||
b481de9c ZY |
6141 | |
6142 | switch (priv->scan_bands) { | |
6143 | case 2: | |
6144 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | |
6145 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 6146 | iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP, |
b481de9c ZY |
6147 | RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK); |
6148 | ||
6149 | scan->good_CRC_th = 0; | |
8318d78a | 6150 | band = IEEE80211_BAND_2GHZ; |
b481de9c ZY |
6151 | break; |
6152 | ||
6153 | case 1: | |
6154 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 6155 | iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP, |
b481de9c ZY |
6156 | RATE_MCS_ANT_B_MSK); |
6157 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | |
8318d78a | 6158 | band = IEEE80211_BAND_5GHZ; |
b481de9c ZY |
6159 | break; |
6160 | ||
6161 | default: | |
6162 | IWL_WARNING("Invalid scan band count\n"); | |
6163 | goto done; | |
6164 | } | |
6165 | ||
78330fdd TW |
6166 | /* We don't build a direct scan probe request; the uCode will do |
6167 | * that based on the direct_mask added to each channel entry */ | |
6168 | cmd_len = iwl4965_fill_probe_req(priv, band, | |
6169 | (struct ieee80211_mgmt *)scan->data, | |
6170 | IWL_MAX_SCAN_SIZE - sizeof(*scan), 0); | |
6171 | ||
6172 | scan->tx_cmd.len = cpu_to_le16(cmd_len); | |
b481de9c ZY |
6173 | /* select Rx chains */ |
6174 | ||
6175 | /* Force use of chains B and C (0x6) for scan Rx. | |
6176 | * Avoid A (0x1) because of its off-channel reception on A-band. | |
6177 | * MIMO is not used here, but value is required to make uCode happy. */ | |
6178 | scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK | | |
6179 | cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) | | |
6180 | (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) | | |
6181 | (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS)); | |
6182 | ||
6183 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) | |
6184 | scan->filter_flags = RXON_FILTER_PROMISC_MSK; | |
6185 | ||
26c0f03f | 6186 | if (direct_mask) { |
b481de9c ZY |
6187 | IWL_DEBUG_SCAN |
6188 | ("Initiating direct scan for %s.\n", | |
bb8c093b | 6189 | iwl4965_escape_essid(priv->essid, priv->essid_len)); |
26c0f03f RC |
6190 | scan->channel_count = |
6191 | iwl4965_get_channels_for_scan( | |
6192 | priv, band, 1, /* active */ | |
6193 | direct_mask, | |
6194 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
6195 | } else { | |
b481de9c | 6196 | IWL_DEBUG_SCAN("Initiating indirect scan.\n"); |
26c0f03f RC |
6197 | scan->channel_count = |
6198 | iwl4965_get_channels_for_scan( | |
6199 | priv, band, 0, /* passive */ | |
6200 | direct_mask, | |
6201 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
6202 | } | |
b481de9c ZY |
6203 | |
6204 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + | |
bb8c093b | 6205 | scan->channel_count * sizeof(struct iwl4965_scan_channel); |
b481de9c ZY |
6206 | cmd.data = scan; |
6207 | scan->len = cpu_to_le16(cmd.len); | |
6208 | ||
6209 | set_bit(STATUS_SCAN_HW, &priv->status); | |
857485c0 TW |
6210 | ret = iwl_send_cmd_sync(priv, &cmd); |
6211 | if (ret) | |
b481de9c ZY |
6212 | goto done; |
6213 | ||
6214 | queue_delayed_work(priv->workqueue, &priv->scan_check, | |
6215 | IWL_SCAN_CHECK_WATCHDOG); | |
6216 | ||
6217 | mutex_unlock(&priv->mutex); | |
6218 | return; | |
6219 | ||
6220 | done: | |
01ebd063 | 6221 | /* inform mac80211 scan aborted */ |
b481de9c ZY |
6222 | queue_work(priv->workqueue, &priv->scan_completed); |
6223 | mutex_unlock(&priv->mutex); | |
6224 | } | |
6225 | ||
bb8c093b | 6226 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 6227 | { |
c79dd5b5 | 6228 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
6229 | |
6230 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6231 | return; | |
6232 | ||
6233 | mutex_lock(&priv->mutex); | |
bb8c093b | 6234 | __iwl4965_up(priv); |
b481de9c ZY |
6235 | mutex_unlock(&priv->mutex); |
6236 | } | |
6237 | ||
bb8c093b | 6238 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 6239 | { |
c79dd5b5 | 6240 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
6241 | |
6242 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6243 | return; | |
6244 | ||
bb8c093b | 6245 | iwl4965_down(priv); |
b481de9c ZY |
6246 | queue_work(priv->workqueue, &priv->up); |
6247 | } | |
6248 | ||
bb8c093b | 6249 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 6250 | { |
c79dd5b5 TW |
6251 | struct iwl_priv *priv = |
6252 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
6253 | |
6254 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6255 | return; | |
6256 | ||
6257 | mutex_lock(&priv->mutex); | |
bb8c093b | 6258 | iwl4965_rx_replenish(priv); |
b481de9c ZY |
6259 | mutex_unlock(&priv->mutex); |
6260 | } | |
6261 | ||
7878a5a4 MA |
6262 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
6263 | ||
bb8c093b | 6264 | static void iwl4965_bg_post_associate(struct work_struct *data) |
b481de9c | 6265 | { |
c79dd5b5 | 6266 | struct iwl_priv *priv = container_of(data, struct iwl_priv, |
b481de9c | 6267 | post_associate.work); |
b481de9c | 6268 | struct ieee80211_conf *conf = NULL; |
857485c0 | 6269 | int ret = 0; |
0795af57 | 6270 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
6271 | |
6272 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
6273 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
6274 | return; | |
6275 | } | |
6276 | ||
0795af57 JP |
6277 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
6278 | priv->assoc_id, | |
6279 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
6280 | |
6281 | ||
6282 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6283 | return; | |
6284 | ||
6285 | mutex_lock(&priv->mutex); | |
6286 | ||
32bfd35d | 6287 | if (!priv->vif || !priv->is_open) { |
948c171c MA |
6288 | mutex_unlock(&priv->mutex); |
6289 | return; | |
6290 | } | |
bb8c093b | 6291 | iwl4965_scan_cancel_timeout(priv, 200); |
052c4b9f | 6292 | |
b481de9c ZY |
6293 | conf = ieee80211_get_hw_conf(priv->hw); |
6294 | ||
6295 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 6296 | iwl4965_commit_rxon(priv); |
b481de9c | 6297 | |
bb8c093b CH |
6298 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
6299 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 6300 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 6301 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 6302 | if (ret) |
b481de9c ZY |
6303 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
6304 | "Attempting to continue.\n"); | |
6305 | ||
6306 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
6307 | ||
c8b0e6e1 | 6308 | #ifdef CONFIG_IWL4965_HT |
fd105e79 RR |
6309 | if (priv->current_ht_config.is_ht) |
6310 | iwl4965_set_rxon_ht(priv, &priv->current_ht_config); | |
c8b0e6e1 | 6311 | #endif /* CONFIG_IWL4965_HT*/ |
b481de9c ZY |
6312 | iwl4965_set_rxon_chain(priv); |
6313 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
6314 | ||
6315 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
6316 | priv->assoc_id, priv->beacon_int); | |
6317 | ||
6318 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
6319 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
6320 | else | |
6321 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
6322 | ||
6323 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
6324 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
6325 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
6326 | else | |
6327 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
6328 | ||
6329 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
6330 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
6331 | ||
6332 | } | |
6333 | ||
bb8c093b | 6334 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6335 | |
6336 | switch (priv->iw_mode) { | |
6337 | case IEEE80211_IF_TYPE_STA: | |
bb8c093b | 6338 | iwl4965_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
6339 | break; |
6340 | ||
6341 | case IEEE80211_IF_TYPE_IBSS: | |
6342 | ||
6343 | /* clear out the station table */ | |
bf85ea4f | 6344 | iwlcore_clear_stations_table(priv); |
b481de9c | 6345 | |
bb8c093b CH |
6346 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
6347 | iwl4965_rxon_add_station(priv, priv->bssid, 0); | |
6348 | iwl4965_rate_scale_init(priv->hw, IWL_STA_ID); | |
6349 | iwl4965_send_beacon_cmd(priv); | |
b481de9c ZY |
6350 | |
6351 | break; | |
6352 | ||
6353 | default: | |
6354 | IWL_ERROR("%s Should not be called in %d mode\n", | |
6355 | __FUNCTION__, priv->iw_mode); | |
6356 | break; | |
6357 | } | |
6358 | ||
bb8c093b | 6359 | iwl4965_sequence_reset(priv); |
b481de9c | 6360 | |
c8b0e6e1 | 6361 | #ifdef CONFIG_IWL4965_SENSITIVITY |
b481de9c ZY |
6362 | /* Enable Rx differential gain and sensitivity calibrations */ |
6363 | iwl4965_chain_noise_reset(priv); | |
6364 | priv->start_calib = 1; | |
c8b0e6e1 | 6365 | #endif /* CONFIG_IWL4965_SENSITIVITY */ |
b481de9c ZY |
6366 | |
6367 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
6368 | priv->assoc_station_added = 1; | |
6369 | ||
bb8c093b | 6370 | iwl4965_activate_qos(priv, 0); |
292ae174 | 6371 | |
7878a5a4 MA |
6372 | /* we have just associated, don't start scan too early */ |
6373 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
b481de9c ZY |
6374 | mutex_unlock(&priv->mutex); |
6375 | } | |
6376 | ||
bb8c093b | 6377 | static void iwl4965_bg_abort_scan(struct work_struct *work) |
b481de9c | 6378 | { |
c79dd5b5 | 6379 | struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan); |
b481de9c | 6380 | |
bb8c093b | 6381 | if (!iwl4965_is_ready(priv)) |
b481de9c ZY |
6382 | return; |
6383 | ||
6384 | mutex_lock(&priv->mutex); | |
6385 | ||
6386 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
bb8c093b | 6387 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
6388 | |
6389 | mutex_unlock(&priv->mutex); | |
6390 | } | |
6391 | ||
76bb77e0 ZY |
6392 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
6393 | ||
bb8c093b | 6394 | static void iwl4965_bg_scan_completed(struct work_struct *work) |
b481de9c | 6395 | { |
c79dd5b5 TW |
6396 | struct iwl_priv *priv = |
6397 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c ZY |
6398 | |
6399 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n"); | |
6400 | ||
6401 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
6402 | return; | |
6403 | ||
a0646470 ZY |
6404 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
6405 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 6406 | |
b481de9c ZY |
6407 | ieee80211_scan_completed(priv->hw); |
6408 | ||
6409 | /* Since setting the TXPOWER may have been deferred while | |
6410 | * performing the scan, fire one off */ | |
6411 | mutex_lock(&priv->mutex); | |
bb8c093b | 6412 | iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
6413 | mutex_unlock(&priv->mutex); |
6414 | } | |
6415 | ||
6416 | /***************************************************************************** | |
6417 | * | |
6418 | * mac80211 entry point functions | |
6419 | * | |
6420 | *****************************************************************************/ | |
6421 | ||
5a66926a ZY |
6422 | #define UCODE_READY_TIMEOUT (2 * HZ) |
6423 | ||
bb8c093b | 6424 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 6425 | { |
c79dd5b5 | 6426 | struct iwl_priv *priv = hw->priv; |
5a66926a | 6427 | int ret; |
b481de9c ZY |
6428 | |
6429 | IWL_DEBUG_MAC80211("enter\n"); | |
6430 | ||
5a66926a ZY |
6431 | if (pci_enable_device(priv->pci_dev)) { |
6432 | IWL_ERROR("Fail to pci_enable_device\n"); | |
6433 | return -ENODEV; | |
6434 | } | |
6435 | pci_restore_state(priv->pci_dev); | |
6436 | pci_enable_msi(priv->pci_dev); | |
6437 | ||
6438 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, | |
6439 | DRV_NAME, priv); | |
6440 | if (ret) { | |
6441 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
6442 | goto out_disable_msi; | |
6443 | } | |
6444 | ||
b481de9c ZY |
6445 | /* we should be verifying the device is ready to be opened */ |
6446 | mutex_lock(&priv->mutex); | |
6447 | ||
5a66926a ZY |
6448 | memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd)); |
6449 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... | |
6450 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 6451 | |
5a66926a ZY |
6452 | if (!priv->ucode_code.len) { |
6453 | ret = iwl4965_read_ucode(priv); | |
6454 | if (ret) { | |
6455 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
6456 | mutex_unlock(&priv->mutex); | |
6457 | goto out_release_irq; | |
6458 | } | |
6459 | } | |
b481de9c | 6460 | |
e655b9f0 | 6461 | ret = __iwl4965_up(priv); |
5a66926a | 6462 | |
b481de9c | 6463 | mutex_unlock(&priv->mutex); |
5a66926a | 6464 | |
e655b9f0 ZY |
6465 | if (ret) |
6466 | goto out_release_irq; | |
6467 | ||
6468 | IWL_DEBUG_INFO("Start UP work done.\n"); | |
6469 | ||
6470 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
6471 | return 0; | |
6472 | ||
5a66926a ZY |
6473 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from |
6474 | * mac80211 will not be run successfully. */ | |
6475 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
6476 | test_bit(STATUS_READY, &priv->status), | |
6477 | UCODE_READY_TIMEOUT); | |
6478 | if (!ret) { | |
6479 | if (!test_bit(STATUS_READY, &priv->status)) { | |
6480 | IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n", | |
6481 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
6482 | ret = -ETIMEDOUT; | |
6483 | goto out_release_irq; | |
6484 | } | |
6485 | } | |
6486 | ||
e655b9f0 | 6487 | priv->is_open = 1; |
b481de9c ZY |
6488 | IWL_DEBUG_MAC80211("leave\n"); |
6489 | return 0; | |
5a66926a ZY |
6490 | |
6491 | out_release_irq: | |
6492 | free_irq(priv->pci_dev->irq, priv); | |
6493 | out_disable_msi: | |
6494 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
6495 | pci_disable_device(priv->pci_dev); |
6496 | priv->is_open = 0; | |
6497 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 6498 | return ret; |
b481de9c ZY |
6499 | } |
6500 | ||
bb8c093b | 6501 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 6502 | { |
c79dd5b5 | 6503 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6504 | |
6505 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 6506 | |
e655b9f0 ZY |
6507 | if (!priv->is_open) { |
6508 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
6509 | return; | |
6510 | } | |
6511 | ||
b481de9c | 6512 | priv->is_open = 0; |
5a66926a ZY |
6513 | |
6514 | if (iwl4965_is_ready_rf(priv)) { | |
e655b9f0 ZY |
6515 | /* stop mac, cancel any scan request and clear |
6516 | * RXON_FILTER_ASSOC_MSK BIT | |
6517 | */ | |
5a66926a ZY |
6518 | mutex_lock(&priv->mutex); |
6519 | iwl4965_scan_cancel_timeout(priv, 100); | |
6520 | cancel_delayed_work(&priv->post_associate); | |
fde3571f | 6521 | mutex_unlock(&priv->mutex); |
fde3571f MA |
6522 | } |
6523 | ||
5a66926a ZY |
6524 | iwl4965_down(priv); |
6525 | ||
6526 | flush_workqueue(priv->workqueue); | |
6527 | free_irq(priv->pci_dev->irq, priv); | |
6528 | pci_disable_msi(priv->pci_dev); | |
6529 | pci_save_state(priv->pci_dev); | |
6530 | pci_disable_device(priv->pci_dev); | |
948c171c | 6531 | |
b481de9c | 6532 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
6533 | } |
6534 | ||
bb8c093b | 6535 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
6536 | struct ieee80211_tx_control *ctl) |
6537 | { | |
c79dd5b5 | 6538 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6539 | |
6540 | IWL_DEBUG_MAC80211("enter\n"); | |
6541 | ||
6542 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
6543 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
6544 | return -1; | |
6545 | } | |
6546 | ||
6547 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
8318d78a | 6548 | ctl->tx_rate->bitrate); |
b481de9c | 6549 | |
bb8c093b | 6550 | if (iwl4965_tx_skb(priv, skb, ctl)) |
b481de9c ZY |
6551 | dev_kfree_skb_any(skb); |
6552 | ||
6553 | IWL_DEBUG_MAC80211("leave\n"); | |
6554 | return 0; | |
6555 | } | |
6556 | ||
bb8c093b | 6557 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
6558 | struct ieee80211_if_init_conf *conf) |
6559 | { | |
c79dd5b5 | 6560 | struct iwl_priv *priv = hw->priv; |
b481de9c | 6561 | unsigned long flags; |
0795af57 | 6562 | DECLARE_MAC_BUF(mac); |
b481de9c | 6563 | |
32bfd35d | 6564 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 6565 | |
32bfd35d JB |
6566 | if (priv->vif) { |
6567 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 6568 | return -EOPNOTSUPP; |
b481de9c ZY |
6569 | } |
6570 | ||
6571 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 6572 | priv->vif = conf->vif; |
b481de9c ZY |
6573 | |
6574 | spin_unlock_irqrestore(&priv->lock, flags); | |
6575 | ||
6576 | mutex_lock(&priv->mutex); | |
864792e3 TW |
6577 | |
6578 | if (conf->mac_addr) { | |
6579 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
6580 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
6581 | } | |
b481de9c | 6582 | |
5a66926a ZY |
6583 | if (iwl4965_is_ready(priv)) |
6584 | iwl4965_set_mode(priv, conf->type); | |
6585 | ||
b481de9c ZY |
6586 | mutex_unlock(&priv->mutex); |
6587 | ||
5a66926a | 6588 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
6589 | return 0; |
6590 | } | |
6591 | ||
6592 | /** | |
bb8c093b | 6593 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
6594 | * |
6595 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
6596 | * be set inappropriately and the driver currently sets the hardware up to | |
6597 | * use it whenever needed. | |
6598 | */ | |
bb8c093b | 6599 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 6600 | { |
c79dd5b5 | 6601 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 6602 | const struct iwl_channel_info *ch_info; |
b481de9c | 6603 | unsigned long flags; |
76bb77e0 | 6604 | int ret = 0; |
b481de9c ZY |
6605 | |
6606 | mutex_lock(&priv->mutex); | |
8318d78a | 6607 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 6608 | |
12342c47 ZY |
6609 | priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
6610 | ||
bb8c093b | 6611 | if (!iwl4965_is_ready(priv)) { |
b481de9c | 6612 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
6613 | ret = -EIO; |
6614 | goto out; | |
b481de9c ZY |
6615 | } |
6616 | ||
00acbc91 | 6617 | if (unlikely(!iwl4965_mod_params.disable_hw_scan && |
b481de9c | 6618 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
6619 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
6620 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 6621 | mutex_unlock(&priv->mutex); |
a0646470 | 6622 | return 0; |
b481de9c ZY |
6623 | } |
6624 | ||
6625 | spin_lock_irqsave(&priv->lock, flags); | |
6626 | ||
8622e705 | 6627 | ch_info = iwl_get_channel_info(priv, conf->channel->band, |
8318d78a | 6628 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 6629 | if (!is_channel_valid(ch_info)) { |
b481de9c ZY |
6630 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
6631 | spin_unlock_irqrestore(&priv->lock, flags); | |
76bb77e0 ZY |
6632 | ret = -EINVAL; |
6633 | goto out; | |
b481de9c ZY |
6634 | } |
6635 | ||
c8b0e6e1 | 6636 | #ifdef CONFIG_IWL4965_HT |
78330fdd | 6637 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
6638 | * from any ht related info since 2.4 does not |
6639 | * support ht */ | |
78330fdd | 6640 | if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value) |
b481de9c ZY |
6641 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
6642 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
6643 | #endif | |
6644 | ) | |
6645 | priv->staging_rxon.flags = 0; | |
c8b0e6e1 | 6646 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 6647 | |
bf85ea4f | 6648 | iwlcore_set_rxon_channel(priv, conf->channel->band, |
8318d78a | 6649 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 6650 | |
8318d78a | 6651 | iwl4965_set_flags_for_phymode(priv, conf->channel->band); |
b481de9c ZY |
6652 | |
6653 | /* The list of supported rates and rate mask can be different | |
8318d78a | 6654 | * for each band; since the band may have changed, reset |
b481de9c | 6655 | * the rate mask to what mac80211 lists */ |
bb8c093b | 6656 | iwl4965_set_rate(priv); |
b481de9c ZY |
6657 | |
6658 | spin_unlock_irqrestore(&priv->lock, flags); | |
6659 | ||
6660 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
6661 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 6662 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 6663 | goto out; |
b481de9c ZY |
6664 | } |
6665 | #endif | |
6666 | ||
bb8c093b | 6667 | iwl4965_radio_kill_sw(priv, !conf->radio_enabled); |
b481de9c ZY |
6668 | |
6669 | if (!conf->radio_enabled) { | |
6670 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 6671 | goto out; |
b481de9c ZY |
6672 | } |
6673 | ||
bb8c093b | 6674 | if (iwl4965_is_rfkill(priv)) { |
b481de9c | 6675 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
6676 | ret = -EIO; |
6677 | goto out; | |
b481de9c ZY |
6678 | } |
6679 | ||
bb8c093b | 6680 | iwl4965_set_rate(priv); |
b481de9c ZY |
6681 | |
6682 | if (memcmp(&priv->active_rxon, | |
6683 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 6684 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6685 | else |
6686 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
6687 | ||
6688 | IWL_DEBUG_MAC80211("leave\n"); | |
6689 | ||
a0646470 ZY |
6690 | out: |
6691 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 6692 | mutex_unlock(&priv->mutex); |
76bb77e0 | 6693 | return ret; |
b481de9c ZY |
6694 | } |
6695 | ||
c79dd5b5 | 6696 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 6697 | { |
857485c0 | 6698 | int ret = 0; |
b481de9c | 6699 | |
d986bcd1 | 6700 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
6701 | return; |
6702 | ||
6703 | /* The following should be done only at AP bring up */ | |
6704 | if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) { | |
6705 | ||
6706 | /* RXON - unassoc (to set timing command) */ | |
6707 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 6708 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6709 | |
6710 | /* RXON Timing */ | |
bb8c093b CH |
6711 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
6712 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 6713 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 6714 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 6715 | if (ret) |
b481de9c ZY |
6716 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
6717 | "Attempting to continue.\n"); | |
6718 | ||
6719 | iwl4965_set_rxon_chain(priv); | |
6720 | ||
6721 | /* FIXME: what should be the assoc_id for AP? */ | |
6722 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
6723 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
6724 | priv->staging_rxon.flags |= | |
6725 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
6726 | else | |
6727 | priv->staging_rxon.flags &= | |
6728 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
6729 | ||
6730 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
6731 | if (priv->assoc_capability & | |
6732 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
6733 | priv->staging_rxon.flags |= | |
6734 | RXON_FLG_SHORT_SLOT_MSK; | |
6735 | else | |
6736 | priv->staging_rxon.flags &= | |
6737 | ~RXON_FLG_SHORT_SLOT_MSK; | |
6738 | ||
6739 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
6740 | priv->staging_rxon.flags &= | |
6741 | ~RXON_FLG_SHORT_SLOT_MSK; | |
6742 | } | |
6743 | /* restore RXON assoc */ | |
6744 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 6745 | iwl4965_commit_rxon(priv); |
bb8c093b | 6746 | iwl4965_activate_qos(priv, 1); |
bb8c093b | 6747 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
e1493deb | 6748 | } |
bb8c093b | 6749 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
6750 | |
6751 | /* FIXME - we need to add code here to detect a totally new | |
6752 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
6753 | * clear sta table, add BCAST sta... */ | |
6754 | } | |
6755 | ||
32bfd35d JB |
6756 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
6757 | struct ieee80211_vif *vif, | |
b481de9c ZY |
6758 | struct ieee80211_if_conf *conf) |
6759 | { | |
c79dd5b5 | 6760 | struct iwl_priv *priv = hw->priv; |
0795af57 | 6761 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
6762 | unsigned long flags; |
6763 | int rc; | |
6764 | ||
6765 | if (conf == NULL) | |
6766 | return -EIO; | |
6767 | ||
b716bb91 EG |
6768 | if (priv->vif != vif) { |
6769 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
6770 | mutex_unlock(&priv->mutex); | |
6771 | return 0; | |
6772 | } | |
6773 | ||
b481de9c ZY |
6774 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
6775 | (!conf->beacon || !conf->ssid_len)) { | |
6776 | IWL_DEBUG_MAC80211 | |
6777 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
6778 | return 0; | |
6779 | } | |
6780 | ||
5a66926a ZY |
6781 | if (!iwl4965_is_alive(priv)) |
6782 | return -EAGAIN; | |
6783 | ||
b481de9c ZY |
6784 | mutex_lock(&priv->mutex); |
6785 | ||
b481de9c | 6786 | if (conf->bssid) |
0795af57 JP |
6787 | IWL_DEBUG_MAC80211("bssid: %s\n", |
6788 | print_mac(mac, conf->bssid)); | |
b481de9c | 6789 | |
4150c572 JB |
6790 | /* |
6791 | * very dubious code was here; the probe filtering flag is never set: | |
6792 | * | |
b481de9c ZY |
6793 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
6794 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 6795 | */ |
b481de9c ZY |
6796 | |
6797 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
6798 | if (!conf->bssid) { | |
6799 | conf->bssid = priv->mac_addr; | |
6800 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
6801 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
6802 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
6803 | } |
6804 | if (priv->ibss_beacon) | |
6805 | dev_kfree_skb(priv->ibss_beacon); | |
6806 | ||
6807 | priv->ibss_beacon = conf->beacon; | |
6808 | } | |
6809 | ||
fde3571f MA |
6810 | if (iwl4965_is_rfkill(priv)) |
6811 | goto done; | |
6812 | ||
b481de9c ZY |
6813 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
6814 | !is_multicast_ether_addr(conf->bssid)) { | |
6815 | /* If there is currently a HW scan going on in the background | |
6816 | * then we need to cancel it else the RXON below will fail. */ | |
bb8c093b | 6817 | if (iwl4965_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
6818 | IWL_WARNING("Aborted scan still in progress " |
6819 | "after 100ms\n"); | |
6820 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
6821 | mutex_unlock(&priv->mutex); | |
6822 | return -EAGAIN; | |
6823 | } | |
6824 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
6825 | ||
6826 | /* TODO: Audit driver for usage of these members and see | |
6827 | * if mac80211 deprecates them (priv->bssid looks like it | |
6828 | * shouldn't be there, but I haven't scanned the IBSS code | |
6829 | * to verify) - jpk */ | |
6830 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
6831 | ||
6832 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 6833 | iwl4965_config_ap(priv); |
b481de9c | 6834 | else { |
bb8c093b | 6835 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 6836 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
bb8c093b | 6837 | iwl4965_rxon_add_station( |
b481de9c ZY |
6838 | priv, priv->active_rxon.bssid_addr, 1); |
6839 | } | |
6840 | ||
6841 | } else { | |
bb8c093b | 6842 | iwl4965_scan_cancel_timeout(priv, 100); |
b481de9c | 6843 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 6844 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6845 | } |
6846 | ||
fde3571f | 6847 | done: |
b481de9c ZY |
6848 | spin_lock_irqsave(&priv->lock, flags); |
6849 | if (!conf->ssid_len) | |
6850 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
6851 | else | |
6852 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
6853 | ||
6854 | priv->essid_len = conf->ssid_len; | |
6855 | spin_unlock_irqrestore(&priv->lock, flags); | |
6856 | ||
6857 | IWL_DEBUG_MAC80211("leave\n"); | |
6858 | mutex_unlock(&priv->mutex); | |
6859 | ||
6860 | return 0; | |
6861 | } | |
6862 | ||
bb8c093b | 6863 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
6864 | unsigned int changed_flags, |
6865 | unsigned int *total_flags, | |
6866 | int mc_count, struct dev_addr_list *mc_list) | |
6867 | { | |
6868 | /* | |
6869 | * XXX: dummy | |
bb8c093b | 6870 | * see also iwl4965_connection_init_rx_config |
4150c572 JB |
6871 | */ |
6872 | *total_flags = 0; | |
6873 | } | |
6874 | ||
bb8c093b | 6875 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
6876 | struct ieee80211_if_init_conf *conf) |
6877 | { | |
c79dd5b5 | 6878 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6879 | |
6880 | IWL_DEBUG_MAC80211("enter\n"); | |
6881 | ||
6882 | mutex_lock(&priv->mutex); | |
948c171c | 6883 | |
fde3571f MA |
6884 | if (iwl4965_is_ready_rf(priv)) { |
6885 | iwl4965_scan_cancel_timeout(priv, 100); | |
6886 | cancel_delayed_work(&priv->post_associate); | |
6887 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
6888 | iwl4965_commit_rxon(priv); | |
6889 | } | |
32bfd35d JB |
6890 | if (priv->vif == conf->vif) { |
6891 | priv->vif = NULL; | |
b481de9c ZY |
6892 | memset(priv->bssid, 0, ETH_ALEN); |
6893 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
6894 | priv->essid_len = 0; | |
6895 | } | |
6896 | mutex_unlock(&priv->mutex); | |
6897 | ||
6898 | IWL_DEBUG_MAC80211("leave\n"); | |
6899 | ||
6900 | } | |
471b3efd JB |
6901 | |
6902 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, | |
6903 | struct ieee80211_vif *vif, | |
6904 | struct ieee80211_bss_conf *bss_conf, | |
6905 | u32 changes) | |
220173b0 | 6906 | { |
c79dd5b5 | 6907 | struct iwl_priv *priv = hw->priv; |
220173b0 | 6908 | |
471b3efd JB |
6909 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
6910 | if (bss_conf->use_short_preamble) | |
220173b0 TW |
6911 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
6912 | else | |
6913 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
6914 | } | |
6915 | ||
471b3efd | 6916 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
8318d78a | 6917 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
6918 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
6919 | else | |
6920 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
6921 | } | |
6922 | ||
471b3efd JB |
6923 | if (changes & BSS_CHANGED_ASSOC) { |
6924 | /* | |
6925 | * TODO: | |
6926 | * do stuff instead of sniffing assoc resp | |
6927 | */ | |
6928 | } | |
6929 | ||
bb8c093b CH |
6930 | if (iwl4965_is_associated(priv)) |
6931 | iwl4965_send_rxon_assoc(priv); | |
220173b0 | 6932 | } |
b481de9c | 6933 | |
bb8c093b | 6934 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
6935 | { |
6936 | int rc = 0; | |
6937 | unsigned long flags; | |
c79dd5b5 | 6938 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6939 | |
6940 | IWL_DEBUG_MAC80211("enter\n"); | |
6941 | ||
052c4b9f | 6942 | mutex_lock(&priv->mutex); |
b481de9c ZY |
6943 | spin_lock_irqsave(&priv->lock, flags); |
6944 | ||
bb8c093b | 6945 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
6946 | rc = -EIO; |
6947 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
6948 | goto out_unlock; | |
6949 | } | |
6950 | ||
6951 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
6952 | rc = -EIO; | |
6953 | IWL_ERROR("ERROR: APs don't scan\n"); | |
6954 | goto out_unlock; | |
6955 | } | |
6956 | ||
7878a5a4 MA |
6957 | /* we don't schedule scan within next_scan_jiffies period */ |
6958 | if (priv->next_scan_jiffies && | |
6959 | time_after(priv->next_scan_jiffies, jiffies)) { | |
6960 | rc = -EAGAIN; | |
6961 | goto out_unlock; | |
6962 | } | |
b481de9c | 6963 | /* if we just finished scan ask for delay */ |
7878a5a4 MA |
6964 | if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies + |
6965 | IWL_DELAY_NEXT_SCAN, jiffies)) { | |
b481de9c ZY |
6966 | rc = -EAGAIN; |
6967 | goto out_unlock; | |
6968 | } | |
6969 | if (len) { | |
7878a5a4 | 6970 | IWL_DEBUG_SCAN("direct scan for %s [%d]\n ", |
bb8c093b | 6971 | iwl4965_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
6972 | |
6973 | priv->one_direct_scan = 1; | |
6974 | priv->direct_ssid_len = (u8) | |
6975 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
6976 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
6977 | } else |
6978 | priv->one_direct_scan = 0; | |
b481de9c | 6979 | |
bb8c093b | 6980 | rc = iwl4965_scan_initiate(priv); |
b481de9c ZY |
6981 | |
6982 | IWL_DEBUG_MAC80211("leave\n"); | |
6983 | ||
6984 | out_unlock: | |
6985 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 6986 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
6987 | |
6988 | return rc; | |
6989 | } | |
6990 | ||
ab885f8c EG |
6991 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
6992 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
6993 | u32 iv32, u16 *phase1key) | |
6994 | { | |
6995 | struct iwl_priv *priv = hw->priv; | |
6996 | u8 sta_id = IWL_INVALID_STATION; | |
6997 | unsigned long flags; | |
6998 | __le16 key_flags = 0; | |
6999 | int i; | |
7000 | DECLARE_MAC_BUF(mac); | |
7001 | ||
7002 | IWL_DEBUG_MAC80211("enter\n"); | |
7003 | ||
7004 | sta_id = iwl4965_hw_find_station(priv, addr); | |
7005 | if (sta_id == IWL_INVALID_STATION) { | |
7006 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
7007 | print_mac(mac, addr)); | |
7008 | return; | |
7009 | } | |
7010 | ||
7011 | iwl4965_scan_cancel_timeout(priv, 100); | |
7012 | ||
7013 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
7014 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
7015 | key_flags &= ~STA_KEY_FLG_INVALID; | |
7016 | ||
7017 | if (sta_id == priv->hw_setting.bcast_sta_id) | |
7018 | key_flags |= STA_KEY_MULTICAST_MSK; | |
7019 | ||
7020 | spin_lock_irqsave(&priv->sta_lock, flags); | |
7021 | ||
7022 | priv->stations[sta_id].sta.key.key_offset = | |
7023 | (sta_id % STA_KEY_MAX_NUM);/* FIXME */ | |
7024 | priv->stations[sta_id].sta.key.key_flags = key_flags; | |
7025 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
7026 | ||
7027 | for (i = 0; i < 5; i++) | |
7028 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
7029 | cpu_to_le16(phase1key[i]); | |
7030 | ||
7031 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
7032 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
7033 | ||
7034 | iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | |
7035 | ||
7036 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
7037 | ||
7038 | IWL_DEBUG_MAC80211("leave\n"); | |
7039 | } | |
7040 | ||
bb8c093b | 7041 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
7042 | const u8 *local_addr, const u8 *addr, |
7043 | struct ieee80211_key_conf *key) | |
7044 | { | |
c79dd5b5 | 7045 | struct iwl_priv *priv = hw->priv; |
0795af57 | 7046 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
7047 | int ret = 0; |
7048 | u8 sta_id = IWL_INVALID_STATION; | |
7049 | u8 static_key; | |
b481de9c ZY |
7050 | |
7051 | IWL_DEBUG_MAC80211("enter\n"); | |
7052 | ||
00acbc91 | 7053 | if (!iwl4965_mod_params.hw_crypto) { |
b481de9c ZY |
7054 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
7055 | return -EOPNOTSUPP; | |
7056 | } | |
7057 | ||
7058 | if (is_zero_ether_addr(addr)) | |
7059 | /* only support pairwise keys */ | |
7060 | return -EOPNOTSUPP; | |
7061 | ||
deb09c43 EG |
7062 | /* FIXME: need to differenciate between static and dynamic key |
7063 | * in the level of mac80211 */ | |
7064 | static_key = !iwl4965_is_associated(priv); | |
b481de9c | 7065 | |
deb09c43 EG |
7066 | if (!static_key) { |
7067 | sta_id = iwl4965_hw_find_station(priv, addr); | |
7068 | if (sta_id == IWL_INVALID_STATION) { | |
7069 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
7070 | print_mac(mac, addr)); | |
7071 | return -EINVAL; | |
7072 | } | |
7073 | } | |
b481de9c | 7074 | |
bb8c093b | 7075 | iwl4965_scan_cancel_timeout(priv, 100); |
052c4b9f | 7076 | |
b481de9c | 7077 | switch (cmd) { |
deb09c43 EG |
7078 | case SET_KEY: |
7079 | if (static_key) | |
7080 | ret = iwl4965_set_static_key(priv, key); | |
7081 | else | |
7082 | ret = iwl4965_set_dynamic_key(priv, key, sta_id); | |
7083 | ||
7084 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
7085 | break; |
7086 | case DISABLE_KEY: | |
deb09c43 EG |
7087 | if (static_key) |
7088 | ret = iwl4965_remove_static_key(priv); | |
7089 | else | |
7090 | ret = iwl4965_clear_sta_key_info(priv, sta_id); | |
7091 | ||
7092 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
7093 | break; |
7094 | default: | |
deb09c43 | 7095 | ret = -EINVAL; |
b481de9c ZY |
7096 | } |
7097 | ||
7098 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 7099 | |
deb09c43 | 7100 | return ret; |
b481de9c ZY |
7101 | } |
7102 | ||
bb8c093b | 7103 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue, |
b481de9c ZY |
7104 | const struct ieee80211_tx_queue_params *params) |
7105 | { | |
c79dd5b5 | 7106 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
7107 | unsigned long flags; |
7108 | int q; | |
b481de9c ZY |
7109 | |
7110 | IWL_DEBUG_MAC80211("enter\n"); | |
7111 | ||
bb8c093b | 7112 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
7113 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7114 | return -EIO; | |
7115 | } | |
7116 | ||
7117 | if (queue >= AC_NUM) { | |
7118 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
7119 | return 0; | |
7120 | } | |
7121 | ||
b481de9c ZY |
7122 | if (!priv->qos_data.qos_enable) { |
7123 | priv->qos_data.qos_active = 0; | |
7124 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
7125 | return 0; | |
7126 | } | |
7127 | q = AC_NUM - 1 - queue; | |
7128 | ||
7129 | spin_lock_irqsave(&priv->lock, flags); | |
7130 | ||
7131 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
7132 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
7133 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
7134 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 7135 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
7136 | |
7137 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
7138 | priv->qos_data.qos_active = 1; | |
7139 | ||
7140 | spin_unlock_irqrestore(&priv->lock, flags); | |
7141 | ||
7142 | mutex_lock(&priv->mutex); | |
7143 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b CH |
7144 | iwl4965_activate_qos(priv, 1); |
7145 | else if (priv->assoc_id && iwl4965_is_associated(priv)) | |
7146 | iwl4965_activate_qos(priv, 0); | |
b481de9c ZY |
7147 | |
7148 | mutex_unlock(&priv->mutex); | |
7149 | ||
b481de9c ZY |
7150 | IWL_DEBUG_MAC80211("leave\n"); |
7151 | return 0; | |
7152 | } | |
7153 | ||
bb8c093b | 7154 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
7155 | struct ieee80211_tx_queue_stats *stats) |
7156 | { | |
c79dd5b5 | 7157 | struct iwl_priv *priv = hw->priv; |
b481de9c | 7158 | int i, avail; |
bb8c093b CH |
7159 | struct iwl4965_tx_queue *txq; |
7160 | struct iwl4965_queue *q; | |
b481de9c ZY |
7161 | unsigned long flags; |
7162 | ||
7163 | IWL_DEBUG_MAC80211("enter\n"); | |
7164 | ||
bb8c093b | 7165 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
7166 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7167 | return -EIO; | |
7168 | } | |
7169 | ||
7170 | spin_lock_irqsave(&priv->lock, flags); | |
7171 | ||
7172 | for (i = 0; i < AC_NUM; i++) { | |
7173 | txq = &priv->txq[i]; | |
7174 | q = &txq->q; | |
bb8c093b | 7175 | avail = iwl4965_queue_space(q); |
b481de9c ZY |
7176 | |
7177 | stats->data[i].len = q->n_window - avail; | |
7178 | stats->data[i].limit = q->n_window - q->high_mark; | |
7179 | stats->data[i].count = q->n_window; | |
7180 | ||
7181 | } | |
7182 | spin_unlock_irqrestore(&priv->lock, flags); | |
7183 | ||
7184 | IWL_DEBUG_MAC80211("leave\n"); | |
7185 | ||
7186 | return 0; | |
7187 | } | |
7188 | ||
bb8c093b | 7189 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
7190 | struct ieee80211_low_level_stats *stats) |
7191 | { | |
7192 | IWL_DEBUG_MAC80211("enter\n"); | |
7193 | IWL_DEBUG_MAC80211("leave\n"); | |
7194 | ||
7195 | return 0; | |
7196 | } | |
7197 | ||
bb8c093b | 7198 | static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw) |
b481de9c ZY |
7199 | { |
7200 | IWL_DEBUG_MAC80211("enter\n"); | |
7201 | IWL_DEBUG_MAC80211("leave\n"); | |
7202 | ||
7203 | return 0; | |
7204 | } | |
7205 | ||
bb8c093b | 7206 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 7207 | { |
c79dd5b5 | 7208 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
7209 | unsigned long flags; |
7210 | ||
7211 | mutex_lock(&priv->mutex); | |
7212 | IWL_DEBUG_MAC80211("enter\n"); | |
7213 | ||
7214 | priv->lq_mngr.lq_ready = 0; | |
c8b0e6e1 | 7215 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 7216 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 7217 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 7218 | spin_unlock_irqrestore(&priv->lock, flags); |
c8b0e6e1 | 7219 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 7220 | |
bf85ea4f | 7221 | iwlcore_reset_qos(priv); |
b481de9c ZY |
7222 | |
7223 | cancel_delayed_work(&priv->post_associate); | |
7224 | ||
7225 | spin_lock_irqsave(&priv->lock, flags); | |
7226 | priv->assoc_id = 0; | |
7227 | priv->assoc_capability = 0; | |
7228 | priv->call_post_assoc_from_beacon = 0; | |
7229 | priv->assoc_station_added = 0; | |
7230 | ||
7231 | /* new association get rid of ibss beacon skb */ | |
7232 | if (priv->ibss_beacon) | |
7233 | dev_kfree_skb(priv->ibss_beacon); | |
7234 | ||
7235 | priv->ibss_beacon = NULL; | |
7236 | ||
7237 | priv->beacon_int = priv->hw->conf.beacon_int; | |
7238 | priv->timestamp1 = 0; | |
7239 | priv->timestamp0 = 0; | |
7240 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) | |
7241 | priv->beacon_int = 0; | |
7242 | ||
7243 | spin_unlock_irqrestore(&priv->lock, flags); | |
7244 | ||
fde3571f MA |
7245 | if (!iwl4965_is_ready_rf(priv)) { |
7246 | IWL_DEBUG_MAC80211("leave - not ready\n"); | |
7247 | mutex_unlock(&priv->mutex); | |
7248 | return; | |
7249 | } | |
7250 | ||
052c4b9f | 7251 | /* we are restarting association process |
7252 | * clear RXON_FILTER_ASSOC_MSK bit | |
7253 | */ | |
7254 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
bb8c093b | 7255 | iwl4965_scan_cancel_timeout(priv, 100); |
052c4b9f | 7256 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 7257 | iwl4965_commit_rxon(priv); |
052c4b9f | 7258 | } |
7259 | ||
b481de9c ZY |
7260 | /* Per mac80211.h: This is only used in IBSS mode... */ |
7261 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 7262 | |
b481de9c ZY |
7263 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
7264 | mutex_unlock(&priv->mutex); | |
7265 | return; | |
7266 | } | |
7267 | ||
b481de9c ZY |
7268 | priv->only_active_channel = 0; |
7269 | ||
bb8c093b | 7270 | iwl4965_set_rate(priv); |
b481de9c ZY |
7271 | |
7272 | mutex_unlock(&priv->mutex); | |
7273 | ||
7274 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
7275 | } |
7276 | ||
bb8c093b | 7277 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
7278 | struct ieee80211_tx_control *control) |
7279 | { | |
c79dd5b5 | 7280 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
7281 | unsigned long flags; |
7282 | ||
7283 | mutex_lock(&priv->mutex); | |
7284 | IWL_DEBUG_MAC80211("enter\n"); | |
7285 | ||
bb8c093b | 7286 | if (!iwl4965_is_ready_rf(priv)) { |
b481de9c ZY |
7287 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
7288 | mutex_unlock(&priv->mutex); | |
7289 | return -EIO; | |
7290 | } | |
7291 | ||
7292 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
7293 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
7294 | mutex_unlock(&priv->mutex); | |
7295 | return -EIO; | |
7296 | } | |
7297 | ||
7298 | spin_lock_irqsave(&priv->lock, flags); | |
7299 | ||
7300 | if (priv->ibss_beacon) | |
7301 | dev_kfree_skb(priv->ibss_beacon); | |
7302 | ||
7303 | priv->ibss_beacon = skb; | |
7304 | ||
7305 | priv->assoc_id = 0; | |
7306 | ||
7307 | IWL_DEBUG_MAC80211("leave\n"); | |
7308 | spin_unlock_irqrestore(&priv->lock, flags); | |
7309 | ||
bf85ea4f | 7310 | iwlcore_reset_qos(priv); |
b481de9c ZY |
7311 | |
7312 | queue_work(priv->workqueue, &priv->post_associate.work); | |
7313 | ||
7314 | mutex_unlock(&priv->mutex); | |
7315 | ||
7316 | return 0; | |
7317 | } | |
7318 | ||
c8b0e6e1 | 7319 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 7320 | |
fd105e79 | 7321 | static void iwl4965_ht_info_fill(struct ieee80211_conf *conf, |
c79dd5b5 | 7322 | struct iwl_priv *priv) |
b481de9c | 7323 | { |
fd105e79 RR |
7324 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; |
7325 | struct ieee80211_ht_info *ht_conf = &conf->ht_conf; | |
7326 | struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf; | |
b481de9c ZY |
7327 | |
7328 | IWL_DEBUG_MAC80211("enter: \n"); | |
7329 | ||
fd105e79 RR |
7330 | if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) { |
7331 | iwl_conf->is_ht = 0; | |
7332 | return; | |
b481de9c ZY |
7333 | } |
7334 | ||
fd105e79 RR |
7335 | iwl_conf->is_ht = 1; |
7336 | priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
7337 | ||
7338 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) | |
7339 | iwl_conf->sgf |= 0x1; | |
7340 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) | |
7341 | iwl_conf->sgf |= 0x2; | |
7342 | ||
7343 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
7344 | iwl_conf->max_amsdu_size = | |
7345 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
134eb5d3 | 7346 | |
fd105e79 RR |
7347 | iwl_conf->supported_chan_width = |
7348 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
134eb5d3 GC |
7349 | iwl_conf->extension_chan_offset = |
7350 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
7351 | /* If no above or below channel supplied disable FAT channel */ | |
7352 | if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE && | |
7353 | iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW) | |
7354 | iwl_conf->supported_chan_width = 0; | |
7355 | ||
fd105e79 RR |
7356 | iwl_conf->tx_mimo_ps_mode = |
7357 | (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
7358 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); | |
7359 | ||
7360 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
fd105e79 RR |
7361 | iwl_conf->tx_chan_width = |
7362 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
7363 | iwl_conf->ht_protection = | |
7364 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
7365 | iwl_conf->non_GF_STA_present = | |
7366 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
7367 | ||
7368 | IWL_DEBUG_MAC80211("control channel %d\n", | |
7369 | iwl_conf->control_channel); | |
b481de9c | 7370 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
7371 | } |
7372 | ||
bb8c093b | 7373 | static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw, |
fd105e79 | 7374 | struct ieee80211_conf *conf) |
b481de9c | 7375 | { |
c79dd5b5 | 7376 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
7377 | |
7378 | IWL_DEBUG_MAC80211("enter: \n"); | |
7379 | ||
fd105e79 | 7380 | iwl4965_ht_info_fill(conf, priv); |
b481de9c ZY |
7381 | iwl4965_set_rxon_chain(priv); |
7382 | ||
7383 | if (priv && priv->assoc_id && | |
7384 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { | |
7385 | unsigned long flags; | |
7386 | ||
7387 | spin_lock_irqsave(&priv->lock, flags); | |
7388 | if (priv->beacon_int) | |
7389 | queue_work(priv->workqueue, &priv->post_associate.work); | |
7390 | else | |
7391 | priv->call_post_assoc_from_beacon = 1; | |
7392 | spin_unlock_irqrestore(&priv->lock, flags); | |
7393 | } | |
7394 | ||
fd105e79 RR |
7395 | IWL_DEBUG_MAC80211("leave:\n"); |
7396 | return 0; | |
b481de9c ZY |
7397 | } |
7398 | ||
c8b0e6e1 | 7399 | #endif /*CONFIG_IWL4965_HT*/ |
b481de9c ZY |
7400 | |
7401 | /***************************************************************************** | |
7402 | * | |
7403 | * sysfs attributes | |
7404 | * | |
7405 | *****************************************************************************/ | |
7406 | ||
0a6857e7 | 7407 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
7408 | |
7409 | /* | |
7410 | * The following adds a new attribute to the sysfs representation | |
7411 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
7412 | * used for controlling the debug level. | |
7413 | * | |
7414 | * See the level definitions in iwl for details. | |
7415 | */ | |
7416 | ||
7417 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | |
7418 | { | |
0a6857e7 | 7419 | return sprintf(buf, "0x%08X\n", iwl_debug_level); |
b481de9c ZY |
7420 | } |
7421 | static ssize_t store_debug_level(struct device_driver *d, | |
7422 | const char *buf, size_t count) | |
7423 | { | |
7424 | char *p = (char *)buf; | |
7425 | u32 val; | |
7426 | ||
7427 | val = simple_strtoul(p, &p, 0); | |
7428 | if (p == buf) | |
7429 | printk(KERN_INFO DRV_NAME | |
7430 | ": %s is not in hex or decimal form.\n", buf); | |
7431 | else | |
0a6857e7 | 7432 | iwl_debug_level = val; |
b481de9c ZY |
7433 | |
7434 | return strnlen(buf, count); | |
7435 | } | |
7436 | ||
7437 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | |
7438 | show_debug_level, store_debug_level); | |
7439 | ||
0a6857e7 | 7440 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c ZY |
7441 | |
7442 | static ssize_t show_rf_kill(struct device *d, | |
7443 | struct device_attribute *attr, char *buf) | |
7444 | { | |
7445 | /* | |
7446 | * 0 - RF kill not enabled | |
7447 | * 1 - SW based RF kill active (sysfs) | |
7448 | * 2 - HW based RF kill active | |
7449 | * 3 - Both HW and SW based RF kill active | |
7450 | */ | |
c79dd5b5 | 7451 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7452 | int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) | |
7453 | (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0); | |
7454 | ||
7455 | return sprintf(buf, "%i\n", val); | |
7456 | } | |
7457 | ||
7458 | static ssize_t store_rf_kill(struct device *d, | |
7459 | struct device_attribute *attr, | |
7460 | const char *buf, size_t count) | |
7461 | { | |
c79dd5b5 | 7462 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7463 | |
7464 | mutex_lock(&priv->mutex); | |
bb8c093b | 7465 | iwl4965_radio_kill_sw(priv, buf[0] == '1'); |
b481de9c ZY |
7466 | mutex_unlock(&priv->mutex); |
7467 | ||
7468 | return count; | |
7469 | } | |
7470 | ||
7471 | static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill); | |
7472 | ||
7473 | static ssize_t show_temperature(struct device *d, | |
7474 | struct device_attribute *attr, char *buf) | |
7475 | { | |
c79dd5b5 | 7476 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 7477 | |
bb8c093b | 7478 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
7479 | return -EAGAIN; |
7480 | ||
bb8c093b | 7481 | return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv)); |
b481de9c ZY |
7482 | } |
7483 | ||
7484 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
7485 | ||
7486 | static ssize_t show_rs_window(struct device *d, | |
7487 | struct device_attribute *attr, | |
7488 | char *buf) | |
7489 | { | |
c79dd5b5 | 7490 | struct iwl_priv *priv = d->driver_data; |
bb8c093b | 7491 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); |
b481de9c ZY |
7492 | } |
7493 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | |
7494 | ||
7495 | static ssize_t show_tx_power(struct device *d, | |
7496 | struct device_attribute *attr, char *buf) | |
7497 | { | |
c79dd5b5 | 7498 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7499 | return sprintf(buf, "%d\n", priv->user_txpower_limit); |
7500 | } | |
7501 | ||
7502 | static ssize_t store_tx_power(struct device *d, | |
7503 | struct device_attribute *attr, | |
7504 | const char *buf, size_t count) | |
7505 | { | |
c79dd5b5 | 7506 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7507 | char *p = (char *)buf; |
7508 | u32 val; | |
7509 | ||
7510 | val = simple_strtoul(p, &p, 10); | |
7511 | if (p == buf) | |
7512 | printk(KERN_INFO DRV_NAME | |
7513 | ": %s is not in decimal form.\n", buf); | |
7514 | else | |
bb8c093b | 7515 | iwl4965_hw_reg_set_txpower(priv, val); |
b481de9c ZY |
7516 | |
7517 | return count; | |
7518 | } | |
7519 | ||
7520 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
7521 | ||
7522 | static ssize_t show_flags(struct device *d, | |
7523 | struct device_attribute *attr, char *buf) | |
7524 | { | |
c79dd5b5 | 7525 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7526 | |
7527 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
7528 | } | |
7529 | ||
7530 | static ssize_t store_flags(struct device *d, | |
7531 | struct device_attribute *attr, | |
7532 | const char *buf, size_t count) | |
7533 | { | |
c79dd5b5 | 7534 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7535 | u32 flags = simple_strtoul(buf, NULL, 0); |
7536 | ||
7537 | mutex_lock(&priv->mutex); | |
7538 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
7539 | /* Cancel any currently running scans... */ | |
bb8c093b | 7540 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
7541 | IWL_WARNING("Could not cancel scan.\n"); |
7542 | else { | |
7543 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
7544 | flags); | |
7545 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 7546 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
7547 | } |
7548 | } | |
7549 | mutex_unlock(&priv->mutex); | |
7550 | ||
7551 | return count; | |
7552 | } | |
7553 | ||
7554 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
7555 | ||
7556 | static ssize_t show_filter_flags(struct device *d, | |
7557 | struct device_attribute *attr, char *buf) | |
7558 | { | |
c79dd5b5 | 7559 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7560 | |
7561 | return sprintf(buf, "0x%04X\n", | |
7562 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
7563 | } | |
7564 | ||
7565 | static ssize_t store_filter_flags(struct device *d, | |
7566 | struct device_attribute *attr, | |
7567 | const char *buf, size_t count) | |
7568 | { | |
c79dd5b5 | 7569 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
7570 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
7571 | ||
7572 | mutex_lock(&priv->mutex); | |
7573 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
7574 | /* Cancel any currently running scans... */ | |
bb8c093b | 7575 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
7576 | IWL_WARNING("Could not cancel scan.\n"); |
7577 | else { | |
7578 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
7579 | "0x%04X\n", filter_flags); | |
7580 | priv->staging_rxon.filter_flags = | |
7581 | cpu_to_le32(filter_flags); | |
bb8c093b | 7582 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
7583 | } |
7584 | } | |
7585 | mutex_unlock(&priv->mutex); | |
7586 | ||
7587 | return count; | |
7588 | } | |
7589 | ||
7590 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
7591 | store_filter_flags); | |
7592 | ||
c8b0e6e1 | 7593 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
7594 | |
7595 | static ssize_t show_measurement(struct device *d, | |
7596 | struct device_attribute *attr, char *buf) | |
7597 | { | |
c79dd5b5 | 7598 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 7599 | struct iwl4965_spectrum_notification measure_report; |
b481de9c ZY |
7600 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
7601 | u8 *data = (u8 *) & measure_report; | |
7602 | unsigned long flags; | |
7603 | ||
7604 | spin_lock_irqsave(&priv->lock, flags); | |
7605 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
7606 | spin_unlock_irqrestore(&priv->lock, flags); | |
7607 | return 0; | |
7608 | } | |
7609 | memcpy(&measure_report, &priv->measure_report, size); | |
7610 | priv->measurement_status = 0; | |
7611 | spin_unlock_irqrestore(&priv->lock, flags); | |
7612 | ||
7613 | while (size && (PAGE_SIZE - len)) { | |
7614 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
7615 | PAGE_SIZE - len, 1); | |
7616 | len = strlen(buf); | |
7617 | if (PAGE_SIZE - len) | |
7618 | buf[len++] = '\n'; | |
7619 | ||
7620 | ofs += 16; | |
7621 | size -= min(size, 16U); | |
7622 | } | |
7623 | ||
7624 | return len; | |
7625 | } | |
7626 | ||
7627 | static ssize_t store_measurement(struct device *d, | |
7628 | struct device_attribute *attr, | |
7629 | const char *buf, size_t count) | |
7630 | { | |
c79dd5b5 | 7631 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7632 | struct ieee80211_measurement_params params = { |
7633 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
7634 | .start_time = cpu_to_le64(priv->last_tsf), | |
7635 | .duration = cpu_to_le16(1), | |
7636 | }; | |
7637 | u8 type = IWL_MEASURE_BASIC; | |
7638 | u8 buffer[32]; | |
7639 | u8 channel; | |
7640 | ||
7641 | if (count) { | |
7642 | char *p = buffer; | |
7643 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
7644 | channel = simple_strtoul(p, NULL, 0); | |
7645 | if (channel) | |
7646 | params.channel = channel; | |
7647 | ||
7648 | p = buffer; | |
7649 | while (*p && *p != ' ') | |
7650 | p++; | |
7651 | if (*p) | |
7652 | type = simple_strtoul(p + 1, NULL, 0); | |
7653 | } | |
7654 | ||
7655 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
7656 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 7657 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
7658 | |
7659 | return count; | |
7660 | } | |
7661 | ||
7662 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
7663 | show_measurement, store_measurement); | |
c8b0e6e1 | 7664 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
7665 | |
7666 | static ssize_t store_retry_rate(struct device *d, | |
7667 | struct device_attribute *attr, | |
7668 | const char *buf, size_t count) | |
7669 | { | |
c79dd5b5 | 7670 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7671 | |
7672 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
7673 | if (priv->retry_rate <= 0) | |
7674 | priv->retry_rate = 1; | |
7675 | ||
7676 | return count; | |
7677 | } | |
7678 | ||
7679 | static ssize_t show_retry_rate(struct device *d, | |
7680 | struct device_attribute *attr, char *buf) | |
7681 | { | |
c79dd5b5 | 7682 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7683 | return sprintf(buf, "%d", priv->retry_rate); |
7684 | } | |
7685 | ||
7686 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
7687 | store_retry_rate); | |
7688 | ||
7689 | static ssize_t store_power_level(struct device *d, | |
7690 | struct device_attribute *attr, | |
7691 | const char *buf, size_t count) | |
7692 | { | |
c79dd5b5 | 7693 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7694 | int rc; |
7695 | int mode; | |
7696 | ||
7697 | mode = simple_strtoul(buf, NULL, 0); | |
7698 | mutex_lock(&priv->mutex); | |
7699 | ||
bb8c093b | 7700 | if (!iwl4965_is_ready(priv)) { |
b481de9c ZY |
7701 | rc = -EAGAIN; |
7702 | goto out; | |
7703 | } | |
7704 | ||
7705 | if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC)) | |
7706 | mode = IWL_POWER_AC; | |
7707 | else | |
7708 | mode |= IWL_POWER_ENABLED; | |
7709 | ||
7710 | if (mode != priv->power_mode) { | |
bb8c093b | 7711 | rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode)); |
b481de9c ZY |
7712 | if (rc) { |
7713 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | |
7714 | goto out; | |
7715 | } | |
7716 | priv->power_mode = mode; | |
7717 | } | |
7718 | ||
7719 | rc = count; | |
7720 | ||
7721 | out: | |
7722 | mutex_unlock(&priv->mutex); | |
7723 | return rc; | |
7724 | } | |
7725 | ||
7726 | #define MAX_WX_STRING 80 | |
7727 | ||
7728 | /* Values are in microsecond */ | |
7729 | static const s32 timeout_duration[] = { | |
7730 | 350000, | |
7731 | 250000, | |
7732 | 75000, | |
7733 | 37000, | |
7734 | 25000, | |
7735 | }; | |
7736 | static const s32 period_duration[] = { | |
7737 | 400000, | |
7738 | 700000, | |
7739 | 1000000, | |
7740 | 1000000, | |
7741 | 1000000 | |
7742 | }; | |
7743 | ||
7744 | static ssize_t show_power_level(struct device *d, | |
7745 | struct device_attribute *attr, char *buf) | |
7746 | { | |
c79dd5b5 | 7747 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7748 | int level = IWL_POWER_LEVEL(priv->power_mode); |
7749 | char *p = buf; | |
7750 | ||
7751 | p += sprintf(p, "%d ", level); | |
7752 | switch (level) { | |
7753 | case IWL_POWER_MODE_CAM: | |
7754 | case IWL_POWER_AC: | |
7755 | p += sprintf(p, "(AC)"); | |
7756 | break; | |
7757 | case IWL_POWER_BATTERY: | |
7758 | p += sprintf(p, "(BATTERY)"); | |
7759 | break; | |
7760 | default: | |
7761 | p += sprintf(p, | |
7762 | "(Timeout %dms, Period %dms)", | |
7763 | timeout_duration[level - 1] / 1000, | |
7764 | period_duration[level - 1] / 1000); | |
7765 | } | |
7766 | ||
7767 | if (!(priv->power_mode & IWL_POWER_ENABLED)) | |
7768 | p += sprintf(p, " OFF\n"); | |
7769 | else | |
7770 | p += sprintf(p, " \n"); | |
7771 | ||
7772 | return (p - buf + 1); | |
7773 | ||
7774 | } | |
7775 | ||
7776 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
7777 | store_power_level); | |
7778 | ||
7779 | static ssize_t show_channels(struct device *d, | |
7780 | struct device_attribute *attr, char *buf) | |
7781 | { | |
8318d78a JB |
7782 | /* all this shit doesn't belong into sysfs anyway */ |
7783 | return 0; | |
b481de9c ZY |
7784 | } |
7785 | ||
7786 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
7787 | ||
7788 | static ssize_t show_statistics(struct device *d, | |
7789 | struct device_attribute *attr, char *buf) | |
7790 | { | |
c79dd5b5 | 7791 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 7792 | u32 size = sizeof(struct iwl4965_notif_statistics); |
b481de9c ZY |
7793 | u32 len = 0, ofs = 0; |
7794 | u8 *data = (u8 *) & priv->statistics; | |
7795 | int rc = 0; | |
7796 | ||
bb8c093b | 7797 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
7798 | return -EAGAIN; |
7799 | ||
7800 | mutex_lock(&priv->mutex); | |
bb8c093b | 7801 | rc = iwl4965_send_statistics_request(priv); |
b481de9c ZY |
7802 | mutex_unlock(&priv->mutex); |
7803 | ||
7804 | if (rc) { | |
7805 | len = sprintf(buf, | |
7806 | "Error sending statistics request: 0x%08X\n", rc); | |
7807 | return len; | |
7808 | } | |
7809 | ||
7810 | while (size && (PAGE_SIZE - len)) { | |
7811 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
7812 | PAGE_SIZE - len, 1); | |
7813 | len = strlen(buf); | |
7814 | if (PAGE_SIZE - len) | |
7815 | buf[len++] = '\n'; | |
7816 | ||
7817 | ofs += 16; | |
7818 | size -= min(size, 16U); | |
7819 | } | |
7820 | ||
7821 | return len; | |
7822 | } | |
7823 | ||
7824 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
7825 | ||
7826 | static ssize_t show_antenna(struct device *d, | |
7827 | struct device_attribute *attr, char *buf) | |
7828 | { | |
c79dd5b5 | 7829 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c | 7830 | |
bb8c093b | 7831 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
7832 | return -EAGAIN; |
7833 | ||
7834 | return sprintf(buf, "%d\n", priv->antenna); | |
7835 | } | |
7836 | ||
7837 | static ssize_t store_antenna(struct device *d, | |
7838 | struct device_attribute *attr, | |
7839 | const char *buf, size_t count) | |
7840 | { | |
7841 | int ant; | |
c79dd5b5 | 7842 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7843 | |
7844 | if (count == 0) | |
7845 | return 0; | |
7846 | ||
7847 | if (sscanf(buf, "%1i", &ant) != 1) { | |
7848 | IWL_DEBUG_INFO("not in hex or decimal form.\n"); | |
7849 | return count; | |
7850 | } | |
7851 | ||
7852 | if ((ant >= 0) && (ant <= 2)) { | |
7853 | IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant); | |
bb8c093b | 7854 | priv->antenna = (enum iwl4965_antenna)ant; |
b481de9c ZY |
7855 | } else |
7856 | IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant); | |
7857 | ||
7858 | ||
7859 | return count; | |
7860 | } | |
7861 | ||
7862 | static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna); | |
7863 | ||
7864 | static ssize_t show_status(struct device *d, | |
7865 | struct device_attribute *attr, char *buf) | |
7866 | { | |
c79dd5b5 | 7867 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
bb8c093b | 7868 | if (!iwl4965_is_alive(priv)) |
b481de9c ZY |
7869 | return -EAGAIN; |
7870 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
7871 | } | |
7872 | ||
7873 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
7874 | ||
7875 | static ssize_t dump_error_log(struct device *d, | |
7876 | struct device_attribute *attr, | |
7877 | const char *buf, size_t count) | |
7878 | { | |
7879 | char *p = (char *)buf; | |
7880 | ||
7881 | if (p[0] == '1') | |
c79dd5b5 | 7882 | iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
7883 | |
7884 | return strnlen(buf, count); | |
7885 | } | |
7886 | ||
7887 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | |
7888 | ||
7889 | static ssize_t dump_event_log(struct device *d, | |
7890 | struct device_attribute *attr, | |
7891 | const char *buf, size_t count) | |
7892 | { | |
7893 | char *p = (char *)buf; | |
7894 | ||
7895 | if (p[0] == '1') | |
c79dd5b5 | 7896 | iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
7897 | |
7898 | return strnlen(buf, count); | |
7899 | } | |
7900 | ||
7901 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | |
7902 | ||
7903 | /***************************************************************************** | |
7904 | * | |
7905 | * driver setup and teardown | |
7906 | * | |
7907 | *****************************************************************************/ | |
7908 | ||
c79dd5b5 | 7909 | static void iwl4965_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
7910 | { |
7911 | priv->workqueue = create_workqueue(DRV_NAME); | |
7912 | ||
7913 | init_waitqueue_head(&priv->wait_command_queue); | |
7914 | ||
bb8c093b CH |
7915 | INIT_WORK(&priv->up, iwl4965_bg_up); |
7916 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
7917 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
7918 | INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed); | |
7919 | INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan); | |
7920 | INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan); | |
7921 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); | |
7922 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
7923 | INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate); | |
7924 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start); | |
7925 | INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start); | |
7926 | INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check); | |
7927 | ||
7928 | iwl4965_hw_setup_deferred_work(priv); | |
b481de9c ZY |
7929 | |
7930 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 7931 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
7932 | } |
7933 | ||
c79dd5b5 | 7934 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 7935 | { |
bb8c093b | 7936 | iwl4965_hw_cancel_deferred_work(priv); |
b481de9c | 7937 | |
3ae6a054 | 7938 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
7939 | cancel_delayed_work(&priv->scan_check); |
7940 | cancel_delayed_work(&priv->alive_start); | |
7941 | cancel_delayed_work(&priv->post_associate); | |
7942 | cancel_work_sync(&priv->beacon_update); | |
7943 | } | |
7944 | ||
bb8c093b | 7945 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c ZY |
7946 | &dev_attr_antenna.attr, |
7947 | &dev_attr_channels.attr, | |
7948 | &dev_attr_dump_errors.attr, | |
7949 | &dev_attr_dump_events.attr, | |
7950 | &dev_attr_flags.attr, | |
7951 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 7952 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
7953 | &dev_attr_measurement.attr, |
7954 | #endif | |
7955 | &dev_attr_power_level.attr, | |
7956 | &dev_attr_retry_rate.attr, | |
7957 | &dev_attr_rf_kill.attr, | |
7958 | &dev_attr_rs_window.attr, | |
7959 | &dev_attr_statistics.attr, | |
7960 | &dev_attr_status.attr, | |
7961 | &dev_attr_temperature.attr, | |
b481de9c ZY |
7962 | &dev_attr_tx_power.attr, |
7963 | ||
7964 | NULL | |
7965 | }; | |
7966 | ||
bb8c093b | 7967 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 7968 | .name = NULL, /* put in device directory */ |
bb8c093b | 7969 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
7970 | }; |
7971 | ||
bb8c093b CH |
7972 | static struct ieee80211_ops iwl4965_hw_ops = { |
7973 | .tx = iwl4965_mac_tx, | |
7974 | .start = iwl4965_mac_start, | |
7975 | .stop = iwl4965_mac_stop, | |
7976 | .add_interface = iwl4965_mac_add_interface, | |
7977 | .remove_interface = iwl4965_mac_remove_interface, | |
7978 | .config = iwl4965_mac_config, | |
7979 | .config_interface = iwl4965_mac_config_interface, | |
7980 | .configure_filter = iwl4965_configure_filter, | |
7981 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 7982 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
7983 | .get_stats = iwl4965_mac_get_stats, |
7984 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
7985 | .conf_tx = iwl4965_mac_conf_tx, | |
7986 | .get_tsf = iwl4965_mac_get_tsf, | |
7987 | .reset_tsf = iwl4965_mac_reset_tsf, | |
7988 | .beacon_update = iwl4965_mac_beacon_update, | |
471b3efd | 7989 | .bss_info_changed = iwl4965_bss_info_changed, |
c8b0e6e1 | 7990 | #ifdef CONFIG_IWL4965_HT |
bb8c093b | 7991 | .conf_ht = iwl4965_mac_conf_ht, |
9ab46173 | 7992 | .ampdu_action = iwl4965_mac_ampdu_action, |
c8b0e6e1 | 7993 | #endif /* CONFIG_IWL4965_HT */ |
bb8c093b | 7994 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
7995 | }; |
7996 | ||
bb8c093b | 7997 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
7998 | { |
7999 | int err = 0; | |
c79dd5b5 | 8000 | struct iwl_priv *priv; |
b481de9c | 8001 | struct ieee80211_hw *hw; |
82b9a121 | 8002 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
5a66926a | 8003 | DECLARE_MAC_BUF(mac); |
b481de9c | 8004 | |
316c30d9 AK |
8005 | /************************ |
8006 | * 1. Allocating HW data | |
8007 | ************************/ | |
8008 | ||
6440adb5 BC |
8009 | /* Disabling hardware scan means that mac80211 will perform scans |
8010 | * "the hard way", rather than using device's scan. */ | |
00acbc91 | 8011 | if (iwl4965_mod_params.disable_hw_scan) { |
b481de9c | 8012 | IWL_DEBUG_INFO("Disabling hw_scan\n"); |
bb8c093b | 8013 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
8014 | } |
8015 | ||
1d0a082d AK |
8016 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
8017 | if (!hw) { | |
b481de9c ZY |
8018 | err = -ENOMEM; |
8019 | goto out; | |
8020 | } | |
1d0a082d AK |
8021 | priv = hw->priv; |
8022 | /* At this point both hw and priv are allocated. */ | |
8023 | ||
b481de9c ZY |
8024 | SET_IEEE80211_DEV(hw, &pdev->dev); |
8025 | ||
8026 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 8027 | priv->cfg = cfg; |
b481de9c | 8028 | priv->pci_dev = pdev; |
316c30d9 | 8029 | |
0a6857e7 | 8030 | #ifdef CONFIG_IWLWIFI_DEBUG |
00acbc91 | 8031 | iwl_debug_level = iwl4965_mod_params.debug; |
b481de9c ZY |
8032 | atomic_set(&priv->restrict_refcnt, 0); |
8033 | #endif | |
b481de9c | 8034 | |
316c30d9 AK |
8035 | /************************** |
8036 | * 2. Initializing PCI bus | |
8037 | **************************/ | |
8038 | if (pci_enable_device(pdev)) { | |
8039 | err = -ENODEV; | |
8040 | goto out_ieee80211_free_hw; | |
8041 | } | |
8042 | ||
8043 | pci_set_master(pdev); | |
8044 | ||
8045 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
8046 | if (!err) | |
8047 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
8048 | if (err) { | |
8049 | printk(KERN_WARNING DRV_NAME | |
8050 | ": No suitable DMA available.\n"); | |
8051 | goto out_pci_disable_device; | |
8052 | } | |
8053 | ||
8054 | err = pci_request_regions(pdev, DRV_NAME); | |
8055 | if (err) | |
8056 | goto out_pci_disable_device; | |
8057 | ||
8058 | pci_set_drvdata(pdev, priv); | |
8059 | ||
8060 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
8061 | * PCI Tx retries from interfering with C3 CPU state */ | |
8062 | pci_write_config_byte(pdev, 0x41, 0x00); | |
8063 | ||
8064 | /*********************** | |
8065 | * 3. Read REV register | |
8066 | ***********************/ | |
8067 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
8068 | if (!priv->hw_base) { | |
8069 | err = -ENODEV; | |
8070 | goto out_pci_release_regions; | |
8071 | } | |
8072 | ||
8073 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
8074 | (unsigned long long) pci_resource_len(pdev, 0)); | |
8075 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
8076 | ||
8077 | printk(KERN_INFO DRV_NAME | |
8078 | ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name); | |
8079 | ||
8080 | /***************** | |
8081 | * 4. Read EEPROM | |
8082 | *****************/ | |
8083 | /* nic init */ | |
8084 | iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS, | |
8085 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); | |
8086 | ||
8087 | iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); | |
8088 | err = iwl4965_poll_bit(priv, CSR_GP_CNTRL, | |
8089 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, | |
8090 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | |
8091 | if (err < 0) { | |
8092 | IWL_DEBUG_INFO("Failed to init the card\n"); | |
8093 | goto out_iounmap; | |
8094 | } | |
8095 | /* Read the EEPROM */ | |
8096 | err = iwl_eeprom_init(priv); | |
8097 | if (err) { | |
8098 | IWL_ERROR("Unable to init EEPROM\n"); | |
8099 | goto out_iounmap; | |
8100 | } | |
8101 | /* MAC Address location in EEPROM same for 3945/4965 */ | |
8102 | iwl_eeprom_get_mac(priv, priv->mac_addr); | |
8103 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
8104 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
8105 | ||
8106 | /************************ | |
8107 | * 5. Setup HW constants | |
8108 | ************************/ | |
8109 | /* Device-specific setup */ | |
8110 | if (iwl4965_hw_set_hw_setting(priv)) { | |
8111 | IWL_ERROR("failed to set hw settings\n"); | |
8112 | goto out_iounmap; | |
8113 | } | |
8114 | ||
8115 | /******************* | |
8116 | * 6. Setup hw/priv | |
8117 | *******************/ | |
b481de9c | 8118 | |
bf85ea4f AK |
8119 | err = iwl_setup(priv); |
8120 | if (err) | |
316c30d9 | 8121 | goto out_unset_hw_settings; |
bf85ea4f | 8122 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
8123 | |
8124 | /********************************** | |
8125 | * 7. Initialize module parameters | |
8126 | **********************************/ | |
8127 | ||
8128 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
00acbc91 | 8129 | if (iwl4965_mod_params.disable) { |
316c30d9 AK |
8130 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
8131 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
8132 | } | |
8133 | ||
00acbc91 | 8134 | if (iwl4965_mod_params.enable_qos) |
316c30d9 AK |
8135 | priv->qos_data.qos_enable = 1; |
8136 | ||
8137 | /******************** | |
8138 | * 8. Setup services | |
8139 | ********************/ | |
8140 | iwl4965_disable_interrupts(priv); | |
8141 | ||
8142 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
8143 | if (err) { | |
8144 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
bf85ea4f | 8145 | goto out_unset_hw_settings; |
316c30d9 AK |
8146 | } |
8147 | ||
8148 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
8149 | if (err) { | |
8150 | IWL_ERROR("failed to create debugfs files\n"); | |
8151 | goto out_remove_sysfs; | |
8152 | } | |
8153 | ||
8154 | iwl4965_setup_deferred_work(priv); | |
8155 | iwl4965_setup_rx_handlers(priv); | |
8156 | ||
8157 | /******************** | |
8158 | * 9. Conclude | |
8159 | ********************/ | |
5a66926a ZY |
8160 | pci_save_state(pdev); |
8161 | pci_disable_device(pdev); | |
b481de9c ZY |
8162 | |
8163 | return 0; | |
8164 | ||
316c30d9 AK |
8165 | out_remove_sysfs: |
8166 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
316c30d9 | 8167 | out_unset_hw_settings: |
bb8c093b | 8168 | iwl4965_unset_hw_setting(priv); |
b481de9c ZY |
8169 | out_iounmap: |
8170 | pci_iounmap(pdev, priv->hw_base); | |
8171 | out_pci_release_regions: | |
8172 | pci_release_regions(pdev); | |
316c30d9 | 8173 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
8174 | out_pci_disable_device: |
8175 | pci_disable_device(pdev); | |
b481de9c ZY |
8176 | out_ieee80211_free_hw: |
8177 | ieee80211_free_hw(priv->hw); | |
8178 | out: | |
8179 | return err; | |
8180 | } | |
8181 | ||
bb8c093b | 8182 | static void iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 8183 | { |
c79dd5b5 | 8184 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
8185 | struct list_head *p, *q; |
8186 | int i; | |
8187 | ||
8188 | if (!priv) | |
8189 | return; | |
8190 | ||
8191 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
8192 | ||
b481de9c | 8193 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 8194 | |
bb8c093b | 8195 | iwl4965_down(priv); |
b481de9c ZY |
8196 | |
8197 | /* Free MAC hash list for ADHOC */ | |
8198 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) { | |
8199 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
8200 | list_del(p); | |
bb8c093b | 8201 | kfree(list_entry(p, struct iwl4965_ibss_seq, list)); |
b481de9c ZY |
8202 | } |
8203 | } | |
8204 | ||
712b6cf5 | 8205 | iwl_dbgfs_unregister(priv); |
bb8c093b | 8206 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); |
b481de9c | 8207 | |
bb8c093b | 8208 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
8209 | |
8210 | if (priv->rxq.bd) | |
bb8c093b CH |
8211 | iwl4965_rx_queue_free(priv, &priv->rxq); |
8212 | iwl4965_hw_txq_ctx_free(priv); | |
b481de9c | 8213 | |
bb8c093b | 8214 | iwl4965_unset_hw_setting(priv); |
bf85ea4f | 8215 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
8216 | |
8217 | if (priv->mac80211_registered) { | |
8218 | ieee80211_unregister_hw(priv->hw); | |
bb8c093b | 8219 | iwl4965_rate_control_unregister(priv->hw); |
b481de9c ZY |
8220 | } |
8221 | ||
948c171c MA |
8222 | /*netif_stop_queue(dev); */ |
8223 | flush_workqueue(priv->workqueue); | |
8224 | ||
bb8c093b | 8225 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
8226 | * priv->workqueue... so we can't take down the workqueue |
8227 | * until now... */ | |
8228 | destroy_workqueue(priv->workqueue); | |
8229 | priv->workqueue = NULL; | |
8230 | ||
b481de9c ZY |
8231 | pci_iounmap(pdev, priv->hw_base); |
8232 | pci_release_regions(pdev); | |
8233 | pci_disable_device(pdev); | |
8234 | pci_set_drvdata(pdev, NULL); | |
8235 | ||
bf85ea4f | 8236 | iwl_free_channel_map(priv); |
849e0dce | 8237 | iwl4965_free_geos(priv); |
b481de9c ZY |
8238 | |
8239 | if (priv->ibss_beacon) | |
8240 | dev_kfree_skb(priv->ibss_beacon); | |
8241 | ||
8242 | ieee80211_free_hw(priv->hw); | |
8243 | } | |
8244 | ||
8245 | #ifdef CONFIG_PM | |
8246 | ||
bb8c093b | 8247 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 8248 | { |
c79dd5b5 | 8249 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 8250 | |
e655b9f0 ZY |
8251 | if (priv->is_open) { |
8252 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
8253 | iwl4965_mac_stop(priv->hw); | |
8254 | priv->is_open = 1; | |
8255 | } | |
b481de9c | 8256 | |
b481de9c ZY |
8257 | pci_set_power_state(pdev, PCI_D3hot); |
8258 | ||
b481de9c ZY |
8259 | return 0; |
8260 | } | |
8261 | ||
bb8c093b | 8262 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 8263 | { |
c79dd5b5 | 8264 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 8265 | |
b481de9c | 8266 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 8267 | |
e655b9f0 ZY |
8268 | if (priv->is_open) |
8269 | iwl4965_mac_start(priv->hw); | |
b481de9c | 8270 | |
e655b9f0 | 8271 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
8272 | return 0; |
8273 | } | |
8274 | ||
8275 | #endif /* CONFIG_PM */ | |
8276 | ||
8277 | /***************************************************************************** | |
8278 | * | |
8279 | * driver and module entry point | |
8280 | * | |
8281 | *****************************************************************************/ | |
8282 | ||
bb8c093b | 8283 | static struct pci_driver iwl4965_driver = { |
b481de9c | 8284 | .name = DRV_NAME, |
bb8c093b CH |
8285 | .id_table = iwl4965_hw_card_ids, |
8286 | .probe = iwl4965_pci_probe, | |
8287 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 8288 | #ifdef CONFIG_PM |
bb8c093b CH |
8289 | .suspend = iwl4965_pci_suspend, |
8290 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
8291 | #endif |
8292 | }; | |
8293 | ||
bb8c093b | 8294 | static int __init iwl4965_init(void) |
b481de9c ZY |
8295 | { |
8296 | ||
8297 | int ret; | |
8298 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
8299 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
bb8c093b | 8300 | ret = pci_register_driver(&iwl4965_driver); |
b481de9c ZY |
8301 | if (ret) { |
8302 | IWL_ERROR("Unable to initialize PCI module\n"); | |
8303 | return ret; | |
8304 | } | |
0a6857e7 | 8305 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b | 8306 | ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level); |
b481de9c ZY |
8307 | if (ret) { |
8308 | IWL_ERROR("Unable to create driver sysfs file\n"); | |
bb8c093b | 8309 | pci_unregister_driver(&iwl4965_driver); |
b481de9c ZY |
8310 | return ret; |
8311 | } | |
8312 | #endif | |
8313 | ||
8314 | return ret; | |
8315 | } | |
8316 | ||
bb8c093b | 8317 | static void __exit iwl4965_exit(void) |
b481de9c | 8318 | { |
0a6857e7 | 8319 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b | 8320 | driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level); |
b481de9c | 8321 | #endif |
bb8c093b | 8322 | pci_unregister_driver(&iwl4965_driver); |
b481de9c ZY |
8323 | } |
8324 | ||
00acbc91 | 8325 | module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444); |
b481de9c | 8326 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); |
00acbc91 | 8327 | module_param_named(disable, iwl4965_mod_params.disable, int, 0444); |
b481de9c | 8328 | MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])"); |
00acbc91 | 8329 | module_param_named(hwcrypto, iwl4965_mod_params.hw_crypto, int, 0444); |
b481de9c ZY |
8330 | MODULE_PARM_DESC(hwcrypto, |
8331 | "using hardware crypto engine (default 0 [software])\n"); | |
00acbc91 | 8332 | module_param_named(debug, iwl4965_mod_params.debug, int, 0444); |
b481de9c | 8333 | MODULE_PARM_DESC(debug, "debug output mask"); |
00acbc91 AK |
8334 | module_param_named( |
8335 | disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444); | |
b481de9c ZY |
8336 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); |
8337 | ||
00acbc91 | 8338 | module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444); |
b481de9c ZY |
8339 | MODULE_PARM_DESC(queues_num, "number of hw queues."); |
8340 | ||
8341 | /* QoS */ | |
00acbc91 | 8342 | module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444); |
b481de9c | 8343 | MODULE_PARM_DESC(qos_enable, "enable all QoS functionality"); |
00acbc91 | 8344 | module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444); |
9ee1ba47 | 8345 | MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); |
b481de9c | 8346 | |
bb8c093b CH |
8347 | module_exit(iwl4965_exit); |
8348 | module_init(iwl4965_init); |