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iwlwifi: remove macros containing offsets from eeprom struct
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
b481de9c
ZY		 44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
82b9a121 49#include "iwl-core.h"
b481de9c
ZY		 50#include "iwl-4965.h"
51#include "iwl-helpers.h"
52
c79dd5b5 53static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 54 struct iwl4965_tx_queue *txq);
416e1438 55
b481de9c
ZY		 56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
62/* module parameters */
6440adb5
BC		 63static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
64static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
9fbab516
BC		 65static int iwl4965_param_disable; /* def: enable radio */
66static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
67int iwl4965_param_hwcrypto; /* def: using software encryption */
6440adb5
BC		 68static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
69int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
9ee1ba47 70int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
b481de9c
ZY		 71
72/*
73 * module name, copyright, version, etc.
74 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
75 */
76
77#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
78
0a6857e7 79#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 80#define VD "d"
81#else
82#define VD
83#endif
84
c8b0e6e1 85#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 86#define VS "s"
87#else
88#define VS
89#endif
90
df48c323 91#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 92
b481de9c
ZY		 93
94MODULE_DESCRIPTION(DRV_DESCRIPTION);
95MODULE_VERSION(DRV_VERSION);
96MODULE_AUTHOR(DRV_COPYRIGHT);
97MODULE_LICENSE("GPL");
98
99__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
100{
101 u16 fc = le16_to_cpu(hdr->frame_control);
102 int hdr_len = ieee80211_get_hdrlen(fc);
103
104 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
105 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
106 return NULL;
107}
108
8318d78a 109static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
c79dd5b5 110 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 111{
8318d78a 112 return priv->hw->wiphy->bands[band];
b481de9c
ZY		 113}
114
bb8c093b 115static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 116{
117 /* Single white space is for Linksys APs */
118 if (essid_len == 1 && essid[0] == ' ')
119 return 1;
120
121 /* Otherwise, if the entire essid is 0, we assume it is hidden */
122 while (essid_len) {
123 essid_len--;
124 if (essid[essid_len] != '\0')
125 return 0;
126 }
127
128 return 1;
129}
130
bb8c093b 131static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 132{
133 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
134 const char *s = essid;
135 char *d = escaped;
136
bb8c093b 137 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 138 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
139 return escaped;
140 }
141
142 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
143 while (essid_len--) {
144 if (*s == '\0') {
145 *d++ = '\\';
146 *d++ = '0';
147 s++;
148 } else
149 *d++ = *s++;
150 }
151 *d = '\0';
152 return escaped;
153}
154
b481de9c
ZY		 155/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
156 * DMA services
157 *
158 * Theory of operation
159 *
6440adb5
BC		 160 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
161 * of buffer descriptors, each of which points to one or more data buffers for
162 * the device to read from or fill. Driver and device exchange status of each
163 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
164 * entries in each circular buffer, to protect against confusing empty and full
165 * queue states.
166 *
167 * The device reads or writes the data in the queues via the device's several
168 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 169 *
170 * For Tx queue, there are low mark and high mark limits. If, after queuing
171 * the packet for Tx, free space become < low mark, Tx queue stopped. When
172 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
173 * Tx queue resumed.
174 *
6440adb5
BC		 175 * The 4965 operates with up to 17 queues: One receive queue, one transmit
176 * queue (#4) for sending commands to the device firmware, and 15 other
177 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 178 *
179 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 180 ***************************************************/
181
fe01b477 182int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 183{
fc4b6853 184 int s = q->read_ptr - q->write_ptr;
b481de9c 185
fc4b6853 186 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 187 s -= q->n_bd;
188
189 if (s <= 0)
190 s += q->n_window;
191 /* keep some reserve to not confuse empty and full situations */
192 s -= 2;
193 if (s < 0)
194 s = 0;
195 return s;
196}
197
b481de9c 198
bb8c093b 199static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 200{
fc4b6853
TW		 201 return q->write_ptr > q->read_ptr ?
202 (i >= q->read_ptr && i < q->write_ptr) :
203 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 204}
205
bb8c093b 206static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 207{
6440adb5 208 /* This is for scan command, the big buffer at end of command array */
b481de9c 209 if (is_huge)
6440adb5 210 return q->n_window; /* must be power of 2 */
b481de9c 211
6440adb5 212 /* Otherwise, use normal size buffers */
b481de9c
ZY		 213 return index & (q->n_window - 1);
214}
215
6440adb5
BC		 216/**
217 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
218 */
c79dd5b5 219static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 220 int count, int slots_num, u32 id)
221{
222 q->n_bd = count;
223 q->n_window = slots_num;
224 q->id = id;
225
c54b679d
TW		 226 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
227 * and iwl_queue_dec_wrap are broken. */
b481de9c
ZY		 228 BUG_ON(!is_power_of_2(count));
229
230 /* slots_num must be power-of-two size, otherwise
231 * get_cmd_index is broken. */
232 BUG_ON(!is_power_of_2(slots_num));
233
234 q->low_mark = q->n_window / 4;
235 if (q->low_mark < 4)
236 q->low_mark = 4;
237
238 q->high_mark = q->n_window / 8;
239 if (q->high_mark < 2)
240 q->high_mark = 2;
241
fc4b6853 242 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 243
244 return 0;
245}
246
6440adb5
BC		 247/**
248 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
249 */
c79dd5b5 250static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 251 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 252{
253 struct pci_dev *dev = priv->pci_dev;
254
6440adb5
BC		 255 /* Driver private data, only for Tx (not command) queues,
256 * not shared with device. */
b481de9c
ZY		 257 if (id != IWL_CMD_QUEUE_NUM) {
258 txq->txb = kmalloc(sizeof(txq->txb[0]) *
259 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
260 if (!txq->txb) {
01ebd063 261 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 262 "structures failed\n");
263 goto error;
264 }
265 } else
266 txq->txb = NULL;
267
6440adb5
BC		 268 /* Circular buffer of transmit frame descriptors (TFDs),
269 * shared with device */
b481de9c
ZY		 270 txq->bd = pci_alloc_consistent(dev,
271 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
272 &txq->q.dma_addr);
273
274 if (!txq->bd) {
275 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
276 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
277 goto error;
278 }
279 txq->q.id = id;
280
281 return 0;
282
283 error:
284 if (txq->txb) {
285 kfree(txq->txb);
286 txq->txb = NULL;
287 }
288
289 return -ENOMEM;
290}
291
8b6eaea8
BC		 292/**
293 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
294 */
c79dd5b5 295int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 296 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 297{
298 struct pci_dev *dev = priv->pci_dev;
299 int len;
300 int rc = 0;
301
8b6eaea8
BC		 302 /*
303 * Alloc buffer array for commands (Tx or other types of commands).
304 * For the command queue (#4), allocate command space + one big
305 * command for scan, since scan command is very huge; the system will
306 * not have two scans at the same time, so only one is needed.
bb54244b 307 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
BC		 308 * space is needed.
309 */
bb8c093b 310 len = sizeof(struct iwl4965_cmd) * slots_num;
b481de9c
ZY		 311 if (txq_id == IWL_CMD_QUEUE_NUM)
312 len += IWL_MAX_SCAN_SIZE;
313 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
314 if (!txq->cmd)
315 return -ENOMEM;
316
8b6eaea8 317 /* Alloc driver data array and TFD circular buffer */
bb8c093b 318 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 319 if (rc) {
320 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
321
322 return -ENOMEM;
323 }
324 txq->need_update = 0;
325
326 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 327 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 328 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
BC		 329
330 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 331 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 332
8b6eaea8 333 /* Tell device where to find queue */
bb8c093b 334 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 335
336 return 0;
337}
338
339/**
bb8c093b 340 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 341 * @txq: Transmit queue to deallocate.
342 *
343 * Empty queue by removing and destroying all BD's.
6440adb5
BC		 344 * Free all buffers.
345 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 346 */
c79dd5b5 347void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 348{
bb8c093b 349 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 350 struct pci_dev *dev = priv->pci_dev;
351 int len;
352
353 if (q->n_bd == 0)
354 return;
355
356 /* first, empty all BD's */
fc4b6853 357 for (; q->write_ptr != q->read_ptr;
c54b679d 358 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 359 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 360
bb8c093b 361 len = sizeof(struct iwl4965_cmd) * q->n_window;
b481de9c
ZY		 362 if (q->id == IWL_CMD_QUEUE_NUM)
363 len += IWL_MAX_SCAN_SIZE;
364
6440adb5 365 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 366 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
367
6440adb5 368 /* De-alloc circular buffer of TFDs */
b481de9c 369 if (txq->q.n_bd)
bb8c093b 370 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 371 txq->q.n_bd, txq->bd, txq->q.dma_addr);
372
6440adb5 373 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 374 if (txq->txb) {
375 kfree(txq->txb);
376 txq->txb = NULL;
377 }
378
6440adb5 379 /* 0-fill queue descriptor structure */
b481de9c
ZY		 380 memset(txq, 0, sizeof(*txq));
381}
382
bb8c093b 383const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 384
385/*************** STATION TABLE MANAGEMENT ****
9fbab516 386 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 387 * the functionality provided here
388 */
389
390/**************************************************************/
391
01ebd063 392#if 0 /* temporary disable till we add real remove station */
6440adb5
BC		 393/**
394 * iwl4965_remove_station - Remove driver's knowledge of station.
395 *
396 * NOTE: This does not remove station from device's station table.
397 */
c79dd5b5 398static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 399{
400 int index = IWL_INVALID_STATION;
401 int i;
402 unsigned long flags;
403
404 spin_lock_irqsave(&priv->sta_lock, flags);
405
406 if (is_ap)
407 index = IWL_AP_ID;
408 else if (is_broadcast_ether_addr(addr))
409 index = priv->hw_setting.bcast_sta_id;
410 else
411 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
412 if (priv->stations[i].used &&
413 !compare_ether_addr(priv->stations[i].sta.sta.addr,
414 addr)) {
415 index = i;
416 break;
417 }
418
419 if (unlikely(index == IWL_INVALID_STATION))
420 goto out;
421
422 if (priv->stations[index].used) {
423 priv->stations[index].used = 0;
424 priv->num_stations--;
425 }
426
427 BUG_ON(priv->num_stations < 0);
428
429out:
430 spin_unlock_irqrestore(&priv->sta_lock, flags);
431 return 0;
432}
556f8db7 433#endif
b481de9c 434
6440adb5
BC		 435/**
436 * iwl4965_clear_stations_table - Clear the driver's station table
437 *
438 * NOTE: This does not clear or otherwise alter the device's station table.
439 */
c79dd5b5 440static void iwl4965_clear_stations_table(struct iwl_priv *priv)
b481de9c
ZY		 441{
442 unsigned long flags;
443
444 spin_lock_irqsave(&priv->sta_lock, flags);
445
446 priv->num_stations = 0;
447 memset(priv->stations, 0, sizeof(priv->stations));
448
449 spin_unlock_irqrestore(&priv->sta_lock, flags);
450}
451
6440adb5
BC		 452/**
453 * iwl4965_add_station_flags - Add station to tables in driver and device
454 */
c79dd5b5 455u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 456 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 457{
458 int i;
459 int index = IWL_INVALID_STATION;
bb8c093b 460 struct iwl4965_station_entry *station;
b481de9c 461 unsigned long flags_spin;
0795af57 462 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 463
464 spin_lock_irqsave(&priv->sta_lock, flags_spin);
465 if (is_ap)
466 index = IWL_AP_ID;
467 else if (is_broadcast_ether_addr(addr))
468 index = priv->hw_setting.bcast_sta_id;
469 else
470 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
471 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
472 addr)) {
473 index = i;
474 break;
475 }
476
477 if (!priv->stations[i].used &&
478 index == IWL_INVALID_STATION)
479 index = i;
480 }
481
482
9fbab516
BC		 483 /* These two conditions have the same outcome, but keep them separate
484 since they have different meanings */
b481de9c
ZY		 485 if (unlikely(index == IWL_INVALID_STATION)) {
486 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
487 return index;
488 }
489
490 if (priv->stations[index].used &&
491 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
492 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
493 return index;
494 }
495
496
0795af57 497 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 498 station = &priv->stations[index];
499 station->used = 1;
500 priv->num_stations++;
501
6440adb5 502 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 503 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 504 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
505 station->sta.mode = 0;
506 station->sta.sta.sta_id = index;
507 station->sta.station_flags = 0;
508
c8b0e6e1 509#ifdef CONFIG_IWL4965_HT
b481de9c
ZY		 510 /* BCAST station and IBSS stations do not work in HT mode */
511 if (index != priv->hw_setting.bcast_sta_id &&
512 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 513 iwl4965_set_ht_add_station(priv, index,
514 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 515#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 516
517 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
BC		 518
519 /* Add station to device's station table */
bb8c093b 520 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 521 return index;
522
523}
524
525/*************** DRIVER STATUS FUNCTIONS *****/
526
c79dd5b5 527static inline int iwl4965_is_ready(struct iwl_priv *priv)
b481de9c
ZY		 528{
529 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
530 * set but EXIT_PENDING is not */
531 return test_bit(STATUS_READY, &priv->status) &&
532 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
533 !test_bit(STATUS_EXIT_PENDING, &priv->status);
534}
535
c79dd5b5 536static inline int iwl4965_is_alive(struct iwl_priv *priv)
b481de9c
ZY		 537{
538 return test_bit(STATUS_ALIVE, &priv->status);
539}
540
c79dd5b5 541static inline int iwl4965_is_init(struct iwl_priv *priv)
b481de9c
ZY		 542{
543 return test_bit(STATUS_INIT, &priv->status);
544}
545
c79dd5b5 546static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
b481de9c
ZY		 547{
548 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
549 test_bit(STATUS_RF_KILL_SW, &priv->status);
550}
551
c79dd5b5 552static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
b481de9c
ZY		 553{
554
bb8c093b 555 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 556 return 0;
557
bb8c093b 558 return iwl4965_is_ready(priv);
b481de9c
ZY		 559}
560
561/*************** HOST COMMAND QUEUE FUNCTIONS *****/
562
563#define IWL_CMD(x) case x : return #x
564
565static const char *get_cmd_string(u8 cmd)
566{
567 switch (cmd) {
568 IWL_CMD(REPLY_ALIVE);
569 IWL_CMD(REPLY_ERROR);
570 IWL_CMD(REPLY_RXON);
571 IWL_CMD(REPLY_RXON_ASSOC);
572 IWL_CMD(REPLY_QOS_PARAM);
573 IWL_CMD(REPLY_RXON_TIMING);
574 IWL_CMD(REPLY_ADD_STA);
575 IWL_CMD(REPLY_REMOVE_STA);
576 IWL_CMD(REPLY_REMOVE_ALL_STA);
577 IWL_CMD(REPLY_TX);
578 IWL_CMD(REPLY_RATE_SCALE);
579 IWL_CMD(REPLY_LEDS_CMD);
580 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
581 IWL_CMD(RADAR_NOTIFICATION);
582 IWL_CMD(REPLY_QUIET_CMD);
583 IWL_CMD(REPLY_CHANNEL_SWITCH);
584 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
585 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
586 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
587 IWL_CMD(POWER_TABLE_CMD);
588 IWL_CMD(PM_SLEEP_NOTIFICATION);
589 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
590 IWL_CMD(REPLY_SCAN_CMD);
591 IWL_CMD(REPLY_SCAN_ABORT_CMD);
592 IWL_CMD(SCAN_START_NOTIFICATION);
593 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
594 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
595 IWL_CMD(BEACON_NOTIFICATION);
596 IWL_CMD(REPLY_TX_BEACON);
597 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
598 IWL_CMD(QUIET_NOTIFICATION);
599 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
600 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
601 IWL_CMD(REPLY_BT_CONFIG);
602 IWL_CMD(REPLY_STATISTICS_CMD);
603 IWL_CMD(STATISTICS_NOTIFICATION);
604 IWL_CMD(REPLY_CARD_STATE_CMD);
605 IWL_CMD(CARD_STATE_NOTIFICATION);
606 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
607 IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
608 IWL_CMD(SENSITIVITY_CMD);
609 IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
610 IWL_CMD(REPLY_RX_PHY_CMD);
611 IWL_CMD(REPLY_RX_MPDU_CMD);
612 IWL_CMD(REPLY_4965_RX);
613 IWL_CMD(REPLY_COMPRESSED_BA);
614 default:
615 return "UNKNOWN";
616
617 }
618}
619
620#define HOST_COMPLETE_TIMEOUT (HZ / 2)
621
622/**
bb8c093b 623 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 624 * @priv: device private data point
625 * @cmd: a point to the ucode command structure
626 *
627 * The function returns < 0 values to indicate the operation is
628 * failed. On success, it turns the index (> 0) of command in the
629 * command queue.
630 */
c79dd5b5 631static int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 632{
bb8c093b
CH		 633 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
634 struct iwl4965_queue *q = &txq->q;
635 struct iwl4965_tfd_frame *tfd;
b481de9c 636 u32 *control_flags;
bb8c093b 637 struct iwl4965_cmd *out_cmd;
b481de9c
ZY		 638 u32 idx;
639 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
640 dma_addr_t phys_addr;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
c342a1b9
GG		 650 if (iwl4965_is_rfkill(priv)) {
651 IWL_DEBUG_INFO("Not sending command - RF KILL");
652 return -EIO;
653 }
654
bb8c093b 655 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 656 IWL_ERROR("No space for Tx\n");
657 return -ENOSPC;
658 }
659
660 spin_lock_irqsave(&priv->hcmd_lock, flags);
661
fc4b6853 662 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 663 memset(tfd, 0, sizeof(*tfd));
664
665 control_flags = (u32 *) tfd;
666
fc4b6853 667 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 668 out_cmd = &txq->cmd[idx];
669
670 out_cmd->hdr.cmd = cmd->id;
671 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
672 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
673
674 /* At this point, the out_cmd now has all of the incoming cmd
675 * information */
676
677 out_cmd->hdr.flags = 0;
678 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 679 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 680 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
681 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
682
683 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
bb8c093b
CH		 684 offsetof(struct iwl4965_cmd, hdr);
685 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 686
687 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
688 "%d bytes at %d[%d]:%d\n",
689 get_cmd_string(out_cmd->hdr.cmd),
690 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 691 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 692
693 txq->need_update = 1;
6440adb5
BC		 694
695 /* Set up entry in queue's byte count circular buffer */
b481de9c 696 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
6440adb5
BC		 697
698 /* Increment and update queue's write index */
c54b679d 699 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 700 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 701
702 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
703 return ret ? ret : idx;
704}
705
c79dd5b5 706static int iwl4965_send_cmd_async(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 707{
708 int ret;
709
710 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
711
712 /* An asynchronous command can not expect an SKB to be set. */
713 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
714
715 /* An asynchronous command MUST have a callback. */
716 BUG_ON(!cmd->meta.u.callback);
717
718 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
719 return -EBUSY;
720
bb8c093b 721 ret = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c 722 if (ret < 0) {
bb8c093b 723 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 724 get_cmd_string(cmd->id), ret);
725 return ret;
726 }
727 return 0;
728}
729
c79dd5b5 730static int iwl4965_send_cmd_sync(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c
ZY		 731{
732 int cmd_idx;
733 int ret;
734 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
735
736 BUG_ON(cmd->meta.flags & CMD_ASYNC);
737
738 /* A synchronous command can not have a callback set. */
739 BUG_ON(cmd->meta.u.callback != NULL);
740
741 if (atomic_xchg(&entry, 1)) {
742 IWL_ERROR("Error sending %s: Already sending a host command\n",
743 get_cmd_string(cmd->id));
744 return -EBUSY;
745 }
746
747 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
748
749 if (cmd->meta.flags & CMD_WANT_SKB)
750 cmd->meta.source = &cmd->meta;
751
bb8c093b 752 cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
b481de9c
ZY		 753 if (cmd_idx < 0) {
754 ret = cmd_idx;
bb8c093b 755 IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
b481de9c
ZY		 756 get_cmd_string(cmd->id), ret);
757 goto out;
758 }
759
760 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
761 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
762 HOST_COMPLETE_TIMEOUT);
763 if (!ret) {
764 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
765 IWL_ERROR("Error sending %s: time out after %dms.\n",
766 get_cmd_string(cmd->id),
767 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
768
769 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
770 ret = -ETIMEDOUT;
771 goto cancel;
772 }
773 }
774
775 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
776 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
777 get_cmd_string(cmd->id));
778 ret = -ECANCELED;
779 goto fail;
780 }
781 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
782 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
783 get_cmd_string(cmd->id));
784 ret = -EIO;
785 goto fail;
786 }
787 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
788 IWL_ERROR("Error: Response NULL in '%s'\n",
789 get_cmd_string(cmd->id));
790 ret = -EIO;
791 goto out;
792 }
793
794 ret = 0;
795 goto out;
796
797cancel:
798 if (cmd->meta.flags & CMD_WANT_SKB) {
bb8c093b 799 struct iwl4965_cmd *qcmd;
b481de9c
ZY		 800
801 /* Cancel the CMD_WANT_SKB flag for the cmd in the
802 * TX cmd queue. Otherwise in case the cmd comes
803 * in later, it will possibly set an invalid
804 * address (cmd->meta.source). */
805 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
806 qcmd->meta.flags &= ~CMD_WANT_SKB;
807 }
808fail:
809 if (cmd->meta.u.skb) {
810 dev_kfree_skb_any(cmd->meta.u.skb);
811 cmd->meta.u.skb = NULL;
812 }
813out:
814 atomic_set(&entry, 0);
815 return ret;
816}
817
c79dd5b5 818int iwl4965_send_cmd(struct iwl_priv *priv, struct iwl4965_host_cmd *cmd)
b481de9c 819{
b481de9c 820 if (cmd->meta.flags & CMD_ASYNC)
bb8c093b 821 return iwl4965_send_cmd_async(priv, cmd);
b481de9c 822
bb8c093b 823 return iwl4965_send_cmd_sync(priv, cmd);
b481de9c
ZY		 824}
825
c79dd5b5 826int iwl4965_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
b481de9c 827{
bb8c093b 828 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 829 .id = id,
830 .len = len,
831 .data = data,
832 };
833
bb8c093b 834 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 835}
836
c79dd5b5 837static int __must_check iwl4965_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
b481de9c 838{
bb8c093b 839 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 840 .id = id,
841 .len = sizeof(val),
842 .data = &val,
843 };
844
bb8c093b 845 return iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 846}
847
c79dd5b5 848int iwl4965_send_statistics_request(struct iwl_priv *priv)
b481de9c 849{
bb8c093b 850 return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
b481de9c
ZY		 851}
852
853/**
bb8c093b 854 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 855 *
856 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 857 * NOTE: mutex must be held before calling this fnction
858 */
c79dd5b5 859static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY		 860 const u8 *addr, int is_ap)
861{
556f8db7 862 u8 sta_id;
b481de9c 863
6440adb5 864 /* Add station to device's station table */
67d62035
RR		 865#ifdef CONFIG_IWL4965_HT
866 struct ieee80211_conf *conf = &priv->hw->conf;
867 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
868
869 if ((is_ap) &&
870 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
871 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
872 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
873 0, cur_ht_config);
874 else
875#endif /* CONFIG_IWL4965_HT */
876 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
877 0, NULL);
6440adb5
BC		 878
879 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 880 iwl4965_add_station(priv, addr, is_ap);
881
556f8db7 882 return sta_id;
b481de9c
ZY		 883}
884
885/**
bb8c093b 886 * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
b481de9c
ZY		 887 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
888 * @channel: Any channel valid for the requested phymode
889
890 * In addition to setting the staging RXON, priv->phymode is also set.
891 *
892 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
893 * in the staging RXON flag structure based on the phymode
894 */
c79dd5b5 895static int iwl4965_set_rxon_channel(struct iwl_priv *priv,
8318d78a 896 enum ieee80211_band band,
9fbab516 897 u16 channel)
b481de9c 898{
8318d78a 899 if (!iwl4965_get_channel_info(priv, band, channel)) {
b481de9c 900 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
8318d78a 901 channel, band);
b481de9c
ZY		 902 return -EINVAL;
903 }
904
905 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
8318d78a 906 (priv->band == band))
b481de9c
ZY		 907 return 0;
908
909 priv->staging_rxon.channel = cpu_to_le16(channel);
8318d78a 910 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 911 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
912 else
913 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
914
8318d78a 915 priv->band = band;
b481de9c 916
8318d78a 917 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
b481de9c
ZY		 918
919 return 0;
920}
921
922/**
bb8c093b 923 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 924 *
925 * NOTE: This is really only useful during development and can eventually
926 * be #ifdef'd out once the driver is stable and folks aren't actively
927 * making changes
928 */
bb8c093b 929static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 930{
931 int error = 0;
932 int counter = 1;
933
934 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
935 error |= le32_to_cpu(rxon->flags &
936 (RXON_FLG_TGJ_NARROW_BAND_MSK |
937 RXON_FLG_RADAR_DETECT_MSK));
938 if (error)
939 IWL_WARNING("check 24G fields %d | %d\n",
940 counter++, error);
941 } else {
942 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
943 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
944 if (error)
945 IWL_WARNING("check 52 fields %d | %d\n",
946 counter++, error);
947 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
948 if (error)
949 IWL_WARNING("check 52 CCK %d | %d\n",
950 counter++, error);
951 }
952 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
953 if (error)
954 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
955
956 /* make sure basic rates 6Mbps and 1Mbps are supported */
957 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
958 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
959 if (error)
960 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
961
962 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
963 if (error)
964 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
965
966 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
967 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
968 if (error)
969 IWL_WARNING("check CCK and short slot %d | %d\n",
970 counter++, error);
971
972 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
973 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
974 if (error)
975 IWL_WARNING("check CCK & auto detect %d | %d\n",
976 counter++, error);
977
978 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
979 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
980 if (error)
981 IWL_WARNING("check TGG and auto detect %d | %d\n",
982 counter++, error);
983
984 if (error)
985 IWL_WARNING("Tuning to channel %d\n",
986 le16_to_cpu(rxon->channel));
987
988 if (error) {
bb8c093b 989 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 990 return -1;
991 }
992 return 0;
993}
994
995/**
9fbab516 996 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 997 * @priv: staging_rxon is compared to active_rxon
b481de9c 998 *
9fbab516
BC		 999 * If the RXON structure is changing enough to require a new tune,
1000 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
1001 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 1002 */
c79dd5b5 1003static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 1004{
1005
1006 /* These items are only settable from the full RXON command */
1007 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
1008 compare_ether_addr(priv->staging_rxon.bssid_addr,
1009 priv->active_rxon.bssid_addr) ||
1010 compare_ether_addr(priv->staging_rxon.node_addr,
1011 priv->active_rxon.node_addr) ||
1012 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
1013 priv->active_rxon.wlap_bssid_addr) ||
1014 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
1015 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
1016 (priv->staging_rxon.air_propagation !=
1017 priv->active_rxon.air_propagation) ||
1018 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
1019 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
1020 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
1021 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
1022 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
1023 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
1024 return 1;
1025
1026 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
1027 * be updated with the RXON_ASSOC command -- however only some
1028 * flag transitions are allowed using RXON_ASSOC */
1029
1030 /* Check if we are not switching bands */
1031 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1032 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1033 return 1;
1034
1035 /* Check if we are switching association toggle */
1036 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1037 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1038 return 1;
1039
1040 return 0;
1041}
1042
c79dd5b5 1043static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
b481de9c
ZY		 1044{
1045 int rc = 0;
bb8c093b
CH		 1046 struct iwl4965_rx_packet *res = NULL;
1047 struct iwl4965_rxon_assoc_cmd rxon_assoc;
1048 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1049 .id = REPLY_RXON_ASSOC,
1050 .len = sizeof(rxon_assoc),
1051 .meta.flags = CMD_WANT_SKB,
1052 .data = &rxon_assoc,
1053 };
bb8c093b
CH		 1054 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
1055 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
b481de9c
ZY		 1056
1057 if ((rxon1->flags == rxon2->flags) &&
1058 (rxon1->filter_flags == rxon2->filter_flags) &&
1059 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1060 (rxon1->ofdm_ht_single_stream_basic_rates ==
1061 rxon2->ofdm_ht_single_stream_basic_rates) &&
1062 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1063 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1064 (rxon1->rx_chain == rxon2->rx_chain) &&
1065 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1066 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1067 return 0;
1068 }
1069
1070 rxon_assoc.flags = priv->staging_rxon.flags;
1071 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1072 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1073 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1074 rxon_assoc.reserved = 0;
1075 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1076 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1077 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1078 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1079 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1080
bb8c093b 1081 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1082 if (rc)
1083 return rc;
1084
bb8c093b 1085 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1086 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1087 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1088 rc = -EIO;
1089 }
1090
1091 priv->alloc_rxb_skb--;
1092 dev_kfree_skb_any(cmd.meta.u.skb);
1093
1094 return rc;
1095}
1096
1097/**
bb8c093b 1098 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 1099 *
01ebd063 1100 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 1101 * the active_rxon structure is updated with the new data. This
1102 * function correctly transitions out of the RXON_ASSOC_MSK state if
1103 * a HW tune is required based on the RXON structure changes.
1104 */
c79dd5b5 1105static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 1106{
1107 /* cast away the const for active_rxon in this function */
bb8c093b 1108 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 1109 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 1110 int rc = 0;
1111
bb8c093b 1112 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 1113 return -1;
1114
1115 /* always get timestamp with Rx frame */
1116 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1117
bb8c093b 1118 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 1119 if (rc) {
1120 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1121 return -EINVAL;
1122 }
1123
1124 /* If we don't need to send a full RXON, we can use
bb8c093b 1125 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 1126 * and other flags for the current radio configuration. */
bb8c093b
CH		 1127 if (!iwl4965_full_rxon_required(priv)) {
1128 rc = iwl4965_send_rxon_assoc(priv);
b481de9c
ZY		 1129 if (rc) {
1130 IWL_ERROR("Error setting RXON_ASSOC "
1131 "configuration (%d).\n", rc);
1132 return rc;
1133 }
1134
1135 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1136
1137 return 0;
1138 }
1139
1140 /* station table will be cleared */
1141 priv->assoc_station_added = 0;
1142
c8b0e6e1 1143#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1144 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1145 if (!priv->error_recovering)
1146 priv->start_calib = 0;
1147
1148 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1149#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1150
1151 /* If we are currently associated and the new config requires
1152 * an RXON_ASSOC and the new config wants the associated mask enabled,
1153 * we must clear the associated from the active configuration
1154 * before we apply the new config */
bb8c093b 1155 if (iwl4965_is_associated(priv) &&
b481de9c
ZY		 1156 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1157 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1158 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1159
bb8c093b
CH		 1160 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1161 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 1162 &priv->active_rxon);
1163
1164 /* If the mask clearing failed then we set
1165 * active_rxon back to what it was previously */
1166 if (rc) {
1167 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1168 IWL_ERROR("Error clearing ASSOC_MSK on current "
1169 "configuration (%d).\n", rc);
1170 return rc;
1171 }
b481de9c
ZY		 1172 }
1173
1174 IWL_DEBUG_INFO("Sending RXON\n"
1175 "* with%s RXON_FILTER_ASSOC_MSK\n"
1176 "* channel = %d\n"
0795af57 1177 "* bssid = %s\n",
b481de9c
ZY		 1178 ((priv->staging_rxon.filter_flags &
1179 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1180 le16_to_cpu(priv->staging_rxon.channel),
0795af57 1181 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c
ZY		 1182
1183 /* Apply the new configuration */
bb8c093b
CH		 1184 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
1185 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 1186 if (rc) {
1187 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1188 return rc;
1189 }
1190
bb8c093b 1191 iwl4965_clear_stations_table(priv);
556f8db7 1192
c8b0e6e1 1193#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 1194 if (!priv->error_recovering)
1195 priv->start_calib = 0;
1196
1197 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
1198 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 1199#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 1200
1201 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1202
1203 /* If we issue a new RXON command which required a tune then we must
1204 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 1205 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 1206 if (rc) {
1207 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1208 return rc;
1209 }
1210
1211 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 1212 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 1213 IWL_INVALID_STATION) {
1214 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1215 return -EIO;
1216 }
1217
1218 /* If we have set the ASSOC_MSK and we are in BSS mode then
1219 * add the IWL_AP_ID to the station rate table */
bb8c093b 1220 if (iwl4965_is_associated(priv) &&
b481de9c 1221 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 1222 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 1223 == IWL_INVALID_STATION) {
1224 IWL_ERROR("Error adding AP address for transmit.\n");
1225 return -EIO;
1226 }
1227 priv->assoc_station_added = 1;
1228 }
1229
1230 return 0;
1231}
1232
c79dd5b5 1233static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 1234{
bb8c093b 1235 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 1236 .flags = 3,
1237 .lead_time = 0xAA,
1238 .max_kill = 1,
1239 .kill_ack_mask = 0,
1240 .kill_cts_mask = 0,
1241 };
1242
bb8c093b
CH		 1243 return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1244 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 1245}
1246
c79dd5b5 1247static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY		 1248{
1249 int rc = 0;
bb8c093b
CH		 1250 struct iwl4965_rx_packet *res;
1251 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1252 .id = REPLY_SCAN_ABORT_CMD,
1253 .meta.flags = CMD_WANT_SKB,
1254 };
1255
1256 /* If there isn't a scan actively going on in the hardware
1257 * then we are in between scan bands and not actually
1258 * actively scanning, so don't send the abort command */
1259 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1260 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1261 return 0;
1262 }
1263
bb8c093b 1264 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1265 if (rc) {
1266 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1267 return rc;
1268 }
1269
bb8c093b 1270 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1271 if (res->u.status != CAN_ABORT_STATUS) {
1272 /* The scan abort will return 1 for success or
1273 * 2 for "failure". A failure condition can be
1274 * due to simply not being in an active scan which
1275 * can occur if we send the scan abort before we
1276 * the microcode has notified us that a scan is
1277 * completed. */
1278 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1279 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1280 clear_bit(STATUS_SCAN_HW, &priv->status);
1281 }
1282
1283 dev_kfree_skb_any(cmd.meta.u.skb);
1284
1285 return rc;
1286}
1287
c79dd5b5 1288static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
bb8c093b 1289 struct iwl4965_cmd *cmd,
b481de9c
ZY		 1290 struct sk_buff *skb)
1291{
1292 return 1;
1293}
1294
1295/*
1296 * CARD_STATE_CMD
1297 *
9fbab516 1298 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 1299 *
1300 * When in the 'enable' state the card operates as normal.
1301 * When in the 'disable' state, the card enters into a low power mode.
1302 * When in the 'halt' state, the card is shut down and must be fully
1303 * restarted to come back on.
1304 */
c79dd5b5 1305static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 1306{
bb8c093b 1307 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 1308 .id = REPLY_CARD_STATE_CMD,
1309 .len = sizeof(u32),
1310 .data = &flags,
1311 .meta.flags = meta_flag,
1312 };
1313
1314 if (meta_flag & CMD_ASYNC)
bb8c093b 1315 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 1316
bb8c093b 1317 return iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1318}
1319
c79dd5b5 1320static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
bb8c093b 1321 struct iwl4965_cmd *cmd, struct sk_buff *skb)
b481de9c 1322{
bb8c093b 1323 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY		 1324
1325 if (!skb) {
1326 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1327 return 1;
1328 }
1329
bb8c093b 1330 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY		 1331 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1332 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1333 res->hdr.flags);
1334 return 1;
1335 }
1336
1337 switch (res->u.add_sta.status) {
1338 case ADD_STA_SUCCESS_MSK:
1339 break;
1340 default:
1341 break;
1342 }
1343
1344 /* We didn't cache the SKB; let the caller free it */
1345 return 1;
1346}
1347
c79dd5b5 1348int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 1349 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1350{
bb8c093b 1351 struct iwl4965_rx_packet *res = NULL;
b481de9c 1352 int rc = 0;
bb8c093b 1353 struct iwl4965_host_cmd cmd = {
b481de9c 1354 .id = REPLY_ADD_STA,
bb8c093b 1355 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 1356 .meta.flags = flags,
1357 .data = sta,
1358 };
1359
1360 if (flags & CMD_ASYNC)
bb8c093b 1361 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY		 1362 else
1363 cmd.meta.flags |= CMD_WANT_SKB;
1364
bb8c093b 1365 rc = iwl4965_send_cmd(priv, &cmd);
b481de9c
ZY		 1366
1367 if (rc || (flags & CMD_ASYNC))
1368 return rc;
1369
bb8c093b 1370 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1371 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1372 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1373 res->hdr.flags);
1374 rc = -EIO;
1375 }
1376
1377 if (rc == 0) {
1378 switch (res->u.add_sta.status) {
1379 case ADD_STA_SUCCESS_MSK:
1380 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1381 break;
1382 default:
1383 rc = -EIO;
1384 IWL_WARNING("REPLY_ADD_STA failed\n");
1385 break;
1386 }
1387 }
1388
1389 priv->alloc_rxb_skb--;
1390 dev_kfree_skb_any(cmd.meta.u.skb);
1391
1392 return rc;
1393}
1394
c79dd5b5 1395static int iwl4965_update_sta_key_info(struct iwl_priv *priv,
b481de9c
ZY		 1396 struct ieee80211_key_conf *keyconf,
1397 u8 sta_id)
1398{
1399 unsigned long flags;
1400 __le16 key_flags = 0;
1401
1402 switch (keyconf->alg) {
1403 case ALG_CCMP:
1404 key_flags |= STA_KEY_FLG_CCMP;
1405 key_flags |= cpu_to_le16(
1406 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1407 key_flags &= ~STA_KEY_FLG_INVALID;
1408 break;
1409 case ALG_TKIP:
1410 case ALG_WEP:
b481de9c
ZY		 1411 default:
1412 return -EINVAL;
1413 }
1414 spin_lock_irqsave(&priv->sta_lock, flags);
1415 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1416 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1417 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1418 keyconf->keylen);
1419
1420 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1421 keyconf->keylen);
1422 priv->stations[sta_id].sta.key.key_flags = key_flags;
1423 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1424 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1425
1426 spin_unlock_irqrestore(&priv->sta_lock, flags);
1427
1428 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
bb8c093b 1429 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1430 return 0;
1431}
1432
c79dd5b5 1433static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
ZY		 1434{
1435 unsigned long flags;
1436
1437 spin_lock_irqsave(&priv->sta_lock, flags);
bb8c093b
CH		 1438 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1439 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
b481de9c
ZY		 1440 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1441 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1442 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1443 spin_unlock_irqrestore(&priv->sta_lock, flags);
1444
1445 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
bb8c093b 1446 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1447 return 0;
1448}
1449
c79dd5b5 1450static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 1451{
1452 struct list_head *element;
1453
1454 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1455 priv->frames_count);
1456
1457 while (!list_empty(&priv->free_frames)) {
1458 element = priv->free_frames.next;
1459 list_del(element);
bb8c093b 1460 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1461 priv->frames_count--;
1462 }
1463
1464 if (priv->frames_count) {
1465 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1466 priv->frames_count);
1467 priv->frames_count = 0;
1468 }
1469}
1470
c79dd5b5 1471static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1472{
bb8c093b 1473 struct iwl4965_frame *frame;
b481de9c
ZY		 1474 struct list_head *element;
1475 if (list_empty(&priv->free_frames)) {
1476 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1477 if (!frame) {
1478 IWL_ERROR("Could not allocate frame!\n");
1479 return NULL;
1480 }
1481
1482 priv->frames_count++;
1483 return frame;
1484 }
1485
1486 element = priv->free_frames.next;
1487 list_del(element);
bb8c093b 1488 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1489}
1490
c79dd5b5 1491static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1492{
1493 memset(frame, 0, sizeof(*frame));
1494 list_add(&frame->list, &priv->free_frames);
1495}
1496
c79dd5b5 1497unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY		 1498 struct ieee80211_hdr *hdr,
1499 const u8 *dest, int left)
1500{
1501
bb8c093b 1502 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1503 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1504 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1505 return 0;
1506
1507 if (priv->ibss_beacon->len > left)
1508 return 0;
1509
1510 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1511
1512 return priv->ibss_beacon->len;
1513}
1514
bb8c093b 1515static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY		 1516{
1517 u8 i;
1518
1519 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1520 i = iwl4965_rates[i].next_ieee) {
b481de9c 1521 if (rate_mask & (1 << i))
bb8c093b 1522 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1523 }
1524
1525 return IWL_RATE_INVALID;
1526}
1527
c79dd5b5 1528static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1529{
bb8c093b 1530 struct iwl4965_frame *frame;
b481de9c
ZY		 1531 unsigned int frame_size;
1532 int rc;
1533 u8 rate;
1534
bb8c093b 1535 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1536
1537 if (!frame) {
1538 IWL_ERROR("Could not obtain free frame buffer for beacon "
1539 "command.\n");
1540 return -ENOMEM;
1541 }
1542
1543 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1544 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY		 1545 0xFF0);
1546 if (rate == IWL_INVALID_RATE)
1547 rate = IWL_RATE_6M_PLCP;
1548 } else {
bb8c093b 1549 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY		 1550 if (rate == IWL_INVALID_RATE)
1551 rate = IWL_RATE_1M_PLCP;
1552 }
1553
bb8c093b 1554 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1555
bb8c093b 1556 rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1557 &frame->u.cmd[0]);
1558
bb8c093b 1559 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1560
1561 return rc;
1562}
1563
b481de9c
ZY		 1564/******************************************************************************
1565 *
1566 * Misc. internal state and helper functions
1567 *
1568 ******************************************************************************/
b481de9c 1569
c79dd5b5 1570static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
b481de9c
ZY		 1571{
1572 if (priv->hw_setting.shared_virt)
1573 pci_free_consistent(priv->pci_dev,
bb8c093b 1574 sizeof(struct iwl4965_shared),
b481de9c
ZY		 1575 priv->hw_setting.shared_virt,
1576 priv->hw_setting.shared_phys);
1577}
1578
1579/**
bb8c093b 1580 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1581 *
1582 * return : set the bit for each supported rate insert in ie
1583 */
bb8c093b 1584static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1585 u16 basic_rate, int *left)
b481de9c
ZY		 1586{
1587 u16 ret_rates = 0, bit;
1588 int i;
c7c46676
TW		 1589 u8 *cnt = ie;
1590 u8 *rates = ie + 1;
b481de9c
ZY		 1591
1592 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1593 if (bit & supported_rate) {
1594 ret_rates |= bit;
bb8c093b 1595 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1596 ((bit & basic_rate) ? 0x80 : 0x00);
1597 (*cnt)++;
1598 (*left)--;
1599 if ((*left <= 0) ||
1600 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1601 break;
1602 }
1603 }
1604
1605 return ret_rates;
1606}
1607
b481de9c 1608/**
bb8c093b 1609 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1610 */
c79dd5b5 1611static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW		 1612 enum ieee80211_band band,
1613 struct ieee80211_mgmt *frame,
1614 int left, int is_direct)
b481de9c
ZY		 1615{
1616 int len = 0;
1617 u8 *pos = NULL;
bee488db 1618 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
8fb88032 1619#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1620 const struct ieee80211_supported_band *sband =
1621 iwl4965_get_hw_mode(priv, band);
8fb88032 1622#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 1623
1624 /* Make sure there is enough space for the probe request,
1625 * two mandatory IEs and the data */
1626 left -= 24;
1627 if (left < 0)
1628 return 0;
1629 len += 24;
1630
1631 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1632 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1633 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1634 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1635 frame->seq_ctrl = 0;
1636
1637 /* fill in our indirect SSID IE */
1638 /* ...next IE... */
1639
1640 left -= 2;
1641 if (left < 0)
1642 return 0;
1643 len += 2;
1644 pos = &(frame->u.probe_req.variable[0]);
1645 *pos++ = WLAN_EID_SSID;
1646 *pos++ = 0;
1647
1648 /* fill in our direct SSID IE... */
1649 if (is_direct) {
1650 /* ...next IE... */
1651 left -= 2 + priv->essid_len;
1652 if (left < 0)
1653 return 0;
1654 /* ... fill it in... */
1655 *pos++ = WLAN_EID_SSID;
1656 *pos++ = priv->essid_len;
1657 memcpy(pos, priv->essid, priv->essid_len);
1658 pos += priv->essid_len;
1659 len += 2 + priv->essid_len;
1660 }
1661
1662 /* fill in supported rate */
1663 /* ...next IE... */
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
c7c46676 1667
b481de9c
ZY		 1668 /* ... fill it in... */
1669 *pos++ = WLAN_EID_SUPP_RATES;
1670 *pos = 0;
c7c46676 1671
bee488db 1672 /* exclude 60M rate */
1673 active_rates = priv->rates_mask;
1674 active_rates &= ~IWL_RATE_60M_MASK;
1675
1676 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1677
c7c46676 1678 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1679 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1680 active_rate_basic, &left);
c7c46676
TW		 1681 active_rates &= ~ret_rates;
1682
bb8c093b 1683 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1684 active_rate_basic, &left);
c7c46676
TW		 1685 active_rates &= ~ret_rates;
1686
b481de9c
ZY		 1687 len += 2 + *pos;
1688 pos += (*pos) + 1;
c7c46676 1689 if (active_rates == 0)
b481de9c
ZY		 1690 goto fill_end;
1691
1692 /* fill in supported extended rate */
1693 /* ...next IE... */
1694 left -= 2;
1695 if (left < 0)
1696 return 0;
1697 /* ... fill it in... */
1698 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1699 *pos = 0;
bb8c093b 1700 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1701 active_rate_basic, &left);
b481de9c
ZY		 1702 if (*pos > 0)
1703 len += 2 + *pos;
1704
c8b0e6e1 1705#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1706 if (sband && sband->ht_info.ht_supported) {
1707 struct ieee80211_ht_cap *ht_cap;
b481de9c
ZY		 1708 pos += (*pos) + 1;
1709 *pos++ = WLAN_EID_HT_CAPABILITY;
8fb88032 1710 *pos++ = sizeof(struct ieee80211_ht_cap);
78330fdd
TW		 1711 ht_cap = (struct ieee80211_ht_cap *)pos;
1712 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1713 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1714 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
1715 IEEE80211_HT_CAP_AMPDU_FACTOR) |
1716 ((sband->ht_info.ampdu_density << 2) &
1717 IEEE80211_HT_CAP_AMPDU_DENSITY);
8fb88032 1718 len += 2 + sizeof(struct ieee80211_ht_cap);
b481de9c 1719 }
c8b0e6e1 1720#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 1721
1722 fill_end:
1723 return (u16)len;
1724}
1725
1726/*
1727 * QoS support
1728*/
c79dd5b5 1729static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1730 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 1731{
1732
bb8c093b
CH		 1733 return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1734 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 1735}
1736
c79dd5b5 1737static void iwl4965_reset_qos(struct iwl_priv *priv)
b481de9c
ZY		 1738{
1739 u16 cw_min = 15;
1740 u16 cw_max = 1023;
1741 u8 aifs = 2;
1742 u8 is_legacy = 0;
1743 unsigned long flags;
1744 int i;
1745
1746 spin_lock_irqsave(&priv->lock, flags);
1747 priv->qos_data.qos_active = 0;
1748
1749 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1750 if (priv->qos_data.qos_enable)
1751 priv->qos_data.qos_active = 1;
1752 if (!(priv->active_rate & 0xfff0)) {
1753 cw_min = 31;
1754 is_legacy = 1;
1755 }
1756 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1757 if (priv->qos_data.qos_enable)
1758 priv->qos_data.qos_active = 1;
1759 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1760 cw_min = 31;
1761 is_legacy = 1;
1762 }
1763
1764 if (priv->qos_data.qos_active)
1765 aifs = 3;
1766
1767 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1768 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1769 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1770 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1771 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1772
1773 if (priv->qos_data.qos_active) {
1774 i = 1;
1775 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1776 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1777 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1778 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1779 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1780
1781 i = 2;
1782 priv->qos_data.def_qos_parm.ac[i].cw_min =
1783 cpu_to_le16((cw_min + 1) / 2 - 1);
1784 priv->qos_data.def_qos_parm.ac[i].cw_max =
1785 cpu_to_le16(cw_max);
1786 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1787 if (is_legacy)
1788 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1789 cpu_to_le16(6016);
1790 else
1791 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1792 cpu_to_le16(3008);
1793 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1794
1795 i = 3;
1796 priv->qos_data.def_qos_parm.ac[i].cw_min =
1797 cpu_to_le16((cw_min + 1) / 4 - 1);
1798 priv->qos_data.def_qos_parm.ac[i].cw_max =
1799 cpu_to_le16((cw_max + 1) / 2 - 1);
1800 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1801 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1802 if (is_legacy)
1803 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1804 cpu_to_le16(3264);
1805 else
1806 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1807 cpu_to_le16(1504);
1808 } else {
1809 for (i = 1; i < 4; i++) {
1810 priv->qos_data.def_qos_parm.ac[i].cw_min =
1811 cpu_to_le16(cw_min);
1812 priv->qos_data.def_qos_parm.ac[i].cw_max =
1813 cpu_to_le16(cw_max);
1814 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1815 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1816 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1817 }
1818 }
1819 IWL_DEBUG_QOS("set QoS to default \n");
1820
1821 spin_unlock_irqrestore(&priv->lock, flags);
1822}
1823
c79dd5b5 1824static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY		 1825{
1826 unsigned long flags;
1827
b481de9c
ZY		 1828 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1829 return;
1830
1831 if (!priv->qos_data.qos_enable)
1832 return;
1833
1834 spin_lock_irqsave(&priv->lock, flags);
1835 priv->qos_data.def_qos_parm.qos_flags = 0;
1836
1837 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1838 !priv->qos_data.qos_cap.q_AP.txop_request)
1839 priv->qos_data.def_qos_parm.qos_flags |=
1840 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 1841 if (priv->qos_data.qos_active)
1842 priv->qos_data.def_qos_parm.qos_flags |=
1843 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1844
c8b0e6e1 1845#ifdef CONFIG_IWL4965_HT
fd105e79 1846 if (priv->current_ht_config.is_ht)
f1f1f5c7 1847 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1848#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1849
b481de9c
ZY		 1850 spin_unlock_irqrestore(&priv->lock, flags);
1851
bb8c093b 1852 if (force || iwl4965_is_associated(priv)) {
f1f1f5c7
TW		 1853 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1854 priv->qos_data.qos_active,
1855 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1856
bb8c093b 1857 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 1858 &(priv->qos_data.def_qos_parm));
1859 }
1860}
1861
b481de9c
ZY		 1862/*
1863 * Power management (not Tx power!) functions
1864 */
1865#define MSEC_TO_USEC 1024
1866
1867#define NOSLP __constant_cpu_to_le16(0), 0, 0
1868#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1869#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877/* default power management (not Tx power) table values */
1878/* for tim 0-10 */
bb8c093b 1879static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY		 1880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886};
1887
1888/* for tim > 10 */
bb8c093b 1889static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY		 1890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900};
1901
c79dd5b5 1902int iwl4965_power_init_handle(struct iwl_priv *priv)
b481de9c
ZY		 1903{
1904 int rc = 0, i;
bb8c093b
CH		 1905 struct iwl4965_power_mgr *pow_data;
1906 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY		 1907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
bb8c093b 1925 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY		 1926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939}
1940
c79dd5b5 1941static int iwl4965_update_power_cmd(struct iwl_priv *priv,
bb8c093b 1942 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY		 1943{
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
bb8c093b 1947 struct iwl4965_power_vec_entry *range;
b481de9c 1948 u8 period = 0;
bb8c093b 1949 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY		 1950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
bb8c093b 1962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY		 1963
1964#ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970#endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003}
2004
c79dd5b5 2005static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
b481de9c 2006{
9a62f73b 2007 u32 uninitialized_var(final_mode);
b481de9c 2008 int rc;
bb8c093b 2009 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY		 2010
2011 /* If on battery, set to 3,
01ebd063 2012 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY		 2013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
2026 cmd.keep_alive_beacons = 0;
2027
bb8c093b 2028 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 2029
bb8c093b 2030 rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY		 2031
2032 if (final_mode == IWL_POWER_MODE_CAM)
2033 clear_bit(STATUS_POWER_PMI, &priv->status);
2034 else
2035 set_bit(STATUS_POWER_PMI, &priv->status);
2036
2037 return rc;
2038}
2039
c79dd5b5 2040int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2041{
2042 /* Filter incoming packets to determine if they are targeted toward
2043 * this network, discarding packets coming from ourselves */
2044 switch (priv->iw_mode) {
2045 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2046 /* packets from our adapter are dropped (echo) */
2047 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2048 return 0;
2049 /* {broad,multi}cast packets to our IBSS go through */
2050 if (is_multicast_ether_addr(header->addr1))
2051 return !compare_ether_addr(header->addr3, priv->bssid);
2052 /* packets to our adapter go through */
2053 return !compare_ether_addr(header->addr1, priv->mac_addr);
2054 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2055 /* packets from our adapter are dropped (echo) */
2056 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2057 return 0;
2058 /* {broad,multi}cast packets to our BSS go through */
2059 if (is_multicast_ether_addr(header->addr1))
2060 return !compare_ether_addr(header->addr2, priv->bssid);
2061 /* packets to our adapter go through */
2062 return !compare_ether_addr(header->addr1, priv->mac_addr);
2063 }
2064
2065 return 1;
2066}
2067
2068#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
2069
bb8c093b 2070static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 2071{
2072 switch (status & TX_STATUS_MSK) {
2073 case TX_STATUS_SUCCESS:
2074 return "SUCCESS";
2075 TX_STATUS_ENTRY(SHORT_LIMIT);
2076 TX_STATUS_ENTRY(LONG_LIMIT);
2077 TX_STATUS_ENTRY(FIFO_UNDERRUN);
2078 TX_STATUS_ENTRY(MGMNT_ABORT);
2079 TX_STATUS_ENTRY(NEXT_FRAG);
2080 TX_STATUS_ENTRY(LIFE_EXPIRE);
2081 TX_STATUS_ENTRY(DEST_PS);
2082 TX_STATUS_ENTRY(ABORTED);
2083 TX_STATUS_ENTRY(BT_RETRY);
2084 TX_STATUS_ENTRY(STA_INVALID);
2085 TX_STATUS_ENTRY(FRAG_DROPPED);
2086 TX_STATUS_ENTRY(TID_DISABLE);
2087 TX_STATUS_ENTRY(FRAME_FLUSHED);
2088 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
2089 TX_STATUS_ENTRY(TX_LOCKED);
2090 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
2091 }
2092
2093 return "UNKNOWN";
2094}
2095
2096/**
bb8c093b 2097 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 2098 *
2099 * NOTE: priv->mutex is not required before calling this function
2100 */
c79dd5b5 2101static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY		 2102{
2103 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2104 clear_bit(STATUS_SCANNING, &priv->status);
2105 return 0;
2106 }
2107
2108 if (test_bit(STATUS_SCANNING, &priv->status)) {
2109 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2110 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2111 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2112 queue_work(priv->workqueue, &priv->abort_scan);
2113
2114 } else
2115 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2116
2117 return test_bit(STATUS_SCANNING, &priv->status);
2118 }
2119
2120 return 0;
2121}
2122
2123/**
bb8c093b 2124 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 2125 * @ms: amount of time to wait (in milliseconds) for scan to abort
2126 *
2127 * NOTE: priv->mutex must be held before calling this function
2128 */
c79dd5b5 2129static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY		 2130{
2131 unsigned long now = jiffies;
2132 int ret;
2133
bb8c093b 2134 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 2135 if (ret && ms) {
2136 mutex_unlock(&priv->mutex);
2137 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2138 test_bit(STATUS_SCANNING, &priv->status))
2139 msleep(1);
2140 mutex_lock(&priv->mutex);
2141
2142 return test_bit(STATUS_SCANNING, &priv->status);
2143 }
2144
2145 return ret;
2146}
2147
c79dd5b5 2148static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY		 2149{
2150 /* Reset ieee stats */
2151
2152 /* We don't reset the net_device_stats (ieee->stats) on
2153 * re-association */
2154
2155 priv->last_seq_num = -1;
2156 priv->last_frag_num = -1;
2157 priv->last_packet_time = 0;
2158
bb8c093b 2159 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2160}
2161
2162#define MAX_UCODE_BEACON_INTERVAL 4096
2163#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2164
bb8c093b 2165static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 2166{
2167 u16 new_val = 0;
2168 u16 beacon_factor = 0;
2169
2170 beacon_factor =
2171 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2172 / MAX_UCODE_BEACON_INTERVAL;
2173 new_val = beacon_val / beacon_factor;
2174
2175 return cpu_to_le16(new_val);
2176}
2177
c79dd5b5 2178static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY		 2179{
2180 u64 interval_tm_unit;
2181 u64 tsf, result;
2182 unsigned long flags;
2183 struct ieee80211_conf *conf = NULL;
2184 u16 beacon_int = 0;
2185
2186 conf = ieee80211_get_hw_conf(priv->hw);
2187
2188 spin_lock_irqsave(&priv->lock, flags);
2189 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2190 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2191
2192 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2193
2194 tsf = priv->timestamp1;
2195 tsf = ((tsf << 32) | priv->timestamp0);
2196
2197 beacon_int = priv->beacon_int;
2198 spin_unlock_irqrestore(&priv->lock, flags);
2199
2200 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2201 if (beacon_int == 0) {
2202 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2203 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2204 } else {
2205 priv->rxon_timing.beacon_interval =
2206 cpu_to_le16(beacon_int);
2207 priv->rxon_timing.beacon_interval =
bb8c093b 2208 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 2209 le16_to_cpu(priv->rxon_timing.beacon_interval));
2210 }
2211
2212 priv->rxon_timing.atim_window = 0;
2213 } else {
2214 priv->rxon_timing.beacon_interval =
bb8c093b 2215 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 2216 /* TODO: we need to get atim_window from upper stack
2217 * for now we set to 0 */
2218 priv->rxon_timing.atim_window = 0;
2219 }
2220
2221 interval_tm_unit =
2222 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2223 result = do_div(tsf, interval_tm_unit);
2224 priv->rxon_timing.beacon_init_val =
2225 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2226
2227 IWL_DEBUG_ASSOC
2228 ("beacon interval %d beacon timer %d beacon tim %d\n",
2229 le16_to_cpu(priv->rxon_timing.beacon_interval),
2230 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2231 le16_to_cpu(priv->rxon_timing.atim_window));
2232}
2233
c79dd5b5 2234static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY		 2235{
2236 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2237 IWL_ERROR("APs don't scan.\n");
2238 return 0;
2239 }
2240
bb8c093b 2241 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 2242 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2243 return -EIO;
2244 }
2245
2246 if (test_bit(STATUS_SCANNING, &priv->status)) {
2247 IWL_DEBUG_SCAN("Scan already in progress.\n");
2248 return -EAGAIN;
2249 }
2250
2251 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2252 IWL_DEBUG_SCAN("Scan request while abort pending. "
2253 "Queuing.\n");
2254 return -EAGAIN;
2255 }
2256
2257 IWL_DEBUG_INFO("Starting scan...\n");
2258 priv->scan_bands = 2;
2259 set_bit(STATUS_SCANNING, &priv->status);
2260 priv->scan_start = jiffies;
2261 priv->scan_pass_start = priv->scan_start;
2262
2263 queue_work(priv->workqueue, &priv->request_scan);
2264
2265 return 0;
2266}
2267
c79dd5b5 2268static int iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
b481de9c 2269{
bb8c093b 2270 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
b481de9c
ZY		 2271
2272 if (hw_decrypt)
2273 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2274 else
2275 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2276
2277 return 0;
2278}
2279
c79dd5b5 2280static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 2281 enum ieee80211_band band)
b481de9c 2282{
8318d78a 2283 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 2284 priv->staging_rxon.flags &=
2285 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2286 | RXON_FLG_CCK_MSK);
2287 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2288 } else {
bb8c093b 2289 /* Copied from iwl4965_bg_post_associate() */
b481de9c
ZY		 2290 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2291 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2292 else
2293 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2294
2295 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2296 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2297
2298 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2299 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2300 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2301 }
2302}
2303
2304/*
01ebd063 2305 * initialize rxon structure with default values from eeprom
b481de9c 2306 */
c79dd5b5 2307static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 2308{
bb8c093b 2309 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 2310
2311 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2312
2313 switch (priv->iw_mode) {
2314 case IEEE80211_IF_TYPE_AP:
2315 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2316 break;
2317
2318 case IEEE80211_IF_TYPE_STA:
2319 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2320 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2321 break;
2322
2323 case IEEE80211_IF_TYPE_IBSS:
2324 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2325 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2326 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2327 RXON_FILTER_ACCEPT_GRP_MSK;
2328 break;
2329
2330 case IEEE80211_IF_TYPE_MNTR:
2331 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2332 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2333 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2334 break;
2335 }
2336
2337#if 0
2338 /* TODO: Figure out when short_preamble would be set and cache from
2339 * that */
2340 if (!hw_to_local(priv->hw)->short_preamble)
2341 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2342 else
2343 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2344#endif
2345
8318d78a 2346 ch_info = iwl4965_get_channel_info(priv, priv->band,
b481de9c
ZY		 2347 le16_to_cpu(priv->staging_rxon.channel));
2348
2349 if (!ch_info)
2350 ch_info = &priv->channel_info[0];
2351
2352 /*
2353 * in some case A channels are all non IBSS
2354 * in this case force B/G channel
2355 */
2356 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2357 !(is_channel_ibss(ch_info)))
2358 ch_info = &priv->channel_info[0];
2359
2360 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 2361 priv->band = ch_info->band;
b481de9c 2362
8318d78a 2363 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY		 2364
2365 priv->staging_rxon.ofdm_basic_rates =
2366 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2367 priv->staging_rxon.cck_basic_rates =
2368 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2369
2370 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2371 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2372 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2373 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2374 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2375 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2376 iwl4965_set_rxon_chain(priv);
2377}
2378
c79dd5b5 2379static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 2380{
b481de9c 2381 if (mode == IEEE80211_IF_TYPE_IBSS) {
bb8c093b 2382 const struct iwl4965_channel_info *ch_info;
b481de9c 2383
bb8c093b 2384 ch_info = iwl4965_get_channel_info(priv,
8318d78a 2385 priv->band,
b481de9c
ZY		 2386 le16_to_cpu(priv->staging_rxon.channel));
2387
2388 if (!ch_info || !is_channel_ibss(ch_info)) {
2389 IWL_ERROR("channel %d not IBSS channel\n",
2390 le16_to_cpu(priv->staging_rxon.channel));
2391 return -EINVAL;
2392 }
2393 }
2394
b481de9c
ZY		 2395 priv->iw_mode = mode;
2396
bb8c093b 2397 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 2398 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2399
bb8c093b 2400 iwl4965_clear_stations_table(priv);
b481de9c 2401
fde3571f
MA		 2402 /* dont commit rxon if rf-kill is on*/
2403 if (!iwl4965_is_ready_rf(priv))
2404 return -EAGAIN;
2405
2406 cancel_delayed_work(&priv->scan_check);
2407 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2408 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2409 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2410 return -EAGAIN;
2411 }
2412
bb8c093b 2413 iwl4965_commit_rxon(priv);
b481de9c
ZY		 2414
2415 return 0;
2416}
2417
c79dd5b5 2418static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 2419 struct ieee80211_tx_control *ctl,
bb8c093b 2420 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2421 struct sk_buff *skb_frag,
2422 int last_frag)
2423{
bb8c093b 2424 struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
b481de9c
ZY		 2425
2426 switch (keyinfo->alg) {
2427 case ALG_CCMP:
2428 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2429 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS		 2430 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
2431 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY		 2432 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2433 break;
2434
2435 case ALG_TKIP:
2436#if 0
2437 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2438
2439 if (last_frag)
2440 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2441 8);
2442 else
2443 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2444#endif
2445 break;
2446
2447 case ALG_WEP:
2448 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2449 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2450
2451 if (keyinfo->keylen == 13)
2452 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2453
2454 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2455
2456 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2457 "with key %d\n", ctl->key_idx);
2458 break;
2459
b481de9c
ZY		 2460 default:
2461 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2462 break;
2463 }
2464}
2465
2466/*
2467 * handle build REPLY_TX command notification.
2468 */
c79dd5b5 2469static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
bb8c093b 2470 struct iwl4965_cmd *cmd,
b481de9c
ZY		 2471 struct ieee80211_tx_control *ctrl,
2472 struct ieee80211_hdr *hdr,
2473 int is_unicast, u8 std_id)
2474{
2475 __le16 *qc;
2476 u16 fc = le16_to_cpu(hdr->frame_control);
2477 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2478
2479 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2480 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2481 tx_flags |= TX_CMD_FLG_ACK_MSK;
2482 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2483 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2484 if (ieee80211_is_probe_response(fc) &&
2485 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2486 tx_flags |= TX_CMD_FLG_TSF_MSK;
2487 } else {
2488 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2489 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2490 }
2491
87e4f7df
TW		 2492 if (ieee80211_is_back_request(fc))
2493 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2494
2495
b481de9c
ZY		 2496 cmd->cmd.tx.sta_id = std_id;
2497 if (ieee80211_get_morefrag(hdr))
2498 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2499
2500 qc = ieee80211_get_qos_ctrl(hdr);
2501 if (qc) {
2502 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2503 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2504 } else
2505 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2506
2507 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2508 tx_flags |= TX_CMD_FLG_RTS_MSK;
2509 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2510 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2511 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2512 tx_flags |= TX_CMD_FLG_CTS_MSK;
2513 }
2514
2515 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2516 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2517
2518 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2519 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2520 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2521 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2522 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2523 else
bc434dd2 2524 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
b481de9c
ZY		 2525 } else
2526 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2527
2528 cmd->cmd.tx.driver_txop = 0;
2529 cmd->cmd.tx.tx_flags = tx_flags;
2530 cmd->cmd.tx.next_frame_len = 0;
2531}
19758bef
TW		 2532static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2533{
2534 /* 0 - mgmt, 1 - cnt, 2 - data */
2535 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2536 priv->tx_stats[idx].cnt++;
2537 priv->tx_stats[idx].bytes += len;
2538}
6440adb5
BC		 2539/**
2540 * iwl4965_get_sta_id - Find station's index within station table
2541 *
2542 * If new IBSS station, create new entry in station table
2543 */
c79dd5b5 2544static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 2545 struct ieee80211_hdr *hdr)
b481de9c
ZY		 2546{
2547 int sta_id;
2548 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2549 DECLARE_MAC_BUF(mac);
b481de9c 2550
6440adb5 2551 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 2552 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2553 is_multicast_ether_addr(hdr->addr1))
2554 return priv->hw_setting.bcast_sta_id;
2555
2556 switch (priv->iw_mode) {
2557
6440adb5
BC		 2558 /* If we are a client station in a BSS network, use the special
2559 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 2560 case IEEE80211_IF_TYPE_STA:
2561 return IWL_AP_ID;
2562
2563 /* If we are an AP, then find the station, or use BCAST */
2564 case IEEE80211_IF_TYPE_AP:
bb8c093b 2565 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2566 if (sta_id != IWL_INVALID_STATION)
2567 return sta_id;
2568 return priv->hw_setting.bcast_sta_id;
2569
6440adb5
BC		 2570 /* If this frame is going out to an IBSS network, find the station,
2571 * or create a new station table entry */
b481de9c 2572 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2573 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2574 if (sta_id != IWL_INVALID_STATION)
2575 return sta_id;
2576
6440adb5 2577 /* Create new station table entry */
67d62035
RR		 2578 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2579 0, CMD_ASYNC, NULL);
b481de9c
ZY		 2580
2581 if (sta_id != IWL_INVALID_STATION)
2582 return sta_id;
2583
0795af57 2584 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2585 "Defaulting to broadcast...\n",
0795af57 2586 print_mac(mac, hdr->addr1));
0a6857e7 2587 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
b481de9c
ZY		 2588 return priv->hw_setting.bcast_sta_id;
2589
2590 default:
01ebd063 2591 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
b481de9c
ZY		 2592 return priv->hw_setting.bcast_sta_id;
2593 }
2594}
2595
2596/*
2597 * start REPLY_TX command process
2598 */
c79dd5b5 2599static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY		 2600 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2601{
2602 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2603 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 2604 u32 *control_flags;
2605 int txq_id = ctl->queue;
bb8c093b
CH		 2606 struct iwl4965_tx_queue *txq = NULL;
2607 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 2608 dma_addr_t phys_addr;
2609 dma_addr_t txcmd_phys;
87e4f7df 2610 dma_addr_t scratch_phys;
bb8c093b 2611 struct iwl4965_cmd *out_cmd = NULL;
b481de9c
ZY		 2612 u16 len, idx, len_org;
2613 u8 id, hdr_len, unicast;
2614 u8 sta_id;
2615 u16 seq_number = 0;
2616 u16 fc;
2617 __le16 *qc;
2618 u8 wait_write_ptr = 0;
2619 unsigned long flags;
2620 int rc;
2621
2622 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2623 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 2624 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2625 goto drop_unlock;
2626 }
2627
32bfd35d
JB		 2628 if (!priv->vif) {
2629 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY		 2630 goto drop_unlock;
2631 }
2632
8318d78a 2633 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY		 2634 IWL_ERROR("ERROR: No TX rate available.\n");
2635 goto drop_unlock;
2636 }
2637
2638 unicast = !is_multicast_ether_addr(hdr->addr1);
2639 id = 0;
2640
2641 fc = le16_to_cpu(hdr->frame_control);
2642
0a6857e7 2643#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 2644 if (ieee80211_is_auth(fc))
2645 IWL_DEBUG_TX("Sending AUTH frame\n");
2646 else if (ieee80211_is_assoc_request(fc))
2647 IWL_DEBUG_TX("Sending ASSOC frame\n");
2648 else if (ieee80211_is_reassoc_request(fc))
2649 IWL_DEBUG_TX("Sending REASSOC frame\n");
2650#endif
2651
7878a5a4 2652 /* drop all data frame if we are not associated */
76f3915b
GG		 2653 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
2654 (!iwl4965_is_associated(priv) ||
a6477249 2655 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2656 !priv->assoc_station_added)) {
bb8c093b 2657 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
b481de9c
ZY		 2658 goto drop_unlock;
2659 }
2660
2661 spin_unlock_irqrestore(&priv->lock, flags);
2662
2663 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
BC		 2664
2665 /* Find (or create) index into station table for destination station */
bb8c093b 2666 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2667 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2668 DECLARE_MAC_BUF(mac);
2669
2670 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2671 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2672 goto drop;
2673 }
2674
2675 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2676
2677 qc = ieee80211_get_qos_ctrl(hdr);
2678 if (qc) {
2679 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2680 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2681 IEEE80211_SCTL_SEQ;
2682 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2683 (hdr->seq_ctrl &
2684 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2685 seq_number += 0x10;
c8b0e6e1 2686#ifdef CONFIG_IWL4965_HT
b481de9c 2687 /* aggregation is on for this <sta,tid> */
fe01b477 2688 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2689 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2690 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2691#endif /* CONFIG_IWL4965_HT */
b481de9c 2692 }
6440adb5
BC		 2693
2694 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2695 txq = &priv->txq[txq_id];
2696 q = &txq->q;
2697
2698 spin_lock_irqsave(&priv->lock, flags);
2699
6440adb5 2700 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2701 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2702 memset(tfd, 0, sizeof(*tfd));
2703 control_flags = (u32 *) tfd;
fc4b6853 2704 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2705
6440adb5 2706 /* Set up driver data for this TFD */
bb8c093b 2707 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2708 txq->txb[q->write_ptr].skb[0] = skb;
2709 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2710 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
BC		 2711
2712 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2713 out_cmd = &txq->cmd[idx];
2714 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2715 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
BC		 2716
2717 /*
2718 * Set up the Tx-command (not MAC!) header.
2719 * Store the chosen Tx queue and TFD index within the sequence field;
2720 * after Tx, uCode's Tx response will return this value so driver can
2721 * locate the frame within the tx queue and do post-tx processing.
2722 */
b481de9c
ZY		 2723 out_cmd->hdr.cmd = REPLY_TX;
2724 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2725 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC		 2726
2727 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 2728 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2729
6440adb5
BC		 2730 /*
2731 * Use the first empty entry in this queue's command buffer array
2732 * to contain the Tx command and MAC header concatenated together
2733 * (payload data will be in another buffer).
2734 * Size of this varies, due to varying MAC header length.
2735 * If end is not dword aligned, we'll have 2 extra bytes at the end
2736 * of the MAC header (device reads on dword boundaries).
2737 * We'll tell device about this padding later.
2738 */
b481de9c 2739 len = priv->hw_setting.tx_cmd_len +
bb8c093b 2740 sizeof(struct iwl4965_cmd_header) + hdr_len;
b481de9c
ZY		 2741
2742 len_org = len;
2743 len = (len + 3) & ~3;
2744
2745 if (len_org != len)
2746 len_org = 1;
2747 else
2748 len_org = 0;
2749
6440adb5
BC		 2750 /* Physical address of this Tx command's header (not MAC header!),
2751 * within command buffer array. */
bb8c093b
CH		 2752 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
2753 offsetof(struct iwl4965_cmd, hdr);
b481de9c 2754
6440adb5
BC		 2755 /* Add buffer containing Tx command and MAC(!) header to TFD's
2756 * first entry */
bb8c093b 2757 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 2758
2759 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
bb8c093b 2760 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
b481de9c 2761
6440adb5
BC		 2762 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2763 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 2764 len = skb->len - hdr_len;
2765 if (len) {
2766 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2767 len, PCI_DMA_TODEVICE);
bb8c093b 2768 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 2769 }
2770
6440adb5 2771 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 2772 if (len_org)
2773 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2774
6440adb5 2775 /* Total # bytes to be transmitted */
b481de9c
ZY		 2776 len = (u16)skb->len;
2777 out_cmd->cmd.tx.len = cpu_to_le16(len);
2778
2779 /* TODO need this for burst mode later on */
bb8c093b 2780 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 2781
2782 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2783 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2784
19758bef
TW		 2785 iwl_update_tx_stats(priv, fc, len);
2786
87e4f7df
TW		 2787 scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
2788 offsetof(struct iwl4965_tx_cmd, scratch);
2789 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2790 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2791
b481de9c
ZY		 2792 if (!ieee80211_get_morefrag(hdr)) {
2793 txq->need_update = 1;
2794 if (qc) {
2795 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2796 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2797 }
2798 } else {
2799 wait_write_ptr = 1;
2800 txq->need_update = 0;
2801 }
2802
0a6857e7 2803 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 2804 sizeof(out_cmd->cmd.tx));
2805
0a6857e7 2806 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 2807 ieee80211_get_hdrlen(fc));
2808
6440adb5 2809 /* Set up entry for this TFD in Tx byte-count array */
b481de9c
ZY		 2810 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
2811
6440adb5 2812 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2813 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2814 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2815 spin_unlock_irqrestore(&priv->lock, flags);
2816
2817 if (rc)
2818 return rc;
2819
bb8c093b 2820 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 2821 && priv->mac80211_registered) {
2822 if (wait_write_ptr) {
2823 spin_lock_irqsave(&priv->lock, flags);
2824 txq->need_update = 1;
bb8c093b 2825 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2826 spin_unlock_irqrestore(&priv->lock, flags);
2827 }
2828
2829 ieee80211_stop_queue(priv->hw, ctl->queue);
2830 }
2831
2832 return 0;
2833
2834drop_unlock:
2835 spin_unlock_irqrestore(&priv->lock, flags);
2836drop:
2837 return -1;
2838}
2839
c79dd5b5 2840static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2841{
8318d78a 2842 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 2843 struct ieee80211_rate *rate;
2844 int i;
2845
8318d78a 2846 hw = iwl4965_get_hw_mode(priv, priv->band);
c4ba9621
SA		 2847 if (!hw) {
2848 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2849 return;
2850 }
b481de9c
ZY		 2851
2852 priv->active_rate = 0;
2853 priv->active_rate_basic = 0;
2854
8318d78a
JB		 2855 for (i = 0; i < hw->n_bitrates; i++) {
2856 rate = &(hw->bitrates[i]);
2857 if (rate->hw_value < IWL_RATE_COUNT)
2858 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 2859 }
2860
2861 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2862 priv->active_rate, priv->active_rate_basic);
2863
2864 /*
2865 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2866 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2867 * OFDM
2868 */
2869 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2870 priv->staging_rxon.cck_basic_rates =
2871 ((priv->active_rate_basic &
2872 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2873 else
2874 priv->staging_rxon.cck_basic_rates =
2875 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2876
2877 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2878 priv->staging_rxon.ofdm_basic_rates =
2879 ((priv->active_rate_basic &
2880 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2881 IWL_FIRST_OFDM_RATE) & 0xFF;
2882 else
2883 priv->staging_rxon.ofdm_basic_rates =
2884 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2885}
2886
c79dd5b5 2887static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY		 2888{
2889 unsigned long flags;
2890
2891 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2892 return;
2893
2894 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2895 disable_radio ? "OFF" : "ON");
2896
2897 if (disable_radio) {
bb8c093b 2898 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2899 /* FIXME: This is a workaround for AP */
2900 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2901 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2902 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 2903 CSR_UCODE_SW_BIT_RFKILL);
2904 spin_unlock_irqrestore(&priv->lock, flags);
bb8c093b 2905 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY		 2906 set_bit(STATUS_RF_KILL_SW, &priv->status);
2907 }
2908 return;
2909 }
2910
2911 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2912 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2913
2914 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2915 spin_unlock_irqrestore(&priv->lock, flags);
2916
2917 /* wake up ucode */
2918 msleep(10);
2919
2920 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 2921 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
2922 if (!iwl4965_grab_nic_access(priv))
2923 iwl4965_release_nic_access(priv);
b481de9c
ZY		 2924 spin_unlock_irqrestore(&priv->lock, flags);
2925
2926 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2927 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2928 "disabled by HW switch\n");
2929 return;
2930 }
2931
2932 queue_work(priv->workqueue, &priv->restart);
2933 return;
2934}
2935
c79dd5b5 2936void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
b481de9c
ZY		 2937 u32 decrypt_res, struct ieee80211_rx_status *stats)
2938{
2939 u16 fc =
2940 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2941
2942 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2943 return;
2944
2945 if (!(fc & IEEE80211_FCTL_PROTECTED))
2946 return;
2947
2948 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2949 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2950 case RX_RES_STATUS_SEC_TYPE_TKIP:
2951 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2952 RX_RES_STATUS_BAD_ICV_MIC)
2953 stats->flag |= RX_FLAG_MMIC_ERROR;
2954 case RX_RES_STATUS_SEC_TYPE_WEP:
2955 case RX_RES_STATUS_SEC_TYPE_CCMP:
2956 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2957 RX_RES_STATUS_DECRYPT_OK) {
2958 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2959 stats->flag |= RX_FLAG_DECRYPTED;
2960 }
2961 break;
2962
2963 default:
2964 break;
2965 }
2966}
2967
b481de9c
ZY		 2968
2969#define IWL_PACKET_RETRY_TIME HZ
2970
c79dd5b5 2971int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2972{
2973 u16 sc = le16_to_cpu(header->seq_ctrl);
2974 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2975 u16 frag = sc & IEEE80211_SCTL_FRAG;
2976 u16 *last_seq, *last_frag;
2977 unsigned long *last_time;
2978
2979 switch (priv->iw_mode) {
2980 case IEEE80211_IF_TYPE_IBSS:{
2981 struct list_head *p;
bb8c093b 2982 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 2983 u8 *mac = header->addr2;
2984 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2985
2986 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2987 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 2988 if (!compare_ether_addr(entry->mac, mac))
2989 break;
2990 }
2991 if (p == &priv->ibss_mac_hash[index]) {
2992 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2993 if (!entry) {
bc434dd2 2994 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 2995 return 0;
2996 }
2997 memcpy(entry->mac, mac, ETH_ALEN);
2998 entry->seq_num = seq;
2999 entry->frag_num = frag;
3000 entry->packet_time = jiffies;
bc434dd2 3001 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 3002 return 0;
3003 }
3004 last_seq = &entry->seq_num;
3005 last_frag = &entry->frag_num;
3006 last_time = &entry->packet_time;
3007 break;
3008 }
3009 case IEEE80211_IF_TYPE_STA:
3010 last_seq = &priv->last_seq_num;
3011 last_frag = &priv->last_frag_num;
3012 last_time = &priv->last_packet_time;
3013 break;
3014 default:
3015 return 0;
3016 }
3017 if ((*last_seq == seq) &&
3018 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
3019 if (*last_frag == frag)
3020 goto drop;
3021 if (*last_frag + 1 != frag)
3022 /* out-of-order fragment */
3023 goto drop;
3024 } else
3025 *last_seq = seq;
3026
3027 *last_frag = frag;
3028 *last_time = jiffies;
3029 return 0;
3030
3031 drop:
3032 return 1;
3033}
3034
c8b0e6e1 3035#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 3036
3037#include "iwl-spectrum.h"
3038
3039#define BEACON_TIME_MASK_LOW 0x00FFFFFF
3040#define BEACON_TIME_MASK_HIGH 0xFF000000
3041#define TIME_UNIT 1024
3042
3043/*
3044 * extended beacon time format
3045 * time in usec will be changed into a 32-bit value in 8:24 format
3046 * the high 1 byte is the beacon counts
3047 * the lower 3 bytes is the time in usec within one beacon interval
3048 */
3049
bb8c093b 3050static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 3051{
3052 u32 quot;
3053 u32 rem;
3054 u32 interval = beacon_interval * 1024;
3055
3056 if (!interval || !usec)
3057 return 0;
3058
3059 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3060 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3061
3062 return (quot << 24) + rem;
3063}
3064
3065/* base is usually what we get from ucode with each received frame,
3066 * the same as HW timer counter counting down
3067 */
3068
bb8c093b 3069static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 3070{
3071 u32 base_low = base & BEACON_TIME_MASK_LOW;
3072 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3073 u32 interval = beacon_interval * TIME_UNIT;
3074 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3075 (addon & BEACON_TIME_MASK_HIGH);
3076
3077 if (base_low > addon_low)
3078 res += base_low - addon_low;
3079 else if (base_low < addon_low) {
3080 res += interval + base_low - addon_low;
3081 res += (1 << 24);
3082 } else
3083 res += (1 << 24);
3084
3085 return cpu_to_le32(res);
3086}
3087
c79dd5b5 3088static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY		 3089 struct ieee80211_measurement_params *params,
3090 u8 type)
3091{
bb8c093b
CH		 3092 struct iwl4965_spectrum_cmd spectrum;
3093 struct iwl4965_rx_packet *res;
3094 struct iwl4965_host_cmd cmd = {
b481de9c
ZY		 3095 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3096 .data = (void *)&spectrum,
3097 .meta.flags = CMD_WANT_SKB,
3098 };
3099 u32 add_time = le64_to_cpu(params->start_time);
3100 int rc;
3101 int spectrum_resp_status;
3102 int duration = le16_to_cpu(params->duration);
3103
bb8c093b 3104 if (iwl4965_is_associated(priv))
b481de9c 3105 add_time =
bb8c093b 3106 iwl4965_usecs_to_beacons(
b481de9c
ZY		 3107 le64_to_cpu(params->start_time) - priv->last_tsf,
3108 le16_to_cpu(priv->rxon_timing.beacon_interval));
3109
3110 memset(&spectrum, 0, sizeof(spectrum));
3111
3112 spectrum.channel_count = cpu_to_le16(1);
3113 spectrum.flags =
3114 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3115 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3116 cmd.len = sizeof(spectrum);
3117 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3118
bb8c093b 3119 if (iwl4965_is_associated(priv))
b481de9c 3120 spectrum.start_time =
bb8c093b 3121 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 3122 add_time,
3123 le16_to_cpu(priv->rxon_timing.beacon_interval));
3124 else
3125 spectrum.start_time = 0;
3126
3127 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3128 spectrum.channels[0].channel = params->channel;
3129 spectrum.channels[0].type = type;
3130 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3131 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3132 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3133
bb8c093b 3134 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 3135 if (rc)
3136 return rc;
3137
bb8c093b 3138 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 3139 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3140 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3141 rc = -EIO;
3142 }
3143
3144 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3145 switch (spectrum_resp_status) {
3146 case 0: /* Command will be handled */
3147 if (res->u.spectrum.id != 0xff) {
3148 IWL_DEBUG_INFO
3149 ("Replaced existing measurement: %d\n",
3150 res->u.spectrum.id);
3151 priv->measurement_status &= ~MEASUREMENT_READY;
3152 }
3153 priv->measurement_status |= MEASUREMENT_ACTIVE;
3154 rc = 0;
3155 break;
3156
3157 case 1: /* Command will not be handled */
3158 rc = -EAGAIN;
3159 break;
3160 }
3161
3162 dev_kfree_skb_any(cmd.meta.u.skb);
3163
3164 return rc;
3165}
3166#endif
3167
c79dd5b5 3168static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 3169 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 3170{
3171
3172 tx_sta->status.ack_signal = 0;
3173 tx_sta->status.excessive_retries = 0;
3174 tx_sta->status.queue_length = 0;
3175 tx_sta->status.queue_number = 0;
3176
3177 if (in_interrupt())
3178 ieee80211_tx_status_irqsafe(priv->hw,
3179 tx_sta->skb[0], &(tx_sta->status));
3180 else
3181 ieee80211_tx_status(priv->hw,
3182 tx_sta->skb[0], &(tx_sta->status));
3183
3184 tx_sta->skb[0] = NULL;
3185}
3186
3187/**
6440adb5 3188 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 3189 *
6440adb5
BC		 3190 * When FW advances 'R' index, all entries between old and new 'R' index
3191 * need to be reclaimed. As result, some free space forms. If there is
3192 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 3193 */
c79dd5b5 3194int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 3195{
bb8c093b
CH		 3196 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
3197 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 3198 int nfreed = 0;
3199
3200 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
3201 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3202 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 3203 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 3204 return 0;
3205 }
3206
c54b679d 3207 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 3208 q->read_ptr != index;
c54b679d 3209 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 3210 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 3211 iwl4965_txstatus_to_ieee(priv,
fc4b6853 3212 &(txq->txb[txq->q.read_ptr]));
bb8c093b 3213 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 3214 } else if (nfreed > 1) {
3215 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 3216 q->write_ptr, q->read_ptr);
b481de9c
ZY		 3217 queue_work(priv->workqueue, &priv->restart);
3218 }
3219 nfreed++;
3220 }
3221
fe01b477 3222/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY		 3223 (txq_id != IWL_CMD_QUEUE_NUM) &&
3224 priv->mac80211_registered)
fe01b477 3225 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY		 3226
3227
3228 return nfreed;
3229}
3230
bb8c093b 3231static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 3232{
3233 status &= TX_STATUS_MSK;
3234 return (status == TX_STATUS_SUCCESS)
3235 || (status == TX_STATUS_DIRECT_DONE);
3236}
3237
3238/******************************************************************************
3239 *
3240 * Generic RX handler implementations
3241 *
3242 ******************************************************************************/
c8b0e6e1 3243#ifdef CONFIG_IWL4965_HT
b481de9c 3244
c79dd5b5 3245static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY		 3246 struct ieee80211_hdr *hdr)
3247{
3248 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
3249 return IWL_AP_ID;
3250 else {
3251 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 3252 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY		 3253 }
3254}
3255
bb8c093b 3256static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 3257 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY		 3258{
3259 if (priv->txq[txq_id].txb[idx].skb[0])
3260 return (struct ieee80211_hdr *)priv->txq[txq_id].
3261 txb[idx].skb[0]->data;
3262 return NULL;
3263}
3264
bb8c093b 3265static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 3266{
3267 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
3268 tx_resp->frame_count);
3269 return le32_to_cpu(*scd_ssn) & MAX_SN;
3270
3271}
6440adb5
BC		 3272
3273/**
3274 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
3275 */
c79dd5b5 3276static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 3277 struct iwl4965_ht_agg *agg,
fe01b477 3278 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY		 3279 u16 start_idx)
3280{
fe01b477
RR		 3281 u16 status;
3282 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY		 3283 struct ieee80211_tx_status *tx_status = NULL;
3284 struct ieee80211_hdr *hdr = NULL;
3285 int i, sh;
3286 int txq_id, idx;
3287 u16 seq;
3288
3289 if (agg->wait_for_ba)
6440adb5 3290 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 3291
3292 agg->frame_count = tx_resp->frame_count;
3293 agg->start_idx = start_idx;
3294 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3295 agg->bitmap = 0;
b481de9c 3296
6440adb5 3297 /* # frames attempted by Tx command */
b481de9c 3298 if (agg->frame_count == 1) {
6440adb5 3299 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR		 3300 status = le16_to_cpu(frame_status[0].status);
3301 seq = le16_to_cpu(frame_status[0].sequence);
3302 idx = SEQ_TO_INDEX(seq);
3303 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 3304
b481de9c 3305 /* FIXME: code repetition */
fe01b477
RR		 3306 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3307 agg->frame_count, agg->start_idx, idx);
b481de9c 3308
fe01b477 3309 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY		 3310 tx_status->retry_count = tx_resp->failure_frame;
3311 tx_status->queue_number = status & 0xff;
fe01b477
RR		 3312 tx_status->queue_length = tx_resp->failure_rts;
3313 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 3314 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 3315 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3316 iwl4965_hwrate_to_tx_control(priv,
3317 le32_to_cpu(tx_resp->rate_n_flags),
3318 &tx_status->control);
b481de9c
ZY		 3319 /* FIXME: code repetition end */
3320
3321 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3322 status & 0xff, tx_resp->failure_frame);
3323 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 3324 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 3325
3326 agg->wait_for_ba = 0;
3327 } else {
6440adb5 3328 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 3329 u64 bitmap = 0;
3330 int start = agg->start_idx;
3331
6440adb5 3332 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 3333 for (i = 0; i < agg->frame_count; i++) {
3334 u16 sc;
fe01b477
RR		 3335 status = le16_to_cpu(frame_status[i].status);
3336 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY		 3337 idx = SEQ_TO_INDEX(seq);
3338 txq_id = SEQ_TO_QUEUE(seq);
3339
3340 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3341 AGG_TX_STATE_ABORT_MSK))
3342 continue;
3343
3344 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3345 agg->frame_count, txq_id, idx);
3346
bb8c093b 3347 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 3348
3349 sc = le16_to_cpu(hdr->seq_ctrl);
3350 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3351 IWL_ERROR("BUG_ON idx doesn't match seq control"
3352 " idx=%d, seq_idx=%d, seq=%d\n",
3353 idx, SEQ_TO_SN(sc),
3354 hdr->seq_ctrl);
3355 return -1;
3356 }
3357
3358 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3359 i, idx, SEQ_TO_SN(sc));
3360
3361 sh = idx - start;
3362 if (sh > 64) {
3363 sh = (start - idx) + 0xff;
3364 bitmap = bitmap << sh;
3365 sh = 0;
3366 start = idx;
3367 } else if (sh < -64)
3368 sh = 0xff - (start - idx);
3369 else if (sh < 0) {
3370 sh = start - idx;
3371 start = idx;
3372 bitmap = bitmap << sh;
3373 sh = 0;
3374 }
3375 bitmap |= (1 << sh);
3376 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3377 start, (u32)(bitmap & 0xFFFFFFFF));
3378 }
3379
fe01b477 3380 agg->bitmap = bitmap;
b481de9c
ZY		 3381 agg->start_idx = start;
3382 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3383 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 3384 agg->frame_count, agg->start_idx,
fe01b477 3385 agg->bitmap);
b481de9c
ZY		 3386
3387 if (bitmap)
3388 agg->wait_for_ba = 1;
3389 }
3390 return 0;
3391}
3392#endif
b481de9c 3393
6440adb5
BC		 3394/**
3395 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3396 */
c79dd5b5 3397static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 3398 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3399{
bb8c093b 3400 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3401 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3402 int txq_id = SEQ_TO_QUEUE(sequence);
3403 int index = SEQ_TO_INDEX(sequence);
bb8c093b 3404 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 3405 struct ieee80211_tx_status *tx_status;
bb8c093b 3406 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 3407 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 3408#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3409 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3410 struct ieee80211_hdr *hdr;
3411 __le16 *qc;
b481de9c
ZY		 3412#endif
3413
3414 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3415 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3416 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 3417 index, txq->q.n_bd, txq->q.write_ptr,
3418 txq->q.read_ptr);
b481de9c
ZY		 3419 return;
3420 }
3421
c8b0e6e1 3422#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3423 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3424 qc = ieee80211_get_qos_ctrl(hdr);
3425
3426 if (qc)
3427 tid = le16_to_cpu(*qc) & 0xf;
3428
3429 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3430 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3431 IWL_ERROR("Station not known\n");
3432 return;
3433 }
3434
b481de9c 3435 if (txq->sched_retry) {
bb8c093b 3436 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 3437 struct iwl4965_ht_agg *agg = NULL;
b481de9c 3438
fe01b477 3439 if (!qc)
b481de9c 3440 return;
b481de9c
ZY		 3441
3442 agg = &priv->stations[sta_id].tid[tid].agg;
3443
fe01b477
RR		 3444 iwl4965_tx_status_reply_tx(priv, agg,
3445 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY		 3446
3447 if ((tx_resp->frame_count == 1) &&
bb8c093b 3448 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 3449 /* TODO: send BAR */
3450 }
3451
fe01b477
RR		 3452 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3453 int freed;
c54b679d 3454 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 3455 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3456 "%d index %d\n", scd_ssn , index);
fe01b477
RR		 3457 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3458 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3459
3460 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3461 txq_id >= 0 && priv->mac80211_registered &&
3462 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3463 ieee80211_wake_queue(priv->hw, txq_id);
3464
3465 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY		 3466 }
3467 } else {
c8b0e6e1 3468#endif /* CONFIG_IWL4965_HT */
fc4b6853 3469 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 3470
3471 tx_status->retry_count = tx_resp->failure_frame;
3472 tx_status->queue_number = status;
3473 tx_status->queue_length = tx_resp->bt_kill_count;
3474 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 3475 tx_status->flags =
bb8c093b 3476 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3477 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
3478 &tx_status->control);
b481de9c 3479
b481de9c 3480 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3481 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 3482 status, le32_to_cpu(tx_resp->rate_n_flags),
3483 tx_resp->failure_frame);
3484
3485 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR		 3486 if (index != -1) {
3487 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3488#ifdef CONFIG_IWL4965_HT
3489 if (tid != MAX_TID_COUNT)
3490 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3491 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3492 (txq_id >= 0) &&
3493 priv->mac80211_registered)
3494 ieee80211_wake_queue(priv->hw, txq_id);
3495 if (tid != MAX_TID_COUNT)
3496 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3497#endif
3498 }
c8b0e6e1 3499#ifdef CONFIG_IWL4965_HT
b481de9c 3500 }
c8b0e6e1 3501#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 3502
3503 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3504 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3505}
3506
3507
c79dd5b5 3508static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 3509 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3510{
bb8c093b
CH		 3511 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3512 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 3513 struct delayed_work *pwork;
3514
3515 palive = &pkt->u.alive_frame;
3516
3517 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3518 "0x%01X 0x%01X\n",
3519 palive->is_valid, palive->ver_type,
3520 palive->ver_subtype);
3521
3522 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3523 IWL_DEBUG_INFO("Initialization Alive received.\n");
3524 memcpy(&priv->card_alive_init,
3525 &pkt->u.alive_frame,
bb8c093b 3526 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 3527 pwork = &priv->init_alive_start;
3528 } else {
3529 IWL_DEBUG_INFO("Runtime Alive received.\n");
3530 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3531 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 3532 pwork = &priv->alive_start;
3533 }
3534
3535 /* We delay the ALIVE response by 5ms to
3536 * give the HW RF Kill time to activate... */
3537 if (palive->is_valid == UCODE_VALID_OK)
3538 queue_delayed_work(priv->workqueue, pwork,
3539 msecs_to_jiffies(5));
3540 else
3541 IWL_WARNING("uCode did not respond OK.\n");
3542}
3543
c79dd5b5 3544static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 3545 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3546{
bb8c093b 3547 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3548
3549 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3550 return;
3551}
3552
c79dd5b5 3553static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 3554 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3555{
bb8c093b 3556 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3557
3558 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3559 "seq 0x%04X ser 0x%08X\n",
3560 le32_to_cpu(pkt->u.err_resp.error_type),
3561 get_cmd_string(pkt->u.err_resp.cmd_id),
3562 pkt->u.err_resp.cmd_id,
3563 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3564 le32_to_cpu(pkt->u.err_resp.error_info));
3565}
3566
3567#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3568
c79dd5b5 3569static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3570{
bb8c093b
CH		 3571 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3572 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3573 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 3574 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3575 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3576 rxon->channel = csa->channel;
3577 priv->staging_rxon.channel = csa->channel;
3578}
3579
c79dd5b5 3580static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 3581 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3582{
c8b0e6e1 3583#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 3584 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3585 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 3586
3587 if (!report->state) {
3588 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3589 "Spectrum Measure Notification: Start\n");
3590 return;
3591 }
3592
3593 memcpy(&priv->measure_report, report, sizeof(*report));
3594 priv->measurement_status |= MEASUREMENT_READY;
3595#endif
3596}
3597
c79dd5b5 3598static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 3599 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3600{
0a6857e7 3601#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3602 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3603 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 3604 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3605 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3606#endif
3607}
3608
c79dd5b5 3609static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 3610 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3611{
bb8c093b 3612 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3613 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3614 "notification for %s:\n",
3615 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 3616 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 3617}
3618
bb8c093b 3619static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3620{
c79dd5b5
TW		 3621 struct iwl_priv *priv =
3622 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 3623 struct sk_buff *beacon;
3624
3625 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 3626 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY		 3627
3628 if (!beacon) {
3629 IWL_ERROR("update beacon failed\n");
3630 return;
3631 }
3632
3633 mutex_lock(&priv->mutex);
3634 /* new beacon skb is allocated every time; dispose previous.*/
3635 if (priv->ibss_beacon)
3636 dev_kfree_skb(priv->ibss_beacon);
3637
3638 priv->ibss_beacon = beacon;
3639 mutex_unlock(&priv->mutex);
3640
bb8c093b 3641 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 3642}
3643
c79dd5b5 3644static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 3645 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3646{
0a6857e7 3647#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3648 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3649 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3650 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 3651
3652 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3653 "tsf %d %d rate %d\n",
3654 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3655 beacon->beacon_notify_hdr.failure_frame,
3656 le32_to_cpu(beacon->ibss_mgr_status),
3657 le32_to_cpu(beacon->high_tsf),
3658 le32_to_cpu(beacon->low_tsf), rate);
3659#endif
3660
3661 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3662 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3663 queue_work(priv->workqueue, &priv->beacon_update);
3664}
3665
3666/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3667static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3668 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3669{
0a6857e7 3670#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3671 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3672 struct iwl4965_scanreq_notification *notif =
3673 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 3674
3675 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3676#endif
3677}
3678
3679/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3680static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3681 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3682{
bb8c093b
CH		 3683 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3684 struct iwl4965_scanstart_notification *notif =
3685 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 3686 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3687 IWL_DEBUG_SCAN("Scan start: "
3688 "%d [802.11%s] "
3689 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3690 notif->channel,
3691 notif->band ? "bg" : "a",
3692 notif->tsf_high,
3693 notif->tsf_low, notif->status, notif->beacon_timer);
3694}
3695
3696/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3697static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3698 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3699{
bb8c093b
CH		 3700 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3701 struct iwl4965_scanresults_notification *notif =
3702 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 3703
3704 IWL_DEBUG_SCAN("Scan ch.res: "
3705 "%d [802.11%s] "
3706 "(TSF: 0x%08X:%08X) - %d "
3707 "elapsed=%lu usec (%dms since last)\n",
3708 notif->channel,
3709 notif->band ? "bg" : "a",
3710 le32_to_cpu(notif->tsf_high),
3711 le32_to_cpu(notif->tsf_low),
3712 le32_to_cpu(notif->statistics[0]),
3713 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3714 jiffies_to_msecs(elapsed_jiffies
3715 (priv->last_scan_jiffies, jiffies)));
3716
3717 priv->last_scan_jiffies = jiffies;
7878a5a4 3718 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3719}
3720
3721/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3722static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3723 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3724{
bb8c093b
CH		 3725 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3726 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 3727
3728 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3729 scan_notif->scanned_channels,
3730 scan_notif->tsf_low,
3731 scan_notif->tsf_high, scan_notif->status);
3732
3733 /* The HW is no longer scanning */
3734 clear_bit(STATUS_SCAN_HW, &priv->status);
3735
3736 /* The scan completion notification came in, so kill that timer... */
3737 cancel_delayed_work(&priv->scan_check);
3738
3739 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3740 (priv->scan_bands == 2) ? "2.4" : "5.2",
3741 jiffies_to_msecs(elapsed_jiffies
3742 (priv->scan_pass_start, jiffies)));
3743
3744 /* Remove this scanned band from the list
3745 * of pending bands to scan */
3746 priv->scan_bands--;
3747
3748 /* If a request to abort was given, or the scan did not succeed
3749 * then we reset the scan state machine and terminate,
3750 * re-queuing another scan if one has been requested */
3751 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3752 IWL_DEBUG_INFO("Aborted scan completed.\n");
3753 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3754 } else {
3755 /* If there are more bands on this scan pass reschedule */
3756 if (priv->scan_bands > 0)
3757 goto reschedule;
3758 }
3759
3760 priv->last_scan_jiffies = jiffies;
7878a5a4 3761 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3762 IWL_DEBUG_INFO("Setting scan to off\n");
3763
3764 clear_bit(STATUS_SCANNING, &priv->status);
3765
3766 IWL_DEBUG_INFO("Scan took %dms\n",
3767 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3768
3769 queue_work(priv->workqueue, &priv->scan_completed);
3770
3771 return;
3772
3773reschedule:
3774 priv->scan_pass_start = jiffies;
3775 queue_work(priv->workqueue, &priv->request_scan);
3776}
3777
3778/* Handle notification from uCode that card's power state is changing
3779 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3780static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3781 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3782{
bb8c093b 3783 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3784 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3785 unsigned long status = priv->status;
3786
3787 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3788 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3789 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3790
3791 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3792 RF_CARD_DISABLED)) {
3793
bb8c093b 3794 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3795 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3796
bb8c093b
CH		 3797 if (!iwl4965_grab_nic_access(priv)) {
3798 iwl4965_write_direct32(
b481de9c
ZY		 3799 priv, HBUS_TARG_MBX_C,
3800 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3801
bb8c093b 3802 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3803 }
3804
3805 if (!(flags & RXON_CARD_DISABLED)) {
bb8c093b 3806 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3807 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH		 3808 if (!iwl4965_grab_nic_access(priv)) {
3809 iwl4965_write_direct32(
b481de9c
ZY		 3810 priv, HBUS_TARG_MBX_C,
3811 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3812
bb8c093b 3813 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3814 }
3815 }
3816
3817 if (flags & RF_CARD_DISABLED) {
bb8c093b 3818 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3819 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
bb8c093b
CH		 3820 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3821 if (!iwl4965_grab_nic_access(priv))
3822 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3823 }
3824 }
3825
3826 if (flags & HW_CARD_DISABLED)
3827 set_bit(STATUS_RF_KILL_HW, &priv->status);
3828 else
3829 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3830
3831
3832 if (flags & SW_CARD_DISABLED)
3833 set_bit(STATUS_RF_KILL_SW, &priv->status);
3834 else
3835 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3836
3837 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3838 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3839
3840 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3841 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3842 (test_bit(STATUS_RF_KILL_SW, &status) !=
3843 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3844 queue_work(priv->workqueue, &priv->rf_kill);
3845 else
3846 wake_up_interruptible(&priv->wait_command_queue);
3847}
3848
3849/**
bb8c093b 3850 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 3851 *
3852 * Setup the RX handlers for each of the reply types sent from the uCode
3853 * to the host.
3854 *
3855 * This function chains into the hardware specific files for them to setup
3856 * any hardware specific handlers as well.
3857 */
c79dd5b5 3858static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3859{
bb8c093b
CH		 3860 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3861 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3862 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3863 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3864 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 3865 iwl4965_rx_spectrum_measure_notif;
3866 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3867 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 3868 iwl4965_rx_pm_debug_statistics_notif;
3869 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3870
9fbab516
BC		 3871 /*
3872 * The same handler is used for both the REPLY to a discrete
3873 * statistics request from the host as well as for the periodic
3874 * statistics notifications (after received beacons) from the uCode.
b481de9c 3875 */
bb8c093b
CH		 3876 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3877 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3878
bb8c093b
CH		 3879 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3880 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3881 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3882 iwl4965_rx_scan_results_notif;
b481de9c 3883 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 3884 iwl4965_rx_scan_complete_notif;
3885 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3886 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3887
9fbab516 3888 /* Set up hardware specific Rx handlers */
bb8c093b 3889 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY		 3890}
3891
3892/**
bb8c093b 3893 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 3894 * @rxb: Rx buffer to reclaim
3895 *
3896 * If an Rx buffer has an async callback associated with it the callback
3897 * will be executed. The attached skb (if present) will only be freed
3898 * if the callback returns 1
3899 */
c79dd5b5 3900static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3901 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3902{
bb8c093b 3903 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3904 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3905 int txq_id = SEQ_TO_QUEUE(sequence);
3906 int index = SEQ_TO_INDEX(sequence);
3907 int huge = sequence & SEQ_HUGE_FRAME;
3908 int cmd_index;
bb8c093b 3909 struct iwl4965_cmd *cmd;
b481de9c
ZY		 3910
3911 /* If a Tx command is being handled and it isn't in the actual
3912 * command queue then there a command routing bug has been introduced
3913 * in the queue management code. */
3914 if (txq_id != IWL_CMD_QUEUE_NUM)
3915 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3916 txq_id, pkt->hdr.cmd);
3917 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3918
3919 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3920 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3921
3922 /* Input error checking is done when commands are added to queue. */
3923 if (cmd->meta.flags & CMD_WANT_SKB) {
3924 cmd->meta.source->u.skb = rxb->skb;
3925 rxb->skb = NULL;
3926 } else if (cmd->meta.u.callback &&
3927 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3928 rxb->skb = NULL;
3929
bb8c093b 3930 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 3931
3932 if (!(cmd->meta.flags & CMD_ASYNC)) {
3933 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3934 wake_up_interruptible(&priv->wait_command_queue);
3935 }
3936}
3937
3938/************************** RX-FUNCTIONS ****************************/
3939/*
3940 * Rx theory of operation
3941 *
9fbab516
BC		 3942 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3943 * each of which point to Receive Buffers to be filled by 4965. These get
3944 * used not only for Rx frames, but for any command response or notification
3945 * from the 4965. The driver and 4965 manage the Rx buffers by means
3946 * of indexes into the circular buffer.
b481de9c
ZY		 3947 *
3948 * Rx Queue Indexes
3949 * The host/firmware share two index registers for managing the Rx buffers.
3950 *
3951 * The READ index maps to the first position that the firmware may be writing
3952 * to -- the driver can read up to (but not including) this position and get
3953 * good data.
3954 * The READ index is managed by the firmware once the card is enabled.
3955 *
3956 * The WRITE index maps to the last position the driver has read from -- the
3957 * position preceding WRITE is the last slot the firmware can place a packet.
3958 *
3959 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3960 * WRITE = READ.
3961 *
9fbab516 3962 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 3963 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3964 *
9fbab516 3965 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 3966 * and fire the RX interrupt. The driver can then query the READ index and
3967 * process as many packets as possible, moving the WRITE index forward as it
3968 * resets the Rx queue buffers with new memory.
3969 *
3970 * The management in the driver is as follows:
3971 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3972 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3973 * to replenish the iwl->rxq->rx_free.
bb8c093b 3974 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 3975 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3976 * 'processed' and 'read' driver indexes as well)
3977 * + A received packet is processed and handed to the kernel network stack,
3978 * detached from the iwl->rxq. The driver 'processed' index is updated.
3979 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3980 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3981 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3982 * were enough free buffers and RX_STALLED is set it is cleared.
3983 *
3984 *
3985 * Driver sequence:
3986 *
9fbab516
BC		 3987 * iwl4965_rx_queue_alloc() Allocates rx_free
3988 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3989 * iwl4965_rx_queue_restock
9fbab516 3990 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 3991 * queue, updates firmware pointers, and updates
3992 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3993 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 3994 *
3995 * -- enable interrupts --
9fbab516 3996 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 3997 * READ INDEX, detaching the SKB from the pool.
3998 * Moves the packet buffer from queue to rx_used.
bb8c093b 3999 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 4000 * slots.
4001 * ...
4002 *
4003 */
4004
4005/**
bb8c093b 4006 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 4007 */
bb8c093b 4008static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 4009{
4010 int s = q->read - q->write;
4011 if (s <= 0)
4012 s += RX_QUEUE_SIZE;
4013 /* keep some buffer to not confuse full and empty queue */
4014 s -= 2;
4015 if (s < 0)
4016 s = 0;
4017 return s;
4018}
4019
4020/**
bb8c093b 4021 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 4022 */
c79dd5b5 4023int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 4024{
4025 u32 reg = 0;
4026 int rc = 0;
4027 unsigned long flags;
4028
4029 spin_lock_irqsave(&q->lock, flags);
4030
4031 if (q->need_update == 0)
4032 goto exit_unlock;
4033
6440adb5 4034 /* If power-saving is in use, make sure device is awake */
b481de9c 4035 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
bb8c093b 4036 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4037
4038 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
bb8c093b 4039 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4040 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4041 goto exit_unlock;
4042 }
4043
bb8c093b 4044 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4045 if (rc)
4046 goto exit_unlock;
4047
6440adb5 4048 /* Device expects a multiple of 8 */
bb8c093b 4049 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 4050 q->write & ~0x7);
bb8c093b 4051 iwl4965_release_nic_access(priv);
6440adb5
BC		 4052
4053 /* Else device is assumed to be awake */
b481de9c 4054 } else
6440adb5 4055 /* Device expects a multiple of 8 */
bb8c093b 4056 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 4057
4058
4059 q->need_update = 0;
4060
4061 exit_unlock:
4062 spin_unlock_irqrestore(&q->lock, flags);
4063 return rc;
4064}
4065
4066/**
9fbab516 4067 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 4068 */
c79dd5b5 4069static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY		 4070 dma_addr_t dma_addr)
4071{
4072 return cpu_to_le32((u32)(dma_addr >> 8));
4073}
4074
4075
4076/**
bb8c093b 4077 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 4078 *
9fbab516 4079 * If there are slots in the RX queue that need to be restocked,
b481de9c 4080 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 4081 * as we can, pulling from rx_free.
b481de9c
ZY		 4082 *
4083 * This moves the 'write' index forward to catch up with 'processed', and
4084 * also updates the memory address in the firmware to reference the new
4085 * target buffer.
4086 */
c79dd5b5 4087static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 4088{
bb8c093b 4089 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4090 struct list_head *element;
bb8c093b 4091 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4092 unsigned long flags;
4093 int write, rc;
4094
4095 spin_lock_irqsave(&rxq->lock, flags);
4096 write = rxq->write & ~0x7;
bb8c093b 4097 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 4098 /* Get next free Rx buffer, remove from free list */
b481de9c 4099 element = rxq->rx_free.next;
bb8c093b 4100 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 4101 list_del(element);
6440adb5
BC		 4102
4103 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 4104 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 4105 rxq->queue[rxq->write] = rxb;
4106 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
4107 rxq->free_count--;
4108 }
4109 spin_unlock_irqrestore(&rxq->lock, flags);
4110 /* If the pre-allocated buffer pool is dropping low, schedule to
4111 * refill it */
4112 if (rxq->free_count <= RX_LOW_WATERMARK)
4113 queue_work(priv->workqueue, &priv->rx_replenish);
4114
4115
6440adb5
BC		 4116 /* If we've added more space for the firmware to place data, tell it.
4117 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 4118 if ((write != (rxq->write & ~0x7))
4119 || (abs(rxq->write - rxq->read) > 7)) {
4120 spin_lock_irqsave(&rxq->lock, flags);
4121 rxq->need_update = 1;
4122 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 4123 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 4124 if (rc)
4125 return rc;
4126 }
4127
4128 return 0;
4129}
4130
4131/**
bb8c093b 4132 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 4133 *
4134 * When moving to rx_free an SKB is allocated for the slot.
4135 *
bb8c093b 4136 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 4137 * This is called as a scheduled work item (except for during initialization)
b481de9c 4138 */
c79dd5b5 4139static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 4140{
bb8c093b 4141 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 4142 struct list_head *element;
bb8c093b 4143 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 4144 unsigned long flags;
4145 spin_lock_irqsave(&rxq->lock, flags);
4146 while (!list_empty(&rxq->rx_used)) {
4147 element = rxq->rx_used.next;
bb8c093b 4148 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
BC		 4149
4150 /* Alloc a new receive buffer */
b481de9c 4151 rxb->skb =
9ee1ba47
RR		 4152 alloc_skb(priv->hw_setting.rx_buf_size,
4153 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 4154 if (!rxb->skb) {
4155 if (net_ratelimit())
4156 printk(KERN_CRIT DRV_NAME
4157 ": Can not allocate SKB buffers\n");
4158 /* We don't reschedule replenish work here -- we will
4159 * call the restock method and if it still needs
4160 * more buffers it will schedule replenish */
4161 break;
4162 }
4163 priv->alloc_rxb_skb++;
4164 list_del(element);
6440adb5
BC		 4165
4166 /* Get physical address of RB/SKB */
b481de9c
ZY		 4167 rxb->dma_addr =
4168 pci_map_single(priv->pci_dev, rxb->skb->data,
9ee1ba47 4169 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4170 list_add_tail(&rxb->list, &rxq->rx_free);
4171 rxq->free_count++;
4172 }
4173 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 4174}
4175
4176/*
4177 * this should be called while priv->lock is locked
4178*/
4fd1f841 4179static void __iwl4965_rx_replenish(void *data)
5c0eef96 4180{
c79dd5b5 4181 struct iwl_priv *priv = data;
5c0eef96
MA		 4182
4183 iwl4965_rx_allocate(priv);
4184 iwl4965_rx_queue_restock(priv);
4185}
4186
4187
4188void iwl4965_rx_replenish(void *data)
4189{
c79dd5b5 4190 struct iwl_priv *priv = data;
5c0eef96
MA		 4191 unsigned long flags;
4192
4193 iwl4965_rx_allocate(priv);
b481de9c
ZY		 4194
4195 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 4196 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4197 spin_unlock_irqrestore(&priv->lock, flags);
4198}
4199
4200/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 4201 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 4202 * This free routine walks the list of POOL entries and if SKB is set to
4203 * non NULL it is unmapped and freed
4204 */
c79dd5b5 4205static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4206{
4207 int i;
4208 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
4209 if (rxq->pool[i].skb != NULL) {
4210 pci_unmap_single(priv->pci_dev,
4211 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4212 priv->hw_setting.rx_buf_size,
4213 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4214 dev_kfree_skb(rxq->pool[i].skb);
4215 }
4216 }
4217
4218 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
4219 rxq->dma_addr);
4220 rxq->bd = NULL;
4221}
4222
c79dd5b5 4223int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 4224{
bb8c093b 4225 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4226 struct pci_dev *dev = priv->pci_dev;
4227 int i;
4228
4229 spin_lock_init(&rxq->lock);
4230 INIT_LIST_HEAD(&rxq->rx_free);
4231 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
BC		 4232
4233 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 4234 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
4235 if (!rxq->bd)
4236 return -ENOMEM;
6440adb5 4237
b481de9c
ZY		 4238 /* Fill the rx_used queue with _all_ of the Rx buffers */
4239 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
4240 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 4241
b481de9c
ZY		 4242 /* Set us so that we have processed and used all buffers, but have
4243 * not restocked the Rx queue with fresh buffers */
4244 rxq->read = rxq->write = 0;
4245 rxq->free_count = 0;
4246 rxq->need_update = 0;
4247 return 0;
4248}
4249
c79dd5b5 4250void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 4251{
4252 unsigned long flags;
4253 int i;
4254 spin_lock_irqsave(&rxq->lock, flags);
4255 INIT_LIST_HEAD(&rxq->rx_free);
4256 INIT_LIST_HEAD(&rxq->rx_used);
4257 /* Fill the rx_used queue with _all_ of the Rx buffers */
4258 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
4259 /* In the reset function, these buffers may have been allocated
4260 * to an SKB, so we need to unmap and free potential storage */
4261 if (rxq->pool[i].skb != NULL) {
4262 pci_unmap_single(priv->pci_dev,
4263 rxq->pool[i].dma_addr,
9ee1ba47
RR		 4264 priv->hw_setting.rx_buf_size,
4265 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4266 priv->alloc_rxb_skb--;
4267 dev_kfree_skb(rxq->pool[i].skb);
4268 rxq->pool[i].skb = NULL;
4269 }
4270 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
4271 }
4272
4273 /* Set us so that we have processed and used all buffers, but have
4274 * not restocked the Rx queue with fresh buffers */
4275 rxq->read = rxq->write = 0;
4276 rxq->free_count = 0;
4277 spin_unlock_irqrestore(&rxq->lock, flags);
4278}
4279
4280/* Convert linear signal-to-noise ratio into dB */
4281static u8 ratio2dB[100] = {
4282/* 0 1 2 3 4 5 6 7 8 9 */
4283 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4284 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4285 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4286 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4287 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4288 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4289 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4290 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4291 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4292 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4293};
4294
4295/* Calculates a relative dB value from a ratio of linear
4296 * (i.e. not dB) signal levels.
4297 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 4298int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 4299{
c899a575
AB		 4300 /* 1000:1 or higher just report as 60 dB */
4301 if (sig_ratio >= 1000)
b481de9c
ZY		 4302 return 60;
4303
c899a575 4304 /* 100:1 or higher, divide by 10 and use table,
b481de9c 4305 * add 20 dB to make up for divide by 10 */
c899a575 4306 if (sig_ratio >= 100)
b481de9c
ZY		 4307 return (20 + (int)ratio2dB[sig_ratio/10]);
4308
4309 /* We shouldn't see this */
4310 if (sig_ratio < 1)
4311 return 0;
4312
4313 /* Use table for ratios 1:1 - 99:1 */
4314 return (int)ratio2dB[sig_ratio];
4315}
4316
4317#define PERFECT_RSSI (-20) /* dBm */
4318#define WORST_RSSI (-95) /* dBm */
4319#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4320
4321/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4322 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4323 * about formulas used below. */
bb8c093b 4324int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 4325{
4326 int sig_qual;
4327 int degradation = PERFECT_RSSI - rssi_dbm;
4328
4329 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4330 * as indicator; formula is (signal dbm - noise dbm).
4331 * SNR at or above 40 is a great signal (100%).
4332 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4333 * Weakest usable signal is usually 10 - 15 dB SNR. */
4334 if (noise_dbm) {
4335 if (rssi_dbm - noise_dbm >= 40)
4336 return 100;
4337 else if (rssi_dbm < noise_dbm)
4338 return 0;
4339 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4340
4341 /* Else use just the signal level.
4342 * This formula is a least squares fit of data points collected and
4343 * compared with a reference system that had a percentage (%) display
4344 * for signal quality. */
4345 } else
4346 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4347 (15 * RSSI_RANGE + 62 * degradation)) /
4348 (RSSI_RANGE * RSSI_RANGE);
4349
4350 if (sig_qual > 100)
4351 sig_qual = 100;
4352 else if (sig_qual < 1)
4353 sig_qual = 0;
4354
4355 return sig_qual;
4356}
4357
4358/**
9fbab516 4359 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 4360 *
4361 * Uses the priv->rx_handlers callback function array to invoke
4362 * the appropriate handlers, including command responses,
4363 * frame-received notifications, and other notifications.
4364 */
c79dd5b5 4365static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 4366{
bb8c093b
CH		 4367 struct iwl4965_rx_mem_buffer *rxb;
4368 struct iwl4965_rx_packet *pkt;
4369 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4370 u32 r, i;
4371 int reclaim;
4372 unsigned long flags;
5c0eef96 4373 u8 fill_rx = 0;
d68ab680 4374 u32 count = 8;
b481de9c 4375
6440adb5
BC		 4376 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4377 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 4378 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 4379 i = rxq->read;
4380
4381 /* Rx interrupt, but nothing sent from uCode */
4382 if (i == r)
4383 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4384
5c0eef96
MA		 4385 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4386 fill_rx = 1;
4387
b481de9c
ZY		 4388 while (i != r) {
4389 rxb = rxq->queue[i];
4390
9fbab516 4391 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 4392 * then a bug has been introduced in the queue refilling
4393 * routines -- catch it here */
4394 BUG_ON(rxb == NULL);
4395
4396 rxq->queue[i] = NULL;
4397
4398 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
9ee1ba47 4399 priv->hw_setting.rx_buf_size,
b481de9c 4400 PCI_DMA_FROMDEVICE);
bb8c093b 4401 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4402
4403 /* Reclaim a command buffer only if this packet is a response
4404 * to a (driver-originated) command.
4405 * If the packet (e.g. Rx frame) originated from uCode,
4406 * there is no command buffer to reclaim.
4407 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4408 * but apparently a few don't get set; catch them here. */
4409 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4410 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
4411 (pkt->hdr.cmd != REPLY_4965_RX) &&
cfe01709 4412 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 4413 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4414 (pkt->hdr.cmd != REPLY_TX);
4415
4416 /* Based on type of command response or notification,
4417 * handle those that need handling via function in
bb8c093b 4418 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 4419 if (priv->rx_handlers[pkt->hdr.cmd]) {
4420 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4421 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4422 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4423 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4424 } else {
4425 /* No handling needed */
4426 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4427 "r %d i %d No handler needed for %s, 0x%02x\n",
4428 r, i, get_cmd_string(pkt->hdr.cmd),
4429 pkt->hdr.cmd);
4430 }
4431
4432 if (reclaim) {
9fbab516
BC		 4433 /* Invoke any callbacks, transfer the skb to caller, and
4434 * fire off the (possibly) blocking iwl4965_send_cmd()
b481de9c
ZY		 4435 * as we reclaim the driver command queue */
4436 if (rxb && rxb->skb)
bb8c093b 4437 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 4438 else
4439 IWL_WARNING("Claim null rxb?\n");
4440 }
4441
4442 /* For now we just don't re-use anything. We can tweak this
4443 * later to try and re-use notification packets and SKBs that
4444 * fail to Rx correctly */
4445 if (rxb->skb != NULL) {
4446 priv->alloc_rxb_skb--;
4447 dev_kfree_skb_any(rxb->skb);
4448 rxb->skb = NULL;
4449 }
4450
4451 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
9ee1ba47
RR		 4452 priv->hw_setting.rx_buf_size,
4453 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4454 spin_lock_irqsave(&rxq->lock, flags);
4455 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4456 spin_unlock_irqrestore(&rxq->lock, flags);
4457 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 4458 /* If there are a lot of unused frames,
4459 * restock the Rx queue so ucode wont assert. */
4460 if (fill_rx) {
4461 count++;
4462 if (count >= 8) {
4463 priv->rxq.read = i;
4464 __iwl4965_rx_replenish(priv);
4465 count = 0;
4466 }
4467 }
b481de9c
ZY		 4468 }
4469
4470 /* Backtrack one entry */
4471 priv->rxq.read = i;
bb8c093b 4472 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4473}
4474
6440adb5
BC		 4475/**
4476 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4477 */
c79dd5b5 4478static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 4479 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 4480{
4481 u32 reg = 0;
4482 int rc = 0;
4483 int txq_id = txq->q.id;
4484
4485 if (txq->need_update == 0)
4486 return rc;
4487
4488 /* if we're trying to save power */
4489 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4490 /* wake up nic if it's powered down ...
4491 * uCode will wake up, and interrupt us again, so next
4492 * time we'll skip this part. */
bb8c093b 4493 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4494
4495 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4496 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
bb8c093b 4497 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4498 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4499 return rc;
4500 }
4501
4502 /* restore this queue's parameters in nic hardware. */
bb8c093b 4503 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4504 if (rc)
4505 return rc;
bb8c093b 4506 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4507 txq->q.write_ptr | (txq_id << 8));
bb8c093b 4508 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4509
4510 /* else not in power-save mode, uCode will never sleep when we're
4511 * trying to tx (during RFKILL, we're not trying to tx). */
4512 } else
bb8c093b 4513 iwl4965_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4514 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 4515
4516 txq->need_update = 0;
4517
4518 return rc;
4519}
4520
0a6857e7 4521#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 4522static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4523{
0795af57
JP		 4524 DECLARE_MAC_BUF(mac);
4525
b481de9c 4526 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 4527 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 4528 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4529 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4530 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4531 le32_to_cpu(rxon->filter_flags));
4532 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4533 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4534 rxon->ofdm_basic_rates);
4535 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 4536 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4537 print_mac(mac, rxon->node_addr));
4538 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4539 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 4540 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4541}
4542#endif
4543
c79dd5b5 4544static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4545{
4546 IWL_DEBUG_ISR("Enabling interrupts\n");
4547 set_bit(STATUS_INT_ENABLED, &priv->status);
bb8c093b 4548 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 4549}
4550
c79dd5b5 4551static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4552{
4553 clear_bit(STATUS_INT_ENABLED, &priv->status);
4554
4555 /* disable interrupts from uCode/NIC to host */
bb8c093b 4556 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4557
4558 /* acknowledge/clear/reset any interrupts still pending
4559 * from uCode or flow handler (Rx/Tx DMA) */
bb8c093b
CH		 4560 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4561 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 4562 IWL_DEBUG_ISR("Disabled interrupts\n");
4563}
4564
4565static const char *desc_lookup(int i)
4566{
4567 switch (i) {
4568 case 1:
4569 return "FAIL";
4570 case 2:
4571 return "BAD_PARAM";
4572 case 3:
4573 return "BAD_CHECKSUM";
4574 case 4:
4575 return "NMI_INTERRUPT";
4576 case 5:
4577 return "SYSASSERT";
4578 case 6:
4579 return "FATAL_ERROR";
4580 }
4581
4582 return "UNKNOWN";
4583}
4584
4585#define ERROR_START_OFFSET (1 * sizeof(u32))
4586#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4587
c79dd5b5 4588static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY		 4589{
4590 u32 data2, line;
4591 u32 desc, time, count, base, data1;
4592 u32 blink1, blink2, ilink1, ilink2;
4593 int rc;
4594
4595 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4596
bb8c093b 4597 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4598 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4599 return;
4600 }
4601
bb8c093b 4602 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4603 if (rc) {
4604 IWL_WARNING("Can not read from adapter at this time.\n");
4605 return;
4606 }
4607
bb8c093b 4608 count = iwl4965_read_targ_mem(priv, base);
b481de9c
ZY		 4609
4610 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4611 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 4612 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY		 4613 }
4614
bb8c093b
CH		 4615 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4616 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4617 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4618 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4619 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4620 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4621 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4622 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4623 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 4624
4625 IWL_ERROR("Desc Time "
4626 "data1 data2 line\n");
4627 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4628 desc_lookup(desc), desc, time, data1, data2, line);
4629 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4630 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4631 ilink1, ilink2);
4632
bb8c093b 4633 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4634}
4635
4636#define EVENT_START_OFFSET (4 * sizeof(u32))
4637
4638/**
bb8c093b 4639 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4640 *
bb8c093b 4641 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
b481de9c 4642 */
c79dd5b5 4643static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY		 4644 u32 num_events, u32 mode)
4645{
4646 u32 i;
4647 u32 base; /* SRAM byte address of event log header */
4648 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4649 u32 ptr; /* SRAM byte address of log data */
4650 u32 ev, time, data; /* event log data */
4651
4652 if (num_events == 0)
4653 return;
4654
4655 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4656
4657 if (mode == 0)
4658 event_size = 2 * sizeof(u32);
4659 else
4660 event_size = 3 * sizeof(u32);
4661
4662 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4663
4664 /* "time" is actually "data" for mode 0 (no timestamp).
4665 * place event id # at far right for easier visual parsing. */
4666 for (i = 0; i < num_events; i++) {
bb8c093b 4667 ev = iwl4965_read_targ_mem(priv, ptr);
b481de9c 4668 ptr += sizeof(u32);
bb8c093b 4669 time = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4670 ptr += sizeof(u32);
4671 if (mode == 0)
4672 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4673 else {
bb8c093b 4674 data = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4675 ptr += sizeof(u32);
4676 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4677 }
4678 }
4679}
4680
c79dd5b5 4681static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY		 4682{
4683 int rc;
4684 u32 base; /* SRAM byte address of event log header */
4685 u32 capacity; /* event log capacity in # entries */
4686 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4687 u32 num_wraps; /* # times uCode wrapped to top of log */
4688 u32 next_entry; /* index of next entry to be written by uCode */
4689 u32 size; /* # entries that we'll print */
4690
4691 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 4692 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4693 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4694 return;
4695 }
4696
bb8c093b 4697 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4698 if (rc) {
4699 IWL_WARNING("Can not read from adapter at this time.\n");
4700 return;
4701 }
4702
4703 /* event log header */
bb8c093b
CH		 4704 capacity = iwl4965_read_targ_mem(priv, base);
4705 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4706 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4707 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 4708
4709 size = num_wraps ? capacity : next_entry;
4710
4711 /* bail out if nothing in log */
4712 if (size == 0) {
583fab37 4713 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
bb8c093b 4714 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4715 return;
4716 }
4717
583fab37 4718 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 4719 size, num_wraps);
4720
4721 /* if uCode has wrapped back to top of log, start at the oldest entry,
4722 * i.e the next one that uCode would fill. */
4723 if (num_wraps)
bb8c093b 4724 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 4725 capacity - next_entry, mode);
4726
4727 /* (then/else) start at top of log */
bb8c093b 4728 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4729
bb8c093b 4730 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4731}
4732
4733/**
bb8c093b 4734 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4735 */
c79dd5b5 4736static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4737{
bb8c093b 4738 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 4739 set_bit(STATUS_FW_ERROR, &priv->status);
4740
4741 /* Cancel currently queued command. */
4742 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4743
0a6857e7
TW		 4744#ifdef CONFIG_IWLWIFI_DEBUG
4745 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH		 4746 iwl4965_dump_nic_error_log(priv);
4747 iwl4965_dump_nic_event_log(priv);
4748 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 4749 }
4750#endif
4751
4752 wake_up_interruptible(&priv->wait_command_queue);
4753
4754 /* Keep the restart process from trying to send host
4755 * commands by clearing the INIT status bit */
4756 clear_bit(STATUS_READY, &priv->status);
4757
4758 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4759 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4760 "Restarting adapter due to uCode error.\n");
4761
bb8c093b 4762 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 4763 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4764 sizeof(priv->recovery_rxon));
4765 priv->error_recovering = 1;
4766 }
4767 queue_work(priv->workqueue, &priv->restart);
4768 }
4769}
4770
c79dd5b5 4771static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 4772{
4773 unsigned long flags;
4774
4775 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4776 sizeof(priv->staging_rxon));
4777 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4778 iwl4965_commit_rxon(priv);
b481de9c 4779
bb8c093b 4780 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 4781
4782 spin_lock_irqsave(&priv->lock, flags);
4783 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4784 priv->error_recovering = 0;
4785 spin_unlock_irqrestore(&priv->lock, flags);
4786}
4787
c79dd5b5 4788static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 4789{
4790 u32 inta, handled = 0;
4791 u32 inta_fh;
4792 unsigned long flags;
0a6857e7 4793#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 4794 u32 inta_mask;
4795#endif
4796
4797 spin_lock_irqsave(&priv->lock, flags);
4798
4799 /* Ack/clear/reset pending uCode interrupts.
4800 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4801 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
bb8c093b
CH		 4802 inta = iwl4965_read32(priv, CSR_INT);
4803 iwl4965_write32(priv, CSR_INT, inta);
b481de9c
ZY		 4804
4805 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4806 * Any new interrupts that happen after this, either while we're
4807 * in this tasklet, or later, will show up in next ISR/tasklet. */
bb8c093b
CH		 4808 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
4809 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4810
0a6857e7
TW		 4811#ifdef CONFIG_IWLWIFI_DEBUG
4812 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516
BC		 4813 /* just for debug */
4814 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 4815 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4816 inta, inta_mask, inta_fh);
4817 }
4818#endif
4819
4820 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4821 * atomic, make sure that inta covers all the interrupts that
4822 * we've discovered, even if FH interrupt came in just after
4823 * reading CSR_INT. */
6f83eaa1 4824 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4825 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4826 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 4827 inta |= CSR_INT_BIT_FH_TX;
4828
4829 /* Now service all interrupt bits discovered above. */
4830 if (inta & CSR_INT_BIT_HW_ERR) {
4831 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4832
4833 /* Tell the device to stop sending interrupts */
bb8c093b 4834 iwl4965_disable_interrupts(priv);
b481de9c 4835
bb8c093b 4836 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4837
4838 handled |= CSR_INT_BIT_HW_ERR;
4839
4840 spin_unlock_irqrestore(&priv->lock, flags);
4841
4842 return;
4843 }
4844
0a6857e7
TW		 4845#ifdef CONFIG_IWLWIFI_DEBUG
4846 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4847 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 4848 if (inta & CSR_INT_BIT_SCD)
4849 IWL_DEBUG_ISR("Scheduler finished to transmit "
4850 "the frame/frames.\n");
b481de9c
ZY		 4851
4852 /* Alive notification via Rx interrupt will do the real work */
4853 if (inta & CSR_INT_BIT_ALIVE)
4854 IWL_DEBUG_ISR("Alive interrupt\n");
4855 }
4856#endif
4857 /* Safely ignore these bits for debug checks below */
25c03d8e 4858 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4859
9fbab516 4860 /* HW RF KILL switch toggled */
b481de9c
ZY		 4861 if (inta & CSR_INT_BIT_RF_KILL) {
4862 int hw_rf_kill = 0;
bb8c093b 4863 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 4864 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4865 hw_rf_kill = 1;
4866
4867 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4868 "RF_KILL bit toggled to %s.\n",
4869 hw_rf_kill ? "disable radio":"enable radio");
4870
4871 /* Queue restart only if RF_KILL switch was set to "kill"
4872 * when we loaded driver, and is now set to "enable".
4873 * After we're Alive, RF_KILL gets handled by
3230455d 4874 * iwl4965_rx_card_state_notif() */
53e49093
ZY		 4875 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4876 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4877 queue_work(priv->workqueue, &priv->restart);
53e49093 4878 }
b481de9c
ZY		 4879
4880 handled |= CSR_INT_BIT_RF_KILL;
4881 }
4882
9fbab516 4883 /* Chip got too hot and stopped itself */
b481de9c
ZY		 4884 if (inta & CSR_INT_BIT_CT_KILL) {
4885 IWL_ERROR("Microcode CT kill error detected.\n");
4886 handled |= CSR_INT_BIT_CT_KILL;
4887 }
4888
4889 /* Error detected by uCode */
4890 if (inta & CSR_INT_BIT_SW_ERR) {
4891 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4892 inta);
bb8c093b 4893 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4894 handled |= CSR_INT_BIT_SW_ERR;
4895 }
4896
4897 /* uCode wakes up after power-down sleep */
4898 if (inta & CSR_INT_BIT_WAKEUP) {
4899 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 4900 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4901 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4902 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4903 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4904 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4905 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4906 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 4907
4908 handled |= CSR_INT_BIT_WAKEUP;
4909 }
4910
4911 /* All uCode command responses, including Tx command responses,
4912 * Rx "responses" (frame-received notification), and other
4913 * notifications from uCode come through here*/
4914 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4915 iwl4965_rx_handle(priv);
b481de9c
ZY		 4916 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4917 }
4918
4919 if (inta & CSR_INT_BIT_FH_TX) {
4920 IWL_DEBUG_ISR("Tx interrupt\n");
4921 handled |= CSR_INT_BIT_FH_TX;
4922 }
4923
4924 if (inta & ~handled)
4925 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4926
4927 if (inta & ~CSR_INI_SET_MASK) {
4928 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4929 inta & ~CSR_INI_SET_MASK);
4930 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4931 }
4932
4933 /* Re-enable all interrupts */
bb8c093b 4934 iwl4965_enable_interrupts(priv);
b481de9c 4935
0a6857e7
TW		 4936#ifdef CONFIG_IWLWIFI_DEBUG
4937 if (iwl_debug_level & (IWL_DL_ISR)) {
bb8c093b
CH		 4938 inta = iwl4965_read32(priv, CSR_INT);
4939 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
4940 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4941 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4942 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4943 }
4944#endif
4945 spin_unlock_irqrestore(&priv->lock, flags);
4946}
4947
bb8c093b 4948static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4949{
c79dd5b5 4950 struct iwl_priv *priv = data;
b481de9c
ZY		 4951 u32 inta, inta_mask;
4952 u32 inta_fh;
4953 if (!priv)
4954 return IRQ_NONE;
4955
4956 spin_lock(&priv->lock);
4957
4958 /* Disable (but don't clear!) interrupts here to avoid
4959 * back-to-back ISRs and sporadic interrupts from our NIC.
4960 * If we have something to service, the tasklet will re-enable ints.
4961 * If we *don't* have something, we'll re-enable before leaving here. */
bb8c093b
CH		 4962 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
4963 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4964
4965 /* Discover which interrupts are active/pending */
bb8c093b
CH		 4966 inta = iwl4965_read32(priv, CSR_INT);
4967 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4968
4969 /* Ignore interrupt if there's nothing in NIC to service.
4970 * This may be due to IRQ shared with another device,
4971 * or due to sporadic interrupts thrown from our NIC. */
4972 if (!inta && !inta_fh) {
4973 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4974 goto none;
4975 }
4976
4977 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 4978 /* Hardware disappeared. It might have already raised
4979 * an interrupt */
b481de9c 4980 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4981 goto unplugged;
b481de9c
ZY		 4982 }
4983
4984 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4985 inta, inta_mask, inta_fh);
4986
25c03d8e
JP		 4987 inta &= ~CSR_INT_BIT_SCD;
4988
bb8c093b 4989 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 4990 if (likely(inta || inta_fh))
4991 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4992
66fbb541
ON		 4993 unplugged:
4994 spin_unlock(&priv->lock);
b481de9c
ZY		 4995 return IRQ_HANDLED;
4996
4997 none:
4998 /* re-enable interrupts here since we don't have anything to service. */
bb8c093b 4999 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 5000 spin_unlock(&priv->lock);
5001 return IRQ_NONE;
5002}
5003
5004/************************** EEPROM BANDS ****************************
5005 *
bb8c093b 5006 * The iwl4965_eeprom_band definitions below provide the mapping from the
b481de9c
ZY		 5007 * EEPROM contents to the specific channel number supported for each
5008 * band.
5009 *
c79dd5b5 5010 * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
b481de9c
ZY		 5011 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
5012 * The specific geography and calibration information for that channel
5013 * is contained in the eeprom map itself.
5014 *
5015 * During init, we copy the eeprom information and channel map
5016 * information into priv->channel_info_24/52 and priv->channel_map_24/52
5017 *
5018 * channel_map_24/52 provides the index in the channel_info array for a
5019 * given channel. We have to have two separate maps as there is channel
5020 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
5021 * band_2
5022 *
5023 * A value of 0xff stored in the channel_map indicates that the channel
5024 * is not supported by the hardware at all.
5025 *
5026 * A value of 0xfe in the channel_map indicates that the channel is not
5027 * valid for Tx with the current hardware. This means that
5028 * while the system can tune and receive on a given channel, it may not
5029 * be able to associate or transmit any frames on that
5030 * channel. There is no corresponding channel information for that
5031 * entry.
5032 *
5033 *********************************************************************/
5034
5035/* 2.4 GHz */
bb8c093b 5036static const u8 iwl4965_eeprom_band_1[14] = {
b481de9c
ZY		 5037 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
5038};
5039
5040/* 5.2 GHz bands */
9fbab516 5041static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
b481de9c
ZY		 5042 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
5043};
5044
9fbab516 5045static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
b481de9c
ZY		 5046 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
5047};
5048
bb8c093b 5049static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
b481de9c
ZY		 5050 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
5051};
5052
bb8c093b 5053static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
b481de9c
ZY		 5054 145, 149, 153, 157, 161, 165
5055};
5056
bb8c093b 5057static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
b481de9c
ZY		 5058 1, 2, 3, 4, 5, 6, 7
5059};
5060
bb8c093b 5061static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
b481de9c
ZY		 5062 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
5063};
5064
c79dd5b5 5065static void iwl4965_init_band_reference(const struct iwl_priv *priv,
9fbab516 5066 int band,
b481de9c 5067 int *eeprom_ch_count,
bb8c093b 5068 const struct iwl4965_eeprom_channel
b481de9c
ZY		 5069 **eeprom_ch_info,
5070 const u8 **eeprom_ch_index)
5071{
5072 switch (band) {
5073 case 1: /* 2.4GHz band */
bb8c093b 5074 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
b481de9c 5075 *eeprom_ch_info = priv->eeprom.band_1_channels;
bb8c093b 5076 *eeprom_ch_index = iwl4965_eeprom_band_1;
b481de9c 5077 break;
9fbab516 5078 case 2: /* 4.9GHz band */
bb8c093b 5079 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
b481de9c 5080 *eeprom_ch_info = priv->eeprom.band_2_channels;
bb8c093b 5081 *eeprom_ch_index = iwl4965_eeprom_band_2;
b481de9c
ZY		 5082 break;
5083 case 3: /* 5.2GHz band */
bb8c093b 5084 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
b481de9c 5085 *eeprom_ch_info = priv->eeprom.band_3_channels;
bb8c093b 5086 *eeprom_ch_index = iwl4965_eeprom_band_3;
b481de9c 5087 break;
9fbab516 5088 case 4: /* 5.5GHz band */
bb8c093b 5089 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
b481de9c 5090 *eeprom_ch_info = priv->eeprom.band_4_channels;
bb8c093b 5091 *eeprom_ch_index = iwl4965_eeprom_band_4;
b481de9c 5092 break;
9fbab516 5093 case 5: /* 5.7GHz band */
bb8c093b 5094 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c 5095 *eeprom_ch_info = priv->eeprom.band_5_channels;
bb8c093b 5096 *eeprom_ch_index = iwl4965_eeprom_band_5;
b481de9c 5097 break;
9fbab516 5098 case 6: /* 2.4GHz FAT channels */
bb8c093b 5099 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
b481de9c 5100 *eeprom_ch_info = priv->eeprom.band_24_channels;
bb8c093b 5101 *eeprom_ch_index = iwl4965_eeprom_band_6;
b481de9c 5102 break;
9fbab516 5103 case 7: /* 5 GHz FAT channels */
bb8c093b 5104 *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
b481de9c 5105 *eeprom_ch_info = priv->eeprom.band_52_channels;
bb8c093b 5106 *eeprom_ch_index = iwl4965_eeprom_band_7;
b481de9c
ZY		 5107 break;
5108 default:
5109 BUG();
5110 return;
5111 }
5112}
5113
6440adb5
BC		 5114/**
5115 * iwl4965_get_channel_info - Find driver's private channel info
5116 *
5117 * Based on band and channel number.
5118 */
c79dd5b5 5119const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl_priv *priv,
8318d78a 5120 enum ieee80211_band band, u16 channel)
b481de9c
ZY		 5121{
5122 int i;
5123
8318d78a
JB		 5124 switch (band) {
5125 case IEEE80211_BAND_5GHZ:
b481de9c
ZY		 5126 for (i = 14; i < priv->channel_count; i++) {
5127 if (priv->channel_info[i].channel == channel)
5128 return &priv->channel_info[i];
5129 }
5130 break;
8318d78a 5131 case IEEE80211_BAND_2GHZ:
b481de9c
ZY		 5132 if (channel >= 1 && channel <= 14)
5133 return &priv->channel_info[channel - 1];
5134 break;
8318d78a
JB		 5135 default:
5136 BUG();
b481de9c
ZY		 5137 }
5138
5139 return NULL;
5140}
5141
5142#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
5143 ? # x " " : "")
5144
6440adb5
BC		 5145/**
5146 * iwl4965_init_channel_map - Set up driver's info for all possible channels
5147 */
c79dd5b5 5148static int iwl4965_init_channel_map(struct iwl_priv *priv)
b481de9c
ZY		 5149{
5150 int eeprom_ch_count = 0;
5151 const u8 *eeprom_ch_index = NULL;
bb8c093b 5152 const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
b481de9c 5153 int band, ch;
bb8c093b 5154 struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5155
5156 if (priv->channel_count) {
5157 IWL_DEBUG_INFO("Channel map already initialized.\n");
5158 return 0;
5159 }
5160
5161 if (priv->eeprom.version < 0x2f) {
5162 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
5163 priv->eeprom.version);
5164 return -EINVAL;
5165 }
5166
5167 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
5168
5169 priv->channel_count =
bb8c093b
CH		 5170 ARRAY_SIZE(iwl4965_eeprom_band_1) +
5171 ARRAY_SIZE(iwl4965_eeprom_band_2) +
5172 ARRAY_SIZE(iwl4965_eeprom_band_3) +
5173 ARRAY_SIZE(iwl4965_eeprom_band_4) +
5174 ARRAY_SIZE(iwl4965_eeprom_band_5);
b481de9c
ZY		 5175
5176 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
5177
bb8c093b 5178 priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
b481de9c
ZY		 5179 priv->channel_count, GFP_KERNEL);
5180 if (!priv->channel_info) {
5181 IWL_ERROR("Could not allocate channel_info\n");
5182 priv->channel_count = 0;
5183 return -ENOMEM;
5184 }
5185
5186 ch_info = priv->channel_info;
5187
5188 /* Loop through the 5 EEPROM bands adding them in order to the
5189 * channel map we maintain (that contains additional information than
5190 * what just in the EEPROM) */
5191 for (band = 1; band <= 5; band++) {
5192
bb8c093b 5193 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5194 &eeprom_ch_info, &eeprom_ch_index);
5195
5196 /* Loop through each band adding each of the channels */
5197 for (ch = 0; ch < eeprom_ch_count; ch++) {
5198 ch_info->channel = eeprom_ch_index[ch];
8318d78a
JB		 5199 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
5200 IEEE80211_BAND_5GHZ;
b481de9c
ZY		 5201
5202 /* permanently store EEPROM's channel regulatory flags
5203 * and max power in channel info database. */
5204 ch_info->eeprom = eeprom_ch_info[ch];
5205
5206 /* Copy the run-time flags so they are there even on
5207 * invalid channels */
5208 ch_info->flags = eeprom_ch_info[ch].flags;
5209
5210 if (!(is_channel_valid(ch_info))) {
5211 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
5212 "No traffic\n",
5213 ch_info->channel,
5214 ch_info->flags,
5215 is_channel_a_band(ch_info) ?
5216 "5.2" : "2.4");
5217 ch_info++;
5218 continue;
5219 }
5220
5221 /* Initialize regulatory-based run-time data */
5222 ch_info->max_power_avg = ch_info->curr_txpow =
5223 eeprom_ch_info[ch].max_power_avg;
5224 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
5225 ch_info->min_power = 0;
5226
8211ef78 5227 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
b481de9c
ZY		 5228 " %ddBm): Ad-Hoc %ssupported\n",
5229 ch_info->channel,
5230 is_channel_a_band(ch_info) ?
5231 "5.2" : "2.4",
8211ef78 5232 CHECK_AND_PRINT(VALID),
b481de9c
ZY		 5233 CHECK_AND_PRINT(IBSS),
5234 CHECK_AND_PRINT(ACTIVE),
5235 CHECK_AND_PRINT(RADAR),
5236 CHECK_AND_PRINT(WIDE),
5237 CHECK_AND_PRINT(NARROW),
5238 CHECK_AND_PRINT(DFS),
5239 eeprom_ch_info[ch].flags,
5240 eeprom_ch_info[ch].max_power_avg,
5241 ((eeprom_ch_info[ch].
5242 flags & EEPROM_CHANNEL_IBSS)
5243 && !(eeprom_ch_info[ch].
5244 flags & EEPROM_CHANNEL_RADAR))
5245 ? "" : "not ");
5246
5247 /* Set the user_txpower_limit to the highest power
5248 * supported by any channel */
5249 if (eeprom_ch_info[ch].max_power_avg >
5250 priv->user_txpower_limit)
5251 priv->user_txpower_limit =
5252 eeprom_ch_info[ch].max_power_avg;
5253
5254 ch_info++;
5255 }
5256 }
5257
6440adb5 5258 /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
b481de9c 5259 for (band = 6; band <= 7; band++) {
8318d78a 5260 enum ieee80211_band ieeeband;
b481de9c
ZY		 5261 u8 fat_extension_chan;
5262
bb8c093b 5263 iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
b481de9c
ZY		 5264 &eeprom_ch_info, &eeprom_ch_index);
5265
6440adb5 5266 /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
8318d78a 5267 ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
6440adb5 5268
b481de9c
ZY		 5269 /* Loop through each band adding each of the channels */
5270 for (ch = 0; ch < eeprom_ch_count; ch++) {
5271
5272 if ((band == 6) &&
5273 ((eeprom_ch_index[ch] == 5) ||
5274 (eeprom_ch_index[ch] == 6) ||
5275 (eeprom_ch_index[ch] == 7)))
5276 fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
5277 else
5278 fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
5279
6440adb5 5280 /* Set up driver's info for lower half */
8318d78a 5281 iwl4965_set_fat_chan_info(priv, ieeeband,
b481de9c
ZY		 5282 eeprom_ch_index[ch],
5283 &(eeprom_ch_info[ch]),
5284 fat_extension_chan);
5285
6440adb5 5286 /* Set up driver's info for upper half */
8318d78a 5287 iwl4965_set_fat_chan_info(priv, ieeeband,
b481de9c
ZY		 5288 (eeprom_ch_index[ch] + 4),
5289 &(eeprom_ch_info[ch]),
5290 HT_IE_EXT_CHANNEL_BELOW);
5291 }
5292 }
5293
5294 return 0;
5295}
5296
849e0dce
RC		 5297/*
5298 * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
5299 */
c79dd5b5 5300static void iwl4965_free_channel_map(struct iwl_priv *priv)
849e0dce
RC		 5301{
5302 kfree(priv->channel_info);
5303 priv->channel_count = 0;
5304}
5305
b481de9c
ZY		 5306/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
5307 * sending probe req. This should be set long enough to hear probe responses
5308 * from more than one AP. */
5309#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
5310#define IWL_ACTIVE_DWELL_TIME_52 (10)
5311
5312/* For faster active scanning, scan will move to the next channel if fewer than
5313 * PLCP_QUIET_THRESH packets are heard on this channel within
5314 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
5315 * time if it's a quiet channel (nothing responded to our probe, and there's
5316 * no other traffic).
5317 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
5318#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
5319#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
5320
5321/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
5322 * Must be set longer than active dwell time.
5323 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
5324#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
5325#define IWL_PASSIVE_DWELL_TIME_52 (10)
5326#define IWL_PASSIVE_DWELL_BASE (100)
5327#define IWL_CHANNEL_TUNE_TIME 5
5328
c79dd5b5 5329static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 5330 enum ieee80211_band band)
b481de9c 5331{
8318d78a 5332 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 5333 return IWL_ACTIVE_DWELL_TIME_52;
5334 else
5335 return IWL_ACTIVE_DWELL_TIME_24;
5336}
5337
c79dd5b5 5338static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 5339 enum ieee80211_band band)
b481de9c 5340{
8318d78a
JB		 5341 u16 active = iwl4965_get_active_dwell_time(priv, band);
5342 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY		 5343 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
5344 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
5345
bb8c093b 5346 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5347 /* If we're associated, we clamp the maximum passive
5348 * dwell time to be 98% of the beacon interval (minus
5349 * 2 * channel tune time) */
5350 passive = priv->beacon_int;
5351 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
5352 passive = IWL_PASSIVE_DWELL_BASE;
5353 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
5354 }
5355
5356 if (passive <= active)
5357 passive = active + 1;
5358
5359 return passive;
5360}
5361
c79dd5b5 5362static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 5363 enum ieee80211_band band,
b481de9c 5364 u8 is_active, u8 direct_mask,
bb8c093b 5365 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 5366{
5367 const struct ieee80211_channel *channels = NULL;
8318d78a 5368 const struct ieee80211_supported_band *sband;
bb8c093b 5369 const struct iwl4965_channel_info *ch_info;
b481de9c
ZY		 5370 u16 passive_dwell = 0;
5371 u16 active_dwell = 0;
5372 int added, i;
5373
8318d78a
JB		 5374 sband = iwl4965_get_hw_mode(priv, band);
5375 if (!sband)
b481de9c
ZY		 5376 return 0;
5377
8318d78a 5378 channels = sband->channels;
b481de9c 5379
8318d78a
JB		 5380 active_dwell = iwl4965_get_active_dwell_time(priv, band);
5381 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 5382
8318d78a
JB		 5383 for (i = 0, added = 0; i < sband->n_channels; i++) {
5384 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
b481de9c 5385 le16_to_cpu(priv->active_rxon.channel)) {
bb8c093b 5386 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 5387 IWL_DEBUG_SCAN
5388 ("Skipping current channel %d\n",
5389 le16_to_cpu(priv->active_rxon.channel));
5390 continue;
5391 }
5392 } else if (priv->only_active_channel)
5393 continue;
5394
8318d78a 5395 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 5396
8318d78a 5397 ch_info = iwl4965_get_channel_info(priv, band,
9fbab516 5398 scan_ch->channel);
b481de9c
ZY		 5399 if (!is_channel_valid(ch_info)) {
5400 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
5401 scan_ch->channel);
5402 continue;
5403 }
5404
5405 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 5406 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY		 5407 scan_ch->type = 0; /* passive */
5408 else
5409 scan_ch->type = 1; /* active */
5410
5411 if (scan_ch->type & 1)
5412 scan_ch->type |= (direct_mask << 1);
5413
5414 if (is_channel_narrow(ch_info))
5415 scan_ch->type |= (1 << 7);
5416
5417 scan_ch->active_dwell = cpu_to_le16(active_dwell);
5418 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
5419
9fbab516 5420 /* Set txpower levels to defaults */
b481de9c
ZY		 5421 scan_ch->tpc.dsp_atten = 110;
5422 /* scan_pwr_info->tpc.dsp_atten; */
5423
5424 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 5425 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 5426 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
5427 else {
5428 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
5429 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 5430 * power level:
8a1b0245 5431 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY		 5432 */
5433 }
5434
5435 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
5436 scan_ch->channel,
5437 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
5438 (scan_ch->type & 1) ?
5439 active_dwell : passive_dwell);
5440
5441 scan_ch++;
5442 added++;
5443 }
5444
5445 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5446 return added;
5447}
5448
c79dd5b5 5449static void iwl4965_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY		 5450 struct ieee80211_rate *rates)
5451{
5452 int i;
5453
5454 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB		 5455 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
5456 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5457 rates[i].hw_value_short = i;
5458 rates[i].flags = 0;
5459 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 5460 /*
8318d78a 5461 * If CCK != 1M then set short preamble rate flag.
b481de9c 5462 */
35cdeaf4
TW		 5463 rates[i].flags |=
5464 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
5465 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 5466 }
b481de9c 5467 }
b481de9c
ZY		 5468}
5469
5470/**
bb8c093b 5471 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 5472 */
c79dd5b5 5473static int iwl4965_init_geos(struct iwl_priv *priv)
b481de9c 5474{
bb8c093b 5475 struct iwl4965_channel_info *ch;
8211ef78 5476 struct ieee80211_supported_band *sband;
b481de9c
ZY		 5477 struct ieee80211_channel *channels;
5478 struct ieee80211_channel *geo_ch;
5479 struct ieee80211_rate *rates;
5480 int i = 0;
b481de9c 5481
8318d78a
JB		 5482 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5483 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY		 5484 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5485 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5486 return 0;
5487 }
5488
b481de9c
ZY		 5489 channels = kzalloc(sizeof(struct ieee80211_channel) *
5490 priv->channel_count, GFP_KERNEL);
8318d78a 5491 if (!channels)
b481de9c 5492 return -ENOMEM;
b481de9c 5493
8211ef78 5494 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
b481de9c
ZY		 5495 GFP_KERNEL);
5496 if (!rates) {
b481de9c
ZY		 5497 kfree(channels);
5498 return -ENOMEM;
5499 }
5500
b481de9c 5501 /* 5.2GHz channels start after the 2.4GHz channels */
8211ef78
TW		 5502 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5503 sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
5504 /* just OFDM */
5505 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5506 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
8318d78a 5507
8211ef78 5508 iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
78330fdd 5509
8211ef78
TW		 5510 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5511 sband->channels = channels;
5512 /* OFDM & CCK */
5513 sband->bitrates = rates;
5514 sband->n_bitrates = IWL_RATE_COUNT;
b481de9c 5515
8211ef78 5516 iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
78330fdd 5517
b481de9c
ZY		 5518 priv->ieee_channels = channels;
5519 priv->ieee_rates = rates;
5520
bb8c093b 5521 iwl4965_init_hw_rates(priv, rates);
b481de9c 5522
8211ef78 5523 for (i = 0; i < priv->channel_count; i++) {
b481de9c
ZY		 5524 ch = &priv->channel_info[i];
5525
8211ef78
TW		 5526 /* FIXME: might be removed if scan is OK */
5527 if (!is_channel_valid(ch))
b481de9c 5528 continue;
b481de9c 5529
8211ef78
TW		 5530 if (is_channel_a_band(ch))
5531 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5532 else
5533 sband = &priv->bands[IEEE80211_BAND_2GHZ];
b481de9c 5534
8211ef78
TW		 5535 geo_ch = &sband->channels[sband->n_channels++];
5536
5537 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
8318d78a
JB		 5538 geo_ch->max_power = ch->max_power_avg;
5539 geo_ch->max_antenna_gain = 0xff;
7b72304d 5540 geo_ch->hw_value = ch->channel;
b481de9c
ZY		 5541
5542 if (is_channel_valid(ch)) {
8318d78a
JB		 5543 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5544 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 5545
8318d78a
JB		 5546 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5547 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY		 5548
5549 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 5550 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY		 5551
5552 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5553 priv->max_channel_txpower_limit =
5554 ch->max_power_avg;
8211ef78 5555 } else {
8318d78a 5556 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
8211ef78
TW		 5557 }
5558
5559 /* Save flags for reg domain usage */
5560 geo_ch->orig_flags = geo_ch->flags;
5561
5562 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5563 ch->channel, geo_ch->center_freq,
5564 is_channel_a_band(ch) ? "5.2" : "2.4",
5565 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5566 "restricted" : "valid",
5567 geo_ch->flags);
b481de9c
ZY		 5568 }
5569
82b9a121
TW		 5570 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5571 priv->cfg->sku & IWL_SKU_A) {
b481de9c
ZY		 5572 printk(KERN_INFO DRV_NAME
5573 ": Incorrectly detected BG card as ABG. Please send "
5574 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5575 priv->pci_dev->device, priv->pci_dev->subsystem_device);
82b9a121 5576 priv->cfg->sku &= ~IWL_SKU_A;
b481de9c
ZY		 5577 }
5578
5579 printk(KERN_INFO DRV_NAME
5580 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB		 5581 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5582 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 5583
8318d78a
JB		 5584 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
5585 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 5586
b481de9c
ZY		 5587 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5588
5589 return 0;
5590}
5591
849e0dce
RC		 5592/*
5593 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5594 */
c79dd5b5 5595static void iwl4965_free_geos(struct iwl_priv *priv)
849e0dce 5596{
849e0dce
RC		 5597 kfree(priv->ieee_channels);
5598 kfree(priv->ieee_rates);
5599 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5600}
5601
b481de9c
ZY		 5602/******************************************************************************
5603 *
5604 * uCode download functions
5605 *
5606 ******************************************************************************/
5607
c79dd5b5 5608static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 5609{
98c92211
TW		 5610 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5611 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5612 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5613 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5614 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5615 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 5616}
5617
5618/**
bb8c093b 5619 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5620 * looking at all data.
5621 */
c79dd5b5 5622static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
9fbab516 5623 u32 len)
b481de9c
ZY		 5624{
5625 u32 val;
5626 u32 save_len = len;
5627 int rc = 0;
5628 u32 errcnt;
5629
5630 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5631
bb8c093b 5632 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5633 if (rc)
5634 return rc;
5635
bb8c093b 5636 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY		 5637
5638 errcnt = 0;
5639 for (; len > 0; len -= sizeof(u32), image++) {
5640 /* read data comes through single port, auto-incr addr */
5641 /* NOTE: Use the debugless read so we don't flood kernel log
5642 * if IWL_DL_IO is set */
bb8c093b 5643 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5644 if (val != le32_to_cpu(*image)) {
5645 IWL_ERROR("uCode INST section is invalid at "
5646 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5647 save_len - len, val, le32_to_cpu(*image));
5648 rc = -EIO;
5649 errcnt++;
5650 if (errcnt >= 20)
5651 break;
5652 }
5653 }
5654
bb8c093b 5655 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5656
5657 if (!errcnt)
5658 IWL_DEBUG_INFO
5659 ("ucode image in INSTRUCTION memory is good\n");
5660
5661 return rc;
5662}
5663
5664
5665/**
bb8c093b 5666 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5667 * using sample data 100 bytes apart. If these sample points are good,
5668 * it's a pretty good bet that everything between them is good, too.
5669 */
c79dd5b5 5670static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY		 5671{
5672 u32 val;
5673 int rc = 0;
5674 u32 errcnt = 0;
5675 u32 i;
5676
5677 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5678
bb8c093b 5679 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5680 if (rc)
5681 return rc;
5682
5683 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5684 /* read data comes through single port, auto-incr addr */
5685 /* NOTE: Use the debugless read so we don't flood kernel log
5686 * if IWL_DL_IO is set */
bb8c093b 5687 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 5688 i + RTC_INST_LOWER_BOUND);
bb8c093b 5689 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5690 if (val != le32_to_cpu(*image)) {
5691#if 0 /* Enable this if you want to see details */
5692 IWL_ERROR("uCode INST section is invalid at "
5693 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5694 i, val, *image);
5695#endif
5696 rc = -EIO;
5697 errcnt++;
5698 if (errcnt >= 3)
5699 break;
5700 }
5701 }
5702
bb8c093b 5703 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5704
5705 return rc;
5706}
5707
5708
5709/**
bb8c093b 5710 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY		 5711 * and verify its contents
5712 */
c79dd5b5 5713static int iwl4965_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY		 5714{
5715 __le32 *image;
5716 u32 len;
5717 int rc = 0;
5718
5719 /* Try bootstrap */
5720 image = (__le32 *)priv->ucode_boot.v_addr;
5721 len = priv->ucode_boot.len;
bb8c093b 5722 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5723 if (rc == 0) {
5724 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5725 return 0;
5726 }
5727
5728 /* Try initialize */
5729 image = (__le32 *)priv->ucode_init.v_addr;
5730 len = priv->ucode_init.len;
bb8c093b 5731 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5732 if (rc == 0) {
5733 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5734 return 0;
5735 }
5736
5737 /* Try runtime/protocol */
5738 image = (__le32 *)priv->ucode_code.v_addr;
5739 len = priv->ucode_code.len;
bb8c093b 5740 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5741 if (rc == 0) {
5742 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5743 return 0;
5744 }
5745
5746 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5747
9fbab516
BC		 5748 /* Since nothing seems to match, show first several data entries in
5749 * instruction SRAM, so maybe visual inspection will give a clue.
5750 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY		 5751 image = (__le32 *)priv->ucode_boot.v_addr;
5752 len = priv->ucode_boot.len;
bb8c093b 5753 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY		 5754
5755 return rc;
5756}
5757
5758
5759/* check contents of special bootstrap uCode SRAM */
c79dd5b5 5760static int iwl4965_verify_bsm(struct iwl_priv *priv)
b481de9c
ZY		 5761{
5762 __le32 *image = priv->ucode_boot.v_addr;
5763 u32 len = priv->ucode_boot.len;
5764 u32 reg;
5765 u32 val;
5766
5767 IWL_DEBUG_INFO("Begin verify bsm\n");
5768
5769 /* verify BSM SRAM contents */
bb8c093b 5770 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
b481de9c
ZY		 5771 for (reg = BSM_SRAM_LOWER_BOUND;
5772 reg < BSM_SRAM_LOWER_BOUND + len;
5773 reg += sizeof(u32), image ++) {
bb8c093b 5774 val = iwl4965_read_prph(priv, reg);
b481de9c
ZY		 5775 if (val != le32_to_cpu(*image)) {
5776 IWL_ERROR("BSM uCode verification failed at "
5777 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5778 BSM_SRAM_LOWER_BOUND,
5779 reg - BSM_SRAM_LOWER_BOUND, len,
5780 val, le32_to_cpu(*image));
5781 return -EIO;
5782 }
5783 }
5784
5785 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5786
5787 return 0;
5788}
5789
5790/**
bb8c093b 5791 * iwl4965_load_bsm - Load bootstrap instructions
b481de9c
ZY		 5792 *
5793 * BSM operation:
5794 *
5795 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5796 * in special SRAM that does not power down during RFKILL. When powering back
5797 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5798 * the bootstrap program into the on-board processor, and starts it.
5799 *
5800 * The bootstrap program loads (via DMA) instructions and data for a new
5801 * program from host DRAM locations indicated by the host driver in the
5802 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5803 * automatically.
5804 *
5805 * When initializing the NIC, the host driver points the BSM to the
5806 * "initialize" uCode image. This uCode sets up some internal data, then
5807 * notifies host via "initialize alive" that it is complete.
5808 *
5809 * The host then replaces the BSM_DRAM_* pointer values to point to the
5810 * normal runtime uCode instructions and a backup uCode data cache buffer
5811 * (filled initially with starting data values for the on-board processor),
5812 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5813 * which begins normal operation.
5814 *
5815 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5816 * the backup data cache in DRAM before SRAM is powered down.
5817 *
5818 * When powering back up, the BSM loads the bootstrap program. This reloads
5819 * the runtime uCode instructions and the backup data cache into SRAM,
5820 * and re-launches the runtime uCode from where it left off.
5821 */
c79dd5b5 5822static int iwl4965_load_bsm(struct iwl_priv *priv)
b481de9c
ZY		 5823{
5824 __le32 *image = priv->ucode_boot.v_addr;
5825 u32 len = priv->ucode_boot.len;
5826 dma_addr_t pinst;
5827 dma_addr_t pdata;
5828 u32 inst_len;
5829 u32 data_len;
5830 int rc;
5831 int i;
5832 u32 done;
5833 u32 reg_offset;
5834
5835 IWL_DEBUG_INFO("Begin load bsm\n");
5836
5837 /* make sure bootstrap program is no larger than BSM's SRAM size */
5838 if (len > IWL_MAX_BSM_SIZE)
5839 return -EINVAL;
5840
5841 /* Tell bootstrap uCode where to find the "Initialize" uCode
9fbab516 5842 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
bb8c093b 5843 * NOTE: iwl4965_initialize_alive_start() will replace these values,
b481de9c
ZY		 5844 * after the "initialize" uCode has run, to point to
5845 * runtime/protocol instructions and backup data cache. */
5846 pinst = priv->ucode_init.p_addr >> 4;
5847 pdata = priv->ucode_init_data.p_addr >> 4;
5848 inst_len = priv->ucode_init.len;
5849 data_len = priv->ucode_init_data.len;
5850
bb8c093b 5851 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5852 if (rc)
5853 return rc;
5854
bb8c093b
CH		 5855 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5856 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5857 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5858 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
b481de9c
ZY		 5859
5860 /* Fill BSM memory with bootstrap instructions */
5861 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5862 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5863 reg_offset += sizeof(u32), image++)
bb8c093b 5864 _iwl4965_write_prph(priv, reg_offset,
b481de9c
ZY		 5865 le32_to_cpu(*image));
5866
bb8c093b 5867 rc = iwl4965_verify_bsm(priv);
b481de9c 5868 if (rc) {
bb8c093b 5869 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5870 return rc;
5871 }
5872
5873 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
bb8c093b
CH		 5874 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5875 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
b481de9c 5876 RTC_INST_LOWER_BOUND);
bb8c093b 5877 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
b481de9c
ZY		 5878
5879 /* Load bootstrap code into instruction SRAM now,
5880 * to prepare to load "initialize" uCode */
bb8c093b 5881 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 5882 BSM_WR_CTRL_REG_BIT_START);
5883
5884 /* Wait for load of bootstrap uCode to finish */
5885 for (i = 0; i < 100; i++) {
bb8c093b 5886 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
b481de9c
ZY		 5887 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5888 break;
5889 udelay(10);
5890 }
5891 if (i < 100)
5892 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5893 else {
5894 IWL_ERROR("BSM write did not complete!\n");
5895 return -EIO;
5896 }
5897
5898 /* Enable future boot loads whenever power management unit triggers it
5899 * (e.g. when powering back up after power-save shutdown) */
bb8c093b 5900 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 5901 BSM_WR_CTRL_REG_BIT_START_EN);
5902
bb8c093b 5903 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5904
5905 return 0;
5906}
5907
c79dd5b5 5908static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY		 5909{
5910 /* Remove all resets to allow NIC to operate */
bb8c093b 5911 iwl4965_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 5912}
5913
90e759d1 5914
b481de9c 5915/**
bb8c093b 5916 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 5917 *
5918 * Copy into buffers for card to fetch via bus-mastering
5919 */
c79dd5b5 5920static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 5921{
bb8c093b 5922 struct iwl4965_ucode *ucode;
90e759d1 5923 int ret;
b481de9c 5924 const struct firmware *ucode_raw;
4bf775cd 5925 const char *name = priv->cfg->fw_name;
b481de9c
ZY		 5926 u8 *src;
5927 size_t len;
5928 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5929
5930 /* Ask kernel firmware_class module to get the boot firmware off disk.
5931 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 5932 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5933 if (ret < 0) {
5934 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5935 name, ret);
b481de9c
ZY		 5936 goto error;
5937 }
5938
5939 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5940 name, ucode_raw->size);
5941
5942 /* Make sure that we got at least our header! */
5943 if (ucode_raw->size < sizeof(*ucode)) {
5944 IWL_ERROR("File size way too small!\n");
90e759d1 5945 ret = -EINVAL;
b481de9c
ZY		 5946 goto err_release;
5947 }
5948
5949 /* Data from ucode file: header followed by uCode images */
5950 ucode = (void *)ucode_raw->data;
5951
5952 ver = le32_to_cpu(ucode->ver);
5953 inst_size = le32_to_cpu(ucode->inst_size);
5954 data_size = le32_to_cpu(ucode->data_size);
5955 init_size = le32_to_cpu(ucode->init_size);
5956 init_data_size = le32_to_cpu(ucode->init_data_size);
5957 boot_size = le32_to_cpu(ucode->boot_size);
5958
5959 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5960 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
5961 inst_size);
5962 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
5963 data_size);
5964 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
5965 init_size);
5966 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
5967 init_data_size);
5968 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
5969 boot_size);
5970
5971 /* Verify size of file vs. image size info in file's header */
5972 if (ucode_raw->size < sizeof(*ucode) +
5973 inst_size + data_size + init_size +
5974 init_data_size + boot_size) {
5975
5976 IWL_DEBUG_INFO("uCode file size %d too small\n",
5977 (int)ucode_raw->size);
90e759d1 5978 ret = -EINVAL;
b481de9c
ZY		 5979 goto err_release;
5980 }
5981
5982 /* Verify that uCode images will fit in card's SRAM */
5983 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW		 5984 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5985 inst_size);
5986 ret = -EINVAL;
b481de9c
ZY		 5987 goto err_release;
5988 }
5989
5990 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW		 5991 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5992 data_size);
5993 ret = -EINVAL;
b481de9c
ZY		 5994 goto err_release;
5995 }
5996 if (init_size > IWL_MAX_INST_SIZE) {
5997 IWL_DEBUG_INFO
90e759d1
TW		 5998 ("uCode init instr len %d too large to fit in\n",
5999 init_size);
6000 ret = -EINVAL;
b481de9c
ZY		 6001 goto err_release;
6002 }
6003 if (init_data_size > IWL_MAX_DATA_SIZE) {
6004 IWL_DEBUG_INFO
90e759d1
TW		 6005 ("uCode init data len %d too large to fit in\n",
6006 init_data_size);
6007 ret = -EINVAL;
b481de9c
ZY		 6008 goto err_release;
6009 }
6010 if (boot_size > IWL_MAX_BSM_SIZE) {
6011 IWL_DEBUG_INFO
90e759d1
TW		 6012 ("uCode boot instr len %d too large to fit in\n",
6013 boot_size);
6014 ret = -EINVAL;
b481de9c
ZY		 6015 goto err_release;
6016 }
6017
6018 /* Allocate ucode buffers for card's bus-master loading ... */
6019
6020 /* Runtime instructions and 2 copies of data:
6021 * 1) unmodified from disk
6022 * 2) backup cache for save/restore during power-downs */
6023 priv->ucode_code.len = inst_size;
98c92211 6024 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 6025
6026 priv->ucode_data.len = data_size;
98c92211 6027 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 6028
6029 priv->ucode_data_backup.len = data_size;
98c92211 6030 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 6031
6032 /* Initialization instructions and data */
90e759d1
TW		 6033 if (init_size && init_data_size) {
6034 priv->ucode_init.len = init_size;
98c92211 6035 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 6036
6037 priv->ucode_init_data.len = init_data_size;
98c92211 6038 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 6039
6040 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
6041 goto err_pci_alloc;
6042 }
b481de9c
ZY		 6043
6044 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 6045 if (boot_size) {
6046 priv->ucode_boot.len = boot_size;
98c92211 6047 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 6048
90e759d1
TW		 6049 if (!priv->ucode_boot.v_addr)
6050 goto err_pci_alloc;
6051 }
b481de9c
ZY		 6052
6053 /* Copy images into buffers for card's bus-master reads ... */
6054
6055 /* Runtime instructions (first block of data in file) */
6056 src = &ucode->data[0];
6057 len = priv->ucode_code.len;
90e759d1 6058 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 6059 memcpy(priv->ucode_code.v_addr, src, len);
6060 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
6061 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
6062
6063 /* Runtime data (2nd block)
bb8c093b 6064 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 6065 src = &ucode->data[inst_size];
6066 len = priv->ucode_data.len;
90e759d1 6067 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 6068 memcpy(priv->ucode_data.v_addr, src, len);
6069 memcpy(priv->ucode_data_backup.v_addr, src, len);
6070
6071 /* Initialization instructions (3rd block) */
6072 if (init_size) {
6073 src = &ucode->data[inst_size + data_size];
6074 len = priv->ucode_init.len;
90e759d1
TW		 6075 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
6076 len);
b481de9c
ZY		 6077 memcpy(priv->ucode_init.v_addr, src, len);
6078 }
6079
6080 /* Initialization data (4th block) */
6081 if (init_data_size) {
6082 src = &ucode->data[inst_size + data_size + init_size];
6083 len = priv->ucode_init_data.len;
90e759d1
TW		 6084 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
6085 len);
b481de9c
ZY		 6086 memcpy(priv->ucode_init_data.v_addr, src, len);
6087 }
6088
6089 /* Bootstrap instructions (5th block) */
6090 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
6091 len = priv->ucode_boot.len;
90e759d1 6092 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 6093 memcpy(priv->ucode_boot.v_addr, src, len);
6094
6095 /* We have our copies now, allow OS release its copies */
6096 release_firmware(ucode_raw);
6097 return 0;
6098
6099 err_pci_alloc:
6100 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 6101 ret = -ENOMEM;
bb8c093b 6102 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 6103
6104 err_release:
6105 release_firmware(ucode_raw);
6106
6107 error:
90e759d1 6108 return ret;
b481de9c
ZY		 6109}
6110
6111
6112/**
bb8c093b 6113 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 6114 *
6115 * Tell initialization uCode where to find runtime uCode.
6116 *
6117 * BSM registers initially contain pointers to initialization uCode.
6118 * We need to replace them to load runtime uCode inst and data,
6119 * and to save runtime data when powering down.
6120 */
c79dd5b5 6121static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY		 6122{
6123 dma_addr_t pinst;
6124 dma_addr_t pdata;
6125 int rc = 0;
6126 unsigned long flags;
6127
6128 /* bits 35:4 for 4965 */
6129 pinst = priv->ucode_code.p_addr >> 4;
6130 pdata = priv->ucode_data_backup.p_addr >> 4;
6131
6132 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 6133 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 6134 if (rc) {
6135 spin_unlock_irqrestore(&priv->lock, flags);
6136 return rc;
6137 }
6138
6139 /* Tell bootstrap uCode where to find image to load */
bb8c093b
CH		 6140 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
6141 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
6142 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 6143 priv->ucode_data.len);
6144
6145 /* Inst bytecount must be last to set up, bit 31 signals uCode
6146 * that all new ptr/size info is in place */
bb8c093b 6147 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 6148 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
6149
bb8c093b 6150 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6151
6152 spin_unlock_irqrestore(&priv->lock, flags);
6153
6154 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
6155
6156 return rc;
6157}
6158
6159/**
bb8c093b 6160 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 6161 *
6162 * Called after REPLY_ALIVE notification received from "initialize" uCode.
6163 *
6164 * The 4965 "initialize" ALIVE reply contains calibration data for:
6165 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
6166 * (3945 does not contain this data).
6167 *
6168 * Tell "initialize" uCode to go ahead and load the runtime uCode.
6169*/
c79dd5b5 6170static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 6171{
6172 /* Check alive response for "valid" sign from uCode */
6173 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
6174 /* We had an error bringing up the hardware, so take it
6175 * all the way back down so we can try again */
6176 IWL_DEBUG_INFO("Initialize Alive failed.\n");
6177 goto restart;
6178 }
6179
6180 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
6181 * This is a paranoid check, because we would not have gotten the
6182 * "initialize" alive if code weren't properly loaded. */
bb8c093b 6183 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6184 /* Runtime instruction load was bad;
6185 * take it all the way back down so we can try again */
6186 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
6187 goto restart;
6188 }
6189
6190 /* Calculate temperature */
6191 priv->temperature = iwl4965_get_temperature(priv);
6192
6193 /* Send pointers to protocol/runtime uCode image ... init code will
6194 * load and launch runtime uCode, which will send us another "Alive"
6195 * notification. */
6196 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 6197 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 6198 /* Runtime instruction load won't happen;
6199 * take it all the way back down so we can try again */
6200 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
6201 goto restart;
6202 }
6203 return;
6204
6205 restart:
6206 queue_work(priv->workqueue, &priv->restart);
6207}
6208
6209
6210/**
bb8c093b 6211 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 6212 * from protocol/runtime uCode (initialization uCode's
bb8c093b 6213 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 6214 */
c79dd5b5 6215static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 6216{
6217 int rc = 0;
6218
6219 IWL_DEBUG_INFO("Runtime Alive received.\n");
6220
6221 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
6222 /* We had an error bringing up the hardware, so take it
6223 * all the way back down so we can try again */
6224 IWL_DEBUG_INFO("Alive failed.\n");
6225 goto restart;
6226 }
6227
6228 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
6229 * This is a paranoid check, because we would not have gotten the
6230 * "runtime" alive if code weren't properly loaded. */
bb8c093b 6231 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 6232 /* Runtime instruction load was bad;
6233 * take it all the way back down so we can try again */
6234 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
6235 goto restart;
6236 }
6237
bb8c093b 6238 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6239
6240 rc = iwl4965_alive_notify(priv);
6241 if (rc) {
6242 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
6243 rc);
6244 goto restart;
6245 }
6246
9fbab516 6247 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 6248 set_bit(STATUS_ALIVE, &priv->status);
6249
6250 /* Clear out the uCode error bit if it is set */
6251 clear_bit(STATUS_FW_ERROR, &priv->status);
6252
bb8c093b 6253 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 6254 return;
6255
5a66926a 6256 ieee80211_start_queues(priv->hw);
b481de9c
ZY		 6257
6258 priv->active_rate = priv->rates_mask;
6259 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
6260
bb8c093b 6261 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 6262
bb8c093b
CH		 6263 if (iwl4965_is_associated(priv)) {
6264 struct iwl4965_rxon_cmd *active_rxon =
6265 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 6266
6267 memcpy(&priv->staging_rxon, &priv->active_rxon,
6268 sizeof(priv->staging_rxon));
6269 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6270 } else {
6271 /* Initialize our rx_config data */
bb8c093b 6272 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 6273 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
6274 }
6275
9fbab516 6276 /* Configure Bluetooth device coexistence support */
bb8c093b 6277 iwl4965_send_bt_config(priv);
b481de9c
ZY		 6278
6279 /* Configure the adapter for unassociated operation */
bb8c093b 6280 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6281
6282 /* At this point, the NIC is initialized and operational */
6283 priv->notif_missed_beacons = 0;
6284 set_bit(STATUS_READY, &priv->status);
6285
6286 iwl4965_rf_kill_ct_config(priv);
5a66926a 6287
b481de9c 6288 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5a66926a 6289 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 6290
6291 if (priv->error_recovering)
bb8c093b 6292 iwl4965_error_recovery(priv);
b481de9c
ZY		 6293
6294 return;
6295
6296 restart:
6297 queue_work(priv->workqueue, &priv->restart);
6298}
6299
c79dd5b5 6300static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 6301
c79dd5b5 6302static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 6303{
6304 unsigned long flags;
6305 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
6306 struct ieee80211_conf *conf = NULL;
6307
6308 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
6309
6310 conf = ieee80211_get_hw_conf(priv->hw);
6311
6312 if (!exit_pending)
6313 set_bit(STATUS_EXIT_PENDING, &priv->status);
6314
bb8c093b 6315 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6316
6317 /* Unblock any waiting calls */
6318 wake_up_interruptible_all(&priv->wait_command_queue);
6319
b481de9c
ZY		 6320 /* Wipe out the EXIT_PENDING status bit if we are not actually
6321 * exiting the module */
6322 if (!exit_pending)
6323 clear_bit(STATUS_EXIT_PENDING, &priv->status);
6324
6325 /* stop and reset the on-board processor */
bb8c093b 6326 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 6327
6328 /* tell the device to stop sending interrupts */
bb8c093b 6329 iwl4965_disable_interrupts(priv);
b481de9c
ZY		 6330
6331 if (priv->mac80211_registered)
6332 ieee80211_stop_queues(priv->hw);
6333
bb8c093b 6334 /* If we have not previously called iwl4965_init() then
b481de9c 6335 * clear all bits but the RF Kill and SUSPEND bits and return */
bb8c093b 6336 if (!iwl4965_is_init(priv)) {
b481de9c
ZY		 6337 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6338 STATUS_RF_KILL_HW |
6339 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6340 STATUS_RF_KILL_SW |
9788864e
RC		 6341 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6342 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 6343 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6344 STATUS_IN_SUSPEND;
6345 goto exit;
6346 }
6347
6348 /* ...otherwise clear out all the status bits but the RF Kill and
6349 * SUSPEND bits and continue taking the NIC down. */
6350 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
6351 STATUS_RF_KILL_HW |
6352 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
6353 STATUS_RF_KILL_SW |
9788864e
RC		 6354 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
6355 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 6356 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
6357 STATUS_IN_SUSPEND |
6358 test_bit(STATUS_FW_ERROR, &priv->status) <<
6359 STATUS_FW_ERROR;
6360
6361 spin_lock_irqsave(&priv->lock, flags);
9fbab516
BC		 6362 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
6363 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 6364 spin_unlock_irqrestore(&priv->lock, flags);
6365
bb8c093b
CH		 6366 iwl4965_hw_txq_ctx_stop(priv);
6367 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 6368
6369 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 6370 if (!iwl4965_grab_nic_access(priv)) {
6371 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 6372 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 6373 iwl4965_release_nic_access(priv);
b481de9c
ZY		 6374 }
6375 spin_unlock_irqrestore(&priv->lock, flags);
6376
6377 udelay(5);
6378
bb8c093b
CH		 6379 iwl4965_hw_nic_stop_master(priv);
6380 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
6381 iwl4965_hw_nic_reset(priv);
b481de9c
ZY		 6382
6383 exit:
bb8c093b 6384 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 6385
6386 if (priv->ibss_beacon)
6387 dev_kfree_skb(priv->ibss_beacon);
6388 priv->ibss_beacon = NULL;
6389
6390 /* clear out any free frames */
bb8c093b 6391 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 6392}
6393
c79dd5b5 6394static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 6395{
6396 mutex_lock(&priv->mutex);
bb8c093b 6397 __iwl4965_down(priv);
b481de9c 6398 mutex_unlock(&priv->mutex);
b24d22b1 6399
bb8c093b 6400 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 6401}
6402
6403#define MAX_HW_RESTARTS 5
6404
c79dd5b5 6405static int __iwl4965_up(struct iwl_priv *priv)
b481de9c
ZY		 6406{
6407 int rc, i;
b481de9c
ZY		 6408
6409 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6410 IWL_WARNING("Exit pending; will not bring the NIC up\n");
6411 return -EIO;
6412 }
6413
6414 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
6415 IWL_WARNING("Radio disabled by SW RF kill (module "
6416 "parameter)\n");
e655b9f0
ZY		 6417 return -ENODEV;
6418 }
6419
e903fbd4
RC		 6420 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
6421 IWL_ERROR("ucode not available for device bringup\n");
6422 return -EIO;
6423 }
6424
e655b9f0
ZY		 6425 /* If platform's RF_KILL switch is NOT set to KILL */
6426 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
6427 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6428 clear_bit(STATUS_RF_KILL_HW, &priv->status);
6429 else {
6430 set_bit(STATUS_RF_KILL_HW, &priv->status);
6431 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
6432 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
6433 return -ENODEV;
6434 }
b481de9c
ZY		 6435 }
6436
bb8c093b 6437 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 6438
bb8c093b 6439 rc = iwl4965_hw_nic_init(priv);
b481de9c
ZY		 6440 if (rc) {
6441 IWL_ERROR("Unable to int nic\n");
6442 return rc;
6443 }
6444
6445 /* make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6446 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6447 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 6448 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6449
6450 /* clear (again), then enable host interrupts */
bb8c093b
CH		 6451 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
6452 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 6453
6454 /* really make sure rfkill handshake bits are cleared */
bb8c093b
CH		 6455 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6456 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 6457
6458 /* Copy original ucode data image from disk into backup cache.
6459 * This will be used to initialize the on-board processor's
6460 * data SRAM for a clean start when the runtime program first loads. */
6461 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 6462 priv->ucode_data.len);
b481de9c 6463
e655b9f0
ZY		 6464 /* We return success when we resume from suspend and rf_kill is on. */
6465 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 6466 return 0;
b481de9c
ZY		 6467
6468 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6469
bb8c093b 6470 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 6471
6472 /* load bootstrap state machine,
6473 * load bootstrap program into processor's memory,
6474 * prepare to load the "initialize" uCode */
bb8c093b 6475 rc = iwl4965_load_bsm(priv);
b481de9c
ZY		 6476
6477 if (rc) {
6478 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6479 continue;
6480 }
6481
6482 /* start card; "initialize" will load runtime ucode */
bb8c093b 6483 iwl4965_nic_start(priv);
b481de9c 6484
b481de9c
ZY		 6485 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6486
6487 return 0;
6488 }
6489
6490 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 6491 __iwl4965_down(priv);
b481de9c
ZY		 6492
6493 /* tried to restart and config the device for as long as our
6494 * patience could withstand */
6495 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6496 return -EIO;
6497}
6498
6499
6500/*****************************************************************************
6501 *
6502 * Workqueue callbacks
6503 *
6504 *****************************************************************************/
6505
bb8c093b 6506static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 6507{
c79dd5b5
TW		 6508 struct iwl_priv *priv =
6509 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 6510
6511 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6512 return;
6513
6514 mutex_lock(&priv->mutex);
bb8c093b 6515 iwl4965_init_alive_start(priv);
b481de9c
ZY		 6516 mutex_unlock(&priv->mutex);
6517}
6518
bb8c093b 6519static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 6520{
c79dd5b5
TW		 6521 struct iwl_priv *priv =
6522 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 6523
6524 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6525 return;
6526
6527 mutex_lock(&priv->mutex);
bb8c093b 6528 iwl4965_alive_start(priv);
b481de9c
ZY		 6529 mutex_unlock(&priv->mutex);
6530}
6531
bb8c093b 6532static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 6533{
c79dd5b5 6534 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 6535
6536 wake_up_interruptible(&priv->wait_command_queue);
6537
6538 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6539 return;
6540
6541 mutex_lock(&priv->mutex);
6542
bb8c093b 6543 if (!iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6544 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6545 "HW and/or SW RF Kill no longer active, restarting "
6546 "device\n");
6547 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6548 queue_work(priv->workqueue, &priv->restart);
6549 } else {
6550
6551 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6552 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6553 "disabled by SW switch\n");
6554 else
6555 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6556 "Kill switch must be turned off for "
6557 "wireless networking to work.\n");
6558 }
6559 mutex_unlock(&priv->mutex);
6560}
6561
6562#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6563
bb8c093b 6564static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 6565{
c79dd5b5
TW		 6566 struct iwl_priv *priv =
6567 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY		 6568
6569 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6570 return;
6571
6572 mutex_lock(&priv->mutex);
6573 if (test_bit(STATUS_SCANNING, &priv->status) ||
6574 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6575 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6576 "Scan completion watchdog resetting adapter (%dms)\n",
6577 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 6578
b481de9c 6579 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 6580 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6581 }
6582 mutex_unlock(&priv->mutex);
6583}
6584
bb8c093b 6585static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 6586{
c79dd5b5
TW		 6587 struct iwl_priv *priv =
6588 container_of(data, struct iwl_priv, request_scan);
bb8c093b 6589 struct iwl4965_host_cmd cmd = {
b481de9c 6590 .id = REPLY_SCAN_CMD,
bb8c093b 6591 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 6592 .meta.flags = CMD_SIZE_HUGE,
6593 };
6594 int rc = 0;
bb8c093b 6595 struct iwl4965_scan_cmd *scan;
b481de9c 6596 struct ieee80211_conf *conf = NULL;
78330fdd 6597 u16 cmd_len;
8318d78a 6598 enum ieee80211_band band;
78330fdd 6599 u8 direct_mask;
b481de9c
ZY		 6600
6601 conf = ieee80211_get_hw_conf(priv->hw);
6602
6603 mutex_lock(&priv->mutex);
6604
bb8c093b 6605 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 6606 IWL_WARNING("request scan called when driver not ready.\n");
6607 goto done;
6608 }
6609
6610 /* Make sure the scan wasn't cancelled before this queued work
6611 * was given the chance to run... */
6612 if (!test_bit(STATUS_SCANNING, &priv->status))
6613 goto done;
6614
6615 /* This should never be called or scheduled if there is currently
6616 * a scan active in the hardware. */
6617 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6618 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6619 "Ignoring second request.\n");
6620 rc = -EIO;
6621 goto done;
6622 }
6623
6624 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6625 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6626 goto done;
6627 }
6628
6629 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6630 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6631 goto done;
6632 }
6633
bb8c093b 6634 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6635 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6636 goto done;
6637 }
6638
6639 if (!test_bit(STATUS_READY, &priv->status)) {
6640 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6641 goto done;
6642 }
6643
6644 if (!priv->scan_bands) {
6645 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6646 goto done;
6647 }
6648
6649 if (!priv->scan) {
bb8c093b 6650 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 6651 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6652 if (!priv->scan) {
6653 rc = -ENOMEM;
6654 goto done;
6655 }
6656 }
6657 scan = priv->scan;
bb8c093b 6658 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 6659
6660 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6661 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6662
bb8c093b 6663 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 6664 u16 interval = 0;
6665 u32 extra;
6666 u32 suspend_time = 100;
6667 u32 scan_suspend_time = 100;
6668 unsigned long flags;
6669
6670 IWL_DEBUG_INFO("Scanning while associated...\n");
6671
6672 spin_lock_irqsave(&priv->lock, flags);
6673 interval = priv->beacon_int;
6674 spin_unlock_irqrestore(&priv->lock, flags);
6675
6676 scan->suspend_time = 0;
052c4b9f 6677 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 6678 if (!interval)
6679 interval = suspend_time;
6680
6681 extra = (suspend_time / interval) << 22;
6682 scan_suspend_time = (extra |
6683 ((suspend_time % interval) * 1024));
6684 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6685 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6686 scan_suspend_time, interval);
6687 }
6688
6689 /* We should add the ability for user to lock to PASSIVE ONLY */
6690 if (priv->one_direct_scan) {
6691 IWL_DEBUG_SCAN
6692 ("Kicking off one direct scan for '%s'\n",
bb8c093b 6693 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 6694 priv->direct_ssid_len));
6695 scan->direct_scan[0].id = WLAN_EID_SSID;
6696 scan->direct_scan[0].len = priv->direct_ssid_len;
6697 memcpy(scan->direct_scan[0].ssid,
6698 priv->direct_ssid, priv->direct_ssid_len);
6699 direct_mask = 1;
bb8c093b 6700 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
b481de9c
ZY		 6701 scan->direct_scan[0].id = WLAN_EID_SSID;
6702 scan->direct_scan[0].len = priv->essid_len;
6703 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6704 direct_mask = 1;
6705 } else
6706 direct_mask = 0;
6707
b481de9c
ZY		 6708 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6709 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6710 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6711
b481de9c
ZY		 6712
6713 switch (priv->scan_bands) {
6714 case 2:
6715 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6716 scan->tx_cmd.rate_n_flags =
bb8c093b 6717 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 6718 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
6719
6720 scan->good_CRC_th = 0;
8318d78a 6721 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 6722 break;
6723
6724 case 1:
6725 scan->tx_cmd.rate_n_flags =
bb8c093b 6726 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 6727 RATE_MCS_ANT_B_MSK);
6728 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 6729 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY		 6730 break;
6731
6732 default:
6733 IWL_WARNING("Invalid scan band count\n");
6734 goto done;
6735 }
6736
78330fdd
TW		 6737 /* We don't build a direct scan probe request; the uCode will do
6738 * that based on the direct_mask added to each channel entry */
6739 cmd_len = iwl4965_fill_probe_req(priv, band,
6740 (struct ieee80211_mgmt *)scan->data,
6741 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
6742
6743 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY		 6744 /* select Rx chains */
6745
6746 /* Force use of chains B and C (0x6) for scan Rx.
6747 * Avoid A (0x1) because of its off-channel reception on A-band.
6748 * MIMO is not used here, but value is required to make uCode happy. */
6749 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
6750 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
6751 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
6752 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
6753
6754 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6755 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6756
26c0f03f 6757 if (direct_mask) {
b481de9c
ZY		 6758 IWL_DEBUG_SCAN
6759 ("Initiating direct scan for %s.\n",
bb8c093b 6760 iwl4965_escape_essid(priv->essid, priv->essid_len));
26c0f03f
RC		 6761 scan->channel_count =
6762 iwl4965_get_channels_for_scan(
6763 priv, band, 1, /* active */
6764 direct_mask,
6765 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6766 } else {
b481de9c 6767 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
26c0f03f
RC		 6768 scan->channel_count =
6769 iwl4965_get_channels_for_scan(
6770 priv, band, 0, /* passive */
6771 direct_mask,
6772 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6773 }
b481de9c
ZY		 6774
6775 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 6776 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 6777 cmd.data = scan;
6778 scan->len = cpu_to_le16(cmd.len);
6779
6780 set_bit(STATUS_SCAN_HW, &priv->status);
bb8c093b 6781 rc = iwl4965_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 6782 if (rc)
6783 goto done;
6784
6785 queue_delayed_work(priv->workqueue, &priv->scan_check,
6786 IWL_SCAN_CHECK_WATCHDOG);
6787
6788 mutex_unlock(&priv->mutex);
6789 return;
6790
6791 done:
01ebd063 6792 /* inform mac80211 scan aborted */
b481de9c
ZY		 6793 queue_work(priv->workqueue, &priv->scan_completed);
6794 mutex_unlock(&priv->mutex);
6795}
6796
bb8c093b 6797static void iwl4965_bg_up(struct work_struct *data)
b481de9c 6798{
c79dd5b5 6799 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 6800
6801 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6802 return;
6803
6804 mutex_lock(&priv->mutex);
bb8c093b 6805 __iwl4965_up(priv);
b481de9c
ZY		 6806 mutex_unlock(&priv->mutex);
6807}
6808
bb8c093b 6809static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 6810{
c79dd5b5 6811 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 6812
6813 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6814 return;
6815
bb8c093b 6816 iwl4965_down(priv);
b481de9c
ZY		 6817 queue_work(priv->workqueue, &priv->up);
6818}
6819
bb8c093b 6820static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 6821{
c79dd5b5
TW		 6822 struct iwl_priv *priv =
6823 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 6824
6825 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6826 return;
6827
6828 mutex_lock(&priv->mutex);
bb8c093b 6829 iwl4965_rx_replenish(priv);
b481de9c
ZY		 6830 mutex_unlock(&priv->mutex);
6831}
6832
7878a5a4
MA		 6833#define IWL_DELAY_NEXT_SCAN (HZ*2)
6834
bb8c093b 6835static void iwl4965_bg_post_associate(struct work_struct *data)
b481de9c 6836{
c79dd5b5 6837 struct iwl_priv *priv = container_of(data, struct iwl_priv,
b481de9c
ZY		 6838 post_associate.work);
6839
6840 int rc = 0;
6841 struct ieee80211_conf *conf = NULL;
0795af57 6842 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 6843
6844 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6845 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6846 return;
6847 }
6848
0795af57
JP		 6849 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6850 priv->assoc_id,
6851 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 6852
6853
6854 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6855 return;
6856
6857 mutex_lock(&priv->mutex);
6858
32bfd35d 6859 if (!priv->vif || !priv->is_open) {
948c171c
MA		 6860 mutex_unlock(&priv->mutex);
6861 return;
6862 }
bb8c093b 6863 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 6864
b481de9c
ZY		 6865 conf = ieee80211_get_hw_conf(priv->hw);
6866
6867 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6868 iwl4965_commit_rxon(priv);
b481de9c 6869
bb8c093b
CH		 6870 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6871 iwl4965_setup_rxon_timing(priv);
6872 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 6873 sizeof(priv->rxon_timing), &priv->rxon_timing);
6874 if (rc)
6875 IWL_WARNING("REPLY_RXON_TIMING failed - "
6876 "Attempting to continue.\n");
6877
6878 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6879
c8b0e6e1 6880#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 6881 if (priv->current_ht_config.is_ht)
6882 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 6883#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY		 6884 iwl4965_set_rxon_chain(priv);
6885 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6886
6887 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6888 priv->assoc_id, priv->beacon_int);
6889
6890 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6891 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6892 else
6893 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6894
6895 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6896 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6897 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6898 else
6899 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6900
6901 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6902 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6903
6904 }
6905
bb8c093b 6906 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6907
6908 switch (priv->iw_mode) {
6909 case IEEE80211_IF_TYPE_STA:
bb8c093b 6910 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 6911 break;
6912
6913 case IEEE80211_IF_TYPE_IBSS:
6914
6915 /* clear out the station table */
bb8c093b 6916 iwl4965_clear_stations_table(priv);
b481de9c 6917
bb8c093b
CH		 6918 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
6919 iwl4965_rxon_add_station(priv, priv->bssid, 0);
6920 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
6921 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 6922
6923 break;
6924
6925 default:
6926 IWL_ERROR("%s Should not be called in %d mode\n",
6927 __FUNCTION__, priv->iw_mode);
6928 break;
6929 }
6930
bb8c093b 6931 iwl4965_sequence_reset(priv);
b481de9c 6932
c8b0e6e1 6933#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 6934 /* Enable Rx differential gain and sensitivity calibrations */
6935 iwl4965_chain_noise_reset(priv);
6936 priv->start_calib = 1;
c8b0e6e1 6937#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 6938
6939 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6940 priv->assoc_station_added = 1;
6941
bb8c093b 6942 iwl4965_activate_qos(priv, 0);
292ae174 6943
7878a5a4
MA		 6944 /* we have just associated, don't start scan too early */
6945 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
b481de9c
ZY		 6946 mutex_unlock(&priv->mutex);
6947}
6948
bb8c093b 6949static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 6950{
c79dd5b5 6951 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 6952
bb8c093b 6953 if (!iwl4965_is_ready(priv))
b481de9c
ZY		 6954 return;
6955
6956 mutex_lock(&priv->mutex);
6957
6958 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 6959 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6960
6961 mutex_unlock(&priv->mutex);
6962}
6963
76bb77e0
ZY		 6964static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6965
bb8c093b 6966static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 6967{
c79dd5b5
TW		 6968 struct iwl_priv *priv =
6969 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY		 6970
6971 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6972
6973 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6974 return;
6975
a0646470
ZY		 6976 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6977 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 6978
b481de9c
ZY		 6979 ieee80211_scan_completed(priv->hw);
6980
6981 /* Since setting the TXPOWER may have been deferred while
6982 * performing the scan, fire one off */
6983 mutex_lock(&priv->mutex);
bb8c093b 6984 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 6985 mutex_unlock(&priv->mutex);
6986}
6987
6988/*****************************************************************************
6989 *
6990 * mac80211 entry point functions
6991 *
6992 *****************************************************************************/
6993
5a66926a
ZY		 6994#define UCODE_READY_TIMEOUT (2 * HZ)
6995
bb8c093b 6996static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 6997{
c79dd5b5 6998 struct iwl_priv *priv = hw->priv;
5a66926a 6999 int ret;
b481de9c
ZY		 7000
7001 IWL_DEBUG_MAC80211("enter\n");
7002
5a66926a
ZY		 7003 if (pci_enable_device(priv->pci_dev)) {
7004 IWL_ERROR("Fail to pci_enable_device\n");
7005 return -ENODEV;
7006 }
7007 pci_restore_state(priv->pci_dev);
7008 pci_enable_msi(priv->pci_dev);
7009
7010 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
7011 DRV_NAME, priv);
7012 if (ret) {
7013 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
7014 goto out_disable_msi;
7015 }
7016
b481de9c
ZY		 7017 /* we should be verifying the device is ready to be opened */
7018 mutex_lock(&priv->mutex);
7019
5a66926a
ZY		 7020 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
7021 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
7022 * ucode filename and max sizes are card-specific. */
b481de9c 7023
5a66926a
ZY		 7024 if (!priv->ucode_code.len) {
7025 ret = iwl4965_read_ucode(priv);
7026 if (ret) {
7027 IWL_ERROR("Could not read microcode: %d\n", ret);
7028 mutex_unlock(&priv->mutex);
7029 goto out_release_irq;
7030 }
7031 }
b481de9c 7032
e655b9f0 7033 ret = __iwl4965_up(priv);
5a66926a 7034
b481de9c 7035 mutex_unlock(&priv->mutex);
5a66926a 7036
e655b9f0
ZY		 7037 if (ret)
7038 goto out_release_irq;
7039
7040 IWL_DEBUG_INFO("Start UP work done.\n");
7041
7042 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
7043 return 0;
7044
5a66926a
ZY		 7045 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
7046 * mac80211 will not be run successfully. */
7047 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
7048 test_bit(STATUS_READY, &priv->status),
7049 UCODE_READY_TIMEOUT);
7050 if (!ret) {
7051 if (!test_bit(STATUS_READY, &priv->status)) {
7052 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
7053 jiffies_to_msecs(UCODE_READY_TIMEOUT));
7054 ret = -ETIMEDOUT;
7055 goto out_release_irq;
7056 }
7057 }
7058
e655b9f0 7059 priv->is_open = 1;
b481de9c
ZY		 7060 IWL_DEBUG_MAC80211("leave\n");
7061 return 0;
5a66926a
ZY		 7062
7063out_release_irq:
7064 free_irq(priv->pci_dev->irq, priv);
7065out_disable_msi:
7066 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 7067 pci_disable_device(priv->pci_dev);
7068 priv->is_open = 0;
7069 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 7070 return ret;
b481de9c
ZY		 7071}
7072
bb8c093b 7073static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 7074{
c79dd5b5 7075 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7076
7077 IWL_DEBUG_MAC80211("enter\n");
948c171c 7078
e655b9f0
ZY		 7079 if (!priv->is_open) {
7080 IWL_DEBUG_MAC80211("leave - skip\n");
7081 return;
7082 }
7083
b481de9c 7084 priv->is_open = 0;
5a66926a
ZY		 7085
7086 if (iwl4965_is_ready_rf(priv)) {
e655b9f0
ZY		 7087 /* stop mac, cancel any scan request and clear
7088 * RXON_FILTER_ASSOC_MSK BIT
7089 */
5a66926a
ZY		 7090 mutex_lock(&priv->mutex);
7091 iwl4965_scan_cancel_timeout(priv, 100);
7092 cancel_delayed_work(&priv->post_associate);
fde3571f 7093 mutex_unlock(&priv->mutex);
fde3571f
MA		 7094 }
7095
5a66926a
ZY		 7096 iwl4965_down(priv);
7097
7098 flush_workqueue(priv->workqueue);
7099 free_irq(priv->pci_dev->irq, priv);
7100 pci_disable_msi(priv->pci_dev);
7101 pci_save_state(priv->pci_dev);
7102 pci_disable_device(priv->pci_dev);
948c171c 7103
b481de9c 7104 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7105}
7106
bb8c093b 7107static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7108 struct ieee80211_tx_control *ctl)
7109{
c79dd5b5 7110 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7111
7112 IWL_DEBUG_MAC80211("enter\n");
7113
7114 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
7115 IWL_DEBUG_MAC80211("leave - monitor\n");
7116 return -1;
7117 }
7118
7119 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 7120 ctl->tx_rate->bitrate);
b481de9c 7121
bb8c093b 7122 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 7123 dev_kfree_skb_any(skb);
7124
7125 IWL_DEBUG_MAC80211("leave\n");
7126 return 0;
7127}
7128
bb8c093b 7129static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7130 struct ieee80211_if_init_conf *conf)
7131{
c79dd5b5 7132 struct iwl_priv *priv = hw->priv;
b481de9c 7133 unsigned long flags;
0795af57 7134 DECLARE_MAC_BUF(mac);
b481de9c 7135
32bfd35d 7136 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 7137
32bfd35d
JB		 7138 if (priv->vif) {
7139 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 7140 return -EOPNOTSUPP;
b481de9c
ZY		 7141 }
7142
7143 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 7144 priv->vif = conf->vif;
b481de9c
ZY		 7145
7146 spin_unlock_irqrestore(&priv->lock, flags);
7147
7148 mutex_lock(&priv->mutex);
864792e3
TW		 7149
7150 if (conf->mac_addr) {
7151 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
7152 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
7153 }
b481de9c 7154
5a66926a
ZY		 7155 if (iwl4965_is_ready(priv))
7156 iwl4965_set_mode(priv, conf->type);
7157
b481de9c
ZY		 7158 mutex_unlock(&priv->mutex);
7159
5a66926a 7160 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7161 return 0;
7162}
7163
7164/**
bb8c093b 7165 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 7166 *
7167 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
7168 * be set inappropriately and the driver currently sets the hardware up to
7169 * use it whenever needed.
7170 */
bb8c093b 7171static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 7172{
c79dd5b5 7173 struct iwl_priv *priv = hw->priv;
bb8c093b 7174 const struct iwl4965_channel_info *ch_info;
b481de9c 7175 unsigned long flags;
76bb77e0 7176 int ret = 0;
b481de9c
ZY		 7177
7178 mutex_lock(&priv->mutex);
8318d78a 7179 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 7180
12342c47
ZY		 7181 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
7182
bb8c093b 7183 if (!iwl4965_is_ready(priv)) {
b481de9c 7184 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 7185 ret = -EIO;
7186 goto out;
b481de9c
ZY		 7187 }
7188
bb8c093b 7189 if (unlikely(!iwl4965_param_disable_hw_scan &&
b481de9c 7190 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY		 7191 IWL_DEBUG_MAC80211("leave - scanning\n");
7192 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 7193 mutex_unlock(&priv->mutex);
a0646470 7194 return 0;
b481de9c
ZY		 7195 }
7196
7197 spin_lock_irqsave(&priv->lock, flags);
7198
8318d78a
JB		 7199 ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
7200 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 7201 if (!is_channel_valid(ch_info)) {
b481de9c
ZY		 7202 IWL_DEBUG_MAC80211("leave - invalid channel\n");
7203 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 7204 ret = -EINVAL;
7205 goto out;
b481de9c
ZY		 7206 }
7207
c8b0e6e1 7208#ifdef CONFIG_IWL4965_HT
78330fdd 7209 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 7210 * from any ht related info since 2.4 does not
7211 * support ht */
78330fdd 7212 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY		 7213#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7214 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
7215#endif
7216 )
7217 priv->staging_rxon.flags = 0;
c8b0e6e1 7218#endif /* CONFIG_IWL4965_HT */
b481de9c 7219
8318d78a
JB		 7220 iwl4965_set_rxon_channel(priv, conf->channel->band,
7221 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 7222
8318d78a 7223 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY		 7224
7225 /* The list of supported rates and rate mask can be different
8318d78a 7226 * for each band; since the band may have changed, reset
b481de9c 7227 * the rate mask to what mac80211 lists */
bb8c093b 7228 iwl4965_set_rate(priv);
b481de9c
ZY		 7229
7230 spin_unlock_irqrestore(&priv->lock, flags);
7231
7232#ifdef IEEE80211_CONF_CHANNEL_SWITCH
7233 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 7234 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 7235 goto out;
b481de9c
ZY		 7236 }
7237#endif
7238
bb8c093b 7239 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 7240
7241 if (!conf->radio_enabled) {
7242 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 7243 goto out;
b481de9c
ZY		 7244 }
7245
bb8c093b 7246 if (iwl4965_is_rfkill(priv)) {
b481de9c 7247 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 7248 ret = -EIO;
7249 goto out;
b481de9c
ZY		 7250 }
7251
bb8c093b 7252 iwl4965_set_rate(priv);
b481de9c
ZY		 7253
7254 if (memcmp(&priv->active_rxon,
7255 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 7256 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7257 else
7258 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
7259
7260 IWL_DEBUG_MAC80211("leave\n");
7261
a0646470
ZY		 7262out:
7263 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 7264 mutex_unlock(&priv->mutex);
76bb77e0 7265 return ret;
b481de9c
ZY		 7266}
7267
c79dd5b5 7268static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c
ZY		 7269{
7270 int rc = 0;
7271
d986bcd1 7272 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 7273 return;
7274
7275 /* The following should be done only at AP bring up */
7276 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
7277
7278 /* RXON - unassoc (to set timing command) */
7279 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7280 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7281
7282 /* RXON Timing */
bb8c093b
CH		 7283 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
7284 iwl4965_setup_rxon_timing(priv);
7285 rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c
ZY		 7286 sizeof(priv->rxon_timing), &priv->rxon_timing);
7287 if (rc)
7288 IWL_WARNING("REPLY_RXON_TIMING failed - "
7289 "Attempting to continue.\n");
7290
7291 iwl4965_set_rxon_chain(priv);
7292
7293 /* FIXME: what should be the assoc_id for AP? */
7294 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
7295 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
7296 priv->staging_rxon.flags |=
7297 RXON_FLG_SHORT_PREAMBLE_MSK;
7298 else
7299 priv->staging_rxon.flags &=
7300 ~RXON_FLG_SHORT_PREAMBLE_MSK;
7301
7302 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
7303 if (priv->assoc_capability &
7304 WLAN_CAPABILITY_SHORT_SLOT_TIME)
7305 priv->staging_rxon.flags |=
7306 RXON_FLG_SHORT_SLOT_MSK;
7307 else
7308 priv->staging_rxon.flags &=
7309 ~RXON_FLG_SHORT_SLOT_MSK;
7310
7311 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
7312 priv->staging_rxon.flags &=
7313 ~RXON_FLG_SHORT_SLOT_MSK;
7314 }
7315 /* restore RXON assoc */
7316 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 7317 iwl4965_commit_rxon(priv);
bb8c093b 7318 iwl4965_activate_qos(priv, 1);
bb8c093b 7319 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 7320 }
bb8c093b 7321 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 7322
7323 /* FIXME - we need to add code here to detect a totally new
7324 * configuration, reset the AP, unassoc, rxon timing, assoc,
7325 * clear sta table, add BCAST sta... */
7326}
7327
32bfd35d
JB		 7328static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
7329 struct ieee80211_vif *vif,
b481de9c
ZY		 7330 struct ieee80211_if_conf *conf)
7331{
c79dd5b5 7332 struct iwl_priv *priv = hw->priv;
0795af57 7333 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7334 unsigned long flags;
7335 int rc;
7336
7337 if (conf == NULL)
7338 return -EIO;
7339
b716bb91
EG		 7340 if (priv->vif != vif) {
7341 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
7342 mutex_unlock(&priv->mutex);
7343 return 0;
7344 }
7345
b481de9c
ZY		 7346 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
7347 (!conf->beacon || !conf->ssid_len)) {
7348 IWL_DEBUG_MAC80211
7349 ("Leaving in AP mode because HostAPD is not ready.\n");
7350 return 0;
7351 }
7352
5a66926a
ZY		 7353 if (!iwl4965_is_alive(priv))
7354 return -EAGAIN;
7355
b481de9c
ZY		 7356 mutex_lock(&priv->mutex);
7357
b481de9c 7358 if (conf->bssid)
0795af57
JP		 7359 IWL_DEBUG_MAC80211("bssid: %s\n",
7360 print_mac(mac, conf->bssid));
b481de9c 7361
4150c572
JB		 7362/*
7363 * very dubious code was here; the probe filtering flag is never set:
7364 *
b481de9c
ZY		 7365 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
7366 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 7367 */
b481de9c
ZY		 7368
7369 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
7370 if (!conf->bssid) {
7371 conf->bssid = priv->mac_addr;
7372 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 7373 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
7374 print_mac(mac, conf->bssid));
b481de9c
ZY		 7375 }
7376 if (priv->ibss_beacon)
7377 dev_kfree_skb(priv->ibss_beacon);
7378
7379 priv->ibss_beacon = conf->beacon;
7380 }
7381
fde3571f
MA		 7382 if (iwl4965_is_rfkill(priv))
7383 goto done;
7384
b481de9c
ZY		 7385 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
7386 !is_multicast_ether_addr(conf->bssid)) {
7387 /* If there is currently a HW scan going on in the background
7388 * then we need to cancel it else the RXON below will fail. */
bb8c093b 7389 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 7390 IWL_WARNING("Aborted scan still in progress "
7391 "after 100ms\n");
7392 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
7393 mutex_unlock(&priv->mutex);
7394 return -EAGAIN;
7395 }
7396 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
7397
7398 /* TODO: Audit driver for usage of these members and see
7399 * if mac80211 deprecates them (priv->bssid looks like it
7400 * shouldn't be there, but I haven't scanned the IBSS code
7401 * to verify) - jpk */
7402 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
7403
7404 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 7405 iwl4965_config_ap(priv);
b481de9c 7406 else {
bb8c093b 7407 rc = iwl4965_commit_rxon(priv);
b481de9c 7408 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 7409 iwl4965_rxon_add_station(
b481de9c
ZY		 7410 priv, priv->active_rxon.bssid_addr, 1);
7411 }
7412
7413 } else {
bb8c093b 7414 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 7415 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7416 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7417 }
7418
fde3571f 7419 done:
b481de9c
ZY		 7420 spin_lock_irqsave(&priv->lock, flags);
7421 if (!conf->ssid_len)
7422 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7423 else
7424 memcpy(priv->essid, conf->ssid, conf->ssid_len);
7425
7426 priv->essid_len = conf->ssid_len;
7427 spin_unlock_irqrestore(&priv->lock, flags);
7428
7429 IWL_DEBUG_MAC80211("leave\n");
7430 mutex_unlock(&priv->mutex);
7431
7432 return 0;
7433}
7434
bb8c093b 7435static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 7436 unsigned int changed_flags,
7437 unsigned int *total_flags,
7438 int mc_count, struct dev_addr_list *mc_list)
7439{
7440 /*
7441 * XXX: dummy
bb8c093b 7442 * see also iwl4965_connection_init_rx_config
4150c572
JB		 7443 */
7444 *total_flags = 0;
7445}
7446
bb8c093b 7447static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 7448 struct ieee80211_if_init_conf *conf)
7449{
c79dd5b5 7450 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7451
7452 IWL_DEBUG_MAC80211("enter\n");
7453
7454 mutex_lock(&priv->mutex);
948c171c 7455
fde3571f
MA		 7456 if (iwl4965_is_ready_rf(priv)) {
7457 iwl4965_scan_cancel_timeout(priv, 100);
7458 cancel_delayed_work(&priv->post_associate);
7459 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7460 iwl4965_commit_rxon(priv);
7461 }
32bfd35d
JB		 7462 if (priv->vif == conf->vif) {
7463 priv->vif = NULL;
b481de9c
ZY		 7464 memset(priv->bssid, 0, ETH_ALEN);
7465 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7466 priv->essid_len = 0;
7467 }
7468 mutex_unlock(&priv->mutex);
7469
7470 IWL_DEBUG_MAC80211("leave\n");
7471
7472}
471b3efd
JB		 7473
7474static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
7475 struct ieee80211_vif *vif,
7476 struct ieee80211_bss_conf *bss_conf,
7477 u32 changes)
220173b0 7478{
c79dd5b5 7479 struct iwl_priv *priv = hw->priv;
220173b0 7480
471b3efd
JB		 7481 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
7482 if (bss_conf->use_short_preamble)
220173b0
TW		 7483 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
7484 else
7485 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
7486 }
7487
471b3efd 7488 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
8318d78a 7489 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 7490 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
7491 else
7492 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
7493 }
7494
471b3efd
JB		 7495 if (changes & BSS_CHANGED_ASSOC) {
7496 /*
7497 * TODO:
7498 * do stuff instead of sniffing assoc resp
7499 */
7500 }
7501
bb8c093b
CH		 7502 if (iwl4965_is_associated(priv))
7503 iwl4965_send_rxon_assoc(priv);
220173b0 7504}
b481de9c 7505
bb8c093b 7506static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 7507{
7508 int rc = 0;
7509 unsigned long flags;
c79dd5b5 7510 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7511
7512 IWL_DEBUG_MAC80211("enter\n");
7513
052c4b9f 7514 mutex_lock(&priv->mutex);
b481de9c
ZY		 7515 spin_lock_irqsave(&priv->lock, flags);
7516
bb8c093b 7517 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7518 rc = -EIO;
7519 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7520 goto out_unlock;
7521 }
7522
7523 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7524 rc = -EIO;
7525 IWL_ERROR("ERROR: APs don't scan\n");
7526 goto out_unlock;
7527 }
7528
7878a5a4
MA		 7529 /* we don't schedule scan within next_scan_jiffies period */
7530 if (priv->next_scan_jiffies &&
7531 time_after(priv->next_scan_jiffies, jiffies)) {
7532 rc = -EAGAIN;
7533 goto out_unlock;
7534 }
b481de9c 7535 /* if we just finished scan ask for delay */
7878a5a4
MA		 7536 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7537 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 7538 rc = -EAGAIN;
7539 goto out_unlock;
7540 }
7541 if (len) {
7878a5a4 7542 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 7543 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 7544
7545 priv->one_direct_scan = 1;
7546 priv->direct_ssid_len = (u8)
7547 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7548 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 7549 } else
7550 priv->one_direct_scan = 0;
b481de9c 7551
bb8c093b 7552 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 7553
7554 IWL_DEBUG_MAC80211("leave\n");
7555
7556out_unlock:
7557 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 7558 mutex_unlock(&priv->mutex);
b481de9c
ZY		 7559
7560 return rc;
7561}
7562
bb8c093b 7563static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 7564 const u8 *local_addr, const u8 *addr,
7565 struct ieee80211_key_conf *key)
7566{
c79dd5b5 7567 struct iwl_priv *priv = hw->priv;
0795af57 7568 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 7569 int rc = 0;
7570 u8 sta_id;
7571
7572 IWL_DEBUG_MAC80211("enter\n");
7573
bb8c093b 7574 if (!iwl4965_param_hwcrypto) {
b481de9c
ZY		 7575 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7576 return -EOPNOTSUPP;
7577 }
7578
7579 if (is_zero_ether_addr(addr))
7580 /* only support pairwise keys */
7581 return -EOPNOTSUPP;
7582
bb8c093b 7583 sta_id = iwl4965_hw_find_station(priv, addr);
b481de9c 7584 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 7585 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7586 print_mac(mac, addr));
b481de9c
ZY		 7587 return -EINVAL;
7588 }
7589
7590 mutex_lock(&priv->mutex);
7591
bb8c093b 7592 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7593
b481de9c
ZY		 7594 switch (cmd) {
7595 case SET_KEY:
bb8c093b 7596 rc = iwl4965_update_sta_key_info(priv, key, sta_id);
b481de9c 7597 if (!rc) {
bb8c093b
CH		 7598 iwl4965_set_rxon_hwcrypto(priv, 1);
7599 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7600 key->hw_key_idx = sta_id;
7601 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7602 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7603 }
7604 break;
7605 case DISABLE_KEY:
bb8c093b 7606 rc = iwl4965_clear_sta_key_info(priv, sta_id);
b481de9c 7607 if (!rc) {
bb8c093b
CH		 7608 iwl4965_set_rxon_hwcrypto(priv, 0);
7609 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7610 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7611 }
7612 break;
7613 default:
7614 rc = -EINVAL;
7615 }
7616
7617 IWL_DEBUG_MAC80211("leave\n");
7618 mutex_unlock(&priv->mutex);
7619
7620 return rc;
7621}
7622
bb8c093b 7623static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY		 7624 const struct ieee80211_tx_queue_params *params)
7625{
c79dd5b5 7626 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7627 unsigned long flags;
7628 int q;
b481de9c
ZY		 7629
7630 IWL_DEBUG_MAC80211("enter\n");
7631
bb8c093b 7632 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7633 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7634 return -EIO;
7635 }
7636
7637 if (queue >= AC_NUM) {
7638 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7639 return 0;
7640 }
7641
b481de9c
ZY		 7642 if (!priv->qos_data.qos_enable) {
7643 priv->qos_data.qos_active = 0;
7644 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7645 return 0;
7646 }
7647 q = AC_NUM - 1 - queue;
7648
7649 spin_lock_irqsave(&priv->lock, flags);
7650
7651 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7652 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7653 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7654 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 7655 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 7656
7657 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7658 priv->qos_data.qos_active = 1;
7659
7660 spin_unlock_irqrestore(&priv->lock, flags);
7661
7662 mutex_lock(&priv->mutex);
7663 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b
CH		 7664 iwl4965_activate_qos(priv, 1);
7665 else if (priv->assoc_id && iwl4965_is_associated(priv))
7666 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 7667
7668 mutex_unlock(&priv->mutex);
7669
b481de9c
ZY		 7670 IWL_DEBUG_MAC80211("leave\n");
7671 return 0;
7672}
7673
bb8c093b 7674static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7675 struct ieee80211_tx_queue_stats *stats)
7676{
c79dd5b5 7677 struct iwl_priv *priv = hw->priv;
b481de9c 7678 int i, avail;
bb8c093b
CH		 7679 struct iwl4965_tx_queue *txq;
7680 struct iwl4965_queue *q;
b481de9c
ZY		 7681 unsigned long flags;
7682
7683 IWL_DEBUG_MAC80211("enter\n");
7684
bb8c093b 7685 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7686 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7687 return -EIO;
7688 }
7689
7690 spin_lock_irqsave(&priv->lock, flags);
7691
7692 for (i = 0; i < AC_NUM; i++) {
7693 txq = &priv->txq[i];
7694 q = &txq->q;
bb8c093b 7695 avail = iwl4965_queue_space(q);
b481de9c
ZY		 7696
7697 stats->data[i].len = q->n_window - avail;
7698 stats->data[i].limit = q->n_window - q->high_mark;
7699 stats->data[i].count = q->n_window;
7700
7701 }
7702 spin_unlock_irqrestore(&priv->lock, flags);
7703
7704 IWL_DEBUG_MAC80211("leave\n");
7705
7706 return 0;
7707}
7708
bb8c093b 7709static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7710 struct ieee80211_low_level_stats *stats)
7711{
7712 IWL_DEBUG_MAC80211("enter\n");
7713 IWL_DEBUG_MAC80211("leave\n");
7714
7715 return 0;
7716}
7717
bb8c093b 7718static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 7719{
7720 IWL_DEBUG_MAC80211("enter\n");
7721 IWL_DEBUG_MAC80211("leave\n");
7722
7723 return 0;
7724}
7725
bb8c093b 7726static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 7727{
c79dd5b5 7728 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7729 unsigned long flags;
7730
7731 mutex_lock(&priv->mutex);
7732 IWL_DEBUG_MAC80211("enter\n");
7733
7734 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 7735#ifdef CONFIG_IWL4965_HT
b481de9c 7736 spin_lock_irqsave(&priv->lock, flags);
fd105e79 7737 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 7738 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 7739#endif /* CONFIG_IWL4965_HT */
b481de9c 7740
bb8c093b 7741 iwl4965_reset_qos(priv);
b481de9c
ZY		 7742
7743 cancel_delayed_work(&priv->post_associate);
7744
7745 spin_lock_irqsave(&priv->lock, flags);
7746 priv->assoc_id = 0;
7747 priv->assoc_capability = 0;
7748 priv->call_post_assoc_from_beacon = 0;
7749 priv->assoc_station_added = 0;
7750
7751 /* new association get rid of ibss beacon skb */
7752 if (priv->ibss_beacon)
7753 dev_kfree_skb(priv->ibss_beacon);
7754
7755 priv->ibss_beacon = NULL;
7756
7757 priv->beacon_int = priv->hw->conf.beacon_int;
7758 priv->timestamp1 = 0;
7759 priv->timestamp0 = 0;
7760 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7761 priv->beacon_int = 0;
7762
7763 spin_unlock_irqrestore(&priv->lock, flags);
7764
fde3571f
MA		 7765 if (!iwl4965_is_ready_rf(priv)) {
7766 IWL_DEBUG_MAC80211("leave - not ready\n");
7767 mutex_unlock(&priv->mutex);
7768 return;
7769 }
7770
052c4b9f 7771 /* we are restarting association process
7772 * clear RXON_FILTER_ASSOC_MSK bit
7773 */
7774 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 7775 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7776 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7777 iwl4965_commit_rxon(priv);
052c4b9f 7778 }
7779
b481de9c
ZY		 7780 /* Per mac80211.h: This is only used in IBSS mode... */
7781 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 7782
b481de9c
ZY		 7783 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7784 mutex_unlock(&priv->mutex);
7785 return;
7786 }
7787
b481de9c
ZY		 7788 priv->only_active_channel = 0;
7789
bb8c093b 7790 iwl4965_set_rate(priv);
b481de9c
ZY		 7791
7792 mutex_unlock(&priv->mutex);
7793
7794 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7795}
7796
bb8c093b 7797static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7798 struct ieee80211_tx_control *control)
7799{
c79dd5b5 7800 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7801 unsigned long flags;
7802
7803 mutex_lock(&priv->mutex);
7804 IWL_DEBUG_MAC80211("enter\n");
7805
bb8c093b 7806 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7807 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7808 mutex_unlock(&priv->mutex);
7809 return -EIO;
7810 }
7811
7812 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7813 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7814 mutex_unlock(&priv->mutex);
7815 return -EIO;
7816 }
7817
7818 spin_lock_irqsave(&priv->lock, flags);
7819
7820 if (priv->ibss_beacon)
7821 dev_kfree_skb(priv->ibss_beacon);
7822
7823 priv->ibss_beacon = skb;
7824
7825 priv->assoc_id = 0;
7826
7827 IWL_DEBUG_MAC80211("leave\n");
7828 spin_unlock_irqrestore(&priv->lock, flags);
7829
bb8c093b 7830 iwl4965_reset_qos(priv);
b481de9c
ZY		 7831
7832 queue_work(priv->workqueue, &priv->post_associate.work);
7833
7834 mutex_unlock(&priv->mutex);
7835
7836 return 0;
7837}
7838
c8b0e6e1 7839#ifdef CONFIG_IWL4965_HT
b481de9c 7840
fd105e79 7841static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
c79dd5b5 7842 struct iwl_priv *priv)
b481de9c 7843{
fd105e79
RR		 7844 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
7845 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
7846 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
b481de9c
ZY		 7847
7848 IWL_DEBUG_MAC80211("enter: \n");
7849
fd105e79
RR		 7850 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
7851 iwl_conf->is_ht = 0;
7852 return;
b481de9c
ZY		 7853 }
7854
fd105e79
RR		 7855 iwl_conf->is_ht = 1;
7856 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7857
7858 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
7859 iwl_conf->sgf |= 0x1;
7860 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
7861 iwl_conf->sgf |= 0x2;
7862
7863 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
7864 iwl_conf->max_amsdu_size =
7865 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
134eb5d3 7866
fd105e79
RR		 7867 iwl_conf->supported_chan_width =
7868 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
134eb5d3
GC		 7869 iwl_conf->extension_chan_offset =
7870 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
7871 /* If no above or below channel supplied disable FAT channel */
7872 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
7873 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
7874 iwl_conf->supported_chan_width = 0;
7875
fd105e79
RR		 7876 iwl_conf->tx_mimo_ps_mode =
7877 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7878 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
7879
7880 iwl_conf->control_channel = ht_bss_conf->primary_channel;
fd105e79
RR		 7881 iwl_conf->tx_chan_width =
7882 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
7883 iwl_conf->ht_protection =
7884 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
7885 iwl_conf->non_GF_STA_present =
7886 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
7887
7888 IWL_DEBUG_MAC80211("control channel %d\n",
7889 iwl_conf->control_channel);
b481de9c 7890 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7891}
7892
bb8c093b 7893static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
fd105e79 7894 struct ieee80211_conf *conf)
b481de9c 7895{
c79dd5b5 7896 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7897
7898 IWL_DEBUG_MAC80211("enter: \n");
7899
fd105e79 7900 iwl4965_ht_info_fill(conf, priv);
b481de9c
ZY		 7901 iwl4965_set_rxon_chain(priv);
7902
7903 if (priv && priv->assoc_id &&
7904 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
7905 unsigned long flags;
7906
7907 spin_lock_irqsave(&priv->lock, flags);
7908 if (priv->beacon_int)
7909 queue_work(priv->workqueue, &priv->post_associate.work);
7910 else
7911 priv->call_post_assoc_from_beacon = 1;
7912 spin_unlock_irqrestore(&priv->lock, flags);
7913 }
7914
fd105e79
RR		 7915 IWL_DEBUG_MAC80211("leave:\n");
7916 return 0;
b481de9c
ZY		 7917}
7918
c8b0e6e1 7919#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 7920
7921/*****************************************************************************
7922 *
7923 * sysfs attributes
7924 *
7925 *****************************************************************************/
7926
0a6857e7 7927#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 7928
7929/*
7930 * The following adds a new attribute to the sysfs representation
7931 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7932 * used for controlling the debug level.
7933 *
7934 * See the level definitions in iwl for details.
7935 */
7936
7937static ssize_t show_debug_level(struct device_driver *d, char *buf)
7938{
0a6857e7 7939 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY		 7940}
7941static ssize_t store_debug_level(struct device_driver *d,
7942 const char *buf, size_t count)
7943{
7944 char *p = (char *)buf;
7945 u32 val;
7946
7947 val = simple_strtoul(p, &p, 0);
7948 if (p == buf)
7949 printk(KERN_INFO DRV_NAME
7950 ": %s is not in hex or decimal form.\n", buf);
7951 else
0a6857e7 7952 iwl_debug_level = val;
b481de9c
ZY		 7953
7954 return strnlen(buf, count);
7955}
7956
7957static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7958 show_debug_level, store_debug_level);
7959
0a6857e7 7960#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c
ZY		 7961
7962static ssize_t show_rf_kill(struct device *d,
7963 struct device_attribute *attr, char *buf)
7964{
7965 /*
7966 * 0 - RF kill not enabled
7967 * 1 - SW based RF kill active (sysfs)
7968 * 2 - HW based RF kill active
7969 * 3 - Both HW and SW based RF kill active
7970 */
c79dd5b5 7971 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7972 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7973 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7974
7975 return sprintf(buf, "%i\n", val);
7976}
7977
7978static ssize_t store_rf_kill(struct device *d,
7979 struct device_attribute *attr,
7980 const char *buf, size_t count)
7981{
c79dd5b5 7982 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7983
7984 mutex_lock(&priv->mutex);
bb8c093b 7985 iwl4965_radio_kill_sw(priv, buf[0] == '1');
b481de9c
ZY		 7986 mutex_unlock(&priv->mutex);
7987
7988 return count;
7989}
7990
7991static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7992
7993static ssize_t show_temperature(struct device *d,
7994 struct device_attribute *attr, char *buf)
7995{
c79dd5b5 7996 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 7997
bb8c093b 7998 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 7999 return -EAGAIN;
8000
bb8c093b 8001 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 8002}
8003
8004static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
8005
8006static ssize_t show_rs_window(struct device *d,
8007 struct device_attribute *attr,
8008 char *buf)
8009{
c79dd5b5 8010 struct iwl_priv *priv = d->driver_data;
bb8c093b 8011 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 8012}
8013static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
8014
8015static ssize_t show_tx_power(struct device *d,
8016 struct device_attribute *attr, char *buf)
8017{
c79dd5b5 8018 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8019 return sprintf(buf, "%d\n", priv->user_txpower_limit);
8020}
8021
8022static ssize_t store_tx_power(struct device *d,
8023 struct device_attribute *attr,
8024 const char *buf, size_t count)
8025{
c79dd5b5 8026 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8027 char *p = (char *)buf;
8028 u32 val;
8029
8030 val = simple_strtoul(p, &p, 10);
8031 if (p == buf)
8032 printk(KERN_INFO DRV_NAME
8033 ": %s is not in decimal form.\n", buf);
8034 else
bb8c093b 8035 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 8036
8037 return count;
8038}
8039
8040static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
8041
8042static ssize_t show_flags(struct device *d,
8043 struct device_attribute *attr, char *buf)
8044{
c79dd5b5 8045 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8046
8047 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
8048}
8049
8050static ssize_t store_flags(struct device *d,
8051 struct device_attribute *attr,
8052 const char *buf, size_t count)
8053{
c79dd5b5 8054 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8055 u32 flags = simple_strtoul(buf, NULL, 0);
8056
8057 mutex_lock(&priv->mutex);
8058 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
8059 /* Cancel any currently running scans... */
bb8c093b 8060 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8061 IWL_WARNING("Could not cancel scan.\n");
8062 else {
8063 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
8064 flags);
8065 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 8066 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8067 }
8068 }
8069 mutex_unlock(&priv->mutex);
8070
8071 return count;
8072}
8073
8074static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
8075
8076static ssize_t show_filter_flags(struct device *d,
8077 struct device_attribute *attr, char *buf)
8078{
c79dd5b5 8079 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8080
8081 return sprintf(buf, "0x%04X\n",
8082 le32_to_cpu(priv->active_rxon.filter_flags));
8083}
8084
8085static ssize_t store_filter_flags(struct device *d,
8086 struct device_attribute *attr,
8087 const char *buf, size_t count)
8088{
c79dd5b5 8089 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 8090 u32 filter_flags = simple_strtoul(buf, NULL, 0);
8091
8092 mutex_lock(&priv->mutex);
8093 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
8094 /* Cancel any currently running scans... */
bb8c093b 8095 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 8096 IWL_WARNING("Could not cancel scan.\n");
8097 else {
8098 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
8099 "0x%04X\n", filter_flags);
8100 priv->staging_rxon.filter_flags =
8101 cpu_to_le32(filter_flags);
bb8c093b 8102 iwl4965_commit_rxon(priv);
b481de9c
ZY		 8103 }
8104 }
8105 mutex_unlock(&priv->mutex);
8106
8107 return count;
8108}
8109
8110static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
8111 store_filter_flags);
8112
c8b0e6e1 8113#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 8114
8115static ssize_t show_measurement(struct device *d,
8116 struct device_attribute *attr, char *buf)
8117{
c79dd5b5 8118 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 8119 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 8120 u32 size = sizeof(measure_report), len = 0, ofs = 0;
8121 u8 *data = (u8 *) & measure_report;
8122 unsigned long flags;
8123
8124 spin_lock_irqsave(&priv->lock, flags);
8125 if (!(priv->measurement_status & MEASUREMENT_READY)) {
8126 spin_unlock_irqrestore(&priv->lock, flags);
8127 return 0;
8128 }
8129 memcpy(&measure_report, &priv->measure_report, size);
8130 priv->measurement_status = 0;
8131 spin_unlock_irqrestore(&priv->lock, flags);
8132
8133 while (size && (PAGE_SIZE - len)) {
8134 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8135 PAGE_SIZE - len, 1);
8136 len = strlen(buf);
8137 if (PAGE_SIZE - len)
8138 buf[len++] = '\n';
8139
8140 ofs += 16;
8141 size -= min(size, 16U);
8142 }
8143
8144 return len;
8145}
8146
8147static ssize_t store_measurement(struct device *d,
8148 struct device_attribute *attr,
8149 const char *buf, size_t count)
8150{
c79dd5b5 8151 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8152 struct ieee80211_measurement_params params = {
8153 .channel = le16_to_cpu(priv->active_rxon.channel),
8154 .start_time = cpu_to_le64(priv->last_tsf),
8155 .duration = cpu_to_le16(1),
8156 };
8157 u8 type = IWL_MEASURE_BASIC;
8158 u8 buffer[32];
8159 u8 channel;
8160
8161 if (count) {
8162 char *p = buffer;
8163 strncpy(buffer, buf, min(sizeof(buffer), count));
8164 channel = simple_strtoul(p, NULL, 0);
8165 if (channel)
8166 params.channel = channel;
8167
8168 p = buffer;
8169 while (*p && *p != ' ')
8170 p++;
8171 if (*p)
8172 type = simple_strtoul(p + 1, NULL, 0);
8173 }
8174
8175 IWL_DEBUG_INFO("Invoking measurement of type %d on "
8176 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 8177 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 8178
8179 return count;
8180}
8181
8182static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
8183 show_measurement, store_measurement);
c8b0e6e1 8184#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 8185
8186static ssize_t store_retry_rate(struct device *d,
8187 struct device_attribute *attr,
8188 const char *buf, size_t count)
8189{
c79dd5b5 8190 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8191
8192 priv->retry_rate = simple_strtoul(buf, NULL, 0);
8193 if (priv->retry_rate <= 0)
8194 priv->retry_rate = 1;
8195
8196 return count;
8197}
8198
8199static ssize_t show_retry_rate(struct device *d,
8200 struct device_attribute *attr, char *buf)
8201{
c79dd5b5 8202 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8203 return sprintf(buf, "%d", priv->retry_rate);
8204}
8205
8206static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
8207 store_retry_rate);
8208
8209static ssize_t store_power_level(struct device *d,
8210 struct device_attribute *attr,
8211 const char *buf, size_t count)
8212{
c79dd5b5 8213 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8214 int rc;
8215 int mode;
8216
8217 mode = simple_strtoul(buf, NULL, 0);
8218 mutex_lock(&priv->mutex);
8219
bb8c093b 8220 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 8221 rc = -EAGAIN;
8222 goto out;
8223 }
8224
8225 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
8226 mode = IWL_POWER_AC;
8227 else
8228 mode |= IWL_POWER_ENABLED;
8229
8230 if (mode != priv->power_mode) {
bb8c093b 8231 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY		 8232 if (rc) {
8233 IWL_DEBUG_MAC80211("failed setting power mode.\n");
8234 goto out;
8235 }
8236 priv->power_mode = mode;
8237 }
8238
8239 rc = count;
8240
8241 out:
8242 mutex_unlock(&priv->mutex);
8243 return rc;
8244}
8245
8246#define MAX_WX_STRING 80
8247
8248/* Values are in microsecond */
8249static const s32 timeout_duration[] = {
8250 350000,
8251 250000,
8252 75000,
8253 37000,
8254 25000,
8255};
8256static const s32 period_duration[] = {
8257 400000,
8258 700000,
8259 1000000,
8260 1000000,
8261 1000000
8262};
8263
8264static ssize_t show_power_level(struct device *d,
8265 struct device_attribute *attr, char *buf)
8266{
c79dd5b5 8267 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8268 int level = IWL_POWER_LEVEL(priv->power_mode);
8269 char *p = buf;
8270
8271 p += sprintf(p, "%d ", level);
8272 switch (level) {
8273 case IWL_POWER_MODE_CAM:
8274 case IWL_POWER_AC:
8275 p += sprintf(p, "(AC)");
8276 break;
8277 case IWL_POWER_BATTERY:
8278 p += sprintf(p, "(BATTERY)");
8279 break;
8280 default:
8281 p += sprintf(p,
8282 "(Timeout %dms, Period %dms)",
8283 timeout_duration[level - 1] / 1000,
8284 period_duration[level - 1] / 1000);
8285 }
8286
8287 if (!(priv->power_mode & IWL_POWER_ENABLED))
8288 p += sprintf(p, " OFF\n");
8289 else
8290 p += sprintf(p, " \n");
8291
8292 return (p - buf + 1);
8293
8294}
8295
8296static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
8297 store_power_level);
8298
8299static ssize_t show_channels(struct device *d,
8300 struct device_attribute *attr, char *buf)
8301{
8318d78a
JB		 8302 /* all this shit doesn't belong into sysfs anyway */
8303 return 0;
b481de9c
ZY		 8304}
8305
8306static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
8307
8308static ssize_t show_statistics(struct device *d,
8309 struct device_attribute *attr, char *buf)
8310{
c79dd5b5 8311 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 8312 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 8313 u32 len = 0, ofs = 0;
8314 u8 *data = (u8 *) & priv->statistics;
8315 int rc = 0;
8316
bb8c093b 8317 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8318 return -EAGAIN;
8319
8320 mutex_lock(&priv->mutex);
bb8c093b 8321 rc = iwl4965_send_statistics_request(priv);
b481de9c
ZY		 8322 mutex_unlock(&priv->mutex);
8323
8324 if (rc) {
8325 len = sprintf(buf,
8326 "Error sending statistics request: 0x%08X\n", rc);
8327 return len;
8328 }
8329
8330 while (size && (PAGE_SIZE - len)) {
8331 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
8332 PAGE_SIZE - len, 1);
8333 len = strlen(buf);
8334 if (PAGE_SIZE - len)
8335 buf[len++] = '\n';
8336
8337 ofs += 16;
8338 size -= min(size, 16U);
8339 }
8340
8341 return len;
8342}
8343
8344static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
8345
8346static ssize_t show_antenna(struct device *d,
8347 struct device_attribute *attr, char *buf)
8348{
c79dd5b5 8349 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 8350
bb8c093b 8351 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8352 return -EAGAIN;
8353
8354 return sprintf(buf, "%d\n", priv->antenna);
8355}
8356
8357static ssize_t store_antenna(struct device *d,
8358 struct device_attribute *attr,
8359 const char *buf, size_t count)
8360{
8361 int ant;
c79dd5b5 8362 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 8363
8364 if (count == 0)
8365 return 0;
8366
8367 if (sscanf(buf, "%1i", &ant) != 1) {
8368 IWL_DEBUG_INFO("not in hex or decimal form.\n");
8369 return count;
8370 }
8371
8372 if ((ant >= 0) && (ant <= 2)) {
8373 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 8374 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY		 8375 } else
8376 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
8377
8378
8379 return count;
8380}
8381
8382static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
8383
8384static ssize_t show_status(struct device *d,
8385 struct device_attribute *attr, char *buf)
8386{
c79dd5b5 8387 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
bb8c093b 8388 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 8389 return -EAGAIN;
8390 return sprintf(buf, "0x%08x\n", (int)priv->status);
8391}
8392
8393static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
8394
8395static ssize_t dump_error_log(struct device *d,
8396 struct device_attribute *attr,
8397 const char *buf, size_t count)
8398{
8399 char *p = (char *)buf;
8400
8401 if (p[0] == '1')
c79dd5b5 8402 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 8403
8404 return strnlen(buf, count);
8405}
8406
8407static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
8408
8409static ssize_t dump_event_log(struct device *d,
8410 struct device_attribute *attr,
8411 const char *buf, size_t count)
8412{
8413 char *p = (char *)buf;
8414
8415 if (p[0] == '1')
c79dd5b5 8416 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 8417
8418 return strnlen(buf, count);
8419}
8420
8421static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
8422
8423/*****************************************************************************
8424 *
8425 * driver setup and teardown
8426 *
8427 *****************************************************************************/
8428
c79dd5b5 8429static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 8430{
8431 priv->workqueue = create_workqueue(DRV_NAME);
8432
8433 init_waitqueue_head(&priv->wait_command_queue);
8434
bb8c093b
CH		 8435 INIT_WORK(&priv->up, iwl4965_bg_up);
8436 INIT_WORK(&priv->restart, iwl4965_bg_restart);
8437 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
8438 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
8439 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
8440 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
8441 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
8442 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
8443 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
8444 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
8445 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
8446 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
8447
8448 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 8449
8450 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 8451 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 8452}
8453
c79dd5b5 8454static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 8455{
bb8c093b 8456 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 8457
3ae6a054 8458 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 8459 cancel_delayed_work(&priv->scan_check);
8460 cancel_delayed_work(&priv->alive_start);
8461 cancel_delayed_work(&priv->post_associate);
8462 cancel_work_sync(&priv->beacon_update);
8463}
8464
bb8c093b 8465static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 8466 &dev_attr_antenna.attr,
8467 &dev_attr_channels.attr,
8468 &dev_attr_dump_errors.attr,
8469 &dev_attr_dump_events.attr,
8470 &dev_attr_flags.attr,
8471 &dev_attr_filter_flags.attr,
c8b0e6e1 8472#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 8473 &dev_attr_measurement.attr,
8474#endif
8475 &dev_attr_power_level.attr,
8476 &dev_attr_retry_rate.attr,
8477 &dev_attr_rf_kill.attr,
8478 &dev_attr_rs_window.attr,
8479 &dev_attr_statistics.attr,
8480 &dev_attr_status.attr,
8481 &dev_attr_temperature.attr,
b481de9c
ZY		 8482 &dev_attr_tx_power.attr,
8483
8484 NULL
8485};
8486
bb8c093b 8487static struct attribute_group iwl4965_attribute_group = {
b481de9c 8488 .name = NULL, /* put in device directory */
bb8c093b 8489 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 8490};
8491
bb8c093b
CH		 8492static struct ieee80211_ops iwl4965_hw_ops = {
8493 .tx = iwl4965_mac_tx,
8494 .start = iwl4965_mac_start,
8495 .stop = iwl4965_mac_stop,
8496 .add_interface = iwl4965_mac_add_interface,
8497 .remove_interface = iwl4965_mac_remove_interface,
8498 .config = iwl4965_mac_config,
8499 .config_interface = iwl4965_mac_config_interface,
8500 .configure_filter = iwl4965_configure_filter,
8501 .set_key = iwl4965_mac_set_key,
8502 .get_stats = iwl4965_mac_get_stats,
8503 .get_tx_stats = iwl4965_mac_get_tx_stats,
8504 .conf_tx = iwl4965_mac_conf_tx,
8505 .get_tsf = iwl4965_mac_get_tsf,
8506 .reset_tsf = iwl4965_mac_reset_tsf,
8507 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 8508 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 8509#ifdef CONFIG_IWL4965_HT
bb8c093b 8510 .conf_ht = iwl4965_mac_conf_ht,
9ab46173 8511 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 8512#endif /* CONFIG_IWL4965_HT */
bb8c093b 8513 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 8514};
8515
bb8c093b 8516static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 8517{
8518 int err = 0;
c79dd5b5 8519 struct iwl_priv *priv;
b481de9c 8520 struct ieee80211_hw *hw;
82b9a121 8521 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
b481de9c 8522 int i;
5a66926a 8523 DECLARE_MAC_BUF(mac);
b481de9c 8524
6440adb5
BC		 8525 /* Disabling hardware scan means that mac80211 will perform scans
8526 * "the hard way", rather than using device's scan. */
bb8c093b 8527 if (iwl4965_param_disable_hw_scan) {
b481de9c 8528 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 8529 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 8530 }
8531
bb8c093b
CH		 8532 if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
8533 (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
b481de9c
ZY		 8534 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
8535 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
8536 err = -EINVAL;
8537 goto out;
8538 }
8539
8540 /* mac80211 allocates memory for this device instance, including
8541 * space for this driver's private structure */
c79dd5b5 8542 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl4965_hw_ops);
b481de9c
ZY		 8543 if (hw == NULL) {
8544 IWL_ERROR("Can not allocate network device\n");
8545 err = -ENOMEM;
8546 goto out;
8547 }
8548 SET_IEEE80211_DEV(hw, &pdev->dev);
8549
f51359a8
JB		 8550 hw->rate_control_algorithm = "iwl-4965-rs";
8551
b481de9c
ZY		 8552 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
8553 priv = hw->priv;
8554 priv->hw = hw;
82b9a121 8555 priv->cfg = cfg;
b481de9c
ZY		 8556
8557 priv->pci_dev = pdev;
bb8c093b 8558 priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
0a6857e7
TW		 8559#ifdef CONFIG_IWLWIFI_DEBUG
8560 iwl_debug_level = iwl4965_param_debug;
b481de9c
ZY		 8561 atomic_set(&priv->restrict_refcnt, 0);
8562#endif
8563 priv->retry_rate = 1;
8564
8565 priv->ibss_beacon = NULL;
8566
8567 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
8568 * the range of signal quality values that we'll provide.
8569 * Negative values for level/noise indicate that we'll provide dBm.
8570 * For WE, at least, non-0 values here *enable* display of values
8571 * in app (iwconfig). */
8572 hw->max_rssi = -20; /* signal level, negative indicates dBm */
8573 hw->max_noise = -20; /* noise level, negative indicates dBm */
8574 hw->max_signal = 100; /* link quality indication (%) */
8575
8576 /* Tell mac80211 our Tx characteristics */
8577 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
8578
6440adb5 8579 /* Default value; 4 EDCA QOS priorities */
b481de9c 8580 hw->queues = 4;
c8b0e6e1 8581#ifdef CONFIG_IWL4965_HT
6440adb5 8582 /* Enhanced value; more queues, to support 11n aggregation */
b481de9c 8583 hw->queues = 16;
c8b0e6e1 8584#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 8585
8586 spin_lock_init(&priv->lock);
8587 spin_lock_init(&priv->power_data.lock);
8588 spin_lock_init(&priv->sta_lock);
8589 spin_lock_init(&priv->hcmd_lock);
8590 spin_lock_init(&priv->lq_mngr.lock);
8591
8592 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8593 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8594
8595 INIT_LIST_HEAD(&priv->free_frames);
8596
8597 mutex_init(&priv->mutex);
8598 if (pci_enable_device(pdev)) {
8599 err = -ENODEV;
8600 goto out_ieee80211_free_hw;
8601 }
8602
8603 pci_set_master(pdev);
8604
6440adb5 8605 /* Clear the driver's (not device's) station table */
bb8c093b 8606 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 8607
8608 priv->data_retry_limit = -1;
8609 priv->ieee_channels = NULL;
8610 priv->ieee_rates = NULL;
8318d78a 8611 priv->band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 8612
8613 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8614 if (!err)
8615 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8616 if (err) {
8617 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8618 goto out_pci_disable_device;
8619 }
8620
8621 pci_set_drvdata(pdev, priv);
8622 err = pci_request_regions(pdev, DRV_NAME);
8623 if (err)
8624 goto out_pci_disable_device;
6440adb5 8625
b481de9c
ZY		 8626 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8627 * PCI Tx retries from interfering with C3 CPU state */
8628 pci_write_config_byte(pdev, 0x41, 0x00);
6440adb5 8629
b481de9c
ZY		 8630 priv->hw_base = pci_iomap(pdev, 0, 0);
8631 if (!priv->hw_base) {
8632 err = -ENODEV;
8633 goto out_pci_release_regions;
8634 }
8635
8636 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8637 (unsigned long long) pci_resource_len(pdev, 0));
8638 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8639
8640 /* Initialize module parameter values here */
8641
6440adb5 8642 /* Disable radio (SW RF KILL) via parameter when loading driver */
bb8c093b 8643 if (iwl4965_param_disable) {
b481de9c
ZY		 8644 set_bit(STATUS_RF_KILL_SW, &priv->status);
8645 IWL_DEBUG_INFO("Radio disabled.\n");
8646 }
8647
8648 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8649
8650 priv->ps_mode = 0;
8651 priv->use_ant_b_for_management_frame = 1; /* start with ant B */
b481de9c
ZY		 8652 priv->valid_antenna = 0x7; /* assume all 3 connected */
8653 priv->ps_mode = IWL_MIMO_PS_NONE;
b481de9c 8654
6440adb5 8655 /* Choose which receivers/antennas to use */
b481de9c
ZY		 8656 iwl4965_set_rxon_chain(priv);
8657
82b9a121 8658
b481de9c 8659 printk(KERN_INFO DRV_NAME
82b9a121 8660 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
b481de9c
ZY		 8661
8662 /* Device-specific setup */
bb8c093b 8663 if (iwl4965_hw_set_hw_setting(priv)) {
b481de9c 8664 IWL_ERROR("failed to set hw settings\n");
b481de9c
ZY		 8665 goto out_iounmap;
8666 }
8667
bb8c093b 8668 if (iwl4965_param_qos_enable)
b481de9c
ZY		 8669 priv->qos_data.qos_enable = 1;
8670
bb8c093b 8671 iwl4965_reset_qos(priv);
b481de9c
ZY		 8672
8673 priv->qos_data.qos_active = 0;
8674 priv->qos_data.qos_cap.val = 0;
b481de9c 8675
8318d78a 8676 iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
bb8c093b
CH		 8677 iwl4965_setup_deferred_work(priv);
8678 iwl4965_setup_rx_handlers(priv);
b481de9c
ZY		 8679
8680 priv->rates_mask = IWL_RATES_MASK;
8681 /* If power management is turned on, default to AC mode */
8682 priv->power_mode = IWL_POWER_AC;
8683 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8684
bb8c093b 8685 iwl4965_disable_interrupts(priv);
49df2b33 8686
bb8c093b 8687 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 8688 if (err) {
8689 IWL_ERROR("failed to create sysfs device attributes\n");
b481de9c
ZY		 8690 goto out_release_irq;
8691 }
8692
712b6cf5
TW		 8693 err = iwl_dbgfs_register(priv, DRV_NAME);
8694 if (err) {
8695 IWL_ERROR("failed to create debugfs files\n");
8696 goto out_remove_sysfs;
8697 }
5a66926a
ZY		 8698 /* nic init */
8699 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8700 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8701
8702 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8703 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
8704 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8705 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8706 if (err < 0) {
8707 IWL_DEBUG_INFO("Failed to init the card\n");
712b6cf5 8708 goto out_remove_dbgfs;
5a66926a
ZY		 8709 }
8710 /* Read the EEPROM */
6bc913bd 8711 err = iwl_eeprom_init(priv);
b481de9c 8712 if (err) {
5a66926a 8713 IWL_ERROR("Unable to init EEPROM\n");
712b6cf5 8714 goto out_remove_dbgfs;
b481de9c 8715 }
5a66926a 8716 /* MAC Address location in EEPROM same for 3945/4965 */
6bc913bd 8717 iwl_eeprom_get_mac(priv, priv->mac_addr);
5a66926a
ZY		 8718 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8719 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
b481de9c 8720
849e0dce
RC		 8721 err = iwl4965_init_channel_map(priv);
8722 if (err) {
8723 IWL_ERROR("initializing regulatory failed: %d\n", err);
712b6cf5 8724 goto out_remove_dbgfs;
849e0dce
RC		 8725 }
8726
8727 err = iwl4965_init_geos(priv);
8728 if (err) {
8729 IWL_ERROR("initializing geos failed: %d\n", err);
8730 goto out_free_channel_map;
8731 }
849e0dce 8732
5a66926a
ZY		 8733 iwl4965_rate_control_register(priv->hw);
8734 err = ieee80211_register_hw(priv->hw);
8735 if (err) {
8736 IWL_ERROR("Failed to register network device (error %d)\n", err);
849e0dce 8737 goto out_free_geos;
5a66926a 8738 }
b481de9c 8739
5a66926a
ZY		 8740 priv->hw->conf.beacon_int = 100;
8741 priv->mac80211_registered = 1;
8742 pci_save_state(pdev);
8743 pci_disable_device(pdev);
b481de9c
ZY		 8744
8745 return 0;
8746
849e0dce
RC		 8747 out_free_geos:
8748 iwl4965_free_geos(priv);
8749 out_free_channel_map:
8750 iwl4965_free_channel_map(priv);
712b6cf5
TW		 8751 out_remove_dbgfs:
8752 iwl_dbgfs_unregister(priv);
5a66926a 8753 out_remove_sysfs:
bb8c093b 8754 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c
ZY		 8755
8756 out_release_irq:
b481de9c
ZY		 8757 destroy_workqueue(priv->workqueue);
8758 priv->workqueue = NULL;
bb8c093b 8759 iwl4965_unset_hw_setting(priv);
b481de9c
ZY		 8760
8761 out_iounmap:
8762 pci_iounmap(pdev, priv->hw_base);
8763 out_pci_release_regions:
8764 pci_release_regions(pdev);
8765 out_pci_disable_device:
8766 pci_disable_device(pdev);
8767 pci_set_drvdata(pdev, NULL);
8768 out_ieee80211_free_hw:
8769 ieee80211_free_hw(priv->hw);
8770 out:
8771 return err;
8772}
8773
bb8c093b 8774static void iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 8775{
c79dd5b5 8776 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 8777 struct list_head *p, *q;
8778 int i;
8779
8780 if (!priv)
8781 return;
8782
8783 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8784
b481de9c 8785 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 8786
bb8c093b 8787 iwl4965_down(priv);
b481de9c
ZY		 8788
8789 /* Free MAC hash list for ADHOC */
8790 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8791 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8792 list_del(p);
bb8c093b 8793 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 8794 }
8795 }
8796
712b6cf5 8797 iwl_dbgfs_unregister(priv);
bb8c093b 8798 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 8799
bb8c093b 8800 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 8801
8802 if (priv->rxq.bd)
bb8c093b
CH		 8803 iwl4965_rx_queue_free(priv, &priv->rxq);
8804 iwl4965_hw_txq_ctx_free(priv);
b481de9c 8805
bb8c093b
CH		 8806 iwl4965_unset_hw_setting(priv);
8807 iwl4965_clear_stations_table(priv);
b481de9c
ZY		 8808
8809 if (priv->mac80211_registered) {
8810 ieee80211_unregister_hw(priv->hw);
bb8c093b 8811 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY		 8812 }
8813
948c171c
MA		 8814 /*netif_stop_queue(dev); */
8815 flush_workqueue(priv->workqueue);
8816
bb8c093b 8817 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 8818 * priv->workqueue... so we can't take down the workqueue
8819 * until now... */
8820 destroy_workqueue(priv->workqueue);
8821 priv->workqueue = NULL;
8822
b481de9c
ZY		 8823 pci_iounmap(pdev, priv->hw_base);
8824 pci_release_regions(pdev);
8825 pci_disable_device(pdev);
8826 pci_set_drvdata(pdev, NULL);
8827
849e0dce
RC		 8828 iwl4965_free_channel_map(priv);
8829 iwl4965_free_geos(priv);
b481de9c
ZY		 8830
8831 if (priv->ibss_beacon)
8832 dev_kfree_skb(priv->ibss_beacon);
8833
8834 ieee80211_free_hw(priv->hw);
8835}
8836
8837#ifdef CONFIG_PM
8838
bb8c093b 8839static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 8840{
c79dd5b5 8841 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8842
e655b9f0
ZY		 8843 if (priv->is_open) {
8844 set_bit(STATUS_IN_SUSPEND, &priv->status);
8845 iwl4965_mac_stop(priv->hw);
8846 priv->is_open = 1;
8847 }
b481de9c 8848
b481de9c
ZY		 8849 pci_set_power_state(pdev, PCI_D3hot);
8850
b481de9c
ZY		 8851 return 0;
8852}
8853
bb8c093b 8854static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 8855{
c79dd5b5 8856 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8857
b481de9c 8858 pci_set_power_state(pdev, PCI_D0);
b481de9c 8859
e655b9f0
ZY		 8860 if (priv->is_open)
8861 iwl4965_mac_start(priv->hw);
b481de9c 8862
e655b9f0 8863 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 8864 return 0;
8865}
8866
8867#endif /* CONFIG_PM */
8868
8869/*****************************************************************************
8870 *
8871 * driver and module entry point
8872 *
8873 *****************************************************************************/
8874
bb8c093b 8875static struct pci_driver iwl4965_driver = {
b481de9c 8876 .name = DRV_NAME,
bb8c093b
CH		 8877 .id_table = iwl4965_hw_card_ids,
8878 .probe = iwl4965_pci_probe,
8879 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 8880#ifdef CONFIG_PM
bb8c093b
CH		 8881 .suspend = iwl4965_pci_suspend,
8882 .resume = iwl4965_pci_resume,
b481de9c
ZY		 8883#endif
8884};
8885
bb8c093b 8886static int __init iwl4965_init(void)
b481de9c
ZY		 8887{
8888
8889 int ret;
8890 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8891 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
bb8c093b 8892 ret = pci_register_driver(&iwl4965_driver);
b481de9c
ZY		 8893 if (ret) {
8894 IWL_ERROR("Unable to initialize PCI module\n");
8895 return ret;
8896 }
0a6857e7 8897#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8898 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 8899 if (ret) {
8900 IWL_ERROR("Unable to create driver sysfs file\n");
bb8c093b 8901 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 8902 return ret;
8903 }
8904#endif
8905
8906 return ret;
8907}
8908
bb8c093b 8909static void __exit iwl4965_exit(void)
b481de9c 8910{
0a6857e7 8911#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8912 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c 8913#endif
bb8c093b 8914 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 8915}
8916
bb8c093b 8917module_param_named(antenna, iwl4965_param_antenna, int, 0444);
b481de9c 8918MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
bb8c093b 8919module_param_named(disable, iwl4965_param_disable, int, 0444);
b481de9c 8920MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
bb8c093b 8921module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
b481de9c
ZY		 8922MODULE_PARM_DESC(hwcrypto,
8923 "using hardware crypto engine (default 0 [software])\n");
bb8c093b 8924module_param_named(debug, iwl4965_param_debug, int, 0444);
b481de9c 8925MODULE_PARM_DESC(debug, "debug output mask");
bb8c093b 8926module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
b481de9c
ZY		 8927MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8928
bb8c093b 8929module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
b481de9c
ZY		 8930MODULE_PARM_DESC(queues_num, "number of hw queues.");
8931
8932/* QoS */
bb8c093b 8933module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
b481de9c 8934MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
9ee1ba47
RR		 8935module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
8936MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
b481de9c 8937
bb8c093b
CH		 8938module_exit(iwl4965_exit);
8939module_init(iwl4965_init);
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