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b481de9c ZY |
1 | /****************************************************************************** |
2 | * | |
eb7ae89c | 3 | * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved. |
b481de9c ZY |
4 | * |
5 | * Portions of this file are derived from the ipw3945 project, as well | |
6 | * as portions of the ieee80211 subsystem header files. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of version 2 of the GNU General Public License as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
20 | * | |
21 | * The full GNU General Public License is included in this distribution in the | |
22 | * file called LICENSE. | |
23 | * | |
24 | * Contact Information: | |
25 | * James P. Ketrenos <ipw2100-admin@linux.intel.com> | |
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
b481de9c ZY |
30 | #include <linux/kernel.h> |
31 | #include <linux/module.h> | |
32 | #include <linux/version.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/delay.h> | |
37 | #include <linux/skbuff.h> | |
38 | #include <linux/netdevice.h> | |
39 | #include <linux/wireless.h> | |
40 | #include <linux/firmware.h> | |
b481de9c ZY |
41 | #include <linux/etherdevice.h> |
42 | #include <linux/if_arp.h> | |
43 | ||
b481de9c ZY |
44 | #include <net/mac80211.h> |
45 | ||
46 | #include <asm/div64.h> | |
47 | ||
6bc913bd | 48 | #include "iwl-eeprom.h" |
b481de9c | 49 | #include "iwl-4965.h" |
fee1247a | 50 | #include "iwl-core.h" |
3395f6e9 | 51 | #include "iwl-io.h" |
b481de9c | 52 | #include "iwl-helpers.h" |
6974e363 | 53 | #include "iwl-sta.h" |
f0832f13 | 54 | #include "iwl-calib.h" |
b481de9c | 55 | |
c79dd5b5 | 56 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 57 | struct iwl4965_tx_queue *txq); |
416e1438 | 58 | |
b481de9c ZY |
59 | /****************************************************************************** |
60 | * | |
61 | * module boiler plate | |
62 | * | |
63 | ******************************************************************************/ | |
64 | ||
b481de9c ZY |
65 | /* |
66 | * module name, copyright, version, etc. | |
67 | * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk | |
68 | */ | |
69 | ||
70 | #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux" | |
71 | ||
0a6857e7 | 72 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
73 | #define VD "d" |
74 | #else | |
75 | #define VD | |
76 | #endif | |
77 | ||
c8b0e6e1 | 78 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
79 | #define VS "s" |
80 | #else | |
81 | #define VS | |
82 | #endif | |
83 | ||
df48c323 | 84 | #define DRV_VERSION IWLWIFI_VERSION VD VS |
b481de9c | 85 | |
b481de9c ZY |
86 | |
87 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | |
88 | MODULE_VERSION(DRV_VERSION); | |
89 | MODULE_AUTHOR(DRV_COPYRIGHT); | |
90 | MODULE_LICENSE("GPL"); | |
91 | ||
92 | __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr) | |
93 | { | |
94 | u16 fc = le16_to_cpu(hdr->frame_control); | |
95 | int hdr_len = ieee80211_get_hdrlen(fc); | |
96 | ||
97 | if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA)) | |
98 | return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN); | |
99 | return NULL; | |
100 | } | |
101 | ||
8318d78a | 102 | static const struct ieee80211_supported_band *iwl4965_get_hw_mode( |
c79dd5b5 | 103 | struct iwl_priv *priv, enum ieee80211_band band) |
b481de9c | 104 | { |
8318d78a | 105 | return priv->hw->wiphy->bands[band]; |
b481de9c ZY |
106 | } |
107 | ||
bb8c093b | 108 | static int iwl4965_is_empty_essid(const char *essid, int essid_len) |
b481de9c ZY |
109 | { |
110 | /* Single white space is for Linksys APs */ | |
111 | if (essid_len == 1 && essid[0] == ' ') | |
112 | return 1; | |
113 | ||
114 | /* Otherwise, if the entire essid is 0, we assume it is hidden */ | |
115 | while (essid_len) { | |
116 | essid_len--; | |
117 | if (essid[essid_len] != '\0') | |
118 | return 0; | |
119 | } | |
120 | ||
121 | return 1; | |
122 | } | |
123 | ||
bb8c093b | 124 | static const char *iwl4965_escape_essid(const char *essid, u8 essid_len) |
b481de9c ZY |
125 | { |
126 | static char escaped[IW_ESSID_MAX_SIZE * 2 + 1]; | |
127 | const char *s = essid; | |
128 | char *d = escaped; | |
129 | ||
bb8c093b | 130 | if (iwl4965_is_empty_essid(essid, essid_len)) { |
b481de9c ZY |
131 | memcpy(escaped, "<hidden>", sizeof("<hidden>")); |
132 | return escaped; | |
133 | } | |
134 | ||
135 | essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE); | |
136 | while (essid_len--) { | |
137 | if (*s == '\0') { | |
138 | *d++ = '\\'; | |
139 | *d++ = '0'; | |
140 | s++; | |
141 | } else | |
142 | *d++ = *s++; | |
143 | } | |
144 | *d = '\0'; | |
145 | return escaped; | |
146 | } | |
147 | ||
b481de9c ZY |
148 | /*************** DMA-QUEUE-GENERAL-FUNCTIONS ***** |
149 | * DMA services | |
150 | * | |
151 | * Theory of operation | |
152 | * | |
6440adb5 BC |
153 | * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer |
154 | * of buffer descriptors, each of which points to one or more data buffers for | |
155 | * the device to read from or fill. Driver and device exchange status of each | |
156 | * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty | |
157 | * entries in each circular buffer, to protect against confusing empty and full | |
158 | * queue states. | |
159 | * | |
160 | * The device reads or writes the data in the queues via the device's several | |
161 | * DMA/FIFO channels. Each queue is mapped to a single DMA channel. | |
b481de9c ZY |
162 | * |
163 | * For Tx queue, there are low mark and high mark limits. If, after queuing | |
164 | * the packet for Tx, free space become < low mark, Tx queue stopped. When | |
165 | * reclaiming packets (on 'tx done IRQ), if free space become > high mark, | |
166 | * Tx queue resumed. | |
167 | * | |
6440adb5 BC |
168 | * The 4965 operates with up to 17 queues: One receive queue, one transmit |
169 | * queue (#4) for sending commands to the device firmware, and 15 other | |
170 | * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels. | |
e3851447 BC |
171 | * |
172 | * See more detailed info in iwl-4965-hw.h. | |
b481de9c ZY |
173 | ***************************************************/ |
174 | ||
fe01b477 | 175 | int iwl4965_queue_space(const struct iwl4965_queue *q) |
b481de9c | 176 | { |
fc4b6853 | 177 | int s = q->read_ptr - q->write_ptr; |
b481de9c | 178 | |
fc4b6853 | 179 | if (q->read_ptr > q->write_ptr) |
b481de9c ZY |
180 | s -= q->n_bd; |
181 | ||
182 | if (s <= 0) | |
183 | s += q->n_window; | |
184 | /* keep some reserve to not confuse empty and full situations */ | |
185 | s -= 2; | |
186 | if (s < 0) | |
187 | s = 0; | |
188 | return s; | |
189 | } | |
190 | ||
b481de9c | 191 | |
bb8c093b | 192 | static inline int x2_queue_used(const struct iwl4965_queue *q, int i) |
b481de9c | 193 | { |
fc4b6853 TW |
194 | return q->write_ptr > q->read_ptr ? |
195 | (i >= q->read_ptr && i < q->write_ptr) : | |
196 | !(i < q->read_ptr && i >= q->write_ptr); | |
b481de9c ZY |
197 | } |
198 | ||
bb8c093b | 199 | static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge) |
b481de9c | 200 | { |
6440adb5 | 201 | /* This is for scan command, the big buffer at end of command array */ |
b481de9c | 202 | if (is_huge) |
6440adb5 | 203 | return q->n_window; /* must be power of 2 */ |
b481de9c | 204 | |
6440adb5 | 205 | /* Otherwise, use normal size buffers */ |
b481de9c ZY |
206 | return index & (q->n_window - 1); |
207 | } | |
208 | ||
6440adb5 BC |
209 | /** |
210 | * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes | |
211 | */ | |
c79dd5b5 | 212 | static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q, |
b481de9c ZY |
213 | int count, int slots_num, u32 id) |
214 | { | |
215 | q->n_bd = count; | |
216 | q->n_window = slots_num; | |
217 | q->id = id; | |
218 | ||
c54b679d TW |
219 | /* count must be power-of-two size, otherwise iwl_queue_inc_wrap |
220 | * and iwl_queue_dec_wrap are broken. */ | |
b481de9c ZY |
221 | BUG_ON(!is_power_of_2(count)); |
222 | ||
223 | /* slots_num must be power-of-two size, otherwise | |
224 | * get_cmd_index is broken. */ | |
225 | BUG_ON(!is_power_of_2(slots_num)); | |
226 | ||
227 | q->low_mark = q->n_window / 4; | |
228 | if (q->low_mark < 4) | |
229 | q->low_mark = 4; | |
230 | ||
231 | q->high_mark = q->n_window / 8; | |
232 | if (q->high_mark < 2) | |
233 | q->high_mark = 2; | |
234 | ||
fc4b6853 | 235 | q->write_ptr = q->read_ptr = 0; |
b481de9c ZY |
236 | |
237 | return 0; | |
238 | } | |
239 | ||
6440adb5 BC |
240 | /** |
241 | * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue | |
242 | */ | |
c79dd5b5 | 243 | static int iwl4965_tx_queue_alloc(struct iwl_priv *priv, |
bb8c093b | 244 | struct iwl4965_tx_queue *txq, u32 id) |
b481de9c ZY |
245 | { |
246 | struct pci_dev *dev = priv->pci_dev; | |
247 | ||
6440adb5 BC |
248 | /* Driver private data, only for Tx (not command) queues, |
249 | * not shared with device. */ | |
b481de9c ZY |
250 | if (id != IWL_CMD_QUEUE_NUM) { |
251 | txq->txb = kmalloc(sizeof(txq->txb[0]) * | |
252 | TFD_QUEUE_SIZE_MAX, GFP_KERNEL); | |
253 | if (!txq->txb) { | |
01ebd063 | 254 | IWL_ERROR("kmalloc for auxiliary BD " |
b481de9c ZY |
255 | "structures failed\n"); |
256 | goto error; | |
257 | } | |
258 | } else | |
259 | txq->txb = NULL; | |
260 | ||
6440adb5 BC |
261 | /* Circular buffer of transmit frame descriptors (TFDs), |
262 | * shared with device */ | |
b481de9c ZY |
263 | txq->bd = pci_alloc_consistent(dev, |
264 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX, | |
265 | &txq->q.dma_addr); | |
266 | ||
267 | if (!txq->bd) { | |
268 | IWL_ERROR("pci_alloc_consistent(%zd) failed\n", | |
269 | sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX); | |
270 | goto error; | |
271 | } | |
272 | txq->q.id = id; | |
273 | ||
274 | return 0; | |
275 | ||
276 | error: | |
277 | if (txq->txb) { | |
278 | kfree(txq->txb); | |
279 | txq->txb = NULL; | |
280 | } | |
281 | ||
282 | return -ENOMEM; | |
283 | } | |
284 | ||
8b6eaea8 BC |
285 | /** |
286 | * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue | |
287 | */ | |
c79dd5b5 | 288 | int iwl4965_tx_queue_init(struct iwl_priv *priv, |
bb8c093b | 289 | struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id) |
b481de9c ZY |
290 | { |
291 | struct pci_dev *dev = priv->pci_dev; | |
292 | int len; | |
293 | int rc = 0; | |
294 | ||
8b6eaea8 BC |
295 | /* |
296 | * Alloc buffer array for commands (Tx or other types of commands). | |
297 | * For the command queue (#4), allocate command space + one big | |
298 | * command for scan, since scan command is very huge; the system will | |
299 | * not have two scans at the same time, so only one is needed. | |
bb54244b | 300 | * For normal Tx queues (all other queues), no super-size command |
8b6eaea8 BC |
301 | * space is needed. |
302 | */ | |
857485c0 | 303 | len = sizeof(struct iwl_cmd) * slots_num; |
b481de9c ZY |
304 | if (txq_id == IWL_CMD_QUEUE_NUM) |
305 | len += IWL_MAX_SCAN_SIZE; | |
306 | txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd); | |
307 | if (!txq->cmd) | |
308 | return -ENOMEM; | |
309 | ||
8b6eaea8 | 310 | /* Alloc driver data array and TFD circular buffer */ |
bb8c093b | 311 | rc = iwl4965_tx_queue_alloc(priv, txq, txq_id); |
b481de9c ZY |
312 | if (rc) { |
313 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); | |
314 | ||
315 | return -ENOMEM; | |
316 | } | |
317 | txq->need_update = 0; | |
318 | ||
319 | /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise | |
c54b679d | 320 | * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ |
b481de9c | 321 | BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1)); |
8b6eaea8 BC |
322 | |
323 | /* Initialize queue's high/low-water marks, and head/tail indexes */ | |
bb8c093b | 324 | iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); |
b481de9c | 325 | |
8b6eaea8 | 326 | /* Tell device where to find queue */ |
bb8c093b | 327 | iwl4965_hw_tx_queue_init(priv, txq); |
b481de9c ZY |
328 | |
329 | return 0; | |
330 | } | |
331 | ||
332 | /** | |
bb8c093b | 333 | * iwl4965_tx_queue_free - Deallocate DMA queue. |
b481de9c ZY |
334 | * @txq: Transmit queue to deallocate. |
335 | * | |
336 | * Empty queue by removing and destroying all BD's. | |
6440adb5 BC |
337 | * Free all buffers. |
338 | * 0-fill, but do not free "txq" descriptor structure. | |
b481de9c | 339 | */ |
c79dd5b5 | 340 | void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq) |
b481de9c | 341 | { |
bb8c093b | 342 | struct iwl4965_queue *q = &txq->q; |
b481de9c ZY |
343 | struct pci_dev *dev = priv->pci_dev; |
344 | int len; | |
345 | ||
346 | if (q->n_bd == 0) | |
347 | return; | |
348 | ||
349 | /* first, empty all BD's */ | |
fc4b6853 | 350 | for (; q->write_ptr != q->read_ptr; |
c54b679d | 351 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) |
bb8c093b | 352 | iwl4965_hw_txq_free_tfd(priv, txq); |
b481de9c | 353 | |
857485c0 | 354 | len = sizeof(struct iwl_cmd) * q->n_window; |
b481de9c ZY |
355 | if (q->id == IWL_CMD_QUEUE_NUM) |
356 | len += IWL_MAX_SCAN_SIZE; | |
357 | ||
6440adb5 | 358 | /* De-alloc array of command/tx buffers */ |
b481de9c ZY |
359 | pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd); |
360 | ||
6440adb5 | 361 | /* De-alloc circular buffer of TFDs */ |
b481de9c | 362 | if (txq->q.n_bd) |
bb8c093b | 363 | pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) * |
b481de9c ZY |
364 | txq->q.n_bd, txq->bd, txq->q.dma_addr); |
365 | ||
6440adb5 | 366 | /* De-alloc array of per-TFD driver data */ |
b481de9c ZY |
367 | if (txq->txb) { |
368 | kfree(txq->txb); | |
369 | txq->txb = NULL; | |
370 | } | |
371 | ||
6440adb5 | 372 | /* 0-fill queue descriptor structure */ |
b481de9c ZY |
373 | memset(txq, 0, sizeof(*txq)); |
374 | } | |
375 | ||
bb8c093b | 376 | const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; |
b481de9c ZY |
377 | |
378 | /*************** STATION TABLE MANAGEMENT **** | |
9fbab516 | 379 | * mac80211 should be examined to determine if sta_info is duplicating |
b481de9c ZY |
380 | * the functionality provided here |
381 | */ | |
382 | ||
383 | /**************************************************************/ | |
384 | ||
01ebd063 | 385 | #if 0 /* temporary disable till we add real remove station */ |
6440adb5 BC |
386 | /** |
387 | * iwl4965_remove_station - Remove driver's knowledge of station. | |
388 | * | |
389 | * NOTE: This does not remove station from device's station table. | |
390 | */ | |
c79dd5b5 | 391 | static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap) |
b481de9c ZY |
392 | { |
393 | int index = IWL_INVALID_STATION; | |
394 | int i; | |
395 | unsigned long flags; | |
396 | ||
397 | spin_lock_irqsave(&priv->sta_lock, flags); | |
398 | ||
399 | if (is_ap) | |
400 | index = IWL_AP_ID; | |
401 | else if (is_broadcast_ether_addr(addr)) | |
5425e490 | 402 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 403 | else |
5425e490 | 404 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) |
b481de9c ZY |
405 | if (priv->stations[i].used && |
406 | !compare_ether_addr(priv->stations[i].sta.sta.addr, | |
407 | addr)) { | |
408 | index = i; | |
409 | break; | |
410 | } | |
411 | ||
412 | if (unlikely(index == IWL_INVALID_STATION)) | |
413 | goto out; | |
414 | ||
415 | if (priv->stations[index].used) { | |
416 | priv->stations[index].used = 0; | |
417 | priv->num_stations--; | |
418 | } | |
419 | ||
420 | BUG_ON(priv->num_stations < 0); | |
421 | ||
422 | out: | |
423 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
424 | return 0; | |
425 | } | |
556f8db7 | 426 | #endif |
b481de9c | 427 | |
6440adb5 BC |
428 | /** |
429 | * iwl4965_add_station_flags - Add station to tables in driver and device | |
430 | */ | |
c79dd5b5 | 431 | u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr, |
67d62035 | 432 | int is_ap, u8 flags, void *ht_data) |
b481de9c ZY |
433 | { |
434 | int i; | |
435 | int index = IWL_INVALID_STATION; | |
bb8c093b | 436 | struct iwl4965_station_entry *station; |
b481de9c | 437 | unsigned long flags_spin; |
0795af57 | 438 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
439 | |
440 | spin_lock_irqsave(&priv->sta_lock, flags_spin); | |
441 | if (is_ap) | |
442 | index = IWL_AP_ID; | |
443 | else if (is_broadcast_ether_addr(addr)) | |
5425e490 | 444 | index = priv->hw_params.bcast_sta_id; |
b481de9c | 445 | else |
5425e490 | 446 | for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) { |
b481de9c ZY |
447 | if (!compare_ether_addr(priv->stations[i].sta.sta.addr, |
448 | addr)) { | |
449 | index = i; | |
450 | break; | |
451 | } | |
452 | ||
453 | if (!priv->stations[i].used && | |
454 | index == IWL_INVALID_STATION) | |
455 | index = i; | |
456 | } | |
457 | ||
458 | ||
9fbab516 BC |
459 | /* These two conditions have the same outcome, but keep them separate |
460 | since they have different meanings */ | |
b481de9c ZY |
461 | if (unlikely(index == IWL_INVALID_STATION)) { |
462 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
463 | return index; | |
464 | } | |
465 | ||
466 | if (priv->stations[index].used && | |
467 | !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) { | |
468 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
469 | return index; | |
470 | } | |
471 | ||
472 | ||
0795af57 | 473 | IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr)); |
b481de9c ZY |
474 | station = &priv->stations[index]; |
475 | station->used = 1; | |
476 | priv->num_stations++; | |
477 | ||
6440adb5 | 478 | /* Set up the REPLY_ADD_STA command to send to device */ |
bb8c093b | 479 | memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd)); |
b481de9c ZY |
480 | memcpy(station->sta.sta.addr, addr, ETH_ALEN); |
481 | station->sta.mode = 0; | |
482 | station->sta.sta.sta_id = index; | |
483 | station->sta.station_flags = 0; | |
484 | ||
c8b0e6e1 | 485 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 486 | /* BCAST station and IBSS stations do not work in HT mode */ |
5425e490 | 487 | if (index != priv->hw_params.bcast_sta_id && |
b481de9c | 488 | priv->iw_mode != IEEE80211_IF_TYPE_IBSS) |
67d62035 RR |
489 | iwl4965_set_ht_add_station(priv, index, |
490 | (struct ieee80211_ht_info *) ht_data); | |
c8b0e6e1 | 491 | #endif /*CONFIG_IWL4965_HT*/ |
b481de9c ZY |
492 | |
493 | spin_unlock_irqrestore(&priv->sta_lock, flags_spin); | |
6440adb5 BC |
494 | |
495 | /* Add station to device's station table */ | |
bb8c093b | 496 | iwl4965_send_add_station(priv, &station->sta, flags); |
b481de9c ZY |
497 | return index; |
498 | ||
499 | } | |
500 | ||
b481de9c | 501 | |
b481de9c ZY |
502 | |
503 | /*************** HOST COMMAND QUEUE FUNCTIONS *****/ | |
504 | ||
b481de9c | 505 | /** |
bb8c093b | 506 | * iwl4965_enqueue_hcmd - enqueue a uCode command |
b481de9c ZY |
507 | * @priv: device private data point |
508 | * @cmd: a point to the ucode command structure | |
509 | * | |
510 | * The function returns < 0 values to indicate the operation is | |
511 | * failed. On success, it turns the index (> 0) of command in the | |
512 | * command queue. | |
513 | */ | |
857485c0 | 514 | int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) |
b481de9c | 515 | { |
bb8c093b CH |
516 | struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; |
517 | struct iwl4965_queue *q = &txq->q; | |
518 | struct iwl4965_tfd_frame *tfd; | |
b481de9c | 519 | u32 *control_flags; |
857485c0 | 520 | struct iwl_cmd *out_cmd; |
b481de9c ZY |
521 | u32 idx; |
522 | u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr)); | |
523 | dma_addr_t phys_addr; | |
524 | int ret; | |
525 | unsigned long flags; | |
526 | ||
527 | /* If any of the command structures end up being larger than | |
528 | * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then | |
529 | * we will need to increase the size of the TFD entries */ | |
530 | BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && | |
531 | !(cmd->meta.flags & CMD_SIZE_HUGE)); | |
532 | ||
fee1247a | 533 | if (iwl_is_rfkill(priv)) { |
c342a1b9 GG |
534 | IWL_DEBUG_INFO("Not sending command - RF KILL"); |
535 | return -EIO; | |
536 | } | |
537 | ||
bb8c093b | 538 | if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) { |
b481de9c ZY |
539 | IWL_ERROR("No space for Tx\n"); |
540 | return -ENOSPC; | |
541 | } | |
542 | ||
543 | spin_lock_irqsave(&priv->hcmd_lock, flags); | |
544 | ||
fc4b6853 | 545 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
546 | memset(tfd, 0, sizeof(*tfd)); |
547 | ||
548 | control_flags = (u32 *) tfd; | |
549 | ||
fc4b6853 | 550 | idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE); |
b481de9c ZY |
551 | out_cmd = &txq->cmd[idx]; |
552 | ||
553 | out_cmd->hdr.cmd = cmd->id; | |
554 | memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta)); | |
555 | memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len); | |
556 | ||
557 | /* At this point, the out_cmd now has all of the incoming cmd | |
558 | * information */ | |
559 | ||
560 | out_cmd->hdr.flags = 0; | |
561 | out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) | | |
fc4b6853 | 562 | INDEX_TO_SEQ(q->write_ptr)); |
b481de9c ZY |
563 | if (out_cmd->meta.flags & CMD_SIZE_HUGE) |
564 | out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME); | |
565 | ||
566 | phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx + | |
857485c0 | 567 | offsetof(struct iwl_cmd, hdr); |
bb8c093b | 568 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size); |
b481de9c ZY |
569 | |
570 | IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, " | |
571 | "%d bytes at %d[%d]:%d\n", | |
572 | get_cmd_string(out_cmd->hdr.cmd), | |
573 | out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence), | |
fc4b6853 | 574 | fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM); |
b481de9c ZY |
575 | |
576 | txq->need_update = 1; | |
6440adb5 BC |
577 | |
578 | /* Set up entry in queue's byte count circular buffer */ | |
e2a722eb | 579 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0); |
6440adb5 BC |
580 | |
581 | /* Increment and update queue's write index */ | |
c54b679d | 582 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
e2a722eb | 583 | ret = iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
584 | |
585 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | |
586 | return ret ? ret : idx; | |
587 | } | |
588 | ||
deb09c43 EG |
589 | static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt) |
590 | { | |
591 | struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon; | |
592 | ||
593 | if (hw_decrypt) | |
594 | rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK; | |
595 | else | |
596 | rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK; | |
597 | ||
598 | } | |
599 | ||
b481de9c | 600 | /** |
bb8c093b | 601 | * iwl4965_rxon_add_station - add station into station table. |
b481de9c ZY |
602 | * |
603 | * there is only one AP station with id= IWL_AP_ID | |
9fbab516 BC |
604 | * NOTE: mutex must be held before calling this fnction |
605 | */ | |
c79dd5b5 | 606 | static int iwl4965_rxon_add_station(struct iwl_priv *priv, |
b481de9c ZY |
607 | const u8 *addr, int is_ap) |
608 | { | |
556f8db7 | 609 | u8 sta_id; |
b481de9c | 610 | |
6440adb5 | 611 | /* Add station to device's station table */ |
67d62035 RR |
612 | #ifdef CONFIG_IWL4965_HT |
613 | struct ieee80211_conf *conf = &priv->hw->conf; | |
614 | struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf; | |
615 | ||
616 | if ((is_ap) && | |
617 | (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) && | |
618 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) | |
619 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
620 | 0, cur_ht_config); | |
621 | else | |
622 | #endif /* CONFIG_IWL4965_HT */ | |
623 | sta_id = iwl4965_add_station_flags(priv, addr, is_ap, | |
624 | 0, NULL); | |
6440adb5 BC |
625 | |
626 | /* Set up default rate scaling table in device's station table */ | |
b481de9c ZY |
627 | iwl4965_add_station(priv, addr, is_ap); |
628 | ||
556f8db7 | 629 | return sta_id; |
b481de9c ZY |
630 | } |
631 | ||
b481de9c | 632 | /** |
bb8c093b | 633 | * iwl4965_check_rxon_cmd - validate RXON structure is valid |
b481de9c ZY |
634 | * |
635 | * NOTE: This is really only useful during development and can eventually | |
636 | * be #ifdef'd out once the driver is stable and folks aren't actively | |
637 | * making changes | |
638 | */ | |
bb8c093b | 639 | static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c ZY |
640 | { |
641 | int error = 0; | |
642 | int counter = 1; | |
643 | ||
644 | if (rxon->flags & RXON_FLG_BAND_24G_MSK) { | |
645 | error |= le32_to_cpu(rxon->flags & | |
646 | (RXON_FLG_TGJ_NARROW_BAND_MSK | | |
647 | RXON_FLG_RADAR_DETECT_MSK)); | |
648 | if (error) | |
649 | IWL_WARNING("check 24G fields %d | %d\n", | |
650 | counter++, error); | |
651 | } else { | |
652 | error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ? | |
653 | 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK); | |
654 | if (error) | |
655 | IWL_WARNING("check 52 fields %d | %d\n", | |
656 | counter++, error); | |
657 | error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK); | |
658 | if (error) | |
659 | IWL_WARNING("check 52 CCK %d | %d\n", | |
660 | counter++, error); | |
661 | } | |
662 | error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1; | |
663 | if (error) | |
664 | IWL_WARNING("check mac addr %d | %d\n", counter++, error); | |
665 | ||
666 | /* make sure basic rates 6Mbps and 1Mbps are supported */ | |
667 | error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) && | |
668 | ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0)); | |
669 | if (error) | |
670 | IWL_WARNING("check basic rate %d | %d\n", counter++, error); | |
671 | ||
672 | error |= (le16_to_cpu(rxon->assoc_id) > 2007); | |
673 | if (error) | |
674 | IWL_WARNING("check assoc id %d | %d\n", counter++, error); | |
675 | ||
676 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) | |
677 | == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)); | |
678 | if (error) | |
679 | IWL_WARNING("check CCK and short slot %d | %d\n", | |
680 | counter++, error); | |
681 | ||
682 | error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) | |
683 | == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)); | |
684 | if (error) | |
685 | IWL_WARNING("check CCK & auto detect %d | %d\n", | |
686 | counter++, error); | |
687 | ||
688 | error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK | | |
689 | RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK); | |
690 | if (error) | |
691 | IWL_WARNING("check TGG and auto detect %d | %d\n", | |
692 | counter++, error); | |
693 | ||
694 | if (error) | |
695 | IWL_WARNING("Tuning to channel %d\n", | |
696 | le16_to_cpu(rxon->channel)); | |
697 | ||
698 | if (error) { | |
bb8c093b | 699 | IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n"); |
b481de9c ZY |
700 | return -1; |
701 | } | |
702 | return 0; | |
703 | } | |
704 | ||
705 | /** | |
9fbab516 | 706 | * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed |
01ebd063 | 707 | * @priv: staging_rxon is compared to active_rxon |
b481de9c | 708 | * |
9fbab516 BC |
709 | * If the RXON structure is changing enough to require a new tune, |
710 | * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that | |
711 | * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required. | |
b481de9c | 712 | */ |
c79dd5b5 | 713 | static int iwl4965_full_rxon_required(struct iwl_priv *priv) |
b481de9c ZY |
714 | { |
715 | ||
716 | /* These items are only settable from the full RXON command */ | |
717 | if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) || | |
718 | compare_ether_addr(priv->staging_rxon.bssid_addr, | |
719 | priv->active_rxon.bssid_addr) || | |
720 | compare_ether_addr(priv->staging_rxon.node_addr, | |
721 | priv->active_rxon.node_addr) || | |
722 | compare_ether_addr(priv->staging_rxon.wlap_bssid_addr, | |
723 | priv->active_rxon.wlap_bssid_addr) || | |
724 | (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) || | |
725 | (priv->staging_rxon.channel != priv->active_rxon.channel) || | |
726 | (priv->staging_rxon.air_propagation != | |
727 | priv->active_rxon.air_propagation) || | |
728 | (priv->staging_rxon.ofdm_ht_single_stream_basic_rates != | |
729 | priv->active_rxon.ofdm_ht_single_stream_basic_rates) || | |
730 | (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates != | |
731 | priv->active_rxon.ofdm_ht_dual_stream_basic_rates) || | |
732 | (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) || | |
733 | (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id)) | |
734 | return 1; | |
735 | ||
736 | /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can | |
737 | * be updated with the RXON_ASSOC command -- however only some | |
738 | * flag transitions are allowed using RXON_ASSOC */ | |
739 | ||
740 | /* Check if we are not switching bands */ | |
741 | if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) != | |
742 | (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)) | |
743 | return 1; | |
744 | ||
745 | /* Check if we are switching association toggle */ | |
746 | if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) != | |
747 | (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) | |
748 | return 1; | |
749 | ||
750 | return 0; | |
751 | } | |
752 | ||
b481de9c | 753 | /** |
bb8c093b | 754 | * iwl4965_commit_rxon - commit staging_rxon to hardware |
b481de9c | 755 | * |
01ebd063 | 756 | * The RXON command in staging_rxon is committed to the hardware and |
b481de9c ZY |
757 | * the active_rxon structure is updated with the new data. This |
758 | * function correctly transitions out of the RXON_ASSOC_MSK state if | |
759 | * a HW tune is required based on the RXON structure changes. | |
760 | */ | |
c79dd5b5 | 761 | static int iwl4965_commit_rxon(struct iwl_priv *priv) |
b481de9c ZY |
762 | { |
763 | /* cast away the const for active_rxon in this function */ | |
bb8c093b | 764 | struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon; |
0795af57 | 765 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
766 | int rc = 0; |
767 | ||
fee1247a | 768 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
769 | return -1; |
770 | ||
771 | /* always get timestamp with Rx frame */ | |
772 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | |
773 | ||
bb8c093b | 774 | rc = iwl4965_check_rxon_cmd(&priv->staging_rxon); |
b481de9c ZY |
775 | if (rc) { |
776 | IWL_ERROR("Invalid RXON configuration. Not committing.\n"); | |
777 | return -EINVAL; | |
778 | } | |
779 | ||
780 | /* If we don't need to send a full RXON, we can use | |
bb8c093b | 781 | * iwl4965_rxon_assoc_cmd which is used to reconfigure filter |
b481de9c | 782 | * and other flags for the current radio configuration. */ |
bb8c093b | 783 | if (!iwl4965_full_rxon_required(priv)) { |
7e8c519e | 784 | rc = iwl_send_rxon_assoc(priv); |
b481de9c ZY |
785 | if (rc) { |
786 | IWL_ERROR("Error setting RXON_ASSOC " | |
787 | "configuration (%d).\n", rc); | |
788 | return rc; | |
789 | } | |
790 | ||
791 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
792 | ||
793 | return 0; | |
794 | } | |
795 | ||
796 | /* station table will be cleared */ | |
797 | priv->assoc_station_added = 0; | |
798 | ||
b481de9c ZY |
799 | /* If we are currently associated and the new config requires |
800 | * an RXON_ASSOC and the new config wants the associated mask enabled, | |
801 | * we must clear the associated from the active configuration | |
802 | * before we apply the new config */ | |
3109ece1 | 803 | if (iwl_is_associated(priv) && |
b481de9c ZY |
804 | (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) { |
805 | IWL_DEBUG_INFO("Toggling associated bit on current RXON\n"); | |
806 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
807 | ||
857485c0 | 808 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 809 | sizeof(struct iwl4965_rxon_cmd), |
b481de9c ZY |
810 | &priv->active_rxon); |
811 | ||
812 | /* If the mask clearing failed then we set | |
813 | * active_rxon back to what it was previously */ | |
814 | if (rc) { | |
815 | active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK; | |
816 | IWL_ERROR("Error clearing ASSOC_MSK on current " | |
817 | "configuration (%d).\n", rc); | |
818 | return rc; | |
819 | } | |
b481de9c ZY |
820 | } |
821 | ||
822 | IWL_DEBUG_INFO("Sending RXON\n" | |
823 | "* with%s RXON_FILTER_ASSOC_MSK\n" | |
824 | "* channel = %d\n" | |
0795af57 | 825 | "* bssid = %s\n", |
b481de9c ZY |
826 | ((priv->staging_rxon.filter_flags & |
827 | RXON_FILTER_ASSOC_MSK) ? "" : "out"), | |
828 | le16_to_cpu(priv->staging_rxon.channel), | |
0795af57 | 829 | print_mac(mac, priv->staging_rxon.bssid_addr)); |
b481de9c | 830 | |
099b40b7 | 831 | iwl4965_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto); |
b481de9c | 832 | /* Apply the new configuration */ |
857485c0 | 833 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON, |
bb8c093b | 834 | sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon); |
b481de9c ZY |
835 | if (rc) { |
836 | IWL_ERROR("Error setting new configuration (%d).\n", rc); | |
837 | return rc; | |
838 | } | |
839 | ||
bf85ea4f | 840 | iwlcore_clear_stations_table(priv); |
556f8db7 | 841 | |
b481de9c ZY |
842 | if (!priv->error_recovering) |
843 | priv->start_calib = 0; | |
844 | ||
f0832f13 | 845 | iwl_init_sensitivity(priv); |
b481de9c ZY |
846 | |
847 | memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); | |
848 | ||
849 | /* If we issue a new RXON command which required a tune then we must | |
850 | * send a new TXPOWER command or we won't be able to Tx any frames */ | |
bb8c093b | 851 | rc = iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
852 | if (rc) { |
853 | IWL_ERROR("Error setting Tx power (%d).\n", rc); | |
854 | return rc; | |
855 | } | |
856 | ||
857 | /* Add the broadcast address so we can send broadcast frames */ | |
bb8c093b | 858 | if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) == |
b481de9c ZY |
859 | IWL_INVALID_STATION) { |
860 | IWL_ERROR("Error adding BROADCAST address for transmit.\n"); | |
861 | return -EIO; | |
862 | } | |
863 | ||
864 | /* If we have set the ASSOC_MSK and we are in BSS mode then | |
865 | * add the IWL_AP_ID to the station rate table */ | |
3109ece1 | 866 | if (iwl_is_associated(priv) && |
b481de9c | 867 | (priv->iw_mode == IEEE80211_IF_TYPE_STA)) { |
bb8c093b | 868 | if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1) |
b481de9c ZY |
869 | == IWL_INVALID_STATION) { |
870 | IWL_ERROR("Error adding AP address for transmit.\n"); | |
871 | return -EIO; | |
872 | } | |
873 | priv->assoc_station_added = 1; | |
6974e363 EG |
874 | if (priv->default_wep_key && |
875 | iwl_send_static_wepkey_cmd(priv, 0)) | |
876 | IWL_ERROR("Could not send WEP static key.\n"); | |
b481de9c ZY |
877 | } |
878 | ||
879 | return 0; | |
880 | } | |
881 | ||
5da4b55f MA |
882 | void iwl4965_update_chain_flags(struct iwl_priv *priv) |
883 | { | |
884 | ||
885 | iwl4965_set_rxon_chain(priv); | |
886 | iwl4965_commit_rxon(priv); | |
887 | } | |
888 | ||
c79dd5b5 | 889 | static int iwl4965_send_bt_config(struct iwl_priv *priv) |
b481de9c | 890 | { |
bb8c093b | 891 | struct iwl4965_bt_cmd bt_cmd = { |
b481de9c ZY |
892 | .flags = 3, |
893 | .lead_time = 0xAA, | |
894 | .max_kill = 1, | |
895 | .kill_ack_mask = 0, | |
896 | .kill_cts_mask = 0, | |
897 | }; | |
898 | ||
857485c0 | 899 | return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, |
bb8c093b | 900 | sizeof(struct iwl4965_bt_cmd), &bt_cmd); |
b481de9c ZY |
901 | } |
902 | ||
c79dd5b5 | 903 | static int iwl4965_send_scan_abort(struct iwl_priv *priv) |
b481de9c ZY |
904 | { |
905 | int rc = 0; | |
bb8c093b | 906 | struct iwl4965_rx_packet *res; |
857485c0 | 907 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
908 | .id = REPLY_SCAN_ABORT_CMD, |
909 | .meta.flags = CMD_WANT_SKB, | |
910 | }; | |
911 | ||
912 | /* If there isn't a scan actively going on in the hardware | |
913 | * then we are in between scan bands and not actually | |
914 | * actively scanning, so don't send the abort command */ | |
915 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
916 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
917 | return 0; | |
918 | } | |
919 | ||
857485c0 | 920 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
921 | if (rc) { |
922 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
923 | return rc; | |
924 | } | |
925 | ||
bb8c093b | 926 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
927 | if (res->u.status != CAN_ABORT_STATUS) { |
928 | /* The scan abort will return 1 for success or | |
929 | * 2 for "failure". A failure condition can be | |
930 | * due to simply not being in an active scan which | |
931 | * can occur if we send the scan abort before we | |
932 | * the microcode has notified us that a scan is | |
933 | * completed. */ | |
934 | IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status); | |
935 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
936 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
937 | } | |
938 | ||
939 | dev_kfree_skb_any(cmd.meta.u.skb); | |
940 | ||
941 | return rc; | |
942 | } | |
943 | ||
b481de9c ZY |
944 | /* |
945 | * CARD_STATE_CMD | |
946 | * | |
9fbab516 | 947 | * Use: Sets the device's internal card state to enable, disable, or halt |
b481de9c ZY |
948 | * |
949 | * When in the 'enable' state the card operates as normal. | |
950 | * When in the 'disable' state, the card enters into a low power mode. | |
951 | * When in the 'halt' state, the card is shut down and must be fully | |
952 | * restarted to come back on. | |
953 | */ | |
c79dd5b5 | 954 | static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag) |
b481de9c | 955 | { |
857485c0 | 956 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
957 | .id = REPLY_CARD_STATE_CMD, |
958 | .len = sizeof(u32), | |
959 | .data = &flags, | |
960 | .meta.flags = meta_flag, | |
961 | }; | |
962 | ||
857485c0 | 963 | return iwl_send_cmd(priv, &cmd); |
b481de9c ZY |
964 | } |
965 | ||
c79dd5b5 | 966 | int iwl4965_send_add_station(struct iwl_priv *priv, |
bb8c093b | 967 | struct iwl4965_addsta_cmd *sta, u8 flags) |
b481de9c | 968 | { |
bb8c093b | 969 | struct iwl4965_rx_packet *res = NULL; |
b481de9c | 970 | int rc = 0; |
857485c0 | 971 | struct iwl_host_cmd cmd = { |
b481de9c | 972 | .id = REPLY_ADD_STA, |
bb8c093b | 973 | .len = sizeof(struct iwl4965_addsta_cmd), |
b481de9c ZY |
974 | .meta.flags = flags, |
975 | .data = sta, | |
976 | }; | |
977 | ||
9e5b806c | 978 | if (!(flags & CMD_ASYNC)) |
b481de9c ZY |
979 | cmd.meta.flags |= CMD_WANT_SKB; |
980 | ||
857485c0 | 981 | rc = iwl_send_cmd(priv, &cmd); |
b481de9c ZY |
982 | |
983 | if (rc || (flags & CMD_ASYNC)) | |
984 | return rc; | |
985 | ||
bb8c093b | 986 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
987 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
988 | IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n", | |
989 | res->hdr.flags); | |
990 | rc = -EIO; | |
991 | } | |
992 | ||
993 | if (rc == 0) { | |
994 | switch (res->u.add_sta.status) { | |
995 | case ADD_STA_SUCCESS_MSK: | |
996 | IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n"); | |
997 | break; | |
998 | default: | |
999 | rc = -EIO; | |
1000 | IWL_WARNING("REPLY_ADD_STA failed\n"); | |
1001 | break; | |
1002 | } | |
1003 | } | |
1004 | ||
1005 | priv->alloc_rxb_skb--; | |
1006 | dev_kfree_skb_any(cmd.meta.u.skb); | |
1007 | ||
1008 | return rc; | |
1009 | } | |
1010 | ||
c79dd5b5 | 1011 | static void iwl4965_clear_free_frames(struct iwl_priv *priv) |
b481de9c ZY |
1012 | { |
1013 | struct list_head *element; | |
1014 | ||
1015 | IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n", | |
1016 | priv->frames_count); | |
1017 | ||
1018 | while (!list_empty(&priv->free_frames)) { | |
1019 | element = priv->free_frames.next; | |
1020 | list_del(element); | |
bb8c093b | 1021 | kfree(list_entry(element, struct iwl4965_frame, list)); |
b481de9c ZY |
1022 | priv->frames_count--; |
1023 | } | |
1024 | ||
1025 | if (priv->frames_count) { | |
1026 | IWL_WARNING("%d frames still in use. Did we lose one?\n", | |
1027 | priv->frames_count); | |
1028 | priv->frames_count = 0; | |
1029 | } | |
1030 | } | |
1031 | ||
c79dd5b5 | 1032 | static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv) |
b481de9c | 1033 | { |
bb8c093b | 1034 | struct iwl4965_frame *frame; |
b481de9c ZY |
1035 | struct list_head *element; |
1036 | if (list_empty(&priv->free_frames)) { | |
1037 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | |
1038 | if (!frame) { | |
1039 | IWL_ERROR("Could not allocate frame!\n"); | |
1040 | return NULL; | |
1041 | } | |
1042 | ||
1043 | priv->frames_count++; | |
1044 | return frame; | |
1045 | } | |
1046 | ||
1047 | element = priv->free_frames.next; | |
1048 | list_del(element); | |
bb8c093b | 1049 | return list_entry(element, struct iwl4965_frame, list); |
b481de9c ZY |
1050 | } |
1051 | ||
c79dd5b5 | 1052 | static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame) |
b481de9c ZY |
1053 | { |
1054 | memset(frame, 0, sizeof(*frame)); | |
1055 | list_add(&frame->list, &priv->free_frames); | |
1056 | } | |
1057 | ||
c79dd5b5 | 1058 | unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv, |
b481de9c ZY |
1059 | struct ieee80211_hdr *hdr, |
1060 | const u8 *dest, int left) | |
1061 | { | |
1062 | ||
3109ece1 | 1063 | if (!iwl_is_associated(priv) || !priv->ibss_beacon || |
b481de9c ZY |
1064 | ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) && |
1065 | (priv->iw_mode != IEEE80211_IF_TYPE_AP))) | |
1066 | return 0; | |
1067 | ||
1068 | if (priv->ibss_beacon->len > left) | |
1069 | return 0; | |
1070 | ||
1071 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | |
1072 | ||
1073 | return priv->ibss_beacon->len; | |
1074 | } | |
1075 | ||
bb8c093b | 1076 | static u8 iwl4965_rate_get_lowest_plcp(int rate_mask) |
b481de9c ZY |
1077 | { |
1078 | u8 i; | |
1079 | ||
1080 | for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID; | |
bb8c093b | 1081 | i = iwl4965_rates[i].next_ieee) { |
b481de9c | 1082 | if (rate_mask & (1 << i)) |
bb8c093b | 1083 | return iwl4965_rates[i].plcp; |
b481de9c ZY |
1084 | } |
1085 | ||
1086 | return IWL_RATE_INVALID; | |
1087 | } | |
1088 | ||
c79dd5b5 | 1089 | static int iwl4965_send_beacon_cmd(struct iwl_priv *priv) |
b481de9c | 1090 | { |
bb8c093b | 1091 | struct iwl4965_frame *frame; |
b481de9c ZY |
1092 | unsigned int frame_size; |
1093 | int rc; | |
1094 | u8 rate; | |
1095 | ||
bb8c093b | 1096 | frame = iwl4965_get_free_frame(priv); |
b481de9c ZY |
1097 | |
1098 | if (!frame) { | |
1099 | IWL_ERROR("Could not obtain free frame buffer for beacon " | |
1100 | "command.\n"); | |
1101 | return -ENOMEM; | |
1102 | } | |
1103 | ||
1104 | if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) { | |
bb8c093b | 1105 | rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & |
b481de9c ZY |
1106 | 0xFF0); |
1107 | if (rate == IWL_INVALID_RATE) | |
1108 | rate = IWL_RATE_6M_PLCP; | |
1109 | } else { | |
bb8c093b | 1110 | rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF); |
b481de9c ZY |
1111 | if (rate == IWL_INVALID_RATE) |
1112 | rate = IWL_RATE_1M_PLCP; | |
1113 | } | |
1114 | ||
bb8c093b | 1115 | frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate); |
b481de9c | 1116 | |
857485c0 | 1117 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, |
b481de9c ZY |
1118 | &frame->u.cmd[0]); |
1119 | ||
bb8c093b | 1120 | iwl4965_free_frame(priv, frame); |
b481de9c ZY |
1121 | |
1122 | return rc; | |
1123 | } | |
1124 | ||
b481de9c ZY |
1125 | /****************************************************************************** |
1126 | * | |
1127 | * Misc. internal state and helper functions | |
1128 | * | |
1129 | ******************************************************************************/ | |
b481de9c | 1130 | |
5425e490 | 1131 | static void iwl4965_unset_hw_params(struct iwl_priv *priv) |
b481de9c | 1132 | { |
059ff826 | 1133 | if (priv->shared_virt) |
b481de9c | 1134 | pci_free_consistent(priv->pci_dev, |
bb8c093b | 1135 | sizeof(struct iwl4965_shared), |
059ff826 TW |
1136 | priv->shared_virt, |
1137 | priv->shared_phys); | |
b481de9c ZY |
1138 | } |
1139 | ||
1140 | /** | |
bb8c093b | 1141 | * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field |
b481de9c ZY |
1142 | * |
1143 | * return : set the bit for each supported rate insert in ie | |
1144 | */ | |
bb8c093b | 1145 | static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate, |
c7c46676 | 1146 | u16 basic_rate, int *left) |
b481de9c ZY |
1147 | { |
1148 | u16 ret_rates = 0, bit; | |
1149 | int i; | |
c7c46676 TW |
1150 | u8 *cnt = ie; |
1151 | u8 *rates = ie + 1; | |
b481de9c ZY |
1152 | |
1153 | for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) { | |
1154 | if (bit & supported_rate) { | |
1155 | ret_rates |= bit; | |
bb8c093b | 1156 | rates[*cnt] = iwl4965_rates[i].ieee | |
c7c46676 TW |
1157 | ((bit & basic_rate) ? 0x80 : 0x00); |
1158 | (*cnt)++; | |
1159 | (*left)--; | |
1160 | if ((*left <= 0) || | |
1161 | (*cnt >= IWL_SUPPORTED_RATES_IE_LEN)) | |
b481de9c ZY |
1162 | break; |
1163 | } | |
1164 | } | |
1165 | ||
1166 | return ret_rates; | |
1167 | } | |
1168 | ||
b481de9c | 1169 | /** |
bb8c093b | 1170 | * iwl4965_fill_probe_req - fill in all required fields and IE for probe request |
b481de9c | 1171 | */ |
c79dd5b5 | 1172 | static u16 iwl4965_fill_probe_req(struct iwl_priv *priv, |
78330fdd TW |
1173 | enum ieee80211_band band, |
1174 | struct ieee80211_mgmt *frame, | |
1175 | int left, int is_direct) | |
b481de9c ZY |
1176 | { |
1177 | int len = 0; | |
1178 | u8 *pos = NULL; | |
bee488db | 1179 | u16 active_rates, ret_rates, cck_rates, active_rate_basic; |
8fb88032 | 1180 | #ifdef CONFIG_IWL4965_HT |
78330fdd TW |
1181 | const struct ieee80211_supported_band *sband = |
1182 | iwl4965_get_hw_mode(priv, band); | |
8fb88032 | 1183 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c ZY |
1184 | |
1185 | /* Make sure there is enough space for the probe request, | |
1186 | * two mandatory IEs and the data */ | |
1187 | left -= 24; | |
1188 | if (left < 0) | |
1189 | return 0; | |
1190 | len += 24; | |
1191 | ||
1192 | frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ); | |
bb8c093b | 1193 | memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c | 1194 | memcpy(frame->sa, priv->mac_addr, ETH_ALEN); |
bb8c093b | 1195 | memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN); |
b481de9c ZY |
1196 | frame->seq_ctrl = 0; |
1197 | ||
1198 | /* fill in our indirect SSID IE */ | |
1199 | /* ...next IE... */ | |
1200 | ||
1201 | left -= 2; | |
1202 | if (left < 0) | |
1203 | return 0; | |
1204 | len += 2; | |
1205 | pos = &(frame->u.probe_req.variable[0]); | |
1206 | *pos++ = WLAN_EID_SSID; | |
1207 | *pos++ = 0; | |
1208 | ||
1209 | /* fill in our direct SSID IE... */ | |
1210 | if (is_direct) { | |
1211 | /* ...next IE... */ | |
1212 | left -= 2 + priv->essid_len; | |
1213 | if (left < 0) | |
1214 | return 0; | |
1215 | /* ... fill it in... */ | |
1216 | *pos++ = WLAN_EID_SSID; | |
1217 | *pos++ = priv->essid_len; | |
1218 | memcpy(pos, priv->essid, priv->essid_len); | |
1219 | pos += priv->essid_len; | |
1220 | len += 2 + priv->essid_len; | |
1221 | } | |
1222 | ||
1223 | /* fill in supported rate */ | |
1224 | /* ...next IE... */ | |
1225 | left -= 2; | |
1226 | if (left < 0) | |
1227 | return 0; | |
c7c46676 | 1228 | |
b481de9c ZY |
1229 | /* ... fill it in... */ |
1230 | *pos++ = WLAN_EID_SUPP_RATES; | |
1231 | *pos = 0; | |
c7c46676 | 1232 | |
bee488db | 1233 | /* exclude 60M rate */ |
1234 | active_rates = priv->rates_mask; | |
1235 | active_rates &= ~IWL_RATE_60M_MASK; | |
1236 | ||
1237 | active_rate_basic = active_rates & IWL_BASIC_RATES_MASK; | |
b481de9c | 1238 | |
c7c46676 | 1239 | cck_rates = IWL_CCK_RATES_MASK & active_rates; |
bb8c093b | 1240 | ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates, |
bee488db | 1241 | active_rate_basic, &left); |
c7c46676 TW |
1242 | active_rates &= ~ret_rates; |
1243 | ||
bb8c093b | 1244 | ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1245 | active_rate_basic, &left); |
c7c46676 TW |
1246 | active_rates &= ~ret_rates; |
1247 | ||
b481de9c ZY |
1248 | len += 2 + *pos; |
1249 | pos += (*pos) + 1; | |
c7c46676 | 1250 | if (active_rates == 0) |
b481de9c ZY |
1251 | goto fill_end; |
1252 | ||
1253 | /* fill in supported extended rate */ | |
1254 | /* ...next IE... */ | |
1255 | left -= 2; | |
1256 | if (left < 0) | |
1257 | return 0; | |
1258 | /* ... fill it in... */ | |
1259 | *pos++ = WLAN_EID_EXT_SUPP_RATES; | |
1260 | *pos = 0; | |
bb8c093b | 1261 | iwl4965_supported_rate_to_ie(pos, active_rates, |
bee488db | 1262 | active_rate_basic, &left); |
b481de9c ZY |
1263 | if (*pos > 0) |
1264 | len += 2 + *pos; | |
1265 | ||
c8b0e6e1 | 1266 | #ifdef CONFIG_IWL4965_HT |
78330fdd TW |
1267 | if (sband && sband->ht_info.ht_supported) { |
1268 | struct ieee80211_ht_cap *ht_cap; | |
b481de9c ZY |
1269 | pos += (*pos) + 1; |
1270 | *pos++ = WLAN_EID_HT_CAPABILITY; | |
8fb88032 | 1271 | *pos++ = sizeof(struct ieee80211_ht_cap); |
78330fdd TW |
1272 | ht_cap = (struct ieee80211_ht_cap *)pos; |
1273 | ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap); | |
1274 | memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16); | |
1275 | ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor & | |
1276 | IEEE80211_HT_CAP_AMPDU_FACTOR) | | |
1277 | ((sband->ht_info.ampdu_density << 2) & | |
1278 | IEEE80211_HT_CAP_AMPDU_DENSITY); | |
8fb88032 | 1279 | len += 2 + sizeof(struct ieee80211_ht_cap); |
b481de9c | 1280 | } |
c8b0e6e1 | 1281 | #endif /*CONFIG_IWL4965_HT */ |
b481de9c ZY |
1282 | |
1283 | fill_end: | |
1284 | return (u16)len; | |
1285 | } | |
1286 | ||
1287 | /* | |
1288 | * QoS support | |
1289 | */ | |
c79dd5b5 | 1290 | static int iwl4965_send_qos_params_command(struct iwl_priv *priv, |
bb8c093b | 1291 | struct iwl4965_qosparam_cmd *qos) |
b481de9c ZY |
1292 | { |
1293 | ||
857485c0 | 1294 | return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM, |
bb8c093b | 1295 | sizeof(struct iwl4965_qosparam_cmd), qos); |
b481de9c ZY |
1296 | } |
1297 | ||
c79dd5b5 | 1298 | static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force) |
b481de9c ZY |
1299 | { |
1300 | unsigned long flags; | |
1301 | ||
b481de9c ZY |
1302 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
1303 | return; | |
1304 | ||
1305 | if (!priv->qos_data.qos_enable) | |
1306 | return; | |
1307 | ||
1308 | spin_lock_irqsave(&priv->lock, flags); | |
1309 | priv->qos_data.def_qos_parm.qos_flags = 0; | |
1310 | ||
1311 | if (priv->qos_data.qos_cap.q_AP.queue_request && | |
1312 | !priv->qos_data.qos_cap.q_AP.txop_request) | |
1313 | priv->qos_data.def_qos_parm.qos_flags |= | |
1314 | QOS_PARAM_FLG_TXOP_TYPE_MSK; | |
b481de9c ZY |
1315 | if (priv->qos_data.qos_active) |
1316 | priv->qos_data.def_qos_parm.qos_flags |= | |
1317 | QOS_PARAM_FLG_UPDATE_EDCA_MSK; | |
1318 | ||
c8b0e6e1 | 1319 | #ifdef CONFIG_IWL4965_HT |
fd105e79 | 1320 | if (priv->current_ht_config.is_ht) |
f1f1f5c7 | 1321 | priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK; |
c8b0e6e1 | 1322 | #endif /* CONFIG_IWL4965_HT */ |
f1f1f5c7 | 1323 | |
b481de9c ZY |
1324 | spin_unlock_irqrestore(&priv->lock, flags); |
1325 | ||
3109ece1 | 1326 | if (force || iwl_is_associated(priv)) { |
f1f1f5c7 TW |
1327 | IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n", |
1328 | priv->qos_data.qos_active, | |
1329 | priv->qos_data.def_qos_parm.qos_flags); | |
b481de9c | 1330 | |
bb8c093b | 1331 | iwl4965_send_qos_params_command(priv, |
b481de9c ZY |
1332 | &(priv->qos_data.def_qos_parm)); |
1333 | } | |
1334 | } | |
1335 | ||
c79dd5b5 | 1336 | int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
1337 | { |
1338 | /* Filter incoming packets to determine if they are targeted toward | |
1339 | * this network, discarding packets coming from ourselves */ | |
1340 | switch (priv->iw_mode) { | |
1341 | case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */ | |
1342 | /* packets from our adapter are dropped (echo) */ | |
1343 | if (!compare_ether_addr(header->addr2, priv->mac_addr)) | |
1344 | return 0; | |
1345 | /* {broad,multi}cast packets to our IBSS go through */ | |
1346 | if (is_multicast_ether_addr(header->addr1)) | |
1347 | return !compare_ether_addr(header->addr3, priv->bssid); | |
1348 | /* packets to our adapter go through */ | |
1349 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
1350 | case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */ | |
1351 | /* packets from our adapter are dropped (echo) */ | |
1352 | if (!compare_ether_addr(header->addr3, priv->mac_addr)) | |
1353 | return 0; | |
1354 | /* {broad,multi}cast packets to our BSS go through */ | |
1355 | if (is_multicast_ether_addr(header->addr1)) | |
1356 | return !compare_ether_addr(header->addr2, priv->bssid); | |
1357 | /* packets to our adapter go through */ | |
1358 | return !compare_ether_addr(header->addr1, priv->mac_addr); | |
69dc5d9d TW |
1359 | default: |
1360 | break; | |
b481de9c ZY |
1361 | } |
1362 | ||
1363 | return 1; | |
1364 | } | |
1365 | ||
1366 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
1367 | ||
bb8c093b | 1368 | static const char *iwl4965_get_tx_fail_reason(u32 status) |
b481de9c ZY |
1369 | { |
1370 | switch (status & TX_STATUS_MSK) { | |
1371 | case TX_STATUS_SUCCESS: | |
1372 | return "SUCCESS"; | |
1373 | TX_STATUS_ENTRY(SHORT_LIMIT); | |
1374 | TX_STATUS_ENTRY(LONG_LIMIT); | |
1375 | TX_STATUS_ENTRY(FIFO_UNDERRUN); | |
1376 | TX_STATUS_ENTRY(MGMNT_ABORT); | |
1377 | TX_STATUS_ENTRY(NEXT_FRAG); | |
1378 | TX_STATUS_ENTRY(LIFE_EXPIRE); | |
1379 | TX_STATUS_ENTRY(DEST_PS); | |
1380 | TX_STATUS_ENTRY(ABORTED); | |
1381 | TX_STATUS_ENTRY(BT_RETRY); | |
1382 | TX_STATUS_ENTRY(STA_INVALID); | |
1383 | TX_STATUS_ENTRY(FRAG_DROPPED); | |
1384 | TX_STATUS_ENTRY(TID_DISABLE); | |
1385 | TX_STATUS_ENTRY(FRAME_FLUSHED); | |
1386 | TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL); | |
1387 | TX_STATUS_ENTRY(TX_LOCKED); | |
1388 | TX_STATUS_ENTRY(NO_BEACON_ON_RADAR); | |
1389 | } | |
1390 | ||
1391 | return "UNKNOWN"; | |
1392 | } | |
1393 | ||
1394 | /** | |
bb8c093b | 1395 | * iwl4965_scan_cancel - Cancel any currently executing HW scan |
b481de9c ZY |
1396 | * |
1397 | * NOTE: priv->mutex is not required before calling this function | |
1398 | */ | |
c79dd5b5 | 1399 | static int iwl4965_scan_cancel(struct iwl_priv *priv) |
b481de9c ZY |
1400 | { |
1401 | if (!test_bit(STATUS_SCAN_HW, &priv->status)) { | |
1402 | clear_bit(STATUS_SCANNING, &priv->status); | |
1403 | return 0; | |
1404 | } | |
1405 | ||
1406 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1407 | if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1408 | IWL_DEBUG_SCAN("Queuing scan abort.\n"); | |
1409 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
1410 | queue_work(priv->workqueue, &priv->abort_scan); | |
1411 | ||
1412 | } else | |
1413 | IWL_DEBUG_SCAN("Scan abort already in progress.\n"); | |
1414 | ||
1415 | return test_bit(STATUS_SCANNING, &priv->status); | |
1416 | } | |
1417 | ||
1418 | return 0; | |
1419 | } | |
1420 | ||
1421 | /** | |
bb8c093b | 1422 | * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan |
b481de9c ZY |
1423 | * @ms: amount of time to wait (in milliseconds) for scan to abort |
1424 | * | |
1425 | * NOTE: priv->mutex must be held before calling this function | |
1426 | */ | |
c79dd5b5 | 1427 | static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms) |
b481de9c ZY |
1428 | { |
1429 | unsigned long now = jiffies; | |
1430 | int ret; | |
1431 | ||
bb8c093b | 1432 | ret = iwl4965_scan_cancel(priv); |
b481de9c ZY |
1433 | if (ret && ms) { |
1434 | mutex_unlock(&priv->mutex); | |
1435 | while (!time_after(jiffies, now + msecs_to_jiffies(ms)) && | |
1436 | test_bit(STATUS_SCANNING, &priv->status)) | |
1437 | msleep(1); | |
1438 | mutex_lock(&priv->mutex); | |
1439 | ||
1440 | return test_bit(STATUS_SCANNING, &priv->status); | |
1441 | } | |
1442 | ||
1443 | return ret; | |
1444 | } | |
1445 | ||
c79dd5b5 | 1446 | static void iwl4965_sequence_reset(struct iwl_priv *priv) |
b481de9c ZY |
1447 | { |
1448 | /* Reset ieee stats */ | |
1449 | ||
1450 | /* We don't reset the net_device_stats (ieee->stats) on | |
1451 | * re-association */ | |
1452 | ||
1453 | priv->last_seq_num = -1; | |
1454 | priv->last_frag_num = -1; | |
1455 | priv->last_packet_time = 0; | |
1456 | ||
bb8c093b | 1457 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
1458 | } |
1459 | ||
1460 | #define MAX_UCODE_BEACON_INTERVAL 4096 | |
1461 | #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA) | |
1462 | ||
bb8c093b | 1463 | static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val) |
b481de9c ZY |
1464 | { |
1465 | u16 new_val = 0; | |
1466 | u16 beacon_factor = 0; | |
1467 | ||
1468 | beacon_factor = | |
1469 | (beacon_val + MAX_UCODE_BEACON_INTERVAL) | |
1470 | / MAX_UCODE_BEACON_INTERVAL; | |
1471 | new_val = beacon_val / beacon_factor; | |
1472 | ||
1473 | return cpu_to_le16(new_val); | |
1474 | } | |
1475 | ||
c79dd5b5 | 1476 | static void iwl4965_setup_rxon_timing(struct iwl_priv *priv) |
b481de9c ZY |
1477 | { |
1478 | u64 interval_tm_unit; | |
1479 | u64 tsf, result; | |
1480 | unsigned long flags; | |
1481 | struct ieee80211_conf *conf = NULL; | |
1482 | u16 beacon_int = 0; | |
1483 | ||
1484 | conf = ieee80211_get_hw_conf(priv->hw); | |
1485 | ||
1486 | spin_lock_irqsave(&priv->lock, flags); | |
3109ece1 TW |
1487 | priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32); |
1488 | priv->rxon_timing.timestamp.dw[0] = | |
1489 | cpu_to_le32(priv->timestamp & 0xFFFFFFFF); | |
b481de9c ZY |
1490 | |
1491 | priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL; | |
1492 | ||
3109ece1 | 1493 | tsf = priv->timestamp; |
b481de9c ZY |
1494 | |
1495 | beacon_int = priv->beacon_int; | |
1496 | spin_unlock_irqrestore(&priv->lock, flags); | |
1497 | ||
1498 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) { | |
1499 | if (beacon_int == 0) { | |
1500 | priv->rxon_timing.beacon_interval = cpu_to_le16(100); | |
1501 | priv->rxon_timing.beacon_init_val = cpu_to_le32(102400); | |
1502 | } else { | |
1503 | priv->rxon_timing.beacon_interval = | |
1504 | cpu_to_le16(beacon_int); | |
1505 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1506 | iwl4965_adjust_beacon_interval( |
b481de9c ZY |
1507 | le16_to_cpu(priv->rxon_timing.beacon_interval)); |
1508 | } | |
1509 | ||
1510 | priv->rxon_timing.atim_window = 0; | |
1511 | } else { | |
1512 | priv->rxon_timing.beacon_interval = | |
bb8c093b | 1513 | iwl4965_adjust_beacon_interval(conf->beacon_int); |
b481de9c ZY |
1514 | /* TODO: we need to get atim_window from upper stack |
1515 | * for now we set to 0 */ | |
1516 | priv->rxon_timing.atim_window = 0; | |
1517 | } | |
1518 | ||
1519 | interval_tm_unit = | |
1520 | (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024); | |
1521 | result = do_div(tsf, interval_tm_unit); | |
1522 | priv->rxon_timing.beacon_init_val = | |
1523 | cpu_to_le32((u32) ((u64) interval_tm_unit - result)); | |
1524 | ||
1525 | IWL_DEBUG_ASSOC | |
1526 | ("beacon interval %d beacon timer %d beacon tim %d\n", | |
1527 | le16_to_cpu(priv->rxon_timing.beacon_interval), | |
1528 | le32_to_cpu(priv->rxon_timing.beacon_init_val), | |
1529 | le16_to_cpu(priv->rxon_timing.atim_window)); | |
1530 | } | |
1531 | ||
c79dd5b5 | 1532 | static int iwl4965_scan_initiate(struct iwl_priv *priv) |
b481de9c ZY |
1533 | { |
1534 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
1535 | IWL_ERROR("APs don't scan.\n"); | |
1536 | return 0; | |
1537 | } | |
1538 | ||
fee1247a | 1539 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
1540 | IWL_DEBUG_SCAN("Aborting scan due to not ready.\n"); |
1541 | return -EIO; | |
1542 | } | |
1543 | ||
1544 | if (test_bit(STATUS_SCANNING, &priv->status)) { | |
1545 | IWL_DEBUG_SCAN("Scan already in progress.\n"); | |
1546 | return -EAGAIN; | |
1547 | } | |
1548 | ||
1549 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
1550 | IWL_DEBUG_SCAN("Scan request while abort pending. " | |
1551 | "Queuing.\n"); | |
1552 | return -EAGAIN; | |
1553 | } | |
1554 | ||
1555 | IWL_DEBUG_INFO("Starting scan...\n"); | |
1556 | priv->scan_bands = 2; | |
1557 | set_bit(STATUS_SCANNING, &priv->status); | |
1558 | priv->scan_start = jiffies; | |
1559 | priv->scan_pass_start = priv->scan_start; | |
1560 | ||
1561 | queue_work(priv->workqueue, &priv->request_scan); | |
1562 | ||
1563 | return 0; | |
1564 | } | |
1565 | ||
b481de9c | 1566 | |
c79dd5b5 | 1567 | static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv, |
8318d78a | 1568 | enum ieee80211_band band) |
b481de9c | 1569 | { |
8318d78a | 1570 | if (band == IEEE80211_BAND_5GHZ) { |
b481de9c ZY |
1571 | priv->staging_rxon.flags &= |
1572 | ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK | |
1573 | | RXON_FLG_CCK_MSK); | |
1574 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1575 | } else { | |
508e32e1 | 1576 | /* Copied from iwl4965_post_associate() */ |
b481de9c ZY |
1577 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) |
1578 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
1579 | else | |
1580 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1581 | ||
1582 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
1583 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
1584 | ||
1585 | priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK; | |
1586 | priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK; | |
1587 | priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK; | |
1588 | } | |
1589 | } | |
1590 | ||
1591 | /* | |
01ebd063 | 1592 | * initialize rxon structure with default values from eeprom |
b481de9c | 1593 | */ |
c79dd5b5 | 1594 | static void iwl4965_connection_init_rx_config(struct iwl_priv *priv) |
b481de9c | 1595 | { |
bf85ea4f | 1596 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
1597 | |
1598 | memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon)); | |
1599 | ||
1600 | switch (priv->iw_mode) { | |
1601 | case IEEE80211_IF_TYPE_AP: | |
1602 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP; | |
1603 | break; | |
1604 | ||
1605 | case IEEE80211_IF_TYPE_STA: | |
1606 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS; | |
1607 | priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK; | |
1608 | break; | |
1609 | ||
1610 | case IEEE80211_IF_TYPE_IBSS: | |
1611 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS; | |
1612 | priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK; | |
1613 | priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK | | |
1614 | RXON_FILTER_ACCEPT_GRP_MSK; | |
1615 | break; | |
1616 | ||
1617 | case IEEE80211_IF_TYPE_MNTR: | |
1618 | priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER; | |
1619 | priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | | |
1620 | RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; | |
1621 | break; | |
69dc5d9d TW |
1622 | default: |
1623 | IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode); | |
1624 | break; | |
b481de9c ZY |
1625 | } |
1626 | ||
1627 | #if 0 | |
1628 | /* TODO: Figure out when short_preamble would be set and cache from | |
1629 | * that */ | |
1630 | if (!hw_to_local(priv->hw)->short_preamble) | |
1631 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
1632 | else | |
1633 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
1634 | #endif | |
1635 | ||
8622e705 | 1636 | ch_info = iwl_get_channel_info(priv, priv->band, |
b481de9c ZY |
1637 | le16_to_cpu(priv->staging_rxon.channel)); |
1638 | ||
1639 | if (!ch_info) | |
1640 | ch_info = &priv->channel_info[0]; | |
1641 | ||
1642 | /* | |
1643 | * in some case A channels are all non IBSS | |
1644 | * in this case force B/G channel | |
1645 | */ | |
1646 | if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && | |
1647 | !(is_channel_ibss(ch_info))) | |
1648 | ch_info = &priv->channel_info[0]; | |
1649 | ||
1650 | priv->staging_rxon.channel = cpu_to_le16(ch_info->channel); | |
8318d78a | 1651 | priv->band = ch_info->band; |
b481de9c | 1652 | |
8318d78a | 1653 | iwl4965_set_flags_for_phymode(priv, priv->band); |
b481de9c ZY |
1654 | |
1655 | priv->staging_rxon.ofdm_basic_rates = | |
1656 | (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
1657 | priv->staging_rxon.cck_basic_rates = | |
1658 | (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
1659 | ||
1660 | priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK | | |
1661 | RXON_FLG_CHANNEL_MODE_PURE_40_MSK); | |
1662 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); | |
1663 | memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN); | |
1664 | priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff; | |
1665 | priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff; | |
1666 | iwl4965_set_rxon_chain(priv); | |
1667 | } | |
1668 | ||
c79dd5b5 | 1669 | static int iwl4965_set_mode(struct iwl_priv *priv, int mode) |
b481de9c | 1670 | { |
b481de9c | 1671 | if (mode == IEEE80211_IF_TYPE_IBSS) { |
bf85ea4f | 1672 | const struct iwl_channel_info *ch_info; |
b481de9c | 1673 | |
8622e705 | 1674 | ch_info = iwl_get_channel_info(priv, |
8318d78a | 1675 | priv->band, |
b481de9c ZY |
1676 | le16_to_cpu(priv->staging_rxon.channel)); |
1677 | ||
1678 | if (!ch_info || !is_channel_ibss(ch_info)) { | |
1679 | IWL_ERROR("channel %d not IBSS channel\n", | |
1680 | le16_to_cpu(priv->staging_rxon.channel)); | |
1681 | return -EINVAL; | |
1682 | } | |
1683 | } | |
1684 | ||
b481de9c ZY |
1685 | priv->iw_mode = mode; |
1686 | ||
bb8c093b | 1687 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
1688 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
1689 | ||
bf85ea4f | 1690 | iwlcore_clear_stations_table(priv); |
b481de9c | 1691 | |
fde3571f | 1692 | /* dont commit rxon if rf-kill is on*/ |
fee1247a | 1693 | if (!iwl_is_ready_rf(priv)) |
fde3571f MA |
1694 | return -EAGAIN; |
1695 | ||
1696 | cancel_delayed_work(&priv->scan_check); | |
1697 | if (iwl4965_scan_cancel_timeout(priv, 100)) { | |
1698 | IWL_WARNING("Aborted scan still in progress after 100ms\n"); | |
1699 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
1700 | return -EAGAIN; | |
1701 | } | |
1702 | ||
bb8c093b | 1703 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
1704 | |
1705 | return 0; | |
1706 | } | |
1707 | ||
c79dd5b5 | 1708 | static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv, |
b481de9c | 1709 | struct ieee80211_tx_control *ctl, |
857485c0 | 1710 | struct iwl_cmd *cmd, |
b481de9c | 1711 | struct sk_buff *skb_frag, |
deb09c43 | 1712 | int sta_id) |
b481de9c | 1713 | { |
deb09c43 | 1714 | struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo; |
6974e363 EG |
1715 | struct iwl_wep_key *wepkey; |
1716 | int keyidx = 0; | |
1717 | ||
1c014420 | 1718 | BUG_ON(ctl->hw_key->hw_key_idx > 3); |
b481de9c ZY |
1719 | |
1720 | switch (keyinfo->alg) { | |
1721 | case ALG_CCMP: | |
1722 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM; | |
1723 | memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen); | |
8236e183 MS |
1724 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
1725 | cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK; | |
b481de9c ZY |
1726 | IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n"); |
1727 | break; | |
1728 | ||
1729 | case ALG_TKIP: | |
b481de9c | 1730 | cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP; |
2bc75089 EG |
1731 | ieee80211_get_tkip_key(keyinfo->conf, skb_frag, |
1732 | IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key); | |
1733 | IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n"); | |
b481de9c ZY |
1734 | break; |
1735 | ||
1736 | case ALG_WEP: | |
1c014420 | 1737 | wepkey = &priv->wep_keys[ctl->hw_key->hw_key_idx]; |
6974e363 EG |
1738 | cmd->cmd.tx.sec_ctl = 0; |
1739 | if (priv->default_wep_key) { | |
1740 | /* the WEP key was sent as static */ | |
1c014420 | 1741 | keyidx = ctl->hw_key->hw_key_idx; |
6974e363 EG |
1742 | memcpy(&cmd->cmd.tx.key[3], wepkey->key, |
1743 | wepkey->key_size); | |
1744 | if (wepkey->key_size == WEP_KEY_LEN_128) | |
1745 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
1746 | } else { | |
0211ddda EG |
1747 | /* the WEP key was sent as dynamic */ |
1748 | keyidx = keyinfo->keyidx; | |
1749 | memcpy(&cmd->cmd.tx.key[3], keyinfo->key, | |
1750 | keyinfo->keylen); | |
1751 | if (keyinfo->keylen == WEP_KEY_LEN_128) | |
1752 | cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128; | |
6974e363 | 1753 | } |
b481de9c | 1754 | |
6974e363 EG |
1755 | cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP | |
1756 | (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT); | |
b481de9c ZY |
1757 | |
1758 | IWL_DEBUG_TX("Configuring packet for WEP encryption " | |
6974e363 | 1759 | "with key %d\n", keyidx); |
b481de9c ZY |
1760 | break; |
1761 | ||
b481de9c ZY |
1762 | default: |
1763 | printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg); | |
1764 | break; | |
1765 | } | |
1766 | } | |
1767 | ||
1768 | /* | |
1769 | * handle build REPLY_TX command notification. | |
1770 | */ | |
c79dd5b5 | 1771 | static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv, |
857485c0 | 1772 | struct iwl_cmd *cmd, |
b481de9c ZY |
1773 | struct ieee80211_tx_control *ctrl, |
1774 | struct ieee80211_hdr *hdr, | |
1775 | int is_unicast, u8 std_id) | |
1776 | { | |
1777 | __le16 *qc; | |
1778 | u16 fc = le16_to_cpu(hdr->frame_control); | |
1779 | __le32 tx_flags = cmd->cmd.tx.tx_flags; | |
1780 | ||
1781 | cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | |
1782 | if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) { | |
1783 | tx_flags |= TX_CMD_FLG_ACK_MSK; | |
1784 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
1785 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1786 | if (ieee80211_is_probe_response(fc) && | |
1787 | !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) | |
1788 | tx_flags |= TX_CMD_FLG_TSF_MSK; | |
1789 | } else { | |
1790 | tx_flags &= (~TX_CMD_FLG_ACK_MSK); | |
1791 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1792 | } | |
1793 | ||
87e4f7df TW |
1794 | if (ieee80211_is_back_request(fc)) |
1795 | tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK; | |
1796 | ||
1797 | ||
b481de9c ZY |
1798 | cmd->cmd.tx.sta_id = std_id; |
1799 | if (ieee80211_get_morefrag(hdr)) | |
1800 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; | |
1801 | ||
1802 | qc = ieee80211_get_qos_ctrl(hdr); | |
1803 | if (qc) { | |
1804 | cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf); | |
1805 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | |
1806 | } else | |
1807 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | |
1808 | ||
1809 | if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) { | |
1810 | tx_flags |= TX_CMD_FLG_RTS_MSK; | |
1811 | tx_flags &= ~TX_CMD_FLG_CTS_MSK; | |
1812 | } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) { | |
1813 | tx_flags &= ~TX_CMD_FLG_RTS_MSK; | |
1814 | tx_flags |= TX_CMD_FLG_CTS_MSK; | |
1815 | } | |
1816 | ||
1817 | if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK)) | |
1818 | tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; | |
1819 | ||
1820 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | |
1821 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) { | |
1822 | if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ || | |
1823 | (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ) | |
bc434dd2 | 1824 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); |
b481de9c | 1825 | else |
bc434dd2 | 1826 | cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); |
ab53d8af | 1827 | } else { |
b481de9c | 1828 | cmd->cmd.tx.timeout.pm_frame_timeout = 0; |
ab53d8af | 1829 | } |
b481de9c ZY |
1830 | |
1831 | cmd->cmd.tx.driver_txop = 0; | |
1832 | cmd->cmd.tx.tx_flags = tx_flags; | |
1833 | cmd->cmd.tx.next_frame_len = 0; | |
1834 | } | |
19758bef TW |
1835 | static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len) |
1836 | { | |
1837 | /* 0 - mgmt, 1 - cnt, 2 - data */ | |
1838 | int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2; | |
1839 | priv->tx_stats[idx].cnt++; | |
1840 | priv->tx_stats[idx].bytes += len; | |
1841 | } | |
6440adb5 BC |
1842 | /** |
1843 | * iwl4965_get_sta_id - Find station's index within station table | |
1844 | * | |
1845 | * If new IBSS station, create new entry in station table | |
1846 | */ | |
c79dd5b5 | 1847 | static int iwl4965_get_sta_id(struct iwl_priv *priv, |
9fbab516 | 1848 | struct ieee80211_hdr *hdr) |
b481de9c ZY |
1849 | { |
1850 | int sta_id; | |
1851 | u16 fc = le16_to_cpu(hdr->frame_control); | |
0795af57 | 1852 | DECLARE_MAC_BUF(mac); |
b481de9c | 1853 | |
6440adb5 | 1854 | /* If this frame is broadcast or management, use broadcast station id */ |
b481de9c ZY |
1855 | if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) || |
1856 | is_multicast_ether_addr(hdr->addr1)) | |
5425e490 | 1857 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1858 | |
1859 | switch (priv->iw_mode) { | |
1860 | ||
6440adb5 BC |
1861 | /* If we are a client station in a BSS network, use the special |
1862 | * AP station entry (that's the only station we communicate with) */ | |
b481de9c ZY |
1863 | case IEEE80211_IF_TYPE_STA: |
1864 | return IWL_AP_ID; | |
1865 | ||
1866 | /* If we are an AP, then find the station, or use BCAST */ | |
1867 | case IEEE80211_IF_TYPE_AP: | |
947b13a7 | 1868 | sta_id = iwl_find_station(priv, hdr->addr1); |
b481de9c ZY |
1869 | if (sta_id != IWL_INVALID_STATION) |
1870 | return sta_id; | |
5425e490 | 1871 | return priv->hw_params.bcast_sta_id; |
b481de9c | 1872 | |
6440adb5 BC |
1873 | /* If this frame is going out to an IBSS network, find the station, |
1874 | * or create a new station table entry */ | |
b481de9c | 1875 | case IEEE80211_IF_TYPE_IBSS: |
947b13a7 | 1876 | sta_id = iwl_find_station(priv, hdr->addr1); |
b481de9c ZY |
1877 | if (sta_id != IWL_INVALID_STATION) |
1878 | return sta_id; | |
1879 | ||
6440adb5 | 1880 | /* Create new station table entry */ |
67d62035 RR |
1881 | sta_id = iwl4965_add_station_flags(priv, hdr->addr1, |
1882 | 0, CMD_ASYNC, NULL); | |
b481de9c ZY |
1883 | |
1884 | if (sta_id != IWL_INVALID_STATION) | |
1885 | return sta_id; | |
1886 | ||
0795af57 | 1887 | IWL_DEBUG_DROP("Station %s not in station map. " |
b481de9c | 1888 | "Defaulting to broadcast...\n", |
0795af57 | 1889 | print_mac(mac, hdr->addr1)); |
0a6857e7 | 1890 | iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr)); |
5425e490 | 1891 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1892 | |
1893 | default: | |
01ebd063 | 1894 | IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode); |
5425e490 | 1895 | return priv->hw_params.bcast_sta_id; |
b481de9c ZY |
1896 | } |
1897 | } | |
1898 | ||
1899 | /* | |
1900 | * start REPLY_TX command process | |
1901 | */ | |
c79dd5b5 | 1902 | static int iwl4965_tx_skb(struct iwl_priv *priv, |
b481de9c ZY |
1903 | struct sk_buff *skb, struct ieee80211_tx_control *ctl) |
1904 | { | |
1905 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | |
bb8c093b | 1906 | struct iwl4965_tfd_frame *tfd; |
b481de9c ZY |
1907 | u32 *control_flags; |
1908 | int txq_id = ctl->queue; | |
bb8c093b CH |
1909 | struct iwl4965_tx_queue *txq = NULL; |
1910 | struct iwl4965_queue *q = NULL; | |
b481de9c ZY |
1911 | dma_addr_t phys_addr; |
1912 | dma_addr_t txcmd_phys; | |
87e4f7df | 1913 | dma_addr_t scratch_phys; |
857485c0 | 1914 | struct iwl_cmd *out_cmd = NULL; |
b481de9c ZY |
1915 | u16 len, idx, len_org; |
1916 | u8 id, hdr_len, unicast; | |
1917 | u8 sta_id; | |
1918 | u16 seq_number = 0; | |
1919 | u16 fc; | |
1920 | __le16 *qc; | |
1921 | u8 wait_write_ptr = 0; | |
1922 | unsigned long flags; | |
1923 | int rc; | |
1924 | ||
1925 | spin_lock_irqsave(&priv->lock, flags); | |
fee1247a | 1926 | if (iwl_is_rfkill(priv)) { |
b481de9c ZY |
1927 | IWL_DEBUG_DROP("Dropping - RF KILL\n"); |
1928 | goto drop_unlock; | |
1929 | } | |
1930 | ||
32bfd35d JB |
1931 | if (!priv->vif) { |
1932 | IWL_DEBUG_DROP("Dropping - !priv->vif\n"); | |
b481de9c ZY |
1933 | goto drop_unlock; |
1934 | } | |
1935 | ||
8318d78a | 1936 | if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) { |
b481de9c ZY |
1937 | IWL_ERROR("ERROR: No TX rate available.\n"); |
1938 | goto drop_unlock; | |
1939 | } | |
1940 | ||
1941 | unicast = !is_multicast_ether_addr(hdr->addr1); | |
1942 | id = 0; | |
1943 | ||
1944 | fc = le16_to_cpu(hdr->frame_control); | |
1945 | ||
0a6857e7 | 1946 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
1947 | if (ieee80211_is_auth(fc)) |
1948 | IWL_DEBUG_TX("Sending AUTH frame\n"); | |
1949 | else if (ieee80211_is_assoc_request(fc)) | |
1950 | IWL_DEBUG_TX("Sending ASSOC frame\n"); | |
1951 | else if (ieee80211_is_reassoc_request(fc)) | |
1952 | IWL_DEBUG_TX("Sending REASSOC frame\n"); | |
1953 | #endif | |
1954 | ||
7878a5a4 | 1955 | /* drop all data frame if we are not associated */ |
76f3915b | 1956 | if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) && |
3109ece1 | 1957 | (!iwl_is_associated(priv) || |
a6477249 | 1958 | ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) || |
76f3915b | 1959 | !priv->assoc_station_added)) { |
3109ece1 | 1960 | IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n"); |
b481de9c ZY |
1961 | goto drop_unlock; |
1962 | } | |
1963 | ||
1964 | spin_unlock_irqrestore(&priv->lock, flags); | |
1965 | ||
1966 | hdr_len = ieee80211_get_hdrlen(fc); | |
6440adb5 BC |
1967 | |
1968 | /* Find (or create) index into station table for destination station */ | |
bb8c093b | 1969 | sta_id = iwl4965_get_sta_id(priv, hdr); |
b481de9c | 1970 | if (sta_id == IWL_INVALID_STATION) { |
0795af57 JP |
1971 | DECLARE_MAC_BUF(mac); |
1972 | ||
1973 | IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n", | |
1974 | print_mac(mac, hdr->addr1)); | |
b481de9c ZY |
1975 | goto drop; |
1976 | } | |
1977 | ||
1978 | IWL_DEBUG_RATE("station Id %d\n", sta_id); | |
1979 | ||
1980 | qc = ieee80211_get_qos_ctrl(hdr); | |
1981 | if (qc) { | |
1982 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
1983 | seq_number = priv->stations[sta_id].tid[tid].seq_number & | |
1984 | IEEE80211_SCTL_SEQ; | |
1985 | hdr->seq_ctrl = cpu_to_le16(seq_number) | | |
1986 | (hdr->seq_ctrl & | |
1987 | __constant_cpu_to_le16(IEEE80211_SCTL_FRAG)); | |
1988 | seq_number += 0x10; | |
c8b0e6e1 | 1989 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 1990 | /* aggregation is on for this <sta,tid> */ |
fe01b477 | 1991 | if (ctl->flags & IEEE80211_TXCTL_AMPDU) |
b481de9c | 1992 | txq_id = priv->stations[sta_id].tid[tid].agg.txq_id; |
fe01b477 | 1993 | priv->stations[sta_id].tid[tid].tfds_in_queue++; |
c8b0e6e1 | 1994 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 1995 | } |
6440adb5 BC |
1996 | |
1997 | /* Descriptor for chosen Tx queue */ | |
b481de9c ZY |
1998 | txq = &priv->txq[txq_id]; |
1999 | q = &txq->q; | |
2000 | ||
2001 | spin_lock_irqsave(&priv->lock, flags); | |
2002 | ||
6440adb5 | 2003 | /* Set up first empty TFD within this queue's circular TFD buffer */ |
fc4b6853 | 2004 | tfd = &txq->bd[q->write_ptr]; |
b481de9c ZY |
2005 | memset(tfd, 0, sizeof(*tfd)); |
2006 | control_flags = (u32 *) tfd; | |
fc4b6853 | 2007 | idx = get_cmd_index(q, q->write_ptr, 0); |
b481de9c | 2008 | |
6440adb5 | 2009 | /* Set up driver data for this TFD */ |
bb8c093b | 2010 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info)); |
fc4b6853 TW |
2011 | txq->txb[q->write_ptr].skb[0] = skb; |
2012 | memcpy(&(txq->txb[q->write_ptr].status.control), | |
b481de9c | 2013 | ctl, sizeof(struct ieee80211_tx_control)); |
6440adb5 BC |
2014 | |
2015 | /* Set up first empty entry in queue's array of Tx/cmd buffers */ | |
b481de9c ZY |
2016 | out_cmd = &txq->cmd[idx]; |
2017 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | |
2018 | memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx)); | |
6440adb5 BC |
2019 | |
2020 | /* | |
2021 | * Set up the Tx-command (not MAC!) header. | |
2022 | * Store the chosen Tx queue and TFD index within the sequence field; | |
2023 | * after Tx, uCode's Tx response will return this value so driver can | |
2024 | * locate the frame within the tx queue and do post-tx processing. | |
2025 | */ | |
b481de9c ZY |
2026 | out_cmd->hdr.cmd = REPLY_TX; |
2027 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | |
fc4b6853 | 2028 | INDEX_TO_SEQ(q->write_ptr))); |
6440adb5 BC |
2029 | |
2030 | /* Copy MAC header from skb into command buffer */ | |
b481de9c ZY |
2031 | memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len); |
2032 | ||
6440adb5 BC |
2033 | /* |
2034 | * Use the first empty entry in this queue's command buffer array | |
2035 | * to contain the Tx command and MAC header concatenated together | |
2036 | * (payload data will be in another buffer). | |
2037 | * Size of this varies, due to varying MAC header length. | |
2038 | * If end is not dword aligned, we'll have 2 extra bytes at the end | |
2039 | * of the MAC header (device reads on dword boundaries). | |
2040 | * We'll tell device about this padding later. | |
2041 | */ | |
5425e490 | 2042 | len = priv->hw_params.tx_cmd_len + |
857485c0 | 2043 | sizeof(struct iwl_cmd_header) + hdr_len; |
b481de9c ZY |
2044 | |
2045 | len_org = len; | |
2046 | len = (len + 3) & ~3; | |
2047 | ||
2048 | if (len_org != len) | |
2049 | len_org = 1; | |
2050 | else | |
2051 | len_org = 0; | |
2052 | ||
6440adb5 BC |
2053 | /* Physical address of this Tx command's header (not MAC header!), |
2054 | * within command buffer array. */ | |
857485c0 TW |
2055 | txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx + |
2056 | offsetof(struct iwl_cmd, hdr); | |
b481de9c | 2057 | |
6440adb5 BC |
2058 | /* Add buffer containing Tx command and MAC(!) header to TFD's |
2059 | * first entry */ | |
bb8c093b | 2060 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len); |
b481de9c ZY |
2061 | |
2062 | if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT)) | |
deb09c43 | 2063 | iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id); |
b481de9c | 2064 | |
6440adb5 BC |
2065 | /* Set up TFD's 2nd entry to point directly to remainder of skb, |
2066 | * if any (802.11 null frames have no payload). */ | |
b481de9c ZY |
2067 | len = skb->len - hdr_len; |
2068 | if (len) { | |
2069 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | |
2070 | len, PCI_DMA_TODEVICE); | |
bb8c093b | 2071 | iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len); |
b481de9c ZY |
2072 | } |
2073 | ||
6440adb5 | 2074 | /* Tell 4965 about any 2-byte padding after MAC header */ |
b481de9c ZY |
2075 | if (len_org) |
2076 | out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK; | |
2077 | ||
6440adb5 | 2078 | /* Total # bytes to be transmitted */ |
b481de9c ZY |
2079 | len = (u16)skb->len; |
2080 | out_cmd->cmd.tx.len = cpu_to_le16(len); | |
2081 | ||
2082 | /* TODO need this for burst mode later on */ | |
bb8c093b | 2083 | iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id); |
b481de9c ZY |
2084 | |
2085 | /* set is_hcca to 0; it probably will never be implemented */ | |
bb8c093b | 2086 | iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0); |
b481de9c | 2087 | |
19758bef TW |
2088 | iwl_update_tx_stats(priv, fc, len); |
2089 | ||
857485c0 | 2090 | scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + |
87e4f7df TW |
2091 | offsetof(struct iwl4965_tx_cmd, scratch); |
2092 | out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys); | |
2093 | out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys); | |
2094 | ||
b481de9c ZY |
2095 | if (!ieee80211_get_morefrag(hdr)) { |
2096 | txq->need_update = 1; | |
2097 | if (qc) { | |
2098 | u8 tid = (u8)(le16_to_cpu(*qc) & 0xf); | |
2099 | priv->stations[sta_id].tid[tid].seq_number = seq_number; | |
2100 | } | |
2101 | } else { | |
2102 | wait_write_ptr = 1; | |
2103 | txq->need_update = 0; | |
2104 | } | |
2105 | ||
0a6857e7 | 2106 | iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload, |
b481de9c ZY |
2107 | sizeof(out_cmd->cmd.tx)); |
2108 | ||
0a6857e7 | 2109 | iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr, |
b481de9c ZY |
2110 | ieee80211_get_hdrlen(fc)); |
2111 | ||
6440adb5 | 2112 | /* Set up entry for this TFD in Tx byte-count array */ |
e2a722eb | 2113 | priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len); |
b481de9c | 2114 | |
6440adb5 | 2115 | /* Tell device the write index *just past* this latest filled TFD */ |
c54b679d | 2116 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
bb8c093b | 2117 | rc = iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
2118 | spin_unlock_irqrestore(&priv->lock, flags); |
2119 | ||
2120 | if (rc) | |
2121 | return rc; | |
2122 | ||
bb8c093b | 2123 | if ((iwl4965_queue_space(q) < q->high_mark) |
b481de9c ZY |
2124 | && priv->mac80211_registered) { |
2125 | if (wait_write_ptr) { | |
2126 | spin_lock_irqsave(&priv->lock, flags); | |
2127 | txq->need_update = 1; | |
bb8c093b | 2128 | iwl4965_tx_queue_update_write_ptr(priv, txq); |
b481de9c ZY |
2129 | spin_unlock_irqrestore(&priv->lock, flags); |
2130 | } | |
2131 | ||
2132 | ieee80211_stop_queue(priv->hw, ctl->queue); | |
2133 | } | |
2134 | ||
2135 | return 0; | |
2136 | ||
2137 | drop_unlock: | |
2138 | spin_unlock_irqrestore(&priv->lock, flags); | |
2139 | drop: | |
2140 | return -1; | |
2141 | } | |
2142 | ||
c79dd5b5 | 2143 | static void iwl4965_set_rate(struct iwl_priv *priv) |
b481de9c | 2144 | { |
8318d78a | 2145 | const struct ieee80211_supported_band *hw = NULL; |
b481de9c ZY |
2146 | struct ieee80211_rate *rate; |
2147 | int i; | |
2148 | ||
8318d78a | 2149 | hw = iwl4965_get_hw_mode(priv, priv->band); |
c4ba9621 SA |
2150 | if (!hw) { |
2151 | IWL_ERROR("Failed to set rate: unable to get hw mode\n"); | |
2152 | return; | |
2153 | } | |
b481de9c ZY |
2154 | |
2155 | priv->active_rate = 0; | |
2156 | priv->active_rate_basic = 0; | |
2157 | ||
8318d78a JB |
2158 | for (i = 0; i < hw->n_bitrates; i++) { |
2159 | rate = &(hw->bitrates[i]); | |
2160 | if (rate->hw_value < IWL_RATE_COUNT) | |
2161 | priv->active_rate |= (1 << rate->hw_value); | |
b481de9c ZY |
2162 | } |
2163 | ||
2164 | IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n", | |
2165 | priv->active_rate, priv->active_rate_basic); | |
2166 | ||
2167 | /* | |
2168 | * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK) | |
2169 | * otherwise set it to the default of all CCK rates and 6, 12, 24 for | |
2170 | * OFDM | |
2171 | */ | |
2172 | if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK) | |
2173 | priv->staging_rxon.cck_basic_rates = | |
2174 | ((priv->active_rate_basic & | |
2175 | IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF; | |
2176 | else | |
2177 | priv->staging_rxon.cck_basic_rates = | |
2178 | (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF; | |
2179 | ||
2180 | if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK) | |
2181 | priv->staging_rxon.ofdm_basic_rates = | |
2182 | ((priv->active_rate_basic & | |
2183 | (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >> | |
2184 | IWL_FIRST_OFDM_RATE) & 0xFF; | |
2185 | else | |
2186 | priv->staging_rxon.ofdm_basic_rates = | |
2187 | (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF; | |
2188 | } | |
2189 | ||
ad97edd2 | 2190 | void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio) |
b481de9c ZY |
2191 | { |
2192 | unsigned long flags; | |
2193 | ||
2194 | if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status)) | |
2195 | return; | |
2196 | ||
2197 | IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n", | |
2198 | disable_radio ? "OFF" : "ON"); | |
2199 | ||
2200 | if (disable_radio) { | |
bb8c093b | 2201 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
2202 | /* FIXME: This is a workaround for AP */ |
2203 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
2204 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2205 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
2206 | CSR_UCODE_SW_BIT_RFKILL); |
2207 | spin_unlock_irqrestore(&priv->lock, flags); | |
ad97edd2 | 2208 | /* call the host command only if no hw rf-kill set */ |
59003835 MA |
2209 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status) && |
2210 | iwl_is_ready(priv)) | |
ad97edd2 MA |
2211 | iwl4965_send_card_state(priv, |
2212 | CARD_STATE_CMD_DISABLE, | |
2213 | 0); | |
b481de9c | 2214 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
ad97edd2 MA |
2215 | |
2216 | /* make sure mac80211 stop sending Tx frame */ | |
2217 | if (priv->mac80211_registered) | |
2218 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
2219 | } |
2220 | return; | |
2221 | } | |
2222 | ||
2223 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 2224 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
b481de9c ZY |
2225 | |
2226 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
2227 | spin_unlock_irqrestore(&priv->lock, flags); | |
2228 | ||
2229 | /* wake up ucode */ | |
2230 | msleep(10); | |
2231 | ||
2232 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
2233 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
2234 | if (!iwl_grab_nic_access(priv)) | |
2235 | iwl_release_nic_access(priv); | |
b481de9c ZY |
2236 | spin_unlock_irqrestore(&priv->lock, flags); |
2237 | ||
2238 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { | |
2239 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
2240 | "disabled by HW switch\n"); | |
2241 | return; | |
2242 | } | |
2243 | ||
2244 | queue_work(priv->workqueue, &priv->restart); | |
2245 | return; | |
2246 | } | |
2247 | ||
b481de9c ZY |
2248 | #define IWL_PACKET_RETRY_TIME HZ |
2249 | ||
c79dd5b5 | 2250 | int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header) |
b481de9c ZY |
2251 | { |
2252 | u16 sc = le16_to_cpu(header->seq_ctrl); | |
2253 | u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4; | |
2254 | u16 frag = sc & IEEE80211_SCTL_FRAG; | |
2255 | u16 *last_seq, *last_frag; | |
2256 | unsigned long *last_time; | |
2257 | ||
2258 | switch (priv->iw_mode) { | |
2259 | case IEEE80211_IF_TYPE_IBSS:{ | |
2260 | struct list_head *p; | |
bb8c093b | 2261 | struct iwl4965_ibss_seq *entry = NULL; |
b481de9c ZY |
2262 | u8 *mac = header->addr2; |
2263 | int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1); | |
2264 | ||
2265 | __list_for_each(p, &priv->ibss_mac_hash[index]) { | |
bb8c093b | 2266 | entry = list_entry(p, struct iwl4965_ibss_seq, list); |
b481de9c ZY |
2267 | if (!compare_ether_addr(entry->mac, mac)) |
2268 | break; | |
2269 | } | |
2270 | if (p == &priv->ibss_mac_hash[index]) { | |
2271 | entry = kzalloc(sizeof(*entry), GFP_ATOMIC); | |
2272 | if (!entry) { | |
bc434dd2 | 2273 | IWL_ERROR("Cannot malloc new mac entry\n"); |
b481de9c ZY |
2274 | return 0; |
2275 | } | |
2276 | memcpy(entry->mac, mac, ETH_ALEN); | |
2277 | entry->seq_num = seq; | |
2278 | entry->frag_num = frag; | |
2279 | entry->packet_time = jiffies; | |
bc434dd2 | 2280 | list_add(&entry->list, &priv->ibss_mac_hash[index]); |
b481de9c ZY |
2281 | return 0; |
2282 | } | |
2283 | last_seq = &entry->seq_num; | |
2284 | last_frag = &entry->frag_num; | |
2285 | last_time = &entry->packet_time; | |
2286 | break; | |
2287 | } | |
2288 | case IEEE80211_IF_TYPE_STA: | |
2289 | last_seq = &priv->last_seq_num; | |
2290 | last_frag = &priv->last_frag_num; | |
2291 | last_time = &priv->last_packet_time; | |
2292 | break; | |
2293 | default: | |
2294 | return 0; | |
2295 | } | |
2296 | if ((*last_seq == seq) && | |
2297 | time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) { | |
2298 | if (*last_frag == frag) | |
2299 | goto drop; | |
2300 | if (*last_frag + 1 != frag) | |
2301 | /* out-of-order fragment */ | |
2302 | goto drop; | |
2303 | } else | |
2304 | *last_seq = seq; | |
2305 | ||
2306 | *last_frag = frag; | |
2307 | *last_time = jiffies; | |
2308 | return 0; | |
2309 | ||
2310 | drop: | |
2311 | return 1; | |
2312 | } | |
2313 | ||
c8b0e6e1 | 2314 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
2315 | |
2316 | #include "iwl-spectrum.h" | |
2317 | ||
2318 | #define BEACON_TIME_MASK_LOW 0x00FFFFFF | |
2319 | #define BEACON_TIME_MASK_HIGH 0xFF000000 | |
2320 | #define TIME_UNIT 1024 | |
2321 | ||
2322 | /* | |
2323 | * extended beacon time format | |
2324 | * time in usec will be changed into a 32-bit value in 8:24 format | |
2325 | * the high 1 byte is the beacon counts | |
2326 | * the lower 3 bytes is the time in usec within one beacon interval | |
2327 | */ | |
2328 | ||
bb8c093b | 2329 | static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval) |
b481de9c ZY |
2330 | { |
2331 | u32 quot; | |
2332 | u32 rem; | |
2333 | u32 interval = beacon_interval * 1024; | |
2334 | ||
2335 | if (!interval || !usec) | |
2336 | return 0; | |
2337 | ||
2338 | quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24); | |
2339 | rem = (usec % interval) & BEACON_TIME_MASK_LOW; | |
2340 | ||
2341 | return (quot << 24) + rem; | |
2342 | } | |
2343 | ||
2344 | /* base is usually what we get from ucode with each received frame, | |
2345 | * the same as HW timer counter counting down | |
2346 | */ | |
2347 | ||
bb8c093b | 2348 | static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval) |
b481de9c ZY |
2349 | { |
2350 | u32 base_low = base & BEACON_TIME_MASK_LOW; | |
2351 | u32 addon_low = addon & BEACON_TIME_MASK_LOW; | |
2352 | u32 interval = beacon_interval * TIME_UNIT; | |
2353 | u32 res = (base & BEACON_TIME_MASK_HIGH) + | |
2354 | (addon & BEACON_TIME_MASK_HIGH); | |
2355 | ||
2356 | if (base_low > addon_low) | |
2357 | res += base_low - addon_low; | |
2358 | else if (base_low < addon_low) { | |
2359 | res += interval + base_low - addon_low; | |
2360 | res += (1 << 24); | |
2361 | } else | |
2362 | res += (1 << 24); | |
2363 | ||
2364 | return cpu_to_le32(res); | |
2365 | } | |
2366 | ||
c79dd5b5 | 2367 | static int iwl4965_get_measurement(struct iwl_priv *priv, |
b481de9c ZY |
2368 | struct ieee80211_measurement_params *params, |
2369 | u8 type) | |
2370 | { | |
bb8c093b CH |
2371 | struct iwl4965_spectrum_cmd spectrum; |
2372 | struct iwl4965_rx_packet *res; | |
857485c0 | 2373 | struct iwl_host_cmd cmd = { |
b481de9c ZY |
2374 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, |
2375 | .data = (void *)&spectrum, | |
2376 | .meta.flags = CMD_WANT_SKB, | |
2377 | }; | |
2378 | u32 add_time = le64_to_cpu(params->start_time); | |
2379 | int rc; | |
2380 | int spectrum_resp_status; | |
2381 | int duration = le16_to_cpu(params->duration); | |
2382 | ||
3109ece1 | 2383 | if (iwl_is_associated(priv)) |
b481de9c | 2384 | add_time = |
bb8c093b | 2385 | iwl4965_usecs_to_beacons( |
b481de9c ZY |
2386 | le64_to_cpu(params->start_time) - priv->last_tsf, |
2387 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2388 | ||
2389 | memset(&spectrum, 0, sizeof(spectrum)); | |
2390 | ||
2391 | spectrum.channel_count = cpu_to_le16(1); | |
2392 | spectrum.flags = | |
2393 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | |
2394 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | |
2395 | cmd.len = sizeof(spectrum); | |
2396 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | |
2397 | ||
3109ece1 | 2398 | if (iwl_is_associated(priv)) |
b481de9c | 2399 | spectrum.start_time = |
bb8c093b | 2400 | iwl4965_add_beacon_time(priv->last_beacon_time, |
b481de9c ZY |
2401 | add_time, |
2402 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | |
2403 | else | |
2404 | spectrum.start_time = 0; | |
2405 | ||
2406 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | |
2407 | spectrum.channels[0].channel = params->channel; | |
2408 | spectrum.channels[0].type = type; | |
2409 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | |
2410 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | |
2411 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | |
2412 | ||
857485c0 | 2413 | rc = iwl_send_cmd_sync(priv, &cmd); |
b481de9c ZY |
2414 | if (rc) |
2415 | return rc; | |
2416 | ||
bb8c093b | 2417 | res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data; |
b481de9c ZY |
2418 | if (res->hdr.flags & IWL_CMD_FAILED_MSK) { |
2419 | IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n"); | |
2420 | rc = -EIO; | |
2421 | } | |
2422 | ||
2423 | spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); | |
2424 | switch (spectrum_resp_status) { | |
2425 | case 0: /* Command will be handled */ | |
2426 | if (res->u.spectrum.id != 0xff) { | |
2427 | IWL_DEBUG_INFO | |
2428 | ("Replaced existing measurement: %d\n", | |
2429 | res->u.spectrum.id); | |
2430 | priv->measurement_status &= ~MEASUREMENT_READY; | |
2431 | } | |
2432 | priv->measurement_status |= MEASUREMENT_ACTIVE; | |
2433 | rc = 0; | |
2434 | break; | |
2435 | ||
2436 | case 1: /* Command will not be handled */ | |
2437 | rc = -EAGAIN; | |
2438 | break; | |
2439 | } | |
2440 | ||
2441 | dev_kfree_skb_any(cmd.meta.u.skb); | |
2442 | ||
2443 | return rc; | |
2444 | } | |
2445 | #endif | |
2446 | ||
c79dd5b5 | 2447 | static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv, |
bb8c093b | 2448 | struct iwl4965_tx_info *tx_sta) |
b481de9c ZY |
2449 | { |
2450 | ||
2451 | tx_sta->status.ack_signal = 0; | |
2452 | tx_sta->status.excessive_retries = 0; | |
2453 | tx_sta->status.queue_length = 0; | |
2454 | tx_sta->status.queue_number = 0; | |
2455 | ||
2456 | if (in_interrupt()) | |
2457 | ieee80211_tx_status_irqsafe(priv->hw, | |
2458 | tx_sta->skb[0], &(tx_sta->status)); | |
2459 | else | |
2460 | ieee80211_tx_status(priv->hw, | |
2461 | tx_sta->skb[0], &(tx_sta->status)); | |
2462 | ||
2463 | tx_sta->skb[0] = NULL; | |
2464 | } | |
2465 | ||
2466 | /** | |
6440adb5 | 2467 | * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd |
b481de9c | 2468 | * |
6440adb5 BC |
2469 | * When FW advances 'R' index, all entries between old and new 'R' index |
2470 | * need to be reclaimed. As result, some free space forms. If there is | |
2471 | * enough free space (> low mark), wake the stack that feeds us. | |
b481de9c | 2472 | */ |
c79dd5b5 | 2473 | int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) |
b481de9c | 2474 | { |
bb8c093b CH |
2475 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
2476 | struct iwl4965_queue *q = &txq->q; | |
b481de9c ZY |
2477 | int nfreed = 0; |
2478 | ||
2479 | if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) { | |
2480 | IWL_ERROR("Read index for DMA queue txq id (%d), index %d, " | |
2481 | "is out of range [0-%d] %d %d.\n", txq_id, | |
fc4b6853 | 2482 | index, q->n_bd, q->write_ptr, q->read_ptr); |
b481de9c ZY |
2483 | return 0; |
2484 | } | |
2485 | ||
c54b679d | 2486 | for (index = iwl_queue_inc_wrap(index, q->n_bd); |
fc4b6853 | 2487 | q->read_ptr != index; |
c54b679d | 2488 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { |
b481de9c | 2489 | if (txq_id != IWL_CMD_QUEUE_NUM) { |
bb8c093b | 2490 | iwl4965_txstatus_to_ieee(priv, |
fc4b6853 | 2491 | &(txq->txb[txq->q.read_ptr])); |
bb8c093b | 2492 | iwl4965_hw_txq_free_tfd(priv, txq); |
b481de9c ZY |
2493 | } else if (nfreed > 1) { |
2494 | IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index, | |
fc4b6853 | 2495 | q->write_ptr, q->read_ptr); |
b481de9c ZY |
2496 | queue_work(priv->workqueue, &priv->restart); |
2497 | } | |
2498 | nfreed++; | |
2499 | } | |
2500 | ||
fe01b477 | 2501 | /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) && |
b481de9c ZY |
2502 | (txq_id != IWL_CMD_QUEUE_NUM) && |
2503 | priv->mac80211_registered) | |
fe01b477 | 2504 | ieee80211_wake_queue(priv->hw, txq_id); */ |
b481de9c ZY |
2505 | |
2506 | ||
2507 | return nfreed; | |
2508 | } | |
2509 | ||
bb8c093b | 2510 | static int iwl4965_is_tx_success(u32 status) |
b481de9c ZY |
2511 | { |
2512 | status &= TX_STATUS_MSK; | |
2513 | return (status == TX_STATUS_SUCCESS) | |
2514 | || (status == TX_STATUS_DIRECT_DONE); | |
2515 | } | |
2516 | ||
2517 | /****************************************************************************** | |
2518 | * | |
2519 | * Generic RX handler implementations | |
2520 | * | |
2521 | ******************************************************************************/ | |
c8b0e6e1 | 2522 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 2523 | |
c79dd5b5 | 2524 | static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv, |
b481de9c ZY |
2525 | struct ieee80211_hdr *hdr) |
2526 | { | |
2527 | if (priv->iw_mode == IEEE80211_IF_TYPE_STA) | |
2528 | return IWL_AP_ID; | |
2529 | else { | |
2530 | u8 *da = ieee80211_get_DA(hdr); | |
947b13a7 | 2531 | return iwl_find_station(priv, da); |
b481de9c ZY |
2532 | } |
2533 | } | |
2534 | ||
bb8c093b | 2535 | static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr( |
c79dd5b5 | 2536 | struct iwl_priv *priv, int txq_id, int idx) |
b481de9c ZY |
2537 | { |
2538 | if (priv->txq[txq_id].txb[idx].skb[0]) | |
2539 | return (struct ieee80211_hdr *)priv->txq[txq_id]. | |
2540 | txb[idx].skb[0]->data; | |
2541 | return NULL; | |
2542 | } | |
2543 | ||
bb8c093b | 2544 | static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp) |
b481de9c ZY |
2545 | { |
2546 | __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status + | |
2547 | tx_resp->frame_count); | |
2548 | return le32_to_cpu(*scd_ssn) & MAX_SN; | |
2549 | ||
2550 | } | |
6440adb5 BC |
2551 | |
2552 | /** | |
2553 | * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue | |
2554 | */ | |
c79dd5b5 | 2555 | static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv, |
bb8c093b | 2556 | struct iwl4965_ht_agg *agg, |
fe01b477 | 2557 | struct iwl4965_tx_resp_agg *tx_resp, |
b481de9c ZY |
2558 | u16 start_idx) |
2559 | { | |
fe01b477 RR |
2560 | u16 status; |
2561 | struct agg_tx_status *frame_status = &tx_resp->status; | |
b481de9c ZY |
2562 | struct ieee80211_tx_status *tx_status = NULL; |
2563 | struct ieee80211_hdr *hdr = NULL; | |
2564 | int i, sh; | |
2565 | int txq_id, idx; | |
2566 | u16 seq; | |
2567 | ||
2568 | if (agg->wait_for_ba) | |
6440adb5 | 2569 | IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n"); |
b481de9c ZY |
2570 | |
2571 | agg->frame_count = tx_resp->frame_count; | |
2572 | agg->start_idx = start_idx; | |
2573 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 2574 | agg->bitmap = 0; |
b481de9c | 2575 | |
6440adb5 | 2576 | /* # frames attempted by Tx command */ |
b481de9c | 2577 | if (agg->frame_count == 1) { |
6440adb5 | 2578 | /* Only one frame was attempted; no block-ack will arrive */ |
fe01b477 RR |
2579 | status = le16_to_cpu(frame_status[0].status); |
2580 | seq = le16_to_cpu(frame_status[0].sequence); | |
2581 | idx = SEQ_TO_INDEX(seq); | |
2582 | txq_id = SEQ_TO_QUEUE(seq); | |
b481de9c | 2583 | |
b481de9c | 2584 | /* FIXME: code repetition */ |
fe01b477 RR |
2585 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n", |
2586 | agg->frame_count, agg->start_idx, idx); | |
b481de9c | 2587 | |
fe01b477 | 2588 | tx_status = &(priv->txq[txq_id].txb[idx].status); |
b481de9c ZY |
2589 | tx_status->retry_count = tx_resp->failure_frame; |
2590 | tx_status->queue_number = status & 0xff; | |
fe01b477 RR |
2591 | tx_status->queue_length = tx_resp->failure_rts; |
2592 | tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU; | |
bb8c093b | 2593 | tx_status->flags = iwl4965_is_tx_success(status)? |
b481de9c | 2594 | IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
2595 | iwl4965_hwrate_to_tx_control(priv, |
2596 | le32_to_cpu(tx_resp->rate_n_flags), | |
2597 | &tx_status->control); | |
b481de9c ZY |
2598 | /* FIXME: code repetition end */ |
2599 | ||
2600 | IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n", | |
2601 | status & 0xff, tx_resp->failure_frame); | |
2602 | IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", | |
bb8c093b | 2603 | iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags)); |
b481de9c ZY |
2604 | |
2605 | agg->wait_for_ba = 0; | |
2606 | } else { | |
6440adb5 | 2607 | /* Two or more frames were attempted; expect block-ack */ |
b481de9c ZY |
2608 | u64 bitmap = 0; |
2609 | int start = agg->start_idx; | |
2610 | ||
6440adb5 | 2611 | /* Construct bit-map of pending frames within Tx window */ |
b481de9c ZY |
2612 | for (i = 0; i < agg->frame_count; i++) { |
2613 | u16 sc; | |
fe01b477 RR |
2614 | status = le16_to_cpu(frame_status[i].status); |
2615 | seq = le16_to_cpu(frame_status[i].sequence); | |
b481de9c ZY |
2616 | idx = SEQ_TO_INDEX(seq); |
2617 | txq_id = SEQ_TO_QUEUE(seq); | |
2618 | ||
2619 | if (status & (AGG_TX_STATE_FEW_BYTES_MSK | | |
2620 | AGG_TX_STATE_ABORT_MSK)) | |
2621 | continue; | |
2622 | ||
2623 | IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n", | |
2624 | agg->frame_count, txq_id, idx); | |
2625 | ||
bb8c093b | 2626 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx); |
b481de9c ZY |
2627 | |
2628 | sc = le16_to_cpu(hdr->seq_ctrl); | |
2629 | if (idx != (SEQ_TO_SN(sc) & 0xff)) { | |
2630 | IWL_ERROR("BUG_ON idx doesn't match seq control" | |
2631 | " idx=%d, seq_idx=%d, seq=%d\n", | |
2632 | idx, SEQ_TO_SN(sc), | |
2633 | hdr->seq_ctrl); | |
2634 | return -1; | |
2635 | } | |
2636 | ||
2637 | IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", | |
2638 | i, idx, SEQ_TO_SN(sc)); | |
2639 | ||
2640 | sh = idx - start; | |
2641 | if (sh > 64) { | |
2642 | sh = (start - idx) + 0xff; | |
2643 | bitmap = bitmap << sh; | |
2644 | sh = 0; | |
2645 | start = idx; | |
2646 | } else if (sh < -64) | |
2647 | sh = 0xff - (start - idx); | |
2648 | else if (sh < 0) { | |
2649 | sh = start - idx; | |
2650 | start = idx; | |
2651 | bitmap = bitmap << sh; | |
2652 | sh = 0; | |
2653 | } | |
2654 | bitmap |= (1 << sh); | |
2655 | IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n", | |
2656 | start, (u32)(bitmap & 0xFFFFFFFF)); | |
2657 | } | |
2658 | ||
fe01b477 | 2659 | agg->bitmap = bitmap; |
b481de9c ZY |
2660 | agg->start_idx = start; |
2661 | agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags); | |
fe01b477 | 2662 | IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n", |
b481de9c | 2663 | agg->frame_count, agg->start_idx, |
06501d29 | 2664 | (unsigned long long)agg->bitmap); |
b481de9c ZY |
2665 | |
2666 | if (bitmap) | |
2667 | agg->wait_for_ba = 1; | |
2668 | } | |
2669 | return 0; | |
2670 | } | |
2671 | #endif | |
b481de9c | 2672 | |
6440adb5 BC |
2673 | /** |
2674 | * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response | |
2675 | */ | |
c79dd5b5 | 2676 | static void iwl4965_rx_reply_tx(struct iwl_priv *priv, |
bb8c093b | 2677 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2678 | { |
bb8c093b | 2679 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
2680 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
2681 | int txq_id = SEQ_TO_QUEUE(sequence); | |
2682 | int index = SEQ_TO_INDEX(sequence); | |
bb8c093b | 2683 | struct iwl4965_tx_queue *txq = &priv->txq[txq_id]; |
b481de9c | 2684 | struct ieee80211_tx_status *tx_status; |
bb8c093b | 2685 | struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; |
b481de9c | 2686 | u32 status = le32_to_cpu(tx_resp->status); |
c8b0e6e1 | 2687 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2688 | int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION; |
2689 | struct ieee80211_hdr *hdr; | |
2690 | __le16 *qc; | |
b481de9c ZY |
2691 | #endif |
2692 | ||
2693 | if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) { | |
2694 | IWL_ERROR("Read index for DMA queue txq_id (%d) index %d " | |
2695 | "is out of range [0-%d] %d %d\n", txq_id, | |
fc4b6853 TW |
2696 | index, txq->q.n_bd, txq->q.write_ptr, |
2697 | txq->q.read_ptr); | |
b481de9c ZY |
2698 | return; |
2699 | } | |
2700 | ||
c8b0e6e1 | 2701 | #ifdef CONFIG_IWL4965_HT |
fe01b477 RR |
2702 | hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index); |
2703 | qc = ieee80211_get_qos_ctrl(hdr); | |
2704 | ||
2705 | if (qc) | |
2706 | tid = le16_to_cpu(*qc) & 0xf; | |
2707 | ||
2708 | sta_id = iwl4965_get_ra_sta_id(priv, hdr); | |
2709 | if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) { | |
2710 | IWL_ERROR("Station not known\n"); | |
2711 | return; | |
2712 | } | |
2713 | ||
b481de9c | 2714 | if (txq->sched_retry) { |
bb8c093b | 2715 | const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp); |
bb8c093b | 2716 | struct iwl4965_ht_agg *agg = NULL; |
b481de9c | 2717 | |
fe01b477 | 2718 | if (!qc) |
b481de9c | 2719 | return; |
b481de9c ZY |
2720 | |
2721 | agg = &priv->stations[sta_id].tid[tid].agg; | |
2722 | ||
fe01b477 RR |
2723 | iwl4965_tx_status_reply_tx(priv, agg, |
2724 | (struct iwl4965_tx_resp_agg *)tx_resp, index); | |
b481de9c ZY |
2725 | |
2726 | if ((tx_resp->frame_count == 1) && | |
bb8c093b | 2727 | !iwl4965_is_tx_success(status)) { |
b481de9c ZY |
2728 | /* TODO: send BAR */ |
2729 | } | |
2730 | ||
fe01b477 RR |
2731 | if (txq->q.read_ptr != (scd_ssn & 0xff)) { |
2732 | int freed; | |
c54b679d | 2733 | index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd); |
b481de9c ZY |
2734 | IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn " |
2735 | "%d index %d\n", scd_ssn , index); | |
fe01b477 RR |
2736 | freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); |
2737 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
2738 | ||
2739 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
2740 | txq_id >= 0 && priv->mac80211_registered && | |
2741 | agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) | |
2742 | ieee80211_wake_queue(priv->hw, txq_id); | |
2743 | ||
2744 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); | |
b481de9c ZY |
2745 | } |
2746 | } else { | |
c8b0e6e1 | 2747 | #endif /* CONFIG_IWL4965_HT */ |
fc4b6853 | 2748 | tx_status = &(txq->txb[txq->q.read_ptr].status); |
b481de9c ZY |
2749 | |
2750 | tx_status->retry_count = tx_resp->failure_frame; | |
2751 | tx_status->queue_number = status; | |
2752 | tx_status->queue_length = tx_resp->bt_kill_count; | |
2753 | tx_status->queue_length |= tx_resp->failure_rts; | |
b481de9c | 2754 | tx_status->flags = |
bb8c093b | 2755 | iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0; |
4c424e4c RR |
2756 | iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags), |
2757 | &tx_status->control); | |
b481de9c | 2758 | |
b481de9c | 2759 | IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x " |
bb8c093b | 2760 | "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status), |
b481de9c ZY |
2761 | status, le32_to_cpu(tx_resp->rate_n_flags), |
2762 | tx_resp->failure_frame); | |
2763 | ||
2764 | IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index); | |
fe01b477 RR |
2765 | if (index != -1) { |
2766 | int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); | |
2767 | #ifdef CONFIG_IWL4965_HT | |
2768 | if (tid != MAX_TID_COUNT) | |
2769 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | |
2770 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | |
2771 | (txq_id >= 0) && | |
2772 | priv->mac80211_registered) | |
2773 | ieee80211_wake_queue(priv->hw, txq_id); | |
2774 | if (tid != MAX_TID_COUNT) | |
2775 | iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id); | |
2776 | #endif | |
2777 | } | |
c8b0e6e1 | 2778 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 2779 | } |
c8b0e6e1 | 2780 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c ZY |
2781 | |
2782 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | |
2783 | IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n"); | |
2784 | } | |
2785 | ||
2786 | ||
c79dd5b5 | 2787 | static void iwl4965_rx_reply_alive(struct iwl_priv *priv, |
bb8c093b | 2788 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2789 | { |
bb8c093b CH |
2790 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2791 | struct iwl4965_alive_resp *palive; | |
b481de9c ZY |
2792 | struct delayed_work *pwork; |
2793 | ||
2794 | palive = &pkt->u.alive_frame; | |
2795 | ||
2796 | IWL_DEBUG_INFO("Alive ucode status 0x%08X revision " | |
2797 | "0x%01X 0x%01X\n", | |
2798 | palive->is_valid, palive->ver_type, | |
2799 | palive->ver_subtype); | |
2800 | ||
2801 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | |
2802 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
2803 | memcpy(&priv->card_alive_init, | |
2804 | &pkt->u.alive_frame, | |
bb8c093b | 2805 | sizeof(struct iwl4965_init_alive_resp)); |
b481de9c ZY |
2806 | pwork = &priv->init_alive_start; |
2807 | } else { | |
2808 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
2809 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | |
bb8c093b | 2810 | sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
2811 | pwork = &priv->alive_start; |
2812 | } | |
2813 | ||
2814 | /* We delay the ALIVE response by 5ms to | |
2815 | * give the HW RF Kill time to activate... */ | |
2816 | if (palive->is_valid == UCODE_VALID_OK) | |
2817 | queue_delayed_work(priv->workqueue, pwork, | |
2818 | msecs_to_jiffies(5)); | |
2819 | else | |
2820 | IWL_WARNING("uCode did not respond OK.\n"); | |
2821 | } | |
2822 | ||
c79dd5b5 | 2823 | static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv, |
bb8c093b | 2824 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2825 | { |
bb8c093b | 2826 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
2827 | |
2828 | IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); | |
2829 | return; | |
2830 | } | |
2831 | ||
c79dd5b5 | 2832 | static void iwl4965_rx_reply_error(struct iwl_priv *priv, |
bb8c093b | 2833 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2834 | { |
bb8c093b | 2835 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
2836 | |
2837 | IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) " | |
2838 | "seq 0x%04X ser 0x%08X\n", | |
2839 | le32_to_cpu(pkt->u.err_resp.error_type), | |
2840 | get_cmd_string(pkt->u.err_resp.cmd_id), | |
2841 | pkt->u.err_resp.cmd_id, | |
2842 | le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num), | |
2843 | le32_to_cpu(pkt->u.err_resp.error_info)); | |
2844 | } | |
2845 | ||
2846 | #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x | |
2847 | ||
c79dd5b5 | 2848 | static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2849 | { |
bb8c093b CH |
2850 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2851 | struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon; | |
2852 | struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif); | |
b481de9c ZY |
2853 | IWL_DEBUG_11H("CSA notif: channel %d, status %d\n", |
2854 | le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); | |
2855 | rxon->channel = csa->channel; | |
2856 | priv->staging_rxon.channel = csa->channel; | |
2857 | } | |
2858 | ||
c79dd5b5 | 2859 | static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv, |
bb8c093b | 2860 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2861 | { |
c8b0e6e1 | 2862 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
bb8c093b CH |
2863 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2864 | struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif); | |
b481de9c ZY |
2865 | |
2866 | if (!report->state) { | |
2867 | IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO, | |
2868 | "Spectrum Measure Notification: Start\n"); | |
2869 | return; | |
2870 | } | |
2871 | ||
2872 | memcpy(&priv->measure_report, report, sizeof(*report)); | |
2873 | priv->measurement_status |= MEASUREMENT_READY; | |
2874 | #endif | |
2875 | } | |
2876 | ||
c79dd5b5 | 2877 | static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv, |
bb8c093b | 2878 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2879 | { |
0a6857e7 | 2880 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b CH |
2881 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2882 | struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif); | |
b481de9c ZY |
2883 | IWL_DEBUG_RX("sleep mode: %d, src: %d\n", |
2884 | sleep->pm_sleep_mode, sleep->pm_wakeup_src); | |
2885 | #endif | |
2886 | } | |
2887 | ||
c79dd5b5 | 2888 | static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv, |
bb8c093b | 2889 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2890 | { |
bb8c093b | 2891 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
2892 | IWL_DEBUG_RADIO("Dumping %d bytes of unhandled " |
2893 | "notification for %s:\n", | |
2894 | le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd)); | |
0a6857e7 | 2895 | iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len)); |
b481de9c ZY |
2896 | } |
2897 | ||
bb8c093b | 2898 | static void iwl4965_bg_beacon_update(struct work_struct *work) |
b481de9c | 2899 | { |
c79dd5b5 TW |
2900 | struct iwl_priv *priv = |
2901 | container_of(work, struct iwl_priv, beacon_update); | |
b481de9c ZY |
2902 | struct sk_buff *beacon; |
2903 | ||
2904 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | |
32bfd35d | 2905 | beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL); |
b481de9c ZY |
2906 | |
2907 | if (!beacon) { | |
2908 | IWL_ERROR("update beacon failed\n"); | |
2909 | return; | |
2910 | } | |
2911 | ||
2912 | mutex_lock(&priv->mutex); | |
2913 | /* new beacon skb is allocated every time; dispose previous.*/ | |
2914 | if (priv->ibss_beacon) | |
2915 | dev_kfree_skb(priv->ibss_beacon); | |
2916 | ||
2917 | priv->ibss_beacon = beacon; | |
2918 | mutex_unlock(&priv->mutex); | |
2919 | ||
bb8c093b | 2920 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
2921 | } |
2922 | ||
c79dd5b5 | 2923 | static void iwl4965_rx_beacon_notif(struct iwl_priv *priv, |
bb8c093b | 2924 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2925 | { |
0a6857e7 | 2926 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b CH |
2927 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2928 | struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status); | |
2929 | u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); | |
b481de9c ZY |
2930 | |
2931 | IWL_DEBUG_RX("beacon status %x retries %d iss %d " | |
2932 | "tsf %d %d rate %d\n", | |
2933 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | |
2934 | beacon->beacon_notify_hdr.failure_frame, | |
2935 | le32_to_cpu(beacon->ibss_mgr_status), | |
2936 | le32_to_cpu(beacon->high_tsf), | |
2937 | le32_to_cpu(beacon->low_tsf), rate); | |
2938 | #endif | |
2939 | ||
2940 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && | |
2941 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | |
2942 | queue_work(priv->workqueue, &priv->beacon_update); | |
2943 | } | |
2944 | ||
2945 | /* Service response to REPLY_SCAN_CMD (0x80) */ | |
c79dd5b5 | 2946 | static void iwl4965_rx_reply_scan(struct iwl_priv *priv, |
bb8c093b | 2947 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2948 | { |
0a6857e7 | 2949 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b CH |
2950 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2951 | struct iwl4965_scanreq_notification *notif = | |
2952 | (struct iwl4965_scanreq_notification *)pkt->u.raw; | |
b481de9c ZY |
2953 | |
2954 | IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status); | |
2955 | #endif | |
2956 | } | |
2957 | ||
2958 | /* Service SCAN_START_NOTIFICATION (0x82) */ | |
c79dd5b5 | 2959 | static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv, |
bb8c093b | 2960 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2961 | { |
bb8c093b CH |
2962 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2963 | struct iwl4965_scanstart_notification *notif = | |
2964 | (struct iwl4965_scanstart_notification *)pkt->u.raw; | |
b481de9c ZY |
2965 | priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); |
2966 | IWL_DEBUG_SCAN("Scan start: " | |
2967 | "%d [802.11%s] " | |
2968 | "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", | |
2969 | notif->channel, | |
2970 | notif->band ? "bg" : "a", | |
2971 | notif->tsf_high, | |
2972 | notif->tsf_low, notif->status, notif->beacon_timer); | |
2973 | } | |
2974 | ||
2975 | /* Service SCAN_RESULTS_NOTIFICATION (0x83) */ | |
c79dd5b5 | 2976 | static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv, |
bb8c093b | 2977 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 2978 | { |
bb8c093b CH |
2979 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
2980 | struct iwl4965_scanresults_notification *notif = | |
2981 | (struct iwl4965_scanresults_notification *)pkt->u.raw; | |
b481de9c ZY |
2982 | |
2983 | IWL_DEBUG_SCAN("Scan ch.res: " | |
2984 | "%d [802.11%s] " | |
2985 | "(TSF: 0x%08X:%08X) - %d " | |
2986 | "elapsed=%lu usec (%dms since last)\n", | |
2987 | notif->channel, | |
2988 | notif->band ? "bg" : "a", | |
2989 | le32_to_cpu(notif->tsf_high), | |
2990 | le32_to_cpu(notif->tsf_low), | |
2991 | le32_to_cpu(notif->statistics[0]), | |
2992 | le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf, | |
2993 | jiffies_to_msecs(elapsed_jiffies | |
2994 | (priv->last_scan_jiffies, jiffies))); | |
2995 | ||
2996 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 2997 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
2998 | } |
2999 | ||
3000 | /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ | |
c79dd5b5 | 3001 | static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv, |
bb8c093b | 3002 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3003 | { |
bb8c093b CH |
3004 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
3005 | struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw; | |
b481de9c ZY |
3006 | |
3007 | IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", | |
3008 | scan_notif->scanned_channels, | |
3009 | scan_notif->tsf_low, | |
3010 | scan_notif->tsf_high, scan_notif->status); | |
3011 | ||
3012 | /* The HW is no longer scanning */ | |
3013 | clear_bit(STATUS_SCAN_HW, &priv->status); | |
3014 | ||
3015 | /* The scan completion notification came in, so kill that timer... */ | |
3016 | cancel_delayed_work(&priv->scan_check); | |
3017 | ||
3018 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", | |
3019 | (priv->scan_bands == 2) ? "2.4" : "5.2", | |
3020 | jiffies_to_msecs(elapsed_jiffies | |
3021 | (priv->scan_pass_start, jiffies))); | |
3022 | ||
3023 | /* Remove this scanned band from the list | |
3024 | * of pending bands to scan */ | |
3025 | priv->scan_bands--; | |
3026 | ||
3027 | /* If a request to abort was given, or the scan did not succeed | |
3028 | * then we reset the scan state machine and terminate, | |
3029 | * re-queuing another scan if one has been requested */ | |
3030 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
3031 | IWL_DEBUG_INFO("Aborted scan completed.\n"); | |
3032 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | |
3033 | } else { | |
3034 | /* If there are more bands on this scan pass reschedule */ | |
3035 | if (priv->scan_bands > 0) | |
3036 | goto reschedule; | |
3037 | } | |
3038 | ||
3039 | priv->last_scan_jiffies = jiffies; | |
7878a5a4 | 3040 | priv->next_scan_jiffies = 0; |
b481de9c ZY |
3041 | IWL_DEBUG_INFO("Setting scan to off\n"); |
3042 | ||
3043 | clear_bit(STATUS_SCANNING, &priv->status); | |
3044 | ||
3045 | IWL_DEBUG_INFO("Scan took %dms\n", | |
3046 | jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies))); | |
3047 | ||
3048 | queue_work(priv->workqueue, &priv->scan_completed); | |
3049 | ||
3050 | return; | |
3051 | ||
3052 | reschedule: | |
3053 | priv->scan_pass_start = jiffies; | |
3054 | queue_work(priv->workqueue, &priv->request_scan); | |
3055 | } | |
3056 | ||
3057 | /* Handle notification from uCode that card's power state is changing | |
3058 | * due to software, hardware, or critical temperature RFKILL */ | |
c79dd5b5 | 3059 | static void iwl4965_rx_card_state_notif(struct iwl_priv *priv, |
bb8c093b | 3060 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3061 | { |
bb8c093b | 3062 | struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data; |
b481de9c ZY |
3063 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); |
3064 | unsigned long status = priv->status; | |
3065 | ||
3066 | IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n", | |
3067 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | |
3068 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | |
3069 | ||
3070 | if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | | |
3071 | RF_CARD_DISABLED)) { | |
3072 | ||
3395f6e9 | 3073 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c ZY |
3074 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3075 | ||
3395f6e9 TW |
3076 | if (!iwl_grab_nic_access(priv)) { |
3077 | iwl_write_direct32( | |
b481de9c ZY |
3078 | priv, HBUS_TARG_MBX_C, |
3079 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
3080 | ||
3395f6e9 | 3081 | iwl_release_nic_access(priv); |
b481de9c ZY |
3082 | } |
3083 | ||
3084 | if (!(flags & RXON_CARD_DISABLED)) { | |
3395f6e9 | 3085 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, |
b481de9c | 3086 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
3395f6e9 TW |
3087 | if (!iwl_grab_nic_access(priv)) { |
3088 | iwl_write_direct32( | |
b481de9c ZY |
3089 | priv, HBUS_TARG_MBX_C, |
3090 | HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); | |
3091 | ||
3395f6e9 | 3092 | iwl_release_nic_access(priv); |
b481de9c ZY |
3093 | } |
3094 | } | |
3095 | ||
3096 | if (flags & RF_CARD_DISABLED) { | |
3395f6e9 | 3097 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, |
b481de9c | 3098 | CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); |
3395f6e9 TW |
3099 | iwl_read32(priv, CSR_UCODE_DRV_GP1); |
3100 | if (!iwl_grab_nic_access(priv)) | |
3101 | iwl_release_nic_access(priv); | |
b481de9c ZY |
3102 | } |
3103 | } | |
3104 | ||
3105 | if (flags & HW_CARD_DISABLED) | |
3106 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
3107 | else | |
3108 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
3109 | ||
3110 | ||
3111 | if (flags & SW_CARD_DISABLED) | |
3112 | set_bit(STATUS_RF_KILL_SW, &priv->status); | |
3113 | else | |
3114 | clear_bit(STATUS_RF_KILL_SW, &priv->status); | |
3115 | ||
3116 | if (!(flags & RXON_CARD_DISABLED)) | |
bb8c093b | 3117 | iwl4965_scan_cancel(priv); |
b481de9c ZY |
3118 | |
3119 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | |
3120 | test_bit(STATUS_RF_KILL_HW, &priv->status)) || | |
3121 | (test_bit(STATUS_RF_KILL_SW, &status) != | |
3122 | test_bit(STATUS_RF_KILL_SW, &priv->status))) | |
3123 | queue_work(priv->workqueue, &priv->rf_kill); | |
3124 | else | |
3125 | wake_up_interruptible(&priv->wait_command_queue); | |
3126 | } | |
3127 | ||
3128 | /** | |
bb8c093b | 3129 | * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks |
b481de9c ZY |
3130 | * |
3131 | * Setup the RX handlers for each of the reply types sent from the uCode | |
3132 | * to the host. | |
3133 | * | |
3134 | * This function chains into the hardware specific files for them to setup | |
3135 | * any hardware specific handlers as well. | |
3136 | */ | |
c79dd5b5 | 3137 | static void iwl4965_setup_rx_handlers(struct iwl_priv *priv) |
b481de9c | 3138 | { |
bb8c093b CH |
3139 | priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive; |
3140 | priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta; | |
3141 | priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error; | |
3142 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa; | |
b481de9c | 3143 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = |
bb8c093b CH |
3144 | iwl4965_rx_spectrum_measure_notif; |
3145 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif; | |
b481de9c | 3146 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = |
bb8c093b CH |
3147 | iwl4965_rx_pm_debug_statistics_notif; |
3148 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif; | |
b481de9c | 3149 | |
9fbab516 BC |
3150 | /* |
3151 | * The same handler is used for both the REPLY to a discrete | |
3152 | * statistics request from the host as well as for the periodic | |
3153 | * statistics notifications (after received beacons) from the uCode. | |
b481de9c | 3154 | */ |
bb8c093b CH |
3155 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics; |
3156 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics; | |
b481de9c | 3157 | |
bb8c093b CH |
3158 | priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan; |
3159 | priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif; | |
b481de9c | 3160 | priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] = |
bb8c093b | 3161 | iwl4965_rx_scan_results_notif; |
b481de9c | 3162 | priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] = |
bb8c093b CH |
3163 | iwl4965_rx_scan_complete_notif; |
3164 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif; | |
3165 | priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx; | |
b481de9c | 3166 | |
9fbab516 | 3167 | /* Set up hardware specific Rx handlers */ |
bb8c093b | 3168 | iwl4965_hw_rx_handler_setup(priv); |
b481de9c ZY |
3169 | } |
3170 | ||
3171 | /** | |
bb8c093b | 3172 | * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them |
b481de9c ZY |
3173 | * @rxb: Rx buffer to reclaim |
3174 | * | |
3175 | * If an Rx buffer has an async callback associated with it the callback | |
3176 | * will be executed. The attached skb (if present) will only be freed | |
3177 | * if the callback returns 1 | |
3178 | */ | |
c79dd5b5 | 3179 | static void iwl4965_tx_cmd_complete(struct iwl_priv *priv, |
bb8c093b | 3180 | struct iwl4965_rx_mem_buffer *rxb) |
b481de9c | 3181 | { |
bb8c093b | 3182 | struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3183 | u16 sequence = le16_to_cpu(pkt->hdr.sequence); |
3184 | int txq_id = SEQ_TO_QUEUE(sequence); | |
3185 | int index = SEQ_TO_INDEX(sequence); | |
3186 | int huge = sequence & SEQ_HUGE_FRAME; | |
3187 | int cmd_index; | |
857485c0 | 3188 | struct iwl_cmd *cmd; |
b481de9c ZY |
3189 | |
3190 | /* If a Tx command is being handled and it isn't in the actual | |
3191 | * command queue then there a command routing bug has been introduced | |
3192 | * in the queue management code. */ | |
3193 | if (txq_id != IWL_CMD_QUEUE_NUM) | |
3194 | IWL_ERROR("Error wrong command queue %d command id 0x%X\n", | |
3195 | txq_id, pkt->hdr.cmd); | |
3196 | BUG_ON(txq_id != IWL_CMD_QUEUE_NUM); | |
3197 | ||
3198 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | |
3199 | cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | |
3200 | ||
3201 | /* Input error checking is done when commands are added to queue. */ | |
3202 | if (cmd->meta.flags & CMD_WANT_SKB) { | |
3203 | cmd->meta.source->u.skb = rxb->skb; | |
3204 | rxb->skb = NULL; | |
3205 | } else if (cmd->meta.u.callback && | |
3206 | !cmd->meta.u.callback(priv, cmd, rxb->skb)) | |
3207 | rxb->skb = NULL; | |
3208 | ||
bb8c093b | 3209 | iwl4965_tx_queue_reclaim(priv, txq_id, index); |
b481de9c ZY |
3210 | |
3211 | if (!(cmd->meta.flags & CMD_ASYNC)) { | |
3212 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
3213 | wake_up_interruptible(&priv->wait_command_queue); | |
3214 | } | |
3215 | } | |
3216 | ||
3217 | /************************** RX-FUNCTIONS ****************************/ | |
3218 | /* | |
3219 | * Rx theory of operation | |
3220 | * | |
9fbab516 BC |
3221 | * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs), |
3222 | * each of which point to Receive Buffers to be filled by 4965. These get | |
3223 | * used not only for Rx frames, but for any command response or notification | |
3224 | * from the 4965. The driver and 4965 manage the Rx buffers by means | |
3225 | * of indexes into the circular buffer. | |
b481de9c ZY |
3226 | * |
3227 | * Rx Queue Indexes | |
3228 | * The host/firmware share two index registers for managing the Rx buffers. | |
3229 | * | |
3230 | * The READ index maps to the first position that the firmware may be writing | |
3231 | * to -- the driver can read up to (but not including) this position and get | |
3232 | * good data. | |
3233 | * The READ index is managed by the firmware once the card is enabled. | |
3234 | * | |
3235 | * The WRITE index maps to the last position the driver has read from -- the | |
3236 | * position preceding WRITE is the last slot the firmware can place a packet. | |
3237 | * | |
3238 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if | |
3239 | * WRITE = READ. | |
3240 | * | |
9fbab516 | 3241 | * During initialization, the host sets up the READ queue position to the first |
b481de9c ZY |
3242 | * INDEX position, and WRITE to the last (READ - 1 wrapped) |
3243 | * | |
9fbab516 | 3244 | * When the firmware places a packet in a buffer, it will advance the READ index |
b481de9c ZY |
3245 | * and fire the RX interrupt. The driver can then query the READ index and |
3246 | * process as many packets as possible, moving the WRITE index forward as it | |
3247 | * resets the Rx queue buffers with new memory. | |
3248 | * | |
3249 | * The management in the driver is as follows: | |
3250 | * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When | |
3251 | * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled | |
01ebd063 | 3252 | * to replenish the iwl->rxq->rx_free. |
bb8c093b | 3253 | * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the |
b481de9c ZY |
3254 | * iwl->rxq is replenished and the READ INDEX is updated (updating the |
3255 | * 'processed' and 'read' driver indexes as well) | |
3256 | * + A received packet is processed and handed to the kernel network stack, | |
3257 | * detached from the iwl->rxq. The driver 'processed' index is updated. | |
3258 | * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free | |
3259 | * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ | |
3260 | * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there | |
3261 | * were enough free buffers and RX_STALLED is set it is cleared. | |
3262 | * | |
3263 | * | |
3264 | * Driver sequence: | |
3265 | * | |
9fbab516 BC |
3266 | * iwl4965_rx_queue_alloc() Allocates rx_free |
3267 | * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls | |
bb8c093b | 3268 | * iwl4965_rx_queue_restock |
9fbab516 | 3269 | * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx |
b481de9c ZY |
3270 | * queue, updates firmware pointers, and updates |
3271 | * the WRITE index. If insufficient rx_free buffers | |
bb8c093b | 3272 | * are available, schedules iwl4965_rx_replenish |
b481de9c ZY |
3273 | * |
3274 | * -- enable interrupts -- | |
9fbab516 | 3275 | * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the |
b481de9c ZY |
3276 | * READ INDEX, detaching the SKB from the pool. |
3277 | * Moves the packet buffer from queue to rx_used. | |
bb8c093b | 3278 | * Calls iwl4965_rx_queue_restock to refill any empty |
b481de9c ZY |
3279 | * slots. |
3280 | * ... | |
3281 | * | |
3282 | */ | |
3283 | ||
3284 | /** | |
bb8c093b | 3285 | * iwl4965_rx_queue_space - Return number of free slots available in queue. |
b481de9c | 3286 | */ |
bb8c093b | 3287 | static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q) |
b481de9c ZY |
3288 | { |
3289 | int s = q->read - q->write; | |
3290 | if (s <= 0) | |
3291 | s += RX_QUEUE_SIZE; | |
3292 | /* keep some buffer to not confuse full and empty queue */ | |
3293 | s -= 2; | |
3294 | if (s < 0) | |
3295 | s = 0; | |
3296 | return s; | |
3297 | } | |
3298 | ||
3299 | /** | |
bb8c093b | 3300 | * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue |
b481de9c | 3301 | */ |
c79dd5b5 | 3302 | int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q) |
b481de9c ZY |
3303 | { |
3304 | u32 reg = 0; | |
3305 | int rc = 0; | |
3306 | unsigned long flags; | |
3307 | ||
3308 | spin_lock_irqsave(&q->lock, flags); | |
3309 | ||
3310 | if (q->need_update == 0) | |
3311 | goto exit_unlock; | |
3312 | ||
6440adb5 | 3313 | /* If power-saving is in use, make sure device is awake */ |
b481de9c | 3314 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { |
3395f6e9 | 3315 | reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
3316 | |
3317 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
3395f6e9 | 3318 | iwl_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
3319 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
3320 | goto exit_unlock; | |
3321 | } | |
3322 | ||
3395f6e9 | 3323 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3324 | if (rc) |
3325 | goto exit_unlock; | |
3326 | ||
6440adb5 | 3327 | /* Device expects a multiple of 8 */ |
3395f6e9 | 3328 | iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR, |
b481de9c | 3329 | q->write & ~0x7); |
3395f6e9 | 3330 | iwl_release_nic_access(priv); |
6440adb5 BC |
3331 | |
3332 | /* Else device is assumed to be awake */ | |
b481de9c | 3333 | } else |
6440adb5 | 3334 | /* Device expects a multiple of 8 */ |
3395f6e9 | 3335 | iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7); |
b481de9c ZY |
3336 | |
3337 | ||
3338 | q->need_update = 0; | |
3339 | ||
3340 | exit_unlock: | |
3341 | spin_unlock_irqrestore(&q->lock, flags); | |
3342 | return rc; | |
3343 | } | |
3344 | ||
3345 | /** | |
9fbab516 | 3346 | * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr |
b481de9c | 3347 | */ |
c79dd5b5 | 3348 | static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv, |
b481de9c ZY |
3349 | dma_addr_t dma_addr) |
3350 | { | |
3351 | return cpu_to_le32((u32)(dma_addr >> 8)); | |
3352 | } | |
3353 | ||
3354 | ||
3355 | /** | |
bb8c093b | 3356 | * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool |
b481de9c | 3357 | * |
9fbab516 | 3358 | * If there are slots in the RX queue that need to be restocked, |
b481de9c | 3359 | * and we have free pre-allocated buffers, fill the ranks as much |
9fbab516 | 3360 | * as we can, pulling from rx_free. |
b481de9c ZY |
3361 | * |
3362 | * This moves the 'write' index forward to catch up with 'processed', and | |
3363 | * also updates the memory address in the firmware to reference the new | |
3364 | * target buffer. | |
3365 | */ | |
c79dd5b5 | 3366 | static int iwl4965_rx_queue_restock(struct iwl_priv *priv) |
b481de9c | 3367 | { |
bb8c093b | 3368 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c | 3369 | struct list_head *element; |
bb8c093b | 3370 | struct iwl4965_rx_mem_buffer *rxb; |
b481de9c ZY |
3371 | unsigned long flags; |
3372 | int write, rc; | |
3373 | ||
3374 | spin_lock_irqsave(&rxq->lock, flags); | |
3375 | write = rxq->write & ~0x7; | |
bb8c093b | 3376 | while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) { |
6440adb5 | 3377 | /* Get next free Rx buffer, remove from free list */ |
b481de9c | 3378 | element = rxq->rx_free.next; |
bb8c093b | 3379 | rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list); |
b481de9c | 3380 | list_del(element); |
6440adb5 BC |
3381 | |
3382 | /* Point to Rx buffer via next RBD in circular buffer */ | |
bb8c093b | 3383 | rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr); |
b481de9c ZY |
3384 | rxq->queue[rxq->write] = rxb; |
3385 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | |
3386 | rxq->free_count--; | |
3387 | } | |
3388 | spin_unlock_irqrestore(&rxq->lock, flags); | |
3389 | /* If the pre-allocated buffer pool is dropping low, schedule to | |
3390 | * refill it */ | |
3391 | if (rxq->free_count <= RX_LOW_WATERMARK) | |
3392 | queue_work(priv->workqueue, &priv->rx_replenish); | |
3393 | ||
3394 | ||
6440adb5 BC |
3395 | /* If we've added more space for the firmware to place data, tell it. |
3396 | * Increment device's write pointer in multiples of 8. */ | |
b481de9c ZY |
3397 | if ((write != (rxq->write & ~0x7)) |
3398 | || (abs(rxq->write - rxq->read) > 7)) { | |
3399 | spin_lock_irqsave(&rxq->lock, flags); | |
3400 | rxq->need_update = 1; | |
3401 | spin_unlock_irqrestore(&rxq->lock, flags); | |
bb8c093b | 3402 | rc = iwl4965_rx_queue_update_write_ptr(priv, rxq); |
b481de9c ZY |
3403 | if (rc) |
3404 | return rc; | |
3405 | } | |
3406 | ||
3407 | return 0; | |
3408 | } | |
3409 | ||
3410 | /** | |
bb8c093b | 3411 | * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free |
b481de9c ZY |
3412 | * |
3413 | * When moving to rx_free an SKB is allocated for the slot. | |
3414 | * | |
bb8c093b | 3415 | * Also restock the Rx queue via iwl4965_rx_queue_restock. |
01ebd063 | 3416 | * This is called as a scheduled work item (except for during initialization) |
b481de9c | 3417 | */ |
c79dd5b5 | 3418 | static void iwl4965_rx_allocate(struct iwl_priv *priv) |
b481de9c | 3419 | { |
bb8c093b | 3420 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c | 3421 | struct list_head *element; |
bb8c093b | 3422 | struct iwl4965_rx_mem_buffer *rxb; |
b481de9c ZY |
3423 | unsigned long flags; |
3424 | spin_lock_irqsave(&rxq->lock, flags); | |
3425 | while (!list_empty(&rxq->rx_used)) { | |
3426 | element = rxq->rx_used.next; | |
bb8c093b | 3427 | rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list); |
6440adb5 BC |
3428 | |
3429 | /* Alloc a new receive buffer */ | |
b481de9c | 3430 | rxb->skb = |
5425e490 | 3431 | alloc_skb(priv->hw_params.rx_buf_size, |
9ee1ba47 | 3432 | __GFP_NOWARN | GFP_ATOMIC); |
b481de9c ZY |
3433 | if (!rxb->skb) { |
3434 | if (net_ratelimit()) | |
3435 | printk(KERN_CRIT DRV_NAME | |
3436 | ": Can not allocate SKB buffers\n"); | |
3437 | /* We don't reschedule replenish work here -- we will | |
3438 | * call the restock method and if it still needs | |
3439 | * more buffers it will schedule replenish */ | |
3440 | break; | |
3441 | } | |
3442 | priv->alloc_rxb_skb++; | |
3443 | list_del(element); | |
6440adb5 BC |
3444 | |
3445 | /* Get physical address of RB/SKB */ | |
b481de9c ZY |
3446 | rxb->dma_addr = |
3447 | pci_map_single(priv->pci_dev, rxb->skb->data, | |
5425e490 | 3448 | priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE); |
b481de9c ZY |
3449 | list_add_tail(&rxb->list, &rxq->rx_free); |
3450 | rxq->free_count++; | |
3451 | } | |
3452 | spin_unlock_irqrestore(&rxq->lock, flags); | |
5c0eef96 MA |
3453 | } |
3454 | ||
3455 | /* | |
3456 | * this should be called while priv->lock is locked | |
3457 | */ | |
4fd1f841 | 3458 | static void __iwl4965_rx_replenish(void *data) |
5c0eef96 | 3459 | { |
c79dd5b5 | 3460 | struct iwl_priv *priv = data; |
5c0eef96 MA |
3461 | |
3462 | iwl4965_rx_allocate(priv); | |
3463 | iwl4965_rx_queue_restock(priv); | |
3464 | } | |
3465 | ||
3466 | ||
3467 | void iwl4965_rx_replenish(void *data) | |
3468 | { | |
c79dd5b5 | 3469 | struct iwl_priv *priv = data; |
5c0eef96 MA |
3470 | unsigned long flags; |
3471 | ||
3472 | iwl4965_rx_allocate(priv); | |
b481de9c ZY |
3473 | |
3474 | spin_lock_irqsave(&priv->lock, flags); | |
bb8c093b | 3475 | iwl4965_rx_queue_restock(priv); |
b481de9c ZY |
3476 | spin_unlock_irqrestore(&priv->lock, flags); |
3477 | } | |
3478 | ||
3479 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. | |
9fbab516 | 3480 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL |
b481de9c ZY |
3481 | * This free routine walks the list of POOL entries and if SKB is set to |
3482 | * non NULL it is unmapped and freed | |
3483 | */ | |
c79dd5b5 | 3484 | static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq) |
b481de9c ZY |
3485 | { |
3486 | int i; | |
3487 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | |
3488 | if (rxq->pool[i].skb != NULL) { | |
3489 | pci_unmap_single(priv->pci_dev, | |
3490 | rxq->pool[i].dma_addr, | |
5425e490 | 3491 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 3492 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
3493 | dev_kfree_skb(rxq->pool[i].skb); |
3494 | } | |
3495 | } | |
3496 | ||
3497 | pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, | |
3498 | rxq->dma_addr); | |
3499 | rxq->bd = NULL; | |
3500 | } | |
3501 | ||
c79dd5b5 | 3502 | int iwl4965_rx_queue_alloc(struct iwl_priv *priv) |
b481de9c | 3503 | { |
bb8c093b | 3504 | struct iwl4965_rx_queue *rxq = &priv->rxq; |
b481de9c ZY |
3505 | struct pci_dev *dev = priv->pci_dev; |
3506 | int i; | |
3507 | ||
3508 | spin_lock_init(&rxq->lock); | |
3509 | INIT_LIST_HEAD(&rxq->rx_free); | |
3510 | INIT_LIST_HEAD(&rxq->rx_used); | |
6440adb5 BC |
3511 | |
3512 | /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ | |
b481de9c ZY |
3513 | rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr); |
3514 | if (!rxq->bd) | |
3515 | return -ENOMEM; | |
6440adb5 | 3516 | |
b481de9c ZY |
3517 | /* Fill the rx_used queue with _all_ of the Rx buffers */ |
3518 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) | |
3519 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
6440adb5 | 3520 | |
b481de9c ZY |
3521 | /* Set us so that we have processed and used all buffers, but have |
3522 | * not restocked the Rx queue with fresh buffers */ | |
3523 | rxq->read = rxq->write = 0; | |
3524 | rxq->free_count = 0; | |
3525 | rxq->need_update = 0; | |
3526 | return 0; | |
3527 | } | |
3528 | ||
c79dd5b5 | 3529 | void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq) |
b481de9c ZY |
3530 | { |
3531 | unsigned long flags; | |
3532 | int i; | |
3533 | spin_lock_irqsave(&rxq->lock, flags); | |
3534 | INIT_LIST_HEAD(&rxq->rx_free); | |
3535 | INIT_LIST_HEAD(&rxq->rx_used); | |
3536 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | |
3537 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | |
3538 | /* In the reset function, these buffers may have been allocated | |
3539 | * to an SKB, so we need to unmap and free potential storage */ | |
3540 | if (rxq->pool[i].skb != NULL) { | |
3541 | pci_unmap_single(priv->pci_dev, | |
3542 | rxq->pool[i].dma_addr, | |
5425e490 | 3543 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 3544 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
3545 | priv->alloc_rxb_skb--; |
3546 | dev_kfree_skb(rxq->pool[i].skb); | |
3547 | rxq->pool[i].skb = NULL; | |
3548 | } | |
3549 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | |
3550 | } | |
3551 | ||
3552 | /* Set us so that we have processed and used all buffers, but have | |
3553 | * not restocked the Rx queue with fresh buffers */ | |
3554 | rxq->read = rxq->write = 0; | |
3555 | rxq->free_count = 0; | |
3556 | spin_unlock_irqrestore(&rxq->lock, flags); | |
3557 | } | |
3558 | ||
3559 | /* Convert linear signal-to-noise ratio into dB */ | |
3560 | static u8 ratio2dB[100] = { | |
3561 | /* 0 1 2 3 4 5 6 7 8 9 */ | |
3562 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | |
3563 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | |
3564 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | |
3565 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | |
3566 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | |
3567 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | |
3568 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | |
3569 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | |
3570 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | |
3571 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | |
3572 | }; | |
3573 | ||
3574 | /* Calculates a relative dB value from a ratio of linear | |
3575 | * (i.e. not dB) signal levels. | |
3576 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | |
bb8c093b | 3577 | int iwl4965_calc_db_from_ratio(int sig_ratio) |
b481de9c | 3578 | { |
c899a575 AB |
3579 | /* 1000:1 or higher just report as 60 dB */ |
3580 | if (sig_ratio >= 1000) | |
b481de9c ZY |
3581 | return 60; |
3582 | ||
c899a575 | 3583 | /* 100:1 or higher, divide by 10 and use table, |
b481de9c | 3584 | * add 20 dB to make up for divide by 10 */ |
c899a575 | 3585 | if (sig_ratio >= 100) |
b481de9c ZY |
3586 | return (20 + (int)ratio2dB[sig_ratio/10]); |
3587 | ||
3588 | /* We shouldn't see this */ | |
3589 | if (sig_ratio < 1) | |
3590 | return 0; | |
3591 | ||
3592 | /* Use table for ratios 1:1 - 99:1 */ | |
3593 | return (int)ratio2dB[sig_ratio]; | |
3594 | } | |
3595 | ||
3596 | #define PERFECT_RSSI (-20) /* dBm */ | |
3597 | #define WORST_RSSI (-95) /* dBm */ | |
3598 | #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI) | |
3599 | ||
3600 | /* Calculate an indication of rx signal quality (a percentage, not dBm!). | |
3601 | * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info | |
3602 | * about formulas used below. */ | |
bb8c093b | 3603 | int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm) |
b481de9c ZY |
3604 | { |
3605 | int sig_qual; | |
3606 | int degradation = PERFECT_RSSI - rssi_dbm; | |
3607 | ||
3608 | /* If we get a noise measurement, use signal-to-noise ratio (SNR) | |
3609 | * as indicator; formula is (signal dbm - noise dbm). | |
3610 | * SNR at or above 40 is a great signal (100%). | |
3611 | * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. | |
3612 | * Weakest usable signal is usually 10 - 15 dB SNR. */ | |
3613 | if (noise_dbm) { | |
3614 | if (rssi_dbm - noise_dbm >= 40) | |
3615 | return 100; | |
3616 | else if (rssi_dbm < noise_dbm) | |
3617 | return 0; | |
3618 | sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; | |
3619 | ||
3620 | /* Else use just the signal level. | |
3621 | * This formula is a least squares fit of data points collected and | |
3622 | * compared with a reference system that had a percentage (%) display | |
3623 | * for signal quality. */ | |
3624 | } else | |
3625 | sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation * | |
3626 | (15 * RSSI_RANGE + 62 * degradation)) / | |
3627 | (RSSI_RANGE * RSSI_RANGE); | |
3628 | ||
3629 | if (sig_qual > 100) | |
3630 | sig_qual = 100; | |
3631 | else if (sig_qual < 1) | |
3632 | sig_qual = 0; | |
3633 | ||
3634 | return sig_qual; | |
3635 | } | |
3636 | ||
3637 | /** | |
9fbab516 | 3638 | * iwl4965_rx_handle - Main entry function for receiving responses from uCode |
b481de9c ZY |
3639 | * |
3640 | * Uses the priv->rx_handlers callback function array to invoke | |
3641 | * the appropriate handlers, including command responses, | |
3642 | * frame-received notifications, and other notifications. | |
3643 | */ | |
c79dd5b5 | 3644 | static void iwl4965_rx_handle(struct iwl_priv *priv) |
b481de9c | 3645 | { |
bb8c093b CH |
3646 | struct iwl4965_rx_mem_buffer *rxb; |
3647 | struct iwl4965_rx_packet *pkt; | |
3648 | struct iwl4965_rx_queue *rxq = &priv->rxq; | |
b481de9c ZY |
3649 | u32 r, i; |
3650 | int reclaim; | |
3651 | unsigned long flags; | |
5c0eef96 | 3652 | u8 fill_rx = 0; |
d68ab680 | 3653 | u32 count = 8; |
b481de9c | 3654 | |
6440adb5 BC |
3655 | /* uCode's read index (stored in shared DRAM) indicates the last Rx |
3656 | * buffer that the driver may process (last buffer filled by ucode). */ | |
bb8c093b | 3657 | r = iwl4965_hw_get_rx_read(priv); |
b481de9c ZY |
3658 | i = rxq->read; |
3659 | ||
3660 | /* Rx interrupt, but nothing sent from uCode */ | |
3661 | if (i == r) | |
3662 | IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i); | |
3663 | ||
5c0eef96 MA |
3664 | if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2)) |
3665 | fill_rx = 1; | |
3666 | ||
b481de9c ZY |
3667 | while (i != r) { |
3668 | rxb = rxq->queue[i]; | |
3669 | ||
9fbab516 | 3670 | /* If an RXB doesn't have a Rx queue slot associated with it, |
b481de9c ZY |
3671 | * then a bug has been introduced in the queue refilling |
3672 | * routines -- catch it here */ | |
3673 | BUG_ON(rxb == NULL); | |
3674 | ||
3675 | rxq->queue[i] = NULL; | |
3676 | ||
3677 | pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 3678 | priv->hw_params.rx_buf_size, |
b481de9c | 3679 | PCI_DMA_FROMDEVICE); |
bb8c093b | 3680 | pkt = (struct iwl4965_rx_packet *)rxb->skb->data; |
b481de9c ZY |
3681 | |
3682 | /* Reclaim a command buffer only if this packet is a response | |
3683 | * to a (driver-originated) command. | |
3684 | * If the packet (e.g. Rx frame) originated from uCode, | |
3685 | * there is no command buffer to reclaim. | |
3686 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | |
3687 | * but apparently a few don't get set; catch them here. */ | |
3688 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | |
3689 | (pkt->hdr.cmd != REPLY_RX_PHY_CMD) && | |
857485c0 | 3690 | (pkt->hdr.cmd != REPLY_RX) && |
cfe01709 | 3691 | (pkt->hdr.cmd != REPLY_COMPRESSED_BA) && |
b481de9c ZY |
3692 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && |
3693 | (pkt->hdr.cmd != REPLY_TX); | |
3694 | ||
3695 | /* Based on type of command response or notification, | |
3696 | * handle those that need handling via function in | |
bb8c093b | 3697 | * rx_handlers table. See iwl4965_setup_rx_handlers() */ |
b481de9c ZY |
3698 | if (priv->rx_handlers[pkt->hdr.cmd]) { |
3699 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
3700 | "r = %d, i = %d, %s, 0x%02x\n", r, i, | |
3701 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | |
3702 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | |
3703 | } else { | |
3704 | /* No handling needed */ | |
3705 | IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR, | |
3706 | "r %d i %d No handler needed for %s, 0x%02x\n", | |
3707 | r, i, get_cmd_string(pkt->hdr.cmd), | |
3708 | pkt->hdr.cmd); | |
3709 | } | |
3710 | ||
3711 | if (reclaim) { | |
9fbab516 | 3712 | /* Invoke any callbacks, transfer the skb to caller, and |
857485c0 | 3713 | * fire off the (possibly) blocking iwl_send_cmd() |
b481de9c ZY |
3714 | * as we reclaim the driver command queue */ |
3715 | if (rxb && rxb->skb) | |
bb8c093b | 3716 | iwl4965_tx_cmd_complete(priv, rxb); |
b481de9c ZY |
3717 | else |
3718 | IWL_WARNING("Claim null rxb?\n"); | |
3719 | } | |
3720 | ||
3721 | /* For now we just don't re-use anything. We can tweak this | |
3722 | * later to try and re-use notification packets and SKBs that | |
3723 | * fail to Rx correctly */ | |
3724 | if (rxb->skb != NULL) { | |
3725 | priv->alloc_rxb_skb--; | |
3726 | dev_kfree_skb_any(rxb->skb); | |
3727 | rxb->skb = NULL; | |
3728 | } | |
3729 | ||
3730 | pci_unmap_single(priv->pci_dev, rxb->dma_addr, | |
5425e490 | 3731 | priv->hw_params.rx_buf_size, |
9ee1ba47 | 3732 | PCI_DMA_FROMDEVICE); |
b481de9c ZY |
3733 | spin_lock_irqsave(&rxq->lock, flags); |
3734 | list_add_tail(&rxb->list, &priv->rxq.rx_used); | |
3735 | spin_unlock_irqrestore(&rxq->lock, flags); | |
3736 | i = (i + 1) & RX_QUEUE_MASK; | |
5c0eef96 MA |
3737 | /* If there are a lot of unused frames, |
3738 | * restock the Rx queue so ucode wont assert. */ | |
3739 | if (fill_rx) { | |
3740 | count++; | |
3741 | if (count >= 8) { | |
3742 | priv->rxq.read = i; | |
3743 | __iwl4965_rx_replenish(priv); | |
3744 | count = 0; | |
3745 | } | |
3746 | } | |
b481de9c ZY |
3747 | } |
3748 | ||
3749 | /* Backtrack one entry */ | |
3750 | priv->rxq.read = i; | |
bb8c093b | 3751 | iwl4965_rx_queue_restock(priv); |
b481de9c ZY |
3752 | } |
3753 | ||
6440adb5 BC |
3754 | /** |
3755 | * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware | |
3756 | */ | |
c79dd5b5 | 3757 | static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, |
bb8c093b | 3758 | struct iwl4965_tx_queue *txq) |
b481de9c ZY |
3759 | { |
3760 | u32 reg = 0; | |
3761 | int rc = 0; | |
3762 | int txq_id = txq->q.id; | |
3763 | ||
3764 | if (txq->need_update == 0) | |
3765 | return rc; | |
3766 | ||
3767 | /* if we're trying to save power */ | |
3768 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | |
3769 | /* wake up nic if it's powered down ... | |
3770 | * uCode will wake up, and interrupt us again, so next | |
3771 | * time we'll skip this part. */ | |
3395f6e9 | 3772 | reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); |
b481de9c ZY |
3773 | |
3774 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | |
3775 | IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); | |
3395f6e9 | 3776 | iwl_set_bit(priv, CSR_GP_CNTRL, |
b481de9c ZY |
3777 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
3778 | return rc; | |
3779 | } | |
3780 | ||
3781 | /* restore this queue's parameters in nic hardware. */ | |
3395f6e9 | 3782 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3783 | if (rc) |
3784 | return rc; | |
3395f6e9 | 3785 | iwl_write_direct32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 3786 | txq->q.write_ptr | (txq_id << 8)); |
3395f6e9 | 3787 | iwl_release_nic_access(priv); |
b481de9c ZY |
3788 | |
3789 | /* else not in power-save mode, uCode will never sleep when we're | |
3790 | * trying to tx (during RFKILL, we're not trying to tx). */ | |
3791 | } else | |
3395f6e9 | 3792 | iwl_write32(priv, HBUS_TARG_WRPTR, |
fc4b6853 | 3793 | txq->q.write_ptr | (txq_id << 8)); |
b481de9c ZY |
3794 | |
3795 | txq->need_update = 0; | |
3796 | ||
3797 | return rc; | |
3798 | } | |
3799 | ||
0a6857e7 | 3800 | #ifdef CONFIG_IWLWIFI_DEBUG |
bb8c093b | 3801 | static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon) |
b481de9c | 3802 | { |
0795af57 JP |
3803 | DECLARE_MAC_BUF(mac); |
3804 | ||
b481de9c | 3805 | IWL_DEBUG_RADIO("RX CONFIG:\n"); |
0a6857e7 | 3806 | iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon)); |
b481de9c ZY |
3807 | IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel)); |
3808 | IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags)); | |
3809 | IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n", | |
3810 | le32_to_cpu(rxon->filter_flags)); | |
3811 | IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type); | |
3812 | IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n", | |
3813 | rxon->ofdm_basic_rates); | |
3814 | IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates); | |
0795af57 JP |
3815 | IWL_DEBUG_RADIO("u8[6] node_addr: %s\n", |
3816 | print_mac(mac, rxon->node_addr)); | |
3817 | IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n", | |
3818 | print_mac(mac, rxon->bssid_addr)); | |
b481de9c ZY |
3819 | IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); |
3820 | } | |
3821 | #endif | |
3822 | ||
c79dd5b5 | 3823 | static void iwl4965_enable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
3824 | { |
3825 | IWL_DEBUG_ISR("Enabling interrupts\n"); | |
3826 | set_bit(STATUS_INT_ENABLED, &priv->status); | |
3395f6e9 | 3827 | iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); |
b481de9c ZY |
3828 | } |
3829 | ||
0359facc MA |
3830 | /* call this function to flush any scheduled tasklet */ |
3831 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | |
3832 | { | |
3833 | /* wait to make sure we flush pedding tasklet*/ | |
3834 | synchronize_irq(priv->pci_dev->irq); | |
3835 | tasklet_kill(&priv->irq_tasklet); | |
3836 | } | |
3837 | ||
c79dd5b5 | 3838 | static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) |
b481de9c ZY |
3839 | { |
3840 | clear_bit(STATUS_INT_ENABLED, &priv->status); | |
3841 | ||
3842 | /* disable interrupts from uCode/NIC to host */ | |
3395f6e9 | 3843 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); |
b481de9c ZY |
3844 | |
3845 | /* acknowledge/clear/reset any interrupts still pending | |
3846 | * from uCode or flow handler (Rx/Tx DMA) */ | |
3395f6e9 TW |
3847 | iwl_write32(priv, CSR_INT, 0xffffffff); |
3848 | iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); | |
b481de9c ZY |
3849 | IWL_DEBUG_ISR("Disabled interrupts\n"); |
3850 | } | |
3851 | ||
3852 | static const char *desc_lookup(int i) | |
3853 | { | |
3854 | switch (i) { | |
3855 | case 1: | |
3856 | return "FAIL"; | |
3857 | case 2: | |
3858 | return "BAD_PARAM"; | |
3859 | case 3: | |
3860 | return "BAD_CHECKSUM"; | |
3861 | case 4: | |
3862 | return "NMI_INTERRUPT"; | |
3863 | case 5: | |
3864 | return "SYSASSERT"; | |
3865 | case 6: | |
3866 | return "FATAL_ERROR"; | |
3867 | } | |
3868 | ||
3869 | return "UNKNOWN"; | |
3870 | } | |
3871 | ||
3872 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | |
3873 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | |
3874 | ||
c79dd5b5 | 3875 | static void iwl4965_dump_nic_error_log(struct iwl_priv *priv) |
b481de9c ZY |
3876 | { |
3877 | u32 data2, line; | |
3878 | u32 desc, time, count, base, data1; | |
3879 | u32 blink1, blink2, ilink1, ilink2; | |
3880 | int rc; | |
3881 | ||
3882 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | |
3883 | ||
57aab75a | 3884 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
b481de9c ZY |
3885 | IWL_ERROR("Not valid error log pointer 0x%08X\n", base); |
3886 | return; | |
3887 | } | |
3888 | ||
3395f6e9 | 3889 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3890 | if (rc) { |
3891 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
3892 | return; | |
3893 | } | |
3894 | ||
3395f6e9 | 3895 | count = iwl_read_targ_mem(priv, base); |
b481de9c ZY |
3896 | |
3897 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | |
3898 | IWL_ERROR("Start IWL Error Log Dump:\n"); | |
2acae16e | 3899 | IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count); |
b481de9c ZY |
3900 | } |
3901 | ||
3395f6e9 TW |
3902 | desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); |
3903 | blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32)); | |
3904 | blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32)); | |
3905 | ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32)); | |
3906 | ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32)); | |
3907 | data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32)); | |
3908 | data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32)); | |
3909 | line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); | |
3910 | time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); | |
b481de9c ZY |
3911 | |
3912 | IWL_ERROR("Desc Time " | |
3913 | "data1 data2 line\n"); | |
3914 | IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n", | |
3915 | desc_lookup(desc), desc, time, data1, data2, line); | |
3916 | IWL_ERROR("blink1 blink2 ilink1 ilink2\n"); | |
3917 | IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, | |
3918 | ilink1, ilink2); | |
3919 | ||
3395f6e9 | 3920 | iwl_release_nic_access(priv); |
b481de9c ZY |
3921 | } |
3922 | ||
3923 | #define EVENT_START_OFFSET (4 * sizeof(u32)) | |
3924 | ||
3925 | /** | |
bb8c093b | 3926 | * iwl4965_print_event_log - Dump error event log to syslog |
b481de9c | 3927 | * |
3395f6e9 | 3928 | * NOTE: Must be called with iwl_grab_nic_access() already obtained! |
b481de9c | 3929 | */ |
c79dd5b5 | 3930 | static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx, |
b481de9c ZY |
3931 | u32 num_events, u32 mode) |
3932 | { | |
3933 | u32 i; | |
3934 | u32 base; /* SRAM byte address of event log header */ | |
3935 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | |
3936 | u32 ptr; /* SRAM byte address of log data */ | |
3937 | u32 ev, time, data; /* event log data */ | |
3938 | ||
3939 | if (num_events == 0) | |
3940 | return; | |
3941 | ||
3942 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
3943 | ||
3944 | if (mode == 0) | |
3945 | event_size = 2 * sizeof(u32); | |
3946 | else | |
3947 | event_size = 3 * sizeof(u32); | |
3948 | ||
3949 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | |
3950 | ||
3951 | /* "time" is actually "data" for mode 0 (no timestamp). | |
3952 | * place event id # at far right for easier visual parsing. */ | |
3953 | for (i = 0; i < num_events; i++) { | |
3395f6e9 | 3954 | ev = iwl_read_targ_mem(priv, ptr); |
b481de9c | 3955 | ptr += sizeof(u32); |
3395f6e9 | 3956 | time = iwl_read_targ_mem(priv, ptr); |
b481de9c ZY |
3957 | ptr += sizeof(u32); |
3958 | if (mode == 0) | |
3959 | IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */ | |
3960 | else { | |
3395f6e9 | 3961 | data = iwl_read_targ_mem(priv, ptr); |
b481de9c ZY |
3962 | ptr += sizeof(u32); |
3963 | IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev); | |
3964 | } | |
3965 | } | |
3966 | } | |
3967 | ||
c79dd5b5 | 3968 | static void iwl4965_dump_nic_event_log(struct iwl_priv *priv) |
b481de9c ZY |
3969 | { |
3970 | int rc; | |
3971 | u32 base; /* SRAM byte address of event log header */ | |
3972 | u32 capacity; /* event log capacity in # entries */ | |
3973 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | |
3974 | u32 num_wraps; /* # times uCode wrapped to top of log */ | |
3975 | u32 next_entry; /* index of next entry to be written by uCode */ | |
3976 | u32 size; /* # entries that we'll print */ | |
3977 | ||
3978 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | |
57aab75a | 3979 | if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { |
b481de9c ZY |
3980 | IWL_ERROR("Invalid event log pointer 0x%08X\n", base); |
3981 | return; | |
3982 | } | |
3983 | ||
3395f6e9 | 3984 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
3985 | if (rc) { |
3986 | IWL_WARNING("Can not read from adapter at this time.\n"); | |
3987 | return; | |
3988 | } | |
3989 | ||
3990 | /* event log header */ | |
3395f6e9 TW |
3991 | capacity = iwl_read_targ_mem(priv, base); |
3992 | mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); | |
3993 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); | |
3994 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); | |
b481de9c ZY |
3995 | |
3996 | size = num_wraps ? capacity : next_entry; | |
3997 | ||
3998 | /* bail out if nothing in log */ | |
3999 | if (size == 0) { | |
583fab37 | 4000 | IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); |
3395f6e9 | 4001 | iwl_release_nic_access(priv); |
b481de9c ZY |
4002 | return; |
4003 | } | |
4004 | ||
583fab37 | 4005 | IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n", |
b481de9c ZY |
4006 | size, num_wraps); |
4007 | ||
4008 | /* if uCode has wrapped back to top of log, start at the oldest entry, | |
4009 | * i.e the next one that uCode would fill. */ | |
4010 | if (num_wraps) | |
bb8c093b | 4011 | iwl4965_print_event_log(priv, next_entry, |
b481de9c ZY |
4012 | capacity - next_entry, mode); |
4013 | ||
4014 | /* (then/else) start at top of log */ | |
bb8c093b | 4015 | iwl4965_print_event_log(priv, 0, next_entry, mode); |
b481de9c | 4016 | |
3395f6e9 | 4017 | iwl_release_nic_access(priv); |
b481de9c ZY |
4018 | } |
4019 | ||
4020 | /** | |
bb8c093b | 4021 | * iwl4965_irq_handle_error - called for HW or SW error interrupt from card |
b481de9c | 4022 | */ |
c79dd5b5 | 4023 | static void iwl4965_irq_handle_error(struct iwl_priv *priv) |
b481de9c | 4024 | { |
bb8c093b | 4025 | /* Set the FW error flag -- cleared on iwl4965_down */ |
b481de9c ZY |
4026 | set_bit(STATUS_FW_ERROR, &priv->status); |
4027 | ||
4028 | /* Cancel currently queued command. */ | |
4029 | clear_bit(STATUS_HCMD_ACTIVE, &priv->status); | |
4030 | ||
0a6857e7 TW |
4031 | #ifdef CONFIG_IWLWIFI_DEBUG |
4032 | if (iwl_debug_level & IWL_DL_FW_ERRORS) { | |
bb8c093b CH |
4033 | iwl4965_dump_nic_error_log(priv); |
4034 | iwl4965_dump_nic_event_log(priv); | |
4035 | iwl4965_print_rx_config_cmd(&priv->staging_rxon); | |
b481de9c ZY |
4036 | } |
4037 | #endif | |
4038 | ||
4039 | wake_up_interruptible(&priv->wait_command_queue); | |
4040 | ||
4041 | /* Keep the restart process from trying to send host | |
4042 | * commands by clearing the INIT status bit */ | |
4043 | clear_bit(STATUS_READY, &priv->status); | |
4044 | ||
4045 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
4046 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS, | |
4047 | "Restarting adapter due to uCode error.\n"); | |
4048 | ||
3109ece1 | 4049 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
4050 | memcpy(&priv->recovery_rxon, &priv->active_rxon, |
4051 | sizeof(priv->recovery_rxon)); | |
4052 | priv->error_recovering = 1; | |
4053 | } | |
4054 | queue_work(priv->workqueue, &priv->restart); | |
4055 | } | |
4056 | } | |
4057 | ||
c79dd5b5 | 4058 | static void iwl4965_error_recovery(struct iwl_priv *priv) |
b481de9c ZY |
4059 | { |
4060 | unsigned long flags; | |
4061 | ||
4062 | memcpy(&priv->staging_rxon, &priv->recovery_rxon, | |
4063 | sizeof(priv->staging_rxon)); | |
4064 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 4065 | iwl4965_commit_rxon(priv); |
b481de9c | 4066 | |
bb8c093b | 4067 | iwl4965_rxon_add_station(priv, priv->bssid, 1); |
b481de9c ZY |
4068 | |
4069 | spin_lock_irqsave(&priv->lock, flags); | |
4070 | priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id); | |
4071 | priv->error_recovering = 0; | |
4072 | spin_unlock_irqrestore(&priv->lock, flags); | |
4073 | } | |
4074 | ||
c79dd5b5 | 4075 | static void iwl4965_irq_tasklet(struct iwl_priv *priv) |
b481de9c ZY |
4076 | { |
4077 | u32 inta, handled = 0; | |
4078 | u32 inta_fh; | |
4079 | unsigned long flags; | |
0a6857e7 | 4080 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
4081 | u32 inta_mask; |
4082 | #endif | |
4083 | ||
4084 | spin_lock_irqsave(&priv->lock, flags); | |
4085 | ||
4086 | /* Ack/clear/reset pending uCode interrupts. | |
4087 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | |
4088 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | |
3395f6e9 TW |
4089 | inta = iwl_read32(priv, CSR_INT); |
4090 | iwl_write32(priv, CSR_INT, inta); | |
b481de9c ZY |
4091 | |
4092 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | |
4093 | * Any new interrupts that happen after this, either while we're | |
4094 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | |
3395f6e9 TW |
4095 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); |
4096 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | |
b481de9c | 4097 | |
0a6857e7 TW |
4098 | #ifdef CONFIG_IWLWIFI_DEBUG |
4099 | if (iwl_debug_level & IWL_DL_ISR) { | |
9fbab516 | 4100 | /* just for debug */ |
3395f6e9 | 4101 | inta_mask = iwl_read32(priv, CSR_INT_MASK); |
b481de9c ZY |
4102 | IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", |
4103 | inta, inta_mask, inta_fh); | |
4104 | } | |
4105 | #endif | |
4106 | ||
4107 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | |
4108 | * atomic, make sure that inta covers all the interrupts that | |
4109 | * we've discovered, even if FH interrupt came in just after | |
4110 | * reading CSR_INT. */ | |
6f83eaa1 | 4111 | if (inta_fh & CSR49_FH_INT_RX_MASK) |
b481de9c | 4112 | inta |= CSR_INT_BIT_FH_RX; |
6f83eaa1 | 4113 | if (inta_fh & CSR49_FH_INT_TX_MASK) |
b481de9c ZY |
4114 | inta |= CSR_INT_BIT_FH_TX; |
4115 | ||
4116 | /* Now service all interrupt bits discovered above. */ | |
4117 | if (inta & CSR_INT_BIT_HW_ERR) { | |
4118 | IWL_ERROR("Microcode HW error detected. Restarting.\n"); | |
4119 | ||
4120 | /* Tell the device to stop sending interrupts */ | |
bb8c093b | 4121 | iwl4965_disable_interrupts(priv); |
b481de9c | 4122 | |
bb8c093b | 4123 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
4124 | |
4125 | handled |= CSR_INT_BIT_HW_ERR; | |
4126 | ||
4127 | spin_unlock_irqrestore(&priv->lock, flags); | |
4128 | ||
4129 | return; | |
4130 | } | |
4131 | ||
0a6857e7 TW |
4132 | #ifdef CONFIG_IWLWIFI_DEBUG |
4133 | if (iwl_debug_level & (IWL_DL_ISR)) { | |
b481de9c | 4134 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ |
25c03d8e JP |
4135 | if (inta & CSR_INT_BIT_SCD) |
4136 | IWL_DEBUG_ISR("Scheduler finished to transmit " | |
4137 | "the frame/frames.\n"); | |
b481de9c ZY |
4138 | |
4139 | /* Alive notification via Rx interrupt will do the real work */ | |
4140 | if (inta & CSR_INT_BIT_ALIVE) | |
4141 | IWL_DEBUG_ISR("Alive interrupt\n"); | |
4142 | } | |
4143 | #endif | |
4144 | /* Safely ignore these bits for debug checks below */ | |
25c03d8e | 4145 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); |
b481de9c | 4146 | |
9fbab516 | 4147 | /* HW RF KILL switch toggled */ |
b481de9c ZY |
4148 | if (inta & CSR_INT_BIT_RF_KILL) { |
4149 | int hw_rf_kill = 0; | |
3395f6e9 | 4150 | if (!(iwl_read32(priv, CSR_GP_CNTRL) & |
b481de9c ZY |
4151 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) |
4152 | hw_rf_kill = 1; | |
4153 | ||
4154 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR, | |
4155 | "RF_KILL bit toggled to %s.\n", | |
4156 | hw_rf_kill ? "disable radio":"enable radio"); | |
4157 | ||
4158 | /* Queue restart only if RF_KILL switch was set to "kill" | |
4159 | * when we loaded driver, and is now set to "enable". | |
4160 | * After we're Alive, RF_KILL gets handled by | |
3230455d | 4161 | * iwl4965_rx_card_state_notif() */ |
53e49093 ZY |
4162 | if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) { |
4163 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
b481de9c | 4164 | queue_work(priv->workqueue, &priv->restart); |
53e49093 | 4165 | } |
b481de9c ZY |
4166 | |
4167 | handled |= CSR_INT_BIT_RF_KILL; | |
4168 | } | |
4169 | ||
9fbab516 | 4170 | /* Chip got too hot and stopped itself */ |
b481de9c ZY |
4171 | if (inta & CSR_INT_BIT_CT_KILL) { |
4172 | IWL_ERROR("Microcode CT kill error detected.\n"); | |
4173 | handled |= CSR_INT_BIT_CT_KILL; | |
4174 | } | |
4175 | ||
4176 | /* Error detected by uCode */ | |
4177 | if (inta & CSR_INT_BIT_SW_ERR) { | |
4178 | IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n", | |
4179 | inta); | |
bb8c093b | 4180 | iwl4965_irq_handle_error(priv); |
b481de9c ZY |
4181 | handled |= CSR_INT_BIT_SW_ERR; |
4182 | } | |
4183 | ||
4184 | /* uCode wakes up after power-down sleep */ | |
4185 | if (inta & CSR_INT_BIT_WAKEUP) { | |
4186 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | |
bb8c093b CH |
4187 | iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq); |
4188 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]); | |
4189 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]); | |
4190 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]); | |
4191 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]); | |
4192 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]); | |
4193 | iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]); | |
b481de9c ZY |
4194 | |
4195 | handled |= CSR_INT_BIT_WAKEUP; | |
4196 | } | |
4197 | ||
4198 | /* All uCode command responses, including Tx command responses, | |
4199 | * Rx "responses" (frame-received notification), and other | |
4200 | * notifications from uCode come through here*/ | |
4201 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | |
bb8c093b | 4202 | iwl4965_rx_handle(priv); |
b481de9c ZY |
4203 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); |
4204 | } | |
4205 | ||
4206 | if (inta & CSR_INT_BIT_FH_TX) { | |
4207 | IWL_DEBUG_ISR("Tx interrupt\n"); | |
4208 | handled |= CSR_INT_BIT_FH_TX; | |
4209 | } | |
4210 | ||
4211 | if (inta & ~handled) | |
4212 | IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled); | |
4213 | ||
4214 | if (inta & ~CSR_INI_SET_MASK) { | |
4215 | IWL_WARNING("Disabled INTA bits 0x%08x were pending\n", | |
4216 | inta & ~CSR_INI_SET_MASK); | |
4217 | IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh); | |
4218 | } | |
4219 | ||
4220 | /* Re-enable all interrupts */ | |
0359facc MA |
4221 | /* only Re-enable if diabled by irq */ |
4222 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
4223 | iwl4965_enable_interrupts(priv); | |
b481de9c | 4224 | |
0a6857e7 TW |
4225 | #ifdef CONFIG_IWLWIFI_DEBUG |
4226 | if (iwl_debug_level & (IWL_DL_ISR)) { | |
3395f6e9 TW |
4227 | inta = iwl_read32(priv, CSR_INT); |
4228 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | |
4229 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
4230 | IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " |
4231 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | |
4232 | } | |
4233 | #endif | |
4234 | spin_unlock_irqrestore(&priv->lock, flags); | |
4235 | } | |
4236 | ||
bb8c093b | 4237 | static irqreturn_t iwl4965_isr(int irq, void *data) |
b481de9c | 4238 | { |
c79dd5b5 | 4239 | struct iwl_priv *priv = data; |
b481de9c ZY |
4240 | u32 inta, inta_mask; |
4241 | u32 inta_fh; | |
4242 | if (!priv) | |
4243 | return IRQ_NONE; | |
4244 | ||
4245 | spin_lock(&priv->lock); | |
4246 | ||
4247 | /* Disable (but don't clear!) interrupts here to avoid | |
4248 | * back-to-back ISRs and sporadic interrupts from our NIC. | |
4249 | * If we have something to service, the tasklet will re-enable ints. | |
4250 | * If we *don't* have something, we'll re-enable before leaving here. */ | |
3395f6e9 TW |
4251 | inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */ |
4252 | iwl_write32(priv, CSR_INT_MASK, 0x00000000); | |
b481de9c ZY |
4253 | |
4254 | /* Discover which interrupts are active/pending */ | |
3395f6e9 TW |
4255 | inta = iwl_read32(priv, CSR_INT); |
4256 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | |
b481de9c ZY |
4257 | |
4258 | /* Ignore interrupt if there's nothing in NIC to service. | |
4259 | * This may be due to IRQ shared with another device, | |
4260 | * or due to sporadic interrupts thrown from our NIC. */ | |
4261 | if (!inta && !inta_fh) { | |
4262 | IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n"); | |
4263 | goto none; | |
4264 | } | |
4265 | ||
4266 | if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) { | |
66fbb541 ON |
4267 | /* Hardware disappeared. It might have already raised |
4268 | * an interrupt */ | |
b481de9c | 4269 | IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta); |
66fbb541 | 4270 | goto unplugged; |
b481de9c ZY |
4271 | } |
4272 | ||
4273 | IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | |
4274 | inta, inta_mask, inta_fh); | |
4275 | ||
25c03d8e JP |
4276 | inta &= ~CSR_INT_BIT_SCD; |
4277 | ||
bb8c093b | 4278 | /* iwl4965_irq_tasklet() will service interrupts and re-enable them */ |
25c03d8e JP |
4279 | if (likely(inta || inta_fh)) |
4280 | tasklet_schedule(&priv->irq_tasklet); | |
b481de9c | 4281 | |
66fbb541 ON |
4282 | unplugged: |
4283 | spin_unlock(&priv->lock); | |
b481de9c ZY |
4284 | return IRQ_HANDLED; |
4285 | ||
4286 | none: | |
4287 | /* re-enable interrupts here since we don't have anything to service. */ | |
0359facc MA |
4288 | /* only Re-enable if diabled by irq */ |
4289 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | |
4290 | iwl4965_enable_interrupts(priv); | |
b481de9c ZY |
4291 | spin_unlock(&priv->lock); |
4292 | return IRQ_NONE; | |
4293 | } | |
4294 | ||
b481de9c ZY |
4295 | /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after |
4296 | * sending probe req. This should be set long enough to hear probe responses | |
4297 | * from more than one AP. */ | |
4298 | #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
4299 | #define IWL_ACTIVE_DWELL_TIME_52 (10) | |
4300 | ||
4301 | /* For faster active scanning, scan will move to the next channel if fewer than | |
4302 | * PLCP_QUIET_THRESH packets are heard on this channel within | |
4303 | * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell | |
4304 | * time if it's a quiet channel (nothing responded to our probe, and there's | |
4305 | * no other traffic). | |
4306 | * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */ | |
4307 | #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */ | |
4308 | #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */ | |
4309 | ||
4310 | /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel. | |
4311 | * Must be set longer than active dwell time. | |
4312 | * For the most reliable scan, set > AP beacon interval (typically 100msec). */ | |
4313 | #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */ | |
4314 | #define IWL_PASSIVE_DWELL_TIME_52 (10) | |
4315 | #define IWL_PASSIVE_DWELL_BASE (100) | |
4316 | #define IWL_CHANNEL_TUNE_TIME 5 | |
4317 | ||
c79dd5b5 | 4318 | static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv, |
8318d78a | 4319 | enum ieee80211_band band) |
b481de9c | 4320 | { |
8318d78a | 4321 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
4322 | return IWL_ACTIVE_DWELL_TIME_52; |
4323 | else | |
4324 | return IWL_ACTIVE_DWELL_TIME_24; | |
4325 | } | |
4326 | ||
c79dd5b5 | 4327 | static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv, |
8318d78a | 4328 | enum ieee80211_band band) |
b481de9c | 4329 | { |
8318d78a JB |
4330 | u16 active = iwl4965_get_active_dwell_time(priv, band); |
4331 | u16 passive = (band != IEEE80211_BAND_5GHZ) ? | |
b481de9c ZY |
4332 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 : |
4333 | IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52; | |
4334 | ||
3109ece1 | 4335 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
4336 | /* If we're associated, we clamp the maximum passive |
4337 | * dwell time to be 98% of the beacon interval (minus | |
4338 | * 2 * channel tune time) */ | |
4339 | passive = priv->beacon_int; | |
4340 | if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive) | |
4341 | passive = IWL_PASSIVE_DWELL_BASE; | |
4342 | passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2; | |
4343 | } | |
4344 | ||
4345 | if (passive <= active) | |
4346 | passive = active + 1; | |
4347 | ||
4348 | return passive; | |
4349 | } | |
4350 | ||
c79dd5b5 | 4351 | static int iwl4965_get_channels_for_scan(struct iwl_priv *priv, |
8318d78a | 4352 | enum ieee80211_band band, |
b481de9c | 4353 | u8 is_active, u8 direct_mask, |
bb8c093b | 4354 | struct iwl4965_scan_channel *scan_ch) |
b481de9c ZY |
4355 | { |
4356 | const struct ieee80211_channel *channels = NULL; | |
8318d78a | 4357 | const struct ieee80211_supported_band *sband; |
bf85ea4f | 4358 | const struct iwl_channel_info *ch_info; |
b481de9c ZY |
4359 | u16 passive_dwell = 0; |
4360 | u16 active_dwell = 0; | |
4361 | int added, i; | |
4362 | ||
8318d78a JB |
4363 | sband = iwl4965_get_hw_mode(priv, band); |
4364 | if (!sband) | |
b481de9c ZY |
4365 | return 0; |
4366 | ||
8318d78a | 4367 | channels = sband->channels; |
b481de9c | 4368 | |
8318d78a JB |
4369 | active_dwell = iwl4965_get_active_dwell_time(priv, band); |
4370 | passive_dwell = iwl4965_get_passive_dwell_time(priv, band); | |
b481de9c | 4371 | |
8318d78a | 4372 | for (i = 0, added = 0; i < sband->n_channels; i++) { |
182e2e66 JB |
4373 | if (channels[i].flags & IEEE80211_CHAN_DISABLED) |
4374 | continue; | |
4375 | ||
8318d78a | 4376 | scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq); |
b481de9c | 4377 | |
8622e705 | 4378 | ch_info = iwl_get_channel_info(priv, band, |
9fbab516 | 4379 | scan_ch->channel); |
b481de9c ZY |
4380 | if (!is_channel_valid(ch_info)) { |
4381 | IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n", | |
4382 | scan_ch->channel); | |
4383 | continue; | |
4384 | } | |
4385 | ||
4386 | if (!is_active || is_channel_passive(ch_info) || | |
8318d78a | 4387 | (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) |
b481de9c ZY |
4388 | scan_ch->type = 0; /* passive */ |
4389 | else | |
4390 | scan_ch->type = 1; /* active */ | |
4391 | ||
4392 | if (scan_ch->type & 1) | |
4393 | scan_ch->type |= (direct_mask << 1); | |
4394 | ||
b481de9c ZY |
4395 | scan_ch->active_dwell = cpu_to_le16(active_dwell); |
4396 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | |
4397 | ||
9fbab516 | 4398 | /* Set txpower levels to defaults */ |
b481de9c ZY |
4399 | scan_ch->tpc.dsp_atten = 110; |
4400 | /* scan_pwr_info->tpc.dsp_atten; */ | |
4401 | ||
4402 | /*scan_pwr_info->tpc.tx_gain; */ | |
8318d78a | 4403 | if (band == IEEE80211_BAND_5GHZ) |
b481de9c ZY |
4404 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; |
4405 | else { | |
4406 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | |
4407 | /* NOTE: if we were doing 6Mb OFDM for scans we'd use | |
9fbab516 | 4408 | * power level: |
8a1b0245 | 4409 | * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; |
b481de9c ZY |
4410 | */ |
4411 | } | |
4412 | ||
4413 | IWL_DEBUG_SCAN("Scanning %d [%s %d]\n", | |
4414 | scan_ch->channel, | |
4415 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | |
4416 | (scan_ch->type & 1) ? | |
4417 | active_dwell : passive_dwell); | |
4418 | ||
4419 | scan_ch++; | |
4420 | added++; | |
4421 | } | |
4422 | ||
4423 | IWL_DEBUG_SCAN("total channels to scan %d \n", added); | |
4424 | return added; | |
4425 | } | |
4426 | ||
c79dd5b5 | 4427 | static void iwl4965_init_hw_rates(struct iwl_priv *priv, |
b481de9c ZY |
4428 | struct ieee80211_rate *rates) |
4429 | { | |
4430 | int i; | |
4431 | ||
4432 | for (i = 0; i < IWL_RATE_COUNT; i++) { | |
8318d78a JB |
4433 | rates[i].bitrate = iwl4965_rates[i].ieee * 5; |
4434 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ | |
4435 | rates[i].hw_value_short = i; | |
4436 | rates[i].flags = 0; | |
4437 | if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) { | |
b481de9c | 4438 | /* |
8318d78a | 4439 | * If CCK != 1M then set short preamble rate flag. |
b481de9c | 4440 | */ |
35cdeaf4 TW |
4441 | rates[i].flags |= |
4442 | (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ? | |
4443 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; | |
b481de9c | 4444 | } |
b481de9c | 4445 | } |
b481de9c ZY |
4446 | } |
4447 | ||
4448 | /** | |
bb8c093b | 4449 | * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom |
b481de9c | 4450 | */ |
bf85ea4f | 4451 | int iwl4965_init_geos(struct iwl_priv *priv) |
b481de9c | 4452 | { |
bf85ea4f | 4453 | struct iwl_channel_info *ch; |
8211ef78 | 4454 | struct ieee80211_supported_band *sband; |
b481de9c ZY |
4455 | struct ieee80211_channel *channels; |
4456 | struct ieee80211_channel *geo_ch; | |
4457 | struct ieee80211_rate *rates; | |
4458 | int i = 0; | |
b481de9c | 4459 | |
8318d78a JB |
4460 | if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates || |
4461 | priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) { | |
b481de9c ZY |
4462 | IWL_DEBUG_INFO("Geography modes already initialized.\n"); |
4463 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
4464 | return 0; | |
4465 | } | |
4466 | ||
b481de9c ZY |
4467 | channels = kzalloc(sizeof(struct ieee80211_channel) * |
4468 | priv->channel_count, GFP_KERNEL); | |
8318d78a | 4469 | if (!channels) |
b481de9c | 4470 | return -ENOMEM; |
b481de9c | 4471 | |
8211ef78 | 4472 | rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)), |
b481de9c ZY |
4473 | GFP_KERNEL); |
4474 | if (!rates) { | |
b481de9c ZY |
4475 | kfree(channels); |
4476 | return -ENOMEM; | |
4477 | } | |
4478 | ||
b481de9c | 4479 | /* 5.2GHz channels start after the 2.4GHz channels */ |
8211ef78 | 4480 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; |
bf85ea4f | 4481 | sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)]; |
8211ef78 TW |
4482 | /* just OFDM */ |
4483 | sband->bitrates = &rates[IWL_FIRST_OFDM_RATE]; | |
4484 | sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE; | |
8318d78a | 4485 | |
1ea87396 | 4486 | iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ); |
78330fdd | 4487 | |
8211ef78 TW |
4488 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; |
4489 | sband->channels = channels; | |
4490 | /* OFDM & CCK */ | |
4491 | sband->bitrates = rates; | |
4492 | sband->n_bitrates = IWL_RATE_COUNT; | |
b481de9c | 4493 | |
1ea87396 | 4494 | iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ); |
78330fdd | 4495 | |
b481de9c ZY |
4496 | priv->ieee_channels = channels; |
4497 | priv->ieee_rates = rates; | |
4498 | ||
bb8c093b | 4499 | iwl4965_init_hw_rates(priv, rates); |
b481de9c | 4500 | |
8211ef78 | 4501 | for (i = 0; i < priv->channel_count; i++) { |
b481de9c ZY |
4502 | ch = &priv->channel_info[i]; |
4503 | ||
8211ef78 TW |
4504 | /* FIXME: might be removed if scan is OK */ |
4505 | if (!is_channel_valid(ch)) | |
b481de9c | 4506 | continue; |
b481de9c | 4507 | |
8211ef78 TW |
4508 | if (is_channel_a_band(ch)) |
4509 | sband = &priv->bands[IEEE80211_BAND_5GHZ]; | |
4510 | else | |
4511 | sband = &priv->bands[IEEE80211_BAND_2GHZ]; | |
b481de9c | 4512 | |
8211ef78 TW |
4513 | geo_ch = &sband->channels[sband->n_channels++]; |
4514 | ||
4515 | geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel); | |
8318d78a JB |
4516 | geo_ch->max_power = ch->max_power_avg; |
4517 | geo_ch->max_antenna_gain = 0xff; | |
7b72304d | 4518 | geo_ch->hw_value = ch->channel; |
b481de9c ZY |
4519 | |
4520 | if (is_channel_valid(ch)) { | |
8318d78a JB |
4521 | if (!(ch->flags & EEPROM_CHANNEL_IBSS)) |
4522 | geo_ch->flags |= IEEE80211_CHAN_NO_IBSS; | |
b481de9c | 4523 | |
8318d78a JB |
4524 | if (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) |
4525 | geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN; | |
b481de9c ZY |
4526 | |
4527 | if (ch->flags & EEPROM_CHANNEL_RADAR) | |
8318d78a | 4528 | geo_ch->flags |= IEEE80211_CHAN_RADAR; |
b481de9c ZY |
4529 | |
4530 | if (ch->max_power_avg > priv->max_channel_txpower_limit) | |
4531 | priv->max_channel_txpower_limit = | |
4532 | ch->max_power_avg; | |
8211ef78 | 4533 | } else { |
8318d78a | 4534 | geo_ch->flags |= IEEE80211_CHAN_DISABLED; |
8211ef78 TW |
4535 | } |
4536 | ||
4537 | /* Save flags for reg domain usage */ | |
4538 | geo_ch->orig_flags = geo_ch->flags; | |
4539 | ||
4540 | IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n", | |
4541 | ch->channel, geo_ch->center_freq, | |
4542 | is_channel_a_band(ch) ? "5.2" : "2.4", | |
4543 | geo_ch->flags & IEEE80211_CHAN_DISABLED ? | |
4544 | "restricted" : "valid", | |
4545 | geo_ch->flags); | |
b481de9c ZY |
4546 | } |
4547 | ||
82b9a121 TW |
4548 | if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && |
4549 | priv->cfg->sku & IWL_SKU_A) { | |
b481de9c ZY |
4550 | printk(KERN_INFO DRV_NAME |
4551 | ": Incorrectly detected BG card as ABG. Please send " | |
4552 | "your PCI ID 0x%04X:0x%04X to maintainer.\n", | |
4553 | priv->pci_dev->device, priv->pci_dev->subsystem_device); | |
82b9a121 | 4554 | priv->cfg->sku &= ~IWL_SKU_A; |
b481de9c ZY |
4555 | } |
4556 | ||
4557 | printk(KERN_INFO DRV_NAME | |
4558 | ": Tunable channels: %d 802.11bg, %d 802.11a channels\n", | |
8318d78a JB |
4559 | priv->bands[IEEE80211_BAND_2GHZ].n_channels, |
4560 | priv->bands[IEEE80211_BAND_5GHZ].n_channels); | |
b481de9c | 4561 | |
e0e0a67e JL |
4562 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) |
4563 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | |
4564 | &priv->bands[IEEE80211_BAND_2GHZ]; | |
4565 | if (priv->bands[IEEE80211_BAND_5GHZ].n_channels) | |
4566 | priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | |
4567 | &priv->bands[IEEE80211_BAND_5GHZ]; | |
b481de9c | 4568 | |
b481de9c ZY |
4569 | set_bit(STATUS_GEO_CONFIGURED, &priv->status); |
4570 | ||
4571 | return 0; | |
4572 | } | |
4573 | ||
849e0dce RC |
4574 | /* |
4575 | * iwl4965_free_geos - undo allocations in iwl4965_init_geos | |
4576 | */ | |
bf85ea4f | 4577 | void iwl4965_free_geos(struct iwl_priv *priv) |
849e0dce | 4578 | { |
849e0dce RC |
4579 | kfree(priv->ieee_channels); |
4580 | kfree(priv->ieee_rates); | |
4581 | clear_bit(STATUS_GEO_CONFIGURED, &priv->status); | |
4582 | } | |
4583 | ||
b481de9c ZY |
4584 | /****************************************************************************** |
4585 | * | |
4586 | * uCode download functions | |
4587 | * | |
4588 | ******************************************************************************/ | |
4589 | ||
c79dd5b5 | 4590 | static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv) |
b481de9c | 4591 | { |
98c92211 TW |
4592 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); |
4593 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | |
4594 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | |
4595 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | |
4596 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | |
4597 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | |
b481de9c ZY |
4598 | } |
4599 | ||
4600 | /** | |
bb8c093b | 4601 | * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host, |
b481de9c ZY |
4602 | * looking at all data. |
4603 | */ | |
c79dd5b5 | 4604 | static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image, |
9fbab516 | 4605 | u32 len) |
b481de9c ZY |
4606 | { |
4607 | u32 val; | |
4608 | u32 save_len = len; | |
4609 | int rc = 0; | |
4610 | u32 errcnt; | |
4611 | ||
4612 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | |
4613 | ||
3395f6e9 | 4614 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
4615 | if (rc) |
4616 | return rc; | |
4617 | ||
3395f6e9 | 4618 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND); |
b481de9c ZY |
4619 | |
4620 | errcnt = 0; | |
4621 | for (; len > 0; len -= sizeof(u32), image++) { | |
4622 | /* read data comes through single port, auto-incr addr */ | |
4623 | /* NOTE: Use the debugless read so we don't flood kernel log | |
4624 | * if IWL_DL_IO is set */ | |
3395f6e9 | 4625 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c ZY |
4626 | if (val != le32_to_cpu(*image)) { |
4627 | IWL_ERROR("uCode INST section is invalid at " | |
4628 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | |
4629 | save_len - len, val, le32_to_cpu(*image)); | |
4630 | rc = -EIO; | |
4631 | errcnt++; | |
4632 | if (errcnt >= 20) | |
4633 | break; | |
4634 | } | |
4635 | } | |
4636 | ||
3395f6e9 | 4637 | iwl_release_nic_access(priv); |
b481de9c ZY |
4638 | |
4639 | if (!errcnt) | |
4640 | IWL_DEBUG_INFO | |
4641 | ("ucode image in INSTRUCTION memory is good\n"); | |
4642 | ||
4643 | return rc; | |
4644 | } | |
4645 | ||
4646 | ||
4647 | /** | |
bb8c093b | 4648 | * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host, |
b481de9c ZY |
4649 | * using sample data 100 bytes apart. If these sample points are good, |
4650 | * it's a pretty good bet that everything between them is good, too. | |
4651 | */ | |
c79dd5b5 | 4652 | static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) |
b481de9c ZY |
4653 | { |
4654 | u32 val; | |
4655 | int rc = 0; | |
4656 | u32 errcnt = 0; | |
4657 | u32 i; | |
4658 | ||
4659 | IWL_DEBUG_INFO("ucode inst image size is %u\n", len); | |
4660 | ||
3395f6e9 | 4661 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
4662 | if (rc) |
4663 | return rc; | |
4664 | ||
4665 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | |
4666 | /* read data comes through single port, auto-incr addr */ | |
4667 | /* NOTE: Use the debugless read so we don't flood kernel log | |
4668 | * if IWL_DL_IO is set */ | |
3395f6e9 | 4669 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, |
b481de9c | 4670 | i + RTC_INST_LOWER_BOUND); |
3395f6e9 | 4671 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); |
b481de9c ZY |
4672 | if (val != le32_to_cpu(*image)) { |
4673 | #if 0 /* Enable this if you want to see details */ | |
4674 | IWL_ERROR("uCode INST section is invalid at " | |
4675 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | |
4676 | i, val, *image); | |
4677 | #endif | |
4678 | rc = -EIO; | |
4679 | errcnt++; | |
4680 | if (errcnt >= 3) | |
4681 | break; | |
4682 | } | |
4683 | } | |
4684 | ||
3395f6e9 | 4685 | iwl_release_nic_access(priv); |
b481de9c ZY |
4686 | |
4687 | return rc; | |
4688 | } | |
4689 | ||
4690 | ||
4691 | /** | |
bb8c093b | 4692 | * iwl4965_verify_ucode - determine which instruction image is in SRAM, |
b481de9c ZY |
4693 | * and verify its contents |
4694 | */ | |
c79dd5b5 | 4695 | static int iwl4965_verify_ucode(struct iwl_priv *priv) |
b481de9c ZY |
4696 | { |
4697 | __le32 *image; | |
4698 | u32 len; | |
4699 | int rc = 0; | |
4700 | ||
4701 | /* Try bootstrap */ | |
4702 | image = (__le32 *)priv->ucode_boot.v_addr; | |
4703 | len = priv->ucode_boot.len; | |
bb8c093b | 4704 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
4705 | if (rc == 0) { |
4706 | IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n"); | |
4707 | return 0; | |
4708 | } | |
4709 | ||
4710 | /* Try initialize */ | |
4711 | image = (__le32 *)priv->ucode_init.v_addr; | |
4712 | len = priv->ucode_init.len; | |
bb8c093b | 4713 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
4714 | if (rc == 0) { |
4715 | IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n"); | |
4716 | return 0; | |
4717 | } | |
4718 | ||
4719 | /* Try runtime/protocol */ | |
4720 | image = (__le32 *)priv->ucode_code.v_addr; | |
4721 | len = priv->ucode_code.len; | |
bb8c093b | 4722 | rc = iwl4965_verify_inst_sparse(priv, image, len); |
b481de9c ZY |
4723 | if (rc == 0) { |
4724 | IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n"); | |
4725 | return 0; | |
4726 | } | |
4727 | ||
4728 | IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | |
4729 | ||
9fbab516 BC |
4730 | /* Since nothing seems to match, show first several data entries in |
4731 | * instruction SRAM, so maybe visual inspection will give a clue. | |
4732 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | |
b481de9c ZY |
4733 | image = (__le32 *)priv->ucode_boot.v_addr; |
4734 | len = priv->ucode_boot.len; | |
bb8c093b | 4735 | rc = iwl4965_verify_inst_full(priv, image, len); |
b481de9c ZY |
4736 | |
4737 | return rc; | |
4738 | } | |
4739 | ||
c79dd5b5 | 4740 | static void iwl4965_nic_start(struct iwl_priv *priv) |
b481de9c ZY |
4741 | { |
4742 | /* Remove all resets to allow NIC to operate */ | |
3395f6e9 | 4743 | iwl_write32(priv, CSR_RESET, 0); |
b481de9c ZY |
4744 | } |
4745 | ||
90e759d1 | 4746 | |
b481de9c | 4747 | /** |
bb8c093b | 4748 | * iwl4965_read_ucode - Read uCode images from disk file. |
b481de9c ZY |
4749 | * |
4750 | * Copy into buffers for card to fetch via bus-mastering | |
4751 | */ | |
c79dd5b5 | 4752 | static int iwl4965_read_ucode(struct iwl_priv *priv) |
b481de9c | 4753 | { |
bb8c093b | 4754 | struct iwl4965_ucode *ucode; |
90e759d1 | 4755 | int ret; |
b481de9c | 4756 | const struct firmware *ucode_raw; |
4bf775cd | 4757 | const char *name = priv->cfg->fw_name; |
b481de9c ZY |
4758 | u8 *src; |
4759 | size_t len; | |
4760 | u32 ver, inst_size, data_size, init_size, init_data_size, boot_size; | |
4761 | ||
4762 | /* Ask kernel firmware_class module to get the boot firmware off disk. | |
4763 | * request_firmware() is synchronous, file is in memory on return. */ | |
90e759d1 TW |
4764 | ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev); |
4765 | if (ret < 0) { | |
4766 | IWL_ERROR("%s firmware file req failed: Reason %d\n", | |
4767 | name, ret); | |
b481de9c ZY |
4768 | goto error; |
4769 | } | |
4770 | ||
4771 | IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n", | |
4772 | name, ucode_raw->size); | |
4773 | ||
4774 | /* Make sure that we got at least our header! */ | |
4775 | if (ucode_raw->size < sizeof(*ucode)) { | |
4776 | IWL_ERROR("File size way too small!\n"); | |
90e759d1 | 4777 | ret = -EINVAL; |
b481de9c ZY |
4778 | goto err_release; |
4779 | } | |
4780 | ||
4781 | /* Data from ucode file: header followed by uCode images */ | |
4782 | ucode = (void *)ucode_raw->data; | |
4783 | ||
4784 | ver = le32_to_cpu(ucode->ver); | |
4785 | inst_size = le32_to_cpu(ucode->inst_size); | |
4786 | data_size = le32_to_cpu(ucode->data_size); | |
4787 | init_size = le32_to_cpu(ucode->init_size); | |
4788 | init_data_size = le32_to_cpu(ucode->init_data_size); | |
4789 | boot_size = le32_to_cpu(ucode->boot_size); | |
4790 | ||
4791 | IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver); | |
4792 | IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", | |
4793 | inst_size); | |
4794 | IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", | |
4795 | data_size); | |
4796 | IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", | |
4797 | init_size); | |
4798 | IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", | |
4799 | init_data_size); | |
4800 | IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", | |
4801 | boot_size); | |
4802 | ||
4803 | /* Verify size of file vs. image size info in file's header */ | |
4804 | if (ucode_raw->size < sizeof(*ucode) + | |
4805 | inst_size + data_size + init_size + | |
4806 | init_data_size + boot_size) { | |
4807 | ||
4808 | IWL_DEBUG_INFO("uCode file size %d too small\n", | |
4809 | (int)ucode_raw->size); | |
90e759d1 | 4810 | ret = -EINVAL; |
b481de9c ZY |
4811 | goto err_release; |
4812 | } | |
4813 | ||
4814 | /* Verify that uCode images will fit in card's SRAM */ | |
099b40b7 | 4815 | if (inst_size > priv->hw_params.max_inst_size) { |
90e759d1 TW |
4816 | IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n", |
4817 | inst_size); | |
4818 | ret = -EINVAL; | |
b481de9c ZY |
4819 | goto err_release; |
4820 | } | |
4821 | ||
099b40b7 | 4822 | if (data_size > priv->hw_params.max_data_size) { |
90e759d1 TW |
4823 | IWL_DEBUG_INFO("uCode data len %d too large to fit in\n", |
4824 | data_size); | |
4825 | ret = -EINVAL; | |
b481de9c ZY |
4826 | goto err_release; |
4827 | } | |
099b40b7 | 4828 | if (init_size > priv->hw_params.max_inst_size) { |
b481de9c | 4829 | IWL_DEBUG_INFO |
90e759d1 TW |
4830 | ("uCode init instr len %d too large to fit in\n", |
4831 | init_size); | |
4832 | ret = -EINVAL; | |
b481de9c ZY |
4833 | goto err_release; |
4834 | } | |
099b40b7 | 4835 | if (init_data_size > priv->hw_params.max_data_size) { |
b481de9c | 4836 | IWL_DEBUG_INFO |
90e759d1 TW |
4837 | ("uCode init data len %d too large to fit in\n", |
4838 | init_data_size); | |
4839 | ret = -EINVAL; | |
b481de9c ZY |
4840 | goto err_release; |
4841 | } | |
099b40b7 | 4842 | if (boot_size > priv->hw_params.max_bsm_size) { |
b481de9c | 4843 | IWL_DEBUG_INFO |
90e759d1 TW |
4844 | ("uCode boot instr len %d too large to fit in\n", |
4845 | boot_size); | |
4846 | ret = -EINVAL; | |
b481de9c ZY |
4847 | goto err_release; |
4848 | } | |
4849 | ||
4850 | /* Allocate ucode buffers for card's bus-master loading ... */ | |
4851 | ||
4852 | /* Runtime instructions and 2 copies of data: | |
4853 | * 1) unmodified from disk | |
4854 | * 2) backup cache for save/restore during power-downs */ | |
4855 | priv->ucode_code.len = inst_size; | |
98c92211 | 4856 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); |
b481de9c ZY |
4857 | |
4858 | priv->ucode_data.len = data_size; | |
98c92211 | 4859 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); |
b481de9c ZY |
4860 | |
4861 | priv->ucode_data_backup.len = data_size; | |
98c92211 | 4862 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); |
b481de9c ZY |
4863 | |
4864 | /* Initialization instructions and data */ | |
90e759d1 TW |
4865 | if (init_size && init_data_size) { |
4866 | priv->ucode_init.len = init_size; | |
98c92211 | 4867 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); |
90e759d1 TW |
4868 | |
4869 | priv->ucode_init_data.len = init_data_size; | |
98c92211 | 4870 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); |
90e759d1 TW |
4871 | |
4872 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | |
4873 | goto err_pci_alloc; | |
4874 | } | |
b481de9c ZY |
4875 | |
4876 | /* Bootstrap (instructions only, no data) */ | |
90e759d1 TW |
4877 | if (boot_size) { |
4878 | priv->ucode_boot.len = boot_size; | |
98c92211 | 4879 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); |
b481de9c | 4880 | |
90e759d1 TW |
4881 | if (!priv->ucode_boot.v_addr) |
4882 | goto err_pci_alloc; | |
4883 | } | |
b481de9c ZY |
4884 | |
4885 | /* Copy images into buffers for card's bus-master reads ... */ | |
4886 | ||
4887 | /* Runtime instructions (first block of data in file) */ | |
4888 | src = &ucode->data[0]; | |
4889 | len = priv->ucode_code.len; | |
90e759d1 | 4890 | IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len); |
b481de9c ZY |
4891 | memcpy(priv->ucode_code.v_addr, src, len); |
4892 | IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | |
4893 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | |
4894 | ||
4895 | /* Runtime data (2nd block) | |
bb8c093b | 4896 | * NOTE: Copy into backup buffer will be done in iwl4965_up() */ |
b481de9c ZY |
4897 | src = &ucode->data[inst_size]; |
4898 | len = priv->ucode_data.len; | |
90e759d1 | 4899 | IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len); |
b481de9c ZY |
4900 | memcpy(priv->ucode_data.v_addr, src, len); |
4901 | memcpy(priv->ucode_data_backup.v_addr, src, len); | |
4902 | ||
4903 | /* Initialization instructions (3rd block) */ | |
4904 | if (init_size) { | |
4905 | src = &ucode->data[inst_size + data_size]; | |
4906 | len = priv->ucode_init.len; | |
90e759d1 TW |
4907 | IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n", |
4908 | len); | |
b481de9c ZY |
4909 | memcpy(priv->ucode_init.v_addr, src, len); |
4910 | } | |
4911 | ||
4912 | /* Initialization data (4th block) */ | |
4913 | if (init_data_size) { | |
4914 | src = &ucode->data[inst_size + data_size + init_size]; | |
4915 | len = priv->ucode_init_data.len; | |
90e759d1 TW |
4916 | IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n", |
4917 | len); | |
b481de9c ZY |
4918 | memcpy(priv->ucode_init_data.v_addr, src, len); |
4919 | } | |
4920 | ||
4921 | /* Bootstrap instructions (5th block) */ | |
4922 | src = &ucode->data[inst_size + data_size + init_size + init_data_size]; | |
4923 | len = priv->ucode_boot.len; | |
90e759d1 | 4924 | IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len); |
b481de9c ZY |
4925 | memcpy(priv->ucode_boot.v_addr, src, len); |
4926 | ||
4927 | /* We have our copies now, allow OS release its copies */ | |
4928 | release_firmware(ucode_raw); | |
4929 | return 0; | |
4930 | ||
4931 | err_pci_alloc: | |
4932 | IWL_ERROR("failed to allocate pci memory\n"); | |
90e759d1 | 4933 | ret = -ENOMEM; |
bb8c093b | 4934 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
4935 | |
4936 | err_release: | |
4937 | release_firmware(ucode_raw); | |
4938 | ||
4939 | error: | |
90e759d1 | 4940 | return ret; |
b481de9c ZY |
4941 | } |
4942 | ||
4943 | ||
4944 | /** | |
bb8c093b | 4945 | * iwl4965_set_ucode_ptrs - Set uCode address location |
b481de9c ZY |
4946 | * |
4947 | * Tell initialization uCode where to find runtime uCode. | |
4948 | * | |
4949 | * BSM registers initially contain pointers to initialization uCode. | |
4950 | * We need to replace them to load runtime uCode inst and data, | |
4951 | * and to save runtime data when powering down. | |
4952 | */ | |
c79dd5b5 | 4953 | static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv) |
b481de9c ZY |
4954 | { |
4955 | dma_addr_t pinst; | |
4956 | dma_addr_t pdata; | |
4957 | int rc = 0; | |
4958 | unsigned long flags; | |
4959 | ||
4960 | /* bits 35:4 for 4965 */ | |
4961 | pinst = priv->ucode_code.p_addr >> 4; | |
4962 | pdata = priv->ucode_data_backup.p_addr >> 4; | |
4963 | ||
4964 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 4965 | rc = iwl_grab_nic_access(priv); |
b481de9c ZY |
4966 | if (rc) { |
4967 | spin_unlock_irqrestore(&priv->lock, flags); | |
4968 | return rc; | |
4969 | } | |
4970 | ||
4971 | /* Tell bootstrap uCode where to find image to load */ | |
3395f6e9 TW |
4972 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
4973 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | |
4974 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | |
b481de9c ZY |
4975 | priv->ucode_data.len); |
4976 | ||
4977 | /* Inst bytecount must be last to set up, bit 31 signals uCode | |
4978 | * that all new ptr/size info is in place */ | |
3395f6e9 | 4979 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
b481de9c ZY |
4980 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
4981 | ||
3395f6e9 | 4982 | iwl_release_nic_access(priv); |
b481de9c ZY |
4983 | |
4984 | spin_unlock_irqrestore(&priv->lock, flags); | |
4985 | ||
4986 | IWL_DEBUG_INFO("Runtime uCode pointers are set.\n"); | |
4987 | ||
4988 | return rc; | |
4989 | } | |
4990 | ||
4991 | /** | |
bb8c093b | 4992 | * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received |
b481de9c ZY |
4993 | * |
4994 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | |
4995 | * | |
4996 | * The 4965 "initialize" ALIVE reply contains calibration data for: | |
4997 | * Voltage, temperature, and MIMO tx gain correction, now stored in priv | |
4998 | * (3945 does not contain this data). | |
4999 | * | |
5000 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | |
5001 | */ | |
c79dd5b5 | 5002 | static void iwl4965_init_alive_start(struct iwl_priv *priv) |
b481de9c ZY |
5003 | { |
5004 | /* Check alive response for "valid" sign from uCode */ | |
5005 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | |
5006 | /* We had an error bringing up the hardware, so take it | |
5007 | * all the way back down so we can try again */ | |
5008 | IWL_DEBUG_INFO("Initialize Alive failed.\n"); | |
5009 | goto restart; | |
5010 | } | |
5011 | ||
5012 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | |
5013 | * This is a paranoid check, because we would not have gotten the | |
5014 | * "initialize" alive if code weren't properly loaded. */ | |
bb8c093b | 5015 | if (iwl4965_verify_ucode(priv)) { |
b481de9c ZY |
5016 | /* Runtime instruction load was bad; |
5017 | * take it all the way back down so we can try again */ | |
5018 | IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n"); | |
5019 | goto restart; | |
5020 | } | |
5021 | ||
5022 | /* Calculate temperature */ | |
5023 | priv->temperature = iwl4965_get_temperature(priv); | |
5024 | ||
5025 | /* Send pointers to protocol/runtime uCode image ... init code will | |
5026 | * load and launch runtime uCode, which will send us another "Alive" | |
5027 | * notification. */ | |
5028 | IWL_DEBUG_INFO("Initialization Alive received.\n"); | |
bb8c093b | 5029 | if (iwl4965_set_ucode_ptrs(priv)) { |
b481de9c ZY |
5030 | /* Runtime instruction load won't happen; |
5031 | * take it all the way back down so we can try again */ | |
5032 | IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n"); | |
5033 | goto restart; | |
5034 | } | |
5035 | return; | |
5036 | ||
5037 | restart: | |
5038 | queue_work(priv->workqueue, &priv->restart); | |
5039 | } | |
5040 | ||
5041 | ||
5042 | /** | |
bb8c093b | 5043 | * iwl4965_alive_start - called after REPLY_ALIVE notification received |
b481de9c | 5044 | * from protocol/runtime uCode (initialization uCode's |
bb8c093b | 5045 | * Alive gets handled by iwl4965_init_alive_start()). |
b481de9c | 5046 | */ |
c79dd5b5 | 5047 | static void iwl4965_alive_start(struct iwl_priv *priv) |
b481de9c | 5048 | { |
57aab75a | 5049 | int ret = 0; |
b481de9c ZY |
5050 | |
5051 | IWL_DEBUG_INFO("Runtime Alive received.\n"); | |
5052 | ||
5053 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | |
5054 | /* We had an error bringing up the hardware, so take it | |
5055 | * all the way back down so we can try again */ | |
5056 | IWL_DEBUG_INFO("Alive failed.\n"); | |
5057 | goto restart; | |
5058 | } | |
5059 | ||
5060 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | |
5061 | * This is a paranoid check, because we would not have gotten the | |
5062 | * "runtime" alive if code weren't properly loaded. */ | |
bb8c093b | 5063 | if (iwl4965_verify_ucode(priv)) { |
b481de9c ZY |
5064 | /* Runtime instruction load was bad; |
5065 | * take it all the way back down so we can try again */ | |
5066 | IWL_DEBUG_INFO("Bad runtime uCode load.\n"); | |
5067 | goto restart; | |
5068 | } | |
5069 | ||
bf85ea4f | 5070 | iwlcore_clear_stations_table(priv); |
b481de9c | 5071 | |
57aab75a TW |
5072 | ret = priv->cfg->ops->lib->alive_notify(priv); |
5073 | if (ret) { | |
b481de9c | 5074 | IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n", |
57aab75a | 5075 | ret); |
b481de9c ZY |
5076 | goto restart; |
5077 | } | |
5078 | ||
9fbab516 | 5079 | /* After the ALIVE response, we can send host commands to 4965 uCode */ |
b481de9c ZY |
5080 | set_bit(STATUS_ALIVE, &priv->status); |
5081 | ||
5082 | /* Clear out the uCode error bit if it is set */ | |
5083 | clear_bit(STATUS_FW_ERROR, &priv->status); | |
5084 | ||
fee1247a | 5085 | if (iwl_is_rfkill(priv)) |
b481de9c ZY |
5086 | return; |
5087 | ||
5a66926a | 5088 | ieee80211_start_queues(priv->hw); |
b481de9c ZY |
5089 | |
5090 | priv->active_rate = priv->rates_mask; | |
5091 | priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; | |
5092 | ||
3109ece1 | 5093 | if (iwl_is_associated(priv)) { |
bb8c093b CH |
5094 | struct iwl4965_rxon_cmd *active_rxon = |
5095 | (struct iwl4965_rxon_cmd *)(&priv->active_rxon); | |
b481de9c ZY |
5096 | |
5097 | memcpy(&priv->staging_rxon, &priv->active_rxon, | |
5098 | sizeof(priv->staging_rxon)); | |
5099 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
5100 | } else { | |
5101 | /* Initialize our rx_config data */ | |
bb8c093b | 5102 | iwl4965_connection_init_rx_config(priv); |
b481de9c ZY |
5103 | memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN); |
5104 | } | |
5105 | ||
9fbab516 | 5106 | /* Configure Bluetooth device coexistence support */ |
bb8c093b | 5107 | iwl4965_send_bt_config(priv); |
b481de9c ZY |
5108 | |
5109 | /* Configure the adapter for unassociated operation */ | |
bb8c093b | 5110 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5111 | |
5112 | /* At this point, the NIC is initialized and operational */ | |
5113 | priv->notif_missed_beacons = 0; | |
b481de9c ZY |
5114 | |
5115 | iwl4965_rf_kill_ct_config(priv); | |
5a66926a | 5116 | |
fe00b5a5 RC |
5117 | iwl_leds_register(priv); |
5118 | ||
b481de9c | 5119 | IWL_DEBUG_INFO("ALIVE processing complete.\n"); |
a9f46786 | 5120 | set_bit(STATUS_READY, &priv->status); |
5a66926a | 5121 | wake_up_interruptible(&priv->wait_command_queue); |
b481de9c ZY |
5122 | |
5123 | if (priv->error_recovering) | |
bb8c093b | 5124 | iwl4965_error_recovery(priv); |
b481de9c | 5125 | |
c8381fdc | 5126 | iwlcore_low_level_notify(priv, IWLCORE_START_EVT); |
84363e6e | 5127 | ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC); |
b481de9c ZY |
5128 | return; |
5129 | ||
5130 | restart: | |
5131 | queue_work(priv->workqueue, &priv->restart); | |
5132 | } | |
5133 | ||
c79dd5b5 | 5134 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv); |
b481de9c | 5135 | |
c79dd5b5 | 5136 | static void __iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
5137 | { |
5138 | unsigned long flags; | |
5139 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | |
5140 | struct ieee80211_conf *conf = NULL; | |
5141 | ||
5142 | IWL_DEBUG_INFO(DRV_NAME " is going down\n"); | |
5143 | ||
5144 | conf = ieee80211_get_hw_conf(priv->hw); | |
5145 | ||
5146 | if (!exit_pending) | |
5147 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
5148 | ||
ab53d8af MA |
5149 | iwl_leds_unregister(priv); |
5150 | ||
c8381fdc MA |
5151 | iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT); |
5152 | ||
bf85ea4f | 5153 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
5154 | |
5155 | /* Unblock any waiting calls */ | |
5156 | wake_up_interruptible_all(&priv->wait_command_queue); | |
5157 | ||
b481de9c ZY |
5158 | /* Wipe out the EXIT_PENDING status bit if we are not actually |
5159 | * exiting the module */ | |
5160 | if (!exit_pending) | |
5161 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | |
5162 | ||
5163 | /* stop and reset the on-board processor */ | |
3395f6e9 | 5164 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); |
b481de9c ZY |
5165 | |
5166 | /* tell the device to stop sending interrupts */ | |
0359facc | 5167 | spin_lock_irqsave(&priv->lock, flags); |
bb8c093b | 5168 | iwl4965_disable_interrupts(priv); |
0359facc MA |
5169 | spin_unlock_irqrestore(&priv->lock, flags); |
5170 | iwl_synchronize_irq(priv); | |
b481de9c ZY |
5171 | |
5172 | if (priv->mac80211_registered) | |
5173 | ieee80211_stop_queues(priv->hw); | |
5174 | ||
bb8c093b | 5175 | /* If we have not previously called iwl4965_init() then |
b481de9c | 5176 | * clear all bits but the RF Kill and SUSPEND bits and return */ |
fee1247a | 5177 | if (!iwl_is_init(priv)) { |
b481de9c ZY |
5178 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << |
5179 | STATUS_RF_KILL_HW | | |
5180 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
5181 | STATUS_RF_KILL_SW | | |
9788864e RC |
5182 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
5183 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
5184 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
5185 | STATUS_IN_SUSPEND; | |
5186 | goto exit; | |
5187 | } | |
5188 | ||
5189 | /* ...otherwise clear out all the status bits but the RF Kill and | |
5190 | * SUSPEND bits and continue taking the NIC down. */ | |
5191 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | |
5192 | STATUS_RF_KILL_HW | | |
5193 | test_bit(STATUS_RF_KILL_SW, &priv->status) << | |
5194 | STATUS_RF_KILL_SW | | |
9788864e RC |
5195 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << |
5196 | STATUS_GEO_CONFIGURED | | |
b481de9c ZY |
5197 | test_bit(STATUS_IN_SUSPEND, &priv->status) << |
5198 | STATUS_IN_SUSPEND | | |
5199 | test_bit(STATUS_FW_ERROR, &priv->status) << | |
5200 | STATUS_FW_ERROR; | |
5201 | ||
5202 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 | 5203 | iwl_clear_bit(priv, CSR_GP_CNTRL, |
9fbab516 | 5204 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
b481de9c ZY |
5205 | spin_unlock_irqrestore(&priv->lock, flags); |
5206 | ||
bb8c093b CH |
5207 | iwl4965_hw_txq_ctx_stop(priv); |
5208 | iwl4965_hw_rxq_stop(priv); | |
b481de9c ZY |
5209 | |
5210 | spin_lock_irqsave(&priv->lock, flags); | |
3395f6e9 TW |
5211 | if (!iwl_grab_nic_access(priv)) { |
5212 | iwl_write_prph(priv, APMG_CLK_DIS_REG, | |
b481de9c | 5213 | APMG_CLK_VAL_DMA_CLK_RQT); |
3395f6e9 | 5214 | iwl_release_nic_access(priv); |
b481de9c ZY |
5215 | } |
5216 | spin_unlock_irqrestore(&priv->lock, flags); | |
5217 | ||
5218 | udelay(5); | |
5219 | ||
bb8c093b | 5220 | iwl4965_hw_nic_stop_master(priv); |
3395f6e9 | 5221 | iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); |
bb8c093b | 5222 | iwl4965_hw_nic_reset(priv); |
b481de9c ZY |
5223 | |
5224 | exit: | |
bb8c093b | 5225 | memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp)); |
b481de9c ZY |
5226 | |
5227 | if (priv->ibss_beacon) | |
5228 | dev_kfree_skb(priv->ibss_beacon); | |
5229 | priv->ibss_beacon = NULL; | |
5230 | ||
5231 | /* clear out any free frames */ | |
bb8c093b | 5232 | iwl4965_clear_free_frames(priv); |
b481de9c ZY |
5233 | } |
5234 | ||
c79dd5b5 | 5235 | static void iwl4965_down(struct iwl_priv *priv) |
b481de9c ZY |
5236 | { |
5237 | mutex_lock(&priv->mutex); | |
bb8c093b | 5238 | __iwl4965_down(priv); |
b481de9c | 5239 | mutex_unlock(&priv->mutex); |
b24d22b1 | 5240 | |
bb8c093b | 5241 | iwl4965_cancel_deferred_work(priv); |
b481de9c ZY |
5242 | } |
5243 | ||
5244 | #define MAX_HW_RESTARTS 5 | |
5245 | ||
c79dd5b5 | 5246 | static int __iwl4965_up(struct iwl_priv *priv) |
b481de9c | 5247 | { |
57aab75a TW |
5248 | int i; |
5249 | int ret; | |
b481de9c ZY |
5250 | |
5251 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
5252 | IWL_WARNING("Exit pending; will not bring the NIC up\n"); | |
5253 | return -EIO; | |
5254 | } | |
5255 | ||
5256 | if (test_bit(STATUS_RF_KILL_SW, &priv->status)) { | |
5257 | IWL_WARNING("Radio disabled by SW RF kill (module " | |
5258 | "parameter)\n"); | |
ad97edd2 | 5259 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
5260 | return -ENODEV; |
5261 | } | |
5262 | ||
e903fbd4 RC |
5263 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { |
5264 | IWL_ERROR("ucode not available for device bringup\n"); | |
5265 | return -EIO; | |
5266 | } | |
5267 | ||
e655b9f0 | 5268 | /* If platform's RF_KILL switch is NOT set to KILL */ |
3395f6e9 | 5269 | if (iwl_read32(priv, CSR_GP_CNTRL) & |
e655b9f0 ZY |
5270 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) |
5271 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | |
5272 | else { | |
5273 | set_bit(STATUS_RF_KILL_HW, &priv->status); | |
5274 | if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) { | |
ad97edd2 | 5275 | iwl_rfkill_set_hw_state(priv); |
e655b9f0 ZY |
5276 | IWL_WARNING("Radio disabled by HW RF Kill switch\n"); |
5277 | return -ENODEV; | |
5278 | } | |
b481de9c ZY |
5279 | } |
5280 | ||
ad97edd2 | 5281 | iwl_rfkill_set_hw_state(priv); |
3395f6e9 | 5282 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
b481de9c | 5283 | |
57aab75a TW |
5284 | ret = priv->cfg->ops->lib->hw_nic_init(priv); |
5285 | if (ret) { | |
5286 | IWL_ERROR("Unable to init nic\n"); | |
5287 | return ret; | |
b481de9c ZY |
5288 | } |
5289 | ||
5290 | /* make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
5291 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5292 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | |
b481de9c ZY |
5293 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); |
5294 | ||
5295 | /* clear (again), then enable host interrupts */ | |
3395f6e9 | 5296 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); |
bb8c093b | 5297 | iwl4965_enable_interrupts(priv); |
b481de9c ZY |
5298 | |
5299 | /* really make sure rfkill handshake bits are cleared */ | |
3395f6e9 TW |
5300 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); |
5301 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | |
b481de9c ZY |
5302 | |
5303 | /* Copy original ucode data image from disk into backup cache. | |
5304 | * This will be used to initialize the on-board processor's | |
5305 | * data SRAM for a clean start when the runtime program first loads. */ | |
5306 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | |
5a66926a | 5307 | priv->ucode_data.len); |
b481de9c | 5308 | |
e655b9f0 ZY |
5309 | /* We return success when we resume from suspend and rf_kill is on. */ |
5310 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
b481de9c | 5311 | return 0; |
b481de9c ZY |
5312 | |
5313 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | |
5314 | ||
bf85ea4f | 5315 | iwlcore_clear_stations_table(priv); |
b481de9c ZY |
5316 | |
5317 | /* load bootstrap state machine, | |
5318 | * load bootstrap program into processor's memory, | |
5319 | * prepare to load the "initialize" uCode */ | |
57aab75a | 5320 | ret = priv->cfg->ops->lib->load_ucode(priv); |
b481de9c | 5321 | |
57aab75a TW |
5322 | if (ret) { |
5323 | IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret); | |
b481de9c ZY |
5324 | continue; |
5325 | } | |
5326 | ||
5327 | /* start card; "initialize" will load runtime ucode */ | |
bb8c093b | 5328 | iwl4965_nic_start(priv); |
b481de9c | 5329 | |
b481de9c ZY |
5330 | IWL_DEBUG_INFO(DRV_NAME " is coming up\n"); |
5331 | ||
5332 | return 0; | |
5333 | } | |
5334 | ||
5335 | set_bit(STATUS_EXIT_PENDING, &priv->status); | |
bb8c093b | 5336 | __iwl4965_down(priv); |
b481de9c ZY |
5337 | |
5338 | /* tried to restart and config the device for as long as our | |
5339 | * patience could withstand */ | |
5340 | IWL_ERROR("Unable to initialize device after %d attempts.\n", i); | |
5341 | return -EIO; | |
5342 | } | |
5343 | ||
5344 | ||
5345 | /***************************************************************************** | |
5346 | * | |
5347 | * Workqueue callbacks | |
5348 | * | |
5349 | *****************************************************************************/ | |
5350 | ||
bb8c093b | 5351 | static void iwl4965_bg_init_alive_start(struct work_struct *data) |
b481de9c | 5352 | { |
c79dd5b5 TW |
5353 | struct iwl_priv *priv = |
5354 | container_of(data, struct iwl_priv, init_alive_start.work); | |
b481de9c ZY |
5355 | |
5356 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5357 | return; | |
5358 | ||
5359 | mutex_lock(&priv->mutex); | |
bb8c093b | 5360 | iwl4965_init_alive_start(priv); |
b481de9c ZY |
5361 | mutex_unlock(&priv->mutex); |
5362 | } | |
5363 | ||
bb8c093b | 5364 | static void iwl4965_bg_alive_start(struct work_struct *data) |
b481de9c | 5365 | { |
c79dd5b5 TW |
5366 | struct iwl_priv *priv = |
5367 | container_of(data, struct iwl_priv, alive_start.work); | |
b481de9c ZY |
5368 | |
5369 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5370 | return; | |
5371 | ||
5372 | mutex_lock(&priv->mutex); | |
bb8c093b | 5373 | iwl4965_alive_start(priv); |
b481de9c ZY |
5374 | mutex_unlock(&priv->mutex); |
5375 | } | |
5376 | ||
bb8c093b | 5377 | static void iwl4965_bg_rf_kill(struct work_struct *work) |
b481de9c | 5378 | { |
c79dd5b5 | 5379 | struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill); |
b481de9c ZY |
5380 | |
5381 | wake_up_interruptible(&priv->wait_command_queue); | |
5382 | ||
5383 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5384 | return; | |
5385 | ||
5386 | mutex_lock(&priv->mutex); | |
5387 | ||
fee1247a | 5388 | if (!iwl_is_rfkill(priv)) { |
b481de9c ZY |
5389 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL, |
5390 | "HW and/or SW RF Kill no longer active, restarting " | |
5391 | "device\n"); | |
5392 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5393 | queue_work(priv->workqueue, &priv->restart); | |
5394 | } else { | |
ad97edd2 MA |
5395 | /* make sure mac80211 stop sending Tx frame */ |
5396 | if (priv->mac80211_registered) | |
5397 | ieee80211_stop_queues(priv->hw); | |
b481de9c ZY |
5398 | |
5399 | if (!test_bit(STATUS_RF_KILL_HW, &priv->status)) | |
5400 | IWL_DEBUG_RF_KILL("Can not turn radio back on - " | |
5401 | "disabled by SW switch\n"); | |
5402 | else | |
5403 | IWL_WARNING("Radio Frequency Kill Switch is On:\n" | |
5404 | "Kill switch must be turned off for " | |
5405 | "wireless networking to work.\n"); | |
5406 | } | |
ad97edd2 MA |
5407 | iwl_rfkill_set_hw_state(priv); |
5408 | ||
b481de9c ZY |
5409 | mutex_unlock(&priv->mutex); |
5410 | } | |
5411 | ||
5412 | #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) | |
5413 | ||
bb8c093b | 5414 | static void iwl4965_bg_scan_check(struct work_struct *data) |
b481de9c | 5415 | { |
c79dd5b5 TW |
5416 | struct iwl_priv *priv = |
5417 | container_of(data, struct iwl_priv, scan_check.work); | |
b481de9c ZY |
5418 | |
5419 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5420 | return; | |
5421 | ||
5422 | mutex_lock(&priv->mutex); | |
5423 | if (test_bit(STATUS_SCANNING, &priv->status) || | |
5424 | test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
5425 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, | |
5426 | "Scan completion watchdog resetting adapter (%dms)\n", | |
5427 | jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG)); | |
052c4b9f | 5428 | |
b481de9c | 5429 | if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) |
bb8c093b | 5430 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
5431 | } |
5432 | mutex_unlock(&priv->mutex); | |
5433 | } | |
5434 | ||
bb8c093b | 5435 | static void iwl4965_bg_request_scan(struct work_struct *data) |
b481de9c | 5436 | { |
c79dd5b5 TW |
5437 | struct iwl_priv *priv = |
5438 | container_of(data, struct iwl_priv, request_scan); | |
857485c0 | 5439 | struct iwl_host_cmd cmd = { |
b481de9c | 5440 | .id = REPLY_SCAN_CMD, |
bb8c093b | 5441 | .len = sizeof(struct iwl4965_scan_cmd), |
b481de9c ZY |
5442 | .meta.flags = CMD_SIZE_HUGE, |
5443 | }; | |
bb8c093b | 5444 | struct iwl4965_scan_cmd *scan; |
b481de9c | 5445 | struct ieee80211_conf *conf = NULL; |
78330fdd | 5446 | u16 cmd_len; |
8318d78a | 5447 | enum ieee80211_band band; |
78330fdd | 5448 | u8 direct_mask; |
857485c0 | 5449 | int ret = 0; |
b481de9c ZY |
5450 | |
5451 | conf = ieee80211_get_hw_conf(priv->hw); | |
5452 | ||
5453 | mutex_lock(&priv->mutex); | |
5454 | ||
fee1247a | 5455 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
5456 | IWL_WARNING("request scan called when driver not ready.\n"); |
5457 | goto done; | |
5458 | } | |
5459 | ||
5460 | /* Make sure the scan wasn't cancelled before this queued work | |
5461 | * was given the chance to run... */ | |
5462 | if (!test_bit(STATUS_SCANNING, &priv->status)) | |
5463 | goto done; | |
5464 | ||
5465 | /* This should never be called or scheduled if there is currently | |
5466 | * a scan active in the hardware. */ | |
5467 | if (test_bit(STATUS_SCAN_HW, &priv->status)) { | |
5468 | IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. " | |
5469 | "Ignoring second request.\n"); | |
857485c0 | 5470 | ret = -EIO; |
b481de9c ZY |
5471 | goto done; |
5472 | } | |
5473 | ||
5474 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | |
5475 | IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n"); | |
5476 | goto done; | |
5477 | } | |
5478 | ||
5479 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | |
5480 | IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n"); | |
5481 | goto done; | |
5482 | } | |
5483 | ||
fee1247a | 5484 | if (iwl_is_rfkill(priv)) { |
b481de9c ZY |
5485 | IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n"); |
5486 | goto done; | |
5487 | } | |
5488 | ||
5489 | if (!test_bit(STATUS_READY, &priv->status)) { | |
5490 | IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n"); | |
5491 | goto done; | |
5492 | } | |
5493 | ||
5494 | if (!priv->scan_bands) { | |
5495 | IWL_DEBUG_HC("Aborting scan due to no requested bands\n"); | |
5496 | goto done; | |
5497 | } | |
5498 | ||
5499 | if (!priv->scan) { | |
bb8c093b | 5500 | priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) + |
b481de9c ZY |
5501 | IWL_MAX_SCAN_SIZE, GFP_KERNEL); |
5502 | if (!priv->scan) { | |
857485c0 | 5503 | ret = -ENOMEM; |
b481de9c ZY |
5504 | goto done; |
5505 | } | |
5506 | } | |
5507 | scan = priv->scan; | |
bb8c093b | 5508 | memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE); |
b481de9c ZY |
5509 | |
5510 | scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; | |
5511 | scan->quiet_time = IWL_ACTIVE_QUIET_TIME; | |
5512 | ||
3109ece1 | 5513 | if (iwl_is_associated(priv)) { |
b481de9c ZY |
5514 | u16 interval = 0; |
5515 | u32 extra; | |
5516 | u32 suspend_time = 100; | |
5517 | u32 scan_suspend_time = 100; | |
5518 | unsigned long flags; | |
5519 | ||
5520 | IWL_DEBUG_INFO("Scanning while associated...\n"); | |
5521 | ||
5522 | spin_lock_irqsave(&priv->lock, flags); | |
5523 | interval = priv->beacon_int; | |
5524 | spin_unlock_irqrestore(&priv->lock, flags); | |
5525 | ||
5526 | scan->suspend_time = 0; | |
052c4b9f | 5527 | scan->max_out_time = cpu_to_le32(200 * 1024); |
b481de9c ZY |
5528 | if (!interval) |
5529 | interval = suspend_time; | |
5530 | ||
5531 | extra = (suspend_time / interval) << 22; | |
5532 | scan_suspend_time = (extra | | |
5533 | ((suspend_time % interval) * 1024)); | |
5534 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | |
5535 | IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n", | |
5536 | scan_suspend_time, interval); | |
5537 | } | |
5538 | ||
5539 | /* We should add the ability for user to lock to PASSIVE ONLY */ | |
5540 | if (priv->one_direct_scan) { | |
5541 | IWL_DEBUG_SCAN | |
5542 | ("Kicking off one direct scan for '%s'\n", | |
bb8c093b | 5543 | iwl4965_escape_essid(priv->direct_ssid, |
b481de9c ZY |
5544 | priv->direct_ssid_len)); |
5545 | scan->direct_scan[0].id = WLAN_EID_SSID; | |
5546 | scan->direct_scan[0].len = priv->direct_ssid_len; | |
5547 | memcpy(scan->direct_scan[0].ssid, | |
5548 | priv->direct_ssid, priv->direct_ssid_len); | |
5549 | direct_mask = 1; | |
3109ece1 | 5550 | } else if (!iwl_is_associated(priv) && priv->essid_len) { |
786b4557 BM |
5551 | IWL_DEBUG_SCAN |
5552 | ("Kicking off one direct scan for '%s' when not associated\n", | |
5553 | iwl4965_escape_essid(priv->essid, priv->essid_len)); | |
b481de9c ZY |
5554 | scan->direct_scan[0].id = WLAN_EID_SSID; |
5555 | scan->direct_scan[0].len = priv->essid_len; | |
5556 | memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len); | |
5557 | direct_mask = 1; | |
857485c0 | 5558 | } else { |
786b4557 | 5559 | IWL_DEBUG_SCAN("Kicking off one indirect scan.\n"); |
b481de9c | 5560 | direct_mask = 0; |
857485c0 | 5561 | } |
b481de9c | 5562 | |
b481de9c | 5563 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; |
5425e490 | 5564 | scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id; |
b481de9c ZY |
5565 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
5566 | ||
b481de9c ZY |
5567 | |
5568 | switch (priv->scan_bands) { | |
5569 | case 2: | |
5570 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | |
5571 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 5572 | iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP, |
b481de9c ZY |
5573 | RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK); |
5574 | ||
5575 | scan->good_CRC_th = 0; | |
8318d78a | 5576 | band = IEEE80211_BAND_2GHZ; |
b481de9c ZY |
5577 | break; |
5578 | ||
5579 | case 1: | |
5580 | scan->tx_cmd.rate_n_flags = | |
bb8c093b | 5581 | iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP, |
b481de9c ZY |
5582 | RATE_MCS_ANT_B_MSK); |
5583 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | |
8318d78a | 5584 | band = IEEE80211_BAND_5GHZ; |
b481de9c ZY |
5585 | break; |
5586 | ||
5587 | default: | |
5588 | IWL_WARNING("Invalid scan band count\n"); | |
5589 | goto done; | |
5590 | } | |
5591 | ||
78330fdd TW |
5592 | /* We don't build a direct scan probe request; the uCode will do |
5593 | * that based on the direct_mask added to each channel entry */ | |
5594 | cmd_len = iwl4965_fill_probe_req(priv, band, | |
5595 | (struct ieee80211_mgmt *)scan->data, | |
5596 | IWL_MAX_SCAN_SIZE - sizeof(*scan), 0); | |
5597 | ||
5598 | scan->tx_cmd.len = cpu_to_le16(cmd_len); | |
b481de9c ZY |
5599 | /* select Rx chains */ |
5600 | ||
5601 | /* Force use of chains B and C (0x6) for scan Rx. | |
5602 | * Avoid A (0x1) because of its off-channel reception on A-band. | |
5603 | * MIMO is not used here, but value is required to make uCode happy. */ | |
5604 | scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK | | |
5605 | cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) | | |
5606 | (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) | | |
5607 | (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS)); | |
5608 | ||
5609 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) | |
5610 | scan->filter_flags = RXON_FILTER_PROMISC_MSK; | |
5611 | ||
786b4557 | 5612 | if (direct_mask) |
26c0f03f RC |
5613 | scan->channel_count = |
5614 | iwl4965_get_channels_for_scan( | |
5615 | priv, band, 1, /* active */ | |
5616 | direct_mask, | |
5617 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
786b4557 | 5618 | else |
26c0f03f RC |
5619 | scan->channel_count = |
5620 | iwl4965_get_channels_for_scan( | |
5621 | priv, band, 0, /* passive */ | |
5622 | direct_mask, | |
5623 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); | |
b481de9c | 5624 | |
5da4b55f MA |
5625 | scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK | |
5626 | RXON_FILTER_BCON_AWARE_MSK); | |
b481de9c | 5627 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + |
bb8c093b | 5628 | scan->channel_count * sizeof(struct iwl4965_scan_channel); |
b481de9c ZY |
5629 | cmd.data = scan; |
5630 | scan->len = cpu_to_le16(cmd.len); | |
5631 | ||
5632 | set_bit(STATUS_SCAN_HW, &priv->status); | |
857485c0 TW |
5633 | ret = iwl_send_cmd_sync(priv, &cmd); |
5634 | if (ret) | |
b481de9c ZY |
5635 | goto done; |
5636 | ||
5637 | queue_delayed_work(priv->workqueue, &priv->scan_check, | |
5638 | IWL_SCAN_CHECK_WATCHDOG); | |
5639 | ||
5640 | mutex_unlock(&priv->mutex); | |
5641 | return; | |
5642 | ||
5643 | done: | |
01ebd063 | 5644 | /* inform mac80211 scan aborted */ |
b481de9c ZY |
5645 | queue_work(priv->workqueue, &priv->scan_completed); |
5646 | mutex_unlock(&priv->mutex); | |
5647 | } | |
5648 | ||
bb8c093b | 5649 | static void iwl4965_bg_up(struct work_struct *data) |
b481de9c | 5650 | { |
c79dd5b5 | 5651 | struct iwl_priv *priv = container_of(data, struct iwl_priv, up); |
b481de9c ZY |
5652 | |
5653 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5654 | return; | |
5655 | ||
5656 | mutex_lock(&priv->mutex); | |
bb8c093b | 5657 | __iwl4965_up(priv); |
b481de9c ZY |
5658 | mutex_unlock(&priv->mutex); |
5659 | } | |
5660 | ||
bb8c093b | 5661 | static void iwl4965_bg_restart(struct work_struct *data) |
b481de9c | 5662 | { |
c79dd5b5 | 5663 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); |
b481de9c ZY |
5664 | |
5665 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5666 | return; | |
5667 | ||
bb8c093b | 5668 | iwl4965_down(priv); |
b481de9c ZY |
5669 | queue_work(priv->workqueue, &priv->up); |
5670 | } | |
5671 | ||
bb8c093b | 5672 | static void iwl4965_bg_rx_replenish(struct work_struct *data) |
b481de9c | 5673 | { |
c79dd5b5 TW |
5674 | struct iwl_priv *priv = |
5675 | container_of(data, struct iwl_priv, rx_replenish); | |
b481de9c ZY |
5676 | |
5677 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5678 | return; | |
5679 | ||
5680 | mutex_lock(&priv->mutex); | |
bb8c093b | 5681 | iwl4965_rx_replenish(priv); |
b481de9c ZY |
5682 | mutex_unlock(&priv->mutex); |
5683 | } | |
5684 | ||
7878a5a4 MA |
5685 | #define IWL_DELAY_NEXT_SCAN (HZ*2) |
5686 | ||
508e32e1 | 5687 | static void iwl4965_post_associate(struct iwl_priv *priv) |
b481de9c | 5688 | { |
b481de9c | 5689 | struct ieee80211_conf *conf = NULL; |
857485c0 | 5690 | int ret = 0; |
0795af57 | 5691 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
5692 | |
5693 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
5694 | IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__); | |
5695 | return; | |
5696 | } | |
5697 | ||
0795af57 JP |
5698 | IWL_DEBUG_ASSOC("Associated as %d to: %s\n", |
5699 | priv->assoc_id, | |
5700 | print_mac(mac, priv->active_rxon.bssid_addr)); | |
b481de9c ZY |
5701 | |
5702 | ||
5703 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5704 | return; | |
5705 | ||
b481de9c | 5706 | |
508e32e1 | 5707 | if (!priv->vif || !priv->is_open) |
948c171c | 5708 | return; |
508e32e1 | 5709 | |
bb8c093b | 5710 | iwl4965_scan_cancel_timeout(priv, 200); |
052c4b9f | 5711 | |
b481de9c ZY |
5712 | conf = ieee80211_get_hw_conf(priv->hw); |
5713 | ||
5714 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 5715 | iwl4965_commit_rxon(priv); |
b481de9c | 5716 | |
bb8c093b CH |
5717 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
5718 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 5719 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 5720 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 5721 | if (ret) |
b481de9c ZY |
5722 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
5723 | "Attempting to continue.\n"); | |
5724 | ||
5725 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
5726 | ||
c8b0e6e1 | 5727 | #ifdef CONFIG_IWL4965_HT |
fd105e79 RR |
5728 | if (priv->current_ht_config.is_ht) |
5729 | iwl4965_set_rxon_ht(priv, &priv->current_ht_config); | |
c8b0e6e1 | 5730 | #endif /* CONFIG_IWL4965_HT*/ |
b481de9c ZY |
5731 | iwl4965_set_rxon_chain(priv); |
5732 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
5733 | ||
5734 | IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n", | |
5735 | priv->assoc_id, priv->beacon_int); | |
5736 | ||
5737 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
5738 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | |
5739 | else | |
5740 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
5741 | ||
5742 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
5743 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
5744 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | |
5745 | else | |
5746 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
5747 | ||
5748 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
5749 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | |
5750 | ||
5751 | } | |
5752 | ||
bb8c093b | 5753 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
5754 | |
5755 | switch (priv->iw_mode) { | |
5756 | case IEEE80211_IF_TYPE_STA: | |
bb8c093b | 5757 | iwl4965_rate_scale_init(priv->hw, IWL_AP_ID); |
b481de9c ZY |
5758 | break; |
5759 | ||
5760 | case IEEE80211_IF_TYPE_IBSS: | |
5761 | ||
5762 | /* clear out the station table */ | |
bf85ea4f | 5763 | iwlcore_clear_stations_table(priv); |
b481de9c | 5764 | |
bb8c093b CH |
5765 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
5766 | iwl4965_rxon_add_station(priv, priv->bssid, 0); | |
5767 | iwl4965_rate_scale_init(priv->hw, IWL_STA_ID); | |
5768 | iwl4965_send_beacon_cmd(priv); | |
b481de9c ZY |
5769 | |
5770 | break; | |
5771 | ||
5772 | default: | |
5773 | IWL_ERROR("%s Should not be called in %d mode\n", | |
5774 | __FUNCTION__, priv->iw_mode); | |
5775 | break; | |
5776 | } | |
5777 | ||
bb8c093b | 5778 | iwl4965_sequence_reset(priv); |
b481de9c | 5779 | |
b481de9c | 5780 | /* Enable Rx differential gain and sensitivity calibrations */ |
f0832f13 | 5781 | iwl_chain_noise_reset(priv); |
b481de9c | 5782 | priv->start_calib = 1; |
b481de9c ZY |
5783 | |
5784 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
5785 | priv->assoc_station_added = 1; | |
5786 | ||
bb8c093b | 5787 | iwl4965_activate_qos(priv, 0); |
292ae174 | 5788 | |
5da4b55f | 5789 | iwl_power_update_mode(priv, 0); |
7878a5a4 MA |
5790 | /* we have just associated, don't start scan too early */ |
5791 | priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN; | |
508e32e1 RC |
5792 | } |
5793 | ||
5794 | ||
5795 | static void iwl4965_bg_post_associate(struct work_struct *data) | |
5796 | { | |
5797 | struct iwl_priv *priv = container_of(data, struct iwl_priv, | |
5798 | post_associate.work); | |
5799 | ||
5800 | mutex_lock(&priv->mutex); | |
5801 | iwl4965_post_associate(priv); | |
b481de9c | 5802 | mutex_unlock(&priv->mutex); |
508e32e1 | 5803 | |
b481de9c ZY |
5804 | } |
5805 | ||
bb8c093b | 5806 | static void iwl4965_bg_abort_scan(struct work_struct *work) |
b481de9c | 5807 | { |
c79dd5b5 | 5808 | struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan); |
b481de9c | 5809 | |
fee1247a | 5810 | if (!iwl_is_ready(priv)) |
b481de9c ZY |
5811 | return; |
5812 | ||
5813 | mutex_lock(&priv->mutex); | |
5814 | ||
5815 | set_bit(STATUS_SCAN_ABORTING, &priv->status); | |
bb8c093b | 5816 | iwl4965_send_scan_abort(priv); |
b481de9c ZY |
5817 | |
5818 | mutex_unlock(&priv->mutex); | |
5819 | } | |
5820 | ||
76bb77e0 ZY |
5821 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf); |
5822 | ||
bb8c093b | 5823 | static void iwl4965_bg_scan_completed(struct work_struct *work) |
b481de9c | 5824 | { |
c79dd5b5 TW |
5825 | struct iwl_priv *priv = |
5826 | container_of(work, struct iwl_priv, scan_completed); | |
b481de9c ZY |
5827 | |
5828 | IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n"); | |
5829 | ||
5830 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | |
5831 | return; | |
5832 | ||
a0646470 ZY |
5833 | if (test_bit(STATUS_CONF_PENDING, &priv->status)) |
5834 | iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw)); | |
76bb77e0 | 5835 | |
b481de9c ZY |
5836 | ieee80211_scan_completed(priv->hw); |
5837 | ||
5838 | /* Since setting the TXPOWER may have been deferred while | |
5839 | * performing the scan, fire one off */ | |
5840 | mutex_lock(&priv->mutex); | |
bb8c093b | 5841 | iwl4965_hw_reg_send_txpower(priv); |
b481de9c ZY |
5842 | mutex_unlock(&priv->mutex); |
5843 | } | |
5844 | ||
5845 | /***************************************************************************** | |
5846 | * | |
5847 | * mac80211 entry point functions | |
5848 | * | |
5849 | *****************************************************************************/ | |
5850 | ||
5a66926a ZY |
5851 | #define UCODE_READY_TIMEOUT (2 * HZ) |
5852 | ||
bb8c093b | 5853 | static int iwl4965_mac_start(struct ieee80211_hw *hw) |
b481de9c | 5854 | { |
c79dd5b5 | 5855 | struct iwl_priv *priv = hw->priv; |
5a66926a | 5856 | int ret; |
b481de9c ZY |
5857 | |
5858 | IWL_DEBUG_MAC80211("enter\n"); | |
5859 | ||
5a66926a ZY |
5860 | if (pci_enable_device(priv->pci_dev)) { |
5861 | IWL_ERROR("Fail to pci_enable_device\n"); | |
5862 | return -ENODEV; | |
5863 | } | |
5864 | pci_restore_state(priv->pci_dev); | |
5865 | pci_enable_msi(priv->pci_dev); | |
5866 | ||
5867 | ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED, | |
5868 | DRV_NAME, priv); | |
5869 | if (ret) { | |
5870 | IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq); | |
5871 | goto out_disable_msi; | |
5872 | } | |
5873 | ||
b481de9c ZY |
5874 | /* we should be verifying the device is ready to be opened */ |
5875 | mutex_lock(&priv->mutex); | |
5876 | ||
5a66926a ZY |
5877 | memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd)); |
5878 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... | |
5879 | * ucode filename and max sizes are card-specific. */ | |
b481de9c | 5880 | |
5a66926a ZY |
5881 | if (!priv->ucode_code.len) { |
5882 | ret = iwl4965_read_ucode(priv); | |
5883 | if (ret) { | |
5884 | IWL_ERROR("Could not read microcode: %d\n", ret); | |
5885 | mutex_unlock(&priv->mutex); | |
5886 | goto out_release_irq; | |
5887 | } | |
5888 | } | |
b481de9c | 5889 | |
e655b9f0 | 5890 | ret = __iwl4965_up(priv); |
5a66926a | 5891 | |
b481de9c | 5892 | mutex_unlock(&priv->mutex); |
5a66926a | 5893 | |
e655b9f0 ZY |
5894 | if (ret) |
5895 | goto out_release_irq; | |
5896 | ||
5897 | IWL_DEBUG_INFO("Start UP work done.\n"); | |
5898 | ||
5899 | if (test_bit(STATUS_IN_SUSPEND, &priv->status)) | |
5900 | return 0; | |
5901 | ||
5a66926a ZY |
5902 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from |
5903 | * mac80211 will not be run successfully. */ | |
5904 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | |
5905 | test_bit(STATUS_READY, &priv->status), | |
5906 | UCODE_READY_TIMEOUT); | |
5907 | if (!ret) { | |
5908 | if (!test_bit(STATUS_READY, &priv->status)) { | |
5909 | IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n", | |
5910 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | |
5911 | ret = -ETIMEDOUT; | |
5912 | goto out_release_irq; | |
5913 | } | |
5914 | } | |
5915 | ||
e655b9f0 | 5916 | priv->is_open = 1; |
b481de9c ZY |
5917 | IWL_DEBUG_MAC80211("leave\n"); |
5918 | return 0; | |
5a66926a ZY |
5919 | |
5920 | out_release_irq: | |
5921 | free_irq(priv->pci_dev->irq, priv); | |
5922 | out_disable_msi: | |
5923 | pci_disable_msi(priv->pci_dev); | |
e655b9f0 ZY |
5924 | pci_disable_device(priv->pci_dev); |
5925 | priv->is_open = 0; | |
5926 | IWL_DEBUG_MAC80211("leave - failed\n"); | |
5a66926a | 5927 | return ret; |
b481de9c ZY |
5928 | } |
5929 | ||
bb8c093b | 5930 | static void iwl4965_mac_stop(struct ieee80211_hw *hw) |
b481de9c | 5931 | { |
c79dd5b5 | 5932 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5933 | |
5934 | IWL_DEBUG_MAC80211("enter\n"); | |
948c171c | 5935 | |
e655b9f0 ZY |
5936 | if (!priv->is_open) { |
5937 | IWL_DEBUG_MAC80211("leave - skip\n"); | |
5938 | return; | |
5939 | } | |
5940 | ||
b481de9c | 5941 | priv->is_open = 0; |
5a66926a | 5942 | |
fee1247a | 5943 | if (iwl_is_ready_rf(priv)) { |
e655b9f0 ZY |
5944 | /* stop mac, cancel any scan request and clear |
5945 | * RXON_FILTER_ASSOC_MSK BIT | |
5946 | */ | |
5a66926a ZY |
5947 | mutex_lock(&priv->mutex); |
5948 | iwl4965_scan_cancel_timeout(priv, 100); | |
5949 | cancel_delayed_work(&priv->post_associate); | |
fde3571f | 5950 | mutex_unlock(&priv->mutex); |
fde3571f MA |
5951 | } |
5952 | ||
5a66926a ZY |
5953 | iwl4965_down(priv); |
5954 | ||
5955 | flush_workqueue(priv->workqueue); | |
5956 | free_irq(priv->pci_dev->irq, priv); | |
5957 | pci_disable_msi(priv->pci_dev); | |
5958 | pci_save_state(priv->pci_dev); | |
5959 | pci_disable_device(priv->pci_dev); | |
948c171c | 5960 | |
b481de9c | 5961 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
5962 | } |
5963 | ||
bb8c093b | 5964 | static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
5965 | struct ieee80211_tx_control *ctl) |
5966 | { | |
c79dd5b5 | 5967 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
5968 | |
5969 | IWL_DEBUG_MAC80211("enter\n"); | |
5970 | ||
5971 | if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) { | |
5972 | IWL_DEBUG_MAC80211("leave - monitor\n"); | |
5973 | return -1; | |
5974 | } | |
5975 | ||
5976 | IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | |
8318d78a | 5977 | ctl->tx_rate->bitrate); |
b481de9c | 5978 | |
bb8c093b | 5979 | if (iwl4965_tx_skb(priv, skb, ctl)) |
b481de9c ZY |
5980 | dev_kfree_skb_any(skb); |
5981 | ||
5982 | IWL_DEBUG_MAC80211("leave\n"); | |
5983 | return 0; | |
5984 | } | |
5985 | ||
bb8c093b | 5986 | static int iwl4965_mac_add_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
5987 | struct ieee80211_if_init_conf *conf) |
5988 | { | |
c79dd5b5 | 5989 | struct iwl_priv *priv = hw->priv; |
b481de9c | 5990 | unsigned long flags; |
0795af57 | 5991 | DECLARE_MAC_BUF(mac); |
b481de9c | 5992 | |
32bfd35d | 5993 | IWL_DEBUG_MAC80211("enter: type %d\n", conf->type); |
b481de9c | 5994 | |
32bfd35d JB |
5995 | if (priv->vif) { |
5996 | IWL_DEBUG_MAC80211("leave - vif != NULL\n"); | |
75849d28 | 5997 | return -EOPNOTSUPP; |
b481de9c ZY |
5998 | } |
5999 | ||
6000 | spin_lock_irqsave(&priv->lock, flags); | |
32bfd35d | 6001 | priv->vif = conf->vif; |
b481de9c ZY |
6002 | |
6003 | spin_unlock_irqrestore(&priv->lock, flags); | |
6004 | ||
6005 | mutex_lock(&priv->mutex); | |
864792e3 TW |
6006 | |
6007 | if (conf->mac_addr) { | |
6008 | IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr)); | |
6009 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); | |
6010 | } | |
b481de9c | 6011 | |
fee1247a | 6012 | if (iwl_is_ready(priv)) |
5a66926a ZY |
6013 | iwl4965_set_mode(priv, conf->type); |
6014 | ||
b481de9c ZY |
6015 | mutex_unlock(&priv->mutex); |
6016 | ||
5a66926a | 6017 | IWL_DEBUG_MAC80211("leave\n"); |
b481de9c ZY |
6018 | return 0; |
6019 | } | |
6020 | ||
6021 | /** | |
bb8c093b | 6022 | * iwl4965_mac_config - mac80211 config callback |
b481de9c ZY |
6023 | * |
6024 | * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to | |
6025 | * be set inappropriately and the driver currently sets the hardware up to | |
6026 | * use it whenever needed. | |
6027 | */ | |
bb8c093b | 6028 | static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf) |
b481de9c | 6029 | { |
c79dd5b5 | 6030 | struct iwl_priv *priv = hw->priv; |
bf85ea4f | 6031 | const struct iwl_channel_info *ch_info; |
b481de9c | 6032 | unsigned long flags; |
76bb77e0 | 6033 | int ret = 0; |
b481de9c ZY |
6034 | |
6035 | mutex_lock(&priv->mutex); | |
8318d78a | 6036 | IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value); |
b481de9c | 6037 | |
12342c47 ZY |
6038 | priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP); |
6039 | ||
fee1247a | 6040 | if (!iwl_is_ready(priv)) { |
b481de9c | 6041 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
76bb77e0 ZY |
6042 | ret = -EIO; |
6043 | goto out; | |
b481de9c ZY |
6044 | } |
6045 | ||
1ea87396 | 6046 | if (unlikely(!priv->cfg->mod_params->disable_hw_scan && |
b481de9c | 6047 | test_bit(STATUS_SCANNING, &priv->status))) { |
a0646470 ZY |
6048 | IWL_DEBUG_MAC80211("leave - scanning\n"); |
6049 | set_bit(STATUS_CONF_PENDING, &priv->status); | |
b481de9c | 6050 | mutex_unlock(&priv->mutex); |
a0646470 | 6051 | return 0; |
b481de9c ZY |
6052 | } |
6053 | ||
6054 | spin_lock_irqsave(&priv->lock, flags); | |
6055 | ||
8622e705 | 6056 | ch_info = iwl_get_channel_info(priv, conf->channel->band, |
8318d78a | 6057 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 6058 | if (!is_channel_valid(ch_info)) { |
b481de9c ZY |
6059 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
6060 | spin_unlock_irqrestore(&priv->lock, flags); | |
76bb77e0 ZY |
6061 | ret = -EINVAL; |
6062 | goto out; | |
b481de9c ZY |
6063 | } |
6064 | ||
c8b0e6e1 | 6065 | #ifdef CONFIG_IWL4965_HT |
78330fdd | 6066 | /* if we are switching from ht to 2.4 clear flags |
b481de9c ZY |
6067 | * from any ht related info since 2.4 does not |
6068 | * support ht */ | |
78330fdd | 6069 | if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value) |
b481de9c ZY |
6070 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH |
6071 | && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) | |
6072 | #endif | |
6073 | ) | |
6074 | priv->staging_rxon.flags = 0; | |
c8b0e6e1 | 6075 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 6076 | |
bf85ea4f | 6077 | iwlcore_set_rxon_channel(priv, conf->channel->band, |
8318d78a | 6078 | ieee80211_frequency_to_channel(conf->channel->center_freq)); |
b481de9c | 6079 | |
8318d78a | 6080 | iwl4965_set_flags_for_phymode(priv, conf->channel->band); |
b481de9c ZY |
6081 | |
6082 | /* The list of supported rates and rate mask can be different | |
8318d78a | 6083 | * for each band; since the band may have changed, reset |
b481de9c | 6084 | * the rate mask to what mac80211 lists */ |
bb8c093b | 6085 | iwl4965_set_rate(priv); |
b481de9c ZY |
6086 | |
6087 | spin_unlock_irqrestore(&priv->lock, flags); | |
6088 | ||
6089 | #ifdef IEEE80211_CONF_CHANNEL_SWITCH | |
6090 | if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) { | |
bb8c093b | 6091 | iwl4965_hw_channel_switch(priv, conf->channel); |
76bb77e0 | 6092 | goto out; |
b481de9c ZY |
6093 | } |
6094 | #endif | |
6095 | ||
ad97edd2 MA |
6096 | if (priv->cfg->ops->lib->radio_kill_sw) |
6097 | priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled); | |
b481de9c ZY |
6098 | |
6099 | if (!conf->radio_enabled) { | |
6100 | IWL_DEBUG_MAC80211("leave - radio disabled\n"); | |
76bb77e0 | 6101 | goto out; |
b481de9c ZY |
6102 | } |
6103 | ||
fee1247a | 6104 | if (iwl_is_rfkill(priv)) { |
b481de9c | 6105 | IWL_DEBUG_MAC80211("leave - RF kill\n"); |
76bb77e0 ZY |
6106 | ret = -EIO; |
6107 | goto out; | |
b481de9c ZY |
6108 | } |
6109 | ||
bb8c093b | 6110 | iwl4965_set_rate(priv); |
b481de9c ZY |
6111 | |
6112 | if (memcmp(&priv->active_rxon, | |
6113 | &priv->staging_rxon, sizeof(priv->staging_rxon))) | |
bb8c093b | 6114 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6115 | else |
6116 | IWL_DEBUG_INFO("No re-sending same RXON configuration.\n"); | |
6117 | ||
6118 | IWL_DEBUG_MAC80211("leave\n"); | |
6119 | ||
a0646470 ZY |
6120 | out: |
6121 | clear_bit(STATUS_CONF_PENDING, &priv->status); | |
5a66926a | 6122 | mutex_unlock(&priv->mutex); |
76bb77e0 | 6123 | return ret; |
b481de9c ZY |
6124 | } |
6125 | ||
c79dd5b5 | 6126 | static void iwl4965_config_ap(struct iwl_priv *priv) |
b481de9c | 6127 | { |
857485c0 | 6128 | int ret = 0; |
b481de9c | 6129 | |
d986bcd1 | 6130 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) |
b481de9c ZY |
6131 | return; |
6132 | ||
6133 | /* The following should be done only at AP bring up */ | |
6134 | if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) { | |
6135 | ||
6136 | /* RXON - unassoc (to set timing command) */ | |
6137 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 6138 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6139 | |
6140 | /* RXON Timing */ | |
bb8c093b CH |
6141 | memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd)); |
6142 | iwl4965_setup_rxon_timing(priv); | |
857485c0 | 6143 | ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, |
b481de9c | 6144 | sizeof(priv->rxon_timing), &priv->rxon_timing); |
857485c0 | 6145 | if (ret) |
b481de9c ZY |
6146 | IWL_WARNING("REPLY_RXON_TIMING failed - " |
6147 | "Attempting to continue.\n"); | |
6148 | ||
6149 | iwl4965_set_rxon_chain(priv); | |
6150 | ||
6151 | /* FIXME: what should be the assoc_id for AP? */ | |
6152 | priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id); | |
6153 | if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE) | |
6154 | priv->staging_rxon.flags |= | |
6155 | RXON_FLG_SHORT_PREAMBLE_MSK; | |
6156 | else | |
6157 | priv->staging_rxon.flags &= | |
6158 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
6159 | ||
6160 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | |
6161 | if (priv->assoc_capability & | |
6162 | WLAN_CAPABILITY_SHORT_SLOT_TIME) | |
6163 | priv->staging_rxon.flags |= | |
6164 | RXON_FLG_SHORT_SLOT_MSK; | |
6165 | else | |
6166 | priv->staging_rxon.flags &= | |
6167 | ~RXON_FLG_SHORT_SLOT_MSK; | |
6168 | ||
6169 | if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) | |
6170 | priv->staging_rxon.flags &= | |
6171 | ~RXON_FLG_SHORT_SLOT_MSK; | |
6172 | } | |
6173 | /* restore RXON assoc */ | |
6174 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | |
bb8c093b | 6175 | iwl4965_commit_rxon(priv); |
bb8c093b | 6176 | iwl4965_activate_qos(priv, 1); |
bb8c093b | 6177 | iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0); |
e1493deb | 6178 | } |
bb8c093b | 6179 | iwl4965_send_beacon_cmd(priv); |
b481de9c ZY |
6180 | |
6181 | /* FIXME - we need to add code here to detect a totally new | |
6182 | * configuration, reset the AP, unassoc, rxon timing, assoc, | |
6183 | * clear sta table, add BCAST sta... */ | |
6184 | } | |
6185 | ||
32bfd35d JB |
6186 | static int iwl4965_mac_config_interface(struct ieee80211_hw *hw, |
6187 | struct ieee80211_vif *vif, | |
b481de9c ZY |
6188 | struct ieee80211_if_conf *conf) |
6189 | { | |
c79dd5b5 | 6190 | struct iwl_priv *priv = hw->priv; |
0795af57 | 6191 | DECLARE_MAC_BUF(mac); |
b481de9c ZY |
6192 | unsigned long flags; |
6193 | int rc; | |
6194 | ||
6195 | if (conf == NULL) | |
6196 | return -EIO; | |
6197 | ||
b716bb91 EG |
6198 | if (priv->vif != vif) { |
6199 | IWL_DEBUG_MAC80211("leave - priv->vif != vif\n"); | |
b716bb91 EG |
6200 | return 0; |
6201 | } | |
6202 | ||
b481de9c ZY |
6203 | if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) && |
6204 | (!conf->beacon || !conf->ssid_len)) { | |
6205 | IWL_DEBUG_MAC80211 | |
6206 | ("Leaving in AP mode because HostAPD is not ready.\n"); | |
6207 | return 0; | |
6208 | } | |
6209 | ||
fee1247a | 6210 | if (!iwl_is_alive(priv)) |
5a66926a ZY |
6211 | return -EAGAIN; |
6212 | ||
b481de9c ZY |
6213 | mutex_lock(&priv->mutex); |
6214 | ||
b481de9c | 6215 | if (conf->bssid) |
0795af57 JP |
6216 | IWL_DEBUG_MAC80211("bssid: %s\n", |
6217 | print_mac(mac, conf->bssid)); | |
b481de9c | 6218 | |
4150c572 JB |
6219 | /* |
6220 | * very dubious code was here; the probe filtering flag is never set: | |
6221 | * | |
b481de9c ZY |
6222 | if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) && |
6223 | !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) { | |
4150c572 | 6224 | */ |
b481de9c ZY |
6225 | |
6226 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { | |
6227 | if (!conf->bssid) { | |
6228 | conf->bssid = priv->mac_addr; | |
6229 | memcpy(priv->bssid, priv->mac_addr, ETH_ALEN); | |
0795af57 JP |
6230 | IWL_DEBUG_MAC80211("bssid was set to: %s\n", |
6231 | print_mac(mac, conf->bssid)); | |
b481de9c ZY |
6232 | } |
6233 | if (priv->ibss_beacon) | |
6234 | dev_kfree_skb(priv->ibss_beacon); | |
6235 | ||
6236 | priv->ibss_beacon = conf->beacon; | |
6237 | } | |
6238 | ||
fee1247a | 6239 | if (iwl_is_rfkill(priv)) |
fde3571f MA |
6240 | goto done; |
6241 | ||
b481de9c ZY |
6242 | if (conf->bssid && !is_zero_ether_addr(conf->bssid) && |
6243 | !is_multicast_ether_addr(conf->bssid)) { | |
6244 | /* If there is currently a HW scan going on in the background | |
6245 | * then we need to cancel it else the RXON below will fail. */ | |
bb8c093b | 6246 | if (iwl4965_scan_cancel_timeout(priv, 100)) { |
b481de9c ZY |
6247 | IWL_WARNING("Aborted scan still in progress " |
6248 | "after 100ms\n"); | |
6249 | IWL_DEBUG_MAC80211("leaving - scan abort failed.\n"); | |
6250 | mutex_unlock(&priv->mutex); | |
6251 | return -EAGAIN; | |
6252 | } | |
6253 | memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN); | |
6254 | ||
6255 | /* TODO: Audit driver for usage of these members and see | |
6256 | * if mac80211 deprecates them (priv->bssid looks like it | |
6257 | * shouldn't be there, but I haven't scanned the IBSS code | |
6258 | * to verify) - jpk */ | |
6259 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); | |
6260 | ||
6261 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 6262 | iwl4965_config_ap(priv); |
b481de9c | 6263 | else { |
bb8c093b | 6264 | rc = iwl4965_commit_rxon(priv); |
b481de9c | 6265 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc) |
bb8c093b | 6266 | iwl4965_rxon_add_station( |
b481de9c ZY |
6267 | priv, priv->active_rxon.bssid_addr, 1); |
6268 | } | |
6269 | ||
6270 | } else { | |
bb8c093b | 6271 | iwl4965_scan_cancel_timeout(priv, 100); |
b481de9c | 6272 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 6273 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6274 | } |
6275 | ||
fde3571f | 6276 | done: |
b481de9c ZY |
6277 | spin_lock_irqsave(&priv->lock, flags); |
6278 | if (!conf->ssid_len) | |
6279 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
6280 | else | |
6281 | memcpy(priv->essid, conf->ssid, conf->ssid_len); | |
6282 | ||
6283 | priv->essid_len = conf->ssid_len; | |
6284 | spin_unlock_irqrestore(&priv->lock, flags); | |
6285 | ||
6286 | IWL_DEBUG_MAC80211("leave\n"); | |
6287 | mutex_unlock(&priv->mutex); | |
6288 | ||
6289 | return 0; | |
6290 | } | |
6291 | ||
bb8c093b | 6292 | static void iwl4965_configure_filter(struct ieee80211_hw *hw, |
4150c572 JB |
6293 | unsigned int changed_flags, |
6294 | unsigned int *total_flags, | |
6295 | int mc_count, struct dev_addr_list *mc_list) | |
6296 | { | |
6297 | /* | |
6298 | * XXX: dummy | |
bb8c093b | 6299 | * see also iwl4965_connection_init_rx_config |
4150c572 JB |
6300 | */ |
6301 | *total_flags = 0; | |
6302 | } | |
6303 | ||
bb8c093b | 6304 | static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw, |
b481de9c ZY |
6305 | struct ieee80211_if_init_conf *conf) |
6306 | { | |
c79dd5b5 | 6307 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6308 | |
6309 | IWL_DEBUG_MAC80211("enter\n"); | |
6310 | ||
6311 | mutex_lock(&priv->mutex); | |
948c171c | 6312 | |
fee1247a | 6313 | if (iwl_is_ready_rf(priv)) { |
fde3571f MA |
6314 | iwl4965_scan_cancel_timeout(priv, 100); |
6315 | cancel_delayed_work(&priv->post_associate); | |
6316 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | |
6317 | iwl4965_commit_rxon(priv); | |
6318 | } | |
32bfd35d JB |
6319 | if (priv->vif == conf->vif) { |
6320 | priv->vif = NULL; | |
b481de9c ZY |
6321 | memset(priv->bssid, 0, ETH_ALEN); |
6322 | memset(priv->essid, 0, IW_ESSID_MAX_SIZE); | |
6323 | priv->essid_len = 0; | |
6324 | } | |
6325 | mutex_unlock(&priv->mutex); | |
6326 | ||
6327 | IWL_DEBUG_MAC80211("leave\n"); | |
6328 | ||
6329 | } | |
471b3efd | 6330 | |
98952d5d TW |
6331 | |
6332 | #ifdef CONFIG_IWL4965_HT | |
6333 | static void iwl4965_ht_conf(struct iwl_priv *priv, | |
6334 | struct ieee80211_bss_conf *bss_conf) | |
6335 | { | |
6336 | struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf; | |
6337 | struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf; | |
6338 | struct iwl_ht_info *iwl_conf = &priv->current_ht_config; | |
6339 | ||
6340 | IWL_DEBUG_MAC80211("enter: \n"); | |
6341 | ||
6342 | iwl_conf->is_ht = bss_conf->assoc_ht; | |
6343 | ||
6344 | if (!iwl_conf->is_ht) | |
6345 | return; | |
6346 | ||
6347 | priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
6348 | ||
6349 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20) | |
6350 | iwl_conf->sgf |= 0x1; | |
6351 | if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40) | |
6352 | iwl_conf->sgf |= 0x2; | |
6353 | ||
6354 | iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD); | |
6355 | iwl_conf->max_amsdu_size = | |
6356 | !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU); | |
6357 | ||
6358 | iwl_conf->supported_chan_width = | |
6359 | !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH); | |
6360 | iwl_conf->extension_chan_offset = | |
6361 | ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET; | |
6362 | /* If no above or below channel supplied disable FAT channel */ | |
6363 | if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE && | |
6364 | iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW) | |
6365 | iwl_conf->supported_chan_width = 0; | |
6366 | ||
6367 | iwl_conf->tx_mimo_ps_mode = | |
6368 | (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2); | |
6369 | memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16); | |
6370 | ||
6371 | iwl_conf->control_channel = ht_bss_conf->primary_channel; | |
6372 | iwl_conf->tx_chan_width = | |
6373 | !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH); | |
6374 | iwl_conf->ht_protection = | |
6375 | ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION; | |
6376 | iwl_conf->non_GF_STA_present = | |
6377 | !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT); | |
6378 | ||
6379 | IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel); | |
6380 | IWL_DEBUG_MAC80211("leave\n"); | |
6381 | } | |
6382 | #else | |
6383 | static inline void iwl4965_ht_conf(struct iwl_priv *priv, | |
6384 | struct ieee80211_bss_conf *bss_conf) | |
6385 | { | |
6386 | } | |
6387 | #endif | |
6388 | ||
3109ece1 | 6389 | #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) |
471b3efd JB |
6390 | static void iwl4965_bss_info_changed(struct ieee80211_hw *hw, |
6391 | struct ieee80211_vif *vif, | |
6392 | struct ieee80211_bss_conf *bss_conf, | |
6393 | u32 changes) | |
220173b0 | 6394 | { |
c79dd5b5 | 6395 | struct iwl_priv *priv = hw->priv; |
220173b0 | 6396 | |
3109ece1 TW |
6397 | IWL_DEBUG_MAC80211("changes = 0x%X\n", changes); |
6398 | ||
471b3efd | 6399 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { |
3109ece1 TW |
6400 | IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n", |
6401 | bss_conf->use_short_preamble); | |
471b3efd | 6402 | if (bss_conf->use_short_preamble) |
220173b0 TW |
6403 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; |
6404 | else | |
6405 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | |
6406 | } | |
6407 | ||
471b3efd | 6408 | if (changes & BSS_CHANGED_ERP_CTS_PROT) { |
3109ece1 | 6409 | IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot); |
8318d78a | 6410 | if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ)) |
220173b0 TW |
6411 | priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK; |
6412 | else | |
6413 | priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK; | |
6414 | } | |
6415 | ||
98952d5d | 6416 | if (changes & BSS_CHANGED_HT) { |
3109ece1 | 6417 | IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht); |
98952d5d TW |
6418 | iwl4965_ht_conf(priv, bss_conf); |
6419 | iwl4965_set_rxon_chain(priv); | |
6420 | } | |
6421 | ||
471b3efd | 6422 | if (changes & BSS_CHANGED_ASSOC) { |
3109ece1 | 6423 | IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc); |
508e32e1 RC |
6424 | /* This should never happen as this function should |
6425 | * never be called from interrupt context. */ | |
6426 | if (WARN_ON_ONCE(in_interrupt())) | |
6427 | return; | |
3109ece1 TW |
6428 | if (bss_conf->assoc) { |
6429 | priv->assoc_id = bss_conf->aid; | |
6430 | priv->beacon_int = bss_conf->beacon_int; | |
6431 | priv->timestamp = bss_conf->timestamp; | |
6432 | priv->assoc_capability = bss_conf->assoc_capability; | |
6433 | priv->next_scan_jiffies = jiffies + | |
6434 | IWL_DELAY_NEXT_SCAN_AFTER_ASSOC; | |
508e32e1 RC |
6435 | mutex_lock(&priv->mutex); |
6436 | iwl4965_post_associate(priv); | |
6437 | mutex_unlock(&priv->mutex); | |
3109ece1 TW |
6438 | } else { |
6439 | priv->assoc_id = 0; | |
6440 | IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc); | |
6441 | } | |
6442 | } else if (changes && iwl_is_associated(priv) && priv->assoc_id) { | |
6443 | IWL_DEBUG_MAC80211("Associated Changes %d\n", changes); | |
7e8c519e | 6444 | iwl_send_rxon_assoc(priv); |
471b3efd JB |
6445 | } |
6446 | ||
220173b0 | 6447 | } |
b481de9c | 6448 | |
bb8c093b | 6449 | static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len) |
b481de9c ZY |
6450 | { |
6451 | int rc = 0; | |
6452 | unsigned long flags; | |
c79dd5b5 | 6453 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6454 | |
6455 | IWL_DEBUG_MAC80211("enter\n"); | |
6456 | ||
052c4b9f | 6457 | mutex_lock(&priv->mutex); |
b481de9c ZY |
6458 | spin_lock_irqsave(&priv->lock, flags); |
6459 | ||
fee1247a | 6460 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
6461 | rc = -EIO; |
6462 | IWL_DEBUG_MAC80211("leave - not ready or exit pending\n"); | |
6463 | goto out_unlock; | |
6464 | } | |
6465 | ||
6466 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */ | |
6467 | rc = -EIO; | |
6468 | IWL_ERROR("ERROR: APs don't scan\n"); | |
6469 | goto out_unlock; | |
6470 | } | |
6471 | ||
7878a5a4 MA |
6472 | /* we don't schedule scan within next_scan_jiffies period */ |
6473 | if (priv->next_scan_jiffies && | |
6474 | time_after(priv->next_scan_jiffies, jiffies)) { | |
6475 | rc = -EAGAIN; | |
6476 | goto out_unlock; | |
6477 | } | |
b481de9c | 6478 | /* if we just finished scan ask for delay */ |
7878a5a4 MA |
6479 | if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies + |
6480 | IWL_DELAY_NEXT_SCAN, jiffies)) { | |
b481de9c ZY |
6481 | rc = -EAGAIN; |
6482 | goto out_unlock; | |
6483 | } | |
6484 | if (len) { | |
7878a5a4 | 6485 | IWL_DEBUG_SCAN("direct scan for %s [%d]\n ", |
bb8c093b | 6486 | iwl4965_escape_essid(ssid, len), (int)len); |
b481de9c ZY |
6487 | |
6488 | priv->one_direct_scan = 1; | |
6489 | priv->direct_ssid_len = (u8) | |
6490 | min((u8) len, (u8) IW_ESSID_MAX_SIZE); | |
6491 | memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len); | |
948c171c MA |
6492 | } else |
6493 | priv->one_direct_scan = 0; | |
b481de9c | 6494 | |
bb8c093b | 6495 | rc = iwl4965_scan_initiate(priv); |
b481de9c ZY |
6496 | |
6497 | IWL_DEBUG_MAC80211("leave\n"); | |
6498 | ||
6499 | out_unlock: | |
6500 | spin_unlock_irqrestore(&priv->lock, flags); | |
052c4b9f | 6501 | mutex_unlock(&priv->mutex); |
b481de9c ZY |
6502 | |
6503 | return rc; | |
6504 | } | |
6505 | ||
ab885f8c EG |
6506 | static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw, |
6507 | struct ieee80211_key_conf *keyconf, const u8 *addr, | |
6508 | u32 iv32, u16 *phase1key) | |
6509 | { | |
6510 | struct iwl_priv *priv = hw->priv; | |
6511 | u8 sta_id = IWL_INVALID_STATION; | |
6512 | unsigned long flags; | |
6513 | __le16 key_flags = 0; | |
6514 | int i; | |
6515 | DECLARE_MAC_BUF(mac); | |
6516 | ||
6517 | IWL_DEBUG_MAC80211("enter\n"); | |
6518 | ||
947b13a7 | 6519 | sta_id = iwl_find_station(priv, addr); |
ab885f8c EG |
6520 | if (sta_id == IWL_INVALID_STATION) { |
6521 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
6522 | print_mac(mac, addr)); | |
6523 | return; | |
6524 | } | |
6525 | ||
6526 | iwl4965_scan_cancel_timeout(priv, 100); | |
6527 | ||
6528 | key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK); | |
6529 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | |
6530 | key_flags &= ~STA_KEY_FLG_INVALID; | |
6531 | ||
5425e490 | 6532 | if (sta_id == priv->hw_params.bcast_sta_id) |
ab885f8c EG |
6533 | key_flags |= STA_KEY_MULTICAST_MSK; |
6534 | ||
6535 | spin_lock_irqsave(&priv->sta_lock, flags); | |
6536 | ||
ab885f8c EG |
6537 | priv->stations[sta_id].sta.key.key_flags = key_flags; |
6538 | priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32; | |
6539 | ||
6540 | for (i = 0; i < 5; i++) | |
6541 | priv->stations[sta_id].sta.key.tkip_rx_ttak[i] = | |
6542 | cpu_to_le16(phase1key[i]); | |
6543 | ||
6544 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | |
6545 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | |
6546 | ||
6547 | iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | |
6548 | ||
6549 | spin_unlock_irqrestore(&priv->sta_lock, flags); | |
6550 | ||
6551 | IWL_DEBUG_MAC80211("leave\n"); | |
6552 | } | |
6553 | ||
bb8c093b | 6554 | static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, |
b481de9c ZY |
6555 | const u8 *local_addr, const u8 *addr, |
6556 | struct ieee80211_key_conf *key) | |
6557 | { | |
c79dd5b5 | 6558 | struct iwl_priv *priv = hw->priv; |
0795af57 | 6559 | DECLARE_MAC_BUF(mac); |
deb09c43 EG |
6560 | int ret = 0; |
6561 | u8 sta_id = IWL_INVALID_STATION; | |
6974e363 | 6562 | u8 is_default_wep_key = 0; |
b481de9c ZY |
6563 | |
6564 | IWL_DEBUG_MAC80211("enter\n"); | |
6565 | ||
099b40b7 | 6566 | if (priv->hw_params.sw_crypto) { |
b481de9c ZY |
6567 | IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n"); |
6568 | return -EOPNOTSUPP; | |
6569 | } | |
6570 | ||
6571 | if (is_zero_ether_addr(addr)) | |
6572 | /* only support pairwise keys */ | |
6573 | return -EOPNOTSUPP; | |
6574 | ||
947b13a7 | 6575 | sta_id = iwl_find_station(priv, addr); |
6974e363 EG |
6576 | if (sta_id == IWL_INVALID_STATION) { |
6577 | IWL_DEBUG_MAC80211("leave - %s not in station map.\n", | |
6578 | print_mac(mac, addr)); | |
6579 | return -EINVAL; | |
b481de9c | 6580 | |
deb09c43 | 6581 | } |
b481de9c | 6582 | |
6974e363 | 6583 | mutex_lock(&priv->mutex); |
bb8c093b | 6584 | iwl4965_scan_cancel_timeout(priv, 100); |
6974e363 EG |
6585 | mutex_unlock(&priv->mutex); |
6586 | ||
6587 | /* If we are getting WEP group key and we didn't receive any key mapping | |
6588 | * so far, we are in legacy wep mode (group key only), otherwise we are | |
6589 | * in 1X mode. | |
6590 | * In legacy wep mode, we use another host command to the uCode */ | |
5425e490 | 6591 | if (key->alg == ALG_WEP && sta_id == priv->hw_params.bcast_sta_id && |
6974e363 EG |
6592 | priv->iw_mode != IEEE80211_IF_TYPE_AP) { |
6593 | if (cmd == SET_KEY) | |
6594 | is_default_wep_key = !priv->key_mapping_key; | |
6595 | else | |
6596 | is_default_wep_key = priv->default_wep_key; | |
6597 | } | |
052c4b9f | 6598 | |
b481de9c | 6599 | switch (cmd) { |
deb09c43 | 6600 | case SET_KEY: |
6974e363 EG |
6601 | if (is_default_wep_key) |
6602 | ret = iwl_set_default_wep_key(priv, key); | |
deb09c43 | 6603 | else |
7480513f | 6604 | ret = iwl_set_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
6605 | |
6606 | IWL_DEBUG_MAC80211("enable hwcrypto key\n"); | |
b481de9c ZY |
6607 | break; |
6608 | case DISABLE_KEY: | |
6974e363 EG |
6609 | if (is_default_wep_key) |
6610 | ret = iwl_remove_default_wep_key(priv, key); | |
deb09c43 | 6611 | else |
3ec47732 | 6612 | ret = iwl_remove_dynamic_key(priv, key, sta_id); |
deb09c43 EG |
6613 | |
6614 | IWL_DEBUG_MAC80211("disable hwcrypto key\n"); | |
b481de9c ZY |
6615 | break; |
6616 | default: | |
deb09c43 | 6617 | ret = -EINVAL; |
b481de9c ZY |
6618 | } |
6619 | ||
6620 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c | 6621 | |
deb09c43 | 6622 | return ret; |
b481de9c ZY |
6623 | } |
6624 | ||
bb8c093b | 6625 | static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue, |
b481de9c ZY |
6626 | const struct ieee80211_tx_queue_params *params) |
6627 | { | |
c79dd5b5 | 6628 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6629 | unsigned long flags; |
6630 | int q; | |
b481de9c ZY |
6631 | |
6632 | IWL_DEBUG_MAC80211("enter\n"); | |
6633 | ||
fee1247a | 6634 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
6635 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
6636 | return -EIO; | |
6637 | } | |
6638 | ||
6639 | if (queue >= AC_NUM) { | |
6640 | IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue); | |
6641 | return 0; | |
6642 | } | |
6643 | ||
b481de9c ZY |
6644 | if (!priv->qos_data.qos_enable) { |
6645 | priv->qos_data.qos_active = 0; | |
6646 | IWL_DEBUG_MAC80211("leave - qos not enabled\n"); | |
6647 | return 0; | |
6648 | } | |
6649 | q = AC_NUM - 1 - queue; | |
6650 | ||
6651 | spin_lock_irqsave(&priv->lock, flags); | |
6652 | ||
6653 | priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min); | |
6654 | priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max); | |
6655 | priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs; | |
6656 | priv->qos_data.def_qos_parm.ac[q].edca_txop = | |
3330d7be | 6657 | cpu_to_le16((params->txop * 32)); |
b481de9c ZY |
6658 | |
6659 | priv->qos_data.def_qos_parm.ac[q].reserved1 = 0; | |
6660 | priv->qos_data.qos_active = 1; | |
6661 | ||
6662 | spin_unlock_irqrestore(&priv->lock, flags); | |
6663 | ||
6664 | mutex_lock(&priv->mutex); | |
6665 | if (priv->iw_mode == IEEE80211_IF_TYPE_AP) | |
bb8c093b | 6666 | iwl4965_activate_qos(priv, 1); |
3109ece1 | 6667 | else if (priv->assoc_id && iwl_is_associated(priv)) |
bb8c093b | 6668 | iwl4965_activate_qos(priv, 0); |
b481de9c ZY |
6669 | |
6670 | mutex_unlock(&priv->mutex); | |
6671 | ||
b481de9c ZY |
6672 | IWL_DEBUG_MAC80211("leave\n"); |
6673 | return 0; | |
6674 | } | |
6675 | ||
bb8c093b | 6676 | static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
6677 | struct ieee80211_tx_queue_stats *stats) |
6678 | { | |
c79dd5b5 | 6679 | struct iwl_priv *priv = hw->priv; |
b481de9c | 6680 | int i, avail; |
bb8c093b CH |
6681 | struct iwl4965_tx_queue *txq; |
6682 | struct iwl4965_queue *q; | |
b481de9c ZY |
6683 | unsigned long flags; |
6684 | ||
6685 | IWL_DEBUG_MAC80211("enter\n"); | |
6686 | ||
fee1247a | 6687 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
6688 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
6689 | return -EIO; | |
6690 | } | |
6691 | ||
6692 | spin_lock_irqsave(&priv->lock, flags); | |
6693 | ||
6694 | for (i = 0; i < AC_NUM; i++) { | |
6695 | txq = &priv->txq[i]; | |
6696 | q = &txq->q; | |
bb8c093b | 6697 | avail = iwl4965_queue_space(q); |
b481de9c ZY |
6698 | |
6699 | stats->data[i].len = q->n_window - avail; | |
6700 | stats->data[i].limit = q->n_window - q->high_mark; | |
6701 | stats->data[i].count = q->n_window; | |
6702 | ||
6703 | } | |
6704 | spin_unlock_irqrestore(&priv->lock, flags); | |
6705 | ||
6706 | IWL_DEBUG_MAC80211("leave\n"); | |
6707 | ||
6708 | return 0; | |
6709 | } | |
6710 | ||
bb8c093b | 6711 | static int iwl4965_mac_get_stats(struct ieee80211_hw *hw, |
b481de9c ZY |
6712 | struct ieee80211_low_level_stats *stats) |
6713 | { | |
6714 | IWL_DEBUG_MAC80211("enter\n"); | |
6715 | IWL_DEBUG_MAC80211("leave\n"); | |
6716 | ||
6717 | return 0; | |
6718 | } | |
6719 | ||
bb8c093b | 6720 | static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw) |
b481de9c ZY |
6721 | { |
6722 | IWL_DEBUG_MAC80211("enter\n"); | |
6723 | IWL_DEBUG_MAC80211("leave\n"); | |
6724 | ||
6725 | return 0; | |
6726 | } | |
6727 | ||
bb8c093b | 6728 | static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw) |
b481de9c | 6729 | { |
c79dd5b5 | 6730 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6731 | unsigned long flags; |
6732 | ||
6733 | mutex_lock(&priv->mutex); | |
6734 | IWL_DEBUG_MAC80211("enter\n"); | |
6735 | ||
6736 | priv->lq_mngr.lq_ready = 0; | |
c8b0e6e1 | 6737 | #ifdef CONFIG_IWL4965_HT |
b481de9c | 6738 | spin_lock_irqsave(&priv->lock, flags); |
fd105e79 | 6739 | memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); |
b481de9c | 6740 | spin_unlock_irqrestore(&priv->lock, flags); |
c8b0e6e1 | 6741 | #endif /* CONFIG_IWL4965_HT */ |
b481de9c | 6742 | |
bf85ea4f | 6743 | iwlcore_reset_qos(priv); |
b481de9c ZY |
6744 | |
6745 | cancel_delayed_work(&priv->post_associate); | |
6746 | ||
6747 | spin_lock_irqsave(&priv->lock, flags); | |
6748 | priv->assoc_id = 0; | |
6749 | priv->assoc_capability = 0; | |
b481de9c ZY |
6750 | priv->assoc_station_added = 0; |
6751 | ||
6752 | /* new association get rid of ibss beacon skb */ | |
6753 | if (priv->ibss_beacon) | |
6754 | dev_kfree_skb(priv->ibss_beacon); | |
6755 | ||
6756 | priv->ibss_beacon = NULL; | |
6757 | ||
6758 | priv->beacon_int = priv->hw->conf.beacon_int; | |
3109ece1 | 6759 | priv->timestamp = 0; |
b481de9c ZY |
6760 | if ((priv->iw_mode == IEEE80211_IF_TYPE_STA)) |
6761 | priv->beacon_int = 0; | |
6762 | ||
6763 | spin_unlock_irqrestore(&priv->lock, flags); | |
6764 | ||
fee1247a | 6765 | if (!iwl_is_ready_rf(priv)) { |
fde3571f MA |
6766 | IWL_DEBUG_MAC80211("leave - not ready\n"); |
6767 | mutex_unlock(&priv->mutex); | |
6768 | return; | |
6769 | } | |
6770 | ||
052c4b9f | 6771 | /* we are restarting association process |
6772 | * clear RXON_FILTER_ASSOC_MSK bit | |
6773 | */ | |
6774 | if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { | |
bb8c093b | 6775 | iwl4965_scan_cancel_timeout(priv, 100); |
052c4b9f | 6776 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; |
bb8c093b | 6777 | iwl4965_commit_rxon(priv); |
052c4b9f | 6778 | } |
6779 | ||
5da4b55f MA |
6780 | iwl_power_update_mode(priv, 0); |
6781 | ||
b481de9c ZY |
6782 | /* Per mac80211.h: This is only used in IBSS mode... */ |
6783 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
052c4b9f | 6784 | |
b481de9c ZY |
6785 | IWL_DEBUG_MAC80211("leave - not in IBSS\n"); |
6786 | mutex_unlock(&priv->mutex); | |
6787 | return; | |
6788 | } | |
6789 | ||
bb8c093b | 6790 | iwl4965_set_rate(priv); |
b481de9c ZY |
6791 | |
6792 | mutex_unlock(&priv->mutex); | |
6793 | ||
6794 | IWL_DEBUG_MAC80211("leave\n"); | |
b481de9c ZY |
6795 | } |
6796 | ||
bb8c093b | 6797 | static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, |
b481de9c ZY |
6798 | struct ieee80211_tx_control *control) |
6799 | { | |
c79dd5b5 | 6800 | struct iwl_priv *priv = hw->priv; |
b481de9c ZY |
6801 | unsigned long flags; |
6802 | ||
6803 | mutex_lock(&priv->mutex); | |
6804 | IWL_DEBUG_MAC80211("enter\n"); | |
6805 | ||
fee1247a | 6806 | if (!iwl_is_ready_rf(priv)) { |
b481de9c ZY |
6807 | IWL_DEBUG_MAC80211("leave - RF not ready\n"); |
6808 | mutex_unlock(&priv->mutex); | |
6809 | return -EIO; | |
6810 | } | |
6811 | ||
6812 | if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) { | |
6813 | IWL_DEBUG_MAC80211("leave - not IBSS\n"); | |
6814 | mutex_unlock(&priv->mutex); | |
6815 | return -EIO; | |
6816 | } | |
6817 | ||
6818 | spin_lock_irqsave(&priv->lock, flags); | |
6819 | ||
6820 | if (priv->ibss_beacon) | |
6821 | dev_kfree_skb(priv->ibss_beacon); | |
6822 | ||
6823 | priv->ibss_beacon = skb; | |
6824 | ||
6825 | priv->assoc_id = 0; | |
6826 | ||
6827 | IWL_DEBUG_MAC80211("leave\n"); | |
6828 | spin_unlock_irqrestore(&priv->lock, flags); | |
6829 | ||
bf85ea4f | 6830 | iwlcore_reset_qos(priv); |
b481de9c ZY |
6831 | |
6832 | queue_work(priv->workqueue, &priv->post_associate.work); | |
6833 | ||
6834 | mutex_unlock(&priv->mutex); | |
6835 | ||
6836 | return 0; | |
6837 | } | |
6838 | ||
b481de9c ZY |
6839 | /***************************************************************************** |
6840 | * | |
6841 | * sysfs attributes | |
6842 | * | |
6843 | *****************************************************************************/ | |
6844 | ||
0a6857e7 | 6845 | #ifdef CONFIG_IWLWIFI_DEBUG |
b481de9c ZY |
6846 | |
6847 | /* | |
6848 | * The following adds a new attribute to the sysfs representation | |
6849 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | |
6850 | * used for controlling the debug level. | |
6851 | * | |
6852 | * See the level definitions in iwl for details. | |
6853 | */ | |
6854 | ||
6855 | static ssize_t show_debug_level(struct device_driver *d, char *buf) | |
6856 | { | |
0a6857e7 | 6857 | return sprintf(buf, "0x%08X\n", iwl_debug_level); |
b481de9c ZY |
6858 | } |
6859 | static ssize_t store_debug_level(struct device_driver *d, | |
6860 | const char *buf, size_t count) | |
6861 | { | |
6862 | char *p = (char *)buf; | |
6863 | u32 val; | |
6864 | ||
6865 | val = simple_strtoul(p, &p, 0); | |
6866 | if (p == buf) | |
6867 | printk(KERN_INFO DRV_NAME | |
6868 | ": %s is not in hex or decimal form.\n", buf); | |
6869 | else | |
0a6857e7 | 6870 | iwl_debug_level = val; |
b481de9c ZY |
6871 | |
6872 | return strnlen(buf, count); | |
6873 | } | |
6874 | ||
6875 | static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO, | |
6876 | show_debug_level, store_debug_level); | |
6877 | ||
0a6857e7 | 6878 | #endif /* CONFIG_IWLWIFI_DEBUG */ |
b481de9c | 6879 | |
b481de9c ZY |
6880 | |
6881 | static ssize_t show_temperature(struct device *d, | |
6882 | struct device_attribute *attr, char *buf) | |
6883 | { | |
c79dd5b5 | 6884 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c | 6885 | |
fee1247a | 6886 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
6887 | return -EAGAIN; |
6888 | ||
bb8c093b | 6889 | return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv)); |
b481de9c ZY |
6890 | } |
6891 | ||
6892 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | |
6893 | ||
6894 | static ssize_t show_rs_window(struct device *d, | |
6895 | struct device_attribute *attr, | |
6896 | char *buf) | |
6897 | { | |
c79dd5b5 | 6898 | struct iwl_priv *priv = d->driver_data; |
bb8c093b | 6899 | return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID); |
b481de9c ZY |
6900 | } |
6901 | static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL); | |
6902 | ||
6903 | static ssize_t show_tx_power(struct device *d, | |
6904 | struct device_attribute *attr, char *buf) | |
6905 | { | |
c79dd5b5 | 6906 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6907 | return sprintf(buf, "%d\n", priv->user_txpower_limit); |
6908 | } | |
6909 | ||
6910 | static ssize_t store_tx_power(struct device *d, | |
6911 | struct device_attribute *attr, | |
6912 | const char *buf, size_t count) | |
6913 | { | |
c79dd5b5 | 6914 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6915 | char *p = (char *)buf; |
6916 | u32 val; | |
6917 | ||
6918 | val = simple_strtoul(p, &p, 10); | |
6919 | if (p == buf) | |
6920 | printk(KERN_INFO DRV_NAME | |
6921 | ": %s is not in decimal form.\n", buf); | |
6922 | else | |
bb8c093b | 6923 | iwl4965_hw_reg_set_txpower(priv, val); |
b481de9c ZY |
6924 | |
6925 | return count; | |
6926 | } | |
6927 | ||
6928 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | |
6929 | ||
6930 | static ssize_t show_flags(struct device *d, | |
6931 | struct device_attribute *attr, char *buf) | |
6932 | { | |
c79dd5b5 | 6933 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6934 | |
6935 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | |
6936 | } | |
6937 | ||
6938 | static ssize_t store_flags(struct device *d, | |
6939 | struct device_attribute *attr, | |
6940 | const char *buf, size_t count) | |
6941 | { | |
c79dd5b5 | 6942 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6943 | u32 flags = simple_strtoul(buf, NULL, 0); |
6944 | ||
6945 | mutex_lock(&priv->mutex); | |
6946 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | |
6947 | /* Cancel any currently running scans... */ | |
bb8c093b | 6948 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
6949 | IWL_WARNING("Could not cancel scan.\n"); |
6950 | else { | |
6951 | IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n", | |
6952 | flags); | |
6953 | priv->staging_rxon.flags = cpu_to_le32(flags); | |
bb8c093b | 6954 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6955 | } |
6956 | } | |
6957 | mutex_unlock(&priv->mutex); | |
6958 | ||
6959 | return count; | |
6960 | } | |
6961 | ||
6962 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | |
6963 | ||
6964 | static ssize_t show_filter_flags(struct device *d, | |
6965 | struct device_attribute *attr, char *buf) | |
6966 | { | |
c79dd5b5 | 6967 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6968 | |
6969 | return sprintf(buf, "0x%04X\n", | |
6970 | le32_to_cpu(priv->active_rxon.filter_flags)); | |
6971 | } | |
6972 | ||
6973 | static ssize_t store_filter_flags(struct device *d, | |
6974 | struct device_attribute *attr, | |
6975 | const char *buf, size_t count) | |
6976 | { | |
c79dd5b5 | 6977 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
b481de9c ZY |
6978 | u32 filter_flags = simple_strtoul(buf, NULL, 0); |
6979 | ||
6980 | mutex_lock(&priv->mutex); | |
6981 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | |
6982 | /* Cancel any currently running scans... */ | |
bb8c093b | 6983 | if (iwl4965_scan_cancel_timeout(priv, 100)) |
b481de9c ZY |
6984 | IWL_WARNING("Could not cancel scan.\n"); |
6985 | else { | |
6986 | IWL_DEBUG_INFO("Committing rxon.filter_flags = " | |
6987 | "0x%04X\n", filter_flags); | |
6988 | priv->staging_rxon.filter_flags = | |
6989 | cpu_to_le32(filter_flags); | |
bb8c093b | 6990 | iwl4965_commit_rxon(priv); |
b481de9c ZY |
6991 | } |
6992 | } | |
6993 | mutex_unlock(&priv->mutex); | |
6994 | ||
6995 | return count; | |
6996 | } | |
6997 | ||
6998 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | |
6999 | store_filter_flags); | |
7000 | ||
c8b0e6e1 | 7001 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
7002 | |
7003 | static ssize_t show_measurement(struct device *d, | |
7004 | struct device_attribute *attr, char *buf) | |
7005 | { | |
c79dd5b5 | 7006 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 7007 | struct iwl4965_spectrum_notification measure_report; |
b481de9c ZY |
7008 | u32 size = sizeof(measure_report), len = 0, ofs = 0; |
7009 | u8 *data = (u8 *) & measure_report; | |
7010 | unsigned long flags; | |
7011 | ||
7012 | spin_lock_irqsave(&priv->lock, flags); | |
7013 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | |
7014 | spin_unlock_irqrestore(&priv->lock, flags); | |
7015 | return 0; | |
7016 | } | |
7017 | memcpy(&measure_report, &priv->measure_report, size); | |
7018 | priv->measurement_status = 0; | |
7019 | spin_unlock_irqrestore(&priv->lock, flags); | |
7020 | ||
7021 | while (size && (PAGE_SIZE - len)) { | |
7022 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
7023 | PAGE_SIZE - len, 1); | |
7024 | len = strlen(buf); | |
7025 | if (PAGE_SIZE - len) | |
7026 | buf[len++] = '\n'; | |
7027 | ||
7028 | ofs += 16; | |
7029 | size -= min(size, 16U); | |
7030 | } | |
7031 | ||
7032 | return len; | |
7033 | } | |
7034 | ||
7035 | static ssize_t store_measurement(struct device *d, | |
7036 | struct device_attribute *attr, | |
7037 | const char *buf, size_t count) | |
7038 | { | |
c79dd5b5 | 7039 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7040 | struct ieee80211_measurement_params params = { |
7041 | .channel = le16_to_cpu(priv->active_rxon.channel), | |
7042 | .start_time = cpu_to_le64(priv->last_tsf), | |
7043 | .duration = cpu_to_le16(1), | |
7044 | }; | |
7045 | u8 type = IWL_MEASURE_BASIC; | |
7046 | u8 buffer[32]; | |
7047 | u8 channel; | |
7048 | ||
7049 | if (count) { | |
7050 | char *p = buffer; | |
7051 | strncpy(buffer, buf, min(sizeof(buffer), count)); | |
7052 | channel = simple_strtoul(p, NULL, 0); | |
7053 | if (channel) | |
7054 | params.channel = channel; | |
7055 | ||
7056 | p = buffer; | |
7057 | while (*p && *p != ' ') | |
7058 | p++; | |
7059 | if (*p) | |
7060 | type = simple_strtoul(p + 1, NULL, 0); | |
7061 | } | |
7062 | ||
7063 | IWL_DEBUG_INFO("Invoking measurement of type %d on " | |
7064 | "channel %d (for '%s')\n", type, params.channel, buf); | |
bb8c093b | 7065 | iwl4965_get_measurement(priv, ¶ms, type); |
b481de9c ZY |
7066 | |
7067 | return count; | |
7068 | } | |
7069 | ||
7070 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | |
7071 | show_measurement, store_measurement); | |
c8b0e6e1 | 7072 | #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */ |
b481de9c ZY |
7073 | |
7074 | static ssize_t store_retry_rate(struct device *d, | |
7075 | struct device_attribute *attr, | |
7076 | const char *buf, size_t count) | |
7077 | { | |
c79dd5b5 | 7078 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7079 | |
7080 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | |
7081 | if (priv->retry_rate <= 0) | |
7082 | priv->retry_rate = 1; | |
7083 | ||
7084 | return count; | |
7085 | } | |
7086 | ||
7087 | static ssize_t show_retry_rate(struct device *d, | |
7088 | struct device_attribute *attr, char *buf) | |
7089 | { | |
c79dd5b5 | 7090 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7091 | return sprintf(buf, "%d", priv->retry_rate); |
7092 | } | |
7093 | ||
7094 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | |
7095 | store_retry_rate); | |
7096 | ||
7097 | static ssize_t store_power_level(struct device *d, | |
7098 | struct device_attribute *attr, | |
7099 | const char *buf, size_t count) | |
7100 | { | |
c79dd5b5 | 7101 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7102 | int rc; |
7103 | int mode; | |
7104 | ||
7105 | mode = simple_strtoul(buf, NULL, 0); | |
7106 | mutex_lock(&priv->mutex); | |
7107 | ||
fee1247a | 7108 | if (!iwl_is_ready(priv)) { |
b481de9c ZY |
7109 | rc = -EAGAIN; |
7110 | goto out; | |
7111 | } | |
7112 | ||
5da4b55f MA |
7113 | rc = iwl_power_set_user_mode(priv, mode); |
7114 | if (rc) { | |
7115 | IWL_DEBUG_MAC80211("failed setting power mode.\n"); | |
7116 | goto out; | |
b481de9c | 7117 | } |
b481de9c ZY |
7118 | rc = count; |
7119 | ||
7120 | out: | |
7121 | mutex_unlock(&priv->mutex); | |
7122 | return rc; | |
7123 | } | |
7124 | ||
7125 | #define MAX_WX_STRING 80 | |
7126 | ||
7127 | /* Values are in microsecond */ | |
7128 | static const s32 timeout_duration[] = { | |
7129 | 350000, | |
7130 | 250000, | |
7131 | 75000, | |
7132 | 37000, | |
7133 | 25000, | |
7134 | }; | |
7135 | static const s32 period_duration[] = { | |
7136 | 400000, | |
7137 | 700000, | |
7138 | 1000000, | |
7139 | 1000000, | |
7140 | 1000000 | |
7141 | }; | |
7142 | ||
7143 | static ssize_t show_power_level(struct device *d, | |
7144 | struct device_attribute *attr, char *buf) | |
7145 | { | |
c79dd5b5 | 7146 | struct iwl_priv *priv = dev_get_drvdata(d); |
5da4b55f | 7147 | int level = priv->power_data.power_mode; |
b481de9c ZY |
7148 | char *p = buf; |
7149 | ||
7150 | p += sprintf(p, "%d ", level); | |
7151 | switch (level) { | |
7152 | case IWL_POWER_MODE_CAM: | |
7153 | case IWL_POWER_AC: | |
7154 | p += sprintf(p, "(AC)"); | |
7155 | break; | |
7156 | case IWL_POWER_BATTERY: | |
7157 | p += sprintf(p, "(BATTERY)"); | |
7158 | break; | |
7159 | default: | |
7160 | p += sprintf(p, | |
7161 | "(Timeout %dms, Period %dms)", | |
7162 | timeout_duration[level - 1] / 1000, | |
7163 | period_duration[level - 1] / 1000); | |
7164 | } | |
5da4b55f | 7165 | /* |
b481de9c ZY |
7166 | if (!(priv->power_mode & IWL_POWER_ENABLED)) |
7167 | p += sprintf(p, " OFF\n"); | |
7168 | else | |
7169 | p += sprintf(p, " \n"); | |
5da4b55f MA |
7170 | */ |
7171 | p += sprintf(p, " \n"); | |
b481de9c | 7172 | return (p - buf + 1); |
b481de9c ZY |
7173 | } |
7174 | ||
7175 | static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level, | |
7176 | store_power_level); | |
7177 | ||
7178 | static ssize_t show_channels(struct device *d, | |
7179 | struct device_attribute *attr, char *buf) | |
7180 | { | |
8318d78a JB |
7181 | /* all this shit doesn't belong into sysfs anyway */ |
7182 | return 0; | |
b481de9c ZY |
7183 | } |
7184 | ||
7185 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | |
7186 | ||
7187 | static ssize_t show_statistics(struct device *d, | |
7188 | struct device_attribute *attr, char *buf) | |
7189 | { | |
c79dd5b5 | 7190 | struct iwl_priv *priv = dev_get_drvdata(d); |
bb8c093b | 7191 | u32 size = sizeof(struct iwl4965_notif_statistics); |
b481de9c ZY |
7192 | u32 len = 0, ofs = 0; |
7193 | u8 *data = (u8 *) & priv->statistics; | |
7194 | int rc = 0; | |
7195 | ||
fee1247a | 7196 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
7197 | return -EAGAIN; |
7198 | ||
7199 | mutex_lock(&priv->mutex); | |
49ea8596 | 7200 | rc = iwl_send_statistics_request(priv, 0); |
b481de9c ZY |
7201 | mutex_unlock(&priv->mutex); |
7202 | ||
7203 | if (rc) { | |
7204 | len = sprintf(buf, | |
7205 | "Error sending statistics request: 0x%08X\n", rc); | |
7206 | return len; | |
7207 | } | |
7208 | ||
7209 | while (size && (PAGE_SIZE - len)) { | |
7210 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | |
7211 | PAGE_SIZE - len, 1); | |
7212 | len = strlen(buf); | |
7213 | if (PAGE_SIZE - len) | |
7214 | buf[len++] = '\n'; | |
7215 | ||
7216 | ofs += 16; | |
7217 | size -= min(size, 16U); | |
7218 | } | |
7219 | ||
7220 | return len; | |
7221 | } | |
7222 | ||
7223 | static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); | |
7224 | ||
7225 | static ssize_t show_antenna(struct device *d, | |
7226 | struct device_attribute *attr, char *buf) | |
7227 | { | |
c79dd5b5 | 7228 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c | 7229 | |
fee1247a | 7230 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
7231 | return -EAGAIN; |
7232 | ||
7233 | return sprintf(buf, "%d\n", priv->antenna); | |
7234 | } | |
7235 | ||
7236 | static ssize_t store_antenna(struct device *d, | |
7237 | struct device_attribute *attr, | |
7238 | const char *buf, size_t count) | |
7239 | { | |
7240 | int ant; | |
c79dd5b5 | 7241 | struct iwl_priv *priv = dev_get_drvdata(d); |
b481de9c ZY |
7242 | |
7243 | if (count == 0) | |
7244 | return 0; | |
7245 | ||
7246 | if (sscanf(buf, "%1i", &ant) != 1) { | |
7247 | IWL_DEBUG_INFO("not in hex or decimal form.\n"); | |
7248 | return count; | |
7249 | } | |
7250 | ||
7251 | if ((ant >= 0) && (ant <= 2)) { | |
7252 | IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant); | |
bb8c093b | 7253 | priv->antenna = (enum iwl4965_antenna)ant; |
b481de9c ZY |
7254 | } else |
7255 | IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant); | |
7256 | ||
7257 | ||
7258 | return count; | |
7259 | } | |
7260 | ||
7261 | static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna); | |
7262 | ||
7263 | static ssize_t show_status(struct device *d, | |
7264 | struct device_attribute *attr, char *buf) | |
7265 | { | |
c79dd5b5 | 7266 | struct iwl_priv *priv = (struct iwl_priv *)d->driver_data; |
fee1247a | 7267 | if (!iwl_is_alive(priv)) |
b481de9c ZY |
7268 | return -EAGAIN; |
7269 | return sprintf(buf, "0x%08x\n", (int)priv->status); | |
7270 | } | |
7271 | ||
7272 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | |
7273 | ||
7274 | static ssize_t dump_error_log(struct device *d, | |
7275 | struct device_attribute *attr, | |
7276 | const char *buf, size_t count) | |
7277 | { | |
7278 | char *p = (char *)buf; | |
7279 | ||
7280 | if (p[0] == '1') | |
c79dd5b5 | 7281 | iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
7282 | |
7283 | return strnlen(buf, count); | |
7284 | } | |
7285 | ||
7286 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | |
7287 | ||
7288 | static ssize_t dump_event_log(struct device *d, | |
7289 | struct device_attribute *attr, | |
7290 | const char *buf, size_t count) | |
7291 | { | |
7292 | char *p = (char *)buf; | |
7293 | ||
7294 | if (p[0] == '1') | |
c79dd5b5 | 7295 | iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data); |
b481de9c ZY |
7296 | |
7297 | return strnlen(buf, count); | |
7298 | } | |
7299 | ||
7300 | static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log); | |
7301 | ||
7302 | /***************************************************************************** | |
7303 | * | |
7304 | * driver setup and teardown | |
7305 | * | |
7306 | *****************************************************************************/ | |
7307 | ||
c79dd5b5 | 7308 | static void iwl4965_setup_deferred_work(struct iwl_priv *priv) |
b481de9c ZY |
7309 | { |
7310 | priv->workqueue = create_workqueue(DRV_NAME); | |
7311 | ||
7312 | init_waitqueue_head(&priv->wait_command_queue); | |
7313 | ||
bb8c093b CH |
7314 | INIT_WORK(&priv->up, iwl4965_bg_up); |
7315 | INIT_WORK(&priv->restart, iwl4965_bg_restart); | |
7316 | INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish); | |
7317 | INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed); | |
7318 | INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan); | |
7319 | INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan); | |
7320 | INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill); | |
7321 | INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update); | |
7322 | INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate); | |
7323 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start); | |
7324 | INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start); | |
7325 | INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check); | |
7326 | ||
7327 | iwl4965_hw_setup_deferred_work(priv); | |
b481de9c ZY |
7328 | |
7329 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | |
bb8c093b | 7330 | iwl4965_irq_tasklet, (unsigned long)priv); |
b481de9c ZY |
7331 | } |
7332 | ||
c79dd5b5 | 7333 | static void iwl4965_cancel_deferred_work(struct iwl_priv *priv) |
b481de9c | 7334 | { |
bb8c093b | 7335 | iwl4965_hw_cancel_deferred_work(priv); |
b481de9c | 7336 | |
3ae6a054 | 7337 | cancel_delayed_work_sync(&priv->init_alive_start); |
b481de9c ZY |
7338 | cancel_delayed_work(&priv->scan_check); |
7339 | cancel_delayed_work(&priv->alive_start); | |
7340 | cancel_delayed_work(&priv->post_associate); | |
7341 | cancel_work_sync(&priv->beacon_update); | |
7342 | } | |
7343 | ||
bb8c093b | 7344 | static struct attribute *iwl4965_sysfs_entries[] = { |
b481de9c ZY |
7345 | &dev_attr_antenna.attr, |
7346 | &dev_attr_channels.attr, | |
7347 | &dev_attr_dump_errors.attr, | |
7348 | &dev_attr_dump_events.attr, | |
7349 | &dev_attr_flags.attr, | |
7350 | &dev_attr_filter_flags.attr, | |
c8b0e6e1 | 7351 | #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT |
b481de9c ZY |
7352 | &dev_attr_measurement.attr, |
7353 | #endif | |
7354 | &dev_attr_power_level.attr, | |
7355 | &dev_attr_retry_rate.attr, | |
b481de9c ZY |
7356 | &dev_attr_rs_window.attr, |
7357 | &dev_attr_statistics.attr, | |
7358 | &dev_attr_status.attr, | |
7359 | &dev_attr_temperature.attr, | |
b481de9c ZY |
7360 | &dev_attr_tx_power.attr, |
7361 | ||
7362 | NULL | |
7363 | }; | |
7364 | ||
bb8c093b | 7365 | static struct attribute_group iwl4965_attribute_group = { |
b481de9c | 7366 | .name = NULL, /* put in device directory */ |
bb8c093b | 7367 | .attrs = iwl4965_sysfs_entries, |
b481de9c ZY |
7368 | }; |
7369 | ||
bb8c093b CH |
7370 | static struct ieee80211_ops iwl4965_hw_ops = { |
7371 | .tx = iwl4965_mac_tx, | |
7372 | .start = iwl4965_mac_start, | |
7373 | .stop = iwl4965_mac_stop, | |
7374 | .add_interface = iwl4965_mac_add_interface, | |
7375 | .remove_interface = iwl4965_mac_remove_interface, | |
7376 | .config = iwl4965_mac_config, | |
7377 | .config_interface = iwl4965_mac_config_interface, | |
7378 | .configure_filter = iwl4965_configure_filter, | |
7379 | .set_key = iwl4965_mac_set_key, | |
ab885f8c | 7380 | .update_tkip_key = iwl4965_mac_update_tkip_key, |
bb8c093b CH |
7381 | .get_stats = iwl4965_mac_get_stats, |
7382 | .get_tx_stats = iwl4965_mac_get_tx_stats, | |
7383 | .conf_tx = iwl4965_mac_conf_tx, | |
7384 | .get_tsf = iwl4965_mac_get_tsf, | |
7385 | .reset_tsf = iwl4965_mac_reset_tsf, | |
7386 | .beacon_update = iwl4965_mac_beacon_update, | |
471b3efd | 7387 | .bss_info_changed = iwl4965_bss_info_changed, |
c8b0e6e1 | 7388 | #ifdef CONFIG_IWL4965_HT |
9ab46173 | 7389 | .ampdu_action = iwl4965_mac_ampdu_action, |
c8b0e6e1 | 7390 | #endif /* CONFIG_IWL4965_HT */ |
bb8c093b | 7391 | .hw_scan = iwl4965_mac_hw_scan |
b481de9c ZY |
7392 | }; |
7393 | ||
bb8c093b | 7394 | static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b481de9c ZY |
7395 | { |
7396 | int err = 0; | |
c79dd5b5 | 7397 | struct iwl_priv *priv; |
b481de9c | 7398 | struct ieee80211_hw *hw; |
82b9a121 | 7399 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); |
0359facc | 7400 | unsigned long flags; |
5a66926a | 7401 | DECLARE_MAC_BUF(mac); |
b481de9c | 7402 | |
316c30d9 AK |
7403 | /************************ |
7404 | * 1. Allocating HW data | |
7405 | ************************/ | |
7406 | ||
6440adb5 BC |
7407 | /* Disabling hardware scan means that mac80211 will perform scans |
7408 | * "the hard way", rather than using device's scan. */ | |
1ea87396 | 7409 | if (cfg->mod_params->disable_hw_scan) { |
b481de9c | 7410 | IWL_DEBUG_INFO("Disabling hw_scan\n"); |
bb8c093b | 7411 | iwl4965_hw_ops.hw_scan = NULL; |
b481de9c ZY |
7412 | } |
7413 | ||
1d0a082d AK |
7414 | hw = iwl_alloc_all(cfg, &iwl4965_hw_ops); |
7415 | if (!hw) { | |
b481de9c ZY |
7416 | err = -ENOMEM; |
7417 | goto out; | |
7418 | } | |
1d0a082d AK |
7419 | priv = hw->priv; |
7420 | /* At this point both hw and priv are allocated. */ | |
7421 | ||
b481de9c ZY |
7422 | SET_IEEE80211_DEV(hw, &pdev->dev); |
7423 | ||
7424 | IWL_DEBUG_INFO("*** LOAD DRIVER ***\n"); | |
82b9a121 | 7425 | priv->cfg = cfg; |
b481de9c | 7426 | priv->pci_dev = pdev; |
316c30d9 | 7427 | |
0a6857e7 | 7428 | #ifdef CONFIG_IWLWIFI_DEBUG |
1ea87396 | 7429 | iwl_debug_level = priv->cfg->mod_params->debug; |
b481de9c ZY |
7430 | atomic_set(&priv->restrict_refcnt, 0); |
7431 | #endif | |
b481de9c | 7432 | |
316c30d9 AK |
7433 | /************************** |
7434 | * 2. Initializing PCI bus | |
7435 | **************************/ | |
7436 | if (pci_enable_device(pdev)) { | |
7437 | err = -ENODEV; | |
7438 | goto out_ieee80211_free_hw; | |
7439 | } | |
7440 | ||
7441 | pci_set_master(pdev); | |
7442 | ||
7443 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
7444 | if (!err) | |
7445 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
7446 | if (err) { | |
7447 | printk(KERN_WARNING DRV_NAME | |
7448 | ": No suitable DMA available.\n"); | |
7449 | goto out_pci_disable_device; | |
7450 | } | |
7451 | ||
7452 | err = pci_request_regions(pdev, DRV_NAME); | |
7453 | if (err) | |
7454 | goto out_pci_disable_device; | |
7455 | ||
7456 | pci_set_drvdata(pdev, priv); | |
7457 | ||
7458 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | |
7459 | * PCI Tx retries from interfering with C3 CPU state */ | |
7460 | pci_write_config_byte(pdev, 0x41, 0x00); | |
7461 | ||
7462 | /*********************** | |
7463 | * 3. Read REV register | |
7464 | ***********************/ | |
7465 | priv->hw_base = pci_iomap(pdev, 0, 0); | |
7466 | if (!priv->hw_base) { | |
7467 | err = -ENODEV; | |
7468 | goto out_pci_release_regions; | |
7469 | } | |
7470 | ||
7471 | IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n", | |
7472 | (unsigned long long) pci_resource_len(pdev, 0)); | |
7473 | IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base); | |
7474 | ||
7475 | printk(KERN_INFO DRV_NAME | |
7476 | ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name); | |
7477 | ||
7478 | /***************** | |
7479 | * 4. Read EEPROM | |
7480 | *****************/ | |
7481 | /* nic init */ | |
3395f6e9 | 7482 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, |
316c30d9 AK |
7483 | CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); |
7484 | ||
3395f6e9 TW |
7485 | iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); |
7486 | err = iwl_poll_bit(priv, CSR_GP_CNTRL, | |
316c30d9 AK |
7487 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, |
7488 | CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); | |
7489 | if (err < 0) { | |
7490 | IWL_DEBUG_INFO("Failed to init the card\n"); | |
7491 | goto out_iounmap; | |
7492 | } | |
7493 | /* Read the EEPROM */ | |
7494 | err = iwl_eeprom_init(priv); | |
7495 | if (err) { | |
7496 | IWL_ERROR("Unable to init EEPROM\n"); | |
7497 | goto out_iounmap; | |
7498 | } | |
7499 | /* MAC Address location in EEPROM same for 3945/4965 */ | |
7500 | iwl_eeprom_get_mac(priv, priv->mac_addr); | |
7501 | IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr)); | |
7502 | SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); | |
7503 | ||
7504 | /************************ | |
7505 | * 5. Setup HW constants | |
7506 | ************************/ | |
7507 | /* Device-specific setup */ | |
5425e490 TW |
7508 | if (priv->cfg->ops->lib->set_hw_params(priv)) { |
7509 | IWL_ERROR("failed to set hw parameters\n"); | |
073d3f5f | 7510 | goto out_free_eeprom; |
316c30d9 AK |
7511 | } |
7512 | ||
7513 | /******************* | |
7514 | * 6. Setup hw/priv | |
7515 | *******************/ | |
b481de9c | 7516 | |
bf85ea4f AK |
7517 | err = iwl_setup(priv); |
7518 | if (err) | |
5425e490 | 7519 | goto out_unset_hw_params; |
bf85ea4f | 7520 | /* At this point both hw and priv are initialized. */ |
316c30d9 AK |
7521 | |
7522 | /********************************** | |
7523 | * 7. Initialize module parameters | |
7524 | **********************************/ | |
7525 | ||
7526 | /* Disable radio (SW RF KILL) via parameter when loading driver */ | |
1ea87396 | 7527 | if (priv->cfg->mod_params->disable) { |
316c30d9 AK |
7528 | set_bit(STATUS_RF_KILL_SW, &priv->status); |
7529 | IWL_DEBUG_INFO("Radio disabled.\n"); | |
7530 | } | |
7531 | ||
1ea87396 | 7532 | if (priv->cfg->mod_params->enable_qos) |
316c30d9 AK |
7533 | priv->qos_data.qos_enable = 1; |
7534 | ||
7535 | /******************** | |
7536 | * 8. Setup services | |
7537 | ********************/ | |
0359facc | 7538 | spin_lock_irqsave(&priv->lock, flags); |
316c30d9 | 7539 | iwl4965_disable_interrupts(priv); |
0359facc | 7540 | spin_unlock_irqrestore(&priv->lock, flags); |
316c30d9 AK |
7541 | |
7542 | err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
7543 | if (err) { | |
7544 | IWL_ERROR("failed to create sysfs device attributes\n"); | |
5425e490 | 7545 | goto out_unset_hw_params; |
316c30d9 AK |
7546 | } |
7547 | ||
7548 | err = iwl_dbgfs_register(priv, DRV_NAME); | |
7549 | if (err) { | |
7550 | IWL_ERROR("failed to create debugfs files\n"); | |
7551 | goto out_remove_sysfs; | |
7552 | } | |
7553 | ||
7554 | iwl4965_setup_deferred_work(priv); | |
7555 | iwl4965_setup_rx_handlers(priv); | |
7556 | ||
7557 | /******************** | |
7558 | * 9. Conclude | |
7559 | ********************/ | |
5a66926a ZY |
7560 | pci_save_state(pdev); |
7561 | pci_disable_device(pdev); | |
b481de9c | 7562 | |
c8381fdc MA |
7563 | /* notify iwlcore to init */ |
7564 | iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT); | |
b481de9c ZY |
7565 | return 0; |
7566 | ||
316c30d9 AK |
7567 | out_remove_sysfs: |
7568 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); | |
5425e490 TW |
7569 | out_unset_hw_params: |
7570 | iwl4965_unset_hw_params(priv); | |
073d3f5f TW |
7571 | out_free_eeprom: |
7572 | iwl_eeprom_free(priv); | |
b481de9c ZY |
7573 | out_iounmap: |
7574 | pci_iounmap(pdev, priv->hw_base); | |
7575 | out_pci_release_regions: | |
7576 | pci_release_regions(pdev); | |
316c30d9 | 7577 | pci_set_drvdata(pdev, NULL); |
b481de9c ZY |
7578 | out_pci_disable_device: |
7579 | pci_disable_device(pdev); | |
b481de9c ZY |
7580 | out_ieee80211_free_hw: |
7581 | ieee80211_free_hw(priv->hw); | |
7582 | out: | |
7583 | return err; | |
7584 | } | |
7585 | ||
c83dbf68 | 7586 | static void __devexit iwl4965_pci_remove(struct pci_dev *pdev) |
b481de9c | 7587 | { |
c79dd5b5 | 7588 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c ZY |
7589 | struct list_head *p, *q; |
7590 | int i; | |
0359facc | 7591 | unsigned long flags; |
b481de9c ZY |
7592 | |
7593 | if (!priv) | |
7594 | return; | |
7595 | ||
7596 | IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n"); | |
7597 | ||
c4f55232 RR |
7598 | if (priv->mac80211_registered) { |
7599 | ieee80211_unregister_hw(priv->hw); | |
7600 | priv->mac80211_registered = 0; | |
7601 | } | |
7602 | ||
b481de9c | 7603 | set_bit(STATUS_EXIT_PENDING, &priv->status); |
b24d22b1 | 7604 | |
bb8c093b | 7605 | iwl4965_down(priv); |
b481de9c | 7606 | |
0359facc MA |
7607 | /* make sure we flush any pending irq or |
7608 | * tasklet for the driver | |
7609 | */ | |
7610 | spin_lock_irqsave(&priv->lock, flags); | |
7611 | iwl4965_disable_interrupts(priv); | |
7612 | spin_unlock_irqrestore(&priv->lock, flags); | |
7613 | ||
7614 | iwl_synchronize_irq(priv); | |
7615 | ||
b481de9c ZY |
7616 | /* Free MAC hash list for ADHOC */ |
7617 | for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) { | |
7618 | list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) { | |
7619 | list_del(p); | |
bb8c093b | 7620 | kfree(list_entry(p, struct iwl4965_ibss_seq, list)); |
b481de9c ZY |
7621 | } |
7622 | } | |
7623 | ||
c8381fdc | 7624 | iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT); |
712b6cf5 | 7625 | iwl_dbgfs_unregister(priv); |
bb8c093b | 7626 | sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group); |
b481de9c | 7627 | |
bb8c093b | 7628 | iwl4965_dealloc_ucode_pci(priv); |
b481de9c ZY |
7629 | |
7630 | if (priv->rxq.bd) | |
bb8c093b CH |
7631 | iwl4965_rx_queue_free(priv, &priv->rxq); |
7632 | iwl4965_hw_txq_ctx_free(priv); | |
b481de9c | 7633 | |
5425e490 | 7634 | iwl4965_unset_hw_params(priv); |
bf85ea4f | 7635 | iwlcore_clear_stations_table(priv); |
073d3f5f | 7636 | iwl_eeprom_free(priv); |
b481de9c | 7637 | |
b481de9c | 7638 | |
948c171c MA |
7639 | /*netif_stop_queue(dev); */ |
7640 | flush_workqueue(priv->workqueue); | |
7641 | ||
bb8c093b | 7642 | /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes |
b481de9c ZY |
7643 | * priv->workqueue... so we can't take down the workqueue |
7644 | * until now... */ | |
7645 | destroy_workqueue(priv->workqueue); | |
7646 | priv->workqueue = NULL; | |
7647 | ||
b481de9c ZY |
7648 | pci_iounmap(pdev, priv->hw_base); |
7649 | pci_release_regions(pdev); | |
7650 | pci_disable_device(pdev); | |
7651 | pci_set_drvdata(pdev, NULL); | |
7652 | ||
bf85ea4f | 7653 | iwl_free_channel_map(priv); |
849e0dce | 7654 | iwl4965_free_geos(priv); |
b481de9c ZY |
7655 | |
7656 | if (priv->ibss_beacon) | |
7657 | dev_kfree_skb(priv->ibss_beacon); | |
7658 | ||
7659 | ieee80211_free_hw(priv->hw); | |
7660 | } | |
7661 | ||
7662 | #ifdef CONFIG_PM | |
7663 | ||
bb8c093b | 7664 | static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
b481de9c | 7665 | { |
c79dd5b5 | 7666 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 7667 | |
e655b9f0 ZY |
7668 | if (priv->is_open) { |
7669 | set_bit(STATUS_IN_SUSPEND, &priv->status); | |
7670 | iwl4965_mac_stop(priv->hw); | |
7671 | priv->is_open = 1; | |
7672 | } | |
b481de9c | 7673 | |
b481de9c ZY |
7674 | pci_set_power_state(pdev, PCI_D3hot); |
7675 | ||
b481de9c ZY |
7676 | return 0; |
7677 | } | |
7678 | ||
bb8c093b | 7679 | static int iwl4965_pci_resume(struct pci_dev *pdev) |
b481de9c | 7680 | { |
c79dd5b5 | 7681 | struct iwl_priv *priv = pci_get_drvdata(pdev); |
b481de9c | 7682 | |
b481de9c | 7683 | pci_set_power_state(pdev, PCI_D0); |
b481de9c | 7684 | |
e655b9f0 ZY |
7685 | if (priv->is_open) |
7686 | iwl4965_mac_start(priv->hw); | |
b481de9c | 7687 | |
e655b9f0 | 7688 | clear_bit(STATUS_IN_SUSPEND, &priv->status); |
b481de9c ZY |
7689 | return 0; |
7690 | } | |
7691 | ||
7692 | #endif /* CONFIG_PM */ | |
7693 | ||
7694 | /***************************************************************************** | |
7695 | * | |
7696 | * driver and module entry point | |
7697 | * | |
7698 | *****************************************************************************/ | |
7699 | ||
fed9017e RR |
7700 | /* Hardware specific file defines the PCI IDs table for that hardware module */ |
7701 | static struct pci_device_id iwl_hw_card_ids[] = { | |
7702 | {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
7703 | {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, | |
7704 | {0} | |
7705 | }; | |
7706 | MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); | |
7707 | ||
7708 | static struct pci_driver iwl_driver = { | |
b481de9c | 7709 | .name = DRV_NAME, |
fed9017e | 7710 | .id_table = iwl_hw_card_ids, |
bb8c093b CH |
7711 | .probe = iwl4965_pci_probe, |
7712 | .remove = __devexit_p(iwl4965_pci_remove), | |
b481de9c | 7713 | #ifdef CONFIG_PM |
bb8c093b CH |
7714 | .suspend = iwl4965_pci_suspend, |
7715 | .resume = iwl4965_pci_resume, | |
b481de9c ZY |
7716 | #endif |
7717 | }; | |
7718 | ||
bb8c093b | 7719 | static int __init iwl4965_init(void) |
b481de9c ZY |
7720 | { |
7721 | ||
7722 | int ret; | |
7723 | printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); | |
7724 | printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n"); | |
897e1cf2 RC |
7725 | |
7726 | ret = iwl4965_rate_control_register(); | |
7727 | if (ret) { | |
7728 | IWL_ERROR("Unable to register rate control algorithm: %d\n", ret); | |
7729 | return ret; | |
7730 | } | |
7731 | ||
fed9017e | 7732 | ret = pci_register_driver(&iwl_driver); |
b481de9c ZY |
7733 | if (ret) { |
7734 | IWL_ERROR("Unable to initialize PCI module\n"); | |
897e1cf2 | 7735 | goto error_register; |
b481de9c | 7736 | } |
0a6857e7 | 7737 | #ifdef CONFIG_IWLWIFI_DEBUG |
fed9017e | 7738 | ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level); |
b481de9c ZY |
7739 | if (ret) { |
7740 | IWL_ERROR("Unable to create driver sysfs file\n"); | |
897e1cf2 | 7741 | goto error_debug; |
b481de9c ZY |
7742 | } |
7743 | #endif | |
7744 | ||
7745 | return ret; | |
897e1cf2 RC |
7746 | |
7747 | #ifdef CONFIG_IWLWIFI_DEBUG | |
7748 | error_debug: | |
fed9017e | 7749 | pci_unregister_driver(&iwl_driver); |
897e1cf2 RC |
7750 | #endif |
7751 | error_register: | |
7752 | iwl4965_rate_control_unregister(); | |
7753 | return ret; | |
b481de9c ZY |
7754 | } |
7755 | ||
bb8c093b | 7756 | static void __exit iwl4965_exit(void) |
b481de9c | 7757 | { |
0a6857e7 | 7758 | #ifdef CONFIG_IWLWIFI_DEBUG |
fed9017e | 7759 | driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level); |
b481de9c | 7760 | #endif |
fed9017e | 7761 | pci_unregister_driver(&iwl_driver); |
897e1cf2 | 7762 | iwl4965_rate_control_unregister(); |
b481de9c ZY |
7763 | } |
7764 | ||
bb8c093b CH |
7765 | module_exit(iwl4965_exit); |
7766 | module_init(iwl4965_init); |