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iwlwifi: do not register bands with no supported channels
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / iwlwifi / iwl4965-base.c
CommitLineData
b481de9c
ZY		 1/******************************************************************************
2 *
eb7ae89c 3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
b481de9c
ZY		 4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
b481de9c
ZY		 30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
b481de9c
ZY		 41#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
b481de9c
ZY		 44#include <net/mac80211.h>
45
46#include <asm/div64.h>
47
6bc913bd 48#include "iwl-eeprom.h"
82b9a121 49#include "iwl-core.h"
b481de9c
ZY		 50#include "iwl-4965.h"
51#include "iwl-helpers.h"
52
c79dd5b5 53static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 54 struct iwl4965_tx_queue *txq);
416e1438 55
b481de9c
ZY		 56/******************************************************************************
57 *
58 * module boiler plate
59 *
60 ******************************************************************************/
61
b481de9c
ZY		 62/*
63 * module name, copyright, version, etc.
64 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
65 */
66
67#define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
68
0a6857e7 69#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 70#define VD "d"
71#else
72#define VD
73#endif
74
c8b0e6e1 75#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 76#define VS "s"
77#else
78#define VS
79#endif
80
df48c323 81#define DRV_VERSION IWLWIFI_VERSION VD VS
b481de9c 82
b481de9c
ZY		 83
84MODULE_DESCRIPTION(DRV_DESCRIPTION);
85MODULE_VERSION(DRV_VERSION);
86MODULE_AUTHOR(DRV_COPYRIGHT);
87MODULE_LICENSE("GPL");
88
89__le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
90{
91 u16 fc = le16_to_cpu(hdr->frame_control);
92 int hdr_len = ieee80211_get_hdrlen(fc);
93
94 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
95 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
96 return NULL;
97}
98
8318d78a 99static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
c79dd5b5 100 struct iwl_priv *priv, enum ieee80211_band band)
b481de9c 101{
8318d78a 102 return priv->hw->wiphy->bands[band];
b481de9c
ZY		 103}
104
bb8c093b 105static int iwl4965_is_empty_essid(const char *essid, int essid_len)
b481de9c
ZY		 106{
107 /* Single white space is for Linksys APs */
108 if (essid_len == 1 && essid[0] == ' ')
109 return 1;
110
111 /* Otherwise, if the entire essid is 0, we assume it is hidden */
112 while (essid_len) {
113 essid_len--;
114 if (essid[essid_len] != '\0')
115 return 0;
116 }
117
118 return 1;
119}
120
bb8c093b 121static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
b481de9c
ZY		 122{
123 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
124 const char *s = essid;
125 char *d = escaped;
126
bb8c093b 127 if (iwl4965_is_empty_essid(essid, essid_len)) {
b481de9c
ZY		 128 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
129 return escaped;
130 }
131
132 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
133 while (essid_len--) {
134 if (*s == '\0') {
135 *d++ = '\\';
136 *d++ = '0';
137 s++;
138 } else
139 *d++ = *s++;
140 }
141 *d = '\0';
142 return escaped;
143}
144
b481de9c
ZY		 145/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
146 * DMA services
147 *
148 * Theory of operation
149 *
6440adb5
BC		 150 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
151 * of buffer descriptors, each of which points to one or more data buffers for
152 * the device to read from or fill. Driver and device exchange status of each
153 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
154 * entries in each circular buffer, to protect against confusing empty and full
155 * queue states.
156 *
157 * The device reads or writes the data in the queues via the device's several
158 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
b481de9c
ZY		 159 *
160 * For Tx queue, there are low mark and high mark limits. If, after queuing
161 * the packet for Tx, free space become < low mark, Tx queue stopped. When
162 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
163 * Tx queue resumed.
164 *
6440adb5
BC		 165 * The 4965 operates with up to 17 queues: One receive queue, one transmit
166 * queue (#4) for sending commands to the device firmware, and 15 other
167 * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
e3851447
BC		 168 *
169 * See more detailed info in iwl-4965-hw.h.
b481de9c
ZY		 170 ***************************************************/
171
fe01b477 172int iwl4965_queue_space(const struct iwl4965_queue *q)
b481de9c 173{
fc4b6853 174 int s = q->read_ptr - q->write_ptr;
b481de9c 175
fc4b6853 176 if (q->read_ptr > q->write_ptr)
b481de9c
ZY		 177 s -= q->n_bd;
178
179 if (s <= 0)
180 s += q->n_window;
181 /* keep some reserve to not confuse empty and full situations */
182 s -= 2;
183 if (s < 0)
184 s = 0;
185 return s;
186}
187
b481de9c 188
bb8c093b 189static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
b481de9c 190{
fc4b6853
TW		 191 return q->write_ptr > q->read_ptr ?
192 (i >= q->read_ptr && i < q->write_ptr) :
193 !(i < q->read_ptr && i >= q->write_ptr);
b481de9c
ZY		 194}
195
bb8c093b 196static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
b481de9c 197{
6440adb5 198 /* This is for scan command, the big buffer at end of command array */
b481de9c 199 if (is_huge)
6440adb5 200 return q->n_window; /* must be power of 2 */
b481de9c 201
6440adb5 202 /* Otherwise, use normal size buffers */
b481de9c
ZY		 203 return index & (q->n_window - 1);
204}
205
6440adb5
BC		 206/**
207 * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
208 */
c79dd5b5 209static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
b481de9c
ZY		 210 int count, int slots_num, u32 id)
211{
212 q->n_bd = count;
213 q->n_window = slots_num;
214 q->id = id;
215
c54b679d
TW		 216 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
217 * and iwl_queue_dec_wrap are broken. */
b481de9c
ZY		 218 BUG_ON(!is_power_of_2(count));
219
220 /* slots_num must be power-of-two size, otherwise
221 * get_cmd_index is broken. */
222 BUG_ON(!is_power_of_2(slots_num));
223
224 q->low_mark = q->n_window / 4;
225 if (q->low_mark < 4)
226 q->low_mark = 4;
227
228 q->high_mark = q->n_window / 8;
229 if (q->high_mark < 2)
230 q->high_mark = 2;
231
fc4b6853 232 q->write_ptr = q->read_ptr = 0;
b481de9c
ZY		 233
234 return 0;
235}
236
6440adb5
BC		 237/**
238 * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
239 */
c79dd5b5 240static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
bb8c093b 241 struct iwl4965_tx_queue *txq, u32 id)
b481de9c
ZY		 242{
243 struct pci_dev *dev = priv->pci_dev;
244
6440adb5
BC		 245 /* Driver private data, only for Tx (not command) queues,
246 * not shared with device. */
b481de9c
ZY		 247 if (id != IWL_CMD_QUEUE_NUM) {
248 txq->txb = kmalloc(sizeof(txq->txb[0]) *
249 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
250 if (!txq->txb) {
01ebd063 251 IWL_ERROR("kmalloc for auxiliary BD "
b481de9c
ZY		 252 "structures failed\n");
253 goto error;
254 }
255 } else
256 txq->txb = NULL;
257
6440adb5
BC		 258 /* Circular buffer of transmit frame descriptors (TFDs),
259 * shared with device */
b481de9c
ZY		 260 txq->bd = pci_alloc_consistent(dev,
261 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
262 &txq->q.dma_addr);
263
264 if (!txq->bd) {
265 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
266 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
267 goto error;
268 }
269 txq->q.id = id;
270
271 return 0;
272
273 error:
274 if (txq->txb) {
275 kfree(txq->txb);
276 txq->txb = NULL;
277 }
278
279 return -ENOMEM;
280}
281
8b6eaea8
BC		 282/**
283 * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
284 */
c79dd5b5 285int iwl4965_tx_queue_init(struct iwl_priv *priv,
bb8c093b 286 struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
b481de9c
ZY		 287{
288 struct pci_dev *dev = priv->pci_dev;
289 int len;
290 int rc = 0;
291
8b6eaea8
BC		 292 /*
293 * Alloc buffer array for commands (Tx or other types of commands).
294 * For the command queue (#4), allocate command space + one big
295 * command for scan, since scan command is very huge; the system will
296 * not have two scans at the same time, so only one is needed.
bb54244b 297 * For normal Tx queues (all other queues), no super-size command
8b6eaea8
BC		 298 * space is needed.
299 */
857485c0 300 len = sizeof(struct iwl_cmd) * slots_num;
b481de9c
ZY		 301 if (txq_id == IWL_CMD_QUEUE_NUM)
302 len += IWL_MAX_SCAN_SIZE;
303 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
304 if (!txq->cmd)
305 return -ENOMEM;
306
8b6eaea8 307 /* Alloc driver data array and TFD circular buffer */
bb8c093b 308 rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
b481de9c
ZY		 309 if (rc) {
310 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
311
312 return -ENOMEM;
313 }
314 txq->need_update = 0;
315
316 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
c54b679d 317 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
b481de9c 318 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
8b6eaea8
BC		 319
320 /* Initialize queue's high/low-water marks, and head/tail indexes */
bb8c093b 321 iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
b481de9c 322
8b6eaea8 323 /* Tell device where to find queue */
bb8c093b 324 iwl4965_hw_tx_queue_init(priv, txq);
b481de9c
ZY		 325
326 return 0;
327}
328
329/**
bb8c093b 330 * iwl4965_tx_queue_free - Deallocate DMA queue.
b481de9c
ZY		 331 * @txq: Transmit queue to deallocate.
332 *
333 * Empty queue by removing and destroying all BD's.
6440adb5
BC		 334 * Free all buffers.
335 * 0-fill, but do not free "txq" descriptor structure.
b481de9c 336 */
c79dd5b5 337void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
b481de9c 338{
bb8c093b 339 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 340 struct pci_dev *dev = priv->pci_dev;
341 int len;
342
343 if (q->n_bd == 0)
344 return;
345
346 /* first, empty all BD's */
fc4b6853 347 for (; q->write_ptr != q->read_ptr;
c54b679d 348 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
bb8c093b 349 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c 350
857485c0 351 len = sizeof(struct iwl_cmd) * q->n_window;
b481de9c
ZY		 352 if (q->id == IWL_CMD_QUEUE_NUM)
353 len += IWL_MAX_SCAN_SIZE;
354
6440adb5 355 /* De-alloc array of command/tx buffers */
b481de9c
ZY		 356 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
357
6440adb5 358 /* De-alloc circular buffer of TFDs */
b481de9c 359 if (txq->q.n_bd)
bb8c093b 360 pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
b481de9c
ZY		 361 txq->q.n_bd, txq->bd, txq->q.dma_addr);
362
6440adb5 363 /* De-alloc array of per-TFD driver data */
b481de9c
ZY		 364 if (txq->txb) {
365 kfree(txq->txb);
366 txq->txb = NULL;
367 }
368
6440adb5 369 /* 0-fill queue descriptor structure */
b481de9c
ZY		 370 memset(txq, 0, sizeof(*txq));
371}
372
bb8c093b 373const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
b481de9c
ZY		 374
375/*************** STATION TABLE MANAGEMENT ****
9fbab516 376 * mac80211 should be examined to determine if sta_info is duplicating
b481de9c
ZY		 377 * the functionality provided here
378 */
379
380/**************************************************************/
381
01ebd063 382#if 0 /* temporary disable till we add real remove station */
6440adb5
BC		 383/**
384 * iwl4965_remove_station - Remove driver's knowledge of station.
385 *
386 * NOTE: This does not remove station from device's station table.
387 */
c79dd5b5 388static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
b481de9c
ZY		 389{
390 int index = IWL_INVALID_STATION;
391 int i;
392 unsigned long flags;
393
394 spin_lock_irqsave(&priv->sta_lock, flags);
395
396 if (is_ap)
397 index = IWL_AP_ID;
398 else if (is_broadcast_ether_addr(addr))
399 index = priv->hw_setting.bcast_sta_id;
400 else
401 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
402 if (priv->stations[i].used &&
403 !compare_ether_addr(priv->stations[i].sta.sta.addr,
404 addr)) {
405 index = i;
406 break;
407 }
408
409 if (unlikely(index == IWL_INVALID_STATION))
410 goto out;
411
412 if (priv->stations[index].used) {
413 priv->stations[index].used = 0;
414 priv->num_stations--;
415 }
416
417 BUG_ON(priv->num_stations < 0);
418
419out:
420 spin_unlock_irqrestore(&priv->sta_lock, flags);
421 return 0;
422}
556f8db7 423#endif
b481de9c 424
6440adb5
BC		 425/**
426 * iwl4965_add_station_flags - Add station to tables in driver and device
427 */
c79dd5b5 428u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
67d62035 429 int is_ap, u8 flags, void *ht_data)
b481de9c
ZY		 430{
431 int i;
432 int index = IWL_INVALID_STATION;
bb8c093b 433 struct iwl4965_station_entry *station;
b481de9c 434 unsigned long flags_spin;
0795af57 435 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 436
437 spin_lock_irqsave(&priv->sta_lock, flags_spin);
438 if (is_ap)
439 index = IWL_AP_ID;
440 else if (is_broadcast_ether_addr(addr))
441 index = priv->hw_setting.bcast_sta_id;
442 else
443 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
444 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
445 addr)) {
446 index = i;
447 break;
448 }
449
450 if (!priv->stations[i].used &&
451 index == IWL_INVALID_STATION)
452 index = i;
453 }
454
455
9fbab516
BC		 456 /* These two conditions have the same outcome, but keep them separate
457 since they have different meanings */
b481de9c
ZY		 458 if (unlikely(index == IWL_INVALID_STATION)) {
459 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
460 return index;
461 }
462
463 if (priv->stations[index].used &&
464 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
465 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
466 return index;
467 }
468
469
0795af57 470 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
b481de9c
ZY		 471 station = &priv->stations[index];
472 station->used = 1;
473 priv->num_stations++;
474
6440adb5 475 /* Set up the REPLY_ADD_STA command to send to device */
bb8c093b 476 memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
b481de9c
ZY		 477 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
478 station->sta.mode = 0;
479 station->sta.sta.sta_id = index;
480 station->sta.station_flags = 0;
481
c8b0e6e1 482#ifdef CONFIG_IWL4965_HT
b481de9c
ZY		 483 /* BCAST station and IBSS stations do not work in HT mode */
484 if (index != priv->hw_setting.bcast_sta_id &&
485 priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
67d62035
RR		 486 iwl4965_set_ht_add_station(priv, index,
487 (struct ieee80211_ht_info *) ht_data);
c8b0e6e1 488#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 489
490 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
6440adb5
BC		 491
492 /* Add station to device's station table */
bb8c093b 493 iwl4965_send_add_station(priv, &station->sta, flags);
b481de9c
ZY		 494 return index;
495
496}
497
498/*************** DRIVER STATUS FUNCTIONS *****/
499
c79dd5b5 500static inline int iwl4965_is_ready(struct iwl_priv *priv)
b481de9c
ZY		 501{
502 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
503 * set but EXIT_PENDING is not */
504 return test_bit(STATUS_READY, &priv->status) &&
505 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
506 !test_bit(STATUS_EXIT_PENDING, &priv->status);
507}
508
c79dd5b5 509static inline int iwl4965_is_alive(struct iwl_priv *priv)
b481de9c
ZY		 510{
511 return test_bit(STATUS_ALIVE, &priv->status);
512}
513
c79dd5b5 514static inline int iwl4965_is_init(struct iwl_priv *priv)
b481de9c
ZY		 515{
516 return test_bit(STATUS_INIT, &priv->status);
517}
518
c79dd5b5 519static inline int iwl4965_is_rfkill(struct iwl_priv *priv)
b481de9c
ZY		 520{
521 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
522 test_bit(STATUS_RF_KILL_SW, &priv->status);
523}
524
c79dd5b5 525static inline int iwl4965_is_ready_rf(struct iwl_priv *priv)
b481de9c
ZY		 526{
527
bb8c093b 528 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 529 return 0;
530
bb8c093b 531 return iwl4965_is_ready(priv);
b481de9c
ZY		 532}
533
534/*************** HOST COMMAND QUEUE FUNCTIONS *****/
535
b481de9c 536/**
bb8c093b 537 * iwl4965_enqueue_hcmd - enqueue a uCode command
b481de9c
ZY		 538 * @priv: device private data point
539 * @cmd: a point to the ucode command structure
540 *
541 * The function returns < 0 values to indicate the operation is
542 * failed. On success, it turns the index (> 0) of command in the
543 * command queue.
544 */
857485c0 545int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
b481de9c 546{
bb8c093b
CH		 547 struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
548 struct iwl4965_queue *q = &txq->q;
549 struct iwl4965_tfd_frame *tfd;
b481de9c 550 u32 *control_flags;
857485c0 551 struct iwl_cmd *out_cmd;
b481de9c
ZY		 552 u32 idx;
553 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
554 dma_addr_t phys_addr;
555 int ret;
556 unsigned long flags;
557
558 /* If any of the command structures end up being larger than
559 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
560 * we will need to increase the size of the TFD entries */
561 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
562 !(cmd->meta.flags & CMD_SIZE_HUGE));
563
c342a1b9
GG		 564 if (iwl4965_is_rfkill(priv)) {
565 IWL_DEBUG_INFO("Not sending command - RF KILL");
566 return -EIO;
567 }
568
bb8c093b 569 if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
b481de9c
ZY		 570 IWL_ERROR("No space for Tx\n");
571 return -ENOSPC;
572 }
573
574 spin_lock_irqsave(&priv->hcmd_lock, flags);
575
fc4b6853 576 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 577 memset(tfd, 0, sizeof(*tfd));
578
579 control_flags = (u32 *) tfd;
580
fc4b6853 581 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
b481de9c
ZY		 582 out_cmd = &txq->cmd[idx];
583
584 out_cmd->hdr.cmd = cmd->id;
585 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
586 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
587
588 /* At this point, the out_cmd now has all of the incoming cmd
589 * information */
590
591 out_cmd->hdr.flags = 0;
592 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
fc4b6853 593 INDEX_TO_SEQ(q->write_ptr));
b481de9c
ZY		 594 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
595 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
596
597 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
857485c0 598 offsetof(struct iwl_cmd, hdr);
bb8c093b 599 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
b481de9c
ZY		 600
601 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
602 "%d bytes at %d[%d]:%d\n",
603 get_cmd_string(out_cmd->hdr.cmd),
604 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
fc4b6853 605 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
b481de9c
ZY		 606
607 txq->need_update = 1;
6440adb5
BC		 608
609 /* Set up entry in queue's byte count circular buffer */
b481de9c 610 ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
6440adb5
BC		 611
612 /* Increment and update queue's write index */
c54b679d 613 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 614 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 615
616 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
617 return ret ? ret : idx;
618}
619
deb09c43
EG		 620static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
621{
622 struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
623
624 if (hw_decrypt)
625 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
626 else
627 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
628
629}
630
c79dd5b5 631int iwl4965_send_statistics_request(struct iwl_priv *priv)
b481de9c 632{
857485c0
TW		 633 u32 flags = 0;
634 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
635 sizeof(flags), &flags);
b481de9c
ZY		 636}
637
638/**
bb8c093b 639 * iwl4965_rxon_add_station - add station into station table.
b481de9c
ZY		 640 *
641 * there is only one AP station with id= IWL_AP_ID
9fbab516
BC		 642 * NOTE: mutex must be held before calling this fnction
643 */
c79dd5b5 644static int iwl4965_rxon_add_station(struct iwl_priv *priv,
b481de9c
ZY		 645 const u8 *addr, int is_ap)
646{
556f8db7 647 u8 sta_id;
b481de9c 648
6440adb5 649 /* Add station to device's station table */
67d62035
RR		 650#ifdef CONFIG_IWL4965_HT
651 struct ieee80211_conf *conf = &priv->hw->conf;
652 struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
653
654 if ((is_ap) &&
655 (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
656 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
657 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
658 0, cur_ht_config);
659 else
660#endif /* CONFIG_IWL4965_HT */
661 sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
662 0, NULL);
6440adb5
BC		 663
664 /* Set up default rate scaling table in device's station table */
b481de9c
ZY		 665 iwl4965_add_station(priv, addr, is_ap);
666
556f8db7 667 return sta_id;
b481de9c
ZY		 668}
669
b481de9c 670/**
bb8c093b 671 * iwl4965_check_rxon_cmd - validate RXON structure is valid
b481de9c
ZY		 672 *
673 * NOTE: This is really only useful during development and can eventually
674 * be #ifdef'd out once the driver is stable and folks aren't actively
675 * making changes
676 */
bb8c093b 677static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c
ZY		 678{
679 int error = 0;
680 int counter = 1;
681
682 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
683 error |= le32_to_cpu(rxon->flags &
684 (RXON_FLG_TGJ_NARROW_BAND_MSK |
685 RXON_FLG_RADAR_DETECT_MSK));
686 if (error)
687 IWL_WARNING("check 24G fields %d | %d\n",
688 counter++, error);
689 } else {
690 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
691 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
692 if (error)
693 IWL_WARNING("check 52 fields %d | %d\n",
694 counter++, error);
695 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
696 if (error)
697 IWL_WARNING("check 52 CCK %d | %d\n",
698 counter++, error);
699 }
700 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
701 if (error)
702 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
703
704 /* make sure basic rates 6Mbps and 1Mbps are supported */
705 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
706 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
707 if (error)
708 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
709
710 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
711 if (error)
712 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
713
714 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
715 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
716 if (error)
717 IWL_WARNING("check CCK and short slot %d | %d\n",
718 counter++, error);
719
720 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
721 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
722 if (error)
723 IWL_WARNING("check CCK & auto detect %d | %d\n",
724 counter++, error);
725
726 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
727 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
728 if (error)
729 IWL_WARNING("check TGG and auto detect %d | %d\n",
730 counter++, error);
731
732 if (error)
733 IWL_WARNING("Tuning to channel %d\n",
734 le16_to_cpu(rxon->channel));
735
736 if (error) {
bb8c093b 737 IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
b481de9c
ZY		 738 return -1;
739 }
740 return 0;
741}
742
743/**
9fbab516 744 * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
01ebd063 745 * @priv: staging_rxon is compared to active_rxon
b481de9c 746 *
9fbab516
BC		 747 * If the RXON structure is changing enough to require a new tune,
748 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
749 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
b481de9c 750 */
c79dd5b5 751static int iwl4965_full_rxon_required(struct iwl_priv *priv)
b481de9c
ZY		 752{
753
754 /* These items are only settable from the full RXON command */
755 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
756 compare_ether_addr(priv->staging_rxon.bssid_addr,
757 priv->active_rxon.bssid_addr) ||
758 compare_ether_addr(priv->staging_rxon.node_addr,
759 priv->active_rxon.node_addr) ||
760 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
761 priv->active_rxon.wlap_bssid_addr) ||
762 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
763 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
764 (priv->staging_rxon.air_propagation !=
765 priv->active_rxon.air_propagation) ||
766 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
767 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
768 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
769 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
770 (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
771 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
772 return 1;
773
774 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
775 * be updated with the RXON_ASSOC command -- however only some
776 * flag transitions are allowed using RXON_ASSOC */
777
778 /* Check if we are not switching bands */
779 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
780 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
781 return 1;
782
783 /* Check if we are switching association toggle */
784 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
785 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
786 return 1;
787
788 return 0;
789}
790
c79dd5b5 791static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
b481de9c
ZY		 792{
793 int rc = 0;
bb8c093b
CH		 794 struct iwl4965_rx_packet *res = NULL;
795 struct iwl4965_rxon_assoc_cmd rxon_assoc;
857485c0 796 struct iwl_host_cmd cmd = {
b481de9c
ZY		 797 .id = REPLY_RXON_ASSOC,
798 .len = sizeof(rxon_assoc),
799 .meta.flags = CMD_WANT_SKB,
800 .data = &rxon_assoc,
801 };
bb8c093b
CH		 802 const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
803 const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
b481de9c
ZY		 804
805 if ((rxon1->flags == rxon2->flags) &&
806 (rxon1->filter_flags == rxon2->filter_flags) &&
807 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
808 (rxon1->ofdm_ht_single_stream_basic_rates ==
809 rxon2->ofdm_ht_single_stream_basic_rates) &&
810 (rxon1->ofdm_ht_dual_stream_basic_rates ==
811 rxon2->ofdm_ht_dual_stream_basic_rates) &&
812 (rxon1->rx_chain == rxon2->rx_chain) &&
813 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
814 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
815 return 0;
816 }
817
818 rxon_assoc.flags = priv->staging_rxon.flags;
819 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
820 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
821 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
822 rxon_assoc.reserved = 0;
823 rxon_assoc.ofdm_ht_single_stream_basic_rates =
824 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
825 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
826 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
827 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
828
857485c0 829 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 830 if (rc)
831 return rc;
832
bb8c093b 833 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 834 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
835 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
836 rc = -EIO;
837 }
838
839 priv->alloc_rxb_skb--;
840 dev_kfree_skb_any(cmd.meta.u.skb);
841
842 return rc;
843}
844
845/**
bb8c093b 846 * iwl4965_commit_rxon - commit staging_rxon to hardware
b481de9c 847 *
01ebd063 848 * The RXON command in staging_rxon is committed to the hardware and
b481de9c
ZY		 849 * the active_rxon structure is updated with the new data. This
850 * function correctly transitions out of the RXON_ASSOC_MSK state if
851 * a HW tune is required based on the RXON structure changes.
852 */
c79dd5b5 853static int iwl4965_commit_rxon(struct iwl_priv *priv)
b481de9c
ZY		 854{
855 /* cast away the const for active_rxon in this function */
bb8c093b 856 struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
0795af57 857 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 858 int rc = 0;
859
bb8c093b 860 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 861 return -1;
862
863 /* always get timestamp with Rx frame */
864 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
865
bb8c093b 866 rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
b481de9c
ZY		 867 if (rc) {
868 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
869 return -EINVAL;
870 }
871
872 /* If we don't need to send a full RXON, we can use
bb8c093b 873 * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
b481de9c 874 * and other flags for the current radio configuration. */
bb8c093b
CH		 875 if (!iwl4965_full_rxon_required(priv)) {
876 rc = iwl4965_send_rxon_assoc(priv);
b481de9c
ZY		 877 if (rc) {
878 IWL_ERROR("Error setting RXON_ASSOC "
879 "configuration (%d).\n", rc);
880 return rc;
881 }
882
883 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
884
885 return 0;
886 }
887
888 /* station table will be cleared */
889 priv->assoc_station_added = 0;
890
c8b0e6e1 891#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 892 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
893 if (!priv->error_recovering)
894 priv->start_calib = 0;
895
896 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 897#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 898
899 /* If we are currently associated and the new config requires
900 * an RXON_ASSOC and the new config wants the associated mask enabled,
901 * we must clear the associated from the active configuration
902 * before we apply the new config */
bb8c093b 903 if (iwl4965_is_associated(priv) &&
b481de9c
ZY		 904 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
905 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
906 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
907
857485c0 908 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 909 sizeof(struct iwl4965_rxon_cmd),
b481de9c
ZY		 910 &priv->active_rxon);
911
912 /* If the mask clearing failed then we set
913 * active_rxon back to what it was previously */
914 if (rc) {
915 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
916 IWL_ERROR("Error clearing ASSOC_MSK on current "
917 "configuration (%d).\n", rc);
918 return rc;
919 }
b481de9c
ZY		 920 }
921
922 IWL_DEBUG_INFO("Sending RXON\n"
923 "* with%s RXON_FILTER_ASSOC_MSK\n"
924 "* channel = %d\n"
0795af57 925 "* bssid = %s\n",
b481de9c
ZY		 926 ((priv->staging_rxon.filter_flags &
927 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
928 le16_to_cpu(priv->staging_rxon.channel),
0795af57 929 print_mac(mac, priv->staging_rxon.bssid_addr));
b481de9c 930
deb09c43 931 iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
b481de9c 932 /* Apply the new configuration */
857485c0 933 rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
bb8c093b 934 sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
b481de9c
ZY		 935 if (rc) {
936 IWL_ERROR("Error setting new configuration (%d).\n", rc);
937 return rc;
938 }
939
bf85ea4f 940 iwlcore_clear_stations_table(priv);
556f8db7 941
c8b0e6e1 942#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 943 if (!priv->error_recovering)
944 priv->start_calib = 0;
945
946 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
947 iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
c8b0e6e1 948#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 949
950 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
951
952 /* If we issue a new RXON command which required a tune then we must
953 * send a new TXPOWER command or we won't be able to Tx any frames */
bb8c093b 954 rc = iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 955 if (rc) {
956 IWL_ERROR("Error setting Tx power (%d).\n", rc);
957 return rc;
958 }
959
960 /* Add the broadcast address so we can send broadcast frames */
bb8c093b 961 if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
b481de9c
ZY		 962 IWL_INVALID_STATION) {
963 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
964 return -EIO;
965 }
966
967 /* If we have set the ASSOC_MSK and we are in BSS mode then
968 * add the IWL_AP_ID to the station rate table */
bb8c093b 969 if (iwl4965_is_associated(priv) &&
b481de9c 970 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
bb8c093b 971 if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
b481de9c
ZY		 972 == IWL_INVALID_STATION) {
973 IWL_ERROR("Error adding AP address for transmit.\n");
974 return -EIO;
975 }
976 priv->assoc_station_added = 1;
977 }
978
979 return 0;
980}
981
c79dd5b5 982static int iwl4965_send_bt_config(struct iwl_priv *priv)
b481de9c 983{
bb8c093b 984 struct iwl4965_bt_cmd bt_cmd = {
b481de9c
ZY		 985 .flags = 3,
986 .lead_time = 0xAA,
987 .max_kill = 1,
988 .kill_ack_mask = 0,
989 .kill_cts_mask = 0,
990 };
991
857485c0 992 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
bb8c093b 993 sizeof(struct iwl4965_bt_cmd), &bt_cmd);
b481de9c
ZY		 994}
995
c79dd5b5 996static int iwl4965_send_scan_abort(struct iwl_priv *priv)
b481de9c
ZY		 997{
998 int rc = 0;
bb8c093b 999 struct iwl4965_rx_packet *res;
857485c0 1000 struct iwl_host_cmd cmd = {
b481de9c
ZY		 1001 .id = REPLY_SCAN_ABORT_CMD,
1002 .meta.flags = CMD_WANT_SKB,
1003 };
1004
1005 /* If there isn't a scan actively going on in the hardware
1006 * then we are in between scan bands and not actually
1007 * actively scanning, so don't send the abort command */
1008 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1009 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1010 return 0;
1011 }
1012
857485c0 1013 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 1014 if (rc) {
1015 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1016 return rc;
1017 }
1018
bb8c093b 1019 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1020 if (res->u.status != CAN_ABORT_STATUS) {
1021 /* The scan abort will return 1 for success or
1022 * 2 for "failure". A failure condition can be
1023 * due to simply not being in an active scan which
1024 * can occur if we send the scan abort before we
1025 * the microcode has notified us that a scan is
1026 * completed. */
1027 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1028 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1029 clear_bit(STATUS_SCAN_HW, &priv->status);
1030 }
1031
1032 dev_kfree_skb_any(cmd.meta.u.skb);
1033
1034 return rc;
1035}
1036
c79dd5b5 1037static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
857485c0 1038 struct iwl_cmd *cmd,
b481de9c
ZY		 1039 struct sk_buff *skb)
1040{
1041 return 1;
1042}
1043
1044/*
1045 * CARD_STATE_CMD
1046 *
9fbab516 1047 * Use: Sets the device's internal card state to enable, disable, or halt
b481de9c
ZY		 1048 *
1049 * When in the 'enable' state the card operates as normal.
1050 * When in the 'disable' state, the card enters into a low power mode.
1051 * When in the 'halt' state, the card is shut down and must be fully
1052 * restarted to come back on.
1053 */
c79dd5b5 1054static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
b481de9c 1055{
857485c0 1056 struct iwl_host_cmd cmd = {
b481de9c
ZY		 1057 .id = REPLY_CARD_STATE_CMD,
1058 .len = sizeof(u32),
1059 .data = &flags,
1060 .meta.flags = meta_flag,
1061 };
1062
1063 if (meta_flag & CMD_ASYNC)
bb8c093b 1064 cmd.meta.u.callback = iwl4965_card_state_sync_callback;
b481de9c 1065
857485c0 1066 return iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 1067}
1068
c79dd5b5 1069static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
857485c0 1070 struct iwl_cmd *cmd, struct sk_buff *skb)
b481de9c 1071{
bb8c093b 1072 struct iwl4965_rx_packet *res = NULL;
b481de9c
ZY		 1073
1074 if (!skb) {
1075 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1076 return 1;
1077 }
1078
bb8c093b 1079 res = (struct iwl4965_rx_packet *)skb->data;
b481de9c
ZY		 1080 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1081 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1082 res->hdr.flags);
1083 return 1;
1084 }
1085
1086 switch (res->u.add_sta.status) {
1087 case ADD_STA_SUCCESS_MSK:
1088 break;
1089 default:
1090 break;
1091 }
1092
1093 /* We didn't cache the SKB; let the caller free it */
1094 return 1;
1095}
1096
c79dd5b5 1097int iwl4965_send_add_station(struct iwl_priv *priv,
bb8c093b 1098 struct iwl4965_addsta_cmd *sta, u8 flags)
b481de9c 1099{
bb8c093b 1100 struct iwl4965_rx_packet *res = NULL;
b481de9c 1101 int rc = 0;
857485c0 1102 struct iwl_host_cmd cmd = {
b481de9c 1103 .id = REPLY_ADD_STA,
bb8c093b 1104 .len = sizeof(struct iwl4965_addsta_cmd),
b481de9c
ZY		 1105 .meta.flags = flags,
1106 .data = sta,
1107 };
1108
1109 if (flags & CMD_ASYNC)
bb8c093b 1110 cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
b481de9c
ZY		 1111 else
1112 cmd.meta.flags |= CMD_WANT_SKB;
1113
857485c0 1114 rc = iwl_send_cmd(priv, &cmd);
b481de9c
ZY		 1115
1116 if (rc || (flags & CMD_ASYNC))
1117 return rc;
1118
bb8c093b 1119 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 1120 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1121 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1122 res->hdr.flags);
1123 rc = -EIO;
1124 }
1125
1126 if (rc == 0) {
1127 switch (res->u.add_sta.status) {
1128 case ADD_STA_SUCCESS_MSK:
1129 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1130 break;
1131 default:
1132 rc = -EIO;
1133 IWL_WARNING("REPLY_ADD_STA failed\n");
1134 break;
1135 }
1136 }
1137
1138 priv->alloc_rxb_skb--;
1139 dev_kfree_skb_any(cmd.meta.u.skb);
1140
1141 return rc;
1142}
1143
deb09c43 1144static int iwl4965_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
b481de9c
ZY		 1145 struct ieee80211_key_conf *keyconf,
1146 u8 sta_id)
1147{
1148 unsigned long flags;
1149 __le16 key_flags = 0;
1150
deb09c43
EG		 1151 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
1152 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1153
1154 if (sta_id == priv->hw_setting.bcast_sta_id)
1155 key_flags |= STA_KEY_MULTICAST_MSK;
1156
1157 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1158 keyconf->hw_key_idx = keyconf->keyidx;
1159
1160 key_flags &= ~STA_KEY_FLG_INVALID;
1161
b481de9c
ZY		 1162 spin_lock_irqsave(&priv->sta_lock, flags);
1163 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1164 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
deb09c43 1165
b481de9c
ZY		 1166 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1167 keyconf->keylen);
1168
1169 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1170 keyconf->keylen);
deb09c43
EG		 1171
1172 priv->stations[sta_id].sta.key.key_offset
1173 = (sta_id % STA_KEY_MAX_NUM);/*FIXME*/
b481de9c
ZY		 1174 priv->stations[sta_id].sta.key.key_flags = key_flags;
1175 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1176 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1177
1178 spin_unlock_irqrestore(&priv->sta_lock, flags);
1179
1180 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
deb09c43
EG		 1181 return iwl4965_send_add_station(priv,
1182 &priv->stations[sta_id].sta, CMD_ASYNC);
1183}
1184
1185static int iwl4965_set_tkip_dynamic_key_info(struct iwl_priv *priv,
1186 struct ieee80211_key_conf *keyconf,
1187 u8 sta_id)
1188{
2bc75089
EG		 1189 unsigned long flags;
1190 int ret = 0;
1191
1192 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1193 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1194 keyconf->hw_key_idx = keyconf->keyidx;
1195
1196 spin_lock_irqsave(&priv->sta_lock, flags);
1197
1198 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1199 priv->stations[sta_id].keyinfo.conf = keyconf;
1200 priv->stations[sta_id].keyinfo.keylen = 16;
1201
1202 /* This copy is acutally not needed: we get the key with each TX */
1203 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, 16);
1204
1205 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, 16);
1206
1207 spin_unlock_irqrestore(&priv->sta_lock, flags);
1208
1209 return ret;
b481de9c
ZY		 1210}
1211
c79dd5b5 1212static int iwl4965_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
b481de9c
ZY		 1213{
1214 unsigned long flags;
1215
1216 spin_lock_irqsave(&priv->sta_lock, flags);
bb8c093b
CH		 1217 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
1218 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
b481de9c
ZY		 1219 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1220 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1221 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1222 spin_unlock_irqrestore(&priv->sta_lock, flags);
1223
1224 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
bb8c093b 1225 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
b481de9c
ZY		 1226 return 0;
1227}
1228
deb09c43
EG		 1229static int iwl4965_set_dynamic_key(struct iwl_priv *priv,
1230 struct ieee80211_key_conf *key, u8 sta_id)
1231{
1232 int ret;
1233
1234 switch (key->alg) {
1235 case ALG_CCMP:
1236 ret = iwl4965_set_ccmp_dynamic_key_info(priv, key, sta_id);
1237 break;
1238 case ALG_TKIP:
1239 ret = iwl4965_set_tkip_dynamic_key_info(priv, key, sta_id);
1240 break;
1241 case ALG_WEP:
1242 ret = -EOPNOTSUPP;
1243 break;
1244 default:
1245 IWL_ERROR("Unknown alg: %s alg = %d\n", __func__, key->alg);
1246 ret = -EINVAL;
1247 }
1248
1249 return ret;
1250}
1251
1252static int iwl4965_remove_static_key(struct iwl_priv *priv)
1253{
1254 int ret = -EOPNOTSUPP;
1255
1256 return ret;
1257}
1258
1259static int iwl4965_set_static_key(struct iwl_priv *priv,
1260 struct ieee80211_key_conf *key)
1261{
1262 if (key->alg == ALG_WEP)
1263 return -EOPNOTSUPP;
1264
1265 IWL_ERROR("Static key invalid: alg %d\n", key->alg);
1266 return -EINVAL;
1267}
1268
c79dd5b5 1269static void iwl4965_clear_free_frames(struct iwl_priv *priv)
b481de9c
ZY		 1270{
1271 struct list_head *element;
1272
1273 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1274 priv->frames_count);
1275
1276 while (!list_empty(&priv->free_frames)) {
1277 element = priv->free_frames.next;
1278 list_del(element);
bb8c093b 1279 kfree(list_entry(element, struct iwl4965_frame, list));
b481de9c
ZY		 1280 priv->frames_count--;
1281 }
1282
1283 if (priv->frames_count) {
1284 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1285 priv->frames_count);
1286 priv->frames_count = 0;
1287 }
1288}
1289
c79dd5b5 1290static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
b481de9c 1291{
bb8c093b 1292 struct iwl4965_frame *frame;
b481de9c
ZY		 1293 struct list_head *element;
1294 if (list_empty(&priv->free_frames)) {
1295 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1296 if (!frame) {
1297 IWL_ERROR("Could not allocate frame!\n");
1298 return NULL;
1299 }
1300
1301 priv->frames_count++;
1302 return frame;
1303 }
1304
1305 element = priv->free_frames.next;
1306 list_del(element);
bb8c093b 1307 return list_entry(element, struct iwl4965_frame, list);
b481de9c
ZY		 1308}
1309
c79dd5b5 1310static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
b481de9c
ZY		 1311{
1312 memset(frame, 0, sizeof(*frame));
1313 list_add(&frame->list, &priv->free_frames);
1314}
1315
c79dd5b5 1316unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
b481de9c
ZY		 1317 struct ieee80211_hdr *hdr,
1318 const u8 *dest, int left)
1319{
1320
bb8c093b 1321 if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
b481de9c
ZY		 1322 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1323 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1324 return 0;
1325
1326 if (priv->ibss_beacon->len > left)
1327 return 0;
1328
1329 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1330
1331 return priv->ibss_beacon->len;
1332}
1333
bb8c093b 1334static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
b481de9c
ZY		 1335{
1336 u8 i;
1337
1338 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
bb8c093b 1339 i = iwl4965_rates[i].next_ieee) {
b481de9c 1340 if (rate_mask & (1 << i))
bb8c093b 1341 return iwl4965_rates[i].plcp;
b481de9c
ZY		 1342 }
1343
1344 return IWL_RATE_INVALID;
1345}
1346
c79dd5b5 1347static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
b481de9c 1348{
bb8c093b 1349 struct iwl4965_frame *frame;
b481de9c
ZY		 1350 unsigned int frame_size;
1351 int rc;
1352 u8 rate;
1353
bb8c093b 1354 frame = iwl4965_get_free_frame(priv);
b481de9c
ZY		 1355
1356 if (!frame) {
1357 IWL_ERROR("Could not obtain free frame buffer for beacon "
1358 "command.\n");
1359 return -ENOMEM;
1360 }
1361
1362 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
bb8c093b 1363 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
b481de9c
ZY		 1364 0xFF0);
1365 if (rate == IWL_INVALID_RATE)
1366 rate = IWL_RATE_6M_PLCP;
1367 } else {
bb8c093b 1368 rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
b481de9c
ZY		 1369 if (rate == IWL_INVALID_RATE)
1370 rate = IWL_RATE_1M_PLCP;
1371 }
1372
bb8c093b 1373 frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
b481de9c 1374
857485c0 1375 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
b481de9c
ZY		 1376 &frame->u.cmd[0]);
1377
bb8c093b 1378 iwl4965_free_frame(priv, frame);
b481de9c
ZY		 1379
1380 return rc;
1381}
1382
b481de9c
ZY		 1383/******************************************************************************
1384 *
1385 * Misc. internal state and helper functions
1386 *
1387 ******************************************************************************/
b481de9c 1388
c79dd5b5 1389static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
b481de9c
ZY		 1390{
1391 if (priv->hw_setting.shared_virt)
1392 pci_free_consistent(priv->pci_dev,
bb8c093b 1393 sizeof(struct iwl4965_shared),
b481de9c
ZY		 1394 priv->hw_setting.shared_virt,
1395 priv->hw_setting.shared_phys);
1396}
1397
1398/**
bb8c093b 1399 * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
b481de9c
ZY		 1400 *
1401 * return : set the bit for each supported rate insert in ie
1402 */
bb8c093b 1403static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
c7c46676 1404 u16 basic_rate, int *left)
b481de9c
ZY		 1405{
1406 u16 ret_rates = 0, bit;
1407 int i;
c7c46676
TW		 1408 u8 *cnt = ie;
1409 u8 *rates = ie + 1;
b481de9c
ZY		 1410
1411 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1412 if (bit & supported_rate) {
1413 ret_rates |= bit;
bb8c093b 1414 rates[*cnt] = iwl4965_rates[i].ieee |
c7c46676
TW		 1415 ((bit & basic_rate) ? 0x80 : 0x00);
1416 (*cnt)++;
1417 (*left)--;
1418 if ((*left <= 0) ||
1419 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
b481de9c
ZY		 1420 break;
1421 }
1422 }
1423
1424 return ret_rates;
1425}
1426
b481de9c 1427/**
bb8c093b 1428 * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
b481de9c 1429 */
c79dd5b5 1430static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
78330fdd
TW		 1431 enum ieee80211_band band,
1432 struct ieee80211_mgmt *frame,
1433 int left, int is_direct)
b481de9c
ZY		 1434{
1435 int len = 0;
1436 u8 *pos = NULL;
bee488db 1437 u16 active_rates, ret_rates, cck_rates, active_rate_basic;
8fb88032 1438#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1439 const struct ieee80211_supported_band *sband =
1440 iwl4965_get_hw_mode(priv, band);
8fb88032 1441#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 1442
1443 /* Make sure there is enough space for the probe request,
1444 * two mandatory IEs and the data */
1445 left -= 24;
1446 if (left < 0)
1447 return 0;
1448 len += 24;
1449
1450 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
bb8c093b 1451 memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c 1452 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
bb8c093b 1453 memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
b481de9c
ZY		 1454 frame->seq_ctrl = 0;
1455
1456 /* fill in our indirect SSID IE */
1457 /* ...next IE... */
1458
1459 left -= 2;
1460 if (left < 0)
1461 return 0;
1462 len += 2;
1463 pos = &(frame->u.probe_req.variable[0]);
1464 *pos++ = WLAN_EID_SSID;
1465 *pos++ = 0;
1466
1467 /* fill in our direct SSID IE... */
1468 if (is_direct) {
1469 /* ...next IE... */
1470 left -= 2 + priv->essid_len;
1471 if (left < 0)
1472 return 0;
1473 /* ... fill it in... */
1474 *pos++ = WLAN_EID_SSID;
1475 *pos++ = priv->essid_len;
1476 memcpy(pos, priv->essid, priv->essid_len);
1477 pos += priv->essid_len;
1478 len += 2 + priv->essid_len;
1479 }
1480
1481 /* fill in supported rate */
1482 /* ...next IE... */
1483 left -= 2;
1484 if (left < 0)
1485 return 0;
c7c46676 1486
b481de9c
ZY		 1487 /* ... fill it in... */
1488 *pos++ = WLAN_EID_SUPP_RATES;
1489 *pos = 0;
c7c46676 1490
bee488db 1491 /* exclude 60M rate */
1492 active_rates = priv->rates_mask;
1493 active_rates &= ~IWL_RATE_60M_MASK;
1494
1495 active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
b481de9c 1496
c7c46676 1497 cck_rates = IWL_CCK_RATES_MASK & active_rates;
bb8c093b 1498 ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
bee488db 1499 active_rate_basic, &left);
c7c46676
TW		 1500 active_rates &= ~ret_rates;
1501
bb8c093b 1502 ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1503 active_rate_basic, &left);
c7c46676
TW		 1504 active_rates &= ~ret_rates;
1505
b481de9c
ZY		 1506 len += 2 + *pos;
1507 pos += (*pos) + 1;
c7c46676 1508 if (active_rates == 0)
b481de9c
ZY		 1509 goto fill_end;
1510
1511 /* fill in supported extended rate */
1512 /* ...next IE... */
1513 left -= 2;
1514 if (left < 0)
1515 return 0;
1516 /* ... fill it in... */
1517 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1518 *pos = 0;
bb8c093b 1519 iwl4965_supported_rate_to_ie(pos, active_rates,
bee488db 1520 active_rate_basic, &left);
b481de9c
ZY		 1521 if (*pos > 0)
1522 len += 2 + *pos;
1523
c8b0e6e1 1524#ifdef CONFIG_IWL4965_HT
78330fdd
TW		 1525 if (sband && sband->ht_info.ht_supported) {
1526 struct ieee80211_ht_cap *ht_cap;
b481de9c
ZY		 1527 pos += (*pos) + 1;
1528 *pos++ = WLAN_EID_HT_CAPABILITY;
8fb88032 1529 *pos++ = sizeof(struct ieee80211_ht_cap);
78330fdd
TW		 1530 ht_cap = (struct ieee80211_ht_cap *)pos;
1531 ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
1532 memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
1533 ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
1534 IEEE80211_HT_CAP_AMPDU_FACTOR) |
1535 ((sband->ht_info.ampdu_density << 2) &
1536 IEEE80211_HT_CAP_AMPDU_DENSITY);
8fb88032 1537 len += 2 + sizeof(struct ieee80211_ht_cap);
b481de9c 1538 }
c8b0e6e1 1539#endif /*CONFIG_IWL4965_HT */
b481de9c
ZY		 1540
1541 fill_end:
1542 return (u16)len;
1543}
1544
1545/*
1546 * QoS support
1547*/
c79dd5b5 1548static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
bb8c093b 1549 struct iwl4965_qosparam_cmd *qos)
b481de9c
ZY		 1550{
1551
857485c0 1552 return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
bb8c093b 1553 sizeof(struct iwl4965_qosparam_cmd), qos);
b481de9c
ZY		 1554}
1555
c79dd5b5 1556static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
b481de9c
ZY		 1557{
1558 unsigned long flags;
1559
b481de9c
ZY		 1560 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1561 return;
1562
1563 if (!priv->qos_data.qos_enable)
1564 return;
1565
1566 spin_lock_irqsave(&priv->lock, flags);
1567 priv->qos_data.def_qos_parm.qos_flags = 0;
1568
1569 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1570 !priv->qos_data.qos_cap.q_AP.txop_request)
1571 priv->qos_data.def_qos_parm.qos_flags |=
1572 QOS_PARAM_FLG_TXOP_TYPE_MSK;
b481de9c
ZY		 1573 if (priv->qos_data.qos_active)
1574 priv->qos_data.def_qos_parm.qos_flags |=
1575 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1576
c8b0e6e1 1577#ifdef CONFIG_IWL4965_HT
fd105e79 1578 if (priv->current_ht_config.is_ht)
f1f1f5c7 1579 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
c8b0e6e1 1580#endif /* CONFIG_IWL4965_HT */
f1f1f5c7 1581
b481de9c
ZY		 1582 spin_unlock_irqrestore(&priv->lock, flags);
1583
bb8c093b 1584 if (force || iwl4965_is_associated(priv)) {
f1f1f5c7
TW		 1585 IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
1586 priv->qos_data.qos_active,
1587 priv->qos_data.def_qos_parm.qos_flags);
b481de9c 1588
bb8c093b 1589 iwl4965_send_qos_params_command(priv,
b481de9c
ZY		 1590 &(priv->qos_data.def_qos_parm));
1591 }
1592}
1593
b481de9c
ZY		 1594/*
1595 * Power management (not Tx power!) functions
1596 */
1597#define MSEC_TO_USEC 1024
1598
1599#define NOSLP __constant_cpu_to_le16(0), 0, 0
1600#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
1601#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1602#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1603 __constant_cpu_to_le32(X1), \
1604 __constant_cpu_to_le32(X2), \
1605 __constant_cpu_to_le32(X3), \
1606 __constant_cpu_to_le32(X4)}
1607
1608
1609/* default power management (not Tx power) table values */
1610/* for tim 0-10 */
bb8c093b 1611static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
b481de9c
ZY		 1612 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1613 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1614 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1615 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1616 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1617 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1618};
1619
1620/* for tim > 10 */
bb8c093b 1621static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
b481de9c
ZY		 1622 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1623 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1624 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1625 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1626 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1627 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1628 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1629 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1630 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1631 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1632};
1633
c79dd5b5 1634int iwl4965_power_init_handle(struct iwl_priv *priv)
b481de9c
ZY		 1635{
1636 int rc = 0, i;
bb8c093b
CH		 1637 struct iwl4965_power_mgr *pow_data;
1638 int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
b481de9c
ZY		 1639 u16 pci_pm;
1640
1641 IWL_DEBUG_POWER("Initialize power \n");
1642
1643 pow_data = &(priv->power_data);
1644
1645 memset(pow_data, 0, sizeof(*pow_data));
1646
1647 pow_data->active_index = IWL_POWER_RANGE_0;
1648 pow_data->dtim_val = 0xffff;
1649
1650 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1651 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1652
1653 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1654 if (rc != 0)
1655 return 0;
1656 else {
bb8c093b 1657 struct iwl4965_powertable_cmd *cmd;
b481de9c
ZY		 1658
1659 IWL_DEBUG_POWER("adjust power command flags\n");
1660
1661 for (i = 0; i < IWL_POWER_AC; i++) {
1662 cmd = &pow_data->pwr_range_0[i].cmd;
1663
1664 if (pci_pm & 0x1)
1665 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1666 else
1667 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1668 }
1669 }
1670 return rc;
1671}
1672
c79dd5b5 1673static int iwl4965_update_power_cmd(struct iwl_priv *priv,
bb8c093b 1674 struct iwl4965_powertable_cmd *cmd, u32 mode)
b481de9c
ZY		 1675{
1676 int rc = 0, i;
1677 u8 skip;
1678 u32 max_sleep = 0;
bb8c093b 1679 struct iwl4965_power_vec_entry *range;
b481de9c 1680 u8 period = 0;
bb8c093b 1681 struct iwl4965_power_mgr *pow_data;
b481de9c
ZY		 1682
1683 if (mode > IWL_POWER_INDEX_5) {
1684 IWL_DEBUG_POWER("Error invalid power mode \n");
1685 return -1;
1686 }
1687 pow_data = &(priv->power_data);
1688
1689 if (pow_data->active_index == IWL_POWER_RANGE_0)
1690 range = &pow_data->pwr_range_0[0];
1691 else
1692 range = &pow_data->pwr_range_1[1];
1693
bb8c093b 1694 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
b481de9c
ZY		 1695
1696#ifdef IWL_MAC80211_DISABLE
1697 if (priv->assoc_network != NULL) {
1698 unsigned long flags;
1699
1700 period = priv->assoc_network->tim.tim_period;
1701 }
1702#endif /*IWL_MAC80211_DISABLE */
1703 skip = range[mode].no_dtim;
1704
1705 if (period == 0) {
1706 period = 1;
1707 skip = 0;
1708 }
1709
1710 if (skip == 0) {
1711 max_sleep = period;
1712 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1713 } else {
1714 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1715 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1716 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1717 }
1718
1719 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1720 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1721 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1722 }
1723
1724 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1725 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1726 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1727 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1728 le32_to_cpu(cmd->sleep_interval[0]),
1729 le32_to_cpu(cmd->sleep_interval[1]),
1730 le32_to_cpu(cmd->sleep_interval[2]),
1731 le32_to_cpu(cmd->sleep_interval[3]),
1732 le32_to_cpu(cmd->sleep_interval[4]));
1733
1734 return rc;
1735}
1736
c79dd5b5 1737static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
b481de9c 1738{
9a62f73b 1739 u32 uninitialized_var(final_mode);
b481de9c 1740 int rc;
bb8c093b 1741 struct iwl4965_powertable_cmd cmd;
b481de9c
ZY		 1742
1743 /* If on battery, set to 3,
01ebd063 1744 * if plugged into AC power, set to CAM ("continuously aware mode"),
b481de9c
ZY		 1745 * else user level */
1746 switch (mode) {
1747 case IWL_POWER_BATTERY:
1748 final_mode = IWL_POWER_INDEX_3;
1749 break;
1750 case IWL_POWER_AC:
1751 final_mode = IWL_POWER_MODE_CAM;
1752 break;
1753 default:
1754 final_mode = mode;
1755 break;
1756 }
1757
1758 cmd.keep_alive_beacons = 0;
1759
bb8c093b 1760 iwl4965_update_power_cmd(priv, &cmd, final_mode);
b481de9c 1761
857485c0 1762 rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
b481de9c
ZY		 1763
1764 if (final_mode == IWL_POWER_MODE_CAM)
1765 clear_bit(STATUS_POWER_PMI, &priv->status);
1766 else
1767 set_bit(STATUS_POWER_PMI, &priv->status);
1768
1769 return rc;
1770}
1771
c79dd5b5 1772int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 1773{
1774 /* Filter incoming packets to determine if they are targeted toward
1775 * this network, discarding packets coming from ourselves */
1776 switch (priv->iw_mode) {
1777 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
1778 /* packets from our adapter are dropped (echo) */
1779 if (!compare_ether_addr(header->addr2, priv->mac_addr))
1780 return 0;
1781 /* {broad,multi}cast packets to our IBSS go through */
1782 if (is_multicast_ether_addr(header->addr1))
1783 return !compare_ether_addr(header->addr3, priv->bssid);
1784 /* packets to our adapter go through */
1785 return !compare_ether_addr(header->addr1, priv->mac_addr);
1786 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
1787 /* packets from our adapter are dropped (echo) */
1788 if (!compare_ether_addr(header->addr3, priv->mac_addr))
1789 return 0;
1790 /* {broad,multi}cast packets to our BSS go through */
1791 if (is_multicast_ether_addr(header->addr1))
1792 return !compare_ether_addr(header->addr2, priv->bssid);
1793 /* packets to our adapter go through */
1794 return !compare_ether_addr(header->addr1, priv->mac_addr);
1795 }
1796
1797 return 1;
1798}
1799
1800#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1801
bb8c093b 1802static const char *iwl4965_get_tx_fail_reason(u32 status)
b481de9c
ZY		 1803{
1804 switch (status & TX_STATUS_MSK) {
1805 case TX_STATUS_SUCCESS:
1806 return "SUCCESS";
1807 TX_STATUS_ENTRY(SHORT_LIMIT);
1808 TX_STATUS_ENTRY(LONG_LIMIT);
1809 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1810 TX_STATUS_ENTRY(MGMNT_ABORT);
1811 TX_STATUS_ENTRY(NEXT_FRAG);
1812 TX_STATUS_ENTRY(LIFE_EXPIRE);
1813 TX_STATUS_ENTRY(DEST_PS);
1814 TX_STATUS_ENTRY(ABORTED);
1815 TX_STATUS_ENTRY(BT_RETRY);
1816 TX_STATUS_ENTRY(STA_INVALID);
1817 TX_STATUS_ENTRY(FRAG_DROPPED);
1818 TX_STATUS_ENTRY(TID_DISABLE);
1819 TX_STATUS_ENTRY(FRAME_FLUSHED);
1820 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1821 TX_STATUS_ENTRY(TX_LOCKED);
1822 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1823 }
1824
1825 return "UNKNOWN";
1826}
1827
1828/**
bb8c093b 1829 * iwl4965_scan_cancel - Cancel any currently executing HW scan
b481de9c
ZY		 1830 *
1831 * NOTE: priv->mutex is not required before calling this function
1832 */
c79dd5b5 1833static int iwl4965_scan_cancel(struct iwl_priv *priv)
b481de9c
ZY		 1834{
1835 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1836 clear_bit(STATUS_SCANNING, &priv->status);
1837 return 0;
1838 }
1839
1840 if (test_bit(STATUS_SCANNING, &priv->status)) {
1841 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1842 IWL_DEBUG_SCAN("Queuing scan abort.\n");
1843 set_bit(STATUS_SCAN_ABORTING, &priv->status);
1844 queue_work(priv->workqueue, &priv->abort_scan);
1845
1846 } else
1847 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
1848
1849 return test_bit(STATUS_SCANNING, &priv->status);
1850 }
1851
1852 return 0;
1853}
1854
1855/**
bb8c093b 1856 * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
b481de9c
ZY		 1857 * @ms: amount of time to wait (in milliseconds) for scan to abort
1858 *
1859 * NOTE: priv->mutex must be held before calling this function
1860 */
c79dd5b5 1861static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
b481de9c
ZY		 1862{
1863 unsigned long now = jiffies;
1864 int ret;
1865
bb8c093b 1866 ret = iwl4965_scan_cancel(priv);
b481de9c
ZY		 1867 if (ret && ms) {
1868 mutex_unlock(&priv->mutex);
1869 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
1870 test_bit(STATUS_SCANNING, &priv->status))
1871 msleep(1);
1872 mutex_lock(&priv->mutex);
1873
1874 return test_bit(STATUS_SCANNING, &priv->status);
1875 }
1876
1877 return ret;
1878}
1879
c79dd5b5 1880static void iwl4965_sequence_reset(struct iwl_priv *priv)
b481de9c
ZY		 1881{
1882 /* Reset ieee stats */
1883
1884 /* We don't reset the net_device_stats (ieee->stats) on
1885 * re-association */
1886
1887 priv->last_seq_num = -1;
1888 priv->last_frag_num = -1;
1889 priv->last_packet_time = 0;
1890
bb8c093b 1891 iwl4965_scan_cancel(priv);
b481de9c
ZY		 1892}
1893
1894#define MAX_UCODE_BEACON_INTERVAL 4096
1895#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
1896
bb8c093b 1897static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
b481de9c
ZY		 1898{
1899 u16 new_val = 0;
1900 u16 beacon_factor = 0;
1901
1902 beacon_factor =
1903 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
1904 / MAX_UCODE_BEACON_INTERVAL;
1905 new_val = beacon_val / beacon_factor;
1906
1907 return cpu_to_le16(new_val);
1908}
1909
c79dd5b5 1910static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
b481de9c
ZY		 1911{
1912 u64 interval_tm_unit;
1913 u64 tsf, result;
1914 unsigned long flags;
1915 struct ieee80211_conf *conf = NULL;
1916 u16 beacon_int = 0;
1917
1918 conf = ieee80211_get_hw_conf(priv->hw);
1919
1920 spin_lock_irqsave(&priv->lock, flags);
1921 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
1922 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
1923
1924 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
1925
1926 tsf = priv->timestamp1;
1927 tsf = ((tsf << 32) | priv->timestamp0);
1928
1929 beacon_int = priv->beacon_int;
1930 spin_unlock_irqrestore(&priv->lock, flags);
1931
1932 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
1933 if (beacon_int == 0) {
1934 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
1935 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
1936 } else {
1937 priv->rxon_timing.beacon_interval =
1938 cpu_to_le16(beacon_int);
1939 priv->rxon_timing.beacon_interval =
bb8c093b 1940 iwl4965_adjust_beacon_interval(
b481de9c
ZY		 1941 le16_to_cpu(priv->rxon_timing.beacon_interval));
1942 }
1943
1944 priv->rxon_timing.atim_window = 0;
1945 } else {
1946 priv->rxon_timing.beacon_interval =
bb8c093b 1947 iwl4965_adjust_beacon_interval(conf->beacon_int);
b481de9c
ZY		 1948 /* TODO: we need to get atim_window from upper stack
1949 * for now we set to 0 */
1950 priv->rxon_timing.atim_window = 0;
1951 }
1952
1953 interval_tm_unit =
1954 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
1955 result = do_div(tsf, interval_tm_unit);
1956 priv->rxon_timing.beacon_init_val =
1957 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
1958
1959 IWL_DEBUG_ASSOC
1960 ("beacon interval %d beacon timer %d beacon tim %d\n",
1961 le16_to_cpu(priv->rxon_timing.beacon_interval),
1962 le32_to_cpu(priv->rxon_timing.beacon_init_val),
1963 le16_to_cpu(priv->rxon_timing.atim_window));
1964}
1965
c79dd5b5 1966static int iwl4965_scan_initiate(struct iwl_priv *priv)
b481de9c
ZY		 1967{
1968 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1969 IWL_ERROR("APs don't scan.\n");
1970 return 0;
1971 }
1972
bb8c093b 1973 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 1974 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
1975 return -EIO;
1976 }
1977
1978 if (test_bit(STATUS_SCANNING, &priv->status)) {
1979 IWL_DEBUG_SCAN("Scan already in progress.\n");
1980 return -EAGAIN;
1981 }
1982
1983 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1984 IWL_DEBUG_SCAN("Scan request while abort pending. "
1985 "Queuing.\n");
1986 return -EAGAIN;
1987 }
1988
1989 IWL_DEBUG_INFO("Starting scan...\n");
1990 priv->scan_bands = 2;
1991 set_bit(STATUS_SCANNING, &priv->status);
1992 priv->scan_start = jiffies;
1993 priv->scan_pass_start = priv->scan_start;
1994
1995 queue_work(priv->workqueue, &priv->request_scan);
1996
1997 return 0;
1998}
1999
b481de9c 2000
c79dd5b5 2001static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
8318d78a 2002 enum ieee80211_band band)
b481de9c 2003{
8318d78a 2004 if (band == IEEE80211_BAND_5GHZ) {
b481de9c
ZY		 2005 priv->staging_rxon.flags &=
2006 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2007 | RXON_FLG_CCK_MSK);
2008 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2009 } else {
bb8c093b 2010 /* Copied from iwl4965_bg_post_associate() */
b481de9c
ZY		 2011 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2012 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2013 else
2014 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2015
2016 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2017 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2018
2019 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2020 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2021 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2022 }
2023}
2024
2025/*
01ebd063 2026 * initialize rxon structure with default values from eeprom
b481de9c 2027 */
c79dd5b5 2028static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
b481de9c 2029{
bf85ea4f 2030 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 2031
2032 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2033
2034 switch (priv->iw_mode) {
2035 case IEEE80211_IF_TYPE_AP:
2036 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2037 break;
2038
2039 case IEEE80211_IF_TYPE_STA:
2040 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2041 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2042 break;
2043
2044 case IEEE80211_IF_TYPE_IBSS:
2045 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2046 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2047 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2048 RXON_FILTER_ACCEPT_GRP_MSK;
2049 break;
2050
2051 case IEEE80211_IF_TYPE_MNTR:
2052 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2053 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2054 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2055 break;
2056 }
2057
2058#if 0
2059 /* TODO: Figure out when short_preamble would be set and cache from
2060 * that */
2061 if (!hw_to_local(priv->hw)->short_preamble)
2062 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2063 else
2064 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2065#endif
2066
8622e705 2067 ch_info = iwl_get_channel_info(priv, priv->band,
b481de9c
ZY		 2068 le16_to_cpu(priv->staging_rxon.channel));
2069
2070 if (!ch_info)
2071 ch_info = &priv->channel_info[0];
2072
2073 /*
2074 * in some case A channels are all non IBSS
2075 * in this case force B/G channel
2076 */
2077 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2078 !(is_channel_ibss(ch_info)))
2079 ch_info = &priv->channel_info[0];
2080
2081 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
8318d78a 2082 priv->band = ch_info->band;
b481de9c 2083
8318d78a 2084 iwl4965_set_flags_for_phymode(priv, priv->band);
b481de9c
ZY		 2085
2086 priv->staging_rxon.ofdm_basic_rates =
2087 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2088 priv->staging_rxon.cck_basic_rates =
2089 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2090
2091 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
2092 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
2093 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2094 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
2095 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
2096 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
2097 iwl4965_set_rxon_chain(priv);
2098}
2099
c79dd5b5 2100static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
b481de9c 2101{
b481de9c 2102 if (mode == IEEE80211_IF_TYPE_IBSS) {
bf85ea4f 2103 const struct iwl_channel_info *ch_info;
b481de9c 2104
8622e705 2105 ch_info = iwl_get_channel_info(priv,
8318d78a 2106 priv->band,
b481de9c
ZY		 2107 le16_to_cpu(priv->staging_rxon.channel));
2108
2109 if (!ch_info || !is_channel_ibss(ch_info)) {
2110 IWL_ERROR("channel %d not IBSS channel\n",
2111 le16_to_cpu(priv->staging_rxon.channel));
2112 return -EINVAL;
2113 }
2114 }
2115
b481de9c
ZY		 2116 priv->iw_mode = mode;
2117
bb8c093b 2118 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 2119 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2120
bf85ea4f 2121 iwlcore_clear_stations_table(priv);
b481de9c 2122
fde3571f
MA		 2123 /* dont commit rxon if rf-kill is on*/
2124 if (!iwl4965_is_ready_rf(priv))
2125 return -EAGAIN;
2126
2127 cancel_delayed_work(&priv->scan_check);
2128 if (iwl4965_scan_cancel_timeout(priv, 100)) {
2129 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2130 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2131 return -EAGAIN;
2132 }
2133
bb8c093b 2134 iwl4965_commit_rxon(priv);
b481de9c
ZY		 2135
2136 return 0;
2137}
2138
c79dd5b5 2139static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
b481de9c 2140 struct ieee80211_tx_control *ctl,
857485c0 2141 struct iwl_cmd *cmd,
b481de9c 2142 struct sk_buff *skb_frag,
deb09c43 2143 int sta_id)
b481de9c 2144{
deb09c43 2145 struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
b481de9c
ZY		 2146
2147 switch (keyinfo->alg) {
2148 case ALG_CCMP:
2149 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2150 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
8236e183
MS		 2151 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
2152 cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
b481de9c
ZY		 2153 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2154 break;
2155
2156 case ALG_TKIP:
b481de9c 2157 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2bc75089
EG		 2158 ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
2159 IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
2160 IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
b481de9c
ZY		 2161 break;
2162
2163 case ALG_WEP:
2164 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2165 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2166
2167 if (keyinfo->keylen == 13)
2168 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2169
2170 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2171
2172 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2173 "with key %d\n", ctl->key_idx);
2174 break;
2175
b481de9c
ZY		 2176 default:
2177 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2178 break;
2179 }
2180}
2181
2182/*
2183 * handle build REPLY_TX command notification.
2184 */
c79dd5b5 2185static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
857485c0 2186 struct iwl_cmd *cmd,
b481de9c
ZY		 2187 struct ieee80211_tx_control *ctrl,
2188 struct ieee80211_hdr *hdr,
2189 int is_unicast, u8 std_id)
2190{
2191 __le16 *qc;
2192 u16 fc = le16_to_cpu(hdr->frame_control);
2193 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2194
2195 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2196 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2197 tx_flags |= TX_CMD_FLG_ACK_MSK;
2198 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2199 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2200 if (ieee80211_is_probe_response(fc) &&
2201 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2202 tx_flags |= TX_CMD_FLG_TSF_MSK;
2203 } else {
2204 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2205 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2206 }
2207
87e4f7df
TW		 2208 if (ieee80211_is_back_request(fc))
2209 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
2210
2211
b481de9c
ZY		 2212 cmd->cmd.tx.sta_id = std_id;
2213 if (ieee80211_get_morefrag(hdr))
2214 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2215
2216 qc = ieee80211_get_qos_ctrl(hdr);
2217 if (qc) {
2218 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2219 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2220 } else
2221 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2222
2223 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2224 tx_flags |= TX_CMD_FLG_RTS_MSK;
2225 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2226 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2227 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2228 tx_flags |= TX_CMD_FLG_CTS_MSK;
2229 }
2230
2231 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2232 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2233
2234 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2235 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2236 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2237 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
bc434dd2 2238 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
b481de9c 2239 else
bc434dd2 2240 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
b481de9c
ZY		 2241 } else
2242 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2243
2244 cmd->cmd.tx.driver_txop = 0;
2245 cmd->cmd.tx.tx_flags = tx_flags;
2246 cmd->cmd.tx.next_frame_len = 0;
2247}
19758bef
TW		 2248static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
2249{
2250 /* 0 - mgmt, 1 - cnt, 2 - data */
2251 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
2252 priv->tx_stats[idx].cnt++;
2253 priv->tx_stats[idx].bytes += len;
2254}
6440adb5
BC		 2255/**
2256 * iwl4965_get_sta_id - Find station's index within station table
2257 *
2258 * If new IBSS station, create new entry in station table
2259 */
c79dd5b5 2260static int iwl4965_get_sta_id(struct iwl_priv *priv,
9fbab516 2261 struct ieee80211_hdr *hdr)
b481de9c
ZY		 2262{
2263 int sta_id;
2264 u16 fc = le16_to_cpu(hdr->frame_control);
0795af57 2265 DECLARE_MAC_BUF(mac);
b481de9c 2266
6440adb5 2267 /* If this frame is broadcast or management, use broadcast station id */
b481de9c
ZY		 2268 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2269 is_multicast_ether_addr(hdr->addr1))
2270 return priv->hw_setting.bcast_sta_id;
2271
2272 switch (priv->iw_mode) {
2273
6440adb5
BC		 2274 /* If we are a client station in a BSS network, use the special
2275 * AP station entry (that's the only station we communicate with) */
b481de9c
ZY		 2276 case IEEE80211_IF_TYPE_STA:
2277 return IWL_AP_ID;
2278
2279 /* If we are an AP, then find the station, or use BCAST */
2280 case IEEE80211_IF_TYPE_AP:
bb8c093b 2281 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2282 if (sta_id != IWL_INVALID_STATION)
2283 return sta_id;
2284 return priv->hw_setting.bcast_sta_id;
2285
6440adb5
BC		 2286 /* If this frame is going out to an IBSS network, find the station,
2287 * or create a new station table entry */
b481de9c 2288 case IEEE80211_IF_TYPE_IBSS:
bb8c093b 2289 sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
b481de9c
ZY		 2290 if (sta_id != IWL_INVALID_STATION)
2291 return sta_id;
2292
6440adb5 2293 /* Create new station table entry */
67d62035
RR		 2294 sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
2295 0, CMD_ASYNC, NULL);
b481de9c
ZY		 2296
2297 if (sta_id != IWL_INVALID_STATION)
2298 return sta_id;
2299
0795af57 2300 IWL_DEBUG_DROP("Station %s not in station map. "
b481de9c 2301 "Defaulting to broadcast...\n",
0795af57 2302 print_mac(mac, hdr->addr1));
0a6857e7 2303 iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
b481de9c
ZY		 2304 return priv->hw_setting.bcast_sta_id;
2305
2306 default:
01ebd063 2307 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
b481de9c
ZY		 2308 return priv->hw_setting.bcast_sta_id;
2309 }
2310}
2311
2312/*
2313 * start REPLY_TX command process
2314 */
c79dd5b5 2315static int iwl4965_tx_skb(struct iwl_priv *priv,
b481de9c
ZY		 2316 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2317{
2318 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
bb8c093b 2319 struct iwl4965_tfd_frame *tfd;
b481de9c
ZY		 2320 u32 *control_flags;
2321 int txq_id = ctl->queue;
bb8c093b
CH		 2322 struct iwl4965_tx_queue *txq = NULL;
2323 struct iwl4965_queue *q = NULL;
b481de9c
ZY		 2324 dma_addr_t phys_addr;
2325 dma_addr_t txcmd_phys;
87e4f7df 2326 dma_addr_t scratch_phys;
857485c0 2327 struct iwl_cmd *out_cmd = NULL;
b481de9c
ZY		 2328 u16 len, idx, len_org;
2329 u8 id, hdr_len, unicast;
2330 u8 sta_id;
2331 u16 seq_number = 0;
2332 u16 fc;
2333 __le16 *qc;
2334 u8 wait_write_ptr = 0;
2335 unsigned long flags;
2336 int rc;
2337
2338 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2339 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 2340 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2341 goto drop_unlock;
2342 }
2343
32bfd35d
JB		 2344 if (!priv->vif) {
2345 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
b481de9c
ZY		 2346 goto drop_unlock;
2347 }
2348
8318d78a 2349 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
b481de9c
ZY		 2350 IWL_ERROR("ERROR: No TX rate available.\n");
2351 goto drop_unlock;
2352 }
2353
2354 unicast = !is_multicast_ether_addr(hdr->addr1);
2355 id = 0;
2356
2357 fc = le16_to_cpu(hdr->frame_control);
2358
0a6857e7 2359#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 2360 if (ieee80211_is_auth(fc))
2361 IWL_DEBUG_TX("Sending AUTH frame\n");
2362 else if (ieee80211_is_assoc_request(fc))
2363 IWL_DEBUG_TX("Sending ASSOC frame\n");
2364 else if (ieee80211_is_reassoc_request(fc))
2365 IWL_DEBUG_TX("Sending REASSOC frame\n");
2366#endif
2367
7878a5a4 2368 /* drop all data frame if we are not associated */
76f3915b
GG		 2369 if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
2370 (!iwl4965_is_associated(priv) ||
a6477249 2371 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
76f3915b 2372 !priv->assoc_station_added)) {
bb8c093b 2373 IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
b481de9c
ZY		 2374 goto drop_unlock;
2375 }
2376
2377 spin_unlock_irqrestore(&priv->lock, flags);
2378
2379 hdr_len = ieee80211_get_hdrlen(fc);
6440adb5
BC		 2380
2381 /* Find (or create) index into station table for destination station */
bb8c093b 2382 sta_id = iwl4965_get_sta_id(priv, hdr);
b481de9c 2383 if (sta_id == IWL_INVALID_STATION) {
0795af57
JP		 2384 DECLARE_MAC_BUF(mac);
2385
2386 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2387 print_mac(mac, hdr->addr1));
b481de9c
ZY		 2388 goto drop;
2389 }
2390
2391 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2392
2393 qc = ieee80211_get_qos_ctrl(hdr);
2394 if (qc) {
2395 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2396 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2397 IEEE80211_SCTL_SEQ;
2398 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2399 (hdr->seq_ctrl &
2400 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2401 seq_number += 0x10;
c8b0e6e1 2402#ifdef CONFIG_IWL4965_HT
b481de9c 2403 /* aggregation is on for this <sta,tid> */
fe01b477 2404 if (ctl->flags & IEEE80211_TXCTL_AMPDU)
b481de9c 2405 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
fe01b477 2406 priv->stations[sta_id].tid[tid].tfds_in_queue++;
c8b0e6e1 2407#endif /* CONFIG_IWL4965_HT */
b481de9c 2408 }
6440adb5
BC		 2409
2410 /* Descriptor for chosen Tx queue */
b481de9c
ZY		 2411 txq = &priv->txq[txq_id];
2412 q = &txq->q;
2413
2414 spin_lock_irqsave(&priv->lock, flags);
2415
6440adb5 2416 /* Set up first empty TFD within this queue's circular TFD buffer */
fc4b6853 2417 tfd = &txq->bd[q->write_ptr];
b481de9c
ZY		 2418 memset(tfd, 0, sizeof(*tfd));
2419 control_flags = (u32 *) tfd;
fc4b6853 2420 idx = get_cmd_index(q, q->write_ptr, 0);
b481de9c 2421
6440adb5 2422 /* Set up driver data for this TFD */
bb8c093b 2423 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
fc4b6853
TW		 2424 txq->txb[q->write_ptr].skb[0] = skb;
2425 memcpy(&(txq->txb[q->write_ptr].status.control),
b481de9c 2426 ctl, sizeof(struct ieee80211_tx_control));
6440adb5
BC		 2427
2428 /* Set up first empty entry in queue's array of Tx/cmd buffers */
b481de9c
ZY		 2429 out_cmd = &txq->cmd[idx];
2430 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2431 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
6440adb5
BC		 2432
2433 /*
2434 * Set up the Tx-command (not MAC!) header.
2435 * Store the chosen Tx queue and TFD index within the sequence field;
2436 * after Tx, uCode's Tx response will return this value so driver can
2437 * locate the frame within the tx queue and do post-tx processing.
2438 */
b481de9c
ZY		 2439 out_cmd->hdr.cmd = REPLY_TX;
2440 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
fc4b6853 2441 INDEX_TO_SEQ(q->write_ptr)));
6440adb5
BC		 2442
2443 /* Copy MAC header from skb into command buffer */
b481de9c
ZY		 2444 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2445
6440adb5
BC		 2446 /*
2447 * Use the first empty entry in this queue's command buffer array
2448 * to contain the Tx command and MAC header concatenated together
2449 * (payload data will be in another buffer).
2450 * Size of this varies, due to varying MAC header length.
2451 * If end is not dword aligned, we'll have 2 extra bytes at the end
2452 * of the MAC header (device reads on dword boundaries).
2453 * We'll tell device about this padding later.
2454 */
b481de9c 2455 len = priv->hw_setting.tx_cmd_len +
857485c0 2456 sizeof(struct iwl_cmd_header) + hdr_len;
b481de9c
ZY		 2457
2458 len_org = len;
2459 len = (len + 3) & ~3;
2460
2461 if (len_org != len)
2462 len_org = 1;
2463 else
2464 len_org = 0;
2465
6440adb5
BC		 2466 /* Physical address of this Tx command's header (not MAC header!),
2467 * within command buffer array. */
857485c0
TW		 2468 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
2469 offsetof(struct iwl_cmd, hdr);
b481de9c 2470
6440adb5
BC		 2471 /* Add buffer containing Tx command and MAC(!) header to TFD's
2472 * first entry */
bb8c093b 2473 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
b481de9c
ZY		 2474
2475 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
deb09c43 2476 iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
b481de9c 2477
6440adb5
BC		 2478 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2479 * if any (802.11 null frames have no payload). */
b481de9c
ZY		 2480 len = skb->len - hdr_len;
2481 if (len) {
2482 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2483 len, PCI_DMA_TODEVICE);
bb8c093b 2484 iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
b481de9c
ZY		 2485 }
2486
6440adb5 2487 /* Tell 4965 about any 2-byte padding after MAC header */
b481de9c
ZY		 2488 if (len_org)
2489 out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
2490
6440adb5 2491 /* Total # bytes to be transmitted */
b481de9c
ZY		 2492 len = (u16)skb->len;
2493 out_cmd->cmd.tx.len = cpu_to_le16(len);
2494
2495 /* TODO need this for burst mode later on */
bb8c093b 2496 iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
b481de9c
ZY		 2497
2498 /* set is_hcca to 0; it probably will never be implemented */
bb8c093b 2499 iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
b481de9c 2500
19758bef
TW		 2501 iwl_update_tx_stats(priv, fc, len);
2502
857485c0 2503 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
87e4f7df
TW		 2504 offsetof(struct iwl4965_tx_cmd, scratch);
2505 out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
2506 out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
2507
b481de9c
ZY		 2508 if (!ieee80211_get_morefrag(hdr)) {
2509 txq->need_update = 1;
2510 if (qc) {
2511 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2512 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2513 }
2514 } else {
2515 wait_write_ptr = 1;
2516 txq->need_update = 0;
2517 }
2518
0a6857e7 2519 iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
b481de9c
ZY		 2520 sizeof(out_cmd->cmd.tx));
2521
0a6857e7 2522 iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
b481de9c
ZY		 2523 ieee80211_get_hdrlen(fc));
2524
6440adb5 2525 /* Set up entry for this TFD in Tx byte-count array */
b481de9c
ZY		 2526 iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
2527
6440adb5 2528 /* Tell device the write index *just past* this latest filled TFD */
c54b679d 2529 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
bb8c093b 2530 rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2531 spin_unlock_irqrestore(&priv->lock, flags);
2532
2533 if (rc)
2534 return rc;
2535
bb8c093b 2536 if ((iwl4965_queue_space(q) < q->high_mark)
b481de9c
ZY		 2537 && priv->mac80211_registered) {
2538 if (wait_write_ptr) {
2539 spin_lock_irqsave(&priv->lock, flags);
2540 txq->need_update = 1;
bb8c093b 2541 iwl4965_tx_queue_update_write_ptr(priv, txq);
b481de9c
ZY		 2542 spin_unlock_irqrestore(&priv->lock, flags);
2543 }
2544
2545 ieee80211_stop_queue(priv->hw, ctl->queue);
2546 }
2547
2548 return 0;
2549
2550drop_unlock:
2551 spin_unlock_irqrestore(&priv->lock, flags);
2552drop:
2553 return -1;
2554}
2555
c79dd5b5 2556static void iwl4965_set_rate(struct iwl_priv *priv)
b481de9c 2557{
8318d78a 2558 const struct ieee80211_supported_band *hw = NULL;
b481de9c
ZY		 2559 struct ieee80211_rate *rate;
2560 int i;
2561
8318d78a 2562 hw = iwl4965_get_hw_mode(priv, priv->band);
c4ba9621
SA		 2563 if (!hw) {
2564 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2565 return;
2566 }
b481de9c
ZY		 2567
2568 priv->active_rate = 0;
2569 priv->active_rate_basic = 0;
2570
8318d78a
JB		 2571 for (i = 0; i < hw->n_bitrates; i++) {
2572 rate = &(hw->bitrates[i]);
2573 if (rate->hw_value < IWL_RATE_COUNT)
2574 priv->active_rate |= (1 << rate->hw_value);
b481de9c
ZY		 2575 }
2576
2577 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2578 priv->active_rate, priv->active_rate_basic);
2579
2580 /*
2581 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2582 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2583 * OFDM
2584 */
2585 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2586 priv->staging_rxon.cck_basic_rates =
2587 ((priv->active_rate_basic &
2588 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2589 else
2590 priv->staging_rxon.cck_basic_rates =
2591 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2592
2593 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2594 priv->staging_rxon.ofdm_basic_rates =
2595 ((priv->active_rate_basic &
2596 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2597 IWL_FIRST_OFDM_RATE) & 0xFF;
2598 else
2599 priv->staging_rxon.ofdm_basic_rates =
2600 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2601}
2602
c79dd5b5 2603static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
b481de9c
ZY		 2604{
2605 unsigned long flags;
2606
2607 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2608 return;
2609
2610 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2611 disable_radio ? "OFF" : "ON");
2612
2613 if (disable_radio) {
bb8c093b 2614 iwl4965_scan_cancel(priv);
b481de9c
ZY		 2615 /* FIXME: This is a workaround for AP */
2616 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2617 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2618 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 2619 CSR_UCODE_SW_BIT_RFKILL);
2620 spin_unlock_irqrestore(&priv->lock, flags);
bb8c093b 2621 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
b481de9c
ZY		 2622 set_bit(STATUS_RF_KILL_SW, &priv->status);
2623 }
2624 return;
2625 }
2626
2627 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 2628 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 2629
2630 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2631 spin_unlock_irqrestore(&priv->lock, flags);
2632
2633 /* wake up ucode */
2634 msleep(10);
2635
2636 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 2637 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
2638 if (!iwl4965_grab_nic_access(priv))
2639 iwl4965_release_nic_access(priv);
b481de9c
ZY		 2640 spin_unlock_irqrestore(&priv->lock, flags);
2641
2642 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2643 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2644 "disabled by HW switch\n");
2645 return;
2646 }
2647
2648 queue_work(priv->workqueue, &priv->restart);
2649 return;
2650}
2651
c79dd5b5 2652void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
b481de9c
ZY		 2653 u32 decrypt_res, struct ieee80211_rx_status *stats)
2654{
2655 u16 fc =
2656 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2657
2658 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2659 return;
2660
2661 if (!(fc & IEEE80211_FCTL_PROTECTED))
2662 return;
2663
2664 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2665 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2666 case RX_RES_STATUS_SEC_TYPE_TKIP:
17e476b8
EG		 2667 /* The uCode has got a bad phase 1 Key, pushes the packet.
2668 * Decryption will be done in SW. */
2669 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2670 RX_RES_STATUS_BAD_KEY_TTAK)
2671 break;
2672
b481de9c
ZY		 2673 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2674 RX_RES_STATUS_BAD_ICV_MIC)
2675 stats->flag |= RX_FLAG_MMIC_ERROR;
2676 case RX_RES_STATUS_SEC_TYPE_WEP:
2677 case RX_RES_STATUS_SEC_TYPE_CCMP:
2678 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2679 RX_RES_STATUS_DECRYPT_OK) {
2680 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2681 stats->flag |= RX_FLAG_DECRYPTED;
2682 }
2683 break;
2684
2685 default:
2686 break;
2687 }
2688}
2689
b481de9c
ZY		 2690
2691#define IWL_PACKET_RETRY_TIME HZ
2692
c79dd5b5 2693int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
b481de9c
ZY		 2694{
2695 u16 sc = le16_to_cpu(header->seq_ctrl);
2696 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2697 u16 frag = sc & IEEE80211_SCTL_FRAG;
2698 u16 *last_seq, *last_frag;
2699 unsigned long *last_time;
2700
2701 switch (priv->iw_mode) {
2702 case IEEE80211_IF_TYPE_IBSS:{
2703 struct list_head *p;
bb8c093b 2704 struct iwl4965_ibss_seq *entry = NULL;
b481de9c
ZY		 2705 u8 *mac = header->addr2;
2706 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2707
2708 __list_for_each(p, &priv->ibss_mac_hash[index]) {
bb8c093b 2709 entry = list_entry(p, struct iwl4965_ibss_seq, list);
b481de9c
ZY		 2710 if (!compare_ether_addr(entry->mac, mac))
2711 break;
2712 }
2713 if (p == &priv->ibss_mac_hash[index]) {
2714 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2715 if (!entry) {
bc434dd2 2716 IWL_ERROR("Cannot malloc new mac entry\n");
b481de9c
ZY		 2717 return 0;
2718 }
2719 memcpy(entry->mac, mac, ETH_ALEN);
2720 entry->seq_num = seq;
2721 entry->frag_num = frag;
2722 entry->packet_time = jiffies;
bc434dd2 2723 list_add(&entry->list, &priv->ibss_mac_hash[index]);
b481de9c
ZY		 2724 return 0;
2725 }
2726 last_seq = &entry->seq_num;
2727 last_frag = &entry->frag_num;
2728 last_time = &entry->packet_time;
2729 break;
2730 }
2731 case IEEE80211_IF_TYPE_STA:
2732 last_seq = &priv->last_seq_num;
2733 last_frag = &priv->last_frag_num;
2734 last_time = &priv->last_packet_time;
2735 break;
2736 default:
2737 return 0;
2738 }
2739 if ((*last_seq == seq) &&
2740 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2741 if (*last_frag == frag)
2742 goto drop;
2743 if (*last_frag + 1 != frag)
2744 /* out-of-order fragment */
2745 goto drop;
2746 } else
2747 *last_seq = seq;
2748
2749 *last_frag = frag;
2750 *last_time = jiffies;
2751 return 0;
2752
2753 drop:
2754 return 1;
2755}
2756
c8b0e6e1 2757#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 2758
2759#include "iwl-spectrum.h"
2760
2761#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2762#define BEACON_TIME_MASK_HIGH 0xFF000000
2763#define TIME_UNIT 1024
2764
2765/*
2766 * extended beacon time format
2767 * time in usec will be changed into a 32-bit value in 8:24 format
2768 * the high 1 byte is the beacon counts
2769 * the lower 3 bytes is the time in usec within one beacon interval
2770 */
2771
bb8c093b 2772static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
b481de9c
ZY		 2773{
2774 u32 quot;
2775 u32 rem;
2776 u32 interval = beacon_interval * 1024;
2777
2778 if (!interval || !usec)
2779 return 0;
2780
2781 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
2782 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
2783
2784 return (quot << 24) + rem;
2785}
2786
2787/* base is usually what we get from ucode with each received frame,
2788 * the same as HW timer counter counting down
2789 */
2790
bb8c093b 2791static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
b481de9c
ZY		 2792{
2793 u32 base_low = base & BEACON_TIME_MASK_LOW;
2794 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
2795 u32 interval = beacon_interval * TIME_UNIT;
2796 u32 res = (base & BEACON_TIME_MASK_HIGH) +
2797 (addon & BEACON_TIME_MASK_HIGH);
2798
2799 if (base_low > addon_low)
2800 res += base_low - addon_low;
2801 else if (base_low < addon_low) {
2802 res += interval + base_low - addon_low;
2803 res += (1 << 24);
2804 } else
2805 res += (1 << 24);
2806
2807 return cpu_to_le32(res);
2808}
2809
c79dd5b5 2810static int iwl4965_get_measurement(struct iwl_priv *priv,
b481de9c
ZY		 2811 struct ieee80211_measurement_params *params,
2812 u8 type)
2813{
bb8c093b
CH		 2814 struct iwl4965_spectrum_cmd spectrum;
2815 struct iwl4965_rx_packet *res;
857485c0 2816 struct iwl_host_cmd cmd = {
b481de9c
ZY		 2817 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
2818 .data = (void *)&spectrum,
2819 .meta.flags = CMD_WANT_SKB,
2820 };
2821 u32 add_time = le64_to_cpu(params->start_time);
2822 int rc;
2823 int spectrum_resp_status;
2824 int duration = le16_to_cpu(params->duration);
2825
bb8c093b 2826 if (iwl4965_is_associated(priv))
b481de9c 2827 add_time =
bb8c093b 2828 iwl4965_usecs_to_beacons(
b481de9c
ZY		 2829 le64_to_cpu(params->start_time) - priv->last_tsf,
2830 le16_to_cpu(priv->rxon_timing.beacon_interval));
2831
2832 memset(&spectrum, 0, sizeof(spectrum));
2833
2834 spectrum.channel_count = cpu_to_le16(1);
2835 spectrum.flags =
2836 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
2837 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
2838 cmd.len = sizeof(spectrum);
2839 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
2840
bb8c093b 2841 if (iwl4965_is_associated(priv))
b481de9c 2842 spectrum.start_time =
bb8c093b 2843 iwl4965_add_beacon_time(priv->last_beacon_time,
b481de9c
ZY		 2844 add_time,
2845 le16_to_cpu(priv->rxon_timing.beacon_interval));
2846 else
2847 spectrum.start_time = 0;
2848
2849 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
2850 spectrum.channels[0].channel = params->channel;
2851 spectrum.channels[0].type = type;
2852 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
2853 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
2854 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
2855
857485c0 2856 rc = iwl_send_cmd_sync(priv, &cmd);
b481de9c
ZY		 2857 if (rc)
2858 return rc;
2859
bb8c093b 2860 res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
b481de9c
ZY		 2861 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
2862 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
2863 rc = -EIO;
2864 }
2865
2866 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
2867 switch (spectrum_resp_status) {
2868 case 0: /* Command will be handled */
2869 if (res->u.spectrum.id != 0xff) {
2870 IWL_DEBUG_INFO
2871 ("Replaced existing measurement: %d\n",
2872 res->u.spectrum.id);
2873 priv->measurement_status &= ~MEASUREMENT_READY;
2874 }
2875 priv->measurement_status |= MEASUREMENT_ACTIVE;
2876 rc = 0;
2877 break;
2878
2879 case 1: /* Command will not be handled */
2880 rc = -EAGAIN;
2881 break;
2882 }
2883
2884 dev_kfree_skb_any(cmd.meta.u.skb);
2885
2886 return rc;
2887}
2888#endif
2889
c79dd5b5 2890static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
bb8c093b 2891 struct iwl4965_tx_info *tx_sta)
b481de9c
ZY		 2892{
2893
2894 tx_sta->status.ack_signal = 0;
2895 tx_sta->status.excessive_retries = 0;
2896 tx_sta->status.queue_length = 0;
2897 tx_sta->status.queue_number = 0;
2898
2899 if (in_interrupt())
2900 ieee80211_tx_status_irqsafe(priv->hw,
2901 tx_sta->skb[0], &(tx_sta->status));
2902 else
2903 ieee80211_tx_status(priv->hw,
2904 tx_sta->skb[0], &(tx_sta->status));
2905
2906 tx_sta->skb[0] = NULL;
2907}
2908
2909/**
6440adb5 2910 * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
b481de9c 2911 *
6440adb5
BC		 2912 * When FW advances 'R' index, all entries between old and new 'R' index
2913 * need to be reclaimed. As result, some free space forms. If there is
2914 * enough free space (> low mark), wake the stack that feeds us.
b481de9c 2915 */
c79dd5b5 2916int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
b481de9c 2917{
bb8c093b
CH		 2918 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
2919 struct iwl4965_queue *q = &txq->q;
b481de9c
ZY		 2920 int nfreed = 0;
2921
2922 if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
2923 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
2924 "is out of range [0-%d] %d %d.\n", txq_id,
fc4b6853 2925 index, q->n_bd, q->write_ptr, q->read_ptr);
b481de9c
ZY		 2926 return 0;
2927 }
2928
c54b679d 2929 for (index = iwl_queue_inc_wrap(index, q->n_bd);
fc4b6853 2930 q->read_ptr != index;
c54b679d 2931 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
b481de9c 2932 if (txq_id != IWL_CMD_QUEUE_NUM) {
bb8c093b 2933 iwl4965_txstatus_to_ieee(priv,
fc4b6853 2934 &(txq->txb[txq->q.read_ptr]));
bb8c093b 2935 iwl4965_hw_txq_free_tfd(priv, txq);
b481de9c
ZY		 2936 } else if (nfreed > 1) {
2937 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
fc4b6853 2938 q->write_ptr, q->read_ptr);
b481de9c
ZY		 2939 queue_work(priv->workqueue, &priv->restart);
2940 }
2941 nfreed++;
2942 }
2943
fe01b477 2944/* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
b481de9c
ZY		 2945 (txq_id != IWL_CMD_QUEUE_NUM) &&
2946 priv->mac80211_registered)
fe01b477 2947 ieee80211_wake_queue(priv->hw, txq_id); */
b481de9c
ZY		 2948
2949
2950 return nfreed;
2951}
2952
bb8c093b 2953static int iwl4965_is_tx_success(u32 status)
b481de9c
ZY		 2954{
2955 status &= TX_STATUS_MSK;
2956 return (status == TX_STATUS_SUCCESS)
2957 || (status == TX_STATUS_DIRECT_DONE);
2958}
2959
2960/******************************************************************************
2961 *
2962 * Generic RX handler implementations
2963 *
2964 ******************************************************************************/
c8b0e6e1 2965#ifdef CONFIG_IWL4965_HT
b481de9c 2966
c79dd5b5 2967static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
b481de9c
ZY		 2968 struct ieee80211_hdr *hdr)
2969{
2970 if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
2971 return IWL_AP_ID;
2972 else {
2973 u8 *da = ieee80211_get_DA(hdr);
bb8c093b 2974 return iwl4965_hw_find_station(priv, da);
b481de9c
ZY		 2975 }
2976}
2977
bb8c093b 2978static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
c79dd5b5 2979 struct iwl_priv *priv, int txq_id, int idx)
b481de9c
ZY		 2980{
2981 if (priv->txq[txq_id].txb[idx].skb[0])
2982 return (struct ieee80211_hdr *)priv->txq[txq_id].
2983 txb[idx].skb[0]->data;
2984 return NULL;
2985}
2986
bb8c093b 2987static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
b481de9c
ZY		 2988{
2989 __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
2990 tx_resp->frame_count);
2991 return le32_to_cpu(*scd_ssn) & MAX_SN;
2992
2993}
6440adb5
BC		 2994
2995/**
2996 * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2997 */
c79dd5b5 2998static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
bb8c093b 2999 struct iwl4965_ht_agg *agg,
fe01b477 3000 struct iwl4965_tx_resp_agg *tx_resp,
b481de9c
ZY		 3001 u16 start_idx)
3002{
fe01b477
RR		 3003 u16 status;
3004 struct agg_tx_status *frame_status = &tx_resp->status;
b481de9c
ZY		 3005 struct ieee80211_tx_status *tx_status = NULL;
3006 struct ieee80211_hdr *hdr = NULL;
3007 int i, sh;
3008 int txq_id, idx;
3009 u16 seq;
3010
3011 if (agg->wait_for_ba)
6440adb5 3012 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
b481de9c
ZY		 3013
3014 agg->frame_count = tx_resp->frame_count;
3015 agg->start_idx = start_idx;
3016 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3017 agg->bitmap = 0;
b481de9c 3018
6440adb5 3019 /* # frames attempted by Tx command */
b481de9c 3020 if (agg->frame_count == 1) {
6440adb5 3021 /* Only one frame was attempted; no block-ack will arrive */
fe01b477
RR		 3022 status = le16_to_cpu(frame_status[0].status);
3023 seq = le16_to_cpu(frame_status[0].sequence);
3024 idx = SEQ_TO_INDEX(seq);
3025 txq_id = SEQ_TO_QUEUE(seq);
b481de9c 3026
b481de9c 3027 /* FIXME: code repetition */
fe01b477
RR		 3028 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
3029 agg->frame_count, agg->start_idx, idx);
b481de9c 3030
fe01b477 3031 tx_status = &(priv->txq[txq_id].txb[idx].status);
b481de9c
ZY		 3032 tx_status->retry_count = tx_resp->failure_frame;
3033 tx_status->queue_number = status & 0xff;
fe01b477
RR		 3034 tx_status->queue_length = tx_resp->failure_rts;
3035 tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
bb8c093b 3036 tx_status->flags = iwl4965_is_tx_success(status)?
b481de9c 3037 IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3038 iwl4965_hwrate_to_tx_control(priv,
3039 le32_to_cpu(tx_resp->rate_n_flags),
3040 &tx_status->control);
b481de9c
ZY		 3041 /* FIXME: code repetition end */
3042
3043 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
3044 status & 0xff, tx_resp->failure_frame);
3045 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
bb8c093b 3046 iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
b481de9c
ZY		 3047
3048 agg->wait_for_ba = 0;
3049 } else {
6440adb5 3050 /* Two or more frames were attempted; expect block-ack */
b481de9c
ZY		 3051 u64 bitmap = 0;
3052 int start = agg->start_idx;
3053
6440adb5 3054 /* Construct bit-map of pending frames within Tx window */
b481de9c
ZY		 3055 for (i = 0; i < agg->frame_count; i++) {
3056 u16 sc;
fe01b477
RR		 3057 status = le16_to_cpu(frame_status[i].status);
3058 seq = le16_to_cpu(frame_status[i].sequence);
b481de9c
ZY		 3059 idx = SEQ_TO_INDEX(seq);
3060 txq_id = SEQ_TO_QUEUE(seq);
3061
3062 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
3063 AGG_TX_STATE_ABORT_MSK))
3064 continue;
3065
3066 IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
3067 agg->frame_count, txq_id, idx);
3068
bb8c093b 3069 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
b481de9c
ZY		 3070
3071 sc = le16_to_cpu(hdr->seq_ctrl);
3072 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
3073 IWL_ERROR("BUG_ON idx doesn't match seq control"
3074 " idx=%d, seq_idx=%d, seq=%d\n",
3075 idx, SEQ_TO_SN(sc),
3076 hdr->seq_ctrl);
3077 return -1;
3078 }
3079
3080 IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
3081 i, idx, SEQ_TO_SN(sc));
3082
3083 sh = idx - start;
3084 if (sh > 64) {
3085 sh = (start - idx) + 0xff;
3086 bitmap = bitmap << sh;
3087 sh = 0;
3088 start = idx;
3089 } else if (sh < -64)
3090 sh = 0xff - (start - idx);
3091 else if (sh < 0) {
3092 sh = start - idx;
3093 start = idx;
3094 bitmap = bitmap << sh;
3095 sh = 0;
3096 }
3097 bitmap |= (1 << sh);
3098 IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
3099 start, (u32)(bitmap & 0xFFFFFFFF));
3100 }
3101
fe01b477 3102 agg->bitmap = bitmap;
b481de9c
ZY		 3103 agg->start_idx = start;
3104 agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
fe01b477 3105 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
b481de9c 3106 agg->frame_count, agg->start_idx,
fe01b477 3107 agg->bitmap);
b481de9c
ZY		 3108
3109 if (bitmap)
3110 agg->wait_for_ba = 1;
3111 }
3112 return 0;
3113}
3114#endif
b481de9c 3115
6440adb5
BC		 3116/**
3117 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
3118 */
c79dd5b5 3119static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
bb8c093b 3120 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3121{
bb8c093b 3122 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3123 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3124 int txq_id = SEQ_TO_QUEUE(sequence);
3125 int index = SEQ_TO_INDEX(sequence);
bb8c093b 3126 struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
b481de9c 3127 struct ieee80211_tx_status *tx_status;
bb8c093b 3128 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
b481de9c 3129 u32 status = le32_to_cpu(tx_resp->status);
c8b0e6e1 3130#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3131 int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
3132 struct ieee80211_hdr *hdr;
3133 __le16 *qc;
b481de9c
ZY		 3134#endif
3135
3136 if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
3137 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
3138 "is out of range [0-%d] %d %d\n", txq_id,
fc4b6853
TW		 3139 index, txq->q.n_bd, txq->q.write_ptr,
3140 txq->q.read_ptr);
b481de9c
ZY		 3141 return;
3142 }
3143
c8b0e6e1 3144#ifdef CONFIG_IWL4965_HT
fe01b477
RR		 3145 hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
3146 qc = ieee80211_get_qos_ctrl(hdr);
3147
3148 if (qc)
3149 tid = le16_to_cpu(*qc) & 0xf;
3150
3151 sta_id = iwl4965_get_ra_sta_id(priv, hdr);
3152 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
3153 IWL_ERROR("Station not known\n");
3154 return;
3155 }
3156
b481de9c 3157 if (txq->sched_retry) {
bb8c093b 3158 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
bb8c093b 3159 struct iwl4965_ht_agg *agg = NULL;
b481de9c 3160
fe01b477 3161 if (!qc)
b481de9c 3162 return;
b481de9c
ZY		 3163
3164 agg = &priv->stations[sta_id].tid[tid].agg;
3165
fe01b477
RR		 3166 iwl4965_tx_status_reply_tx(priv, agg,
3167 (struct iwl4965_tx_resp_agg *)tx_resp, index);
b481de9c
ZY		 3168
3169 if ((tx_resp->frame_count == 1) &&
bb8c093b 3170 !iwl4965_is_tx_success(status)) {
b481de9c
ZY		 3171 /* TODO: send BAR */
3172 }
3173
fe01b477
RR		 3174 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
3175 int freed;
c54b679d 3176 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
b481de9c
ZY		 3177 IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
3178 "%d index %d\n", scd_ssn , index);
fe01b477
RR		 3179 freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3180 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3181
3182 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3183 txq_id >= 0 && priv->mac80211_registered &&
3184 agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
3185 ieee80211_wake_queue(priv->hw, txq_id);
3186
3187 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
b481de9c
ZY		 3188 }
3189 } else {
c8b0e6e1 3190#endif /* CONFIG_IWL4965_HT */
fc4b6853 3191 tx_status = &(txq->txb[txq->q.read_ptr].status);
b481de9c
ZY		 3192
3193 tx_status->retry_count = tx_resp->failure_frame;
3194 tx_status->queue_number = status;
3195 tx_status->queue_length = tx_resp->bt_kill_count;
3196 tx_status->queue_length |= tx_resp->failure_rts;
b481de9c 3197 tx_status->flags =
bb8c093b 3198 iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
4c424e4c
RR		 3199 iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
3200 &tx_status->control);
b481de9c 3201
b481de9c 3202 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
bb8c093b 3203 "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
b481de9c
ZY		 3204 status, le32_to_cpu(tx_resp->rate_n_flags),
3205 tx_resp->failure_frame);
3206
3207 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
fe01b477
RR		 3208 if (index != -1) {
3209 int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
3210#ifdef CONFIG_IWL4965_HT
3211 if (tid != MAX_TID_COUNT)
3212 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
3213 if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
3214 (txq_id >= 0) &&
3215 priv->mac80211_registered)
3216 ieee80211_wake_queue(priv->hw, txq_id);
3217 if (tid != MAX_TID_COUNT)
3218 iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
3219#endif
3220 }
c8b0e6e1 3221#ifdef CONFIG_IWL4965_HT
b481de9c 3222 }
c8b0e6e1 3223#endif /* CONFIG_IWL4965_HT */
b481de9c
ZY		 3224
3225 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
3226 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
3227}
3228
3229
c79dd5b5 3230static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
bb8c093b 3231 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3232{
bb8c093b
CH		 3233 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3234 struct iwl4965_alive_resp *palive;
b481de9c
ZY		 3235 struct delayed_work *pwork;
3236
3237 palive = &pkt->u.alive_frame;
3238
3239 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3240 "0x%01X 0x%01X\n",
3241 palive->is_valid, palive->ver_type,
3242 palive->ver_subtype);
3243
3244 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3245 IWL_DEBUG_INFO("Initialization Alive received.\n");
3246 memcpy(&priv->card_alive_init,
3247 &pkt->u.alive_frame,
bb8c093b 3248 sizeof(struct iwl4965_init_alive_resp));
b481de9c
ZY		 3249 pwork = &priv->init_alive_start;
3250 } else {
3251 IWL_DEBUG_INFO("Runtime Alive received.\n");
3252 memcpy(&priv->card_alive, &pkt->u.alive_frame,
bb8c093b 3253 sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 3254 pwork = &priv->alive_start;
3255 }
3256
3257 /* We delay the ALIVE response by 5ms to
3258 * give the HW RF Kill time to activate... */
3259 if (palive->is_valid == UCODE_VALID_OK)
3260 queue_delayed_work(priv->workqueue, pwork,
3261 msecs_to_jiffies(5));
3262 else
3263 IWL_WARNING("uCode did not respond OK.\n");
3264}
3265
c79dd5b5 3266static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
bb8c093b 3267 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3268{
bb8c093b 3269 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3270
3271 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3272 return;
3273}
3274
c79dd5b5 3275static void iwl4965_rx_reply_error(struct iwl_priv *priv,
bb8c093b 3276 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3277{
bb8c093b 3278 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3279
3280 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3281 "seq 0x%04X ser 0x%08X\n",
3282 le32_to_cpu(pkt->u.err_resp.error_type),
3283 get_cmd_string(pkt->u.err_resp.cmd_id),
3284 pkt->u.err_resp.cmd_id,
3285 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3286 le32_to_cpu(pkt->u.err_resp.error_info));
3287}
3288
3289#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3290
c79dd5b5 3291static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3292{
bb8c093b
CH		 3293 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3294 struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
3295 struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
b481de9c
ZY		 3296 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3297 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3298 rxon->channel = csa->channel;
3299 priv->staging_rxon.channel = csa->channel;
3300}
3301
c79dd5b5 3302static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
bb8c093b 3303 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3304{
c8b0e6e1 3305#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
bb8c093b
CH		 3306 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3307 struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
b481de9c
ZY		 3308
3309 if (!report->state) {
3310 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3311 "Spectrum Measure Notification: Start\n");
3312 return;
3313 }
3314
3315 memcpy(&priv->measure_report, report, sizeof(*report));
3316 priv->measurement_status |= MEASUREMENT_READY;
3317#endif
3318}
3319
c79dd5b5 3320static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
bb8c093b 3321 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3322{
0a6857e7 3323#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3324 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3325 struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
b481de9c
ZY		 3326 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3327 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3328#endif
3329}
3330
c79dd5b5 3331static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
bb8c093b 3332 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3333{
bb8c093b 3334 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3335 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3336 "notification for %s:\n",
3337 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
0a6857e7 3338 iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
b481de9c
ZY		 3339}
3340
bb8c093b 3341static void iwl4965_bg_beacon_update(struct work_struct *work)
b481de9c 3342{
c79dd5b5
TW		 3343 struct iwl_priv *priv =
3344 container_of(work, struct iwl_priv, beacon_update);
b481de9c
ZY		 3345 struct sk_buff *beacon;
3346
3347 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
32bfd35d 3348 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
b481de9c
ZY		 3349
3350 if (!beacon) {
3351 IWL_ERROR("update beacon failed\n");
3352 return;
3353 }
3354
3355 mutex_lock(&priv->mutex);
3356 /* new beacon skb is allocated every time; dispose previous.*/
3357 if (priv->ibss_beacon)
3358 dev_kfree_skb(priv->ibss_beacon);
3359
3360 priv->ibss_beacon = beacon;
3361 mutex_unlock(&priv->mutex);
3362
bb8c093b 3363 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 3364}
3365
c79dd5b5 3366static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
bb8c093b 3367 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3368{
0a6857e7 3369#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3370 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3371 struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
3372 u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
b481de9c
ZY		 3373
3374 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3375 "tsf %d %d rate %d\n",
3376 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3377 beacon->beacon_notify_hdr.failure_frame,
3378 le32_to_cpu(beacon->ibss_mgr_status),
3379 le32_to_cpu(beacon->high_tsf),
3380 le32_to_cpu(beacon->low_tsf), rate);
3381#endif
3382
3383 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3384 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3385 queue_work(priv->workqueue, &priv->beacon_update);
3386}
3387
3388/* Service response to REPLY_SCAN_CMD (0x80) */
c79dd5b5 3389static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
bb8c093b 3390 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3391{
0a6857e7 3392#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b
CH		 3393 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3394 struct iwl4965_scanreq_notification *notif =
3395 (struct iwl4965_scanreq_notification *)pkt->u.raw;
b481de9c
ZY		 3396
3397 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3398#endif
3399}
3400
3401/* Service SCAN_START_NOTIFICATION (0x82) */
c79dd5b5 3402static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
bb8c093b 3403 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3404{
bb8c093b
CH		 3405 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3406 struct iwl4965_scanstart_notification *notif =
3407 (struct iwl4965_scanstart_notification *)pkt->u.raw;
b481de9c
ZY		 3408 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3409 IWL_DEBUG_SCAN("Scan start: "
3410 "%d [802.11%s] "
3411 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3412 notif->channel,
3413 notif->band ? "bg" : "a",
3414 notif->tsf_high,
3415 notif->tsf_low, notif->status, notif->beacon_timer);
3416}
3417
3418/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
c79dd5b5 3419static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
bb8c093b 3420 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3421{
bb8c093b
CH		 3422 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3423 struct iwl4965_scanresults_notification *notif =
3424 (struct iwl4965_scanresults_notification *)pkt->u.raw;
b481de9c
ZY		 3425
3426 IWL_DEBUG_SCAN("Scan ch.res: "
3427 "%d [802.11%s] "
3428 "(TSF: 0x%08X:%08X) - %d "
3429 "elapsed=%lu usec (%dms since last)\n",
3430 notif->channel,
3431 notif->band ? "bg" : "a",
3432 le32_to_cpu(notif->tsf_high),
3433 le32_to_cpu(notif->tsf_low),
3434 le32_to_cpu(notif->statistics[0]),
3435 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3436 jiffies_to_msecs(elapsed_jiffies
3437 (priv->last_scan_jiffies, jiffies)));
3438
3439 priv->last_scan_jiffies = jiffies;
7878a5a4 3440 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3441}
3442
3443/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
c79dd5b5 3444static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
bb8c093b 3445 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3446{
bb8c093b
CH		 3447 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
3448 struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
b481de9c
ZY		 3449
3450 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3451 scan_notif->scanned_channels,
3452 scan_notif->tsf_low,
3453 scan_notif->tsf_high, scan_notif->status);
3454
3455 /* The HW is no longer scanning */
3456 clear_bit(STATUS_SCAN_HW, &priv->status);
3457
3458 /* The scan completion notification came in, so kill that timer... */
3459 cancel_delayed_work(&priv->scan_check);
3460
3461 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3462 (priv->scan_bands == 2) ? "2.4" : "5.2",
3463 jiffies_to_msecs(elapsed_jiffies
3464 (priv->scan_pass_start, jiffies)));
3465
3466 /* Remove this scanned band from the list
3467 * of pending bands to scan */
3468 priv->scan_bands--;
3469
3470 /* If a request to abort was given, or the scan did not succeed
3471 * then we reset the scan state machine and terminate,
3472 * re-queuing another scan if one has been requested */
3473 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3474 IWL_DEBUG_INFO("Aborted scan completed.\n");
3475 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3476 } else {
3477 /* If there are more bands on this scan pass reschedule */
3478 if (priv->scan_bands > 0)
3479 goto reschedule;
3480 }
3481
3482 priv->last_scan_jiffies = jiffies;
7878a5a4 3483 priv->next_scan_jiffies = 0;
b481de9c
ZY		 3484 IWL_DEBUG_INFO("Setting scan to off\n");
3485
3486 clear_bit(STATUS_SCANNING, &priv->status);
3487
3488 IWL_DEBUG_INFO("Scan took %dms\n",
3489 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3490
3491 queue_work(priv->workqueue, &priv->scan_completed);
3492
3493 return;
3494
3495reschedule:
3496 priv->scan_pass_start = jiffies;
3497 queue_work(priv->workqueue, &priv->request_scan);
3498}
3499
3500/* Handle notification from uCode that card's power state is changing
3501 * due to software, hardware, or critical temperature RFKILL */
c79dd5b5 3502static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
bb8c093b 3503 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3504{
bb8c093b 3505 struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
b481de9c
ZY		 3506 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3507 unsigned long status = priv->status;
3508
3509 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3510 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3511 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3512
3513 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3514 RF_CARD_DISABLED)) {
3515
bb8c093b 3516 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c
ZY		 3517 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3518
bb8c093b
CH		 3519 if (!iwl4965_grab_nic_access(priv)) {
3520 iwl4965_write_direct32(
b481de9c
ZY		 3521 priv, HBUS_TARG_MBX_C,
3522 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3523
bb8c093b 3524 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3525 }
3526
3527 if (!(flags & RXON_CARD_DISABLED)) {
bb8c093b 3528 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c 3529 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
bb8c093b
CH		 3530 if (!iwl4965_grab_nic_access(priv)) {
3531 iwl4965_write_direct32(
b481de9c
ZY		 3532 priv, HBUS_TARG_MBX_C,
3533 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3534
bb8c093b 3535 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3536 }
3537 }
3538
3539 if (flags & RF_CARD_DISABLED) {
bb8c093b 3540 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
b481de9c 3541 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
bb8c093b
CH		 3542 iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
3543 if (!iwl4965_grab_nic_access(priv))
3544 iwl4965_release_nic_access(priv);
b481de9c
ZY		 3545 }
3546 }
3547
3548 if (flags & HW_CARD_DISABLED)
3549 set_bit(STATUS_RF_KILL_HW, &priv->status);
3550 else
3551 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3552
3553
3554 if (flags & SW_CARD_DISABLED)
3555 set_bit(STATUS_RF_KILL_SW, &priv->status);
3556 else
3557 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3558
3559 if (!(flags & RXON_CARD_DISABLED))
bb8c093b 3560 iwl4965_scan_cancel(priv);
b481de9c
ZY		 3561
3562 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3563 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3564 (test_bit(STATUS_RF_KILL_SW, &status) !=
3565 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3566 queue_work(priv->workqueue, &priv->rf_kill);
3567 else
3568 wake_up_interruptible(&priv->wait_command_queue);
3569}
3570
3571/**
bb8c093b 3572 * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
b481de9c
ZY		 3573 *
3574 * Setup the RX handlers for each of the reply types sent from the uCode
3575 * to the host.
3576 *
3577 * This function chains into the hardware specific files for them to setup
3578 * any hardware specific handlers as well.
3579 */
c79dd5b5 3580static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
b481de9c 3581{
bb8c093b
CH		 3582 priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
3583 priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
3584 priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
3585 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
b481de9c 3586 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
bb8c093b
CH		 3587 iwl4965_rx_spectrum_measure_notif;
3588 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
b481de9c 3589 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
bb8c093b
CH		 3590 iwl4965_rx_pm_debug_statistics_notif;
3591 priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
b481de9c 3592
9fbab516
BC		 3593 /*
3594 * The same handler is used for both the REPLY to a discrete
3595 * statistics request from the host as well as for the periodic
3596 * statistics notifications (after received beacons) from the uCode.
b481de9c 3597 */
bb8c093b
CH		 3598 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
3599 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
b481de9c 3600
bb8c093b
CH		 3601 priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
3602 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
b481de9c 3603 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
bb8c093b 3604 iwl4965_rx_scan_results_notif;
b481de9c 3605 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
bb8c093b
CH		 3606 iwl4965_rx_scan_complete_notif;
3607 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
3608 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
b481de9c 3609
9fbab516 3610 /* Set up hardware specific Rx handlers */
bb8c093b 3611 iwl4965_hw_rx_handler_setup(priv);
b481de9c
ZY		 3612}
3613
3614/**
bb8c093b 3615 * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
b481de9c
ZY		 3616 * @rxb: Rx buffer to reclaim
3617 *
3618 * If an Rx buffer has an async callback associated with it the callback
3619 * will be executed. The attached skb (if present) will only be freed
3620 * if the callback returns 1
3621 */
c79dd5b5 3622static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
bb8c093b 3623 struct iwl4965_rx_mem_buffer *rxb)
b481de9c 3624{
bb8c093b 3625 struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 3626 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3627 int txq_id = SEQ_TO_QUEUE(sequence);
3628 int index = SEQ_TO_INDEX(sequence);
3629 int huge = sequence & SEQ_HUGE_FRAME;
3630 int cmd_index;
857485c0 3631 struct iwl_cmd *cmd;
b481de9c
ZY		 3632
3633 /* If a Tx command is being handled and it isn't in the actual
3634 * command queue then there a command routing bug has been introduced
3635 * in the queue management code. */
3636 if (txq_id != IWL_CMD_QUEUE_NUM)
3637 IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
3638 txq_id, pkt->hdr.cmd);
3639 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3640
3641 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3642 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3643
3644 /* Input error checking is done when commands are added to queue. */
3645 if (cmd->meta.flags & CMD_WANT_SKB) {
3646 cmd->meta.source->u.skb = rxb->skb;
3647 rxb->skb = NULL;
3648 } else if (cmd->meta.u.callback &&
3649 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3650 rxb->skb = NULL;
3651
bb8c093b 3652 iwl4965_tx_queue_reclaim(priv, txq_id, index);
b481de9c
ZY		 3653
3654 if (!(cmd->meta.flags & CMD_ASYNC)) {
3655 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3656 wake_up_interruptible(&priv->wait_command_queue);
3657 }
3658}
3659
3660/************************** RX-FUNCTIONS ****************************/
3661/*
3662 * Rx theory of operation
3663 *
9fbab516
BC		 3664 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
3665 * each of which point to Receive Buffers to be filled by 4965. These get
3666 * used not only for Rx frames, but for any command response or notification
3667 * from the 4965. The driver and 4965 manage the Rx buffers by means
3668 * of indexes into the circular buffer.
b481de9c
ZY		 3669 *
3670 * Rx Queue Indexes
3671 * The host/firmware share two index registers for managing the Rx buffers.
3672 *
3673 * The READ index maps to the first position that the firmware may be writing
3674 * to -- the driver can read up to (but not including) this position and get
3675 * good data.
3676 * The READ index is managed by the firmware once the card is enabled.
3677 *
3678 * The WRITE index maps to the last position the driver has read from -- the
3679 * position preceding WRITE is the last slot the firmware can place a packet.
3680 *
3681 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3682 * WRITE = READ.
3683 *
9fbab516 3684 * During initialization, the host sets up the READ queue position to the first
b481de9c
ZY		 3685 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3686 *
9fbab516 3687 * When the firmware places a packet in a buffer, it will advance the READ index
b481de9c
ZY		 3688 * and fire the RX interrupt. The driver can then query the READ index and
3689 * process as many packets as possible, moving the WRITE index forward as it
3690 * resets the Rx queue buffers with new memory.
3691 *
3692 * The management in the driver is as follows:
3693 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3694 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
01ebd063 3695 * to replenish the iwl->rxq->rx_free.
bb8c093b 3696 * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
b481de9c
ZY		 3697 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3698 * 'processed' and 'read' driver indexes as well)
3699 * + A received packet is processed and handed to the kernel network stack,
3700 * detached from the iwl->rxq. The driver 'processed' index is updated.
3701 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3702 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3703 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3704 * were enough free buffers and RX_STALLED is set it is cleared.
3705 *
3706 *
3707 * Driver sequence:
3708 *
9fbab516
BC		 3709 * iwl4965_rx_queue_alloc() Allocates rx_free
3710 * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
bb8c093b 3711 * iwl4965_rx_queue_restock
9fbab516 3712 * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
b481de9c
ZY		 3713 * queue, updates firmware pointers, and updates
3714 * the WRITE index. If insufficient rx_free buffers
bb8c093b 3715 * are available, schedules iwl4965_rx_replenish
b481de9c
ZY		 3716 *
3717 * -- enable interrupts --
9fbab516 3718 * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
b481de9c
ZY		 3719 * READ INDEX, detaching the SKB from the pool.
3720 * Moves the packet buffer from queue to rx_used.
bb8c093b 3721 * Calls iwl4965_rx_queue_restock to refill any empty
b481de9c
ZY		 3722 * slots.
3723 * ...
3724 *
3725 */
3726
3727/**
bb8c093b 3728 * iwl4965_rx_queue_space - Return number of free slots available in queue.
b481de9c 3729 */
bb8c093b 3730static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
b481de9c
ZY		 3731{
3732 int s = q->read - q->write;
3733 if (s <= 0)
3734 s += RX_QUEUE_SIZE;
3735 /* keep some buffer to not confuse full and empty queue */
3736 s -= 2;
3737 if (s < 0)
3738 s = 0;
3739 return s;
3740}
3741
3742/**
bb8c093b 3743 * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
b481de9c 3744 */
c79dd5b5 3745int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
b481de9c
ZY		 3746{
3747 u32 reg = 0;
3748 int rc = 0;
3749 unsigned long flags;
3750
3751 spin_lock_irqsave(&q->lock, flags);
3752
3753 if (q->need_update == 0)
3754 goto exit_unlock;
3755
6440adb5 3756 /* If power-saving is in use, make sure device is awake */
b481de9c 3757 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
bb8c093b 3758 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 3759
3760 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
bb8c093b 3761 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 3762 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3763 goto exit_unlock;
3764 }
3765
bb8c093b 3766 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 3767 if (rc)
3768 goto exit_unlock;
3769
6440adb5 3770 /* Device expects a multiple of 8 */
bb8c093b 3771 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
b481de9c 3772 q->write & ~0x7);
bb8c093b 3773 iwl4965_release_nic_access(priv);
6440adb5
BC		 3774
3775 /* Else device is assumed to be awake */
b481de9c 3776 } else
6440adb5 3777 /* Device expects a multiple of 8 */
bb8c093b 3778 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
b481de9c
ZY		 3779
3780
3781 q->need_update = 0;
3782
3783 exit_unlock:
3784 spin_unlock_irqrestore(&q->lock, flags);
3785 return rc;
3786}
3787
3788/**
9fbab516 3789 * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
b481de9c 3790 */
c79dd5b5 3791static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
b481de9c
ZY		 3792 dma_addr_t dma_addr)
3793{
3794 return cpu_to_le32((u32)(dma_addr >> 8));
3795}
3796
3797
3798/**
bb8c093b 3799 * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
b481de9c 3800 *
9fbab516 3801 * If there are slots in the RX queue that need to be restocked,
b481de9c 3802 * and we have free pre-allocated buffers, fill the ranks as much
9fbab516 3803 * as we can, pulling from rx_free.
b481de9c
ZY		 3804 *
3805 * This moves the 'write' index forward to catch up with 'processed', and
3806 * also updates the memory address in the firmware to reference the new
3807 * target buffer.
3808 */
c79dd5b5 3809static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
b481de9c 3810{
bb8c093b 3811 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3812 struct list_head *element;
bb8c093b 3813 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3814 unsigned long flags;
3815 int write, rc;
3816
3817 spin_lock_irqsave(&rxq->lock, flags);
3818 write = rxq->write & ~0x7;
bb8c093b 3819 while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
6440adb5 3820 /* Get next free Rx buffer, remove from free list */
b481de9c 3821 element = rxq->rx_free.next;
bb8c093b 3822 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
b481de9c 3823 list_del(element);
6440adb5
BC		 3824
3825 /* Point to Rx buffer via next RBD in circular buffer */
bb8c093b 3826 rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
b481de9c
ZY		 3827 rxq->queue[rxq->write] = rxb;
3828 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3829 rxq->free_count--;
3830 }
3831 spin_unlock_irqrestore(&rxq->lock, flags);
3832 /* If the pre-allocated buffer pool is dropping low, schedule to
3833 * refill it */
3834 if (rxq->free_count <= RX_LOW_WATERMARK)
3835 queue_work(priv->workqueue, &priv->rx_replenish);
3836
3837
6440adb5
BC		 3838 /* If we've added more space for the firmware to place data, tell it.
3839 * Increment device's write pointer in multiples of 8. */
b481de9c
ZY		 3840 if ((write != (rxq->write & ~0x7))
3841 || (abs(rxq->write - rxq->read) > 7)) {
3842 spin_lock_irqsave(&rxq->lock, flags);
3843 rxq->need_update = 1;
3844 spin_unlock_irqrestore(&rxq->lock, flags);
bb8c093b 3845 rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
b481de9c
ZY		 3846 if (rc)
3847 return rc;
3848 }
3849
3850 return 0;
3851}
3852
3853/**
bb8c093b 3854 * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
b481de9c
ZY		 3855 *
3856 * When moving to rx_free an SKB is allocated for the slot.
3857 *
bb8c093b 3858 * Also restock the Rx queue via iwl4965_rx_queue_restock.
01ebd063 3859 * This is called as a scheduled work item (except for during initialization)
b481de9c 3860 */
c79dd5b5 3861static void iwl4965_rx_allocate(struct iwl_priv *priv)
b481de9c 3862{
bb8c093b 3863 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c 3864 struct list_head *element;
bb8c093b 3865 struct iwl4965_rx_mem_buffer *rxb;
b481de9c
ZY		 3866 unsigned long flags;
3867 spin_lock_irqsave(&rxq->lock, flags);
3868 while (!list_empty(&rxq->rx_used)) {
3869 element = rxq->rx_used.next;
bb8c093b 3870 rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
6440adb5
BC		 3871
3872 /* Alloc a new receive buffer */
b481de9c 3873 rxb->skb =
9ee1ba47
RR		 3874 alloc_skb(priv->hw_setting.rx_buf_size,
3875 __GFP_NOWARN | GFP_ATOMIC);
b481de9c
ZY		 3876 if (!rxb->skb) {
3877 if (net_ratelimit())
3878 printk(KERN_CRIT DRV_NAME
3879 ": Can not allocate SKB buffers\n");
3880 /* We don't reschedule replenish work here -- we will
3881 * call the restock method and if it still needs
3882 * more buffers it will schedule replenish */
3883 break;
3884 }
3885 priv->alloc_rxb_skb++;
3886 list_del(element);
6440adb5
BC		 3887
3888 /* Get physical address of RB/SKB */
b481de9c
ZY		 3889 rxb->dma_addr =
3890 pci_map_single(priv->pci_dev, rxb->skb->data,
9ee1ba47 3891 priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3892 list_add_tail(&rxb->list, &rxq->rx_free);
3893 rxq->free_count++;
3894 }
3895 spin_unlock_irqrestore(&rxq->lock, flags);
5c0eef96
MA		 3896}
3897
3898/*
3899 * this should be called while priv->lock is locked
3900*/
4fd1f841 3901static void __iwl4965_rx_replenish(void *data)
5c0eef96 3902{
c79dd5b5 3903 struct iwl_priv *priv = data;
5c0eef96
MA		 3904
3905 iwl4965_rx_allocate(priv);
3906 iwl4965_rx_queue_restock(priv);
3907}
3908
3909
3910void iwl4965_rx_replenish(void *data)
3911{
c79dd5b5 3912 struct iwl_priv *priv = data;
5c0eef96
MA		 3913 unsigned long flags;
3914
3915 iwl4965_rx_allocate(priv);
b481de9c
ZY		 3916
3917 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 3918 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 3919 spin_unlock_irqrestore(&priv->lock, flags);
3920}
3921
3922/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
9fbab516 3923 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
b481de9c
ZY		 3924 * This free routine walks the list of POOL entries and if SKB is set to
3925 * non NULL it is unmapped and freed
3926 */
c79dd5b5 3927static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3928{
3929 int i;
3930 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3931 if (rxq->pool[i].skb != NULL) {
3932 pci_unmap_single(priv->pci_dev,
3933 rxq->pool[i].dma_addr,
9ee1ba47
RR		 3934 priv->hw_setting.rx_buf_size,
3935 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3936 dev_kfree_skb(rxq->pool[i].skb);
3937 }
3938 }
3939
3940 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3941 rxq->dma_addr);
3942 rxq->bd = NULL;
3943}
3944
c79dd5b5 3945int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
b481de9c 3946{
bb8c093b 3947 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 3948 struct pci_dev *dev = priv->pci_dev;
3949 int i;
3950
3951 spin_lock_init(&rxq->lock);
3952 INIT_LIST_HEAD(&rxq->rx_free);
3953 INIT_LIST_HEAD(&rxq->rx_used);
6440adb5
BC		 3954
3955 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
b481de9c
ZY		 3956 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3957 if (!rxq->bd)
3958 return -ENOMEM;
6440adb5 3959
b481de9c
ZY		 3960 /* Fill the rx_used queue with _all_ of the Rx buffers */
3961 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3962 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
6440adb5 3963
b481de9c
ZY		 3964 /* Set us so that we have processed and used all buffers, but have
3965 * not restocked the Rx queue with fresh buffers */
3966 rxq->read = rxq->write = 0;
3967 rxq->free_count = 0;
3968 rxq->need_update = 0;
3969 return 0;
3970}
3971
c79dd5b5 3972void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
b481de9c
ZY		 3973{
3974 unsigned long flags;
3975 int i;
3976 spin_lock_irqsave(&rxq->lock, flags);
3977 INIT_LIST_HEAD(&rxq->rx_free);
3978 INIT_LIST_HEAD(&rxq->rx_used);
3979 /* Fill the rx_used queue with _all_ of the Rx buffers */
3980 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3981 /* In the reset function, these buffers may have been allocated
3982 * to an SKB, so we need to unmap and free potential storage */
3983 if (rxq->pool[i].skb != NULL) {
3984 pci_unmap_single(priv->pci_dev,
3985 rxq->pool[i].dma_addr,
9ee1ba47
RR		 3986 priv->hw_setting.rx_buf_size,
3987 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 3988 priv->alloc_rxb_skb--;
3989 dev_kfree_skb(rxq->pool[i].skb);
3990 rxq->pool[i].skb = NULL;
3991 }
3992 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3993 }
3994
3995 /* Set us so that we have processed and used all buffers, but have
3996 * not restocked the Rx queue with fresh buffers */
3997 rxq->read = rxq->write = 0;
3998 rxq->free_count = 0;
3999 spin_unlock_irqrestore(&rxq->lock, flags);
4000}
4001
4002/* Convert linear signal-to-noise ratio into dB */
4003static u8 ratio2dB[100] = {
4004/* 0 1 2 3 4 5 6 7 8 9 */
4005 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
4006 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
4007 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
4008 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
4009 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
4010 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
4011 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
4012 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
4013 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
4014 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
4015};
4016
4017/* Calculates a relative dB value from a ratio of linear
4018 * (i.e. not dB) signal levels.
4019 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
bb8c093b 4020int iwl4965_calc_db_from_ratio(int sig_ratio)
b481de9c 4021{
c899a575
AB		 4022 /* 1000:1 or higher just report as 60 dB */
4023 if (sig_ratio >= 1000)
b481de9c
ZY		 4024 return 60;
4025
c899a575 4026 /* 100:1 or higher, divide by 10 and use table,
b481de9c 4027 * add 20 dB to make up for divide by 10 */
c899a575 4028 if (sig_ratio >= 100)
b481de9c
ZY		 4029 return (20 + (int)ratio2dB[sig_ratio/10]);
4030
4031 /* We shouldn't see this */
4032 if (sig_ratio < 1)
4033 return 0;
4034
4035 /* Use table for ratios 1:1 - 99:1 */
4036 return (int)ratio2dB[sig_ratio];
4037}
4038
4039#define PERFECT_RSSI (-20) /* dBm */
4040#define WORST_RSSI (-95) /* dBm */
4041#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
4042
4043/* Calculate an indication of rx signal quality (a percentage, not dBm!).
4044 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
4045 * about formulas used below. */
bb8c093b 4046int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
b481de9c
ZY		 4047{
4048 int sig_qual;
4049 int degradation = PERFECT_RSSI - rssi_dbm;
4050
4051 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
4052 * as indicator; formula is (signal dbm - noise dbm).
4053 * SNR at or above 40 is a great signal (100%).
4054 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
4055 * Weakest usable signal is usually 10 - 15 dB SNR. */
4056 if (noise_dbm) {
4057 if (rssi_dbm - noise_dbm >= 40)
4058 return 100;
4059 else if (rssi_dbm < noise_dbm)
4060 return 0;
4061 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
4062
4063 /* Else use just the signal level.
4064 * This formula is a least squares fit of data points collected and
4065 * compared with a reference system that had a percentage (%) display
4066 * for signal quality. */
4067 } else
4068 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
4069 (15 * RSSI_RANGE + 62 * degradation)) /
4070 (RSSI_RANGE * RSSI_RANGE);
4071
4072 if (sig_qual > 100)
4073 sig_qual = 100;
4074 else if (sig_qual < 1)
4075 sig_qual = 0;
4076
4077 return sig_qual;
4078}
4079
4080/**
9fbab516 4081 * iwl4965_rx_handle - Main entry function for receiving responses from uCode
b481de9c
ZY		 4082 *
4083 * Uses the priv->rx_handlers callback function array to invoke
4084 * the appropriate handlers, including command responses,
4085 * frame-received notifications, and other notifications.
4086 */
c79dd5b5 4087static void iwl4965_rx_handle(struct iwl_priv *priv)
b481de9c 4088{
bb8c093b
CH		 4089 struct iwl4965_rx_mem_buffer *rxb;
4090 struct iwl4965_rx_packet *pkt;
4091 struct iwl4965_rx_queue *rxq = &priv->rxq;
b481de9c
ZY		 4092 u32 r, i;
4093 int reclaim;
4094 unsigned long flags;
5c0eef96 4095 u8 fill_rx = 0;
d68ab680 4096 u32 count = 8;
b481de9c 4097
6440adb5
BC		 4098 /* uCode's read index (stored in shared DRAM) indicates the last Rx
4099 * buffer that the driver may process (last buffer filled by ucode). */
bb8c093b 4100 r = iwl4965_hw_get_rx_read(priv);
b481de9c
ZY		 4101 i = rxq->read;
4102
4103 /* Rx interrupt, but nothing sent from uCode */
4104 if (i == r)
4105 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
4106
5c0eef96
MA		 4107 if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
4108 fill_rx = 1;
4109
b481de9c
ZY		 4110 while (i != r) {
4111 rxb = rxq->queue[i];
4112
9fbab516 4113 /* If an RXB doesn't have a Rx queue slot associated with it,
b481de9c
ZY		 4114 * then a bug has been introduced in the queue refilling
4115 * routines -- catch it here */
4116 BUG_ON(rxb == NULL);
4117
4118 rxq->queue[i] = NULL;
4119
4120 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
9ee1ba47 4121 priv->hw_setting.rx_buf_size,
b481de9c 4122 PCI_DMA_FROMDEVICE);
bb8c093b 4123 pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
b481de9c
ZY		 4124
4125 /* Reclaim a command buffer only if this packet is a response
4126 * to a (driver-originated) command.
4127 * If the packet (e.g. Rx frame) originated from uCode,
4128 * there is no command buffer to reclaim.
4129 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4130 * but apparently a few don't get set; catch them here. */
4131 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4132 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
857485c0 4133 (pkt->hdr.cmd != REPLY_RX) &&
cfe01709 4134 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
b481de9c
ZY		 4135 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4136 (pkt->hdr.cmd != REPLY_TX);
4137
4138 /* Based on type of command response or notification,
4139 * handle those that need handling via function in
bb8c093b 4140 * rx_handlers table. See iwl4965_setup_rx_handlers() */
b481de9c
ZY		 4141 if (priv->rx_handlers[pkt->hdr.cmd]) {
4142 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4143 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4144 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4145 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4146 } else {
4147 /* No handling needed */
4148 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4149 "r %d i %d No handler needed for %s, 0x%02x\n",
4150 r, i, get_cmd_string(pkt->hdr.cmd),
4151 pkt->hdr.cmd);
4152 }
4153
4154 if (reclaim) {
9fbab516 4155 /* Invoke any callbacks, transfer the skb to caller, and
857485c0 4156 * fire off the (possibly) blocking iwl_send_cmd()
b481de9c
ZY		 4157 * as we reclaim the driver command queue */
4158 if (rxb && rxb->skb)
bb8c093b 4159 iwl4965_tx_cmd_complete(priv, rxb);
b481de9c
ZY		 4160 else
4161 IWL_WARNING("Claim null rxb?\n");
4162 }
4163
4164 /* For now we just don't re-use anything. We can tweak this
4165 * later to try and re-use notification packets and SKBs that
4166 * fail to Rx correctly */
4167 if (rxb->skb != NULL) {
4168 priv->alloc_rxb_skb--;
4169 dev_kfree_skb_any(rxb->skb);
4170 rxb->skb = NULL;
4171 }
4172
4173 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
9ee1ba47
RR		 4174 priv->hw_setting.rx_buf_size,
4175 PCI_DMA_FROMDEVICE);
b481de9c
ZY		 4176 spin_lock_irqsave(&rxq->lock, flags);
4177 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4178 spin_unlock_irqrestore(&rxq->lock, flags);
4179 i = (i + 1) & RX_QUEUE_MASK;
5c0eef96
MA		 4180 /* If there are a lot of unused frames,
4181 * restock the Rx queue so ucode wont assert. */
4182 if (fill_rx) {
4183 count++;
4184 if (count >= 8) {
4185 priv->rxq.read = i;
4186 __iwl4965_rx_replenish(priv);
4187 count = 0;
4188 }
4189 }
b481de9c
ZY		 4190 }
4191
4192 /* Backtrack one entry */
4193 priv->rxq.read = i;
bb8c093b 4194 iwl4965_rx_queue_restock(priv);
b481de9c
ZY		 4195}
4196
6440adb5
BC		 4197/**
4198 * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
4199 */
c79dd5b5 4200static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
bb8c093b 4201 struct iwl4965_tx_queue *txq)
b481de9c
ZY		 4202{
4203 u32 reg = 0;
4204 int rc = 0;
4205 int txq_id = txq->q.id;
4206
4207 if (txq->need_update == 0)
4208 return rc;
4209
4210 /* if we're trying to save power */
4211 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4212 /* wake up nic if it's powered down ...
4213 * uCode will wake up, and interrupt us again, so next
4214 * time we'll skip this part. */
bb8c093b 4215 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
b481de9c
ZY		 4216
4217 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4218 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
bb8c093b 4219 iwl4965_set_bit(priv, CSR_GP_CNTRL,
b481de9c
ZY		 4220 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4221 return rc;
4222 }
4223
4224 /* restore this queue's parameters in nic hardware. */
bb8c093b 4225 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4226 if (rc)
4227 return rc;
bb8c093b 4228 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
fc4b6853 4229 txq->q.write_ptr | (txq_id << 8));
bb8c093b 4230 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4231
4232 /* else not in power-save mode, uCode will never sleep when we're
4233 * trying to tx (during RFKILL, we're not trying to tx). */
4234 } else
bb8c093b 4235 iwl4965_write32(priv, HBUS_TARG_WRPTR,
fc4b6853 4236 txq->q.write_ptr | (txq_id << 8));
b481de9c
ZY		 4237
4238 txq->need_update = 0;
4239
4240 return rc;
4241}
4242
0a6857e7 4243#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 4244static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
b481de9c 4245{
0795af57
JP		 4246 DECLARE_MAC_BUF(mac);
4247
b481de9c 4248 IWL_DEBUG_RADIO("RX CONFIG:\n");
0a6857e7 4249 iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
b481de9c
ZY		 4250 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4251 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4252 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4253 le32_to_cpu(rxon->filter_flags));
4254 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4255 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4256 rxon->ofdm_basic_rates);
4257 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
0795af57
JP		 4258 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4259 print_mac(mac, rxon->node_addr));
4260 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4261 print_mac(mac, rxon->bssid_addr));
b481de9c
ZY		 4262 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4263}
4264#endif
4265
c79dd5b5 4266static void iwl4965_enable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4267{
4268 IWL_DEBUG_ISR("Enabling interrupts\n");
4269 set_bit(STATUS_INT_ENABLED, &priv->status);
bb8c093b 4270 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
b481de9c
ZY		 4271}
4272
c79dd5b5 4273static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
b481de9c
ZY		 4274{
4275 clear_bit(STATUS_INT_ENABLED, &priv->status);
4276
4277 /* disable interrupts from uCode/NIC to host */
bb8c093b 4278 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4279
4280 /* acknowledge/clear/reset any interrupts still pending
4281 * from uCode or flow handler (Rx/Tx DMA) */
bb8c093b
CH		 4282 iwl4965_write32(priv, CSR_INT, 0xffffffff);
4283 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
b481de9c
ZY		 4284 IWL_DEBUG_ISR("Disabled interrupts\n");
4285}
4286
4287static const char *desc_lookup(int i)
4288{
4289 switch (i) {
4290 case 1:
4291 return "FAIL";
4292 case 2:
4293 return "BAD_PARAM";
4294 case 3:
4295 return "BAD_CHECKSUM";
4296 case 4:
4297 return "NMI_INTERRUPT";
4298 case 5:
4299 return "SYSASSERT";
4300 case 6:
4301 return "FATAL_ERROR";
4302 }
4303
4304 return "UNKNOWN";
4305}
4306
4307#define ERROR_START_OFFSET (1 * sizeof(u32))
4308#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4309
c79dd5b5 4310static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
b481de9c
ZY		 4311{
4312 u32 data2, line;
4313 u32 desc, time, count, base, data1;
4314 u32 blink1, blink2, ilink1, ilink2;
4315 int rc;
4316
4317 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4318
bb8c093b 4319 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4320 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4321 return;
4322 }
4323
bb8c093b 4324 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4325 if (rc) {
4326 IWL_WARNING("Can not read from adapter at this time.\n");
4327 return;
4328 }
4329
bb8c093b 4330 count = iwl4965_read_targ_mem(priv, base);
b481de9c
ZY		 4331
4332 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4333 IWL_ERROR("Start IWL Error Log Dump:\n");
2acae16e 4334 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
b481de9c
ZY		 4335 }
4336
bb8c093b
CH		 4337 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
4338 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
4339 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
4340 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
4341 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
4342 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
4343 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
4344 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
4345 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
b481de9c
ZY		 4346
4347 IWL_ERROR("Desc Time "
4348 "data1 data2 line\n");
4349 IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
4350 desc_lookup(desc), desc, time, data1, data2, line);
4351 IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
4352 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4353 ilink1, ilink2);
4354
bb8c093b 4355 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4356}
4357
4358#define EVENT_START_OFFSET (4 * sizeof(u32))
4359
4360/**
bb8c093b 4361 * iwl4965_print_event_log - Dump error event log to syslog
b481de9c 4362 *
bb8c093b 4363 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
b481de9c 4364 */
c79dd5b5 4365static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
b481de9c
ZY		 4366 u32 num_events, u32 mode)
4367{
4368 u32 i;
4369 u32 base; /* SRAM byte address of event log header */
4370 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4371 u32 ptr; /* SRAM byte address of log data */
4372 u32 ev, time, data; /* event log data */
4373
4374 if (num_events == 0)
4375 return;
4376
4377 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4378
4379 if (mode == 0)
4380 event_size = 2 * sizeof(u32);
4381 else
4382 event_size = 3 * sizeof(u32);
4383
4384 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4385
4386 /* "time" is actually "data" for mode 0 (no timestamp).
4387 * place event id # at far right for easier visual parsing. */
4388 for (i = 0; i < num_events; i++) {
bb8c093b 4389 ev = iwl4965_read_targ_mem(priv, ptr);
b481de9c 4390 ptr += sizeof(u32);
bb8c093b 4391 time = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4392 ptr += sizeof(u32);
4393 if (mode == 0)
4394 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4395 else {
bb8c093b 4396 data = iwl4965_read_targ_mem(priv, ptr);
b481de9c
ZY		 4397 ptr += sizeof(u32);
4398 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4399 }
4400 }
4401}
4402
c79dd5b5 4403static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
b481de9c
ZY		 4404{
4405 int rc;
4406 u32 base; /* SRAM byte address of event log header */
4407 u32 capacity; /* event log capacity in # entries */
4408 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4409 u32 num_wraps; /* # times uCode wrapped to top of log */
4410 u32 next_entry; /* index of next entry to be written by uCode */
4411 u32 size; /* # entries that we'll print */
4412
4413 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
bb8c093b 4414 if (!iwl4965_hw_valid_rtc_data_addr(base)) {
b481de9c
ZY		 4415 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4416 return;
4417 }
4418
bb8c093b 4419 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 4420 if (rc) {
4421 IWL_WARNING("Can not read from adapter at this time.\n");
4422 return;
4423 }
4424
4425 /* event log header */
bb8c093b
CH		 4426 capacity = iwl4965_read_targ_mem(priv, base);
4427 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
4428 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
4429 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
b481de9c
ZY		 4430
4431 size = num_wraps ? capacity : next_entry;
4432
4433 /* bail out if nothing in log */
4434 if (size == 0) {
583fab37 4435 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
bb8c093b 4436 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4437 return;
4438 }
4439
583fab37 4440 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
b481de9c
ZY		 4441 size, num_wraps);
4442
4443 /* if uCode has wrapped back to top of log, start at the oldest entry,
4444 * i.e the next one that uCode would fill. */
4445 if (num_wraps)
bb8c093b 4446 iwl4965_print_event_log(priv, next_entry,
b481de9c
ZY		 4447 capacity - next_entry, mode);
4448
4449 /* (then/else) start at top of log */
bb8c093b 4450 iwl4965_print_event_log(priv, 0, next_entry, mode);
b481de9c 4451
bb8c093b 4452 iwl4965_release_nic_access(priv);
b481de9c
ZY		 4453}
4454
4455/**
bb8c093b 4456 * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
b481de9c 4457 */
c79dd5b5 4458static void iwl4965_irq_handle_error(struct iwl_priv *priv)
b481de9c 4459{
bb8c093b 4460 /* Set the FW error flag -- cleared on iwl4965_down */
b481de9c
ZY		 4461 set_bit(STATUS_FW_ERROR, &priv->status);
4462
4463 /* Cancel currently queued command. */
4464 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4465
0a6857e7
TW		 4466#ifdef CONFIG_IWLWIFI_DEBUG
4467 if (iwl_debug_level & IWL_DL_FW_ERRORS) {
bb8c093b
CH		 4468 iwl4965_dump_nic_error_log(priv);
4469 iwl4965_dump_nic_event_log(priv);
4470 iwl4965_print_rx_config_cmd(&priv->staging_rxon);
b481de9c
ZY		 4471 }
4472#endif
4473
4474 wake_up_interruptible(&priv->wait_command_queue);
4475
4476 /* Keep the restart process from trying to send host
4477 * commands by clearing the INIT status bit */
4478 clear_bit(STATUS_READY, &priv->status);
4479
4480 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4481 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4482 "Restarting adapter due to uCode error.\n");
4483
bb8c093b 4484 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 4485 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4486 sizeof(priv->recovery_rxon));
4487 priv->error_recovering = 1;
4488 }
4489 queue_work(priv->workqueue, &priv->restart);
4490 }
4491}
4492
c79dd5b5 4493static void iwl4965_error_recovery(struct iwl_priv *priv)
b481de9c
ZY		 4494{
4495 unsigned long flags;
4496
4497 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4498 sizeof(priv->staging_rxon));
4499 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 4500 iwl4965_commit_rxon(priv);
b481de9c 4501
bb8c093b 4502 iwl4965_rxon_add_station(priv, priv->bssid, 1);
b481de9c
ZY		 4503
4504 spin_lock_irqsave(&priv->lock, flags);
4505 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4506 priv->error_recovering = 0;
4507 spin_unlock_irqrestore(&priv->lock, flags);
4508}
4509
c79dd5b5 4510static void iwl4965_irq_tasklet(struct iwl_priv *priv)
b481de9c
ZY		 4511{
4512 u32 inta, handled = 0;
4513 u32 inta_fh;
4514 unsigned long flags;
0a6857e7 4515#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 4516 u32 inta_mask;
4517#endif
4518
4519 spin_lock_irqsave(&priv->lock, flags);
4520
4521 /* Ack/clear/reset pending uCode interrupts.
4522 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4523 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
bb8c093b
CH		 4524 inta = iwl4965_read32(priv, CSR_INT);
4525 iwl4965_write32(priv, CSR_INT, inta);
b481de9c
ZY		 4526
4527 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4528 * Any new interrupts that happen after this, either while we're
4529 * in this tasklet, or later, will show up in next ISR/tasklet. */
bb8c093b
CH		 4530 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
4531 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
b481de9c 4532
0a6857e7
TW		 4533#ifdef CONFIG_IWLWIFI_DEBUG
4534 if (iwl_debug_level & IWL_DL_ISR) {
9fbab516
BC		 4535 /* just for debug */
4536 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
b481de9c
ZY		 4537 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4538 inta, inta_mask, inta_fh);
4539 }
4540#endif
4541
4542 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4543 * atomic, make sure that inta covers all the interrupts that
4544 * we've discovered, even if FH interrupt came in just after
4545 * reading CSR_INT. */
6f83eaa1 4546 if (inta_fh & CSR49_FH_INT_RX_MASK)
b481de9c 4547 inta |= CSR_INT_BIT_FH_RX;
6f83eaa1 4548 if (inta_fh & CSR49_FH_INT_TX_MASK)
b481de9c
ZY		 4549 inta |= CSR_INT_BIT_FH_TX;
4550
4551 /* Now service all interrupt bits discovered above. */
4552 if (inta & CSR_INT_BIT_HW_ERR) {
4553 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4554
4555 /* Tell the device to stop sending interrupts */
bb8c093b 4556 iwl4965_disable_interrupts(priv);
b481de9c 4557
bb8c093b 4558 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4559
4560 handled |= CSR_INT_BIT_HW_ERR;
4561
4562 spin_unlock_irqrestore(&priv->lock, flags);
4563
4564 return;
4565 }
4566
0a6857e7
TW		 4567#ifdef CONFIG_IWLWIFI_DEBUG
4568 if (iwl_debug_level & (IWL_DL_ISR)) {
b481de9c 4569 /* NIC fires this, but we don't use it, redundant with WAKEUP */
25c03d8e
JP		 4570 if (inta & CSR_INT_BIT_SCD)
4571 IWL_DEBUG_ISR("Scheduler finished to transmit "
4572 "the frame/frames.\n");
b481de9c
ZY		 4573
4574 /* Alive notification via Rx interrupt will do the real work */
4575 if (inta & CSR_INT_BIT_ALIVE)
4576 IWL_DEBUG_ISR("Alive interrupt\n");
4577 }
4578#endif
4579 /* Safely ignore these bits for debug checks below */
25c03d8e 4580 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
b481de9c 4581
9fbab516 4582 /* HW RF KILL switch toggled */
b481de9c
ZY		 4583 if (inta & CSR_INT_BIT_RF_KILL) {
4584 int hw_rf_kill = 0;
bb8c093b 4585 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
b481de9c
ZY		 4586 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4587 hw_rf_kill = 1;
4588
4589 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4590 "RF_KILL bit toggled to %s.\n",
4591 hw_rf_kill ? "disable radio":"enable radio");
4592
4593 /* Queue restart only if RF_KILL switch was set to "kill"
4594 * when we loaded driver, and is now set to "enable".
4595 * After we're Alive, RF_KILL gets handled by
3230455d 4596 * iwl4965_rx_card_state_notif() */
53e49093
ZY		 4597 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4598 clear_bit(STATUS_RF_KILL_HW, &priv->status);
b481de9c 4599 queue_work(priv->workqueue, &priv->restart);
53e49093 4600 }
b481de9c
ZY		 4601
4602 handled |= CSR_INT_BIT_RF_KILL;
4603 }
4604
9fbab516 4605 /* Chip got too hot and stopped itself */
b481de9c
ZY		 4606 if (inta & CSR_INT_BIT_CT_KILL) {
4607 IWL_ERROR("Microcode CT kill error detected.\n");
4608 handled |= CSR_INT_BIT_CT_KILL;
4609 }
4610
4611 /* Error detected by uCode */
4612 if (inta & CSR_INT_BIT_SW_ERR) {
4613 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4614 inta);
bb8c093b 4615 iwl4965_irq_handle_error(priv);
b481de9c
ZY		 4616 handled |= CSR_INT_BIT_SW_ERR;
4617 }
4618
4619 /* uCode wakes up after power-down sleep */
4620 if (inta & CSR_INT_BIT_WAKEUP) {
4621 IWL_DEBUG_ISR("Wakeup interrupt\n");
bb8c093b
CH		 4622 iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
4623 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4624 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4625 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4626 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4627 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4628 iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
b481de9c
ZY		 4629
4630 handled |= CSR_INT_BIT_WAKEUP;
4631 }
4632
4633 /* All uCode command responses, including Tx command responses,
4634 * Rx "responses" (frame-received notification), and other
4635 * notifications from uCode come through here*/
4636 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
bb8c093b 4637 iwl4965_rx_handle(priv);
b481de9c
ZY		 4638 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4639 }
4640
4641 if (inta & CSR_INT_BIT_FH_TX) {
4642 IWL_DEBUG_ISR("Tx interrupt\n");
4643 handled |= CSR_INT_BIT_FH_TX;
4644 }
4645
4646 if (inta & ~handled)
4647 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4648
4649 if (inta & ~CSR_INI_SET_MASK) {
4650 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4651 inta & ~CSR_INI_SET_MASK);
4652 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4653 }
4654
4655 /* Re-enable all interrupts */
bb8c093b 4656 iwl4965_enable_interrupts(priv);
b481de9c 4657
0a6857e7
TW		 4658#ifdef CONFIG_IWLWIFI_DEBUG
4659 if (iwl_debug_level & (IWL_DL_ISR)) {
bb8c093b
CH		 4660 inta = iwl4965_read32(priv, CSR_INT);
4661 inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
4662 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4663 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4664 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4665 }
4666#endif
4667 spin_unlock_irqrestore(&priv->lock, flags);
4668}
4669
bb8c093b 4670static irqreturn_t iwl4965_isr(int irq, void *data)
b481de9c 4671{
c79dd5b5 4672 struct iwl_priv *priv = data;
b481de9c
ZY		 4673 u32 inta, inta_mask;
4674 u32 inta_fh;
4675 if (!priv)
4676 return IRQ_NONE;
4677
4678 spin_lock(&priv->lock);
4679
4680 /* Disable (but don't clear!) interrupts here to avoid
4681 * back-to-back ISRs and sporadic interrupts from our NIC.
4682 * If we have something to service, the tasklet will re-enable ints.
4683 * If we *don't* have something, we'll re-enable before leaving here. */
bb8c093b
CH		 4684 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
4685 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
b481de9c
ZY		 4686
4687 /* Discover which interrupts are active/pending */
bb8c093b
CH		 4688 inta = iwl4965_read32(priv, CSR_INT);
4689 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
b481de9c
ZY		 4690
4691 /* Ignore interrupt if there's nothing in NIC to service.
4692 * This may be due to IRQ shared with another device,
4693 * or due to sporadic interrupts thrown from our NIC. */
4694 if (!inta && !inta_fh) {
4695 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4696 goto none;
4697 }
4698
4699 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
66fbb541
ON		 4700 /* Hardware disappeared. It might have already raised
4701 * an interrupt */
b481de9c 4702 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
66fbb541 4703 goto unplugged;
b481de9c
ZY		 4704 }
4705
4706 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4707 inta, inta_mask, inta_fh);
4708
25c03d8e
JP		 4709 inta &= ~CSR_INT_BIT_SCD;
4710
bb8c093b 4711 /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
25c03d8e
JP		 4712 if (likely(inta || inta_fh))
4713 tasklet_schedule(&priv->irq_tasklet);
b481de9c 4714
66fbb541
ON		 4715 unplugged:
4716 spin_unlock(&priv->lock);
b481de9c
ZY		 4717 return IRQ_HANDLED;
4718
4719 none:
4720 /* re-enable interrupts here since we don't have anything to service. */
bb8c093b 4721 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 4722 spin_unlock(&priv->lock);
4723 return IRQ_NONE;
4724}
4725
b481de9c
ZY		 4726/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4727 * sending probe req. This should be set long enough to hear probe responses
4728 * from more than one AP. */
4729#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4730#define IWL_ACTIVE_DWELL_TIME_52 (10)
4731
4732/* For faster active scanning, scan will move to the next channel if fewer than
4733 * PLCP_QUIET_THRESH packets are heard on this channel within
4734 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4735 * time if it's a quiet channel (nothing responded to our probe, and there's
4736 * no other traffic).
4737 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4738#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4739#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4740
4741/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4742 * Must be set longer than active dwell time.
4743 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4744#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4745#define IWL_PASSIVE_DWELL_TIME_52 (10)
4746#define IWL_PASSIVE_DWELL_BASE (100)
4747#define IWL_CHANNEL_TUNE_TIME 5
4748
c79dd5b5 4749static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
8318d78a 4750 enum ieee80211_band band)
b481de9c 4751{
8318d78a 4752 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4753 return IWL_ACTIVE_DWELL_TIME_52;
4754 else
4755 return IWL_ACTIVE_DWELL_TIME_24;
4756}
4757
c79dd5b5 4758static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
8318d78a 4759 enum ieee80211_band band)
b481de9c 4760{
8318d78a
JB		 4761 u16 active = iwl4965_get_active_dwell_time(priv, band);
4762 u16 passive = (band != IEEE80211_BAND_5GHZ) ?
b481de9c
ZY		 4763 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4764 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4765
bb8c093b 4766 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 4767 /* If we're associated, we clamp the maximum passive
4768 * dwell time to be 98% of the beacon interval (minus
4769 * 2 * channel tune time) */
4770 passive = priv->beacon_int;
4771 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4772 passive = IWL_PASSIVE_DWELL_BASE;
4773 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4774 }
4775
4776 if (passive <= active)
4777 passive = active + 1;
4778
4779 return passive;
4780}
4781
c79dd5b5 4782static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
8318d78a 4783 enum ieee80211_band band,
b481de9c 4784 u8 is_active, u8 direct_mask,
bb8c093b 4785 struct iwl4965_scan_channel *scan_ch)
b481de9c
ZY		 4786{
4787 const struct ieee80211_channel *channels = NULL;
8318d78a 4788 const struct ieee80211_supported_band *sband;
bf85ea4f 4789 const struct iwl_channel_info *ch_info;
b481de9c
ZY		 4790 u16 passive_dwell = 0;
4791 u16 active_dwell = 0;
4792 int added, i;
4793
8318d78a
JB		 4794 sband = iwl4965_get_hw_mode(priv, band);
4795 if (!sband)
b481de9c
ZY		 4796 return 0;
4797
8318d78a 4798 channels = sband->channels;
b481de9c 4799
8318d78a
JB		 4800 active_dwell = iwl4965_get_active_dwell_time(priv, band);
4801 passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
b481de9c 4802
8318d78a
JB		 4803 for (i = 0, added = 0; i < sband->n_channels; i++) {
4804 if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
b481de9c 4805 le16_to_cpu(priv->active_rxon.channel)) {
bb8c093b 4806 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 4807 IWL_DEBUG_SCAN
4808 ("Skipping current channel %d\n",
4809 le16_to_cpu(priv->active_rxon.channel));
4810 continue;
4811 }
4812 } else if (priv->only_active_channel)
4813 continue;
4814
8318d78a 4815 scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
b481de9c 4816
8622e705 4817 ch_info = iwl_get_channel_info(priv, band,
9fbab516 4818 scan_ch->channel);
b481de9c
ZY		 4819 if (!is_channel_valid(ch_info)) {
4820 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4821 scan_ch->channel);
4822 continue;
4823 }
4824
4825 if (!is_active || is_channel_passive(ch_info) ||
8318d78a 4826 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
b481de9c
ZY		 4827 scan_ch->type = 0; /* passive */
4828 else
4829 scan_ch->type = 1; /* active */
4830
4831 if (scan_ch->type & 1)
4832 scan_ch->type |= (direct_mask << 1);
4833
4834 if (is_channel_narrow(ch_info))
4835 scan_ch->type |= (1 << 7);
4836
4837 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4838 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4839
9fbab516 4840 /* Set txpower levels to defaults */
b481de9c
ZY		 4841 scan_ch->tpc.dsp_atten = 110;
4842 /* scan_pwr_info->tpc.dsp_atten; */
4843
4844 /*scan_pwr_info->tpc.tx_gain; */
8318d78a 4845 if (band == IEEE80211_BAND_5GHZ)
b481de9c
ZY		 4846 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4847 else {
4848 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4849 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
9fbab516 4850 * power level:
8a1b0245 4851 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
b481de9c
ZY		 4852 */
4853 }
4854
4855 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4856 scan_ch->channel,
4857 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4858 (scan_ch->type & 1) ?
4859 active_dwell : passive_dwell);
4860
4861 scan_ch++;
4862 added++;
4863 }
4864
4865 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
4866 return added;
4867}
4868
c79dd5b5 4869static void iwl4965_init_hw_rates(struct iwl_priv *priv,
b481de9c
ZY		 4870 struct ieee80211_rate *rates)
4871{
4872 int i;
4873
4874 for (i = 0; i < IWL_RATE_COUNT; i++) {
8318d78a
JB		 4875 rates[i].bitrate = iwl4965_rates[i].ieee * 5;
4876 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4877 rates[i].hw_value_short = i;
4878 rates[i].flags = 0;
4879 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
b481de9c 4880 /*
8318d78a 4881 * If CCK != 1M then set short preamble rate flag.
b481de9c 4882 */
35cdeaf4
TW		 4883 rates[i].flags |=
4884 (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4885 0 : IEEE80211_RATE_SHORT_PREAMBLE;
b481de9c 4886 }
b481de9c 4887 }
b481de9c
ZY		 4888}
4889
4890/**
bb8c093b 4891 * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
b481de9c 4892 */
bf85ea4f 4893int iwl4965_init_geos(struct iwl_priv *priv)
b481de9c 4894{
bf85ea4f 4895 struct iwl_channel_info *ch;
8211ef78 4896 struct ieee80211_supported_band *sband;
b481de9c
ZY		 4897 struct ieee80211_channel *channels;
4898 struct ieee80211_channel *geo_ch;
4899 struct ieee80211_rate *rates;
4900 int i = 0;
b481de9c 4901
8318d78a
JB		 4902 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
4903 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
b481de9c
ZY		 4904 IWL_DEBUG_INFO("Geography modes already initialized.\n");
4905 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
4906 return 0;
4907 }
4908
b481de9c
ZY		 4909 channels = kzalloc(sizeof(struct ieee80211_channel) *
4910 priv->channel_count, GFP_KERNEL);
8318d78a 4911 if (!channels)
b481de9c 4912 return -ENOMEM;
b481de9c 4913
8211ef78 4914 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
b481de9c
ZY		 4915 GFP_KERNEL);
4916 if (!rates) {
b481de9c
ZY		 4917 kfree(channels);
4918 return -ENOMEM;
4919 }
4920
b481de9c 4921 /* 5.2GHz channels start after the 2.4GHz channels */
8211ef78 4922 sband = &priv->bands[IEEE80211_BAND_5GHZ];
bf85ea4f 4923 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
8211ef78
TW		 4924 /* just OFDM */
4925 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
4926 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
8318d78a 4927
1ea87396 4928 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
78330fdd 4929
8211ef78
TW		 4930 sband = &priv->bands[IEEE80211_BAND_2GHZ];
4931 sband->channels = channels;
4932 /* OFDM & CCK */
4933 sband->bitrates = rates;
4934 sband->n_bitrates = IWL_RATE_COUNT;
b481de9c 4935
1ea87396 4936 iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
78330fdd 4937
b481de9c
ZY		 4938 priv->ieee_channels = channels;
4939 priv->ieee_rates = rates;
4940
bb8c093b 4941 iwl4965_init_hw_rates(priv, rates);
b481de9c 4942
8211ef78 4943 for (i = 0; i < priv->channel_count; i++) {
b481de9c
ZY		 4944 ch = &priv->channel_info[i];
4945
8211ef78
TW		 4946 /* FIXME: might be removed if scan is OK */
4947 if (!is_channel_valid(ch))
b481de9c 4948 continue;
b481de9c 4949
8211ef78
TW		 4950 if (is_channel_a_band(ch))
4951 sband = &priv->bands[IEEE80211_BAND_5GHZ];
4952 else
4953 sband = &priv->bands[IEEE80211_BAND_2GHZ];
b481de9c 4954
8211ef78
TW		 4955 geo_ch = &sband->channels[sband->n_channels++];
4956
4957 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
8318d78a
JB		 4958 geo_ch->max_power = ch->max_power_avg;
4959 geo_ch->max_antenna_gain = 0xff;
7b72304d 4960 geo_ch->hw_value = ch->channel;
b481de9c
ZY		 4961
4962 if (is_channel_valid(ch)) {
8318d78a
JB		 4963 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
4964 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
b481de9c 4965
8318d78a
JB		 4966 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
4967 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
b481de9c
ZY		 4968
4969 if (ch->flags & EEPROM_CHANNEL_RADAR)
8318d78a 4970 geo_ch->flags |= IEEE80211_CHAN_RADAR;
b481de9c
ZY		 4971
4972 if (ch->max_power_avg > priv->max_channel_txpower_limit)
4973 priv->max_channel_txpower_limit =
4974 ch->max_power_avg;
8211ef78 4975 } else {
8318d78a 4976 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
8211ef78
TW		 4977 }
4978
4979 /* Save flags for reg domain usage */
4980 geo_ch->orig_flags = geo_ch->flags;
4981
4982 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
4983 ch->channel, geo_ch->center_freq,
4984 is_channel_a_band(ch) ? "5.2" : "2.4",
4985 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
4986 "restricted" : "valid",
4987 geo_ch->flags);
b481de9c
ZY		 4988 }
4989
82b9a121
TW		 4990 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
4991 priv->cfg->sku & IWL_SKU_A) {
b481de9c
ZY		 4992 printk(KERN_INFO DRV_NAME
4993 ": Incorrectly detected BG card as ABG. Please send "
4994 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
4995 priv->pci_dev->device, priv->pci_dev->subsystem_device);
82b9a121 4996 priv->cfg->sku &= ~IWL_SKU_A;
b481de9c
ZY		 4997 }
4998
4999 printk(KERN_INFO DRV_NAME
5000 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
8318d78a
JB		 5001 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5002 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
b481de9c 5003
e0e0a67e
JL		 5004 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5005 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5006 &priv->bands[IEEE80211_BAND_2GHZ];
5007 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5008 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5009 &priv->bands[IEEE80211_BAND_5GHZ];
b481de9c 5010
b481de9c
ZY		 5011 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5012
5013 return 0;
5014}
5015
849e0dce
RC		 5016/*
5017 * iwl4965_free_geos - undo allocations in iwl4965_init_geos
5018 */
bf85ea4f 5019void iwl4965_free_geos(struct iwl_priv *priv)
849e0dce 5020{
849e0dce
RC		 5021 kfree(priv->ieee_channels);
5022 kfree(priv->ieee_rates);
5023 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5024}
5025
b481de9c
ZY		 5026/******************************************************************************
5027 *
5028 * uCode download functions
5029 *
5030 ******************************************************************************/
5031
c79dd5b5 5032static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
b481de9c 5033{
98c92211
TW		 5034 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5035 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5036 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5037 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5038 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5039 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c
ZY		 5040}
5041
5042/**
bb8c093b 5043 * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5044 * looking at all data.
5045 */
c79dd5b5 5046static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
9fbab516 5047 u32 len)
b481de9c
ZY		 5048{
5049 u32 val;
5050 u32 save_len = len;
5051 int rc = 0;
5052 u32 errcnt;
5053
5054 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5055
bb8c093b 5056 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5057 if (rc)
5058 return rc;
5059
bb8c093b 5060 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
b481de9c
ZY		 5061
5062 errcnt = 0;
5063 for (; len > 0; len -= sizeof(u32), image++) {
5064 /* read data comes through single port, auto-incr addr */
5065 /* NOTE: Use the debugless read so we don't flood kernel log
5066 * if IWL_DL_IO is set */
bb8c093b 5067 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5068 if (val != le32_to_cpu(*image)) {
5069 IWL_ERROR("uCode INST section is invalid at "
5070 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5071 save_len - len, val, le32_to_cpu(*image));
5072 rc = -EIO;
5073 errcnt++;
5074 if (errcnt >= 20)
5075 break;
5076 }
5077 }
5078
bb8c093b 5079 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5080
5081 if (!errcnt)
5082 IWL_DEBUG_INFO
5083 ("ucode image in INSTRUCTION memory is good\n");
5084
5085 return rc;
5086}
5087
5088
5089/**
bb8c093b 5090 * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
b481de9c
ZY		 5091 * using sample data 100 bytes apart. If these sample points are good,
5092 * it's a pretty good bet that everything between them is good, too.
5093 */
c79dd5b5 5094static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
b481de9c
ZY		 5095{
5096 u32 val;
5097 int rc = 0;
5098 u32 errcnt = 0;
5099 u32 i;
5100
5101 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5102
bb8c093b 5103 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5104 if (rc)
5105 return rc;
5106
5107 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5108 /* read data comes through single port, auto-incr addr */
5109 /* NOTE: Use the debugless read so we don't flood kernel log
5110 * if IWL_DL_IO is set */
bb8c093b 5111 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
b481de9c 5112 i + RTC_INST_LOWER_BOUND);
bb8c093b 5113 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
b481de9c
ZY		 5114 if (val != le32_to_cpu(*image)) {
5115#if 0 /* Enable this if you want to see details */
5116 IWL_ERROR("uCode INST section is invalid at "
5117 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5118 i, val, *image);
5119#endif
5120 rc = -EIO;
5121 errcnt++;
5122 if (errcnt >= 3)
5123 break;
5124 }
5125 }
5126
bb8c093b 5127 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5128
5129 return rc;
5130}
5131
5132
5133/**
bb8c093b 5134 * iwl4965_verify_ucode - determine which instruction image is in SRAM,
b481de9c
ZY		 5135 * and verify its contents
5136 */
c79dd5b5 5137static int iwl4965_verify_ucode(struct iwl_priv *priv)
b481de9c
ZY		 5138{
5139 __le32 *image;
5140 u32 len;
5141 int rc = 0;
5142
5143 /* Try bootstrap */
5144 image = (__le32 *)priv->ucode_boot.v_addr;
5145 len = priv->ucode_boot.len;
bb8c093b 5146 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5147 if (rc == 0) {
5148 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5149 return 0;
5150 }
5151
5152 /* Try initialize */
5153 image = (__le32 *)priv->ucode_init.v_addr;
5154 len = priv->ucode_init.len;
bb8c093b 5155 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5156 if (rc == 0) {
5157 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5158 return 0;
5159 }
5160
5161 /* Try runtime/protocol */
5162 image = (__le32 *)priv->ucode_code.v_addr;
5163 len = priv->ucode_code.len;
bb8c093b 5164 rc = iwl4965_verify_inst_sparse(priv, image, len);
b481de9c
ZY		 5165 if (rc == 0) {
5166 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5167 return 0;
5168 }
5169
5170 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5171
9fbab516
BC		 5172 /* Since nothing seems to match, show first several data entries in
5173 * instruction SRAM, so maybe visual inspection will give a clue.
5174 * Selection of bootstrap image (vs. other images) is arbitrary. */
b481de9c
ZY		 5175 image = (__le32 *)priv->ucode_boot.v_addr;
5176 len = priv->ucode_boot.len;
bb8c093b 5177 rc = iwl4965_verify_inst_full(priv, image, len);
b481de9c
ZY		 5178
5179 return rc;
5180}
5181
5182
5183/* check contents of special bootstrap uCode SRAM */
c79dd5b5 5184static int iwl4965_verify_bsm(struct iwl_priv *priv)
b481de9c
ZY		 5185{
5186 __le32 *image = priv->ucode_boot.v_addr;
5187 u32 len = priv->ucode_boot.len;
5188 u32 reg;
5189 u32 val;
5190
5191 IWL_DEBUG_INFO("Begin verify bsm\n");
5192
5193 /* verify BSM SRAM contents */
bb8c093b 5194 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
b481de9c
ZY		 5195 for (reg = BSM_SRAM_LOWER_BOUND;
5196 reg < BSM_SRAM_LOWER_BOUND + len;
5197 reg += sizeof(u32), image ++) {
bb8c093b 5198 val = iwl4965_read_prph(priv, reg);
b481de9c
ZY		 5199 if (val != le32_to_cpu(*image)) {
5200 IWL_ERROR("BSM uCode verification failed at "
5201 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5202 BSM_SRAM_LOWER_BOUND,
5203 reg - BSM_SRAM_LOWER_BOUND, len,
5204 val, le32_to_cpu(*image));
5205 return -EIO;
5206 }
5207 }
5208
5209 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5210
5211 return 0;
5212}
5213
5214/**
bb8c093b 5215 * iwl4965_load_bsm - Load bootstrap instructions
b481de9c
ZY		 5216 *
5217 * BSM operation:
5218 *
5219 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5220 * in special SRAM that does not power down during RFKILL. When powering back
5221 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5222 * the bootstrap program into the on-board processor, and starts it.
5223 *
5224 * The bootstrap program loads (via DMA) instructions and data for a new
5225 * program from host DRAM locations indicated by the host driver in the
5226 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5227 * automatically.
5228 *
5229 * When initializing the NIC, the host driver points the BSM to the
5230 * "initialize" uCode image. This uCode sets up some internal data, then
5231 * notifies host via "initialize alive" that it is complete.
5232 *
5233 * The host then replaces the BSM_DRAM_* pointer values to point to the
5234 * normal runtime uCode instructions and a backup uCode data cache buffer
5235 * (filled initially with starting data values for the on-board processor),
5236 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5237 * which begins normal operation.
5238 *
5239 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5240 * the backup data cache in DRAM before SRAM is powered down.
5241 *
5242 * When powering back up, the BSM loads the bootstrap program. This reloads
5243 * the runtime uCode instructions and the backup data cache into SRAM,
5244 * and re-launches the runtime uCode from where it left off.
5245 */
c79dd5b5 5246static int iwl4965_load_bsm(struct iwl_priv *priv)
b481de9c
ZY		 5247{
5248 __le32 *image = priv->ucode_boot.v_addr;
5249 u32 len = priv->ucode_boot.len;
5250 dma_addr_t pinst;
5251 dma_addr_t pdata;
5252 u32 inst_len;
5253 u32 data_len;
5254 int rc;
5255 int i;
5256 u32 done;
5257 u32 reg_offset;
5258
5259 IWL_DEBUG_INFO("Begin load bsm\n");
5260
5261 /* make sure bootstrap program is no larger than BSM's SRAM size */
5262 if (len > IWL_MAX_BSM_SIZE)
5263 return -EINVAL;
5264
5265 /* Tell bootstrap uCode where to find the "Initialize" uCode
9fbab516 5266 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
bb8c093b 5267 * NOTE: iwl4965_initialize_alive_start() will replace these values,
b481de9c
ZY		 5268 * after the "initialize" uCode has run, to point to
5269 * runtime/protocol instructions and backup data cache. */
5270 pinst = priv->ucode_init.p_addr >> 4;
5271 pdata = priv->ucode_init_data.p_addr >> 4;
5272 inst_len = priv->ucode_init.len;
5273 data_len = priv->ucode_init_data.len;
5274
bb8c093b 5275 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5276 if (rc)
5277 return rc;
5278
bb8c093b
CH		 5279 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5280 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5281 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5282 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
b481de9c
ZY		 5283
5284 /* Fill BSM memory with bootstrap instructions */
5285 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5286 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5287 reg_offset += sizeof(u32), image++)
bb8c093b 5288 _iwl4965_write_prph(priv, reg_offset,
b481de9c
ZY		 5289 le32_to_cpu(*image));
5290
bb8c093b 5291 rc = iwl4965_verify_bsm(priv);
b481de9c 5292 if (rc) {
bb8c093b 5293 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5294 return rc;
5295 }
5296
5297 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
bb8c093b
CH		 5298 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5299 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
b481de9c 5300 RTC_INST_LOWER_BOUND);
bb8c093b 5301 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
b481de9c
ZY		 5302
5303 /* Load bootstrap code into instruction SRAM now,
5304 * to prepare to load "initialize" uCode */
bb8c093b 5305 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 5306 BSM_WR_CTRL_REG_BIT_START);
5307
5308 /* Wait for load of bootstrap uCode to finish */
5309 for (i = 0; i < 100; i++) {
bb8c093b 5310 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
b481de9c
ZY		 5311 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5312 break;
5313 udelay(10);
5314 }
5315 if (i < 100)
5316 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5317 else {
5318 IWL_ERROR("BSM write did not complete!\n");
5319 return -EIO;
5320 }
5321
5322 /* Enable future boot loads whenever power management unit triggers it
5323 * (e.g. when powering back up after power-save shutdown) */
bb8c093b 5324 iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
b481de9c
ZY		 5325 BSM_WR_CTRL_REG_BIT_START_EN);
5326
bb8c093b 5327 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5328
5329 return 0;
5330}
5331
c79dd5b5 5332static void iwl4965_nic_start(struct iwl_priv *priv)
b481de9c
ZY		 5333{
5334 /* Remove all resets to allow NIC to operate */
bb8c093b 5335 iwl4965_write32(priv, CSR_RESET, 0);
b481de9c
ZY		 5336}
5337
90e759d1 5338
b481de9c 5339/**
bb8c093b 5340 * iwl4965_read_ucode - Read uCode images from disk file.
b481de9c
ZY		 5341 *
5342 * Copy into buffers for card to fetch via bus-mastering
5343 */
c79dd5b5 5344static int iwl4965_read_ucode(struct iwl_priv *priv)
b481de9c 5345{
bb8c093b 5346 struct iwl4965_ucode *ucode;
90e759d1 5347 int ret;
b481de9c 5348 const struct firmware *ucode_raw;
4bf775cd 5349 const char *name = priv->cfg->fw_name;
b481de9c
ZY		 5350 u8 *src;
5351 size_t len;
5352 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5353
5354 /* Ask kernel firmware_class module to get the boot firmware off disk.
5355 * request_firmware() is synchronous, file is in memory on return. */
90e759d1
TW		 5356 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5357 if (ret < 0) {
5358 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5359 name, ret);
b481de9c
ZY		 5360 goto error;
5361 }
5362
5363 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5364 name, ucode_raw->size);
5365
5366 /* Make sure that we got at least our header! */
5367 if (ucode_raw->size < sizeof(*ucode)) {
5368 IWL_ERROR("File size way too small!\n");
90e759d1 5369 ret = -EINVAL;
b481de9c
ZY		 5370 goto err_release;
5371 }
5372
5373 /* Data from ucode file: header followed by uCode images */
5374 ucode = (void *)ucode_raw->data;
5375
5376 ver = le32_to_cpu(ucode->ver);
5377 inst_size = le32_to_cpu(ucode->inst_size);
5378 data_size = le32_to_cpu(ucode->data_size);
5379 init_size = le32_to_cpu(ucode->init_size);
5380 init_data_size = le32_to_cpu(ucode->init_data_size);
5381 boot_size = le32_to_cpu(ucode->boot_size);
5382
5383 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5384 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
5385 inst_size);
5386 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
5387 data_size);
5388 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
5389 init_size);
5390 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
5391 init_data_size);
5392 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
5393 boot_size);
5394
5395 /* Verify size of file vs. image size info in file's header */
5396 if (ucode_raw->size < sizeof(*ucode) +
5397 inst_size + data_size + init_size +
5398 init_data_size + boot_size) {
5399
5400 IWL_DEBUG_INFO("uCode file size %d too small\n",
5401 (int)ucode_raw->size);
90e759d1 5402 ret = -EINVAL;
b481de9c
ZY		 5403 goto err_release;
5404 }
5405
5406 /* Verify that uCode images will fit in card's SRAM */
5407 if (inst_size > IWL_MAX_INST_SIZE) {
90e759d1
TW		 5408 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5409 inst_size);
5410 ret = -EINVAL;
b481de9c
ZY		 5411 goto err_release;
5412 }
5413
5414 if (data_size > IWL_MAX_DATA_SIZE) {
90e759d1
TW		 5415 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5416 data_size);
5417 ret = -EINVAL;
b481de9c
ZY		 5418 goto err_release;
5419 }
5420 if (init_size > IWL_MAX_INST_SIZE) {
5421 IWL_DEBUG_INFO
90e759d1
TW		 5422 ("uCode init instr len %d too large to fit in\n",
5423 init_size);
5424 ret = -EINVAL;
b481de9c
ZY		 5425 goto err_release;
5426 }
5427 if (init_data_size > IWL_MAX_DATA_SIZE) {
5428 IWL_DEBUG_INFO
90e759d1
TW		 5429 ("uCode init data len %d too large to fit in\n",
5430 init_data_size);
5431 ret = -EINVAL;
b481de9c
ZY		 5432 goto err_release;
5433 }
5434 if (boot_size > IWL_MAX_BSM_SIZE) {
5435 IWL_DEBUG_INFO
90e759d1
TW		 5436 ("uCode boot instr len %d too large to fit in\n",
5437 boot_size);
5438 ret = -EINVAL;
b481de9c
ZY		 5439 goto err_release;
5440 }
5441
5442 /* Allocate ucode buffers for card's bus-master loading ... */
5443
5444 /* Runtime instructions and 2 copies of data:
5445 * 1) unmodified from disk
5446 * 2) backup cache for save/restore during power-downs */
5447 priv->ucode_code.len = inst_size;
98c92211 5448 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
b481de9c
ZY		 5449
5450 priv->ucode_data.len = data_size;
98c92211 5451 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
b481de9c
ZY		 5452
5453 priv->ucode_data_backup.len = data_size;
98c92211 5454 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
b481de9c
ZY		 5455
5456 /* Initialization instructions and data */
90e759d1
TW		 5457 if (init_size && init_data_size) {
5458 priv->ucode_init.len = init_size;
98c92211 5459 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
90e759d1
TW		 5460
5461 priv->ucode_init_data.len = init_data_size;
98c92211 5462 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
90e759d1
TW		 5463
5464 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5465 goto err_pci_alloc;
5466 }
b481de9c
ZY		 5467
5468 /* Bootstrap (instructions only, no data) */
90e759d1
TW		 5469 if (boot_size) {
5470 priv->ucode_boot.len = boot_size;
98c92211 5471 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
b481de9c 5472
90e759d1
TW		 5473 if (!priv->ucode_boot.v_addr)
5474 goto err_pci_alloc;
5475 }
b481de9c
ZY		 5476
5477 /* Copy images into buffers for card's bus-master reads ... */
5478
5479 /* Runtime instructions (first block of data in file) */
5480 src = &ucode->data[0];
5481 len = priv->ucode_code.len;
90e759d1 5482 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
b481de9c
ZY		 5483 memcpy(priv->ucode_code.v_addr, src, len);
5484 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5485 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5486
5487 /* Runtime data (2nd block)
bb8c093b 5488 * NOTE: Copy into backup buffer will be done in iwl4965_up() */
b481de9c
ZY		 5489 src = &ucode->data[inst_size];
5490 len = priv->ucode_data.len;
90e759d1 5491 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
b481de9c
ZY		 5492 memcpy(priv->ucode_data.v_addr, src, len);
5493 memcpy(priv->ucode_data_backup.v_addr, src, len);
5494
5495 /* Initialization instructions (3rd block) */
5496 if (init_size) {
5497 src = &ucode->data[inst_size + data_size];
5498 len = priv->ucode_init.len;
90e759d1
TW		 5499 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5500 len);
b481de9c
ZY		 5501 memcpy(priv->ucode_init.v_addr, src, len);
5502 }
5503
5504 /* Initialization data (4th block) */
5505 if (init_data_size) {
5506 src = &ucode->data[inst_size + data_size + init_size];
5507 len = priv->ucode_init_data.len;
90e759d1
TW		 5508 IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
5509 len);
b481de9c
ZY		 5510 memcpy(priv->ucode_init_data.v_addr, src, len);
5511 }
5512
5513 /* Bootstrap instructions (5th block) */
5514 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5515 len = priv->ucode_boot.len;
90e759d1 5516 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
b481de9c
ZY		 5517 memcpy(priv->ucode_boot.v_addr, src, len);
5518
5519 /* We have our copies now, allow OS release its copies */
5520 release_firmware(ucode_raw);
5521 return 0;
5522
5523 err_pci_alloc:
5524 IWL_ERROR("failed to allocate pci memory\n");
90e759d1 5525 ret = -ENOMEM;
bb8c093b 5526 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 5527
5528 err_release:
5529 release_firmware(ucode_raw);
5530
5531 error:
90e759d1 5532 return ret;
b481de9c
ZY		 5533}
5534
5535
5536/**
bb8c093b 5537 * iwl4965_set_ucode_ptrs - Set uCode address location
b481de9c
ZY		 5538 *
5539 * Tell initialization uCode where to find runtime uCode.
5540 *
5541 * BSM registers initially contain pointers to initialization uCode.
5542 * We need to replace them to load runtime uCode inst and data,
5543 * and to save runtime data when powering down.
5544 */
c79dd5b5 5545static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
b481de9c
ZY		 5546{
5547 dma_addr_t pinst;
5548 dma_addr_t pdata;
5549 int rc = 0;
5550 unsigned long flags;
5551
5552 /* bits 35:4 for 4965 */
5553 pinst = priv->ucode_code.p_addr >> 4;
5554 pdata = priv->ucode_data_backup.p_addr >> 4;
5555
5556 spin_lock_irqsave(&priv->lock, flags);
bb8c093b 5557 rc = iwl4965_grab_nic_access(priv);
b481de9c
ZY		 5558 if (rc) {
5559 spin_unlock_irqrestore(&priv->lock, flags);
5560 return rc;
5561 }
5562
5563 /* Tell bootstrap uCode where to find image to load */
bb8c093b
CH		 5564 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5565 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5566 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
b481de9c
ZY		 5567 priv->ucode_data.len);
5568
5569 /* Inst bytecount must be last to set up, bit 31 signals uCode
5570 * that all new ptr/size info is in place */
bb8c093b 5571 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
b481de9c
ZY		 5572 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5573
bb8c093b 5574 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5575
5576 spin_unlock_irqrestore(&priv->lock, flags);
5577
5578 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5579
5580 return rc;
5581}
5582
5583/**
bb8c093b 5584 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
b481de9c
ZY		 5585 *
5586 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5587 *
5588 * The 4965 "initialize" ALIVE reply contains calibration data for:
5589 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
5590 * (3945 does not contain this data).
5591 *
5592 * Tell "initialize" uCode to go ahead and load the runtime uCode.
5593*/
c79dd5b5 5594static void iwl4965_init_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 5595{
5596 /* Check alive response for "valid" sign from uCode */
5597 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5598 /* We had an error bringing up the hardware, so take it
5599 * all the way back down so we can try again */
5600 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5601 goto restart;
5602 }
5603
5604 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5605 * This is a paranoid check, because we would not have gotten the
5606 * "initialize" alive if code weren't properly loaded. */
bb8c093b 5607 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 5608 /* Runtime instruction load was bad;
5609 * take it all the way back down so we can try again */
5610 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5611 goto restart;
5612 }
5613
5614 /* Calculate temperature */
5615 priv->temperature = iwl4965_get_temperature(priv);
5616
5617 /* Send pointers to protocol/runtime uCode image ... init code will
5618 * load and launch runtime uCode, which will send us another "Alive"
5619 * notification. */
5620 IWL_DEBUG_INFO("Initialization Alive received.\n");
bb8c093b 5621 if (iwl4965_set_ucode_ptrs(priv)) {
b481de9c
ZY		 5622 /* Runtime instruction load won't happen;
5623 * take it all the way back down so we can try again */
5624 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5625 goto restart;
5626 }
5627 return;
5628
5629 restart:
5630 queue_work(priv->workqueue, &priv->restart);
5631}
5632
5633
5634/**
bb8c093b 5635 * iwl4965_alive_start - called after REPLY_ALIVE notification received
b481de9c 5636 * from protocol/runtime uCode (initialization uCode's
bb8c093b 5637 * Alive gets handled by iwl4965_init_alive_start()).
b481de9c 5638 */
c79dd5b5 5639static void iwl4965_alive_start(struct iwl_priv *priv)
b481de9c
ZY		 5640{
5641 int rc = 0;
5642
5643 IWL_DEBUG_INFO("Runtime Alive received.\n");
5644
5645 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5646 /* We had an error bringing up the hardware, so take it
5647 * all the way back down so we can try again */
5648 IWL_DEBUG_INFO("Alive failed.\n");
5649 goto restart;
5650 }
5651
5652 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5653 * This is a paranoid check, because we would not have gotten the
5654 * "runtime" alive if code weren't properly loaded. */
bb8c093b 5655 if (iwl4965_verify_ucode(priv)) {
b481de9c
ZY		 5656 /* Runtime instruction load was bad;
5657 * take it all the way back down so we can try again */
5658 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5659 goto restart;
5660 }
5661
bf85ea4f 5662 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 5663
5664 rc = iwl4965_alive_notify(priv);
5665 if (rc) {
5666 IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
5667 rc);
5668 goto restart;
5669 }
5670
9fbab516 5671 /* After the ALIVE response, we can send host commands to 4965 uCode */
b481de9c
ZY		 5672 set_bit(STATUS_ALIVE, &priv->status);
5673
5674 /* Clear out the uCode error bit if it is set */
5675 clear_bit(STATUS_FW_ERROR, &priv->status);
5676
bb8c093b 5677 if (iwl4965_is_rfkill(priv))
b481de9c
ZY		 5678 return;
5679
5a66926a 5680 ieee80211_start_queues(priv->hw);
b481de9c
ZY		 5681
5682 priv->active_rate = priv->rates_mask;
5683 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5684
bb8c093b 5685 iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
b481de9c 5686
bb8c093b
CH		 5687 if (iwl4965_is_associated(priv)) {
5688 struct iwl4965_rxon_cmd *active_rxon =
5689 (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
b481de9c
ZY		 5690
5691 memcpy(&priv->staging_rxon, &priv->active_rxon,
5692 sizeof(priv->staging_rxon));
5693 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5694 } else {
5695 /* Initialize our rx_config data */
bb8c093b 5696 iwl4965_connection_init_rx_config(priv);
b481de9c
ZY		 5697 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5698 }
5699
9fbab516 5700 /* Configure Bluetooth device coexistence support */
bb8c093b 5701 iwl4965_send_bt_config(priv);
b481de9c
ZY		 5702
5703 /* Configure the adapter for unassociated operation */
bb8c093b 5704 iwl4965_commit_rxon(priv);
b481de9c
ZY		 5705
5706 /* At this point, the NIC is initialized and operational */
5707 priv->notif_missed_beacons = 0;
5708 set_bit(STATUS_READY, &priv->status);
5709
5710 iwl4965_rf_kill_ct_config(priv);
5a66926a 5711
b481de9c 5712 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5a66926a 5713 wake_up_interruptible(&priv->wait_command_queue);
b481de9c
ZY		 5714
5715 if (priv->error_recovering)
bb8c093b 5716 iwl4965_error_recovery(priv);
b481de9c
ZY		 5717
5718 return;
5719
5720 restart:
5721 queue_work(priv->workqueue, &priv->restart);
5722}
5723
c79dd5b5 5724static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
b481de9c 5725
c79dd5b5 5726static void __iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 5727{
5728 unsigned long flags;
5729 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5730 struct ieee80211_conf *conf = NULL;
5731
5732 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5733
5734 conf = ieee80211_get_hw_conf(priv->hw);
5735
5736 if (!exit_pending)
5737 set_bit(STATUS_EXIT_PENDING, &priv->status);
5738
bf85ea4f 5739 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 5740
5741 /* Unblock any waiting calls */
5742 wake_up_interruptible_all(&priv->wait_command_queue);
5743
b481de9c
ZY		 5744 /* Wipe out the EXIT_PENDING status bit if we are not actually
5745 * exiting the module */
5746 if (!exit_pending)
5747 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5748
5749 /* stop and reset the on-board processor */
bb8c093b 5750 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
b481de9c
ZY		 5751
5752 /* tell the device to stop sending interrupts */
bb8c093b 5753 iwl4965_disable_interrupts(priv);
b481de9c
ZY		 5754
5755 if (priv->mac80211_registered)
5756 ieee80211_stop_queues(priv->hw);
5757
bb8c093b 5758 /* If we have not previously called iwl4965_init() then
b481de9c 5759 * clear all bits but the RF Kill and SUSPEND bits and return */
bb8c093b 5760 if (!iwl4965_is_init(priv)) {
b481de9c
ZY		 5761 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5762 STATUS_RF_KILL_HW |
5763 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5764 STATUS_RF_KILL_SW |
9788864e
RC		 5765 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5766 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 5767 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5768 STATUS_IN_SUSPEND;
5769 goto exit;
5770 }
5771
5772 /* ...otherwise clear out all the status bits but the RF Kill and
5773 * SUSPEND bits and continue taking the NIC down. */
5774 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5775 STATUS_RF_KILL_HW |
5776 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5777 STATUS_RF_KILL_SW |
9788864e
RC		 5778 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5779 STATUS_GEO_CONFIGURED |
b481de9c
ZY		 5780 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5781 STATUS_IN_SUSPEND |
5782 test_bit(STATUS_FW_ERROR, &priv->status) <<
5783 STATUS_FW_ERROR;
5784
5785 spin_lock_irqsave(&priv->lock, flags);
9fbab516
BC		 5786 iwl4965_clear_bit(priv, CSR_GP_CNTRL,
5787 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
b481de9c
ZY		 5788 spin_unlock_irqrestore(&priv->lock, flags);
5789
bb8c093b
CH		 5790 iwl4965_hw_txq_ctx_stop(priv);
5791 iwl4965_hw_rxq_stop(priv);
b481de9c
ZY		 5792
5793 spin_lock_irqsave(&priv->lock, flags);
bb8c093b
CH		 5794 if (!iwl4965_grab_nic_access(priv)) {
5795 iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
b481de9c 5796 APMG_CLK_VAL_DMA_CLK_RQT);
bb8c093b 5797 iwl4965_release_nic_access(priv);
b481de9c
ZY		 5798 }
5799 spin_unlock_irqrestore(&priv->lock, flags);
5800
5801 udelay(5);
5802
bb8c093b
CH		 5803 iwl4965_hw_nic_stop_master(priv);
5804 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5805 iwl4965_hw_nic_reset(priv);
b481de9c
ZY		 5806
5807 exit:
bb8c093b 5808 memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
b481de9c
ZY		 5809
5810 if (priv->ibss_beacon)
5811 dev_kfree_skb(priv->ibss_beacon);
5812 priv->ibss_beacon = NULL;
5813
5814 /* clear out any free frames */
bb8c093b 5815 iwl4965_clear_free_frames(priv);
b481de9c
ZY		 5816}
5817
c79dd5b5 5818static void iwl4965_down(struct iwl_priv *priv)
b481de9c
ZY		 5819{
5820 mutex_lock(&priv->mutex);
bb8c093b 5821 __iwl4965_down(priv);
b481de9c 5822 mutex_unlock(&priv->mutex);
b24d22b1 5823
bb8c093b 5824 iwl4965_cancel_deferred_work(priv);
b481de9c
ZY		 5825}
5826
5827#define MAX_HW_RESTARTS 5
5828
c79dd5b5 5829static int __iwl4965_up(struct iwl_priv *priv)
b481de9c
ZY		 5830{
5831 int rc, i;
b481de9c
ZY		 5832
5833 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5834 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5835 return -EIO;
5836 }
5837
5838 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5839 IWL_WARNING("Radio disabled by SW RF kill (module "
5840 "parameter)\n");
e655b9f0
ZY		 5841 return -ENODEV;
5842 }
5843
e903fbd4
RC		 5844 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5845 IWL_ERROR("ucode not available for device bringup\n");
5846 return -EIO;
5847 }
5848
e655b9f0
ZY		 5849 /* If platform's RF_KILL switch is NOT set to KILL */
5850 if (iwl4965_read32(priv, CSR_GP_CNTRL) &
5851 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5852 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5853 else {
5854 set_bit(STATUS_RF_KILL_HW, &priv->status);
5855 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5856 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5857 return -ENODEV;
5858 }
b481de9c
ZY		 5859 }
5860
bb8c093b 5861 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
b481de9c 5862
bb8c093b 5863 rc = iwl4965_hw_nic_init(priv);
b481de9c
ZY		 5864 if (rc) {
5865 IWL_ERROR("Unable to int nic\n");
5866 return rc;
5867 }
5868
5869 /* make sure rfkill handshake bits are cleared */
bb8c093b
CH		 5870 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5871 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
b481de9c
ZY		 5872 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5873
5874 /* clear (again), then enable host interrupts */
bb8c093b
CH		 5875 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
5876 iwl4965_enable_interrupts(priv);
b481de9c
ZY		 5877
5878 /* really make sure rfkill handshake bits are cleared */
bb8c093b
CH		 5879 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5880 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
b481de9c
ZY		 5881
5882 /* Copy original ucode data image from disk into backup cache.
5883 * This will be used to initialize the on-board processor's
5884 * data SRAM for a clean start when the runtime program first loads. */
5885 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
5a66926a 5886 priv->ucode_data.len);
b481de9c 5887
e655b9f0
ZY		 5888 /* We return success when we resume from suspend and rf_kill is on. */
5889 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
b481de9c 5890 return 0;
b481de9c
ZY		 5891
5892 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5893
bf85ea4f 5894 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 5895
5896 /* load bootstrap state machine,
5897 * load bootstrap program into processor's memory,
5898 * prepare to load the "initialize" uCode */
bb8c093b 5899 rc = iwl4965_load_bsm(priv);
b481de9c
ZY		 5900
5901 if (rc) {
5902 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
5903 continue;
5904 }
5905
5906 /* start card; "initialize" will load runtime ucode */
bb8c093b 5907 iwl4965_nic_start(priv);
b481de9c 5908
b481de9c
ZY		 5909 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
5910
5911 return 0;
5912 }
5913
5914 set_bit(STATUS_EXIT_PENDING, &priv->status);
bb8c093b 5915 __iwl4965_down(priv);
b481de9c
ZY		 5916
5917 /* tried to restart and config the device for as long as our
5918 * patience could withstand */
5919 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
5920 return -EIO;
5921}
5922
5923
5924/*****************************************************************************
5925 *
5926 * Workqueue callbacks
5927 *
5928 *****************************************************************************/
5929
bb8c093b 5930static void iwl4965_bg_init_alive_start(struct work_struct *data)
b481de9c 5931{
c79dd5b5
TW		 5932 struct iwl_priv *priv =
5933 container_of(data, struct iwl_priv, init_alive_start.work);
b481de9c
ZY		 5934
5935 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5936 return;
5937
5938 mutex_lock(&priv->mutex);
bb8c093b 5939 iwl4965_init_alive_start(priv);
b481de9c
ZY		 5940 mutex_unlock(&priv->mutex);
5941}
5942
bb8c093b 5943static void iwl4965_bg_alive_start(struct work_struct *data)
b481de9c 5944{
c79dd5b5
TW		 5945 struct iwl_priv *priv =
5946 container_of(data, struct iwl_priv, alive_start.work);
b481de9c
ZY		 5947
5948 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5949 return;
5950
5951 mutex_lock(&priv->mutex);
bb8c093b 5952 iwl4965_alive_start(priv);
b481de9c
ZY		 5953 mutex_unlock(&priv->mutex);
5954}
5955
bb8c093b 5956static void iwl4965_bg_rf_kill(struct work_struct *work)
b481de9c 5957{
c79dd5b5 5958 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
b481de9c
ZY		 5959
5960 wake_up_interruptible(&priv->wait_command_queue);
5961
5962 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5963 return;
5964
5965 mutex_lock(&priv->mutex);
5966
bb8c093b 5967 if (!iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 5968 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
5969 "HW and/or SW RF Kill no longer active, restarting "
5970 "device\n");
5971 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
5972 queue_work(priv->workqueue, &priv->restart);
5973 } else {
5974
5975 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
5976 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
5977 "disabled by SW switch\n");
5978 else
5979 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
5980 "Kill switch must be turned off for "
5981 "wireless networking to work.\n");
5982 }
5983 mutex_unlock(&priv->mutex);
5984}
5985
5986#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
5987
bb8c093b 5988static void iwl4965_bg_scan_check(struct work_struct *data)
b481de9c 5989{
c79dd5b5
TW		 5990 struct iwl_priv *priv =
5991 container_of(data, struct iwl_priv, scan_check.work);
b481de9c
ZY		 5992
5993 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
5994 return;
5995
5996 mutex_lock(&priv->mutex);
5997 if (test_bit(STATUS_SCANNING, &priv->status) ||
5998 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
5999 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6000 "Scan completion watchdog resetting adapter (%dms)\n",
6001 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
052c4b9f 6002
b481de9c 6003 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
bb8c093b 6004 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6005 }
6006 mutex_unlock(&priv->mutex);
6007}
6008
bb8c093b 6009static void iwl4965_bg_request_scan(struct work_struct *data)
b481de9c 6010{
c79dd5b5
TW		 6011 struct iwl_priv *priv =
6012 container_of(data, struct iwl_priv, request_scan);
857485c0 6013 struct iwl_host_cmd cmd = {
b481de9c 6014 .id = REPLY_SCAN_CMD,
bb8c093b 6015 .len = sizeof(struct iwl4965_scan_cmd),
b481de9c
ZY		 6016 .meta.flags = CMD_SIZE_HUGE,
6017 };
bb8c093b 6018 struct iwl4965_scan_cmd *scan;
b481de9c 6019 struct ieee80211_conf *conf = NULL;
78330fdd 6020 u16 cmd_len;
8318d78a 6021 enum ieee80211_band band;
78330fdd 6022 u8 direct_mask;
857485c0 6023 int ret = 0;
b481de9c
ZY		 6024
6025 conf = ieee80211_get_hw_conf(priv->hw);
6026
6027 mutex_lock(&priv->mutex);
6028
bb8c093b 6029 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 6030 IWL_WARNING("request scan called when driver not ready.\n");
6031 goto done;
6032 }
6033
6034 /* Make sure the scan wasn't cancelled before this queued work
6035 * was given the chance to run... */
6036 if (!test_bit(STATUS_SCANNING, &priv->status))
6037 goto done;
6038
6039 /* This should never be called or scheduled if there is currently
6040 * a scan active in the hardware. */
6041 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6042 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6043 "Ignoring second request.\n");
857485c0 6044 ret = -EIO;
b481de9c
ZY		 6045 goto done;
6046 }
6047
6048 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6049 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6050 goto done;
6051 }
6052
6053 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6054 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6055 goto done;
6056 }
6057
bb8c093b 6058 if (iwl4965_is_rfkill(priv)) {
b481de9c
ZY		 6059 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6060 goto done;
6061 }
6062
6063 if (!test_bit(STATUS_READY, &priv->status)) {
6064 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6065 goto done;
6066 }
6067
6068 if (!priv->scan_bands) {
6069 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6070 goto done;
6071 }
6072
6073 if (!priv->scan) {
bb8c093b 6074 priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
b481de9c
ZY		 6075 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6076 if (!priv->scan) {
857485c0 6077 ret = -ENOMEM;
b481de9c
ZY		 6078 goto done;
6079 }
6080 }
6081 scan = priv->scan;
bb8c093b 6082 memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
b481de9c
ZY		 6083
6084 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6085 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6086
bb8c093b 6087 if (iwl4965_is_associated(priv)) {
b481de9c
ZY		 6088 u16 interval = 0;
6089 u32 extra;
6090 u32 suspend_time = 100;
6091 u32 scan_suspend_time = 100;
6092 unsigned long flags;
6093
6094 IWL_DEBUG_INFO("Scanning while associated...\n");
6095
6096 spin_lock_irqsave(&priv->lock, flags);
6097 interval = priv->beacon_int;
6098 spin_unlock_irqrestore(&priv->lock, flags);
6099
6100 scan->suspend_time = 0;
052c4b9f 6101 scan->max_out_time = cpu_to_le32(200 * 1024);
b481de9c
ZY		 6102 if (!interval)
6103 interval = suspend_time;
6104
6105 extra = (suspend_time / interval) << 22;
6106 scan_suspend_time = (extra |
6107 ((suspend_time % interval) * 1024));
6108 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6109 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6110 scan_suspend_time, interval);
6111 }
6112
6113 /* We should add the ability for user to lock to PASSIVE ONLY */
6114 if (priv->one_direct_scan) {
6115 IWL_DEBUG_SCAN
6116 ("Kicking off one direct scan for '%s'\n",
bb8c093b 6117 iwl4965_escape_essid(priv->direct_ssid,
b481de9c
ZY		 6118 priv->direct_ssid_len));
6119 scan->direct_scan[0].id = WLAN_EID_SSID;
6120 scan->direct_scan[0].len = priv->direct_ssid_len;
6121 memcpy(scan->direct_scan[0].ssid,
6122 priv->direct_ssid, priv->direct_ssid_len);
6123 direct_mask = 1;
bb8c093b 6124 } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
b481de9c
ZY		 6125 scan->direct_scan[0].id = WLAN_EID_SSID;
6126 scan->direct_scan[0].len = priv->essid_len;
6127 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6128 direct_mask = 1;
857485c0 6129 } else {
b481de9c 6130 direct_mask = 0;
857485c0 6131 }
b481de9c 6132
b481de9c
ZY		 6133 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6134 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6135 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6136
b481de9c
ZY		 6137
6138 switch (priv->scan_bands) {
6139 case 2:
6140 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6141 scan->tx_cmd.rate_n_flags =
bb8c093b 6142 iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
b481de9c
ZY		 6143 RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
6144
6145 scan->good_CRC_th = 0;
8318d78a 6146 band = IEEE80211_BAND_2GHZ;
b481de9c
ZY		 6147 break;
6148
6149 case 1:
6150 scan->tx_cmd.rate_n_flags =
bb8c093b 6151 iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
b481de9c
ZY		 6152 RATE_MCS_ANT_B_MSK);
6153 scan->good_CRC_th = IWL_GOOD_CRC_TH;
8318d78a 6154 band = IEEE80211_BAND_5GHZ;
b481de9c
ZY		 6155 break;
6156
6157 default:
6158 IWL_WARNING("Invalid scan band count\n");
6159 goto done;
6160 }
6161
78330fdd
TW		 6162 /* We don't build a direct scan probe request; the uCode will do
6163 * that based on the direct_mask added to each channel entry */
6164 cmd_len = iwl4965_fill_probe_req(priv, band,
6165 (struct ieee80211_mgmt *)scan->data,
6166 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
6167
6168 scan->tx_cmd.len = cpu_to_le16(cmd_len);
b481de9c
ZY		 6169 /* select Rx chains */
6170
6171 /* Force use of chains B and C (0x6) for scan Rx.
6172 * Avoid A (0x1) because of its off-channel reception on A-band.
6173 * MIMO is not used here, but value is required to make uCode happy. */
6174 scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
6175 cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
6176 (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
6177 (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
6178
6179 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6180 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6181
26c0f03f 6182 if (direct_mask) {
b481de9c
ZY		 6183 IWL_DEBUG_SCAN
6184 ("Initiating direct scan for %s.\n",
bb8c093b 6185 iwl4965_escape_essid(priv->essid, priv->essid_len));
26c0f03f
RC		 6186 scan->channel_count =
6187 iwl4965_get_channels_for_scan(
6188 priv, band, 1, /* active */
6189 direct_mask,
6190 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6191 } else {
b481de9c 6192 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
26c0f03f
RC		 6193 scan->channel_count =
6194 iwl4965_get_channels_for_scan(
6195 priv, band, 0, /* passive */
6196 direct_mask,
6197 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6198 }
b481de9c
ZY		 6199
6200 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
bb8c093b 6201 scan->channel_count * sizeof(struct iwl4965_scan_channel);
b481de9c
ZY		 6202 cmd.data = scan;
6203 scan->len = cpu_to_le16(cmd.len);
6204
6205 set_bit(STATUS_SCAN_HW, &priv->status);
857485c0
TW		 6206 ret = iwl_send_cmd_sync(priv, &cmd);
6207 if (ret)
b481de9c
ZY		 6208 goto done;
6209
6210 queue_delayed_work(priv->workqueue, &priv->scan_check,
6211 IWL_SCAN_CHECK_WATCHDOG);
6212
6213 mutex_unlock(&priv->mutex);
6214 return;
6215
6216 done:
01ebd063 6217 /* inform mac80211 scan aborted */
b481de9c
ZY		 6218 queue_work(priv->workqueue, &priv->scan_completed);
6219 mutex_unlock(&priv->mutex);
6220}
6221
bb8c093b 6222static void iwl4965_bg_up(struct work_struct *data)
b481de9c 6223{
c79dd5b5 6224 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
b481de9c
ZY		 6225
6226 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6227 return;
6228
6229 mutex_lock(&priv->mutex);
bb8c093b 6230 __iwl4965_up(priv);
b481de9c
ZY		 6231 mutex_unlock(&priv->mutex);
6232}
6233
bb8c093b 6234static void iwl4965_bg_restart(struct work_struct *data)
b481de9c 6235{
c79dd5b5 6236 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
b481de9c
ZY		 6237
6238 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6239 return;
6240
bb8c093b 6241 iwl4965_down(priv);
b481de9c
ZY		 6242 queue_work(priv->workqueue, &priv->up);
6243}
6244
bb8c093b 6245static void iwl4965_bg_rx_replenish(struct work_struct *data)
b481de9c 6246{
c79dd5b5
TW		 6247 struct iwl_priv *priv =
6248 container_of(data, struct iwl_priv, rx_replenish);
b481de9c
ZY		 6249
6250 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6251 return;
6252
6253 mutex_lock(&priv->mutex);
bb8c093b 6254 iwl4965_rx_replenish(priv);
b481de9c
ZY		 6255 mutex_unlock(&priv->mutex);
6256}
6257
7878a5a4
MA		 6258#define IWL_DELAY_NEXT_SCAN (HZ*2)
6259
bb8c093b 6260static void iwl4965_bg_post_associate(struct work_struct *data)
b481de9c 6261{
c79dd5b5 6262 struct iwl_priv *priv = container_of(data, struct iwl_priv,
b481de9c 6263 post_associate.work);
b481de9c 6264 struct ieee80211_conf *conf = NULL;
857485c0 6265 int ret = 0;
0795af57 6266 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 6267
6268 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6269 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6270 return;
6271 }
6272
0795af57
JP		 6273 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6274 priv->assoc_id,
6275 print_mac(mac, priv->active_rxon.bssid_addr));
b481de9c
ZY		 6276
6277
6278 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6279 return;
6280
6281 mutex_lock(&priv->mutex);
6282
32bfd35d 6283 if (!priv->vif || !priv->is_open) {
948c171c
MA		 6284 mutex_unlock(&priv->mutex);
6285 return;
6286 }
bb8c093b 6287 iwl4965_scan_cancel_timeout(priv, 200);
052c4b9f 6288
b481de9c
ZY		 6289 conf = ieee80211_get_hw_conf(priv->hw);
6290
6291 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6292 iwl4965_commit_rxon(priv);
b481de9c 6293
bb8c093b
CH		 6294 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6295 iwl4965_setup_rxon_timing(priv);
857485c0 6296 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 6297 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 6298 if (ret)
b481de9c
ZY		 6299 IWL_WARNING("REPLY_RXON_TIMING failed - "
6300 "Attempting to continue.\n");
6301
6302 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6303
c8b0e6e1 6304#ifdef CONFIG_IWL4965_HT
fd105e79
RR		 6305 if (priv->current_ht_config.is_ht)
6306 iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
c8b0e6e1 6307#endif /* CONFIG_IWL4965_HT*/
b481de9c
ZY		 6308 iwl4965_set_rxon_chain(priv);
6309 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6310
6311 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6312 priv->assoc_id, priv->beacon_int);
6313
6314 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6315 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6316 else
6317 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6318
6319 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6320 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6321 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6322 else
6323 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6324
6325 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6326 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6327
6328 }
6329
bb8c093b 6330 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6331
6332 switch (priv->iw_mode) {
6333 case IEEE80211_IF_TYPE_STA:
bb8c093b 6334 iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
b481de9c
ZY		 6335 break;
6336
6337 case IEEE80211_IF_TYPE_IBSS:
6338
6339 /* clear out the station table */
bf85ea4f 6340 iwlcore_clear_stations_table(priv);
b481de9c 6341
bb8c093b
CH		 6342 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
6343 iwl4965_rxon_add_station(priv, priv->bssid, 0);
6344 iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
6345 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 6346
6347 break;
6348
6349 default:
6350 IWL_ERROR("%s Should not be called in %d mode\n",
6351 __FUNCTION__, priv->iw_mode);
6352 break;
6353 }
6354
bb8c093b 6355 iwl4965_sequence_reset(priv);
b481de9c 6356
c8b0e6e1 6357#ifdef CONFIG_IWL4965_SENSITIVITY
b481de9c
ZY		 6358 /* Enable Rx differential gain and sensitivity calibrations */
6359 iwl4965_chain_noise_reset(priv);
6360 priv->start_calib = 1;
c8b0e6e1 6361#endif /* CONFIG_IWL4965_SENSITIVITY */
b481de9c
ZY		 6362
6363 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6364 priv->assoc_station_added = 1;
6365
bb8c093b 6366 iwl4965_activate_qos(priv, 0);
292ae174 6367
7878a5a4
MA		 6368 /* we have just associated, don't start scan too early */
6369 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
b481de9c
ZY		 6370 mutex_unlock(&priv->mutex);
6371}
6372
bb8c093b 6373static void iwl4965_bg_abort_scan(struct work_struct *work)
b481de9c 6374{
c79dd5b5 6375 struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
b481de9c 6376
bb8c093b 6377 if (!iwl4965_is_ready(priv))
b481de9c
ZY		 6378 return;
6379
6380 mutex_lock(&priv->mutex);
6381
6382 set_bit(STATUS_SCAN_ABORTING, &priv->status);
bb8c093b 6383 iwl4965_send_scan_abort(priv);
b481de9c
ZY		 6384
6385 mutex_unlock(&priv->mutex);
6386}
6387
76bb77e0
ZY		 6388static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6389
bb8c093b 6390static void iwl4965_bg_scan_completed(struct work_struct *work)
b481de9c 6391{
c79dd5b5
TW		 6392 struct iwl_priv *priv =
6393 container_of(work, struct iwl_priv, scan_completed);
b481de9c
ZY		 6394
6395 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6396
6397 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6398 return;
6399
a0646470
ZY		 6400 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6401 iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
76bb77e0 6402
b481de9c
ZY		 6403 ieee80211_scan_completed(priv->hw);
6404
6405 /* Since setting the TXPOWER may have been deferred while
6406 * performing the scan, fire one off */
6407 mutex_lock(&priv->mutex);
bb8c093b 6408 iwl4965_hw_reg_send_txpower(priv);
b481de9c
ZY		 6409 mutex_unlock(&priv->mutex);
6410}
6411
6412/*****************************************************************************
6413 *
6414 * mac80211 entry point functions
6415 *
6416 *****************************************************************************/
6417
5a66926a
ZY		 6418#define UCODE_READY_TIMEOUT (2 * HZ)
6419
bb8c093b 6420static int iwl4965_mac_start(struct ieee80211_hw *hw)
b481de9c 6421{
c79dd5b5 6422 struct iwl_priv *priv = hw->priv;
5a66926a 6423 int ret;
b481de9c
ZY		 6424
6425 IWL_DEBUG_MAC80211("enter\n");
6426
5a66926a
ZY		 6427 if (pci_enable_device(priv->pci_dev)) {
6428 IWL_ERROR("Fail to pci_enable_device\n");
6429 return -ENODEV;
6430 }
6431 pci_restore_state(priv->pci_dev);
6432 pci_enable_msi(priv->pci_dev);
6433
6434 ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
6435 DRV_NAME, priv);
6436 if (ret) {
6437 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6438 goto out_disable_msi;
6439 }
6440
b481de9c
ZY		 6441 /* we should be verifying the device is ready to be opened */
6442 mutex_lock(&priv->mutex);
6443
5a66926a
ZY		 6444 memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
6445 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6446 * ucode filename and max sizes are card-specific. */
b481de9c 6447
5a66926a
ZY		 6448 if (!priv->ucode_code.len) {
6449 ret = iwl4965_read_ucode(priv);
6450 if (ret) {
6451 IWL_ERROR("Could not read microcode: %d\n", ret);
6452 mutex_unlock(&priv->mutex);
6453 goto out_release_irq;
6454 }
6455 }
b481de9c 6456
e655b9f0 6457 ret = __iwl4965_up(priv);
5a66926a 6458
b481de9c 6459 mutex_unlock(&priv->mutex);
5a66926a 6460
e655b9f0
ZY		 6461 if (ret)
6462 goto out_release_irq;
6463
6464 IWL_DEBUG_INFO("Start UP work done.\n");
6465
6466 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6467 return 0;
6468
5a66926a
ZY		 6469 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6470 * mac80211 will not be run successfully. */
6471 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6472 test_bit(STATUS_READY, &priv->status),
6473 UCODE_READY_TIMEOUT);
6474 if (!ret) {
6475 if (!test_bit(STATUS_READY, &priv->status)) {
6476 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6477 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6478 ret = -ETIMEDOUT;
6479 goto out_release_irq;
6480 }
6481 }
6482
e655b9f0 6483 priv->is_open = 1;
b481de9c
ZY		 6484 IWL_DEBUG_MAC80211("leave\n");
6485 return 0;
5a66926a
ZY		 6486
6487out_release_irq:
6488 free_irq(priv->pci_dev->irq, priv);
6489out_disable_msi:
6490 pci_disable_msi(priv->pci_dev);
e655b9f0
ZY		 6491 pci_disable_device(priv->pci_dev);
6492 priv->is_open = 0;
6493 IWL_DEBUG_MAC80211("leave - failed\n");
5a66926a 6494 return ret;
b481de9c
ZY		 6495}
6496
bb8c093b 6497static void iwl4965_mac_stop(struct ieee80211_hw *hw)
b481de9c 6498{
c79dd5b5 6499 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6500
6501 IWL_DEBUG_MAC80211("enter\n");
948c171c 6502
e655b9f0
ZY		 6503 if (!priv->is_open) {
6504 IWL_DEBUG_MAC80211("leave - skip\n");
6505 return;
6506 }
6507
b481de9c 6508 priv->is_open = 0;
5a66926a
ZY		 6509
6510 if (iwl4965_is_ready_rf(priv)) {
e655b9f0
ZY		 6511 /* stop mac, cancel any scan request and clear
6512 * RXON_FILTER_ASSOC_MSK BIT
6513 */
5a66926a
ZY		 6514 mutex_lock(&priv->mutex);
6515 iwl4965_scan_cancel_timeout(priv, 100);
6516 cancel_delayed_work(&priv->post_associate);
fde3571f 6517 mutex_unlock(&priv->mutex);
fde3571f
MA		 6518 }
6519
5a66926a
ZY		 6520 iwl4965_down(priv);
6521
6522 flush_workqueue(priv->workqueue);
6523 free_irq(priv->pci_dev->irq, priv);
6524 pci_disable_msi(priv->pci_dev);
6525 pci_save_state(priv->pci_dev);
6526 pci_disable_device(priv->pci_dev);
948c171c 6527
b481de9c 6528 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 6529}
6530
bb8c093b 6531static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 6532 struct ieee80211_tx_control *ctl)
6533{
c79dd5b5 6534 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6535
6536 IWL_DEBUG_MAC80211("enter\n");
6537
6538 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6539 IWL_DEBUG_MAC80211("leave - monitor\n");
6540 return -1;
6541 }
6542
6543 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
8318d78a 6544 ctl->tx_rate->bitrate);
b481de9c 6545
bb8c093b 6546 if (iwl4965_tx_skb(priv, skb, ctl))
b481de9c
ZY		 6547 dev_kfree_skb_any(skb);
6548
6549 IWL_DEBUG_MAC80211("leave\n");
6550 return 0;
6551}
6552
bb8c093b 6553static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 6554 struct ieee80211_if_init_conf *conf)
6555{
c79dd5b5 6556 struct iwl_priv *priv = hw->priv;
b481de9c 6557 unsigned long flags;
0795af57 6558 DECLARE_MAC_BUF(mac);
b481de9c 6559
32bfd35d 6560 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
b481de9c 6561
32bfd35d
JB		 6562 if (priv->vif) {
6563 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
75849d28 6564 return -EOPNOTSUPP;
b481de9c
ZY		 6565 }
6566
6567 spin_lock_irqsave(&priv->lock, flags);
32bfd35d 6568 priv->vif = conf->vif;
b481de9c
ZY		 6569
6570 spin_unlock_irqrestore(&priv->lock, flags);
6571
6572 mutex_lock(&priv->mutex);
864792e3
TW		 6573
6574 if (conf->mac_addr) {
6575 IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
6576 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6577 }
b481de9c 6578
5a66926a
ZY		 6579 if (iwl4965_is_ready(priv))
6580 iwl4965_set_mode(priv, conf->type);
6581
b481de9c
ZY		 6582 mutex_unlock(&priv->mutex);
6583
5a66926a 6584 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 6585 return 0;
6586}
6587
6588/**
bb8c093b 6589 * iwl4965_mac_config - mac80211 config callback
b481de9c
ZY		 6590 *
6591 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6592 * be set inappropriately and the driver currently sets the hardware up to
6593 * use it whenever needed.
6594 */
bb8c093b 6595static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
b481de9c 6596{
c79dd5b5 6597 struct iwl_priv *priv = hw->priv;
bf85ea4f 6598 const struct iwl_channel_info *ch_info;
b481de9c 6599 unsigned long flags;
76bb77e0 6600 int ret = 0;
b481de9c
ZY		 6601
6602 mutex_lock(&priv->mutex);
8318d78a 6603 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
b481de9c 6604
12342c47
ZY		 6605 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6606
bb8c093b 6607 if (!iwl4965_is_ready(priv)) {
b481de9c 6608 IWL_DEBUG_MAC80211("leave - not ready\n");
76bb77e0
ZY		 6609 ret = -EIO;
6610 goto out;
b481de9c
ZY		 6611 }
6612
1ea87396 6613 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
b481de9c 6614 test_bit(STATUS_SCANNING, &priv->status))) {
a0646470
ZY		 6615 IWL_DEBUG_MAC80211("leave - scanning\n");
6616 set_bit(STATUS_CONF_PENDING, &priv->status);
b481de9c 6617 mutex_unlock(&priv->mutex);
a0646470 6618 return 0;
b481de9c
ZY		 6619 }
6620
6621 spin_lock_irqsave(&priv->lock, flags);
6622
8622e705 6623 ch_info = iwl_get_channel_info(priv, conf->channel->band,
8318d78a 6624 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6625 if (!is_channel_valid(ch_info)) {
b481de9c
ZY		 6626 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6627 spin_unlock_irqrestore(&priv->lock, flags);
76bb77e0
ZY		 6628 ret = -EINVAL;
6629 goto out;
b481de9c
ZY		 6630 }
6631
c8b0e6e1 6632#ifdef CONFIG_IWL4965_HT
78330fdd 6633 /* if we are switching from ht to 2.4 clear flags
b481de9c
ZY		 6634 * from any ht related info since 2.4 does not
6635 * support ht */
78330fdd 6636 if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
b481de9c
ZY		 6637#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6638 && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
6639#endif
6640 )
6641 priv->staging_rxon.flags = 0;
c8b0e6e1 6642#endif /* CONFIG_IWL4965_HT */
b481de9c 6643
bf85ea4f 6644 iwlcore_set_rxon_channel(priv, conf->channel->band,
8318d78a 6645 ieee80211_frequency_to_channel(conf->channel->center_freq));
b481de9c 6646
8318d78a 6647 iwl4965_set_flags_for_phymode(priv, conf->channel->band);
b481de9c
ZY		 6648
6649 /* The list of supported rates and rate mask can be different
8318d78a 6650 * for each band; since the band may have changed, reset
b481de9c 6651 * the rate mask to what mac80211 lists */
bb8c093b 6652 iwl4965_set_rate(priv);
b481de9c
ZY		 6653
6654 spin_unlock_irqrestore(&priv->lock, flags);
6655
6656#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6657 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
bb8c093b 6658 iwl4965_hw_channel_switch(priv, conf->channel);
76bb77e0 6659 goto out;
b481de9c
ZY		 6660 }
6661#endif
6662
bb8c093b 6663 iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
b481de9c
ZY		 6664
6665 if (!conf->radio_enabled) {
6666 IWL_DEBUG_MAC80211("leave - radio disabled\n");
76bb77e0 6667 goto out;
b481de9c
ZY		 6668 }
6669
bb8c093b 6670 if (iwl4965_is_rfkill(priv)) {
b481de9c 6671 IWL_DEBUG_MAC80211("leave - RF kill\n");
76bb77e0
ZY		 6672 ret = -EIO;
6673 goto out;
b481de9c
ZY		 6674 }
6675
bb8c093b 6676 iwl4965_set_rate(priv);
b481de9c
ZY		 6677
6678 if (memcmp(&priv->active_rxon,
6679 &priv->staging_rxon, sizeof(priv->staging_rxon)))
bb8c093b 6680 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6681 else
6682 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6683
6684 IWL_DEBUG_MAC80211("leave\n");
6685
a0646470
ZY		 6686out:
6687 clear_bit(STATUS_CONF_PENDING, &priv->status);
5a66926a 6688 mutex_unlock(&priv->mutex);
76bb77e0 6689 return ret;
b481de9c
ZY		 6690}
6691
c79dd5b5 6692static void iwl4965_config_ap(struct iwl_priv *priv)
b481de9c 6693{
857485c0 6694 int ret = 0;
b481de9c 6695
d986bcd1 6696 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
b481de9c
ZY		 6697 return;
6698
6699 /* The following should be done only at AP bring up */
6700 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6701
6702 /* RXON - unassoc (to set timing command) */
6703 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6704 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6705
6706 /* RXON Timing */
bb8c093b
CH		 6707 memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
6708 iwl4965_setup_rxon_timing(priv);
857485c0 6709 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
b481de9c 6710 sizeof(priv->rxon_timing), &priv->rxon_timing);
857485c0 6711 if (ret)
b481de9c
ZY		 6712 IWL_WARNING("REPLY_RXON_TIMING failed - "
6713 "Attempting to continue.\n");
6714
6715 iwl4965_set_rxon_chain(priv);
6716
6717 /* FIXME: what should be the assoc_id for AP? */
6718 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6719 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6720 priv->staging_rxon.flags |=
6721 RXON_FLG_SHORT_PREAMBLE_MSK;
6722 else
6723 priv->staging_rxon.flags &=
6724 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6725
6726 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6727 if (priv->assoc_capability &
6728 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6729 priv->staging_rxon.flags |=
6730 RXON_FLG_SHORT_SLOT_MSK;
6731 else
6732 priv->staging_rxon.flags &=
6733 ~RXON_FLG_SHORT_SLOT_MSK;
6734
6735 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6736 priv->staging_rxon.flags &=
6737 ~RXON_FLG_SHORT_SLOT_MSK;
6738 }
6739 /* restore RXON assoc */
6740 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
bb8c093b 6741 iwl4965_commit_rxon(priv);
bb8c093b 6742 iwl4965_activate_qos(priv, 1);
bb8c093b 6743 iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
e1493deb 6744 }
bb8c093b 6745 iwl4965_send_beacon_cmd(priv);
b481de9c
ZY		 6746
6747 /* FIXME - we need to add code here to detect a totally new
6748 * configuration, reset the AP, unassoc, rxon timing, assoc,
6749 * clear sta table, add BCAST sta... */
6750}
6751
32bfd35d
JB		 6752static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
6753 struct ieee80211_vif *vif,
b481de9c
ZY		 6754 struct ieee80211_if_conf *conf)
6755{
c79dd5b5 6756 struct iwl_priv *priv = hw->priv;
0795af57 6757 DECLARE_MAC_BUF(mac);
b481de9c
ZY		 6758 unsigned long flags;
6759 int rc;
6760
6761 if (conf == NULL)
6762 return -EIO;
6763
b716bb91
EG		 6764 if (priv->vif != vif) {
6765 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6766 mutex_unlock(&priv->mutex);
6767 return 0;
6768 }
6769
b481de9c
ZY		 6770 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6771 (!conf->beacon || !conf->ssid_len)) {
6772 IWL_DEBUG_MAC80211
6773 ("Leaving in AP mode because HostAPD is not ready.\n");
6774 return 0;
6775 }
6776
5a66926a
ZY		 6777 if (!iwl4965_is_alive(priv))
6778 return -EAGAIN;
6779
b481de9c
ZY		 6780 mutex_lock(&priv->mutex);
6781
b481de9c 6782 if (conf->bssid)
0795af57
JP		 6783 IWL_DEBUG_MAC80211("bssid: %s\n",
6784 print_mac(mac, conf->bssid));
b481de9c 6785
4150c572
JB		 6786/*
6787 * very dubious code was here; the probe filtering flag is never set:
6788 *
b481de9c
ZY		 6789 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6790 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
4150c572 6791 */
b481de9c
ZY		 6792
6793 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6794 if (!conf->bssid) {
6795 conf->bssid = priv->mac_addr;
6796 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
0795af57
JP		 6797 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6798 print_mac(mac, conf->bssid));
b481de9c
ZY		 6799 }
6800 if (priv->ibss_beacon)
6801 dev_kfree_skb(priv->ibss_beacon);
6802
6803 priv->ibss_beacon = conf->beacon;
6804 }
6805
fde3571f
MA		 6806 if (iwl4965_is_rfkill(priv))
6807 goto done;
6808
b481de9c
ZY		 6809 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6810 !is_multicast_ether_addr(conf->bssid)) {
6811 /* If there is currently a HW scan going on in the background
6812 * then we need to cancel it else the RXON below will fail. */
bb8c093b 6813 if (iwl4965_scan_cancel_timeout(priv, 100)) {
b481de9c
ZY		 6814 IWL_WARNING("Aborted scan still in progress "
6815 "after 100ms\n");
6816 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6817 mutex_unlock(&priv->mutex);
6818 return -EAGAIN;
6819 }
6820 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6821
6822 /* TODO: Audit driver for usage of these members and see
6823 * if mac80211 deprecates them (priv->bssid looks like it
6824 * shouldn't be there, but I haven't scanned the IBSS code
6825 * to verify) - jpk */
6826 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6827
6828 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b 6829 iwl4965_config_ap(priv);
b481de9c 6830 else {
bb8c093b 6831 rc = iwl4965_commit_rxon(priv);
b481de9c 6832 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
bb8c093b 6833 iwl4965_rxon_add_station(
b481de9c
ZY		 6834 priv, priv->active_rxon.bssid_addr, 1);
6835 }
6836
6837 } else {
bb8c093b 6838 iwl4965_scan_cancel_timeout(priv, 100);
b481de9c 6839 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 6840 iwl4965_commit_rxon(priv);
b481de9c
ZY		 6841 }
6842
fde3571f 6843 done:
b481de9c
ZY		 6844 spin_lock_irqsave(&priv->lock, flags);
6845 if (!conf->ssid_len)
6846 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6847 else
6848 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6849
6850 priv->essid_len = conf->ssid_len;
6851 spin_unlock_irqrestore(&priv->lock, flags);
6852
6853 IWL_DEBUG_MAC80211("leave\n");
6854 mutex_unlock(&priv->mutex);
6855
6856 return 0;
6857}
6858
bb8c093b 6859static void iwl4965_configure_filter(struct ieee80211_hw *hw,
4150c572
JB		 6860 unsigned int changed_flags,
6861 unsigned int *total_flags,
6862 int mc_count, struct dev_addr_list *mc_list)
6863{
6864 /*
6865 * XXX: dummy
bb8c093b 6866 * see also iwl4965_connection_init_rx_config
4150c572
JB		 6867 */
6868 *total_flags = 0;
6869}
6870
bb8c093b 6871static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
b481de9c
ZY		 6872 struct ieee80211_if_init_conf *conf)
6873{
c79dd5b5 6874 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6875
6876 IWL_DEBUG_MAC80211("enter\n");
6877
6878 mutex_lock(&priv->mutex);
948c171c 6879
fde3571f
MA		 6880 if (iwl4965_is_ready_rf(priv)) {
6881 iwl4965_scan_cancel_timeout(priv, 100);
6882 cancel_delayed_work(&priv->post_associate);
6883 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6884 iwl4965_commit_rxon(priv);
6885 }
32bfd35d
JB		 6886 if (priv->vif == conf->vif) {
6887 priv->vif = NULL;
b481de9c
ZY		 6888 memset(priv->bssid, 0, ETH_ALEN);
6889 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6890 priv->essid_len = 0;
6891 }
6892 mutex_unlock(&priv->mutex);
6893
6894 IWL_DEBUG_MAC80211("leave\n");
6895
6896}
471b3efd
JB		 6897
6898static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
6899 struct ieee80211_vif *vif,
6900 struct ieee80211_bss_conf *bss_conf,
6901 u32 changes)
220173b0 6902{
c79dd5b5 6903 struct iwl_priv *priv = hw->priv;
220173b0 6904
471b3efd
JB		 6905 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
6906 if (bss_conf->use_short_preamble)
220173b0
TW		 6907 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6908 else
6909 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6910 }
6911
471b3efd 6912 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
8318d78a 6913 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
220173b0
TW		 6914 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
6915 else
6916 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
6917 }
6918
471b3efd
JB		 6919 if (changes & BSS_CHANGED_ASSOC) {
6920 /*
6921 * TODO:
6922 * do stuff instead of sniffing assoc resp
6923 */
6924 }
6925
bb8c093b
CH		 6926 if (iwl4965_is_associated(priv))
6927 iwl4965_send_rxon_assoc(priv);
220173b0 6928}
b481de9c 6929
bb8c093b 6930static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
b481de9c
ZY		 6931{
6932 int rc = 0;
6933 unsigned long flags;
c79dd5b5 6934 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 6935
6936 IWL_DEBUG_MAC80211("enter\n");
6937
052c4b9f 6938 mutex_lock(&priv->mutex);
b481de9c
ZY		 6939 spin_lock_irqsave(&priv->lock, flags);
6940
bb8c093b 6941 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 6942 rc = -EIO;
6943 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
6944 goto out_unlock;
6945 }
6946
6947 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
6948 rc = -EIO;
6949 IWL_ERROR("ERROR: APs don't scan\n");
6950 goto out_unlock;
6951 }
6952
7878a5a4
MA		 6953 /* we don't schedule scan within next_scan_jiffies period */
6954 if (priv->next_scan_jiffies &&
6955 time_after(priv->next_scan_jiffies, jiffies)) {
6956 rc = -EAGAIN;
6957 goto out_unlock;
6958 }
b481de9c 6959 /* if we just finished scan ask for delay */
7878a5a4
MA		 6960 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
6961 IWL_DELAY_NEXT_SCAN, jiffies)) {
b481de9c
ZY		 6962 rc = -EAGAIN;
6963 goto out_unlock;
6964 }
6965 if (len) {
7878a5a4 6966 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
bb8c093b 6967 iwl4965_escape_essid(ssid, len), (int)len);
b481de9c
ZY		 6968
6969 priv->one_direct_scan = 1;
6970 priv->direct_ssid_len = (u8)
6971 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
6972 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
948c171c
MA		 6973 } else
6974 priv->one_direct_scan = 0;
b481de9c 6975
bb8c093b 6976 rc = iwl4965_scan_initiate(priv);
b481de9c
ZY		 6977
6978 IWL_DEBUG_MAC80211("leave\n");
6979
6980out_unlock:
6981 spin_unlock_irqrestore(&priv->lock, flags);
052c4b9f 6982 mutex_unlock(&priv->mutex);
b481de9c
ZY		 6983
6984 return rc;
6985}
6986
ab885f8c
EG		 6987static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
6988 struct ieee80211_key_conf *keyconf, const u8 *addr,
6989 u32 iv32, u16 *phase1key)
6990{
6991 struct iwl_priv *priv = hw->priv;
6992 u8 sta_id = IWL_INVALID_STATION;
6993 unsigned long flags;
6994 __le16 key_flags = 0;
6995 int i;
6996 DECLARE_MAC_BUF(mac);
6997
6998 IWL_DEBUG_MAC80211("enter\n");
6999
7000 sta_id = iwl4965_hw_find_station(priv, addr);
7001 if (sta_id == IWL_INVALID_STATION) {
7002 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7003 print_mac(mac, addr));
7004 return;
7005 }
7006
7007 iwl4965_scan_cancel_timeout(priv, 100);
7008
7009 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
7010 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
7011 key_flags &= ~STA_KEY_FLG_INVALID;
7012
7013 if (sta_id == priv->hw_setting.bcast_sta_id)
7014 key_flags |= STA_KEY_MULTICAST_MSK;
7015
7016 spin_lock_irqsave(&priv->sta_lock, flags);
7017
7018 priv->stations[sta_id].sta.key.key_offset =
7019 (sta_id % STA_KEY_MAX_NUM);/* FIXME */
7020 priv->stations[sta_id].sta.key.key_flags = key_flags;
7021 priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
7022
7023 for (i = 0; i < 5; i++)
7024 priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
7025 cpu_to_le16(phase1key[i]);
7026
7027 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
7028 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
7029
7030 iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
7031
7032 spin_unlock_irqrestore(&priv->sta_lock, flags);
7033
7034 IWL_DEBUG_MAC80211("leave\n");
7035}
7036
bb8c093b 7037static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
b481de9c
ZY		 7038 const u8 *local_addr, const u8 *addr,
7039 struct ieee80211_key_conf *key)
7040{
c79dd5b5 7041 struct iwl_priv *priv = hw->priv;
0795af57 7042 DECLARE_MAC_BUF(mac);
deb09c43
EG		 7043 int ret = 0;
7044 u8 sta_id = IWL_INVALID_STATION;
7045 u8 static_key;
b481de9c
ZY		 7046
7047 IWL_DEBUG_MAC80211("enter\n");
7048
1ea87396 7049 if (!priv->cfg->mod_params->hw_crypto) {
b481de9c
ZY		 7050 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7051 return -EOPNOTSUPP;
7052 }
7053
7054 if (is_zero_ether_addr(addr))
7055 /* only support pairwise keys */
7056 return -EOPNOTSUPP;
7057
deb09c43
EG		 7058 /* FIXME: need to differenciate between static and dynamic key
7059 * in the level of mac80211 */
7060 static_key = !iwl4965_is_associated(priv);
b481de9c 7061
deb09c43
EG		 7062 if (!static_key) {
7063 sta_id = iwl4965_hw_find_station(priv, addr);
7064 if (sta_id == IWL_INVALID_STATION) {
7065 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7066 print_mac(mac, addr));
7067 return -EINVAL;
7068 }
7069 }
b481de9c 7070
bb8c093b 7071 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7072
b481de9c 7073 switch (cmd) {
deb09c43
EG		 7074 case SET_KEY:
7075 if (static_key)
7076 ret = iwl4965_set_static_key(priv, key);
7077 else
7078 ret = iwl4965_set_dynamic_key(priv, key, sta_id);
7079
7080 IWL_DEBUG_MAC80211("enable hwcrypto key\n");
b481de9c
ZY		 7081 break;
7082 case DISABLE_KEY:
deb09c43
EG		 7083 if (static_key)
7084 ret = iwl4965_remove_static_key(priv);
7085 else
7086 ret = iwl4965_clear_sta_key_info(priv, sta_id);
7087
7088 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
b481de9c
ZY		 7089 break;
7090 default:
deb09c43 7091 ret = -EINVAL;
b481de9c
ZY		 7092 }
7093
7094 IWL_DEBUG_MAC80211("leave\n");
b481de9c 7095
deb09c43 7096 return ret;
b481de9c
ZY		 7097}
7098
bb8c093b 7099static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
b481de9c
ZY		 7100 const struct ieee80211_tx_queue_params *params)
7101{
c79dd5b5 7102 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7103 unsigned long flags;
7104 int q;
b481de9c
ZY		 7105
7106 IWL_DEBUG_MAC80211("enter\n");
7107
bb8c093b 7108 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7109 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7110 return -EIO;
7111 }
7112
7113 if (queue >= AC_NUM) {
7114 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7115 return 0;
7116 }
7117
b481de9c
ZY		 7118 if (!priv->qos_data.qos_enable) {
7119 priv->qos_data.qos_active = 0;
7120 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7121 return 0;
7122 }
7123 q = AC_NUM - 1 - queue;
7124
7125 spin_lock_irqsave(&priv->lock, flags);
7126
7127 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7128 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7129 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7130 priv->qos_data.def_qos_parm.ac[q].edca_txop =
3330d7be 7131 cpu_to_le16((params->txop * 32));
b481de9c
ZY		 7132
7133 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7134 priv->qos_data.qos_active = 1;
7135
7136 spin_unlock_irqrestore(&priv->lock, flags);
7137
7138 mutex_lock(&priv->mutex);
7139 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
bb8c093b
CH		 7140 iwl4965_activate_qos(priv, 1);
7141 else if (priv->assoc_id && iwl4965_is_associated(priv))
7142 iwl4965_activate_qos(priv, 0);
b481de9c
ZY		 7143
7144 mutex_unlock(&priv->mutex);
7145
b481de9c
ZY		 7146 IWL_DEBUG_MAC80211("leave\n");
7147 return 0;
7148}
7149
bb8c093b 7150static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7151 struct ieee80211_tx_queue_stats *stats)
7152{
c79dd5b5 7153 struct iwl_priv *priv = hw->priv;
b481de9c 7154 int i, avail;
bb8c093b
CH		 7155 struct iwl4965_tx_queue *txq;
7156 struct iwl4965_queue *q;
b481de9c
ZY		 7157 unsigned long flags;
7158
7159 IWL_DEBUG_MAC80211("enter\n");
7160
bb8c093b 7161 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7162 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7163 return -EIO;
7164 }
7165
7166 spin_lock_irqsave(&priv->lock, flags);
7167
7168 for (i = 0; i < AC_NUM; i++) {
7169 txq = &priv->txq[i];
7170 q = &txq->q;
bb8c093b 7171 avail = iwl4965_queue_space(q);
b481de9c
ZY		 7172
7173 stats->data[i].len = q->n_window - avail;
7174 stats->data[i].limit = q->n_window - q->high_mark;
7175 stats->data[i].count = q->n_window;
7176
7177 }
7178 spin_unlock_irqrestore(&priv->lock, flags);
7179
7180 IWL_DEBUG_MAC80211("leave\n");
7181
7182 return 0;
7183}
7184
bb8c093b 7185static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
b481de9c
ZY		 7186 struct ieee80211_low_level_stats *stats)
7187{
7188 IWL_DEBUG_MAC80211("enter\n");
7189 IWL_DEBUG_MAC80211("leave\n");
7190
7191 return 0;
7192}
7193
bb8c093b 7194static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
b481de9c
ZY		 7195{
7196 IWL_DEBUG_MAC80211("enter\n");
7197 IWL_DEBUG_MAC80211("leave\n");
7198
7199 return 0;
7200}
7201
bb8c093b 7202static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
b481de9c 7203{
c79dd5b5 7204 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7205 unsigned long flags;
7206
7207 mutex_lock(&priv->mutex);
7208 IWL_DEBUG_MAC80211("enter\n");
7209
7210 priv->lq_mngr.lq_ready = 0;
c8b0e6e1 7211#ifdef CONFIG_IWL4965_HT
b481de9c 7212 spin_lock_irqsave(&priv->lock, flags);
fd105e79 7213 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
b481de9c 7214 spin_unlock_irqrestore(&priv->lock, flags);
c8b0e6e1 7215#endif /* CONFIG_IWL4965_HT */
b481de9c 7216
bf85ea4f 7217 iwlcore_reset_qos(priv);
b481de9c
ZY		 7218
7219 cancel_delayed_work(&priv->post_associate);
7220
7221 spin_lock_irqsave(&priv->lock, flags);
7222 priv->assoc_id = 0;
7223 priv->assoc_capability = 0;
7224 priv->call_post_assoc_from_beacon = 0;
7225 priv->assoc_station_added = 0;
7226
7227 /* new association get rid of ibss beacon skb */
7228 if (priv->ibss_beacon)
7229 dev_kfree_skb(priv->ibss_beacon);
7230
7231 priv->ibss_beacon = NULL;
7232
7233 priv->beacon_int = priv->hw->conf.beacon_int;
7234 priv->timestamp1 = 0;
7235 priv->timestamp0 = 0;
7236 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7237 priv->beacon_int = 0;
7238
7239 spin_unlock_irqrestore(&priv->lock, flags);
7240
fde3571f
MA		 7241 if (!iwl4965_is_ready_rf(priv)) {
7242 IWL_DEBUG_MAC80211("leave - not ready\n");
7243 mutex_unlock(&priv->mutex);
7244 return;
7245 }
7246
052c4b9f 7247 /* we are restarting association process
7248 * clear RXON_FILTER_ASSOC_MSK bit
7249 */
7250 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
bb8c093b 7251 iwl4965_scan_cancel_timeout(priv, 100);
052c4b9f 7252 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
bb8c093b 7253 iwl4965_commit_rxon(priv);
052c4b9f 7254 }
7255
b481de9c
ZY		 7256 /* Per mac80211.h: This is only used in IBSS mode... */
7257 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
052c4b9f 7258
b481de9c
ZY		 7259 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7260 mutex_unlock(&priv->mutex);
7261 return;
7262 }
7263
b481de9c
ZY		 7264 priv->only_active_channel = 0;
7265
bb8c093b 7266 iwl4965_set_rate(priv);
b481de9c
ZY		 7267
7268 mutex_unlock(&priv->mutex);
7269
7270 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7271}
7272
bb8c093b 7273static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
b481de9c
ZY		 7274 struct ieee80211_tx_control *control)
7275{
c79dd5b5 7276 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7277 unsigned long flags;
7278
7279 mutex_lock(&priv->mutex);
7280 IWL_DEBUG_MAC80211("enter\n");
7281
bb8c093b 7282 if (!iwl4965_is_ready_rf(priv)) {
b481de9c
ZY		 7283 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7284 mutex_unlock(&priv->mutex);
7285 return -EIO;
7286 }
7287
7288 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7289 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7290 mutex_unlock(&priv->mutex);
7291 return -EIO;
7292 }
7293
7294 spin_lock_irqsave(&priv->lock, flags);
7295
7296 if (priv->ibss_beacon)
7297 dev_kfree_skb(priv->ibss_beacon);
7298
7299 priv->ibss_beacon = skb;
7300
7301 priv->assoc_id = 0;
7302
7303 IWL_DEBUG_MAC80211("leave\n");
7304 spin_unlock_irqrestore(&priv->lock, flags);
7305
bf85ea4f 7306 iwlcore_reset_qos(priv);
b481de9c
ZY		 7307
7308 queue_work(priv->workqueue, &priv->post_associate.work);
7309
7310 mutex_unlock(&priv->mutex);
7311
7312 return 0;
7313}
7314
c8b0e6e1 7315#ifdef CONFIG_IWL4965_HT
b481de9c 7316
fd105e79 7317static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
c79dd5b5 7318 struct iwl_priv *priv)
b481de9c 7319{
fd105e79
RR		 7320 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
7321 struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
7322 struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
b481de9c
ZY		 7323
7324 IWL_DEBUG_MAC80211("enter: \n");
7325
fd105e79
RR		 7326 if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
7327 iwl_conf->is_ht = 0;
7328 return;
b481de9c
ZY		 7329 }
7330
fd105e79
RR		 7331 iwl_conf->is_ht = 1;
7332 priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7333
7334 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
7335 iwl_conf->sgf |= 0x1;
7336 if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
7337 iwl_conf->sgf |= 0x2;
7338
7339 iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
7340 iwl_conf->max_amsdu_size =
7341 !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
134eb5d3 7342
fd105e79
RR		 7343 iwl_conf->supported_chan_width =
7344 !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
134eb5d3
GC		 7345 iwl_conf->extension_chan_offset =
7346 ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
7347 /* If no above or below channel supplied disable FAT channel */
7348 if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
7349 iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
7350 iwl_conf->supported_chan_width = 0;
7351
fd105e79
RR		 7352 iwl_conf->tx_mimo_ps_mode =
7353 (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
7354 memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
7355
7356 iwl_conf->control_channel = ht_bss_conf->primary_channel;
fd105e79
RR		 7357 iwl_conf->tx_chan_width =
7358 !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
7359 iwl_conf->ht_protection =
7360 ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
7361 iwl_conf->non_GF_STA_present =
7362 !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
7363
7364 IWL_DEBUG_MAC80211("control channel %d\n",
7365 iwl_conf->control_channel);
b481de9c 7366 IWL_DEBUG_MAC80211("leave\n");
b481de9c
ZY		 7367}
7368
bb8c093b 7369static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
fd105e79 7370 struct ieee80211_conf *conf)
b481de9c 7371{
c79dd5b5 7372 struct iwl_priv *priv = hw->priv;
b481de9c
ZY		 7373
7374 IWL_DEBUG_MAC80211("enter: \n");
7375
fd105e79 7376 iwl4965_ht_info_fill(conf, priv);
b481de9c
ZY		 7377 iwl4965_set_rxon_chain(priv);
7378
7379 if (priv && priv->assoc_id &&
7380 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
7381 unsigned long flags;
7382
7383 spin_lock_irqsave(&priv->lock, flags);
7384 if (priv->beacon_int)
7385 queue_work(priv->workqueue, &priv->post_associate.work);
7386 else
7387 priv->call_post_assoc_from_beacon = 1;
7388 spin_unlock_irqrestore(&priv->lock, flags);
7389 }
7390
fd105e79
RR		 7391 IWL_DEBUG_MAC80211("leave:\n");
7392 return 0;
b481de9c
ZY		 7393}
7394
c8b0e6e1 7395#endif /*CONFIG_IWL4965_HT*/
b481de9c
ZY		 7396
7397/*****************************************************************************
7398 *
7399 * sysfs attributes
7400 *
7401 *****************************************************************************/
7402
0a6857e7 7403#ifdef CONFIG_IWLWIFI_DEBUG
b481de9c
ZY		 7404
7405/*
7406 * The following adds a new attribute to the sysfs representation
7407 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7408 * used for controlling the debug level.
7409 *
7410 * See the level definitions in iwl for details.
7411 */
7412
7413static ssize_t show_debug_level(struct device_driver *d, char *buf)
7414{
0a6857e7 7415 return sprintf(buf, "0x%08X\n", iwl_debug_level);
b481de9c
ZY		 7416}
7417static ssize_t store_debug_level(struct device_driver *d,
7418 const char *buf, size_t count)
7419{
7420 char *p = (char *)buf;
7421 u32 val;
7422
7423 val = simple_strtoul(p, &p, 0);
7424 if (p == buf)
7425 printk(KERN_INFO DRV_NAME
7426 ": %s is not in hex or decimal form.\n", buf);
7427 else
0a6857e7 7428 iwl_debug_level = val;
b481de9c
ZY		 7429
7430 return strnlen(buf, count);
7431}
7432
7433static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7434 show_debug_level, store_debug_level);
7435
0a6857e7 7436#endif /* CONFIG_IWLWIFI_DEBUG */
b481de9c
ZY		 7437
7438static ssize_t show_rf_kill(struct device *d,
7439 struct device_attribute *attr, char *buf)
7440{
7441 /*
7442 * 0 - RF kill not enabled
7443 * 1 - SW based RF kill active (sysfs)
7444 * 2 - HW based RF kill active
7445 * 3 - Both HW and SW based RF kill active
7446 */
c79dd5b5 7447 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7448 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7449 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7450
7451 return sprintf(buf, "%i\n", val);
7452}
7453
7454static ssize_t store_rf_kill(struct device *d,
7455 struct device_attribute *attr,
7456 const char *buf, size_t count)
7457{
c79dd5b5 7458 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7459
7460 mutex_lock(&priv->mutex);
bb8c093b 7461 iwl4965_radio_kill_sw(priv, buf[0] == '1');
b481de9c
ZY		 7462 mutex_unlock(&priv->mutex);
7463
7464 return count;
7465}
7466
7467static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7468
7469static ssize_t show_temperature(struct device *d,
7470 struct device_attribute *attr, char *buf)
7471{
c79dd5b5 7472 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c 7473
bb8c093b 7474 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 7475 return -EAGAIN;
7476
bb8c093b 7477 return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
b481de9c
ZY		 7478}
7479
7480static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7481
7482static ssize_t show_rs_window(struct device *d,
7483 struct device_attribute *attr,
7484 char *buf)
7485{
c79dd5b5 7486 struct iwl_priv *priv = d->driver_data;
bb8c093b 7487 return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
b481de9c
ZY		 7488}
7489static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7490
7491static ssize_t show_tx_power(struct device *d,
7492 struct device_attribute *attr, char *buf)
7493{
c79dd5b5 7494 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7495 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7496}
7497
7498static ssize_t store_tx_power(struct device *d,
7499 struct device_attribute *attr,
7500 const char *buf, size_t count)
7501{
c79dd5b5 7502 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7503 char *p = (char *)buf;
7504 u32 val;
7505
7506 val = simple_strtoul(p, &p, 10);
7507 if (p == buf)
7508 printk(KERN_INFO DRV_NAME
7509 ": %s is not in decimal form.\n", buf);
7510 else
bb8c093b 7511 iwl4965_hw_reg_set_txpower(priv, val);
b481de9c
ZY		 7512
7513 return count;
7514}
7515
7516static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7517
7518static ssize_t show_flags(struct device *d,
7519 struct device_attribute *attr, char *buf)
7520{
c79dd5b5 7521 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7522
7523 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7524}
7525
7526static ssize_t store_flags(struct device *d,
7527 struct device_attribute *attr,
7528 const char *buf, size_t count)
7529{
c79dd5b5 7530 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7531 u32 flags = simple_strtoul(buf, NULL, 0);
7532
7533 mutex_lock(&priv->mutex);
7534 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7535 /* Cancel any currently running scans... */
bb8c093b 7536 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 7537 IWL_WARNING("Could not cancel scan.\n");
7538 else {
7539 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7540 flags);
7541 priv->staging_rxon.flags = cpu_to_le32(flags);
bb8c093b 7542 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7543 }
7544 }
7545 mutex_unlock(&priv->mutex);
7546
7547 return count;
7548}
7549
7550static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7551
7552static ssize_t show_filter_flags(struct device *d,
7553 struct device_attribute *attr, char *buf)
7554{
c79dd5b5 7555 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7556
7557 return sprintf(buf, "0x%04X\n",
7558 le32_to_cpu(priv->active_rxon.filter_flags));
7559}
7560
7561static ssize_t store_filter_flags(struct device *d,
7562 struct device_attribute *attr,
7563 const char *buf, size_t count)
7564{
c79dd5b5 7565 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
b481de9c
ZY		 7566 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7567
7568 mutex_lock(&priv->mutex);
7569 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7570 /* Cancel any currently running scans... */
bb8c093b 7571 if (iwl4965_scan_cancel_timeout(priv, 100))
b481de9c
ZY		 7572 IWL_WARNING("Could not cancel scan.\n");
7573 else {
7574 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7575 "0x%04X\n", filter_flags);
7576 priv->staging_rxon.filter_flags =
7577 cpu_to_le32(filter_flags);
bb8c093b 7578 iwl4965_commit_rxon(priv);
b481de9c
ZY		 7579 }
7580 }
7581 mutex_unlock(&priv->mutex);
7582
7583 return count;
7584}
7585
7586static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7587 store_filter_flags);
7588
c8b0e6e1 7589#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 7590
7591static ssize_t show_measurement(struct device *d,
7592 struct device_attribute *attr, char *buf)
7593{
c79dd5b5 7594 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7595 struct iwl4965_spectrum_notification measure_report;
b481de9c
ZY		 7596 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7597 u8 *data = (u8 *) & measure_report;
7598 unsigned long flags;
7599
7600 spin_lock_irqsave(&priv->lock, flags);
7601 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7602 spin_unlock_irqrestore(&priv->lock, flags);
7603 return 0;
7604 }
7605 memcpy(&measure_report, &priv->measure_report, size);
7606 priv->measurement_status = 0;
7607 spin_unlock_irqrestore(&priv->lock, flags);
7608
7609 while (size && (PAGE_SIZE - len)) {
7610 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7611 PAGE_SIZE - len, 1);
7612 len = strlen(buf);
7613 if (PAGE_SIZE - len)
7614 buf[len++] = '\n';
7615
7616 ofs += 16;
7617 size -= min(size, 16U);
7618 }
7619
7620 return len;
7621}
7622
7623static ssize_t store_measurement(struct device *d,
7624 struct device_attribute *attr,
7625 const char *buf, size_t count)
7626{
c79dd5b5 7627 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7628 struct ieee80211_measurement_params params = {
7629 .channel = le16_to_cpu(priv->active_rxon.channel),
7630 .start_time = cpu_to_le64(priv->last_tsf),
7631 .duration = cpu_to_le16(1),
7632 };
7633 u8 type = IWL_MEASURE_BASIC;
7634 u8 buffer[32];
7635 u8 channel;
7636
7637 if (count) {
7638 char *p = buffer;
7639 strncpy(buffer, buf, min(sizeof(buffer), count));
7640 channel = simple_strtoul(p, NULL, 0);
7641 if (channel)
7642 params.channel = channel;
7643
7644 p = buffer;
7645 while (*p && *p != ' ')
7646 p++;
7647 if (*p)
7648 type = simple_strtoul(p + 1, NULL, 0);
7649 }
7650
7651 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7652 "channel %d (for '%s')\n", type, params.channel, buf);
bb8c093b 7653 iwl4965_get_measurement(priv, &params, type);
b481de9c
ZY		 7654
7655 return count;
7656}
7657
7658static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7659 show_measurement, store_measurement);
c8b0e6e1 7660#endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
b481de9c
ZY		 7661
7662static ssize_t store_retry_rate(struct device *d,
7663 struct device_attribute *attr,
7664 const char *buf, size_t count)
7665{
c79dd5b5 7666 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7667
7668 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7669 if (priv->retry_rate <= 0)
7670 priv->retry_rate = 1;
7671
7672 return count;
7673}
7674
7675static ssize_t show_retry_rate(struct device *d,
7676 struct device_attribute *attr, char *buf)
7677{
c79dd5b5 7678 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7679 return sprintf(buf, "%d", priv->retry_rate);
7680}
7681
7682static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7683 store_retry_rate);
7684
7685static ssize_t store_power_level(struct device *d,
7686 struct device_attribute *attr,
7687 const char *buf, size_t count)
7688{
c79dd5b5 7689 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7690 int rc;
7691 int mode;
7692
7693 mode = simple_strtoul(buf, NULL, 0);
7694 mutex_lock(&priv->mutex);
7695
bb8c093b 7696 if (!iwl4965_is_ready(priv)) {
b481de9c
ZY		 7697 rc = -EAGAIN;
7698 goto out;
7699 }
7700
7701 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7702 mode = IWL_POWER_AC;
7703 else
7704 mode |= IWL_POWER_ENABLED;
7705
7706 if (mode != priv->power_mode) {
bb8c093b 7707 rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
b481de9c
ZY		 7708 if (rc) {
7709 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7710 goto out;
7711 }
7712 priv->power_mode = mode;
7713 }
7714
7715 rc = count;
7716
7717 out:
7718 mutex_unlock(&priv->mutex);
7719 return rc;
7720}
7721
7722#define MAX_WX_STRING 80
7723
7724/* Values are in microsecond */
7725static const s32 timeout_duration[] = {
7726 350000,
7727 250000,
7728 75000,
7729 37000,
7730 25000,
7731};
7732static const s32 period_duration[] = {
7733 400000,
7734 700000,
7735 1000000,
7736 1000000,
7737 1000000
7738};
7739
7740static ssize_t show_power_level(struct device *d,
7741 struct device_attribute *attr, char *buf)
7742{
c79dd5b5 7743 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7744 int level = IWL_POWER_LEVEL(priv->power_mode);
7745 char *p = buf;
7746
7747 p += sprintf(p, "%d ", level);
7748 switch (level) {
7749 case IWL_POWER_MODE_CAM:
7750 case IWL_POWER_AC:
7751 p += sprintf(p, "(AC)");
7752 break;
7753 case IWL_POWER_BATTERY:
7754 p += sprintf(p, "(BATTERY)");
7755 break;
7756 default:
7757 p += sprintf(p,
7758 "(Timeout %dms, Period %dms)",
7759 timeout_duration[level - 1] / 1000,
7760 period_duration[level - 1] / 1000);
7761 }
7762
7763 if (!(priv->power_mode & IWL_POWER_ENABLED))
7764 p += sprintf(p, " OFF\n");
7765 else
7766 p += sprintf(p, " \n");
7767
7768 return (p - buf + 1);
7769
7770}
7771
7772static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7773 store_power_level);
7774
7775static ssize_t show_channels(struct device *d,
7776 struct device_attribute *attr, char *buf)
7777{
8318d78a
JB		 7778 /* all this shit doesn't belong into sysfs anyway */
7779 return 0;
b481de9c
ZY		 7780}
7781
7782static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7783
7784static ssize_t show_statistics(struct device *d,
7785 struct device_attribute *attr, char *buf)
7786{
c79dd5b5 7787 struct iwl_priv *priv = dev_get_drvdata(d);
bb8c093b 7788 u32 size = sizeof(struct iwl4965_notif_statistics);
b481de9c
ZY		 7789 u32 len = 0, ofs = 0;
7790 u8 *data = (u8 *) & priv->statistics;
7791 int rc = 0;
7792
bb8c093b 7793 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 7794 return -EAGAIN;
7795
7796 mutex_lock(&priv->mutex);
bb8c093b 7797 rc = iwl4965_send_statistics_request(priv);
b481de9c
ZY		 7798 mutex_unlock(&priv->mutex);
7799
7800 if (rc) {
7801 len = sprintf(buf,
7802 "Error sending statistics request: 0x%08X\n", rc);
7803 return len;
7804 }
7805
7806 while (size && (PAGE_SIZE - len)) {
7807 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7808 PAGE_SIZE - len, 1);
7809 len = strlen(buf);
7810 if (PAGE_SIZE - len)
7811 buf[len++] = '\n';
7812
7813 ofs += 16;
7814 size -= min(size, 16U);
7815 }
7816
7817 return len;
7818}
7819
7820static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7821
7822static ssize_t show_antenna(struct device *d,
7823 struct device_attribute *attr, char *buf)
7824{
c79dd5b5 7825 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c 7826
bb8c093b 7827 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 7828 return -EAGAIN;
7829
7830 return sprintf(buf, "%d\n", priv->antenna);
7831}
7832
7833static ssize_t store_antenna(struct device *d,
7834 struct device_attribute *attr,
7835 const char *buf, size_t count)
7836{
7837 int ant;
c79dd5b5 7838 struct iwl_priv *priv = dev_get_drvdata(d);
b481de9c
ZY		 7839
7840 if (count == 0)
7841 return 0;
7842
7843 if (sscanf(buf, "%1i", &ant) != 1) {
7844 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7845 return count;
7846 }
7847
7848 if ((ant >= 0) && (ant <= 2)) {
7849 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
bb8c093b 7850 priv->antenna = (enum iwl4965_antenna)ant;
b481de9c
ZY		 7851 } else
7852 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7853
7854
7855 return count;
7856}
7857
7858static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7859
7860static ssize_t show_status(struct device *d,
7861 struct device_attribute *attr, char *buf)
7862{
c79dd5b5 7863 struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
bb8c093b 7864 if (!iwl4965_is_alive(priv))
b481de9c
ZY		 7865 return -EAGAIN;
7866 return sprintf(buf, "0x%08x\n", (int)priv->status);
7867}
7868
7869static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7870
7871static ssize_t dump_error_log(struct device *d,
7872 struct device_attribute *attr,
7873 const char *buf, size_t count)
7874{
7875 char *p = (char *)buf;
7876
7877 if (p[0] == '1')
c79dd5b5 7878 iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 7879
7880 return strnlen(buf, count);
7881}
7882
7883static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7884
7885static ssize_t dump_event_log(struct device *d,
7886 struct device_attribute *attr,
7887 const char *buf, size_t count)
7888{
7889 char *p = (char *)buf;
7890
7891 if (p[0] == '1')
c79dd5b5 7892 iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
b481de9c
ZY		 7893
7894 return strnlen(buf, count);
7895}
7896
7897static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7898
7899/*****************************************************************************
7900 *
7901 * driver setup and teardown
7902 *
7903 *****************************************************************************/
7904
c79dd5b5 7905static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
b481de9c
ZY		 7906{
7907 priv->workqueue = create_workqueue(DRV_NAME);
7908
7909 init_waitqueue_head(&priv->wait_command_queue);
7910
bb8c093b
CH		 7911 INIT_WORK(&priv->up, iwl4965_bg_up);
7912 INIT_WORK(&priv->restart, iwl4965_bg_restart);
7913 INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
7914 INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
7915 INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
7916 INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
7917 INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
7918 INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
7919 INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
7920 INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
7921 INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
7922 INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
7923
7924 iwl4965_hw_setup_deferred_work(priv);
b481de9c
ZY		 7925
7926 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
bb8c093b 7927 iwl4965_irq_tasklet, (unsigned long)priv);
b481de9c
ZY		 7928}
7929
c79dd5b5 7930static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
b481de9c 7931{
bb8c093b 7932 iwl4965_hw_cancel_deferred_work(priv);
b481de9c 7933
3ae6a054 7934 cancel_delayed_work_sync(&priv->init_alive_start);
b481de9c
ZY		 7935 cancel_delayed_work(&priv->scan_check);
7936 cancel_delayed_work(&priv->alive_start);
7937 cancel_delayed_work(&priv->post_associate);
7938 cancel_work_sync(&priv->beacon_update);
7939}
7940
bb8c093b 7941static struct attribute *iwl4965_sysfs_entries[] = {
b481de9c
ZY		 7942 &dev_attr_antenna.attr,
7943 &dev_attr_channels.attr,
7944 &dev_attr_dump_errors.attr,
7945 &dev_attr_dump_events.attr,
7946 &dev_attr_flags.attr,
7947 &dev_attr_filter_flags.attr,
c8b0e6e1 7948#ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
b481de9c
ZY		 7949 &dev_attr_measurement.attr,
7950#endif
7951 &dev_attr_power_level.attr,
7952 &dev_attr_retry_rate.attr,
7953 &dev_attr_rf_kill.attr,
7954 &dev_attr_rs_window.attr,
7955 &dev_attr_statistics.attr,
7956 &dev_attr_status.attr,
7957 &dev_attr_temperature.attr,
b481de9c
ZY		 7958 &dev_attr_tx_power.attr,
7959
7960 NULL
7961};
7962
bb8c093b 7963static struct attribute_group iwl4965_attribute_group = {
b481de9c 7964 .name = NULL, /* put in device directory */
bb8c093b 7965 .attrs = iwl4965_sysfs_entries,
b481de9c
ZY		 7966};
7967
bb8c093b
CH		 7968static struct ieee80211_ops iwl4965_hw_ops = {
7969 .tx = iwl4965_mac_tx,
7970 .start = iwl4965_mac_start,
7971 .stop = iwl4965_mac_stop,
7972 .add_interface = iwl4965_mac_add_interface,
7973 .remove_interface = iwl4965_mac_remove_interface,
7974 .config = iwl4965_mac_config,
7975 .config_interface = iwl4965_mac_config_interface,
7976 .configure_filter = iwl4965_configure_filter,
7977 .set_key = iwl4965_mac_set_key,
ab885f8c 7978 .update_tkip_key = iwl4965_mac_update_tkip_key,
bb8c093b
CH		 7979 .get_stats = iwl4965_mac_get_stats,
7980 .get_tx_stats = iwl4965_mac_get_tx_stats,
7981 .conf_tx = iwl4965_mac_conf_tx,
7982 .get_tsf = iwl4965_mac_get_tsf,
7983 .reset_tsf = iwl4965_mac_reset_tsf,
7984 .beacon_update = iwl4965_mac_beacon_update,
471b3efd 7985 .bss_info_changed = iwl4965_bss_info_changed,
c8b0e6e1 7986#ifdef CONFIG_IWL4965_HT
bb8c093b 7987 .conf_ht = iwl4965_mac_conf_ht,
9ab46173 7988 .ampdu_action = iwl4965_mac_ampdu_action,
c8b0e6e1 7989#endif /* CONFIG_IWL4965_HT */
bb8c093b 7990 .hw_scan = iwl4965_mac_hw_scan
b481de9c
ZY		 7991};
7992
bb8c093b 7993static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
b481de9c
ZY		 7994{
7995 int err = 0;
c79dd5b5 7996 struct iwl_priv *priv;
b481de9c 7997 struct ieee80211_hw *hw;
82b9a121 7998 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
5a66926a 7999 DECLARE_MAC_BUF(mac);
b481de9c 8000
316c30d9
AK		 8001 /************************
8002 * 1. Allocating HW data
8003 ************************/
8004
6440adb5
BC		 8005 /* Disabling hardware scan means that mac80211 will perform scans
8006 * "the hard way", rather than using device's scan. */
1ea87396 8007 if (cfg->mod_params->disable_hw_scan) {
b481de9c 8008 IWL_DEBUG_INFO("Disabling hw_scan\n");
bb8c093b 8009 iwl4965_hw_ops.hw_scan = NULL;
b481de9c
ZY		 8010 }
8011
1d0a082d
AK		 8012 hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
8013 if (!hw) {
b481de9c
ZY		 8014 err = -ENOMEM;
8015 goto out;
8016 }
1d0a082d
AK		 8017 priv = hw->priv;
8018 /* At this point both hw and priv are allocated. */
8019
b481de9c
ZY		 8020 SET_IEEE80211_DEV(hw, &pdev->dev);
8021
8022 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
82b9a121 8023 priv->cfg = cfg;
b481de9c 8024 priv->pci_dev = pdev;
316c30d9 8025
0a6857e7 8026#ifdef CONFIG_IWLWIFI_DEBUG
1ea87396 8027 iwl_debug_level = priv->cfg->mod_params->debug;
b481de9c
ZY		 8028 atomic_set(&priv->restrict_refcnt, 0);
8029#endif
b481de9c 8030
316c30d9
AK		 8031 /**************************
8032 * 2. Initializing PCI bus
8033 **************************/
8034 if (pci_enable_device(pdev)) {
8035 err = -ENODEV;
8036 goto out_ieee80211_free_hw;
8037 }
8038
8039 pci_set_master(pdev);
8040
8041 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8042 if (!err)
8043 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8044 if (err) {
8045 printk(KERN_WARNING DRV_NAME
8046 ": No suitable DMA available.\n");
8047 goto out_pci_disable_device;
8048 }
8049
8050 err = pci_request_regions(pdev, DRV_NAME);
8051 if (err)
8052 goto out_pci_disable_device;
8053
8054 pci_set_drvdata(pdev, priv);
8055
8056 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8057 * PCI Tx retries from interfering with C3 CPU state */
8058 pci_write_config_byte(pdev, 0x41, 0x00);
8059
8060 /***********************
8061 * 3. Read REV register
8062 ***********************/
8063 priv->hw_base = pci_iomap(pdev, 0, 0);
8064 if (!priv->hw_base) {
8065 err = -ENODEV;
8066 goto out_pci_release_regions;
8067 }
8068
8069 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8070 (unsigned long long) pci_resource_len(pdev, 0));
8071 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8072
8073 printk(KERN_INFO DRV_NAME
8074 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
8075
8076 /*****************
8077 * 4. Read EEPROM
8078 *****************/
8079 /* nic init */
8080 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8081 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8082
8083 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8084 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
8085 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8086 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8087 if (err < 0) {
8088 IWL_DEBUG_INFO("Failed to init the card\n");
8089 goto out_iounmap;
8090 }
8091 /* Read the EEPROM */
8092 err = iwl_eeprom_init(priv);
8093 if (err) {
8094 IWL_ERROR("Unable to init EEPROM\n");
8095 goto out_iounmap;
8096 }
8097 /* MAC Address location in EEPROM same for 3945/4965 */
8098 iwl_eeprom_get_mac(priv, priv->mac_addr);
8099 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8100 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8101
8102 /************************
8103 * 5. Setup HW constants
8104 ************************/
8105 /* Device-specific setup */
8106 if (iwl4965_hw_set_hw_setting(priv)) {
8107 IWL_ERROR("failed to set hw settings\n");
8108 goto out_iounmap;
8109 }
8110
8111 /*******************
8112 * 6. Setup hw/priv
8113 *******************/
b481de9c 8114
bf85ea4f
AK		 8115 err = iwl_setup(priv);
8116 if (err)
316c30d9 8117 goto out_unset_hw_settings;
bf85ea4f 8118 /* At this point both hw and priv are initialized. */
316c30d9
AK		 8119
8120 /**********************************
8121 * 7. Initialize module parameters
8122 **********************************/
8123
8124 /* Disable radio (SW RF KILL) via parameter when loading driver */
1ea87396 8125 if (priv->cfg->mod_params->disable) {
316c30d9
AK		 8126 set_bit(STATUS_RF_KILL_SW, &priv->status);
8127 IWL_DEBUG_INFO("Radio disabled.\n");
8128 }
8129
1ea87396 8130 if (priv->cfg->mod_params->enable_qos)
316c30d9
AK		 8131 priv->qos_data.qos_enable = 1;
8132
8133 /********************
8134 * 8. Setup services
8135 ********************/
8136 iwl4965_disable_interrupts(priv);
8137
8138 err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
8139 if (err) {
8140 IWL_ERROR("failed to create sysfs device attributes\n");
bf85ea4f 8141 goto out_unset_hw_settings;
316c30d9
AK		 8142 }
8143
8144 err = iwl_dbgfs_register(priv, DRV_NAME);
8145 if (err) {
8146 IWL_ERROR("failed to create debugfs files\n");
8147 goto out_remove_sysfs;
8148 }
8149
8150 iwl4965_setup_deferred_work(priv);
8151 iwl4965_setup_rx_handlers(priv);
8152
8153 /********************
8154 * 9. Conclude
8155 ********************/
5a66926a
ZY		 8156 pci_save_state(pdev);
8157 pci_disable_device(pdev);
b481de9c
ZY		 8158
8159 return 0;
8160
316c30d9
AK		 8161 out_remove_sysfs:
8162 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
316c30d9 8163 out_unset_hw_settings:
bb8c093b 8164 iwl4965_unset_hw_setting(priv);
b481de9c
ZY		 8165 out_iounmap:
8166 pci_iounmap(pdev, priv->hw_base);
8167 out_pci_release_regions:
8168 pci_release_regions(pdev);
316c30d9 8169 pci_set_drvdata(pdev, NULL);
b481de9c
ZY		 8170 out_pci_disable_device:
8171 pci_disable_device(pdev);
b481de9c
ZY		 8172 out_ieee80211_free_hw:
8173 ieee80211_free_hw(priv->hw);
8174 out:
8175 return err;
8176}
8177
bb8c093b 8178static void iwl4965_pci_remove(struct pci_dev *pdev)
b481de9c 8179{
c79dd5b5 8180 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c
ZY		 8181 struct list_head *p, *q;
8182 int i;
8183
8184 if (!priv)
8185 return;
8186
8187 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8188
b481de9c 8189 set_bit(STATUS_EXIT_PENDING, &priv->status);
b24d22b1 8190
bb8c093b 8191 iwl4965_down(priv);
b481de9c
ZY		 8192
8193 /* Free MAC hash list for ADHOC */
8194 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8195 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8196 list_del(p);
bb8c093b 8197 kfree(list_entry(p, struct iwl4965_ibss_seq, list));
b481de9c
ZY		 8198 }
8199 }
8200
712b6cf5 8201 iwl_dbgfs_unregister(priv);
bb8c093b 8202 sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
b481de9c 8203
bb8c093b 8204 iwl4965_dealloc_ucode_pci(priv);
b481de9c
ZY		 8205
8206 if (priv->rxq.bd)
bb8c093b
CH		 8207 iwl4965_rx_queue_free(priv, &priv->rxq);
8208 iwl4965_hw_txq_ctx_free(priv);
b481de9c 8209
bb8c093b 8210 iwl4965_unset_hw_setting(priv);
bf85ea4f 8211 iwlcore_clear_stations_table(priv);
b481de9c
ZY		 8212
8213 if (priv->mac80211_registered) {
8214 ieee80211_unregister_hw(priv->hw);
bb8c093b 8215 iwl4965_rate_control_unregister(priv->hw);
b481de9c
ZY		 8216 }
8217
948c171c
MA		 8218 /*netif_stop_queue(dev); */
8219 flush_workqueue(priv->workqueue);
8220
bb8c093b 8221 /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
b481de9c
ZY		 8222 * priv->workqueue... so we can't take down the workqueue
8223 * until now... */
8224 destroy_workqueue(priv->workqueue);
8225 priv->workqueue = NULL;
8226
b481de9c
ZY		 8227 pci_iounmap(pdev, priv->hw_base);
8228 pci_release_regions(pdev);
8229 pci_disable_device(pdev);
8230 pci_set_drvdata(pdev, NULL);
8231
bf85ea4f 8232 iwl_free_channel_map(priv);
849e0dce 8233 iwl4965_free_geos(priv);
b481de9c
ZY		 8234
8235 if (priv->ibss_beacon)
8236 dev_kfree_skb(priv->ibss_beacon);
8237
8238 ieee80211_free_hw(priv->hw);
8239}
8240
8241#ifdef CONFIG_PM
8242
bb8c093b 8243static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
b481de9c 8244{
c79dd5b5 8245 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8246
e655b9f0
ZY		 8247 if (priv->is_open) {
8248 set_bit(STATUS_IN_SUSPEND, &priv->status);
8249 iwl4965_mac_stop(priv->hw);
8250 priv->is_open = 1;
8251 }
b481de9c 8252
b481de9c
ZY		 8253 pci_set_power_state(pdev, PCI_D3hot);
8254
b481de9c
ZY		 8255 return 0;
8256}
8257
bb8c093b 8258static int iwl4965_pci_resume(struct pci_dev *pdev)
b481de9c 8259{
c79dd5b5 8260 struct iwl_priv *priv = pci_get_drvdata(pdev);
b481de9c 8261
b481de9c 8262 pci_set_power_state(pdev, PCI_D0);
b481de9c 8263
e655b9f0
ZY		 8264 if (priv->is_open)
8265 iwl4965_mac_start(priv->hw);
b481de9c 8266
e655b9f0 8267 clear_bit(STATUS_IN_SUSPEND, &priv->status);
b481de9c
ZY		 8268 return 0;
8269}
8270
8271#endif /* CONFIG_PM */
8272
8273/*****************************************************************************
8274 *
8275 * driver and module entry point
8276 *
8277 *****************************************************************************/
8278
bb8c093b 8279static struct pci_driver iwl4965_driver = {
b481de9c 8280 .name = DRV_NAME,
bb8c093b
CH		 8281 .id_table = iwl4965_hw_card_ids,
8282 .probe = iwl4965_pci_probe,
8283 .remove = __devexit_p(iwl4965_pci_remove),
b481de9c 8284#ifdef CONFIG_PM
bb8c093b
CH		 8285 .suspend = iwl4965_pci_suspend,
8286 .resume = iwl4965_pci_resume,
b481de9c
ZY		 8287#endif
8288};
8289
bb8c093b 8290static int __init iwl4965_init(void)
b481de9c
ZY		 8291{
8292
8293 int ret;
8294 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8295 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
bb8c093b 8296 ret = pci_register_driver(&iwl4965_driver);
b481de9c
ZY		 8297 if (ret) {
8298 IWL_ERROR("Unable to initialize PCI module\n");
8299 return ret;
8300 }
0a6857e7 8301#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8302 ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c
ZY		 8303 if (ret) {
8304 IWL_ERROR("Unable to create driver sysfs file\n");
bb8c093b 8305 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 8306 return ret;
8307 }
8308#endif
8309
8310 return ret;
8311}
8312
bb8c093b 8313static void __exit iwl4965_exit(void)
b481de9c 8314{
0a6857e7 8315#ifdef CONFIG_IWLWIFI_DEBUG
bb8c093b 8316 driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
b481de9c 8317#endif
bb8c093b 8318 pci_unregister_driver(&iwl4965_driver);
b481de9c
ZY		 8319}
8320
bb8c093b
CH		 8321module_exit(iwl4965_exit);
8322module_init(iwl4965_init);
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