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931d4160 EG |
1 | /****************************************************************************** |
2 | * | |
3 | * This file is provided under a dual BSD/GPLv2 license. When using or | |
4 | * redistributing this file, you may do so under either license. | |
5 | * | |
6 | * GPL LICENSE SUMMARY | |
7 | * | |
51368bf7 | 8 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of version 2 of the GNU General Public License as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110, | |
22 | * USA | |
23 | * | |
24 | * The full GNU General Public License is included in this distribution | |
25 | * in the file called COPYING. | |
26 | * | |
27 | * Contact Information: | |
28 | * Intel Linux Wireless <ilw@linux.intel.com> | |
29 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
30 | * | |
31 | * BSD LICENSE | |
32 | * | |
51368bf7 | 33 | * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved. |
931d4160 EG |
34 | * All rights reserved. |
35 | * | |
36 | * Redistribution and use in source and binary forms, with or without | |
37 | * modification, are permitted provided that the following conditions | |
38 | * are met: | |
39 | * | |
40 | * * Redistributions of source code must retain the above copyright | |
41 | * notice, this list of conditions and the following disclaimer. | |
42 | * * Redistributions in binary form must reproduce the above copyright | |
43 | * notice, this list of conditions and the following disclaimer in | |
44 | * the documentation and/or other materials provided with the | |
45 | * distribution. | |
46 | * * Neither the name Intel Corporation nor the names of its | |
47 | * contributors may be used to endorse or promote products derived | |
48 | * from this software without specific prior written permission. | |
49 | * | |
50 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
51 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
52 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
53 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
54 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
55 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
56 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
57 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
58 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
59 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
60 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
61 | * | |
62 | *****************************************************************************/ | |
63 | ||
ee7bea58 EG |
64 | #include <linux/ieee80211.h> |
65 | #include <linux/etherdevice.h> | |
2b76ef13 EG |
66 | #include <net/mac80211.h> |
67 | ||
5b7ff615 | 68 | #include "fw-api-coex.h" |
931d4160 EG |
69 | #include "iwl-modparams.h" |
70 | #include "mvm.h" | |
f421f9c3 | 71 | #include "iwl-debug.h" |
931d4160 EG |
72 | |
73 | #define EVENT_PRIO_ANT(_evt, _prio, _shrd_ant) \ | |
74 | [(_evt)] = (((_prio) << BT_COEX_PRIO_TBL_PRIO_POS) | \ | |
75 | ((_shrd_ant) << BT_COEX_PRIO_TBL_SHRD_ANT_POS)) | |
76 | ||
77 | static const u8 iwl_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = { | |
78 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB1, | |
79 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 0), | |
80 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_INIT_CALIB2, | |
81 | BT_COEX_PRIO_TBL_PRIO_BYPASS, 1), | |
82 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW1, | |
83 | BT_COEX_PRIO_TBL_PRIO_LOW, 0), | |
84 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_LOW2, | |
85 | BT_COEX_PRIO_TBL_PRIO_LOW, 1), | |
86 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH1, | |
87 | BT_COEX_PRIO_TBL_PRIO_HIGH, 0), | |
88 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_PERIODIC_CALIB_HIGH2, | |
89 | BT_COEX_PRIO_TBL_PRIO_HIGH, 1), | |
90 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_DTIM, | |
91 | BT_COEX_PRIO_TBL_DISABLED, 0), | |
92 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN52, | |
93 | BT_COEX_PRIO_TBL_PRIO_COEX_OFF, 0), | |
94 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_SCAN24, | |
95 | BT_COEX_PRIO_TBL_PRIO_COEX_ON, 0), | |
96 | EVENT_PRIO_ANT(BT_COEX_PRIO_TBL_EVT_IDLE, | |
97 | BT_COEX_PRIO_TBL_PRIO_COEX_IDLE, 0), | |
98 | 0, 0, 0, 0, 0, 0, | |
99 | }; | |
100 | ||
101 | #undef EVENT_PRIO_ANT | |
102 | ||
2b76ef13 EG |
103 | #define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62) |
104 | #define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65) | |
dac94da8 | 105 | #define BT_ANTENNA_COUPLING_THRESHOLD (30) |
2b76ef13 | 106 | |
ae397472 | 107 | static int iwl_send_bt_prio_tbl(struct iwl_mvm *mvm) |
931d4160 | 108 | { |
a1022927 | 109 | return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_PRIO_TABLE, 0, |
931d4160 EG |
110 | sizeof(struct iwl_bt_coex_prio_tbl_cmd), |
111 | &iwl_bt_prio_tbl); | |
112 | } | |
113 | ||
2de13cae | 114 | const u32 iwl_bt_ack_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
115 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
116 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
117 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
118 | }; |
119 | ||
2de13cae | 120 | const u32 iwl_bt_cts_kill_msk[BT_KILL_MSK_MAX] = { |
5b7e662b EG |
121 | [BT_KILL_MSK_DEFAULT] = 0xffff0000, |
122 | [BT_KILL_MSK_SCO_HID_A2DP] = 0xffffffff, | |
123 | [BT_KILL_MSK_REDUCED_TXPOW] = 0, | |
931d4160 EG |
124 | }; |
125 | ||
dac94da8 | 126 | static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = { |
2adc8949 EG |
127 | cpu_to_le32(0xf0f0f0f0), /* 50% */ |
128 | cpu_to_le32(0xc0c0c0c0), /* 25% */ | |
129 | cpu_to_le32(0xfcfcfcfc), /* 75% */ | |
130 | cpu_to_le32(0xfefefefe), /* 87.5% */ | |
931d4160 EG |
131 | }; |
132 | ||
d1d5e3cd EG |
133 | static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
134 | { | |
135 | cpu_to_le32(0x40000000), | |
136 | cpu_to_le32(0x00000000), | |
137 | cpu_to_le32(0x44000000), | |
138 | cpu_to_le32(0x00000000), | |
139 | cpu_to_le32(0x40000000), | |
140 | cpu_to_le32(0x00000000), | |
141 | cpu_to_le32(0x44000000), | |
142 | cpu_to_le32(0x00000000), | |
143 | cpu_to_le32(0xc0004000), | |
144 | cpu_to_le32(0xf0005000), | |
145 | cpu_to_le32(0xc0004000), | |
146 | cpu_to_le32(0xf0005000), | |
147 | }, | |
148 | { | |
149 | cpu_to_le32(0x40000000), | |
150 | cpu_to_le32(0x00000000), | |
151 | cpu_to_le32(0x44000000), | |
152 | cpu_to_le32(0x00000000), | |
153 | cpu_to_le32(0x40000000), | |
154 | cpu_to_le32(0x00000000), | |
155 | cpu_to_le32(0x44000000), | |
156 | cpu_to_le32(0x00000000), | |
157 | cpu_to_le32(0xc0004000), | |
158 | cpu_to_le32(0xf0005000), | |
159 | cpu_to_le32(0xc0004000), | |
160 | cpu_to_le32(0xf0005000), | |
161 | }, | |
162 | { | |
163 | cpu_to_le32(0x40000000), | |
164 | cpu_to_le32(0x00000000), | |
165 | cpu_to_le32(0x44000000), | |
166 | cpu_to_le32(0x00000000), | |
167 | cpu_to_le32(0x40000000), | |
168 | cpu_to_le32(0x00000000), | |
169 | cpu_to_le32(0x44000000), | |
170 | cpu_to_le32(0x00000000), | |
171 | cpu_to_le32(0xc0004000), | |
172 | cpu_to_le32(0xf0005000), | |
173 | cpu_to_le32(0xc0004000), | |
174 | cpu_to_le32(0xf0005000), | |
175 | }, | |
176 | }; | |
177 | ||
dac94da8 EG |
178 | static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = { |
179 | { | |
180 | /* Tight */ | |
181 | cpu_to_le32(0xaaaaaaaa), | |
182 | cpu_to_le32(0xaaaaaaaa), | |
183 | cpu_to_le32(0xaeaaaaaa), | |
184 | cpu_to_le32(0xaaaaaaaa), | |
185 | cpu_to_le32(0xcc00ff28), | |
186 | cpu_to_le32(0x0000aaaa), | |
187 | cpu_to_le32(0xcc00aaaa), | |
188 | cpu_to_le32(0x0000aaaa), | |
189 | cpu_to_le32(0xc0004000), | |
a6bc9280 | 190 | cpu_to_le32(0x00004000), |
dac94da8 EG |
191 | cpu_to_le32(0xf0005000), |
192 | cpu_to_le32(0xf0005000), | |
193 | }, | |
194 | { | |
195 | /* Loose */ | |
196 | cpu_to_le32(0xaaaaaaaa), | |
197 | cpu_to_le32(0xaaaaaaaa), | |
198 | cpu_to_le32(0xaaaaaaaa), | |
199 | cpu_to_le32(0xaaaaaaaa), | |
200 | cpu_to_le32(0xcc00ff28), | |
201 | cpu_to_le32(0x0000aaaa), | |
202 | cpu_to_le32(0xcc00aaaa), | |
203 | cpu_to_le32(0x0000aaaa), | |
204 | cpu_to_le32(0x00000000), | |
205 | cpu_to_le32(0x00000000), | |
206 | cpu_to_le32(0xf0005000), | |
207 | cpu_to_le32(0xf0005000), | |
208 | }, | |
209 | { | |
210 | /* Tx Tx disabled */ | |
211 | cpu_to_le32(0xaaaaaaaa), | |
212 | cpu_to_le32(0xaaaaaaaa), | |
a6bc9280 | 213 | cpu_to_le32(0xeeaaaaaa), |
dac94da8 EG |
214 | cpu_to_le32(0xaaaaaaaa), |
215 | cpu_to_le32(0xcc00ff28), | |
216 | cpu_to_le32(0x0000aaaa), | |
217 | cpu_to_le32(0xcc00aaaa), | |
218 | cpu_to_le32(0x0000aaaa), | |
a6bc9280 EG |
219 | cpu_to_le32(0xc0004000), |
220 | cpu_to_le32(0xc0004000), | |
221 | cpu_to_le32(0xf0005000), | |
222 | cpu_to_le32(0xf0005000), | |
dac94da8 | 223 | }, |
931d4160 EG |
224 | }; |
225 | ||
dac94da8 EG |
226 | /* 20MHz / 40MHz below / 40Mhz above*/ |
227 | static const __le64 iwl_ci_mask[][3] = { | |
228 | /* dummy entry for channel 0 */ | |
229 | {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)}, | |
230 | { | |
231 | cpu_to_le64(0x0000001FFFULL), | |
232 | cpu_to_le64(0x0ULL), | |
233 | cpu_to_le64(0x00007FFFFFULL), | |
234 | }, | |
235 | { | |
236 | cpu_to_le64(0x000000FFFFULL), | |
237 | cpu_to_le64(0x0ULL), | |
238 | cpu_to_le64(0x0003FFFFFFULL), | |
239 | }, | |
240 | { | |
241 | cpu_to_le64(0x000003FFFCULL), | |
242 | cpu_to_le64(0x0ULL), | |
243 | cpu_to_le64(0x000FFFFFFCULL), | |
244 | }, | |
245 | { | |
246 | cpu_to_le64(0x00001FFFE0ULL), | |
247 | cpu_to_le64(0x0ULL), | |
248 | cpu_to_le64(0x007FFFFFE0ULL), | |
249 | }, | |
250 | { | |
251 | cpu_to_le64(0x00007FFF80ULL), | |
252 | cpu_to_le64(0x00007FFFFFULL), | |
253 | cpu_to_le64(0x01FFFFFF80ULL), | |
254 | }, | |
255 | { | |
256 | cpu_to_le64(0x0003FFFC00ULL), | |
257 | cpu_to_le64(0x0003FFFFFFULL), | |
258 | cpu_to_le64(0x0FFFFFFC00ULL), | |
259 | }, | |
260 | { | |
261 | cpu_to_le64(0x000FFFF000ULL), | |
262 | cpu_to_le64(0x000FFFFFFCULL), | |
263 | cpu_to_le64(0x3FFFFFF000ULL), | |
264 | }, | |
265 | { | |
266 | cpu_to_le64(0x007FFF8000ULL), | |
267 | cpu_to_le64(0x007FFFFFE0ULL), | |
268 | cpu_to_le64(0xFFFFFF8000ULL), | |
269 | }, | |
270 | { | |
271 | cpu_to_le64(0x01FFFE0000ULL), | |
272 | cpu_to_le64(0x01FFFFFF80ULL), | |
273 | cpu_to_le64(0xFFFFFE0000ULL), | |
274 | }, | |
275 | { | |
276 | cpu_to_le64(0x0FFFF00000ULL), | |
277 | cpu_to_le64(0x0FFFFFFC00ULL), | |
278 | cpu_to_le64(0x0ULL), | |
279 | }, | |
280 | { | |
281 | cpu_to_le64(0x3FFFC00000ULL), | |
282 | cpu_to_le64(0x3FFFFFF000ULL), | |
283 | cpu_to_le64(0x0) | |
284 | }, | |
285 | { | |
286 | cpu_to_le64(0xFFFE000000ULL), | |
287 | cpu_to_le64(0xFFFFFF8000ULL), | |
288 | cpu_to_le64(0x0) | |
289 | }, | |
290 | { | |
291 | cpu_to_le64(0xFFF8000000ULL), | |
292 | cpu_to_le64(0xFFFFFE0000ULL), | |
293 | cpu_to_le64(0x0) | |
294 | }, | |
295 | { | |
d2ccc902 | 296 | cpu_to_le64(0xFFC0000000ULL), |
dac94da8 | 297 | cpu_to_le64(0x0ULL), |
d2ccc902 | 298 | cpu_to_le64(0x0ULL) |
dac94da8 | 299 | }, |
931d4160 EG |
300 | }; |
301 | ||
dac94da8 | 302 | static const __le32 iwl_bt_mprio_lut[BT_COEX_MULTI_PRIO_LUT_SIZE] = { |
2adc8949 EG |
303 | cpu_to_le32(0x28412201), |
304 | cpu_to_le32(0x11118451), | |
e715c3a9 EG |
305 | }; |
306 | ||
b9fae2d5 EG |
307 | struct corunning_block_luts { |
308 | u8 range; | |
309 | __le32 lut20[BT_COEX_CORUN_LUT_SIZE]; | |
310 | }; | |
311 | ||
312 | /* | |
313 | * Ranges for the antenna coupling calibration / co-running block LUT: | |
314 | * LUT0: [ 0, 12[ | |
315 | * LUT1: [12, 20[ | |
316 | * LUT2: [20, 21[ | |
317 | * LUT3: [21, 23[ | |
318 | * LUT4: [23, 27[ | |
319 | * LUT5: [27, 30[ | |
320 | * LUT6: [30, 32[ | |
321 | * LUT7: [32, 33[ | |
322 | * LUT8: [33, - [ | |
323 | */ | |
324 | static const struct corunning_block_luts antenna_coupling_ranges[] = { | |
325 | { | |
326 | .range = 0, | |
327 | .lut20 = { | |
328 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
329 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
330 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
331 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
332 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
333 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
334 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
335 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
336 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
337 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
338 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
339 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
340 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
341 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
342 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
343 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
344 | }, | |
345 | }, | |
346 | { | |
347 | .range = 12, | |
348 | .lut20 = { | |
349 | cpu_to_le32(0x00000001), cpu_to_le32(0x00000000), | |
350 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
351 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
352 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
353 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
354 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
355 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
356 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
357 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
358 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
359 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
360 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
361 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
362 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
363 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
364 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
365 | }, | |
366 | }, | |
367 | { | |
368 | .range = 20, | |
369 | .lut20 = { | |
370 | cpu_to_le32(0x00000002), cpu_to_le32(0x00000000), | |
371 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
372 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
373 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
374 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
375 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
376 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
377 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
378 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
379 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
380 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
381 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
382 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
383 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
384 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
385 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
386 | }, | |
387 | }, | |
388 | { | |
389 | .range = 21, | |
390 | .lut20 = { | |
391 | cpu_to_le32(0x00000003), cpu_to_le32(0x00000000), | |
392 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
393 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
394 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
395 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
396 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
397 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
398 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
399 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
400 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
401 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
402 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
403 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
404 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
405 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
406 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
407 | }, | |
408 | }, | |
409 | { | |
410 | .range = 23, | |
411 | .lut20 = { | |
412 | cpu_to_le32(0x00000004), cpu_to_le32(0x00000000), | |
413 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
414 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
415 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
416 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
417 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
418 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
419 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
420 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
421 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
422 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
423 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
424 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
425 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
426 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
427 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
428 | }, | |
429 | }, | |
430 | { | |
431 | .range = 27, | |
432 | .lut20 = { | |
433 | cpu_to_le32(0x00000005), cpu_to_le32(0x00000000), | |
434 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
435 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
436 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
437 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
438 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
439 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
440 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
441 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
442 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
443 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
444 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
445 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
446 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
447 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
448 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
449 | }, | |
450 | }, | |
451 | { | |
452 | .range = 30, | |
453 | .lut20 = { | |
454 | cpu_to_le32(0x00000006), cpu_to_le32(0x00000000), | |
455 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
456 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
457 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
458 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
459 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
460 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
461 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
462 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
463 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
464 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
465 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
466 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
467 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
468 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
469 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
470 | }, | |
471 | }, | |
472 | { | |
473 | .range = 32, | |
474 | .lut20 = { | |
475 | cpu_to_le32(0x00000007), cpu_to_le32(0x00000000), | |
476 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
477 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
478 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
479 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
480 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
481 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
482 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
483 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
484 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
485 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
486 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
487 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
488 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
489 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
490 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
491 | }, | |
492 | }, | |
493 | { | |
494 | .range = 33, | |
495 | .lut20 = { | |
496 | cpu_to_le32(0x00000008), cpu_to_le32(0x00000000), | |
497 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
498 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
499 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
500 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
501 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
502 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
503 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
504 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
505 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
506 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
507 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
508 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
509 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
510 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
511 | cpu_to_le32(0x00000000), cpu_to_le32(0x00000000), | |
512 | }, | |
513 | }, | |
514 | }; | |
515 | ||
4515f30f EG |
516 | static enum iwl_bt_coex_lut_type |
517 | iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif) | |
518 | { | |
519 | struct ieee80211_chanctx_conf *chanctx_conf; | |
520 | enum iwl_bt_coex_lut_type ret; | |
521 | u16 phy_ctx_id; | |
522 | ||
9145d151 EG |
523 | /* |
524 | * Checking that we hold mvm->mutex is a good idea, but the rate | |
525 | * control can't acquire the mutex since it runs in Tx path. | |
526 | * So this is racy in that case, but in the worst case, the AMPDU | |
527 | * size limit will be wrong for a short time which is not a big | |
528 | * issue. | |
529 | */ | |
4515f30f EG |
530 | |
531 | rcu_read_lock(); | |
532 | ||
533 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
534 | ||
535 | if (!chanctx_conf || | |
536 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
537 | rcu_read_unlock(); | |
538 | return BT_COEX_LOOSE_LUT; | |
539 | } | |
540 | ||
541 | ret = BT_COEX_TX_DIS_LUT; | |
542 | ||
39149911 EG |
543 | if (mvm->cfg->bt_shared_single_ant) { |
544 | rcu_read_unlock(); | |
545 | return ret; | |
546 | } | |
547 | ||
4515f30f EG |
548 | phy_ctx_id = *((u16 *)chanctx_conf->drv_priv); |
549 | ||
550 | if (mvm->last_bt_ci_cmd.primary_ch_phy_id == phy_ctx_id) | |
551 | ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut); | |
552 | else if (mvm->last_bt_ci_cmd.secondary_ch_phy_id == phy_ctx_id) | |
553 | ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut); | |
554 | /* else - default = TX TX disallowed */ | |
555 | ||
556 | rcu_read_unlock(); | |
557 | ||
558 | return ret; | |
559 | } | |
560 | ||
931d4160 EG |
561 | int iwl_send_bt_init_conf(struct iwl_mvm *mvm) |
562 | { | |
03e304e4 EG |
563 | struct iwl_bt_coex_cmd *bt_cmd; |
564 | struct iwl_host_cmd cmd = { | |
565 | .id = BT_CONFIG, | |
566 | .len = { sizeof(*bt_cmd), }, | |
567 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
931d4160 EG |
568 | }; |
569 | int ret; | |
dac94da8 EG |
570 | u32 flags; |
571 | ||
ae397472 EG |
572 | ret = iwl_send_bt_prio_tbl(mvm); |
573 | if (ret) | |
574 | return ret; | |
575 | ||
03e304e4 EG |
576 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); |
577 | if (!bt_cmd) | |
578 | return -ENOMEM; | |
579 | cmd.data[0] = bt_cmd; | |
580 | ||
581 | bt_cmd->max_kill = 5; | |
8a0063a0 EG |
582 | bt_cmd->bt4_antenna_isolation_thr = BT_ANTENNA_COUPLING_THRESHOLD; |
583 | bt_cmd->bt4_antenna_isolation = iwlwifi_mod_params.ant_coupling; | |
584 | bt_cmd->bt4_tx_tx_delta_freq_thr = 15; | |
585 | bt_cmd->bt4_tx_rx_max_freq0 = 15; | |
e78973ef EG |
586 | bt_cmd->override_primary_lut = BT_COEX_INVALID_LUT; |
587 | bt_cmd->override_secondary_lut = BT_COEX_INVALID_LUT; | |
03e304e4 | 588 | |
dac94da8 | 589 | flags = iwlwifi_mod_params.bt_coex_active ? |
931d4160 | 590 | BT_COEX_NW : BT_COEX_DISABLE; |
dac94da8 | 591 | bt_cmd->flags = cpu_to_le32(flags); |
931d4160 | 592 | |
dac94da8 | 593 | bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_ENABLE | |
03e304e4 EG |
594 | BT_VALID_BT_PRIO_BOOST | |
595 | BT_VALID_MAX_KILL | | |
596 | BT_VALID_3W_TMRS | | |
597 | BT_VALID_KILL_ACK | | |
598 | BT_VALID_KILL_CTS | | |
599 | BT_VALID_REDUCED_TX_POWER | | |
dac94da8 EG |
600 | BT_VALID_LUT | |
601 | BT_VALID_WIFI_RX_SW_PRIO_BOOST | | |
602 | BT_VALID_WIFI_TX_SW_PRIO_BOOST | | |
dac94da8 EG |
603 | BT_VALID_ANT_ISOLATION | |
604 | BT_VALID_ANT_ISOLATION_THRS | | |
605 | BT_VALID_TXTX_DELTA_FREQ_THRS | | |
b9c509cc EG |
606 | BT_VALID_TXRX_MAX_FREQ_0 | |
607 | BT_VALID_SYNC_TO_SCO); | |
dac94da8 | 608 | |
741e703b EG |
609 | if (IWL_MVM_BT_COEX_SYNC2SCO) |
610 | bt_cmd->flags |= cpu_to_le32(BT_COEX_SYNC2SCO); | |
611 | ||
b9fae2d5 | 612 | if (IWL_MVM_BT_COEX_CORUNNING) { |
0fed2bcf EG |
613 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_CORUN_LUT_20 | |
614 | BT_VALID_CORUN_LUT_40); | |
b9fae2d5 EG |
615 | bt_cmd->flags |= cpu_to_le32(BT_COEX_CORUNNING); |
616 | } | |
617 | ||
cdb00563 EG |
618 | if (IWL_MVM_BT_COEX_MPLUT) { |
619 | bt_cmd->flags |= cpu_to_le32(BT_COEX_MPLUT); | |
0fed2bcf | 620 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_MULTI_PRIO_LUT); |
cdb00563 EG |
621 | } |
622 | ||
d1d5e3cd EG |
623 | if (mvm->cfg->bt_shared_single_ant) |
624 | memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant, | |
625 | sizeof(iwl_single_shared_ant)); | |
626 | else | |
627 | memcpy(&bt_cmd->decision_lut, iwl_combined_lookup, | |
628 | sizeof(iwl_combined_lookup)); | |
629 | ||
b9fae2d5 EG |
630 | /* Take first Co-running block LUT to get started */ |
631 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[0].lut20, | |
632 | sizeof(bt_cmd->bt4_corun_lut20)); | |
633 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[0].lut20, | |
634 | sizeof(bt_cmd->bt4_corun_lut40)); | |
635 | ||
dac94da8 EG |
636 | memcpy(&bt_cmd->bt_prio_boost, iwl_bt_prio_boost, |
637 | sizeof(iwl_bt_prio_boost)); | |
638 | memcpy(&bt_cmd->bt4_multiprio_lut, iwl_bt_mprio_lut, | |
639 | sizeof(iwl_bt_mprio_lut)); | |
03e304e4 | 640 | bt_cmd->kill_ack_msk = |
931d4160 | 641 | cpu_to_le32(iwl_bt_ack_kill_msk[BT_KILL_MSK_DEFAULT]); |
03e304e4 | 642 | bt_cmd->kill_cts_msk = |
931d4160 EG |
643 | cpu_to_le32(iwl_bt_cts_kill_msk[BT_KILL_MSK_DEFAULT]); |
644 | ||
2b76ef13 | 645 | memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif)); |
dac94da8 | 646 | memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd)); |
2b76ef13 | 647 | |
03e304e4 | 648 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
931d4160 | 649 | |
03e304e4 EG |
650 | kfree(bt_cmd); |
651 | return ret; | |
931d4160 | 652 | } |
f421f9c3 | 653 | |
2b76ef13 EG |
654 | static int iwl_mvm_bt_udpate_ctrl_kill_msk(struct iwl_mvm *mvm, |
655 | bool reduced_tx_power) | |
656 | { | |
657 | enum iwl_bt_kill_msk bt_kill_msk; | |
03e304e4 | 658 | struct iwl_bt_coex_cmd *bt_cmd; |
2b76ef13 | 659 | struct iwl_bt_coex_profile_notif *notif = &mvm->last_bt_notif; |
03e304e4 EG |
660 | struct iwl_host_cmd cmd = { |
661 | .id = BT_CONFIG, | |
662 | .data[0] = &bt_cmd, | |
663 | .len = { sizeof(*bt_cmd), }, | |
664 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
03e304e4 EG |
665 | }; |
666 | int ret = 0; | |
2b76ef13 EG |
667 | |
668 | lockdep_assert_held(&mvm->mutex); | |
669 | ||
670 | if (reduced_tx_power) { | |
671 | /* Reduced Tx power has precedence on the type of the profile */ | |
672 | bt_kill_msk = BT_KILL_MSK_REDUCED_TXPOW; | |
673 | } else { | |
674 | /* Low latency BT profile is active: give higher prio to BT */ | |
675 | if (BT_MBOX_MSG(notif, 3, SCO_STATE) || | |
676 | BT_MBOX_MSG(notif, 3, A2DP_STATE) || | |
677 | BT_MBOX_MSG(notif, 3, SNIFF_STATE)) | |
678 | bt_kill_msk = BT_KILL_MSK_SCO_HID_A2DP; | |
679 | else | |
680 | bt_kill_msk = BT_KILL_MSK_DEFAULT; | |
681 | } | |
682 | ||
683 | IWL_DEBUG_COEX(mvm, | |
684 | "Update kill_msk: %d - SCO %sactive A2DP %sactive SNIFF %sactive\n", | |
685 | bt_kill_msk, | |
686 | BT_MBOX_MSG(notif, 3, SCO_STATE) ? "" : "in", | |
687 | BT_MBOX_MSG(notif, 3, A2DP_STATE) ? "" : "in", | |
688 | BT_MBOX_MSG(notif, 3, SNIFF_STATE) ? "" : "in"); | |
689 | ||
690 | /* Don't send HCMD if there is no update */ | |
691 | if (bt_kill_msk == mvm->bt_kill_msk) | |
692 | return 0; | |
693 | ||
694 | mvm->bt_kill_msk = bt_kill_msk; | |
03e304e4 EG |
695 | |
696 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
697 | if (!bt_cmd) | |
698 | return -ENOMEM; | |
699 | cmd.data[0] = bt_cmd; | |
7352cac0 | 700 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); |
03e304e4 EG |
701 | |
702 | bt_cmd->kill_ack_msk = cpu_to_le32(iwl_bt_ack_kill_msk[bt_kill_msk]); | |
703 | bt_cmd->kill_cts_msk = cpu_to_le32(iwl_bt_cts_kill_msk[bt_kill_msk]); | |
7352cac0 EG |
704 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | |
705 | BT_VALID_KILL_ACK | | |
706 | BT_VALID_KILL_CTS); | |
2b76ef13 | 707 | |
dac94da8 EG |
708 | IWL_DEBUG_COEX(mvm, "ACK Kill msk = 0x%08x, CTS Kill msk = 0x%08x\n", |
709 | iwl_bt_ack_kill_msk[bt_kill_msk], | |
710 | iwl_bt_cts_kill_msk[bt_kill_msk]); | |
03e304e4 EG |
711 | |
712 | ret = iwl_mvm_send_cmd(mvm, &cmd); | |
713 | ||
714 | kfree(bt_cmd); | |
715 | return ret; | |
2b76ef13 EG |
716 | } |
717 | ||
32a65c34 | 718 | int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id, bool enable) |
2b76ef13 | 719 | { |
03e304e4 EG |
720 | struct iwl_bt_coex_cmd *bt_cmd; |
721 | /* Send ASYNC since this can be sent from an atomic context */ | |
722 | struct iwl_host_cmd cmd = { | |
723 | .id = BT_CONFIG, | |
724 | .len = { sizeof(*bt_cmd), }, | |
b9fae2d5 | 725 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, |
03e304e4 | 726 | .flags = CMD_ASYNC, |
2b76ef13 | 727 | }; |
2b76ef13 | 728 | struct iwl_mvm_sta *mvmsta; |
03e304e4 | 729 | int ret; |
2b76ef13 | 730 | |
f327b04c EG |
731 | mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id); |
732 | if (!mvmsta) | |
2b76ef13 EG |
733 | return 0; |
734 | ||
2b76ef13 | 735 | /* nothing to do */ |
32a65c34 EG |
736 | if (mvmsta->bt_reduced_txpower_dbg || |
737 | mvmsta->bt_reduced_txpower == enable) | |
2b76ef13 EG |
738 | return 0; |
739 | ||
03e304e4 EG |
740 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_ATOMIC); |
741 | if (!bt_cmd) | |
742 | return -ENOMEM; | |
743 | cmd.data[0] = bt_cmd; | |
7352cac0 | 744 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); |
03e304e4 | 745 | |
7352cac0 EG |
746 | bt_cmd->valid_bit_msk = |
747 | cpu_to_le32(BT_VALID_ENABLE | BT_VALID_REDUCED_TX_POWER); | |
03e304e4 EG |
748 | bt_cmd->bt_reduced_tx_power = sta_id; |
749 | ||
2b76ef13 | 750 | if (enable) |
03e304e4 | 751 | bt_cmd->bt_reduced_tx_power |= BT_REDUCED_TX_POWER_BIT; |
2b76ef13 EG |
752 | |
753 | IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n", | |
754 | enable ? "en" : "dis", sta_id); | |
755 | ||
756 | mvmsta->bt_reduced_txpower = enable; | |
757 | ||
03e304e4 EG |
758 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
759 | ||
760 | kfree(bt_cmd); | |
761 | return ret; | |
2b76ef13 EG |
762 | } |
763 | ||
764 | struct iwl_bt_iterator_data { | |
7da052b8 | 765 | struct iwl_bt_coex_profile_notif *notif; |
2b76ef13 EG |
766 | struct iwl_mvm *mvm; |
767 | u32 num_bss_ifaces; | |
9e511c31 | 768 | bool reduced_tx_power; |
dac94da8 EG |
769 | struct ieee80211_chanctx_conf *primary; |
770 | struct ieee80211_chanctx_conf *secondary; | |
0ee5bcdd | 771 | bool primary_ll; |
7da052b8 EG |
772 | }; |
773 | ||
f6fc5775 EG |
774 | static inline |
775 | void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm, | |
776 | struct ieee80211_vif *vif, | |
777 | bool enable, int rssi) | |
778 | { | |
779 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
780 | ||
781 | mvmvif->bf_data.last_bt_coex_event = rssi; | |
782 | mvmvif->bf_data.bt_coex_max_thold = | |
783 | enable ? BT_ENABLE_REDUCED_TXPOWER_THRESHOLD : 0; | |
784 | mvmvif->bf_data.bt_coex_min_thold = | |
785 | enable ? BT_DISABLE_REDUCED_TXPOWER_THRESHOLD : 0; | |
786 | } | |
787 | ||
dac94da8 | 788 | /* must be called under rcu_read_lock */ |
7da052b8 EG |
789 | static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac, |
790 | struct ieee80211_vif *vif) | |
791 | { | |
792 | struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); | |
2b76ef13 EG |
793 | struct iwl_bt_iterator_data *data = _data; |
794 | struct iwl_mvm *mvm = data->mvm; | |
7da052b8 EG |
795 | struct ieee80211_chanctx_conf *chanctx_conf; |
796 | enum ieee80211_smps_mode smps_mode; | |
f6415f6b | 797 | u32 bt_activity_grading; |
2b76ef13 | 798 | int ave_rssi; |
7da052b8 | 799 | |
9ee718aa | 800 | lockdep_assert_held(&mvm->mutex); |
7da052b8 | 801 | |
f6415f6b EG |
802 | switch (vif->type) { |
803 | case NL80211_IFTYPE_STATION: | |
4d66449a EG |
804 | /* Count BSSes vifs */ |
805 | data->num_bss_ifaces++; | |
f6415f6b EG |
806 | /* default smps_mode for BSS / P2P client is AUTOMATIC */ |
807 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
f6415f6b EG |
808 | break; |
809 | case NL80211_IFTYPE_AP: | |
810 | /* default smps_mode for AP / GO is OFF */ | |
811 | smps_mode = IEEE80211_SMPS_OFF; | |
812 | if (!mvmvif->ap_ibss_active) { | |
813 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
814 | smps_mode); | |
815 | return; | |
816 | } | |
7da052b8 | 817 | |
f6415f6b EG |
818 | /* the Ack / Cts kill mask must be default if AP / GO */ |
819 | data->reduced_tx_power = false; | |
820 | break; | |
821 | default: | |
822 | return; | |
823 | } | |
7da052b8 | 824 | |
dac94da8 EG |
825 | chanctx_conf = rcu_dereference(vif->chanctx_conf); |
826 | ||
827 | /* If channel context is invalid or not on 2.4GHz .. */ | |
828 | if ((!chanctx_conf || | |
829 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) { | |
f6415f6b EG |
830 | /* ... relax constraints and disable rssi events */ |
831 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, | |
832 | smps_mode); | |
4d66449a | 833 | data->reduced_tx_power = false; |
f6415f6b EG |
834 | if (vif->type == NL80211_IFTYPE_STATION) |
835 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); | |
41069b46 | 836 | return; |
dac94da8 EG |
837 | } |
838 | ||
f6415f6b EG |
839 | bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading); |
840 | if (bt_activity_grading >= BT_HIGH_TRAFFIC) | |
841 | smps_mode = IEEE80211_SMPS_STATIC; | |
842 | else if (bt_activity_grading >= BT_LOW_TRAFFIC) | |
843 | smps_mode = vif->type == NL80211_IFTYPE_AP ? | |
844 | IEEE80211_SMPS_OFF : | |
845 | IEEE80211_SMPS_DYNAMIC; | |
4d66449a EG |
846 | |
847 | /* relax SMPS contraints for next association */ | |
848 | if (!vif->bss_conf.assoc) | |
849 | smps_mode = IEEE80211_SMPS_AUTOMATIC; | |
850 | ||
f6415f6b EG |
851 | IWL_DEBUG_COEX(data->mvm, |
852 | "mac %d: bt_status %d bt_activity_grading %d smps_req %d\n", | |
853 | mvmvif->id, data->notif->bt_status, bt_activity_grading, | |
854 | smps_mode); | |
855 | ||
856 | iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX, smps_mode); | |
857 | ||
0ee5bcdd EG |
858 | /* low latency is always primary */ |
859 | if (iwl_mvm_vif_low_latency(mvmvif)) { | |
860 | data->primary_ll = true; | |
861 | ||
862 | data->secondary = data->primary; | |
863 | data->primary = chanctx_conf; | |
864 | } | |
865 | ||
dac94da8 | 866 | if (vif->type == NL80211_IFTYPE_AP) { |
5023d966 | 867 | if (!mvmvif->ap_ibss_active) |
dac94da8 EG |
868 | return; |
869 | ||
dac94da8 EG |
870 | if (chanctx_conf == data->primary) |
871 | return; | |
872 | ||
0ee5bcdd EG |
873 | if (!data->primary_ll) { |
874 | /* | |
875 | * downgrade the current primary no matter what its | |
876 | * type is. | |
877 | */ | |
878 | data->secondary = data->primary; | |
879 | data->primary = chanctx_conf; | |
880 | } else { | |
881 | /* there is low latency vif - we will be secondary */ | |
882 | data->secondary = chanctx_conf; | |
883 | } | |
9166b1ee EG |
884 | return; |
885 | } | |
886 | ||
0ee5bcdd EG |
887 | /* |
888 | * STA / P2P Client, try to be primary if first vif. If we are in low | |
889 | * latency mode, we are already in primary and just don't do much | |
890 | */ | |
dac94da8 EG |
891 | if (!data->primary || data->primary == chanctx_conf) |
892 | data->primary = chanctx_conf; | |
893 | else if (!data->secondary) | |
894 | /* if secondary is not NULL, it might be a GO */ | |
895 | data->secondary = chanctx_conf; | |
896 | ||
4d66449a EG |
897 | /* |
898 | * don't reduce the Tx power if one of these is true: | |
899 | * we are in LOOSE | |
900 | * single share antenna product | |
901 | * BT is active | |
902 | * we are associated | |
903 | */ | |
39149911 | 904 | if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT || |
4d66449a EG |
905 | mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc || |
906 | !data->notif->bt_status) { | |
39149911 | 907 | data->reduced_tx_power = false; |
f6fc5775 | 908 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0); |
2b76ef13 | 909 | return; |
39149911 | 910 | } |
2b76ef13 | 911 | |
911222b5 AO |
912 | /* try to get the avg rssi from fw */ |
913 | ave_rssi = mvmvif->bf_data.ave_beacon_signal; | |
2b76ef13 EG |
914 | |
915 | /* if the RSSI isn't valid, fake it is very low */ | |
916 | if (!ave_rssi) | |
917 | ave_rssi = -100; | |
918 | if (ave_rssi > BT_ENABLE_REDUCED_TXPOWER_THRESHOLD) { | |
919 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true)) | |
920 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
921 | ||
922 | /* | |
923 | * bt_kill_msk can be BT_KILL_MSK_REDUCED_TXPOW only if all the | |
924 | * BSS / P2P clients have rssi above threshold. | |
925 | * We set the bt_kill_msk to BT_KILL_MSK_REDUCED_TXPOW before | |
926 | * the iteration, if one interface's rssi isn't good enough, | |
927 | * bt_kill_msk will be set to default values. | |
928 | */ | |
929 | } else if (ave_rssi < BT_DISABLE_REDUCED_TXPOWER_THRESHOLD) { | |
930 | if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false)) | |
931 | IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n"); | |
932 | ||
933 | /* | |
934 | * One interface hasn't rssi above threshold, bt_kill_msk must | |
935 | * be set to default values. | |
936 | */ | |
9e511c31 | 937 | data->reduced_tx_power = false; |
2b76ef13 EG |
938 | } |
939 | ||
940 | /* Begin to monitor the RSSI: it may influence the reduced Tx power */ | |
f6fc5775 | 941 | iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi); |
7da052b8 EG |
942 | } |
943 | ||
d37cac98 | 944 | static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm) |
f421f9c3 | 945 | { |
2b76ef13 | 946 | struct iwl_bt_iterator_data data = { |
7da052b8 | 947 | .mvm = mvm, |
d37cac98 | 948 | .notif = &mvm->last_bt_notif, |
9e511c31 | 949 | .reduced_tx_power = true, |
7da052b8 | 950 | }; |
dac94da8 EG |
951 | struct iwl_bt_coex_ci_cmd cmd = {}; |
952 | u8 ci_bw_idx; | |
f421f9c3 | 953 | |
dac94da8 | 954 | rcu_read_lock(); |
7da052b8 EG |
955 | ieee80211_iterate_active_interfaces_atomic( |
956 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
957 | iwl_mvm_bt_notif_iterator, &data); | |
958 | ||
dac94da8 EG |
959 | if (data.primary) { |
960 | struct ieee80211_chanctx_conf *chan = data.primary; | |
961 | if (WARN_ON(!chan->def.chan)) { | |
962 | rcu_read_unlock(); | |
963 | return; | |
964 | } | |
965 | ||
966 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
967 | ci_bw_idx = 0; | |
968 | cmd.co_run_bw_primary = 0; | |
969 | } else { | |
970 | cmd.co_run_bw_primary = 1; | |
971 | if (chan->def.center_freq1 > | |
972 | chan->def.chan->center_freq) | |
973 | ci_bw_idx = 2; | |
974 | else | |
975 | ci_bw_idx = 1; | |
976 | } | |
977 | ||
978 | cmd.bt_primary_ci = | |
979 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
980 | cmd.primary_ch_phy_id = *((u16 *)data.primary->drv_priv); | |
981 | } | |
982 | ||
983 | if (data.secondary) { | |
984 | struct ieee80211_chanctx_conf *chan = data.secondary; | |
985 | if (WARN_ON(!data.secondary->def.chan)) { | |
986 | rcu_read_unlock(); | |
987 | return; | |
988 | } | |
989 | ||
990 | if (chan->def.width < NL80211_CHAN_WIDTH_40) { | |
991 | ci_bw_idx = 0; | |
992 | cmd.co_run_bw_secondary = 0; | |
993 | } else { | |
994 | cmd.co_run_bw_secondary = 1; | |
995 | if (chan->def.center_freq1 > | |
996 | chan->def.chan->center_freq) | |
997 | ci_bw_idx = 2; | |
998 | else | |
999 | ci_bw_idx = 1; | |
1000 | } | |
1001 | ||
1002 | cmd.bt_secondary_ci = | |
1003 | iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx]; | |
c92f06a1 | 1004 | cmd.secondary_ch_phy_id = *((u16 *)data.secondary->drv_priv); |
dac94da8 EG |
1005 | } |
1006 | ||
1007 | rcu_read_unlock(); | |
1008 | ||
1009 | /* Don't spam the fw with the same command over and over */ | |
1010 | if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) { | |
a1022927 | 1011 | if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0, |
dac94da8 | 1012 | sizeof(cmd), &cmd)) |
3c6acb61 | 1013 | IWL_ERR(mvm, "Failed to send BT_CI cmd\n"); |
dac94da8 EG |
1014 | memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd)); |
1015 | } | |
1016 | ||
2b76ef13 EG |
1017 | /* |
1018 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
1019 | * irrelevant since it is based on the RSSI coming from the beacon. | |
1020 | * Use BT_KILL_MSK_DEFAULT in that case. | |
1021 | */ | |
9e511c31 | 1022 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
2b76ef13 | 1023 | |
9e511c31 | 1024 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 1025 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
9166b1ee EG |
1026 | } |
1027 | ||
9166b1ee EG |
1028 | int iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm, |
1029 | struct iwl_rx_cmd_buffer *rxb, | |
1030 | struct iwl_device_cmd *dev_cmd) | |
1031 | { | |
1032 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1033 | struct iwl_bt_coex_profile_notif *notif = (void *)pkt->data; | |
1034 | ||
1035 | ||
1036 | IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n"); | |
dac94da8 EG |
1037 | IWL_DEBUG_COEX(mvm, "\tBT status: %s\n", |
1038 | notif->bt_status ? "ON" : "OFF"); | |
9166b1ee | 1039 | IWL_DEBUG_COEX(mvm, "\tBT open conn %d\n", notif->bt_open_conn); |
dac94da8 EG |
1040 | IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance); |
1041 | IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n", | |
1042 | le32_to_cpu(notif->primary_ch_lut)); | |
1043 | IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n", | |
1044 | le32_to_cpu(notif->secondary_ch_lut)); | |
1045 | IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n", | |
1046 | le32_to_cpu(notif->bt_activity_grading)); | |
9166b1ee EG |
1047 | IWL_DEBUG_COEX(mvm, "\tBT agg traffic load %d\n", |
1048 | notif->bt_agg_traffic_load); | |
9166b1ee | 1049 | |
d37cac98 EG |
1050 | /* remember this notification for future use: rssi fluctuations */ |
1051 | memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif)); | |
1052 | ||
1053 | iwl_mvm_bt_coex_notif_handle(mvm); | |
2b76ef13 EG |
1054 | |
1055 | /* | |
1056 | * This is an async handler for a notification, returning anything other | |
1057 | * than 0 doesn't make sense even if HCMD failed. | |
1058 | */ | |
1059 | return 0; | |
1060 | } | |
1061 | ||
1062 | static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac, | |
1063 | struct ieee80211_vif *vif) | |
1064 | { | |
1065 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
1066 | struct iwl_bt_iterator_data *data = _data; | |
1067 | struct iwl_mvm *mvm = data->mvm; | |
1068 | ||
1069 | struct ieee80211_sta *sta; | |
1070 | struct iwl_mvm_sta *mvmsta; | |
1071 | ||
f6fc5775 EG |
1072 | struct ieee80211_chanctx_conf *chanctx_conf; |
1073 | ||
1074 | rcu_read_lock(); | |
1075 | chanctx_conf = rcu_dereference(vif->chanctx_conf); | |
1076 | /* If channel context is invalid or not on 2.4GHz - don't count it */ | |
1077 | if (!chanctx_conf || | |
1078 | chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) { | |
1079 | rcu_read_unlock(); | |
1080 | return; | |
1081 | } | |
1082 | rcu_read_unlock(); | |
1083 | ||
2b76ef13 EG |
1084 | if (vif->type != NL80211_IFTYPE_STATION || |
1085 | mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
1086 | return; | |
1087 | ||
1088 | sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id], | |
1089 | lockdep_is_held(&mvm->mutex)); | |
56c07a9c EG |
1090 | |
1091 | /* This can happen if the station has been removed right now */ | |
1092 | if (IS_ERR_OR_NULL(sta)) | |
1093 | return; | |
1094 | ||
5b577a90 | 1095 | mvmsta = iwl_mvm_sta_from_mac80211(sta); |
2b76ef13 | 1096 | |
8e0366f9 EG |
1097 | data->num_bss_ifaces++; |
1098 | ||
2b76ef13 EG |
1099 | /* |
1100 | * This interface doesn't support reduced Tx power (because of low | |
1101 | * RSSI probably), then set bt_kill_msk to default values. | |
1102 | */ | |
1103 | if (!mvmsta->bt_reduced_txpower) | |
9e511c31 | 1104 | data->reduced_tx_power = false; |
2b76ef13 EG |
1105 | /* else - possibly leave it to BT_KILL_MSK_REDUCED_TXPOW */ |
1106 | } | |
1107 | ||
1108 | void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif, | |
1109 | enum ieee80211_rssi_event rssi_event) | |
1110 | { | |
1111 | struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv; | |
2b76ef13 EG |
1112 | struct iwl_bt_iterator_data data = { |
1113 | .mvm = mvm, | |
9e511c31 | 1114 | .reduced_tx_power = true, |
2b76ef13 EG |
1115 | }; |
1116 | int ret; | |
1117 | ||
3dd1cd2d | 1118 | lockdep_assert_held(&mvm->mutex); |
2b76ef13 | 1119 | |
1e929199 EG |
1120 | /* |
1121 | * Rssi update while not associated - can happen since the statistics | |
1122 | * are handled asynchronously | |
1123 | */ | |
1124 | if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT) | |
3dd1cd2d | 1125 | return; |
2b76ef13 | 1126 | |
4515f30f | 1127 | /* No BT - reports should be disabled */ |
0af8835e | 1128 | if (!mvm->last_bt_notif.bt_status) |
3dd1cd2d | 1129 | return; |
2b76ef13 EG |
1130 | |
1131 | IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid, | |
1132 | rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW"); | |
1133 | ||
1134 | /* | |
1135 | * Check if rssi is good enough for reduced Tx power, but not in loose | |
1136 | * scheme. | |
1137 | */ | |
39149911 | 1138 | if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant || |
4515f30f | 1139 | iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT) |
2b76ef13 EG |
1140 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, |
1141 | false); | |
f421f9c3 | 1142 | else |
2b76ef13 | 1143 | ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true); |
f421f9c3 | 1144 | |
2b76ef13 EG |
1145 | if (ret) |
1146 | IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n"); | |
f421f9c3 | 1147 | |
2b76ef13 EG |
1148 | ieee80211_iterate_active_interfaces_atomic( |
1149 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
1150 | iwl_mvm_bt_rssi_iterator, &data); | |
f421f9c3 | 1151 | |
2b76ef13 EG |
1152 | /* |
1153 | * If there are no BSS / P2P client interfaces, reduced Tx Power is | |
1154 | * irrelevant since it is based on the RSSI coming from the beacon. | |
1155 | * Use BT_KILL_MSK_DEFAULT in that case. | |
1156 | */ | |
9e511c31 | 1157 | data.reduced_tx_power = data.reduced_tx_power && data.num_bss_ifaces; |
f421f9c3 | 1158 | |
9e511c31 | 1159 | if (iwl_mvm_bt_udpate_ctrl_kill_msk(mvm, data.reduced_tx_power)) |
2b76ef13 | 1160 | IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n"); |
f421f9c3 | 1161 | } |
9166b1ee | 1162 | |
9145d151 EG |
1163 | #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) |
1164 | #define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200) | |
1165 | ||
5b7ff615 EG |
1166 | u16 iwl_mvm_coex_agg_time_limit(struct iwl_mvm *mvm, |
1167 | struct ieee80211_sta *sta) | |
9145d151 | 1168 | { |
5b577a90 | 1169 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
9145d151 EG |
1170 | enum iwl_bt_coex_lut_type lut_type; |
1171 | ||
1172 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < | |
c2119351 | 1173 | BT_HIGH_TRAFFIC) |
9145d151 EG |
1174 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; |
1175 | ||
1176 | lut_type = iwl_get_coex_type(mvm, mvmsta->vif); | |
1177 | ||
1178 | if (lut_type == BT_COEX_LOOSE_LUT) | |
1179 | return LINK_QUAL_AGG_TIME_LIMIT_DEF; | |
1180 | ||
1181 | /* tight coex, high bt traffic, reduce AGG time limit */ | |
1182 | return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT; | |
1183 | } | |
1184 | ||
ffa6c707 EG |
1185 | bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm, |
1186 | struct ieee80211_sta *sta) | |
1187 | { | |
5b577a90 | 1188 | struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); |
ffa6c707 EG |
1189 | |
1190 | if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) < | |
1191 | BT_HIGH_TRAFFIC) | |
1192 | return true; | |
1193 | ||
1194 | /* | |
1195 | * In Tight, BT can't Rx while we Tx, so use both antennas since BT is | |
1196 | * already killed. | |
1197 | * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while we | |
1198 | * Tx. | |
1199 | */ | |
1200 | return iwl_get_coex_type(mvm, mvmsta->vif) == BT_COEX_TIGHT_LUT; | |
1201 | } | |
1202 | ||
2fd647f8 EP |
1203 | bool iwl_mvm_bt_coex_is_tpc_allowed(struct iwl_mvm *mvm, |
1204 | enum ieee80211_band band) | |
1205 | { | |
1206 | u32 bt_activity = le32_to_cpu(mvm->last_bt_notif.bt_activity_grading); | |
1207 | ||
1208 | if (band != IEEE80211_BAND_2GHZ) | |
1209 | return false; | |
1210 | ||
1211 | return bt_activity >= BT_LOW_TRAFFIC; | |
1212 | } | |
1213 | ||
ee7bea58 | 1214 | u8 iwl_mvm_bt_coex_tx_prio(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr, |
b797e3fb | 1215 | struct ieee80211_tx_info *info, u8 ac) |
ee7bea58 EG |
1216 | { |
1217 | __le16 fc = hdr->frame_control; | |
1218 | ||
b797e3fb EG |
1219 | if (info->band != IEEE80211_BAND_2GHZ) |
1220 | return 0; | |
1221 | ||
cdb00563 EG |
1222 | if (unlikely(mvm->bt_tx_prio)) |
1223 | return mvm->bt_tx_prio - 1; | |
1224 | ||
ee7bea58 | 1225 | /* High prio packet (wrt. BT coex) if it is EAPOL, MCAST or MGMT */ |
b797e3fb | 1226 | if (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO || |
ee7bea58 | 1227 | is_multicast_ether_addr(hdr->addr1) || |
b797e3fb EG |
1228 | ieee80211_is_ctl(fc) || ieee80211_is_mgmt(fc) || |
1229 | ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc)) | |
1230 | return 3; | |
1231 | ||
1232 | switch (ac) { | |
1233 | case IEEE80211_AC_BE: | |
1234 | return 1; | |
1235 | case IEEE80211_AC_VO: | |
1236 | return 3; | |
1237 | case IEEE80211_AC_VI: | |
ee7bea58 | 1238 | return 2; |
b797e3fb EG |
1239 | default: |
1240 | break; | |
1241 | } | |
ee7bea58 EG |
1242 | |
1243 | return 0; | |
1244 | } | |
1245 | ||
8e484f0b | 1246 | void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm) |
9166b1ee | 1247 | { |
d37cac98 | 1248 | iwl_mvm_bt_coex_notif_handle(mvm); |
9166b1ee | 1249 | } |
b9fae2d5 EG |
1250 | |
1251 | int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm, | |
1252 | struct iwl_rx_cmd_buffer *rxb, | |
1253 | struct iwl_device_cmd *dev_cmd) | |
1254 | { | |
1255 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | |
1256 | u32 ant_isolation = le32_to_cpup((void *)pkt->data); | |
1257 | u8 __maybe_unused lower_bound, upper_bound; | |
fff47eb0 | 1258 | int ret; |
b9fae2d5 EG |
1259 | u8 lut; |
1260 | ||
1261 | struct iwl_bt_coex_cmd *bt_cmd; | |
1262 | struct iwl_host_cmd cmd = { | |
1263 | .id = BT_CONFIG, | |
1264 | .len = { sizeof(*bt_cmd), }, | |
1265 | .dataflags = { IWL_HCMD_DFL_NOCOPY, }, | |
b9fae2d5 EG |
1266 | }; |
1267 | ||
1268 | if (!IWL_MVM_BT_COEX_CORUNNING) | |
1269 | return 0; | |
1270 | ||
1271 | lockdep_assert_held(&mvm->mutex); | |
1272 | ||
1273 | if (ant_isolation == mvm->last_ant_isol) | |
1274 | return 0; | |
1275 | ||
1276 | for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++) | |
1277 | if (ant_isolation < antenna_coupling_ranges[lut + 1].range) | |
1278 | break; | |
1279 | ||
1280 | lower_bound = antenna_coupling_ranges[lut].range; | |
1281 | ||
1282 | if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1) | |
1283 | upper_bound = antenna_coupling_ranges[lut + 1].range; | |
1284 | else | |
1285 | upper_bound = antenna_coupling_ranges[lut].range; | |
1286 | ||
1287 | IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n", | |
1288 | ant_isolation, lower_bound, upper_bound, lut); | |
1289 | ||
1290 | mvm->last_ant_isol = ant_isolation; | |
1291 | ||
1292 | if (mvm->last_corun_lut == lut) | |
1293 | return 0; | |
1294 | ||
1295 | mvm->last_corun_lut = lut; | |
1296 | ||
1297 | bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL); | |
1298 | if (!bt_cmd) | |
1299 | return 0; | |
1300 | cmd.data[0] = bt_cmd; | |
1301 | ||
1302 | bt_cmd->flags = cpu_to_le32(BT_COEX_NW); | |
1303 | bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_ENABLE | | |
1304 | BT_VALID_CORUN_LUT_20 | | |
1305 | BT_VALID_CORUN_LUT_40); | |
1306 | ||
1307 | /* For the moment, use the same LUT for 20GHz and 40GHz */ | |
1308 | memcpy(bt_cmd->bt4_corun_lut20, antenna_coupling_ranges[lut].lut20, | |
1309 | sizeof(bt_cmd->bt4_corun_lut20)); | |
1310 | ||
1311 | memcpy(bt_cmd->bt4_corun_lut40, antenna_coupling_ranges[lut].lut20, | |
1312 | sizeof(bt_cmd->bt4_corun_lut40)); | |
1313 | ||
fff47eb0 EG |
1314 | ret = iwl_mvm_send_cmd(mvm, &cmd); |
1315 | ||
1316 | kfree(bt_cmd); | |
1317 | return ret; | |
b9fae2d5 | 1318 | } |