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Merge branch 'perf/urgent' into perf/core, to pick up fixes
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / iwlwifi / mvm / coex.c
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931d4160
EG		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
931d4160
EG		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
26 * in the file called COPYING.
27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2013 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
931d4160
EG		 36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65
ee7bea58
EG		 66#include <linux/ieee80211.h>
67#include <linux/etherdevice.h>
2b76ef13
EG		 68#include <net/mac80211.h>
69
5b7ff615 70#include "fw-api-coex.h"
931d4160
EG		 71#include "iwl-modparams.h"
72#include "mvm.h"
f421f9c3 73#include "iwl-debug.h"
931d4160 74
dac94da8 75#define BT_ANTENNA_COUPLING_THRESHOLD (30)
2b76ef13 76
1459f269
EG		 77const u32 iwl_bt_ctl_kill_msk[BT_KILL_MSK_MAX] = {
78 [BT_KILL_MSK_DEFAULT] = 0xfffffc00,
79 [BT_KILL_MSK_NEVER] = 0xffffffff,
80 [BT_KILL_MSK_ALWAYS] = 0,
931d4160
EG		 81};
82
1459f269
EG		 83const u8 iwl_bt_cts_kill_msk[BT_MAX_AG][BT_COEX_MAX_LUT] = {
84 {
85 BT_KILL_MSK_ALWAYS,
86 BT_KILL_MSK_ALWAYS,
87 BT_KILL_MSK_ALWAYS,
88 },
89 {
90 BT_KILL_MSK_NEVER,
91 BT_KILL_MSK_NEVER,
92 BT_KILL_MSK_NEVER,
93 },
94 {
95 BT_KILL_MSK_NEVER,
96 BT_KILL_MSK_NEVER,
97 BT_KILL_MSK_NEVER,
98 },
99 {
100 BT_KILL_MSK_DEFAULT,
101 BT_KILL_MSK_NEVER,
102 BT_KILL_MSK_DEFAULT,
103 },
104};
105
106const u8 iwl_bt_ack_kill_msk[BT_MAX_AG][BT_COEX_MAX_LUT] = {
107 {
108 BT_KILL_MSK_ALWAYS,
109 BT_KILL_MSK_ALWAYS,
110 BT_KILL_MSK_ALWAYS,
111 },
112 {
113 BT_KILL_MSK_ALWAYS,
114 BT_KILL_MSK_ALWAYS,
115 BT_KILL_MSK_ALWAYS,
116 },
117 {
118 BT_KILL_MSK_ALWAYS,
119 BT_KILL_MSK_ALWAYS,
120 BT_KILL_MSK_ALWAYS,
121 },
122 {
123 BT_KILL_MSK_DEFAULT,
124 BT_KILL_MSK_ALWAYS,
125 BT_KILL_MSK_DEFAULT,
126 },
931d4160
EG		 127};
128
dac94da8 129static const __le32 iwl_bt_prio_boost[BT_COEX_BOOST_SIZE] = {
2adc8949
EG		 130 cpu_to_le32(0xf0f0f0f0), /* 50% */
131 cpu_to_le32(0xc0c0c0c0), /* 25% */
132 cpu_to_le32(0xfcfcfcfc), /* 75% */
133 cpu_to_le32(0xfefefefe), /* 87.5% */
931d4160
EG		 134};
135
d1d5e3cd
EG		 136static const __le32 iwl_single_shared_ant[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
137 {
138 cpu_to_le32(0x40000000),
139 cpu_to_le32(0x00000000),
140 cpu_to_le32(0x44000000),
141 cpu_to_le32(0x00000000),
142 cpu_to_le32(0x40000000),
143 cpu_to_le32(0x00000000),
144 cpu_to_le32(0x44000000),
145 cpu_to_le32(0x00000000),
146 cpu_to_le32(0xc0004000),
147 cpu_to_le32(0xf0005000),
148 cpu_to_le32(0xc0004000),
149 cpu_to_le32(0xf0005000),
150 },
151 {
152 cpu_to_le32(0x40000000),
153 cpu_to_le32(0x00000000),
154 cpu_to_le32(0x44000000),
155 cpu_to_le32(0x00000000),
156 cpu_to_le32(0x40000000),
157 cpu_to_le32(0x00000000),
158 cpu_to_le32(0x44000000),
159 cpu_to_le32(0x00000000),
160 cpu_to_le32(0xc0004000),
161 cpu_to_le32(0xf0005000),
162 cpu_to_le32(0xc0004000),
163 cpu_to_le32(0xf0005000),
164 },
165 {
166 cpu_to_le32(0x40000000),
167 cpu_to_le32(0x00000000),
168 cpu_to_le32(0x44000000),
169 cpu_to_le32(0x00000000),
170 cpu_to_le32(0x40000000),
171 cpu_to_le32(0x00000000),
172 cpu_to_le32(0x44000000),
173 cpu_to_le32(0x00000000),
174 cpu_to_le32(0xc0004000),
175 cpu_to_le32(0xf0005000),
176 cpu_to_le32(0xc0004000),
177 cpu_to_le32(0xf0005000),
178 },
179};
180
dac94da8
EG		 181static const __le32 iwl_combined_lookup[BT_COEX_MAX_LUT][BT_COEX_LUT_SIZE] = {
182 {
183 /* Tight */
184 cpu_to_le32(0xaaaaaaaa),
185 cpu_to_le32(0xaaaaaaaa),
186 cpu_to_le32(0xaeaaaaaa),
187 cpu_to_le32(0xaaaaaaaa),
188 cpu_to_le32(0xcc00ff28),
189 cpu_to_le32(0x0000aaaa),
190 cpu_to_le32(0xcc00aaaa),
191 cpu_to_le32(0x0000aaaa),
192 cpu_to_le32(0xc0004000),
a6bc9280 193 cpu_to_le32(0x00004000),
dac94da8
EG		 194 cpu_to_le32(0xf0005000),
195 cpu_to_le32(0xf0005000),
196 },
197 {
198 /* Loose */
199 cpu_to_le32(0xaaaaaaaa),
200 cpu_to_le32(0xaaaaaaaa),
201 cpu_to_le32(0xaaaaaaaa),
202 cpu_to_le32(0xaaaaaaaa),
203 cpu_to_le32(0xcc00ff28),
204 cpu_to_le32(0x0000aaaa),
205 cpu_to_le32(0xcc00aaaa),
206 cpu_to_le32(0x0000aaaa),
207 cpu_to_le32(0x00000000),
208 cpu_to_le32(0x00000000),
209 cpu_to_le32(0xf0005000),
210 cpu_to_le32(0xf0005000),
211 },
212 {
213 /* Tx Tx disabled */
214 cpu_to_le32(0xaaaaaaaa),
215 cpu_to_le32(0xaaaaaaaa),
a6bc9280 216 cpu_to_le32(0xeeaaaaaa),
dac94da8
EG		 217 cpu_to_le32(0xaaaaaaaa),
218 cpu_to_le32(0xcc00ff28),
219 cpu_to_le32(0x0000aaaa),
220 cpu_to_le32(0xcc00aaaa),
221 cpu_to_le32(0x0000aaaa),
a6bc9280
EG		 222 cpu_to_le32(0xc0004000),
223 cpu_to_le32(0xc0004000),
224 cpu_to_le32(0xf0005000),
225 cpu_to_le32(0xf0005000),
dac94da8 226 },
931d4160
EG		 227};
228
dac94da8
EG		 229/* 20MHz / 40MHz below / 40Mhz above*/
230static const __le64 iwl_ci_mask[][3] = {
231 /* dummy entry for channel 0 */
232 {cpu_to_le64(0), cpu_to_le64(0), cpu_to_le64(0)},
233 {
234 cpu_to_le64(0x0000001FFFULL),
235 cpu_to_le64(0x0ULL),
236 cpu_to_le64(0x00007FFFFFULL),
237 },
238 {
239 cpu_to_le64(0x000000FFFFULL),
240 cpu_to_le64(0x0ULL),
241 cpu_to_le64(0x0003FFFFFFULL),
242 },
243 {
244 cpu_to_le64(0x000003FFFCULL),
245 cpu_to_le64(0x0ULL),
246 cpu_to_le64(0x000FFFFFFCULL),
247 },
248 {
249 cpu_to_le64(0x00001FFFE0ULL),
250 cpu_to_le64(0x0ULL),
251 cpu_to_le64(0x007FFFFFE0ULL),
252 },
253 {
254 cpu_to_le64(0x00007FFF80ULL),
255 cpu_to_le64(0x00007FFFFFULL),
256 cpu_to_le64(0x01FFFFFF80ULL),
257 },
258 {
259 cpu_to_le64(0x0003FFFC00ULL),
260 cpu_to_le64(0x0003FFFFFFULL),
261 cpu_to_le64(0x0FFFFFFC00ULL),
262 },
263 {
264 cpu_to_le64(0x000FFFF000ULL),
265 cpu_to_le64(0x000FFFFFFCULL),
266 cpu_to_le64(0x3FFFFFF000ULL),
267 },
268 {
269 cpu_to_le64(0x007FFF8000ULL),
270 cpu_to_le64(0x007FFFFFE0ULL),
271 cpu_to_le64(0xFFFFFF8000ULL),
272 },
273 {
274 cpu_to_le64(0x01FFFE0000ULL),
275 cpu_to_le64(0x01FFFFFF80ULL),
276 cpu_to_le64(0xFFFFFE0000ULL),
277 },
278 {
279 cpu_to_le64(0x0FFFF00000ULL),
280 cpu_to_le64(0x0FFFFFFC00ULL),
281 cpu_to_le64(0x0ULL),
282 },
283 {
284 cpu_to_le64(0x3FFFC00000ULL),
285 cpu_to_le64(0x3FFFFFF000ULL),
286 cpu_to_le64(0x0)
287 },
288 {
289 cpu_to_le64(0xFFFE000000ULL),
290 cpu_to_le64(0xFFFFFF8000ULL),
291 cpu_to_le64(0x0)
292 },
293 {
294 cpu_to_le64(0xFFF8000000ULL),
295 cpu_to_le64(0xFFFFFE0000ULL),
296 cpu_to_le64(0x0)
297 },
298 {
d2ccc902 299 cpu_to_le64(0xFFC0000000ULL),
dac94da8 300 cpu_to_le64(0x0ULL),
d2ccc902 301 cpu_to_le64(0x0ULL)
dac94da8 302 },
931d4160
EG		 303};
304
dac94da8 305static const __le32 iwl_bt_mprio_lut[BT_COEX_MULTI_PRIO_LUT_SIZE] = {
d14b28fd
EG		 306 cpu_to_le32(0x2e402280),
307 cpu_to_le32(0x7711a751),
e715c3a9
EG		 308};
309
b9fae2d5
EG		 310struct corunning_block_luts {
311 u8 range;
312 __le32 lut20[BT_COEX_CORUN_LUT_SIZE];
313};
314
315/*
316 * Ranges for the antenna coupling calibration / co-running block LUT:
317 * LUT0: [ 0, 12[
318 * LUT1: [12, 20[
319 * LUT2: [20, 21[
320 * LUT3: [21, 23[
321 * LUT4: [23, 27[
322 * LUT5: [27, 30[
323 * LUT6: [30, 32[
324 * LUT7: [32, 33[
325 * LUT8: [33, - [
326 */
327static const struct corunning_block_luts antenna_coupling_ranges[] = {
328 {
329 .range = 0,
330 .lut20 = {
331 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
332 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
333 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
334 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
335 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
336 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
337 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
338 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
339 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
340 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
341 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
342 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
343 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
344 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
345 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
346 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
347 },
348 },
349 {
350 .range = 12,
351 .lut20 = {
352 cpu_to_le32(0x00000001), cpu_to_le32(0x00000000),
353 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
354 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
355 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
356 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
357 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
358 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
359 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
360 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
361 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
362 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
363 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
364 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
365 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
366 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
367 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
368 },
369 },
370 {
371 .range = 20,
372 .lut20 = {
373 cpu_to_le32(0x00000002), cpu_to_le32(0x00000000),
374 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
375 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
376 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
377 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
378 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
379 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
380 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
381 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
382 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
383 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
384 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
385 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
386 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
387 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
388 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
389 },
390 },
391 {
392 .range = 21,
393 .lut20 = {
394 cpu_to_le32(0x00000003), cpu_to_le32(0x00000000),
395 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
396 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
397 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
398 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
399 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
400 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
401 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
402 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
403 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
404 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
405 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
406 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
407 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
408 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
409 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
410 },
411 },
412 {
413 .range = 23,
414 .lut20 = {
415 cpu_to_le32(0x00000004), cpu_to_le32(0x00000000),
416 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
417 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
418 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
419 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
420 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
421 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
422 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
423 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
424 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
425 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
426 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
427 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
428 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
429 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
430 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
431 },
432 },
433 {
434 .range = 27,
435 .lut20 = {
436 cpu_to_le32(0x00000005), cpu_to_le32(0x00000000),
437 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
438 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
439 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
440 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
441 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
442 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
443 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
444 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
445 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
446 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
447 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
448 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
449 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
450 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
451 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
452 },
453 },
454 {
455 .range = 30,
456 .lut20 = {
457 cpu_to_le32(0x00000006), cpu_to_le32(0x00000000),
458 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
459 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
460 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
461 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
462 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
463 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
464 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
465 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
466 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
467 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
468 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
469 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
470 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
471 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
472 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
473 },
474 },
475 {
476 .range = 32,
477 .lut20 = {
478 cpu_to_le32(0x00000007), cpu_to_le32(0x00000000),
479 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
480 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
481 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
482 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
483 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
484 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
485 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
486 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
487 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
488 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
489 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
490 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
491 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
492 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
493 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
494 },
495 },
496 {
497 .range = 33,
498 .lut20 = {
499 cpu_to_le32(0x00000008), cpu_to_le32(0x00000000),
500 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
501 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
502 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
503 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
504 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
505 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
506 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
507 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
508 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
509 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
510 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
511 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
512 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
513 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
514 cpu_to_le32(0x00000000), cpu_to_le32(0x00000000),
515 },
516 },
517};
518
4515f30f
EG		 519static enum iwl_bt_coex_lut_type
520iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif)
521{
522 struct ieee80211_chanctx_conf *chanctx_conf;
523 enum iwl_bt_coex_lut_type ret;
524 u16 phy_ctx_id;
430a3bba 525 u32 primary_ch_phy_id, secondary_ch_phy_id;
4515f30f 526
9145d151
EG		 527 /*
528 * Checking that we hold mvm->mutex is a good idea, but the rate
529 * control can't acquire the mutex since it runs in Tx path.
530 * So this is racy in that case, but in the worst case, the AMPDU
531 * size limit will be wrong for a short time which is not a big
532 * issue.
533 */
4515f30f
EG		 534
535 rcu_read_lock();
536
537 chanctx_conf = rcu_dereference(vif->chanctx_conf);
538
539 if (!chanctx_conf ||
540 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) {
541 rcu_read_unlock();
7fa4fa0c 542 return BT_COEX_INVALID_LUT;
4515f30f
EG		 543 }
544
545 ret = BT_COEX_TX_DIS_LUT;
546
39149911
EG		 547 if (mvm->cfg->bt_shared_single_ant) {
548 rcu_read_unlock();
549 return ret;
550 }
551
4515f30f 552 phy_ctx_id = *((u16 *)chanctx_conf->drv_priv);
430a3bba
EG		 553 primary_ch_phy_id = le32_to_cpu(mvm->last_bt_ci_cmd.primary_ch_phy_id);
554 secondary_ch_phy_id =
555 le32_to_cpu(mvm->last_bt_ci_cmd.secondary_ch_phy_id);
4515f30f 556
430a3bba 557 if (primary_ch_phy_id == phy_ctx_id)
4515f30f 558 ret = le32_to_cpu(mvm->last_bt_notif.primary_ch_lut);
430a3bba 559 else if (secondary_ch_phy_id == phy_ctx_id)
4515f30f
EG		 560 ret = le32_to_cpu(mvm->last_bt_notif.secondary_ch_lut);
561 /* else - default = TX TX disallowed */
562
563 rcu_read_unlock();
564
565 return ret;
566}
567
931d4160
EG		 568int iwl_send_bt_init_conf(struct iwl_mvm *mvm)
569{
430a3bba 570 struct iwl_bt_coex_cmd *bt_cmd;
03e304e4
EG		 571 struct iwl_host_cmd cmd = {
572 .id = BT_CONFIG,
573 .len = { sizeof(*bt_cmd), },
574 .dataflags = { IWL_HCMD_DFL_NOCOPY, },
931d4160
EG		 575 };
576 int ret;
430a3bba 577 u32 mode;
dac94da8 578
0ea8d043
EG		 579 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
580 return iwl_send_bt_init_conf_old(mvm);
581
03e304e4
EG		 582 bt_cmd = kzalloc(sizeof(*bt_cmd), GFP_KERNEL);
583 if (!bt_cmd)
584 return -ENOMEM;
585 cmd.data[0] = bt_cmd;
586
a39979a8
EG		 587 lockdep_assert_held(&mvm->mutex);
588
589 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS)) {
590 switch (mvm->bt_force_ant_mode) {
a39979a8 591 case BT_FORCE_ANT_BT:
430a3bba 592 mode = BT_COEX_BT;
a39979a8
EG		 593 break;
594 case BT_FORCE_ANT_WIFI:
430a3bba 595 mode = BT_COEX_WIFI;
a39979a8
EG		 596 break;
597 default:
598 WARN_ON(1);
430a3bba 599 mode = 0;
a39979a8
EG		 600 }
601
430a3bba 602 bt_cmd->mode = cpu_to_le32(mode);
a39979a8
EG		 603 goto send_cmd;
604 }
605
430a3bba
EG		 606 bt_cmd->max_kill = cpu_to_le32(5);
607 bt_cmd->bt4_antenna_isolation_thr =
608 cpu_to_le32(BT_ANTENNA_COUPLING_THRESHOLD);
609 bt_cmd->bt4_tx_tx_delta_freq_thr = cpu_to_le32(15);
610 bt_cmd->bt4_tx_rx_max_freq0 = cpu_to_le32(15);
611 bt_cmd->override_primary_lut = cpu_to_le32(BT_COEX_INVALID_LUT);
612 bt_cmd->override_secondary_lut = cpu_to_le32(BT_COEX_INVALID_LUT);
613
614 mode = iwlwifi_mod_params.bt_coex_active ? BT_COEX_NW : BT_COEX_DISABLE;
615 bt_cmd->mode = cpu_to_le32(mode);
dac94da8 616
741e703b 617 if (IWL_MVM_BT_COEX_SYNC2SCO)
430a3bba
EG		 618 bt_cmd->enabled_modules |=
619 cpu_to_le32(BT_COEX_SYNC2SCO_ENABLED);
741e703b 620
430a3bba
EG		 621 if (IWL_MVM_BT_COEX_CORUNNING)
622 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_CORUN_ENABLED);
b9fae2d5 623
cdb00563 624 if (IWL_MVM_BT_COEX_MPLUT) {
430a3bba
EG		 625 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_MPLUT_ENABLED);
626 bt_cmd->enabled_modules |=
627 cpu_to_le32(BT_COEX_MPLUT_BOOST_ENABLED);
cdb00563
EG		 628 }
629
261c0ec0
EG		 630 bt_cmd->enabled_modules |= cpu_to_le32(BT_COEX_HIGH_BAND_RET);
631
d1d5e3cd
EG		 632 if (mvm->cfg->bt_shared_single_ant)
633 memcpy(&bt_cmd->decision_lut, iwl_single_shared_ant,
634 sizeof(iwl_single_shared_ant));
635 else
636 memcpy(&bt_cmd->decision_lut, iwl_combined_lookup,
637 sizeof(iwl_combined_lookup));
638
430a3bba 639 memcpy(&bt_cmd->mplut_prio_boost, iwl_bt_prio_boost,
dac94da8 640 sizeof(iwl_bt_prio_boost));
430a3bba 641 memcpy(&bt_cmd->multiprio_lut, iwl_bt_mprio_lut,
dac94da8 642 sizeof(iwl_bt_mprio_lut));
931d4160 643
a39979a8 644send_cmd:
2b76ef13 645 memset(&mvm->last_bt_notif, 0, sizeof(mvm->last_bt_notif));
dac94da8 646 memset(&mvm->last_bt_ci_cmd, 0, sizeof(mvm->last_bt_ci_cmd));
2b76ef13 647
03e304e4 648 ret = iwl_mvm_send_cmd(mvm, &cmd);
931d4160 649
03e304e4
EG		 650 kfree(bt_cmd);
651 return ret;
931d4160 652}
f421f9c3 653
1459f269 654static int iwl_mvm_bt_udpate_sw_boost(struct iwl_mvm *mvm)
2b76ef13 655{
430a3bba 656 struct iwl_bt_coex_profile_notif *notif = &mvm->last_bt_notif;
1459f269
EG		 657 u32 primary_lut = le32_to_cpu(notif->primary_ch_lut);
658 u32 secondary_lut = le32_to_cpu(notif->secondary_ch_lut);
659 u32 ag = le32_to_cpu(notif->bt_activity_grading);
660 struct iwl_bt_coex_sw_boost_update_cmd cmd = {};
661 u8 ack_kill_msk[NUM_PHY_CTX] = {};
662 u8 cts_kill_msk[NUM_PHY_CTX] = {};
663 int i;
2b76ef13
EG		 664
665 lockdep_assert_held(&mvm->mutex);
666
1459f269
EG		 667 ack_kill_msk[0] = iwl_bt_ack_kill_msk[ag][primary_lut];
668 cts_kill_msk[0] = iwl_bt_cts_kill_msk[ag][primary_lut];
2b76ef13 669
1459f269
EG		 670 ack_kill_msk[1] = iwl_bt_ack_kill_msk[ag][secondary_lut];
671 cts_kill_msk[1] = iwl_bt_cts_kill_msk[ag][secondary_lut];
2b76ef13
EG		 672
673 /* Don't send HCMD if there is no update */
1459f269
EG		 674 if (!memcmp(ack_kill_msk, mvm->bt_ack_kill_msk, sizeof(ack_kill_msk)) ||
675 !memcmp(cts_kill_msk, mvm->bt_cts_kill_msk, sizeof(cts_kill_msk)))
2b76ef13
EG		 676 return 0;
677
1459f269
EG		 678 memcpy(mvm->bt_ack_kill_msk, ack_kill_msk,
679 sizeof(mvm->bt_ack_kill_msk));
680 memcpy(mvm->bt_cts_kill_msk, cts_kill_msk,
681 sizeof(mvm->bt_cts_kill_msk));
03e304e4 682
1459f269 683 BUILD_BUG_ON(ARRAY_SIZE(ack_kill_msk) < ARRAY_SIZE(cmd.boost_values));
03e304e4 684
1459f269
EG		 685 for (i = 0; i < ARRAY_SIZE(cmd.boost_values); i++) {
686 cmd.boost_values[i].kill_ack_msk =
687 cpu_to_le32(iwl_bt_ctl_kill_msk[ack_kill_msk[i]]);
688 cmd.boost_values[i].kill_cts_msk =
689 cpu_to_le32(iwl_bt_ctl_kill_msk[cts_kill_msk[i]]);
690 }
03e304e4 691
df878f38
EG		 692 return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_SW_BOOST, 0,
693 sizeof(cmd), &cmd);
2b76ef13
EG		 694}
695
1fa477c6
EG		 696static int iwl_mvm_bt_coex_reduced_txp(struct iwl_mvm *mvm, u8 sta_id,
697 bool enable)
2b76ef13 698{
455e7ac5 699 struct iwl_bt_coex_reduced_txp_update_cmd cmd = {};
2b76ef13 700 struct iwl_mvm_sta *mvmsta;
455e7ac5 701 u32 value;
03e304e4 702 int ret;
2b76ef13 703
f327b04c
EG		 704 mvmsta = iwl_mvm_sta_from_staid_protected(mvm, sta_id);
705 if (!mvmsta)
2b76ef13
EG		 706 return 0;
707
2b76ef13 708 /* nothing to do */
1fa477c6 709 if (mvmsta->bt_reduced_txpower == enable)
2b76ef13
EG		 710 return 0;
711
455e7ac5 712 value = mvmsta->sta_id;
03e304e4 713
2b76ef13 714 if (enable)
455e7ac5 715 value |= BT_REDUCED_TX_POWER_BIT;
2b76ef13
EG		 716
717 IWL_DEBUG_COEX(mvm, "%sable reduced Tx Power for sta %d\n",
718 enable ? "en" : "dis", sta_id);
719
455e7ac5 720 cmd.reduced_txp = cpu_to_le32(value);
2b76ef13
EG		 721 mvmsta->bt_reduced_txpower = enable;
722
455e7ac5
EG		 723 ret = iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_REDUCED_TXP, CMD_ASYNC,
724 sizeof(cmd), &cmd);
03e304e4 725
03e304e4 726 return ret;
2b76ef13
EG		 727}
728
729struct iwl_bt_iterator_data {
430a3bba 730 struct iwl_bt_coex_profile_notif *notif;
2b76ef13 731 struct iwl_mvm *mvm;
dac94da8
EG		 732 struct ieee80211_chanctx_conf *primary;
733 struct ieee80211_chanctx_conf *secondary;
0ee5bcdd 734 bool primary_ll;
7da052b8
EG		 735};
736
f6fc5775
EG		 737static inline
738void iwl_mvm_bt_coex_enable_rssi_event(struct iwl_mvm *mvm,
739 struct ieee80211_vif *vif,
740 bool enable, int rssi)
741{
742 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
743
744 mvmvif->bf_data.last_bt_coex_event = rssi;
745 mvmvif->bf_data.bt_coex_max_thold =
8286d9f5 746 enable ? -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH : 0;
f6fc5775 747 mvmvif->bf_data.bt_coex_min_thold =
8286d9f5 748 enable ? -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH : 0;
f6fc5775
EG		 749}
750
dac94da8 751/* must be called under rcu_read_lock */
7da052b8
EG		 752static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac,
753 struct ieee80211_vif *vif)
754{
755 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
2b76ef13
EG		 756 struct iwl_bt_iterator_data *data = _data;
757 struct iwl_mvm *mvm = data->mvm;
7da052b8 758 struct ieee80211_chanctx_conf *chanctx_conf;
582de30a
JB		 759 /* default smps_mode is AUTOMATIC - only used for client modes */
760 enum ieee80211_smps_mode smps_mode = IEEE80211_SMPS_AUTOMATIC;
f6415f6b 761 u32 bt_activity_grading;
2b76ef13 762 int ave_rssi;
7da052b8 763
9ee718aa 764 lockdep_assert_held(&mvm->mutex);
7da052b8 765
f6415f6b
EG		 766 switch (vif->type) {
767 case NL80211_IFTYPE_STATION:
f6415f6b
EG		 768 break;
769 case NL80211_IFTYPE_AP:
45bbb2ca 770 if (!mvmvif->ap_ibss_active)
f6415f6b 771 return;
f6415f6b
EG		 772 break;
773 default:
774 return;
775 }
7da052b8 776
dac94da8
EG		 777 chanctx_conf = rcu_dereference(vif->chanctx_conf);
778
779 /* If channel context is invalid or not on 2.4GHz .. */
780 if ((!chanctx_conf ||
781 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ)) {
0f618e6e 782 if (vif->type == NL80211_IFTYPE_STATION) {
45bbb2ca
EG		 783 /* ... relax constraints and disable rssi events */
784 iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX,
785 smps_mode);
0f618e6e
EG		 786 iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id,
787 false);
f6415f6b 788 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0);
0f618e6e 789 }
41069b46 790 return;
dac94da8
EG		 791 }
792
f6415f6b
EG		 793 bt_activity_grading = le32_to_cpu(data->notif->bt_activity_grading);
794 if (bt_activity_grading >= BT_HIGH_TRAFFIC)
795 smps_mode = IEEE80211_SMPS_STATIC;
796 else if (bt_activity_grading >= BT_LOW_TRAFFIC)
45bbb2ca 797 smps_mode = IEEE80211_SMPS_DYNAMIC;
4d66449a 798
582de30a 799 /* relax SMPS constraints for next association */
4d66449a
EG		 800 if (!vif->bss_conf.assoc)
801 smps_mode = IEEE80211_SMPS_AUTOMATIC;
802
4c86f938
EG		 803 if (IWL_COEX_IS_RRC_ON(mvm->last_bt_notif.ttc_rrc_status,
804 mvmvif->phy_ctxt->id))
805 smps_mode = IEEE80211_SMPS_AUTOMATIC;
806
f6415f6b 807 IWL_DEBUG_COEX(data->mvm,
430a3bba
EG		 808 "mac %d: bt_activity_grading %d smps_req %d\n",
809 mvmvif->id, bt_activity_grading, smps_mode);
f6415f6b 810
45bbb2ca
EG		 811 if (vif->type == NL80211_IFTYPE_STATION)
812 iwl_mvm_update_smps(mvm, vif, IWL_MVM_SMPS_REQ_BT_COEX,
813 smps_mode);
f6415f6b 814
0ee5bcdd
EG		 815 /* low latency is always primary */
816 if (iwl_mvm_vif_low_latency(mvmvif)) {
817 data->primary_ll = true;
818
819 data->secondary = data->primary;
820 data->primary = chanctx_conf;
821 }
822
dac94da8 823 if (vif->type == NL80211_IFTYPE_AP) {
5023d966 824 if (!mvmvif->ap_ibss_active)
dac94da8
EG		 825 return;
826
dac94da8
EG		 827 if (chanctx_conf == data->primary)
828 return;
829
0ee5bcdd
EG		 830 if (!data->primary_ll) {
831 /*
832 * downgrade the current primary no matter what its
833 * type is.
834 */
835 data->secondary = data->primary;
836 data->primary = chanctx_conf;
837 } else {
838 /* there is low latency vif - we will be secondary */
839 data->secondary = chanctx_conf;
840 }
9166b1ee
EG		 841 return;
842 }
843
0ee5bcdd
EG		 844 /*
845 * STA / P2P Client, try to be primary if first vif. If we are in low
846 * latency mode, we are already in primary and just don't do much
847 */
dac94da8
EG		 848 if (!data->primary || data->primary == chanctx_conf)
849 data->primary = chanctx_conf;
850 else if (!data->secondary)
851 /* if secondary is not NULL, it might be a GO */
852 data->secondary = chanctx_conf;
853
4d66449a
EG		 854 /*
855 * don't reduce the Tx power if one of these is true:
856 * we are in LOOSE
857 * single share antenna product
858 * BT is active
859 * we are associated
860 */
39149911 861 if (iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT ||
4d66449a 862 mvm->cfg->bt_shared_single_ant || !vif->bss_conf.assoc ||
430a3bba 863 le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF) {
0f618e6e 864 iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false);
f6fc5775 865 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, false, 0);
2b76ef13 866 return;
39149911 867 }
2b76ef13 868
911222b5
AO		 869 /* try to get the avg rssi from fw */
870 ave_rssi = mvmvif->bf_data.ave_beacon_signal;
2b76ef13
EG		 871
872 /* if the RSSI isn't valid, fake it is very low */
873 if (!ave_rssi)
874 ave_rssi = -100;
8286d9f5 875 if (ave_rssi > -IWL_MVM_BT_COEX_EN_RED_TXP_THRESH) {
2b76ef13
EG		 876 if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true))
877 IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n");
8286d9f5 878 } else if (ave_rssi < -IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH) {
2b76ef13
EG		 879 if (iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, false))
880 IWL_ERR(mvm, "Couldn't send BT_CONFIG cmd\n");
2b76ef13
EG		 881 }
882
883 /* Begin to monitor the RSSI: it may influence the reduced Tx power */
f6fc5775 884 iwl_mvm_bt_coex_enable_rssi_event(mvm, vif, true, ave_rssi);
7da052b8
EG		 885}
886
d37cac98 887static void iwl_mvm_bt_coex_notif_handle(struct iwl_mvm *mvm)
f421f9c3 888{
2b76ef13 889 struct iwl_bt_iterator_data data = {
7da052b8 890 .mvm = mvm,
d37cac98 891 .notif = &mvm->last_bt_notif,
7da052b8 892 };
430a3bba 893 struct iwl_bt_coex_ci_cmd cmd = {};
dac94da8 894 u8 ci_bw_idx;
f421f9c3 895
a39979a8
EG		 896 /* Ignore updates if we are in force mode */
897 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
898 return;
899
dac94da8 900 rcu_read_lock();
7da052b8
EG		 901 ieee80211_iterate_active_interfaces_atomic(
902 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
903 iwl_mvm_bt_notif_iterator, &data);
904
dac94da8
EG		 905 if (data.primary) {
906 struct ieee80211_chanctx_conf *chan = data.primary;
907 if (WARN_ON(!chan->def.chan)) {
908 rcu_read_unlock();
909 return;
910 }
911
912 if (chan->def.width < NL80211_CHAN_WIDTH_40) {
913 ci_bw_idx = 0;
dac94da8 914 } else {
dac94da8
EG		 915 if (chan->def.center_freq1 >
916 chan->def.chan->center_freq)
917 ci_bw_idx = 2;
918 else
919 ci_bw_idx = 1;
920 }
921
922 cmd.bt_primary_ci =
923 iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx];
430a3bba
EG		 924 cmd.primary_ch_phy_id =
925 cpu_to_le32(*((u16 *)data.primary->drv_priv));
dac94da8
EG		 926 }
927
928 if (data.secondary) {
929 struct ieee80211_chanctx_conf *chan = data.secondary;
930 if (WARN_ON(!data.secondary->def.chan)) {
931 rcu_read_unlock();
932 return;
933 }
934
935 if (chan->def.width < NL80211_CHAN_WIDTH_40) {
936 ci_bw_idx = 0;
dac94da8 937 } else {
dac94da8
EG		 938 if (chan->def.center_freq1 >
939 chan->def.chan->center_freq)
940 ci_bw_idx = 2;
941 else
942 ci_bw_idx = 1;
943 }
944
945 cmd.bt_secondary_ci =
946 iwl_ci_mask[chan->def.chan->hw_value][ci_bw_idx];
430a3bba
EG		 947 cmd.secondary_ch_phy_id =
948 cpu_to_le32(*((u16 *)data.secondary->drv_priv));
dac94da8
EG		 949 }
950
951 rcu_read_unlock();
952
953 /* Don't spam the fw with the same command over and over */
954 if (memcmp(&cmd, &mvm->last_bt_ci_cmd, sizeof(cmd))) {
a1022927 955 if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_CI, 0,
dac94da8 956 sizeof(cmd), &cmd))
3c6acb61 957 IWL_ERR(mvm, "Failed to send BT_CI cmd\n");
dac94da8
EG		 958 memcpy(&mvm->last_bt_ci_cmd, &cmd, sizeof(cmd));
959 }
960
1459f269 961 if (iwl_mvm_bt_udpate_sw_boost(mvm))
2b76ef13 962 IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n");
9166b1ee
EG		 963}
964
9166b1ee
EG		 965int iwl_mvm_rx_bt_coex_notif(struct iwl_mvm *mvm,
966 struct iwl_rx_cmd_buffer *rxb,
967 struct iwl_device_cmd *dev_cmd)
968{
969 struct iwl_rx_packet *pkt = rxb_addr(rxb);
df878f38 970 struct iwl_bt_coex_profile_notif *notif = (void *)pkt->data;
9166b1ee 971
0ea8d043
EG		 972 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
973 return iwl_mvm_rx_bt_coex_notif_old(mvm, rxb, dev_cmd);
974
9166b1ee 975 IWL_DEBUG_COEX(mvm, "BT Coex Notification received\n");
dac94da8
EG		 976 IWL_DEBUG_COEX(mvm, "\tBT ci compliance %d\n", notif->bt_ci_compliance);
977 IWL_DEBUG_COEX(mvm, "\tBT primary_ch_lut %d\n",
978 le32_to_cpu(notif->primary_ch_lut));
979 IWL_DEBUG_COEX(mvm, "\tBT secondary_ch_lut %d\n",
980 le32_to_cpu(notif->secondary_ch_lut));
981 IWL_DEBUG_COEX(mvm, "\tBT activity grading %d\n",
982 le32_to_cpu(notif->bt_activity_grading));
9166b1ee 983
d37cac98
EG		 984 /* remember this notification for future use: rssi fluctuations */
985 memcpy(&mvm->last_bt_notif, notif, sizeof(mvm->last_bt_notif));
986
987 iwl_mvm_bt_coex_notif_handle(mvm);
2b76ef13
EG		 988
989 /*
990 * This is an async handler for a notification, returning anything other
991 * than 0 doesn't make sense even if HCMD failed.
992 */
993 return 0;
994}
995
996static void iwl_mvm_bt_rssi_iterator(void *_data, u8 *mac,
997 struct ieee80211_vif *vif)
998{
999 struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv;
1000 struct iwl_bt_iterator_data *data = _data;
1001 struct iwl_mvm *mvm = data->mvm;
1002
1003 struct ieee80211_sta *sta;
1004 struct iwl_mvm_sta *mvmsta;
1005
f6fc5775
EG		 1006 struct ieee80211_chanctx_conf *chanctx_conf;
1007
1008 rcu_read_lock();
1009 chanctx_conf = rcu_dereference(vif->chanctx_conf);
1010 /* If channel context is invalid or not on 2.4GHz - don't count it */
1011 if (!chanctx_conf ||
1012 chanctx_conf->def.chan->band != IEEE80211_BAND_2GHZ) {
1013 rcu_read_unlock();
1014 return;
1015 }
1016 rcu_read_unlock();
1017
2b76ef13
EG		 1018 if (vif->type != NL80211_IFTYPE_STATION ||
1019 mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)
1020 return;
1021
1022 sta = rcu_dereference_protected(mvm->fw_id_to_mac_id[mvmvif->ap_sta_id],
1023 lockdep_is_held(&mvm->mutex));
56c07a9c
EG		 1024
1025 /* This can happen if the station has been removed right now */
1026 if (IS_ERR_OR_NULL(sta))
1027 return;
1028
5b577a90 1029 mvmsta = iwl_mvm_sta_from_mac80211(sta);
2b76ef13
EG		 1030}
1031
1032void iwl_mvm_bt_rssi_event(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1033 enum ieee80211_rssi_event rssi_event)
1034{
1035 struct iwl_mvm_vif *mvmvif = (void *)vif->drv_priv;
2b76ef13
EG		 1036 struct iwl_bt_iterator_data data = {
1037 .mvm = mvm,
2b76ef13
EG		 1038 };
1039 int ret;
1040
0ea8d043
EG		 1041 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) {
1042 iwl_mvm_bt_rssi_event_old(mvm, vif, rssi_event);
1043 return;
1044 }
1045
3dd1cd2d 1046 lockdep_assert_held(&mvm->mutex);
2b76ef13 1047
a39979a8
EG		 1048 /* Ignore updates if we are in force mode */
1049 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
1050 return;
1051
1e929199
EG		 1052 /*
1053 * Rssi update while not associated - can happen since the statistics
1054 * are handled asynchronously
1055 */
1056 if (mvmvif->ap_sta_id == IWL_MVM_STATION_COUNT)
3dd1cd2d 1057 return;
2b76ef13 1058
4515f30f 1059 /* No BT - reports should be disabled */
430a3bba 1060 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF)
3dd1cd2d 1061 return;
2b76ef13
EG		 1062
1063 IWL_DEBUG_COEX(mvm, "RSSI for %pM is now %s\n", vif->bss_conf.bssid,
1064 rssi_event == RSSI_EVENT_HIGH ? "HIGH" : "LOW");
1065
1066 /*
1067 * Check if rssi is good enough for reduced Tx power, but not in loose
1068 * scheme.
1069 */
39149911 1070 if (rssi_event == RSSI_EVENT_LOW || mvm->cfg->bt_shared_single_ant ||
4515f30f 1071 iwl_get_coex_type(mvm, vif) == BT_COEX_LOOSE_LUT)
2b76ef13
EG		 1072 ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id,
1073 false);
f421f9c3 1074 else
2b76ef13 1075 ret = iwl_mvm_bt_coex_reduced_txp(mvm, mvmvif->ap_sta_id, true);
f421f9c3 1076
2b76ef13
EG		 1077 if (ret)
1078 IWL_ERR(mvm, "couldn't send BT_CONFIG HCMD upon RSSI event\n");
f421f9c3 1079
2b76ef13
EG		 1080 ieee80211_iterate_active_interfaces_atomic(
1081 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1082 iwl_mvm_bt_rssi_iterator, &data);
f421f9c3 1083
1459f269 1084 if (iwl_mvm_bt_udpate_sw_boost(mvm))
2b76ef13 1085 IWL_ERR(mvm, "Failed to update the ctrl_kill_msk\n");
f421f9c3 1086}
9166b1ee 1087
9145d151
EG		 1088#define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000)
1089#define LINK_QUAL_AGG_TIME_LIMIT_BT_ACT (1200)
1090
5b7ff615
EG		 1091u16 iwl_mvm_coex_agg_time_limit(struct iwl_mvm *mvm,
1092 struct ieee80211_sta *sta)
9145d151 1093{
5b577a90 1094 struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
4c86f938
EG		 1095 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif);
1096 struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt;
9145d151
EG		 1097 enum iwl_bt_coex_lut_type lut_type;
1098
0ea8d043
EG		 1099 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1100 return iwl_mvm_coex_agg_time_limit_old(mvm, sta);
1101
4c86f938
EG		 1102 if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id))
1103 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
1104
9145d151 1105 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
c2119351 1106 BT_HIGH_TRAFFIC)
9145d151 1107 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
35fbf5d0 1108
9145d151
EG		 1109 lut_type = iwl_get_coex_type(mvm, mvmsta->vif);
1110
7fa4fa0c 1111 if (lut_type == BT_COEX_LOOSE_LUT || lut_type == BT_COEX_INVALID_LUT)
9145d151
EG		 1112 return LINK_QUAL_AGG_TIME_LIMIT_DEF;
1113
1114 /* tight coex, high bt traffic, reduce AGG time limit */
1115 return LINK_QUAL_AGG_TIME_LIMIT_BT_ACT;
1116}
1117
ffa6c707
EG		 1118bool iwl_mvm_bt_coex_is_mimo_allowed(struct iwl_mvm *mvm,
1119 struct ieee80211_sta *sta)
1120{
5b577a90 1121 struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
4c86f938
EG		 1122 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(mvmsta->vif);
1123 struct iwl_mvm_phy_ctxt *phy_ctxt = mvmvif->phy_ctxt;
7fa4fa0c 1124 enum iwl_bt_coex_lut_type lut_type;
ffa6c707 1125
0ea8d043 1126 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
5fc7d86c 1127 return iwl_mvm_bt_coex_is_mimo_allowed_old(mvm, sta);
0ea8d043 1128
4c86f938 1129 if (IWL_COEX_IS_TTC_ON(mvm->last_bt_notif.ttc_rrc_status, phy_ctxt->id))
35fbf5d0
EG		 1130 return true;
1131
ffa6c707
EG		 1132 if (le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) <
1133 BT_HIGH_TRAFFIC)
1134 return true;
1135
1136 /*
7fa4fa0c
EG		 1137 * In Tight / TxTxDis, BT can't Rx while we Tx, so use both antennas
1138 * since BT is already killed.
1139 * In Loose, BT can Rx while we Tx, so forbid MIMO to let BT Rx while
1140 * we Tx.
1141 * When we are in 5GHz, we'll get BT_COEX_INVALID_LUT allowing MIMO.
ffa6c707 1142 */
7fa4fa0c
EG		 1143 lut_type = iwl_get_coex_type(mvm, mvmsta->vif);
1144 return lut_type != BT_COEX_LOOSE_LUT;
ffa6c707
EG		 1145}
1146
34c8b24f
EG		 1147bool iwl_mvm_bt_coex_is_shared_ant_avail(struct iwl_mvm *mvm)
1148{
bbab7582
EG		 1149 /* there is no other antenna, shared antenna is always available */
1150 if (mvm->cfg->bt_shared_single_ant)
1151 return true;
1152
0ea8d043
EG		 1153 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1154 return iwl_mvm_bt_coex_is_shared_ant_avail_old(mvm);
1155
34c8b24f
EG		 1156 return le32_to_cpu(mvm->last_bt_notif.bt_activity_grading) == BT_OFF;
1157}
1158
2fd647f8
EP		 1159bool iwl_mvm_bt_coex_is_tpc_allowed(struct iwl_mvm *mvm,
1160 enum ieee80211_band band)
1161{
1162 u32 bt_activity = le32_to_cpu(mvm->last_bt_notif.bt_activity_grading);
1163
0ea8d043
EG		 1164 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1165 return iwl_mvm_bt_coex_is_tpc_allowed_old(mvm, band);
1166
2fd647f8
EP		 1167 if (band != IEEE80211_BAND_2GHZ)
1168 return false;
1169
1170 return bt_activity >= BT_LOW_TRAFFIC;
1171}
1172
ee7bea58 1173u8 iwl_mvm_bt_coex_tx_prio(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr,
b797e3fb 1174 struct ieee80211_tx_info *info, u8 ac)
ee7bea58
EG		 1175{
1176 __le16 fc = hdr->frame_control;
1177
b797e3fb
EG		 1178 if (info->band != IEEE80211_BAND_2GHZ)
1179 return 0;
1180
cdb00563
EG		 1181 if (unlikely(mvm->bt_tx_prio))
1182 return mvm->bt_tx_prio - 1;
1183
ee7bea58 1184 /* High prio packet (wrt. BT coex) if it is EAPOL, MCAST or MGMT */
b797e3fb 1185 if (info->control.flags & IEEE80211_TX_CTRL_PORT_CTRL_PROTO ||
ee7bea58 1186 is_multicast_ether_addr(hdr->addr1) ||
b797e3fb
EG		 1187 ieee80211_is_ctl(fc) || ieee80211_is_mgmt(fc) ||
1188 ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc))
1189 return 3;
1190
1191 switch (ac) {
1192 case IEEE80211_AC_BE:
1193 return 1;
1194 case IEEE80211_AC_VO:
1195 return 3;
1196 case IEEE80211_AC_VI:
ee7bea58 1197 return 2;
b797e3fb
EG		 1198 default:
1199 break;
1200 }
ee7bea58
EG		 1201
1202 return 0;
1203}
1204
8e484f0b 1205void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm)
9166b1ee 1206{
0ea8d043
EG		 1207 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT)) {
1208 iwl_mvm_bt_coex_vif_change_old(mvm);
1209 return;
1210 }
1211
d37cac98 1212 iwl_mvm_bt_coex_notif_handle(mvm);
9166b1ee 1213}
b9fae2d5
EG		 1214
1215int iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,
1216 struct iwl_rx_cmd_buffer *rxb,
1217 struct iwl_device_cmd *dev_cmd)
1218{
1219 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1220 u32 ant_isolation = le32_to_cpup((void *)pkt->data);
704602a1 1221 struct iwl_bt_coex_corun_lut_update_cmd cmd = {};
b9fae2d5
EG		 1222 u8 __maybe_unused lower_bound, upper_bound;
1223 u8 lut;
1224
0ea8d043
EG		 1225 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_BT_COEX_SPLIT))
1226 return iwl_mvm_rx_ant_coupling_notif_old(mvm, rxb, dev_cmd);
1227
b9fae2d5
EG		 1228 if (!IWL_MVM_BT_COEX_CORUNNING)
1229 return 0;
1230
1231 lockdep_assert_held(&mvm->mutex);
1232
a39979a8
EG		 1233 /* Ignore updates if we are in force mode */
1234 if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))
1235 return 0;
1236
b9fae2d5
EG		 1237 if (ant_isolation == mvm->last_ant_isol)
1238 return 0;
1239
1240 for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++)
1241 if (ant_isolation < antenna_coupling_ranges[lut + 1].range)
1242 break;
1243
1244 lower_bound = antenna_coupling_ranges[lut].range;
1245
1246 if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1)
1247 upper_bound = antenna_coupling_ranges[lut + 1].range;
1248 else
1249 upper_bound = antenna_coupling_ranges[lut].range;
1250
1251 IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n",
1252 ant_isolation, lower_bound, upper_bound, lut);
1253
1254 mvm->last_ant_isol = ant_isolation;
1255
1256 if (mvm->last_corun_lut == lut)
1257 return 0;
1258
1259 mvm->last_corun_lut = lut;
1260
b9fae2d5 1261 /* For the moment, use the same LUT for 20GHz and 40GHz */
704602a1
EG		 1262 memcpy(&cmd.corun_lut20, antenna_coupling_ranges[lut].lut20,
1263 sizeof(cmd.corun_lut20));
b9fae2d5 1264
704602a1
EG		 1265 memcpy(&cmd.corun_lut40, antenna_coupling_ranges[lut].lut20,
1266 sizeof(cmd.corun_lut40));
b9fae2d5 1267
704602a1
EG		 1268 return iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_CORUN_LUT, 0,
1269 sizeof(cmd), &cmd);
b9fae2d5 1270}
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