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iwlwifi: mvm: support beacon statistics for BSS client
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8ca151b5
JB
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5
JB
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
24 *
25 * The full GNU General Public License is included in this distribution
410dc5aa 26 * in the file called COPYING.
8ca151b5
JB
27 *
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
51368bf7 34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 35 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5
JB
36 * All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 *
42 * * Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * * Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in
46 * the documentation and/or other materials provided with the
47 * distribution.
48 * * Neither the name Intel Corporation nor the names of its
49 * contributors may be used to endorse or promote products derived
50 * from this software without specific prior written permission.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
53 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
54 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
55 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
56 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
57 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
58 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
62 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 *****************************************************************************/
65#include <net/mac80211.h>
66
67#include "iwl-trans.h"
68#include "iwl-op-mode.h"
69#include "iwl-fw.h"
70#include "iwl-debug.h"
71#include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
72#include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
8c23f95c 73#include "iwl-prph.h"
8ca151b5
JB
74#include "iwl-eeprom-parse.h"
75
76#include "mvm.h"
77#include "iwl-phy-db.h"
78
79#define MVM_UCODE_ALIVE_TIMEOUT HZ
80#define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
81
82#define UCODE_VALID_OK cpu_to_le32(0x1)
83
8ca151b5
JB
84struct iwl_mvm_alive_data {
85 bool valid;
86 u32 scd_base_addr;
87};
88
89static inline const struct fw_img *
90iwl_get_ucode_image(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type)
91{
92 if (ucode_type >= IWL_UCODE_TYPE_MAX)
93 return NULL;
94
95 return &mvm->fw->img[ucode_type];
96}
97
98static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
99{
100 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
101 .valid = cpu_to_le32(valid_tx_ant),
102 };
103
33223542 104 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
a1022927 105 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
8ca151b5
JB
106 sizeof(tx_ant_cmd), &tx_ant_cmd);
107}
108
109static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
110 struct iwl_rx_packet *pkt, void *data)
111{
112 struct iwl_mvm *mvm =
113 container_of(notif_wait, struct iwl_mvm, notif_wait);
114 struct iwl_mvm_alive_data *alive_data = data;
115 struct mvm_alive_resp *palive;
01a9ca51
EH
116 struct mvm_alive_resp_ver2 *palive2;
117
118 if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
119 palive = (void *)pkt->data;
120
121 mvm->support_umac_log = false;
122 mvm->error_event_table =
123 le32_to_cpu(palive->error_event_table_ptr);
124 mvm->log_event_table = le32_to_cpu(palive->log_event_table_ptr);
125 alive_data->scd_base_addr = le32_to_cpu(palive->scd_base_ptr);
126
127 alive_data->valid = le16_to_cpu(palive->status) ==
128 IWL_ALIVE_STATUS_OK;
129 IWL_DEBUG_FW(mvm,
130 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
131 le16_to_cpu(palive->status), palive->ver_type,
132 palive->ver_subtype, palive->flags);
133 } else {
134 palive2 = (void *)pkt->data;
135
01a9ca51
EH
136 mvm->error_event_table =
137 le32_to_cpu(palive2->error_event_table_ptr);
138 mvm->log_event_table =
139 le32_to_cpu(palive2->log_event_table_ptr);
140 alive_data->scd_base_addr = le32_to_cpu(palive2->scd_base_ptr);
141 mvm->umac_error_event_table =
142 le32_to_cpu(palive2->error_info_addr);
91479b64
EH
143 mvm->sf_space.addr = le32_to_cpu(palive2->st_fwrd_addr);
144 mvm->sf_space.size = le32_to_cpu(palive2->st_fwrd_size);
01a9ca51
EH
145
146 alive_data->valid = le16_to_cpu(palive2->status) ==
147 IWL_ALIVE_STATUS_OK;
ffa70264
EG
148 if (mvm->umac_error_event_table)
149 mvm->support_umac_log = true;
150
01a9ca51
EH
151 IWL_DEBUG_FW(mvm,
152 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n",
153 le16_to_cpu(palive2->status), palive2->ver_type,
154 palive2->ver_subtype, palive2->flags);
155
156 IWL_DEBUG_FW(mvm,
157 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
158 palive2->umac_major, palive2->umac_minor);
159 }
8ca151b5
JB
160
161 return true;
162}
163
164static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
165 struct iwl_rx_packet *pkt, void *data)
166{
167 struct iwl_phy_db *phy_db = data;
168
169 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
170 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
171 return true;
172 }
173
174 WARN_ON(iwl_phy_db_set_section(phy_db, pkt, GFP_ATOMIC));
175
176 return false;
177}
178
179static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
180 enum iwl_ucode_type ucode_type)
181{
182 struct iwl_notification_wait alive_wait;
183 struct iwl_mvm_alive_data alive_data;
184 const struct fw_img *fw;
185 int ret, i;
186 enum iwl_ucode_type old_type = mvm->cur_ucode;
187 static const u8 alive_cmd[] = { MVM_ALIVE };
91479b64 188 struct iwl_sf_region st_fwrd_space;
8ca151b5 189
61df750c
EH
190 if (ucode_type == IWL_UCODE_REGULAR &&
191 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_CUSTOM) &&
192 iwl_fw_dbg_conf_enabled(mvm->fw, FW_DBG_CUSTOM))
193 fw = iwl_get_ucode_image(mvm, IWL_UCODE_REGULAR_USNIFFER);
194 else
195 fw = iwl_get_ucode_image(mvm, ucode_type);
befe9b6f 196 if (WARN_ON(!fw))
8ca151b5 197 return -EINVAL;
befe9b6f
JB
198 mvm->cur_ucode = ucode_type;
199 mvm->ucode_loaded = false;
8ca151b5
JB
200
201 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
202 alive_cmd, ARRAY_SIZE(alive_cmd),
203 iwl_alive_fn, &alive_data);
204
205 ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
206 if (ret) {
207 mvm->cur_ucode = old_type;
208 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
209 return ret;
210 }
211
212 /*
213 * Some things may run in the background now, but we
214 * just wait for the ALIVE notification here.
215 */
216 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
217 MVM_UCODE_ALIVE_TIMEOUT);
218 if (ret) {
219 mvm->cur_ucode = old_type;
220 return ret;
221 }
222
223 if (!alive_data.valid) {
224 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
225 mvm->cur_ucode = old_type;
226 return -EIO;
227 }
228
91479b64
EH
229 /*
230 * update the sdio allocation according to the pointer we get in the
231 * alive notification.
232 */
233 st_fwrd_space.addr = mvm->sf_space.addr;
234 st_fwrd_space.size = mvm->sf_space.size;
235 ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
82e8aea0
ES
236 if (ret) {
237 IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
238 return ret;
239 }
91479b64 240
8ca151b5
JB
241 iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
242
243 /*
244 * Note: all the queues are enabled as part of the interface
245 * initialization, but in firmware restart scenarios they
246 * could be stopped, so wake them up. In firmware restart,
247 * mac80211 will have the queues stopped as well until the
248 * reconfiguration completes. During normal startup, they
249 * will be empty.
250 */
251
252 for (i = 0; i < IWL_MAX_HW_QUEUES; i++) {
19e737c9 253 if (i < mvm->first_agg_queue && i != IWL_MVM_CMD_QUEUE)
8ca151b5
JB
254 mvm->queue_to_mac80211[i] = i;
255 else
256 mvm->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;
8ca151b5
JB
257 }
258
df197c00
JB
259 for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
260 atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
8ca151b5
JB
261
262 mvm->ucode_loaded = true;
263
264 return 0;
265}
8ca151b5
JB
266
267static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
268{
269 struct iwl_phy_cfg_cmd phy_cfg_cmd;
270 enum iwl_ucode_type ucode_type = mvm->cur_ucode;
271
272 /* Set parameters */
a0544272 273 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
8ca151b5
JB
274 phy_cfg_cmd.calib_control.event_trigger =
275 mvm->fw->default_calib[ucode_type].event_trigger;
276 phy_cfg_cmd.calib_control.flow_trigger =
277 mvm->fw->default_calib[ucode_type].flow_trigger;
278
279 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
280 phy_cfg_cmd.phy_cfg);
281
a1022927 282 return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
8ca151b5
JB
283 sizeof(phy_cfg_cmd), &phy_cfg_cmd);
284}
285
8ca151b5
JB
286int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
287{
288 struct iwl_notification_wait calib_wait;
289 static const u8 init_complete[] = {
290 INIT_COMPLETE_NOTIF,
291 CALIB_RES_NOTIF_PHY_DB
292 };
293 int ret;
294
295 lockdep_assert_held(&mvm->mutex);
296
31b8b343 297 if (WARN_ON_ONCE(mvm->init_ucode_complete || mvm->calibrating))
8ca151b5
JB
298 return 0;
299
300 iwl_init_notification_wait(&mvm->notif_wait,
301 &calib_wait,
302 init_complete,
303 ARRAY_SIZE(init_complete),
304 iwl_wait_phy_db_entry,
305 mvm->phy_db);
306
307 /* Will also start the device */
308 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
309 if (ret) {
310 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
311 goto error;
312 }
313
ae397472 314 ret = iwl_send_bt_init_conf(mvm);
931d4160
EG
315 if (ret)
316 goto error;
317
81a67e32 318 /* Read the NVM only at driver load time, no need to do this twice */
8ca151b5
JB
319 if (read_nvm) {
320 /* Read nvm */
14b485f0 321 ret = iwl_nvm_init(mvm, true);
8ca151b5
JB
322 if (ret) {
323 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
324 goto error;
325 }
326 }
327
81a67e32 328 /* In case we read the NVM from external file, load it to the NIC */
e02a9d60 329 if (mvm->nvm_file_name)
81a67e32
EL
330 iwl_mvm_load_nvm_to_nic(mvm);
331
8ca151b5
JB
332 ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
333 WARN_ON(ret);
334
4f59334b
EH
335 /*
336 * abort after reading the nvm in case RF Kill is on, we will complete
337 * the init seq later when RF kill will switch to off
338 */
9ee718aa 339 if (iwl_mvm_is_radio_killed(mvm)) {
4f59334b
EH
340 IWL_DEBUG_RF_KILL(mvm,
341 "jump over all phy activities due to RF kill\n");
342 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
a4082843
AN
343 ret = 1;
344 goto out;
4f59334b
EH
345 }
346
31b8b343
EG
347 mvm->calibrating = true;
348
e07cbb53 349 /* Send TX valid antennas before triggering calibrations */
a0544272 350 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
e07cbb53
DS
351 if (ret)
352 goto error;
353
8ca151b5
JB
354 /*
355 * Send phy configurations command to init uCode
356 * to start the 16.0 uCode init image internal calibrations.
357 */
358 ret = iwl_send_phy_cfg_cmd(mvm);
359 if (ret) {
360 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
361 ret);
362 goto error;
363 }
364
365 /*
366 * Some things may run in the background now, but we
367 * just wait for the calibration complete notification.
368 */
369 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
370 MVM_UCODE_CALIB_TIMEOUT);
371 if (!ret)
ff116373 372 mvm->init_ucode_complete = true;
31b8b343
EG
373
374 if (ret && iwl_mvm_is_radio_killed(mvm)) {
375 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
376 ret = 1;
377 }
8ca151b5
JB
378 goto out;
379
380error:
381 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
382out:
31b8b343 383 mvm->calibrating = false;
a4082843 384 if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
8ca151b5
JB
385 /* we want to debug INIT and we have no NVM - fake */
386 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
387 sizeof(struct ieee80211_channel) +
388 sizeof(struct ieee80211_rate),
389 GFP_KERNEL);
390 if (!mvm->nvm_data)
391 return -ENOMEM;
8ca151b5
JB
392 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
393 mvm->nvm_data->bands[0].n_channels = 1;
394 mvm->nvm_data->bands[0].n_bitrates = 1;
395 mvm->nvm_data->bands[0].bitrates =
396 (void *)mvm->nvm_data->channels + 1;
397 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
398 }
399
400 return ret;
401}
402
04fd2c28
LK
403static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
404{
405 struct iwl_host_cmd cmd = {
406 .id = SHARED_MEM_CFG,
407 .flags = CMD_WANT_SKB,
408 .data = { NULL, },
409 .len = { 0, },
410 };
411 struct iwl_rx_packet *pkt;
412 struct iwl_shared_mem_cfg *mem_cfg;
413 u32 i;
414
415 lockdep_assert_held(&mvm->mutex);
416
417 if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
418 return;
419
420 pkt = cmd.resp_pkt;
421 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
422 IWL_ERR(mvm, "Bad return from SHARED_MEM_CFG (0x%08X)\n",
423 pkt->hdr.flags);
424 goto exit;
425 }
426
427 mem_cfg = (void *)pkt->data;
428
429 mvm->shared_mem_cfg.shared_mem_addr =
430 le32_to_cpu(mem_cfg->shared_mem_addr);
431 mvm->shared_mem_cfg.shared_mem_size =
432 le32_to_cpu(mem_cfg->shared_mem_size);
433 mvm->shared_mem_cfg.sample_buff_addr =
434 le32_to_cpu(mem_cfg->sample_buff_addr);
435 mvm->shared_mem_cfg.sample_buff_size =
436 le32_to_cpu(mem_cfg->sample_buff_size);
437 mvm->shared_mem_cfg.txfifo_addr = le32_to_cpu(mem_cfg->txfifo_addr);
438 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.txfifo_size); i++)
439 mvm->shared_mem_cfg.txfifo_size[i] =
440 le32_to_cpu(mem_cfg->txfifo_size[i]);
441 for (i = 0; i < ARRAY_SIZE(mvm->shared_mem_cfg.rxfifo_size); i++)
442 mvm->shared_mem_cfg.rxfifo_size[i] =
443 le32_to_cpu(mem_cfg->rxfifo_size[i]);
444 mvm->shared_mem_cfg.page_buff_addr =
445 le32_to_cpu(mem_cfg->page_buff_addr);
446 mvm->shared_mem_cfg.page_buff_size =
447 le32_to_cpu(mem_cfg->page_buff_size);
448 IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
449
450exit:
451 iwl_free_resp(&cmd);
452}
453
8c23f95c
EG
454void iwl_mvm_fw_dbg_collect(struct iwl_mvm *mvm)
455{
8c23f95c
EG
456 /* stop recording */
457 if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
458 iwl_set_bits_prph(mvm->trans, MON_BUFF_SAMPLE_CTL, 0x100);
459 } else {
460 iwl_write_prph(mvm->trans, DBGC_IN_SAMPLE, 0);
3c118cdb
EH
461 /* wait before we collect the data till the DBGC stop */
462 udelay(100);
8c23f95c
EG
463 }
464
e66e0b70 465 schedule_work(&mvm->fw_error_dump_wk);
8c23f95c
EG
466}
467
468int iwl_mvm_start_fw_dbg_conf(struct iwl_mvm *mvm, enum iwl_fw_dbg_conf conf_id)
6a951267
LK
469{
470 u8 *ptr;
471 int ret;
472 int i;
473
474 if (WARN_ONCE(conf_id >= ARRAY_SIZE(mvm->fw->dbg_conf_tlv),
475 "Invalid configuration %d\n", conf_id))
476 return -EINVAL;
477
478 if (!mvm->fw->dbg_conf_tlv[conf_id])
479 return -EINVAL;
480
481 if (mvm->fw_dbg_conf != FW_DBG_INVALID)
482 IWL_WARN(mvm, "FW already configured (%d) - re-configuring\n",
483 mvm->fw_dbg_conf);
484
485 /* Send all HCMDs for configuring the FW debug */
486 ptr = (void *)&mvm->fw->dbg_conf_tlv[conf_id]->hcmd;
487 for (i = 0; i < mvm->fw->dbg_conf_tlv[conf_id]->num_of_hcmds; i++) {
488 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
489
490 ret = iwl_mvm_send_cmd_pdu(mvm, cmd->id, 0,
491 le16_to_cpu(cmd->len), cmd->data);
492 if (ret)
493 return ret;
494
495 ptr += sizeof(*cmd);
496 ptr += le16_to_cpu(cmd->len);
497 }
498
499 mvm->fw_dbg_conf = conf_id;
500 return ret;
501}
502
84bfffa9
EG
503static int iwl_mvm_config_ltr_v1(struct iwl_mvm *mvm)
504{
505 struct iwl_ltr_config_cmd_v1 cmd_v1 = {
506 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
507 };
508
509 if (!mvm->trans->ltr_enabled)
510 return 0;
511
512 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
513 sizeof(cmd_v1), &cmd_v1);
514}
515
516static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
517{
518 struct iwl_ltr_config_cmd cmd = {
519 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
520 };
521
522 if (!mvm->trans->ltr_enabled)
523 return 0;
524
525 if (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_HDC_PHASE_0))
526 return iwl_mvm_config_ltr_v1(mvm);
527
528 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
529 sizeof(cmd), &cmd);
530}
531
8ca151b5
JB
532int iwl_mvm_up(struct iwl_mvm *mvm)
533{
534 int ret, i;
53a9d61e
IP
535 struct ieee80211_channel *chan;
536 struct cfg80211_chan_def chandef;
8ca151b5
JB
537
538 lockdep_assert_held(&mvm->mutex);
539
540 ret = iwl_trans_start_hw(mvm->trans);
541 if (ret)
542 return ret;
543
ff116373
EL
544 /*
545 * If we haven't completed the run of the init ucode during
546 * module loading, load init ucode now
547 * (for example, if we were in RFKILL)
548 */
549 if (!mvm->init_ucode_complete) {
8ca151b5
JB
550 ret = iwl_run_init_mvm_ucode(mvm, false);
551 if (ret && !iwlmvm_mod_params.init_dbg) {
552 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
4f59334b
EH
553 /* this can't happen */
554 if (WARN_ON(ret > 0))
555 ret = -ERFKILL;
8ca151b5
JB
556 goto error;
557 }
a4082843
AN
558 if (!iwlmvm_mod_params.init_dbg) {
559 /*
560 * should stop and start HW since that INIT
561 * image just loaded
562 */
563 iwl_trans_stop_device(mvm->trans);
564 ret = iwl_trans_start_hw(mvm->trans);
565 if (ret)
566 return ret;
567 }
8ca151b5
JB
568 }
569
570 if (iwlmvm_mod_params.init_dbg)
571 return 0;
572
573 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
574 if (ret) {
575 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
576 goto error;
577 }
578
c38740d0
EG
579 if (IWL_UCODE_API(mvm->fw->ucode_ver) >= 10)
580 iwl_mvm_get_shared_mem_conf(mvm);
04fd2c28 581
1f3b0ff8
LE
582 ret = iwl_mvm_sf_update(mvm, NULL, false);
583 if (ret)
584 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
585
6a951267
LK
586 mvm->fw_dbg_conf = FW_DBG_INVALID;
587 iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_CUSTOM);
588
a0544272 589 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
590 if (ret)
591 goto error;
592
931d4160
EG
593 ret = iwl_send_bt_init_conf(mvm);
594 if (ret)
595 goto error;
596
8ca151b5
JB
597 /* Send phy db control command and then phy db calibration*/
598 ret = iwl_send_phy_db_data(mvm->phy_db);
599 if (ret)
600 goto error;
601
602 ret = iwl_send_phy_cfg_cmd(mvm);
603 if (ret)
604 goto error;
605
606 /* init the fw <-> mac80211 STA mapping */
607 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
608 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
609
1d3c3f63
AN
610 mvm->tdls_cs.peer.sta_id = IWL_MVM_STATION_COUNT;
611
b2b7875b
JB
612 /* reset quota debouncing buffer - 0xff will yield invalid data */
613 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
614
8ca151b5
JB
615 /* Add auxiliary station for scanning */
616 ret = iwl_mvm_add_aux_sta(mvm);
617 if (ret)
618 goto error;
619
53a9d61e
IP
620 /* Add all the PHY contexts */
621 chan = &mvm->hw->wiphy->bands[IEEE80211_BAND_2GHZ]->channels[0];
622 cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
623 for (i = 0; i < NUM_PHY_CTX; i++) {
624 /*
625 * The channel used here isn't relevant as it's
626 * going to be overwritten in the other flows.
627 * For now use the first channel we have.
628 */
629 ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
630 &chandef, 1, 1);
631 if (ret)
632 goto error;
633 }
8ca151b5 634
0c0e2c71
IY
635 /* Initialize tx backoffs to the minimal possible */
636 iwl_mvm_tt_tx_backoff(mvm, 0);
637
84bfffa9 638 WARN_ON(iwl_mvm_config_ltr(mvm));
9180ac50 639
c1cb92fc 640 ret = iwl_mvm_power_update_device(mvm);
64b928c4
AB
641 if (ret)
642 goto error;
643
d2496221
DS
644 if (mvm->fw->ucode_capa.capa[0] & IWL_UCODE_TLV_CAPA_UMAC_SCAN) {
645 ret = iwl_mvm_config_scan(mvm);
646 if (ret)
647 goto error;
648 }
649
7498cf4c
EP
650 /* allow FW/transport low power modes if not during restart */
651 if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
652 iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
653
53a9d61e 654 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
8ca151b5
JB
655 return 0;
656 error:
657 iwl_trans_stop_device(mvm->trans);
658 return ret;
659}
660
661int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
662{
663 int ret, i;
664
665 lockdep_assert_held(&mvm->mutex);
666
667 ret = iwl_trans_start_hw(mvm->trans);
668 if (ret)
669 return ret;
670
671 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
672 if (ret) {
673 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
674 goto error;
675 }
676
a0544272 677 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
8ca151b5
JB
678 if (ret)
679 goto error;
680
681 /* Send phy db control command and then phy db calibration*/
682 ret = iwl_send_phy_db_data(mvm->phy_db);
683 if (ret)
684 goto error;
685
686 ret = iwl_send_phy_cfg_cmd(mvm);
687 if (ret)
688 goto error;
689
690 /* init the fw <-> mac80211 STA mapping */
691 for (i = 0; i < IWL_MVM_STATION_COUNT; i++)
692 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
693
694 /* Add auxiliary station for scanning */
695 ret = iwl_mvm_add_aux_sta(mvm);
696 if (ret)
697 goto error;
698
699 return 0;
700 error:
701 iwl_trans_stop_device(mvm->trans);
702 return ret;
703}
704
705int iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
706 struct iwl_rx_cmd_buffer *rxb,
707 struct iwl_device_cmd *cmd)
708{
709 struct iwl_rx_packet *pkt = rxb_addr(rxb);
710 struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
711 u32 flags = le32_to_cpu(card_state_notif->flags);
712
713 IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
714 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
715 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
716 (flags & CT_KILL_CARD_DISABLED) ?
717 "Reached" : "Not reached");
718
8ca151b5
JB
719 return 0;
720}
721
722int iwl_mvm_rx_radio_ver(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb,
723 struct iwl_device_cmd *cmd)
724{
725 struct iwl_rx_packet *pkt = rxb_addr(rxb);
726 struct iwl_radio_version_notif *radio_version = (void *)pkt->data;
727
728 /* TODO: what to do with that? */
729 IWL_DEBUG_INFO(mvm,
730 "Radio version: flavor: 0x%08x, step 0x%08x, dash 0x%08x\n",
731 le32_to_cpu(radio_version->radio_flavor),
732 le32_to_cpu(radio_version->radio_step),
733 le32_to_cpu(radio_version->radio_dash));
734 return 0;
735}
30269c12
CRI
736
737int iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
738 struct iwl_rx_cmd_buffer *rxb,
739 struct iwl_device_cmd *cmd)
740{
741 struct iwl_rx_packet *pkt = rxb_addr(rxb);
742 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
743
744 IWL_DEBUG_INFO(mvm,
745 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
746 le32_to_cpu(mfuart_notif->installed_ver),
747 le32_to_cpu(mfuart_notif->external_ver),
748 le32_to_cpu(mfuart_notif->status),
749 le32_to_cpu(mfuart_notif->duration));
750 return 0;
751}