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Commit | Line | Data |
---|---|---|
876c9d3a MT |
1 | /** |
2 | * This file contains the handling of command | |
3 | * responses as well as events generated by firmware. | |
4 | */ | |
5 | #include <linux/delay.h> | |
767e366f | 6 | #include <linux/sched.h> |
876c9d3a MT |
7 | #include <linux/if_arp.h> |
8 | #include <linux/netdevice.h> | |
2c5b9e51 | 9 | #include <asm/unaligned.h> |
876c9d3a MT |
10 | #include <net/iw_handler.h> |
11 | ||
12 | #include "host.h" | |
876c9d3a MT |
13 | #include "decl.h" |
14 | #include "defs.h" | |
15 | #include "dev.h" | |
697900ac | 16 | #include "assoc.h" |
876c9d3a MT |
17 | #include "wext.h" |
18 | ||
19 | /** | |
20 | * @brief This function handles disconnect event. it | |
21 | * reports disconnect to upper layer, clean tx/rx packets, | |
22 | * reset link state etc. | |
23 | * | |
69f9032d | 24 | * @param priv A pointer to struct lbs_private structure |
876c9d3a MT |
25 | * @return n/a |
26 | */ | |
69f9032d | 27 | void lbs_mac_event_disconnected(struct lbs_private *priv) |
876c9d3a | 28 | { |
876c9d3a MT |
29 | union iwreq_data wrqu; |
30 | ||
aa21c004 | 31 | if (priv->connect_status != LBS_CONNECTED) |
876c9d3a MT |
32 | return; |
33 | ||
91843463 | 34 | lbs_deb_enter(LBS_DEB_ASSOC); |
876c9d3a MT |
35 | |
36 | memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN); | |
37 | wrqu.ap_addr.sa_family = ARPHRD_ETHER; | |
38 | ||
39 | /* | |
40 | * Cisco AP sends EAP failure and de-auth in less than 0.5 ms. | |
41 | * It causes problem in the Supplicant | |
42 | */ | |
43 | ||
44 | msleep_interruptible(1000); | |
634b8f49 | 45 | wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL); |
876c9d3a | 46 | |
876c9d3a | 47 | /* report disconnect to upper layer */ |
634b8f49 HS |
48 | netif_stop_queue(priv->dev); |
49 | netif_carrier_off(priv->dev); | |
876c9d3a | 50 | |
a27b9f96 DW |
51 | /* Free Tx and Rx packets */ |
52 | kfree_skb(priv->currenttxskb); | |
53 | priv->currenttxskb = NULL; | |
54 | priv->tx_pending_len = 0; | |
55 | ||
876c9d3a | 56 | /* reset SNR/NF/RSSI values */ |
aa21c004 DW |
57 | memset(priv->SNR, 0x00, sizeof(priv->SNR)); |
58 | memset(priv->NF, 0x00, sizeof(priv->NF)); | |
59 | memset(priv->RSSI, 0x00, sizeof(priv->RSSI)); | |
60 | memset(priv->rawSNR, 0x00, sizeof(priv->rawSNR)); | |
61 | memset(priv->rawNF, 0x00, sizeof(priv->rawNF)); | |
62 | priv->nextSNRNF = 0; | |
63 | priv->numSNRNF = 0; | |
64 | priv->connect_status = LBS_DISCONNECTED; | |
876c9d3a | 65 | |
e76850d6 DW |
66 | /* Clear out associated SSID and BSSID since connection is |
67 | * no longer valid. | |
68 | */ | |
aa21c004 DW |
69 | memset(&priv->curbssparams.bssid, 0, ETH_ALEN); |
70 | memset(&priv->curbssparams.ssid, 0, IW_ESSID_MAX_SIZE); | |
71 | priv->curbssparams.ssid_len = 0; | |
876c9d3a | 72 | |
aa21c004 | 73 | if (priv->psstate != PS_STATE_FULL_POWER) { |
876c9d3a | 74 | /* make firmware to exit PS mode */ |
a6c8700f | 75 | lbs_deb_cmd("disconnected, so exit PS mode\n"); |
10078321 | 76 | lbs_ps_wakeup(priv, 0); |
876c9d3a | 77 | } |
52507c20 | 78 | lbs_deb_leave(LBS_DEB_ASSOC); |
876c9d3a MT |
79 | } |
80 | ||
81 | /** | |
82 | * @brief This function handles MIC failure event. | |
83 | * | |
69f9032d | 84 | * @param priv A pointer to struct lbs_private structure |
876c9d3a MT |
85 | * @para event the event id |
86 | * @return n/a | |
87 | */ | |
69f9032d | 88 | static void handle_mic_failureevent(struct lbs_private *priv, u32 event) |
876c9d3a MT |
89 | { |
90 | char buf[50]; | |
91 | ||
a6c8700f | 92 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
93 | memset(buf, 0, sizeof(buf)); |
94 | ||
95 | sprintf(buf, "%s", "MLME-MICHAELMICFAILURE.indication "); | |
96 | ||
97 | if (event == MACREG_INT_CODE_MIC_ERR_UNICAST) { | |
98 | strcat(buf, "unicast "); | |
99 | } else { | |
100 | strcat(buf, "multicast "); | |
101 | } | |
102 | ||
10078321 | 103 | lbs_send_iwevcustom_event(priv, buf); |
a6c8700f | 104 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
105 | } |
106 | ||
69f9032d | 107 | static int lbs_ret_reg_access(struct lbs_private *priv, |
876c9d3a MT |
108 | u16 type, struct cmd_ds_command *resp) |
109 | { | |
9012b28a | 110 | int ret = 0; |
876c9d3a | 111 | |
9012b28a | 112 | lbs_deb_enter(LBS_DEB_CMD); |
876c9d3a MT |
113 | |
114 | switch (type) { | |
6b63cd0f | 115 | case CMD_RET(CMD_MAC_REG_ACCESS): |
876c9d3a | 116 | { |
981f187b | 117 | struct cmd_ds_mac_reg_access *reg = &resp->params.macreg; |
876c9d3a | 118 | |
aa21c004 DW |
119 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
120 | priv->offsetvalue.value = le32_to_cpu(reg->value); | |
876c9d3a MT |
121 | break; |
122 | } | |
123 | ||
6b63cd0f | 124 | case CMD_RET(CMD_BBP_REG_ACCESS): |
876c9d3a | 125 | { |
981f187b | 126 | struct cmd_ds_bbp_reg_access *reg = &resp->params.bbpreg; |
876c9d3a | 127 | |
aa21c004 DW |
128 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
129 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
130 | break; |
131 | } | |
132 | ||
6b63cd0f | 133 | case CMD_RET(CMD_RF_REG_ACCESS): |
876c9d3a | 134 | { |
981f187b | 135 | struct cmd_ds_rf_reg_access *reg = &resp->params.rfreg; |
876c9d3a | 136 | |
aa21c004 DW |
137 | priv->offsetvalue.offset = (u32)le16_to_cpu(reg->offset); |
138 | priv->offsetvalue.value = reg->value; | |
876c9d3a MT |
139 | break; |
140 | } | |
141 | ||
142 | default: | |
9012b28a | 143 | ret = -1; |
876c9d3a MT |
144 | } |
145 | ||
8b17d723 | 146 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
9012b28a | 147 | return ret; |
876c9d3a MT |
148 | } |
149 | ||
69f9032d | 150 | static int lbs_ret_802_11_rssi(struct lbs_private *priv, |
876c9d3a MT |
151 | struct cmd_ds_command *resp) |
152 | { | |
153 | struct cmd_ds_802_11_rssi_rsp *rssirsp = &resp->params.rssirsp; | |
876c9d3a | 154 | |
a6c8700f HS |
155 | lbs_deb_enter(LBS_DEB_CMD); |
156 | ||
876c9d3a | 157 | /* store the non average value */ |
2c5b9e51 CC |
158 | priv->SNR[TYPE_BEACON][TYPE_NOAVG] = get_unaligned_le16(&rssirsp->SNR); |
159 | priv->NF[TYPE_BEACON][TYPE_NOAVG] = get_unaligned_le16(&rssirsp->noisefloor); | |
876c9d3a | 160 | |
2c5b9e51 CC |
161 | priv->SNR[TYPE_BEACON][TYPE_AVG] = get_unaligned_le16(&rssirsp->avgSNR); |
162 | priv->NF[TYPE_BEACON][TYPE_AVG] = get_unaligned_le16(&rssirsp->avgnoisefloor); | |
876c9d3a | 163 | |
aa21c004 DW |
164 | priv->RSSI[TYPE_BEACON][TYPE_NOAVG] = |
165 | CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_NOAVG], | |
166 | priv->NF[TYPE_BEACON][TYPE_NOAVG]); | |
876c9d3a | 167 | |
aa21c004 DW |
168 | priv->RSSI[TYPE_BEACON][TYPE_AVG] = |
169 | CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_AVG] / AVG_SCALE, | |
170 | priv->NF[TYPE_BEACON][TYPE_AVG] / AVG_SCALE); | |
876c9d3a | 171 | |
a6c8700f | 172 | lbs_deb_cmd("RSSI: beacon %d, avg %d\n", |
aa21c004 DW |
173 | priv->RSSI[TYPE_BEACON][TYPE_NOAVG], |
174 | priv->RSSI[TYPE_BEACON][TYPE_AVG]); | |
876c9d3a | 175 | |
a6c8700f | 176 | lbs_deb_leave(LBS_DEB_CMD); |
876c9d3a MT |
177 | return 0; |
178 | } | |
179 | ||
96287ac4 BD |
180 | static int lbs_ret_802_11_bcn_ctrl(struct lbs_private * priv, |
181 | struct cmd_ds_command *resp) | |
182 | { | |
183 | struct cmd_ds_802_11_beacon_control *bcn_ctrl = | |
184 | &resp->params.bcn_ctrl; | |
96287ac4 BD |
185 | |
186 | lbs_deb_enter(LBS_DEB_CMD); | |
187 | ||
188 | if (bcn_ctrl->action == CMD_ACT_GET) { | |
aa21c004 DW |
189 | priv->beacon_enable = (u8) le16_to_cpu(bcn_ctrl->beacon_enable); |
190 | priv->beacon_period = le16_to_cpu(bcn_ctrl->beacon_period); | |
96287ac4 BD |
191 | } |
192 | ||
193 | lbs_deb_enter(LBS_DEB_CMD); | |
194 | return 0; | |
195 | } | |
196 | ||
1309b55b | 197 | static inline int handle_cmd_response(struct lbs_private *priv, |
ddac4526 | 198 | struct cmd_header *cmd_response) |
876c9d3a | 199 | { |
ddac4526 | 200 | struct cmd_ds_command *resp = (struct cmd_ds_command *) cmd_response; |
876c9d3a MT |
201 | int ret = 0; |
202 | unsigned long flags; | |
1309b55b | 203 | uint16_t respcmd = le16_to_cpu(resp->command); |
876c9d3a | 204 | |
a6c8700f HS |
205 | lbs_deb_enter(LBS_DEB_HOST); |
206 | ||
876c9d3a | 207 | switch (respcmd) { |
6b63cd0f HS |
208 | case CMD_RET(CMD_MAC_REG_ACCESS): |
209 | case CMD_RET(CMD_BBP_REG_ACCESS): | |
210 | case CMD_RET(CMD_RF_REG_ACCESS): | |
10078321 | 211 | ret = lbs_ret_reg_access(priv, respcmd, resp); |
876c9d3a MT |
212 | break; |
213 | ||
6b63cd0f HS |
214 | case CMD_RET(CMD_802_11_SET_AFC): |
215 | case CMD_RET(CMD_802_11_GET_AFC): | |
aa21c004 | 216 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 217 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.afc, |
876c9d3a | 218 | sizeof(struct cmd_ds_802_11_afc)); |
aa21c004 | 219 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
220 | |
221 | break; | |
876c9d3a | 222 | |
6b63cd0f | 223 | case CMD_RET(CMD_802_11_BEACON_STOP): |
18c96c34 DW |
224 | break; |
225 | ||
6b63cd0f | 226 | case CMD_RET(CMD_802_11_RSSI): |
10078321 | 227 | ret = lbs_ret_802_11_rssi(priv, resp); |
876c9d3a MT |
228 | break; |
229 | ||
6b63cd0f | 230 | case CMD_RET(CMD_802_11D_DOMAIN_INFO): |
e98a88dd | 231 | ret = lbs_ret_802_11d_domain_info(resp); |
876c9d3a MT |
232 | break; |
233 | ||
6b63cd0f | 234 | case CMD_RET(CMD_802_11_TPC_CFG): |
aa21c004 | 235 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 236 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.tpccfg, |
876c9d3a | 237 | sizeof(struct cmd_ds_802_11_tpc_cfg)); |
aa21c004 | 238 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 239 | break; |
6b63cd0f | 240 | case CMD_RET(CMD_802_11_LED_GPIO_CTRL): |
aa21c004 | 241 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 242 | memmove((void *)priv->cur_cmd->callback_arg, &resp->params.ledgpio, |
876c9d3a | 243 | sizeof(struct cmd_ds_802_11_led_ctrl)); |
aa21c004 | 244 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 245 | break; |
3a188649 | 246 | |
6b63cd0f | 247 | case CMD_RET(CMD_GET_TSF): |
aa21c004 | 248 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 | 249 | memcpy((void *)priv->cur_cmd->callback_arg, |
876c9d3a | 250 | &resp->params.gettsf.tsfvalue, sizeof(u64)); |
aa21c004 | 251 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 252 | break; |
6b63cd0f | 253 | case CMD_RET(CMD_BT_ACCESS): |
aa21c004 | 254 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
255 | if (priv->cur_cmd->callback_arg) |
256 | memcpy((void *)priv->cur_cmd->callback_arg, | |
876c9d3a | 257 | &resp->params.bt.addr1, 2 * ETH_ALEN); |
aa21c004 | 258 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 259 | break; |
6b63cd0f | 260 | case CMD_RET(CMD_FWT_ACCESS): |
aa21c004 | 261 | spin_lock_irqsave(&priv->driver_lock, flags); |
75567670 DW |
262 | if (priv->cur_cmd->callback_arg) |
263 | memcpy((void *)priv->cur_cmd->callback_arg, &resp->params.fwt, | |
981f187b | 264 | sizeof(resp->params.fwt)); |
aa21c004 | 265 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a | 266 | break; |
96287ac4 BD |
267 | case CMD_RET(CMD_802_11_BEACON_CTRL): |
268 | ret = lbs_ret_802_11_bcn_ctrl(priv, resp); | |
269 | break; | |
270 | ||
876c9d3a | 271 | default: |
e37fc6e1 DW |
272 | lbs_pr_err("CMD_RESP: unknown cmd response 0x%04x\n", |
273 | le16_to_cpu(resp->command)); | |
876c9d3a MT |
274 | break; |
275 | } | |
a6c8700f | 276 | lbs_deb_leave(LBS_DEB_HOST); |
876c9d3a MT |
277 | return ret; |
278 | } | |
279 | ||
7919b89c | 280 | int lbs_process_command_response(struct lbs_private *priv, u8 *data, u32 len) |
876c9d3a | 281 | { |
e1258177 | 282 | uint16_t respcmd, curcmd; |
ddac4526 | 283 | struct cmd_header *resp; |
876c9d3a | 284 | int ret = 0; |
e1258177 DW |
285 | unsigned long flags; |
286 | uint16_t result; | |
876c9d3a | 287 | |
a6c8700f | 288 | lbs_deb_enter(LBS_DEB_HOST); |
876c9d3a | 289 | |
aa21c004 DW |
290 | mutex_lock(&priv->lock); |
291 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 292 | |
aa21c004 | 293 | if (!priv->cur_cmd) { |
a6c8700f | 294 | lbs_deb_host("CMD_RESP: cur_cmd is NULL\n"); |
876c9d3a | 295 | ret = -1; |
aa21c004 | 296 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
297 | goto done; |
298 | } | |
e1258177 | 299 | |
7919b89c | 300 | resp = (void *)data; |
8a96df80 | 301 | curcmd = le16_to_cpu(priv->cur_cmd->cmdbuf->command); |
876c9d3a | 302 | respcmd = le16_to_cpu(resp->command); |
876c9d3a MT |
303 | result = le16_to_cpu(resp->result); |
304 | ||
e5225b39 | 305 | lbs_deb_cmd("CMD_RESP: response 0x%04x, seq %d, size %d\n", |
7919b89c HS |
306 | respcmd, le16_to_cpu(resp->seqnum), len); |
307 | lbs_deb_hex(LBS_DEB_CMD, "CMD_RESP", (void *) resp, len); | |
876c9d3a | 308 | |
6305f498 | 309 | if (resp->seqnum != priv->cur_cmd->cmdbuf->seqnum) { |
e1258177 | 310 | lbs_pr_info("Received CMD_RESP with invalid sequence %d (expected %d)\n", |
6305f498 | 311 | le16_to_cpu(resp->seqnum), le16_to_cpu(priv->cur_cmd->cmdbuf->seqnum)); |
aa21c004 | 312 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
313 | ret = -1; |
314 | goto done; | |
315 | } | |
e1258177 | 316 | if (respcmd != CMD_RET(curcmd) && |
5f0547c2 | 317 | respcmd != CMD_RET_802_11_ASSOCIATE && curcmd != CMD_802_11_ASSOCIATE) { |
e1258177 DW |
318 | lbs_pr_info("Invalid CMD_RESP %x to command %x!\n", respcmd, curcmd); |
319 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
320 | ret = -1; | |
321 | goto done; | |
322 | } | |
323 | ||
8538823f DW |
324 | if (resp->result == cpu_to_le16(0x0004)) { |
325 | /* 0x0004 means -EAGAIN. Drop the response, let it time out | |
326 | and be resubmitted */ | |
327 | lbs_pr_info("Firmware returns DEFER to command %x. Will let it time out...\n", | |
328 | le16_to_cpu(resp->command)); | |
329 | spin_unlock_irqrestore(&priv->driver_lock, flags); | |
330 | ret = -1; | |
331 | goto done; | |
332 | } | |
333 | ||
e1258177 DW |
334 | /* Now we got response from FW, cancel the command timer */ |
335 | del_timer(&priv->command_timer); | |
2a345099 DW |
336 | priv->cmd_timed_out = 0; |
337 | if (priv->nr_retries) { | |
338 | lbs_pr_info("Received result %x to command %x after %d retries\n", | |
339 | result, curcmd, priv->nr_retries); | |
340 | priv->nr_retries = 0; | |
341 | } | |
876c9d3a MT |
342 | |
343 | /* Store the response code to cur_cmd_retcode. */ | |
aa21c004 | 344 | priv->cur_cmd_retcode = result; |
876c9d3a | 345 | |
6b63cd0f | 346 | if (respcmd == CMD_RET(CMD_802_11_PS_MODE)) { |
38bfab1a | 347 | struct cmd_ds_802_11_ps_mode *psmode = (void *) &resp[1]; |
981f187b | 348 | u16 action = le16_to_cpu(psmode->action); |
876c9d3a | 349 | |
a6c8700f HS |
350 | lbs_deb_host( |
351 | "CMD_RESP: PS_MODE cmd reply result 0x%x, action 0x%x\n", | |
981f187b | 352 | result, action); |
876c9d3a MT |
353 | |
354 | if (result) { | |
a6c8700f | 355 | lbs_deb_host("CMD_RESP: PS command failed with 0x%x\n", |
981f187b DW |
356 | result); |
357 | /* | |
358 | * We should not re-try enter-ps command in | |
359 | * ad-hoc mode. It takes place in | |
10078321 | 360 | * lbs_execute_next_command(). |
981f187b | 361 | */ |
aa21c004 | 362 | if (priv->mode == IW_MODE_ADHOC && |
0aef64d7 | 363 | action == CMD_SUBCMD_ENTER_PS) |
aa21c004 | 364 | priv->psmode = LBS802_11POWERMODECAM; |
0aef64d7 | 365 | } else if (action == CMD_SUBCMD_ENTER_PS) { |
aa21c004 DW |
366 | priv->needtowakeup = 0; |
367 | priv->psstate = PS_STATE_AWAKE; | |
876c9d3a | 368 | |
a6c8700f | 369 | lbs_deb_host("CMD_RESP: ENTER_PS command response\n"); |
aa21c004 | 370 | if (priv->connect_status != LBS_CONNECTED) { |
876c9d3a MT |
371 | /* |
372 | * When Deauth Event received before Enter_PS command | |
373 | * response, We need to wake up the firmware. | |
374 | */ | |
a6c8700f | 375 | lbs_deb_host( |
10078321 | 376 | "disconnected, invoking lbs_ps_wakeup\n"); |
876c9d3a | 377 | |
aa21c004 DW |
378 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
379 | mutex_unlock(&priv->lock); | |
10078321 | 380 | lbs_ps_wakeup(priv, 0); |
aa21c004 DW |
381 | mutex_lock(&priv->lock); |
382 | spin_lock_irqsave(&priv->driver_lock, flags); | |
876c9d3a | 383 | } |
0aef64d7 | 384 | } else if (action == CMD_SUBCMD_EXIT_PS) { |
aa21c004 DW |
385 | priv->needtowakeup = 0; |
386 | priv->psstate = PS_STATE_FULL_POWER; | |
a6c8700f | 387 | lbs_deb_host("CMD_RESP: EXIT_PS command response\n"); |
876c9d3a | 388 | } else { |
a6c8700f | 389 | lbs_deb_host("CMD_RESP: PS action 0x%X\n", action); |
876c9d3a MT |
390 | } |
391 | ||
183aeac1 | 392 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 393 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
394 | |
395 | ret = 0; | |
396 | goto done; | |
397 | } | |
398 | ||
876c9d3a MT |
399 | /* If the command is not successful, cleanup and return failure */ |
400 | if ((result != 0 || !(respcmd & 0x8000))) { | |
a6c8700f HS |
401 | lbs_deb_host("CMD_RESP: error 0x%04x in command reply 0x%04x\n", |
402 | result, respcmd); | |
876c9d3a MT |
403 | /* |
404 | * Handling errors here | |
405 | */ | |
406 | switch (respcmd) { | |
6b63cd0f HS |
407 | case CMD_RET(CMD_GET_HW_SPEC): |
408 | case CMD_RET(CMD_802_11_RESET): | |
a6c8700f | 409 | lbs_deb_host("CMD_RESP: reset failed\n"); |
876c9d3a MT |
410 | break; |
411 | ||
412 | } | |
183aeac1 | 413 | lbs_complete_command(priv, priv->cur_cmd, result); |
aa21c004 | 414 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
415 | |
416 | ret = -1; | |
417 | goto done; | |
418 | } | |
419 | ||
aa21c004 | 420 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
1723047d | 421 | |
7ad994de DW |
422 | if (priv->cur_cmd && priv->cur_cmd->callback) { |
423 | ret = priv->cur_cmd->callback(priv, priv->cur_cmd->callback_arg, | |
ddac4526 | 424 | resp); |
7ad994de | 425 | } else |
e98a88dd | 426 | ret = handle_cmd_response(priv, resp); |
1723047d | 427 | |
aa21c004 | 428 | spin_lock_irqsave(&priv->driver_lock, flags); |
1723047d | 429 | |
aa21c004 | 430 | if (priv->cur_cmd) { |
876c9d3a | 431 | /* Clean up and Put current command back to cmdfreeq */ |
183aeac1 | 432 | lbs_complete_command(priv, priv->cur_cmd, result); |
876c9d3a | 433 | } |
aa21c004 | 434 | spin_unlock_irqrestore(&priv->driver_lock, flags); |
876c9d3a MT |
435 | |
436 | done: | |
aa21c004 | 437 | mutex_unlock(&priv->lock); |
a6c8700f | 438 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); |
876c9d3a MT |
439 | return ret; |
440 | } | |
441 | ||
b47ef243 DW |
442 | static int lbs_send_confirmwake(struct lbs_private *priv) |
443 | { | |
f539f2ef | 444 | struct cmd_header cmd; |
b47ef243 DW |
445 | int ret = 0; |
446 | ||
447 | lbs_deb_enter(LBS_DEB_HOST); | |
448 | ||
f539f2ef HS |
449 | cmd.command = cpu_to_le16(CMD_802_11_WAKEUP_CONFIRM); |
450 | cmd.size = cpu_to_le16(sizeof(cmd)); | |
451 | cmd.seqnum = cpu_to_le16(++priv->seqnum); | |
452 | cmd.result = 0; | |
b47ef243 | 453 | |
f539f2ef HS |
454 | lbs_deb_hex(LBS_DEB_HOST, "wake confirm", (u8 *) &cmd, |
455 | sizeof(cmd)); | |
b47ef243 | 456 | |
f539f2ef | 457 | ret = priv->hw_host_to_card(priv, MVMS_CMD, (u8 *) &cmd, sizeof(cmd)); |
b47ef243 DW |
458 | if (ret) |
459 | lbs_pr_alert("SEND_WAKEC_CMD: Host to Card failed for Confirm Wake\n"); | |
460 | ||
461 | lbs_deb_leave_args(LBS_DEB_HOST, "ret %d", ret); | |
462 | return ret; | |
463 | } | |
464 | ||
7919b89c | 465 | int lbs_process_event(struct lbs_private *priv, u32 event) |
876c9d3a MT |
466 | { |
467 | int ret = 0; | |
876c9d3a | 468 | |
9556d212 HS |
469 | lbs_deb_enter(LBS_DEB_CMD); |
470 | ||
7919b89c | 471 | switch (event) { |
876c9d3a | 472 | case MACREG_INT_CODE_LINK_SENSED: |
d4ff0ef6 | 473 | lbs_deb_cmd("EVENT: link sensed\n"); |
876c9d3a MT |
474 | break; |
475 | ||
476 | case MACREG_INT_CODE_DEAUTHENTICATED: | |
a6c8700f | 477 | lbs_deb_cmd("EVENT: deauthenticated\n"); |
10078321 | 478 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
479 | break; |
480 | ||
481 | case MACREG_INT_CODE_DISASSOCIATED: | |
a6c8700f | 482 | lbs_deb_cmd("EVENT: disassociated\n"); |
10078321 | 483 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
484 | break; |
485 | ||
0b3c07ff | 486 | case MACREG_INT_CODE_LINK_LOST_NO_SCAN: |
a6c8700f | 487 | lbs_deb_cmd("EVENT: link lost\n"); |
10078321 | 488 | lbs_mac_event_disconnected(priv); |
876c9d3a MT |
489 | break; |
490 | ||
491 | case MACREG_INT_CODE_PS_SLEEP: | |
d4ff0ef6 | 492 | lbs_deb_cmd("EVENT: ps sleep\n"); |
876c9d3a MT |
493 | |
494 | /* handle unexpected PS SLEEP event */ | |
aa21c004 | 495 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 496 | lbs_deb_cmd( |
a6c8700f | 497 | "EVENT: in FULL POWER mode, ignoreing PS_SLEEP\n"); |
876c9d3a MT |
498 | break; |
499 | } | |
aa21c004 | 500 | priv->psstate = PS_STATE_PRE_SLEEP; |
876c9d3a | 501 | |
d4ff0ef6 | 502 | lbs_ps_confirm_sleep(priv); |
876c9d3a MT |
503 | |
504 | break; | |
505 | ||
b47ef243 | 506 | case MACREG_INT_CODE_HOST_AWAKE: |
d4ff0ef6 | 507 | lbs_deb_cmd("EVENT: host awake\n"); |
b47ef243 DW |
508 | lbs_send_confirmwake(priv); |
509 | break; | |
510 | ||
876c9d3a | 511 | case MACREG_INT_CODE_PS_AWAKE: |
d4ff0ef6 | 512 | lbs_deb_cmd("EVENT: ps awake\n"); |
876c9d3a | 513 | /* handle unexpected PS AWAKE event */ |
aa21c004 | 514 | if (priv->psstate == PS_STATE_FULL_POWER) { |
9012b28a | 515 | lbs_deb_cmd( |
876c9d3a MT |
516 | "EVENT: In FULL POWER mode - ignore PS AWAKE\n"); |
517 | break; | |
518 | } | |
519 | ||
aa21c004 | 520 | priv->psstate = PS_STATE_AWAKE; |
876c9d3a | 521 | |
aa21c004 | 522 | if (priv->needtowakeup) { |
876c9d3a MT |
523 | /* |
524 | * wait for the command processing to finish | |
525 | * before resuming sending | |
aa21c004 | 526 | * priv->needtowakeup will be set to FALSE |
10078321 | 527 | * in lbs_ps_wakeup() |
876c9d3a | 528 | */ |
a6c8700f | 529 | lbs_deb_cmd("waking up ...\n"); |
10078321 | 530 | lbs_ps_wakeup(priv, 0); |
876c9d3a MT |
531 | } |
532 | break; | |
533 | ||
534 | case MACREG_INT_CODE_MIC_ERR_UNICAST: | |
9012b28a | 535 | lbs_deb_cmd("EVENT: UNICAST MIC ERROR\n"); |
876c9d3a MT |
536 | handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_UNICAST); |
537 | break; | |
538 | ||
539 | case MACREG_INT_CODE_MIC_ERR_MULTICAST: | |
9012b28a | 540 | lbs_deb_cmd("EVENT: MULTICAST MIC ERROR\n"); |
876c9d3a MT |
541 | handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_MULTICAST); |
542 | break; | |
d4ff0ef6 | 543 | |
876c9d3a | 544 | case MACREG_INT_CODE_MIB_CHANGED: |
d4ff0ef6 HS |
545 | lbs_deb_cmd("EVENT: MIB CHANGED\n"); |
546 | break; | |
876c9d3a | 547 | case MACREG_INT_CODE_INIT_DONE: |
d4ff0ef6 | 548 | lbs_deb_cmd("EVENT: INIT DONE\n"); |
876c9d3a | 549 | break; |
876c9d3a | 550 | case MACREG_INT_CODE_ADHOC_BCN_LOST: |
a6c8700f | 551 | lbs_deb_cmd("EVENT: ADHOC beacon lost\n"); |
876c9d3a | 552 | break; |
876c9d3a | 553 | case MACREG_INT_CODE_RSSI_LOW: |
a6c8700f | 554 | lbs_pr_alert("EVENT: rssi low\n"); |
876c9d3a MT |
555 | break; |
556 | case MACREG_INT_CODE_SNR_LOW: | |
a6c8700f | 557 | lbs_pr_alert("EVENT: snr low\n"); |
876c9d3a MT |
558 | break; |
559 | case MACREG_INT_CODE_MAX_FAIL: | |
a6c8700f | 560 | lbs_pr_alert("EVENT: max fail\n"); |
876c9d3a MT |
561 | break; |
562 | case MACREG_INT_CODE_RSSI_HIGH: | |
a6c8700f | 563 | lbs_pr_alert("EVENT: rssi high\n"); |
876c9d3a MT |
564 | break; |
565 | case MACREG_INT_CODE_SNR_HIGH: | |
a6c8700f | 566 | lbs_pr_alert("EVENT: snr high\n"); |
876c9d3a MT |
567 | break; |
568 | ||
7d8d28b3 | 569 | case MACREG_INT_CODE_MESH_AUTO_STARTED: |
5612c014 DW |
570 | /* Ignore spurious autostart events if autostart is disabled */ |
571 | if (!priv->mesh_autostart_enabled) { | |
572 | lbs_pr_info("EVENT: MESH_AUTO_STARTED (ignoring)\n"); | |
573 | break; | |
574 | } | |
9cdc6d29 | 575 | lbs_pr_info("EVENT: MESH_AUTO_STARTED\n"); |
aa21c004 | 576 | priv->mesh_connect_status = LBS_CONNECTED; |
a27b9f96 | 577 | if (priv->mesh_open) { |
9cdc6d29 | 578 | netif_carrier_on(priv->mesh_dev); |
a27b9f96 DW |
579 | if (!priv->tx_pending_len) |
580 | netif_wake_queue(priv->mesh_dev); | |
7d8d28b3 | 581 | } |
aa21c004 | 582 | priv->mode = IW_MODE_ADHOC; |
b8bedefd | 583 | schedule_work(&priv->sync_channel); |
7d8d28b3 LCCR |
584 | break; |
585 | ||
876c9d3a | 586 | default: |
7919b89c | 587 | lbs_pr_alert("EVENT: unknown event id %d\n", event); |
876c9d3a MT |
588 | break; |
589 | } | |
590 | ||
9556d212 | 591 | lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); |
876c9d3a MT |
592 | return ret; |
593 | } |