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a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
a6b7a407 | 12 | #include <linux/interrupt.h> |
a66098da LB |
13 | #include <linux/module.h> |
14 | #include <linux/kernel.h> | |
3d76e82c | 15 | #include <linux/sched.h> |
a66098da LB |
16 | #include <linux/spinlock.h> |
17 | #include <linux/list.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/completion.h> | |
21 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
a66098da LB |
23 | #include <net/mac80211.h> |
24 | #include <linux/moduleparam.h> | |
25 | #include <linux/firmware.h> | |
26 | #include <linux/workqueue.h> | |
27 | ||
28 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
29 | #define MWL8K_NAME KBUILD_MODNAME | |
00e8e692 | 30 | #define MWL8K_VERSION "0.13" |
a66098da | 31 | |
0863ade8 | 32 | /* Module parameters */ |
eb939922 | 33 | static bool ap_mode_default; |
0863ade8 BC |
34 | module_param(ap_mode_default, bool, 0); |
35 | MODULE_PARM_DESC(ap_mode_default, | |
36 | "Set to 1 to make ap mode the default instead of sta mode"); | |
37 | ||
a66098da LB |
38 | /* Register definitions */ |
39 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
40 | #define MWL8K_MODE_STA 0x0000005a |
41 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 42 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
43 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
44 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
45 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
46 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
47 | ||
48 | /* Host->device communications */ | |
49 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
54 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
55 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
56 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
57 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
58 | |
59 | /* Device->host communications */ | |
60 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b | 65 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
3aefc37e | 66 | #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14) |
ce9e2e1b LB |
67 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) |
68 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
69 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
70 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
71 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
72 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
73 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
74 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
75 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da | 76 | |
566875db PN |
77 | /* HW micro second timer register |
78 | * located at offset 0xA600. This | |
79 | * will be used to timestamp tx | |
80 | * packets. | |
81 | */ | |
82 | ||
83 | #define MWL8K_HW_TIMER_REGISTER 0x0000a600 | |
4c924f42 YAP |
84 | #define BBU_RXRDY_CNT_REG 0x0000a860 |
85 | #define NOK_CCA_CNT_REG 0x0000a6a0 | |
86 | #define BBU_AVG_NOISE_VAL 0x67 | |
566875db | 87 | |
a66098da LB |
88 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ |
89 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
90 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
91 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
92 | MWL8K_A2H_INT_RADIO_ON | \ | |
93 | MWL8K_A2H_INT_RADIO_OFF | \ | |
94 | MWL8K_A2H_INT_MAC_EVENT | \ | |
95 | MWL8K_A2H_INT_OPC_DONE | \ | |
96 | MWL8K_A2H_INT_RX_READY | \ | |
3aefc37e NS |
97 | MWL8K_A2H_INT_TX_DONE | \ |
98 | MWL8K_A2H_INT_BA_WATCHDOG) | |
a66098da | 99 | |
a66098da | 100 | #define MWL8K_RX_QUEUES 1 |
e600707b | 101 | #define MWL8K_TX_WMM_QUEUES 4 |
8a7a578c | 102 | #define MWL8K_MAX_AMPDU_QUEUES 8 |
e600707b BC |
103 | #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES) |
104 | #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues) | |
a66098da | 105 | |
7fb978b7 YAP |
106 | /* txpriorities are mapped with hw queues. |
107 | * Each hw queue has a txpriority. | |
108 | */ | |
109 | #define TOTAL_HW_TX_QUEUES 8 | |
110 | ||
111 | /* Each HW queue can have one AMPDU stream. | |
112 | * But, because one of the hw queue is reserved, | |
113 | * maximum AMPDU queues that can be created are | |
114 | * one short of total tx queues. | |
115 | */ | |
116 | #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1) | |
117 | ||
031eb464 YAP |
118 | #define MWL8K_NUM_CHANS 18 |
119 | ||
54bc3a0d LB |
120 | struct rxd_ops { |
121 | int rxd_size; | |
122 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
123 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 124 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 125 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
126 | }; |
127 | ||
45a390dd | 128 | struct mwl8k_device_info { |
a74b295e LB |
129 | char *part_name; |
130 | char *helper_image; | |
0863ade8 BC |
131 | char *fw_image_sta; |
132 | char *fw_image_ap; | |
89a91f4f | 133 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 134 | u32 fw_api_ap; |
45a390dd LB |
135 | }; |
136 | ||
a66098da | 137 | struct mwl8k_rx_queue { |
45eb400d | 138 | int rxd_count; |
a66098da LB |
139 | |
140 | /* hw receives here */ | |
45eb400d | 141 | int head; |
a66098da LB |
142 | |
143 | /* refill descs here */ | |
45eb400d | 144 | int tail; |
a66098da | 145 | |
54bc3a0d | 146 | void *rxd; |
45eb400d | 147 | dma_addr_t rxd_dma; |
788838eb LB |
148 | struct { |
149 | struct sk_buff *skb; | |
53b1b3e1 | 150 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 151 | } *buf; |
a66098da LB |
152 | }; |
153 | ||
a66098da LB |
154 | struct mwl8k_tx_queue { |
155 | /* hw transmits here */ | |
45eb400d | 156 | int head; |
a66098da LB |
157 | |
158 | /* sw appends here */ | |
45eb400d | 159 | int tail; |
a66098da | 160 | |
8ccbc3b8 | 161 | unsigned int len; |
45eb400d LB |
162 | struct mwl8k_tx_desc *txd; |
163 | dma_addr_t txd_dma; | |
164 | struct sk_buff **skb; | |
a66098da LB |
165 | }; |
166 | ||
ac109fd0 BC |
167 | enum { |
168 | AMPDU_NO_STREAM, | |
169 | AMPDU_STREAM_NEW, | |
170 | AMPDU_STREAM_IN_PROGRESS, | |
171 | AMPDU_STREAM_ACTIVE, | |
172 | }; | |
173 | ||
5faa1aff NS |
174 | struct mwl8k_ampdu_stream { |
175 | struct ieee80211_sta *sta; | |
176 | u8 tid; | |
177 | u8 state; | |
178 | u8 idx; | |
5faa1aff NS |
179 | }; |
180 | ||
a66098da | 181 | struct mwl8k_priv { |
a66098da | 182 | struct ieee80211_hw *hw; |
a66098da | 183 | struct pci_dev *pdev; |
bf3ca7f7 | 184 | int irq; |
a66098da | 185 | |
45a390dd LB |
186 | struct mwl8k_device_info *device_info; |
187 | ||
be695fc4 LB |
188 | void __iomem *sram; |
189 | void __iomem *regs; | |
190 | ||
191 | /* firmware */ | |
d1f9e41d BC |
192 | const struct firmware *fw_helper; |
193 | const struct firmware *fw_ucode; | |
a66098da | 194 | |
be695fc4 LB |
195 | /* hardware/firmware parameters */ |
196 | bool ap_fw; | |
197 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
198 | struct ieee80211_supported_band band_24; |
199 | struct ieee80211_channel channels_24[14]; | |
3f524559 | 200 | struct ieee80211_rate rates_24[13]; |
4eae9edd LB |
201 | struct ieee80211_supported_band band_50; |
202 | struct ieee80211_channel channels_50[4]; | |
3f524559 | 203 | struct ieee80211_rate rates_50[8]; |
ee0ddf18 LB |
204 | u32 ap_macids_supported; |
205 | u32 sta_macids_supported; | |
be695fc4 | 206 | |
8a7a578c BC |
207 | /* Ampdu stream information */ |
208 | u8 num_ampdu_queues; | |
ac109fd0 BC |
209 | spinlock_t stream_lock; |
210 | struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
3aefc37e | 211 | struct work_struct watchdog_ba_handle; |
8a7a578c | 212 | |
618952a7 LB |
213 | /* firmware access */ |
214 | struct mutex fw_mutex; | |
215 | struct task_struct *fw_mutex_owner; | |
6b6accc3 | 216 | struct task_struct *hw_restart_owner; |
618952a7 | 217 | int fw_mutex_depth; |
618952a7 LB |
218 | struct completion *hostcmd_wait; |
219 | ||
c27a54d3 YAP |
220 | atomic_t watchdog_event_pending; |
221 | ||
a66098da LB |
222 | /* lock held over TX and TX reap */ |
223 | spinlock_t tx_lock; | |
a66098da | 224 | |
88de754a LB |
225 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
226 | struct completion *tx_wait; | |
227 | ||
f5bb87cf | 228 | /* List of interfaces. */ |
ee0ddf18 | 229 | u32 macids_used; |
f5bb87cf | 230 | struct list_head vif_list; |
a66098da | 231 | |
a66098da LB |
232 | /* power management status cookie from firmware */ |
233 | u32 *cookie; | |
234 | dma_addr_t cookie_dma; | |
235 | ||
236 | u16 num_mcaddrs; | |
a66098da | 237 | u8 hw_rev; |
2aa7b01f | 238 | u32 fw_rev; |
c3f251a3 | 239 | u32 caps; |
a66098da LB |
240 | |
241 | /* | |
242 | * Running count of TX packets in flight, to avoid | |
243 | * iterating over the transmit rings each time. | |
244 | */ | |
245 | int pending_tx_pkts; | |
246 | ||
247 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
e600707b BC |
248 | struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES]; |
249 | u32 txq_offset[MWL8K_MAX_TX_QUEUES]; | |
a66098da | 250 | |
c46563b7 | 251 | bool radio_on; |
68ce3884 | 252 | bool radio_short_preamble; |
a43c49a8 | 253 | bool sniffer_enabled; |
0439b1f5 | 254 | bool wmm_enabled; |
a66098da | 255 | |
a66098da LB |
256 | /* XXX need to convert this to handle multiple interfaces */ |
257 | bool capture_beacon; | |
d89173f2 | 258 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
259 | struct sk_buff *beacon_skb; |
260 | ||
261 | /* | |
262 | * This FJ worker has to be global as it is scheduled from the | |
263 | * RX handler. At this point we don't know which interface it | |
264 | * belongs to until the list of bssids waiting to complete join | |
265 | * is checked. | |
266 | */ | |
267 | struct work_struct finalize_join_worker; | |
268 | ||
1e9f9de3 LB |
269 | /* Tasklet to perform TX reclaim. */ |
270 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
271 | |
272 | /* Tasklet to perform RX. */ | |
273 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
274 | |
275 | /* Most recently reported noise in dBm */ | |
276 | s8 noise; | |
0863ade8 BC |
277 | |
278 | /* | |
279 | * preserve the queue configurations so they can be restored if/when | |
280 | * the firmware image is swapped. | |
281 | */ | |
e600707b | 282 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES]; |
99020471 | 283 | |
6b6accc3 YAP |
284 | /* To perform the task of reloading the firmware */ |
285 | struct work_struct fw_reload; | |
286 | bool hw_restart_in_progress; | |
287 | ||
99020471 BC |
288 | /* async firmware loading state */ |
289 | unsigned fw_state; | |
290 | char *fw_pref; | |
291 | char *fw_alt; | |
98929824 | 292 | bool is_8764; |
99020471 | 293 | struct completion firmware_loading_complete; |
e882efc9 YAP |
294 | |
295 | /* bitmap of running BSSes */ | |
296 | u32 running_bsses; | |
4c924f42 YAP |
297 | |
298 | /* ACS related */ | |
299 | bool sw_scan_start; | |
031eb464 YAP |
300 | struct ieee80211_channel *acs_chan; |
301 | unsigned long channel_time; | |
302 | struct survey_info survey[MWL8K_NUM_CHANS]; | |
a66098da LB |
303 | }; |
304 | ||
e53d9b96 NS |
305 | #define MAX_WEP_KEY_LEN 13 |
306 | #define NUM_WEP_KEYS 4 | |
307 | ||
a66098da LB |
308 | /* Per interface specific private data */ |
309 | struct mwl8k_vif { | |
f5bb87cf LB |
310 | struct list_head list; |
311 | struct ieee80211_vif *vif; | |
312 | ||
f57ca9c1 LB |
313 | /* Firmware macid for this vif. */ |
314 | int macid; | |
315 | ||
c2c2b12a | 316 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 317 | u16 seqno; |
e53d9b96 NS |
318 | |
319 | /* Saved WEP keys */ | |
320 | struct { | |
321 | u8 enabled; | |
322 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
323 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
324 | |
325 | /* BSSID */ | |
326 | u8 bssid[ETH_ALEN]; | |
327 | ||
328 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
329 | bool is_hw_crypto_enabled; | |
a66098da | 330 | }; |
a94cc97e | 331 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 332 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 333 | |
d0805c1c BC |
334 | struct tx_traffic_info { |
335 | u32 start_time; | |
336 | u32 pkts; | |
337 | }; | |
338 | ||
339 | #define MWL8K_MAX_TID 8 | |
a680400e LB |
340 | struct mwl8k_sta { |
341 | /* Index into station database. Returned by UPDATE_STADB. */ | |
342 | u8 peer_id; | |
17033543 | 343 | u8 is_ampdu_allowed; |
d0805c1c | 344 | struct tx_traffic_info tx_stats[MWL8K_MAX_TID]; |
a680400e LB |
345 | }; |
346 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
347 | ||
777ad375 | 348 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
57fbcce3 JB |
349 | { .band = NL80211_BAND_2GHZ, .center_freq = 2412, .hw_value = 1, }, |
350 | { .band = NL80211_BAND_2GHZ, .center_freq = 2417, .hw_value = 2, }, | |
351 | { .band = NL80211_BAND_2GHZ, .center_freq = 2422, .hw_value = 3, }, | |
352 | { .band = NL80211_BAND_2GHZ, .center_freq = 2427, .hw_value = 4, }, | |
353 | { .band = NL80211_BAND_2GHZ, .center_freq = 2432, .hw_value = 5, }, | |
354 | { .band = NL80211_BAND_2GHZ, .center_freq = 2437, .hw_value = 6, }, | |
355 | { .band = NL80211_BAND_2GHZ, .center_freq = 2442, .hw_value = 7, }, | |
356 | { .band = NL80211_BAND_2GHZ, .center_freq = 2447, .hw_value = 8, }, | |
357 | { .band = NL80211_BAND_2GHZ, .center_freq = 2452, .hw_value = 9, }, | |
358 | { .band = NL80211_BAND_2GHZ, .center_freq = 2457, .hw_value = 10, }, | |
359 | { .band = NL80211_BAND_2GHZ, .center_freq = 2462, .hw_value = 11, }, | |
360 | { .band = NL80211_BAND_2GHZ, .center_freq = 2467, .hw_value = 12, }, | |
361 | { .band = NL80211_BAND_2GHZ, .center_freq = 2472, .hw_value = 13, }, | |
362 | { .band = NL80211_BAND_2GHZ, .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
363 | }; |
364 | ||
777ad375 | 365 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
366 | { .bitrate = 10, .hw_value = 2, }, |
367 | { .bitrate = 20, .hw_value = 4, }, | |
368 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
369 | { .bitrate = 110, .hw_value = 22, }, |
370 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
371 | { .bitrate = 60, .hw_value = 12, }, |
372 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
373 | { .bitrate = 120, .hw_value = 24, }, |
374 | { .bitrate = 180, .hw_value = 36, }, | |
375 | { .bitrate = 240, .hw_value = 48, }, | |
376 | { .bitrate = 360, .hw_value = 72, }, | |
377 | { .bitrate = 480, .hw_value = 96, }, | |
378 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
379 | }; |
380 | ||
4eae9edd | 381 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
57fbcce3 JB |
382 | { .band = NL80211_BAND_5GHZ, .center_freq = 5180, .hw_value = 36, }, |
383 | { .band = NL80211_BAND_5GHZ, .center_freq = 5200, .hw_value = 40, }, | |
384 | { .band = NL80211_BAND_5GHZ, .center_freq = 5220, .hw_value = 44, }, | |
385 | { .band = NL80211_BAND_5GHZ, .center_freq = 5240, .hw_value = 48, }, | |
4eae9edd LB |
386 | }; |
387 | ||
388 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
389 | { .bitrate = 60, .hw_value = 12, }, | |
390 | { .bitrate = 90, .hw_value = 18, }, | |
391 | { .bitrate = 120, .hw_value = 24, }, | |
392 | { .bitrate = 180, .hw_value = 36, }, | |
393 | { .bitrate = 240, .hw_value = 48, }, | |
394 | { .bitrate = 360, .hw_value = 72, }, | |
395 | { .bitrate = 480, .hw_value = 96, }, | |
396 | { .bitrate = 540, .hw_value = 108, }, | |
4eae9edd LB |
397 | }; |
398 | ||
a66098da | 399 | /* Set or get info from Firmware */ |
a66098da | 400 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
401 | #define MWL8K_CMD_SET 0x0001 |
402 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
403 | |
404 | /* Firmware command codes */ | |
405 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
406 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 407 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
408 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
409 | #define MWL8K_CMD_GET_STAT 0x0014 | |
c3015313 | 410 | #define MWL8K_CMD_BBP_REG_ACCESS 0x001a |
ff45fc60 LB |
411 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
412 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 413 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 414 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 415 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
416 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
417 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
418 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
419 | #define MWL8K_CMD_SET_AID 0x010d | |
420 | #define MWL8K_CMD_SET_RATE 0x0110 | |
421 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
422 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 423 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
424 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
425 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 426 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 427 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 428 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 429 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 430 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
3aefc37e | 431 | #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205 |
197a4e4e | 432 | #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */ |
aa21d0f6 LB |
433 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
434 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 435 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 436 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
5faa1aff | 437 | #define MWL8K_CMD_BASTREAM 0x1125 |
a66098da | 438 | |
b603742f | 439 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 440 | { |
b603742f JL |
441 | u16 command = le16_to_cpu(cmd); |
442 | ||
a66098da LB |
443 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
444 | snprintf(buf, bufsize, "%s", #x);\ | |
445 | return buf;\ | |
446 | } while (0) | |
b603742f | 447 | switch (command & ~0x8000) { |
a66098da LB |
448 | MWL8K_CMDNAME(CODE_DNLD); |
449 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 450 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
451 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
452 | MWL8K_CMDNAME(GET_STAT); | |
453 | MWL8K_CMDNAME(RADIO_CONTROL); | |
454 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 455 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 456 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 457 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
458 | MWL8K_CMDNAME(SET_PRE_SCAN); |
459 | MWL8K_CMDNAME(SET_POST_SCAN); | |
460 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
461 | MWL8K_CMDNAME(SET_AID); |
462 | MWL8K_CMDNAME(SET_RATE); | |
463 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
464 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 465 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
466 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
467 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 468 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 469 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 470 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 471 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 472 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 473 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 474 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 475 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 476 | MWL8K_CMDNAME(UPDATE_STADB); |
5faa1aff | 477 | MWL8K_CMDNAME(BASTREAM); |
3aefc37e | 478 | MWL8K_CMDNAME(GET_WATCHDOG_BITMAP); |
a66098da LB |
479 | default: |
480 | snprintf(buf, bufsize, "0x%x", cmd); | |
481 | } | |
482 | #undef MWL8K_CMDNAME | |
483 | ||
484 | return buf; | |
485 | } | |
486 | ||
487 | /* Hardware and firmware reset */ | |
488 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
489 | { | |
490 | iowrite32(MWL8K_H2A_INT_RESET, | |
491 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
492 | iowrite32(MWL8K_H2A_INT_RESET, | |
493 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
494 | msleep(20); | |
495 | } | |
496 | ||
497 | /* Release fw image */ | |
d1f9e41d | 498 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
499 | { |
500 | if (*fw == NULL) | |
501 | return; | |
502 | release_firmware(*fw); | |
503 | *fw = NULL; | |
504 | } | |
505 | ||
506 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
507 | { | |
22be40d9 LB |
508 | mwl8k_release_fw(&priv->fw_ucode); |
509 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
510 | } |
511 | ||
99020471 BC |
512 | /* states for asynchronous f/w loading */ |
513 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
514 | enum { | |
515 | FW_STATE_INIT = 0, | |
516 | FW_STATE_LOADING_PREF, | |
517 | FW_STATE_LOADING_ALT, | |
518 | FW_STATE_ERROR, | |
519 | }; | |
520 | ||
a66098da LB |
521 | /* Request fw image */ |
522 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 523 | const char *fname, const struct firmware **fw, |
99020471 | 524 | bool nowait) |
a66098da LB |
525 | { |
526 | /* release current image */ | |
527 | if (*fw != NULL) | |
528 | mwl8k_release_fw(fw); | |
529 | ||
99020471 BC |
530 | if (nowait) |
531 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
532 | &priv->pdev->dev, GFP_KERNEL, | |
533 | priv, mwl8k_fw_state_machine); | |
534 | else | |
d1f9e41d | 535 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
536 | } |
537 | ||
99020471 BC |
538 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
539 | bool nowait) | |
a66098da | 540 | { |
a74b295e | 541 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
542 | int rc; |
543 | ||
a74b295e | 544 | if (di->helper_image != NULL) { |
99020471 BC |
545 | if (nowait) |
546 | rc = mwl8k_request_fw(priv, di->helper_image, | |
547 | &priv->fw_helper, true); | |
548 | else | |
549 | rc = mwl8k_request_fw(priv, di->helper_image, | |
550 | &priv->fw_helper, false); | |
551 | if (rc) | |
552 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
553 | pci_name(priv->pdev), di->helper_image); | |
554 | ||
555 | if (rc || nowait) | |
a74b295e | 556 | return rc; |
a66098da LB |
557 | } |
558 | ||
99020471 BC |
559 | if (nowait) { |
560 | /* | |
561 | * if we get here, no helper image is needed. Skip the | |
562 | * FW_STATE_INIT state. | |
563 | */ | |
564 | priv->fw_state = FW_STATE_LOADING_PREF; | |
565 | rc = mwl8k_request_fw(priv, fw_image, | |
566 | &priv->fw_ucode, | |
567 | true); | |
568 | } else | |
569 | rc = mwl8k_request_fw(priv, fw_image, | |
570 | &priv->fw_ucode, false); | |
a66098da | 571 | if (rc) { |
c2c357ce | 572 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 573 | pci_name(priv->pdev), fw_image); |
22be40d9 | 574 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
575 | return rc; |
576 | } | |
577 | ||
578 | return 0; | |
579 | } | |
580 | ||
581 | struct mwl8k_cmd_pkt { | |
582 | __le16 code; | |
583 | __le16 length; | |
f57ca9c1 LB |
584 | __u8 seq_num; |
585 | __u8 macid; | |
a66098da LB |
586 | __le16 result; |
587 | char payload[0]; | |
ba2d3587 | 588 | } __packed; |
a66098da LB |
589 | |
590 | /* | |
591 | * Firmware loading. | |
592 | */ | |
593 | static int | |
594 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
595 | { | |
596 | void __iomem *regs = priv->regs; | |
597 | dma_addr_t dma_addr; | |
a66098da LB |
598 | int loops; |
599 | ||
600 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
601 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
602 | return -ENOMEM; | |
603 | ||
604 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
605 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
606 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
607 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
608 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
609 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
610 | ||
a66098da LB |
611 | loops = 1000; |
612 | do { | |
613 | u32 int_code; | |
98929824 NS |
614 | if (priv->is_8764) { |
615 | int_code = ioread32(regs + | |
616 | MWL8K_HIU_H2A_INTERRUPT_STATUS); | |
617 | if (int_code == 0) | |
618 | break; | |
619 | } else { | |
620 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
621 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
622 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
623 | break; | |
624 | } | |
a66098da | 625 | } |
3d76e82c | 626 | cond_resched(); |
a66098da LB |
627 | udelay(1); |
628 | } while (--loops); | |
629 | ||
630 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
631 | ||
d4b70570 | 632 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
633 | } |
634 | ||
635 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
636 | const u8 *data, size_t length) | |
637 | { | |
638 | struct mwl8k_cmd_pkt *cmd; | |
639 | int done; | |
640 | int rc = 0; | |
641 | ||
642 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
643 | if (cmd == NULL) | |
644 | return -ENOMEM; | |
645 | ||
646 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
647 | cmd->seq_num = 0; | |
f57ca9c1 | 648 | cmd->macid = 0; |
a66098da LB |
649 | cmd->result = 0; |
650 | ||
651 | done = 0; | |
652 | while (length) { | |
653 | int block_size = length > 256 ? 256 : length; | |
654 | ||
655 | memcpy(cmd->payload, data + done, block_size); | |
656 | cmd->length = cpu_to_le16(block_size); | |
657 | ||
658 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
659 | sizeof(*cmd) + block_size); | |
660 | if (rc) | |
661 | break; | |
662 | ||
663 | done += block_size; | |
664 | length -= block_size; | |
665 | } | |
666 | ||
667 | if (!rc) { | |
668 | cmd->length = 0; | |
669 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
670 | } | |
671 | ||
672 | kfree(cmd); | |
673 | ||
674 | return rc; | |
675 | } | |
676 | ||
677 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
678 | const u8 *data, size_t length) | |
679 | { | |
680 | unsigned char *buffer; | |
681 | int may_continue, rc = 0; | |
682 | u32 done, prev_block_size; | |
683 | ||
684 | buffer = kmalloc(1024, GFP_KERNEL); | |
685 | if (buffer == NULL) | |
686 | return -ENOMEM; | |
687 | ||
688 | done = 0; | |
689 | prev_block_size = 0; | |
690 | may_continue = 1000; | |
691 | while (may_continue > 0) { | |
692 | u32 block_size; | |
693 | ||
694 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
695 | if (block_size & 1) { | |
696 | block_size &= ~1; | |
697 | may_continue--; | |
698 | } else { | |
699 | done += prev_block_size; | |
700 | length -= prev_block_size; | |
701 | } | |
702 | ||
703 | if (block_size > 1024 || block_size > length) { | |
704 | rc = -EOVERFLOW; | |
705 | break; | |
706 | } | |
707 | ||
708 | if (length == 0) { | |
709 | rc = 0; | |
710 | break; | |
711 | } | |
712 | ||
713 | if (block_size == 0) { | |
714 | rc = -EPROTO; | |
715 | may_continue--; | |
716 | udelay(1); | |
717 | continue; | |
718 | } | |
719 | ||
720 | prev_block_size = block_size; | |
721 | memcpy(buffer, data + done, block_size); | |
722 | ||
723 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
724 | if (rc) | |
725 | break; | |
726 | } | |
727 | ||
728 | if (!rc && length != 0) | |
729 | rc = -EREMOTEIO; | |
730 | ||
731 | kfree(buffer); | |
732 | ||
733 | return rc; | |
734 | } | |
735 | ||
c2c357ce | 736 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 737 | { |
c2c357ce | 738 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 739 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
740 | int rc; |
741 | int loops; | |
742 | ||
98929824 | 743 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4) && !priv->is_8764) { |
d1f9e41d | 744 | const struct firmware *helper = priv->fw_helper; |
a66098da | 745 | |
c2c357ce LB |
746 | if (helper == NULL) { |
747 | printk(KERN_ERR "%s: helper image needed but none " | |
748 | "given\n", pci_name(priv->pdev)); | |
749 | return -EINVAL; | |
750 | } | |
a66098da | 751 | |
c2c357ce | 752 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
753 | if (rc) { |
754 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 755 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
756 | return rc; |
757 | } | |
ba30c4a5 | 758 | msleep(20); |
a66098da | 759 | |
c2c357ce | 760 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 761 | } else { |
98929824 NS |
762 | if (priv->is_8764) |
763 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); | |
764 | else | |
765 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); | |
a66098da LB |
766 | } |
767 | ||
768 | if (rc) { | |
c2c357ce LB |
769 | printk(KERN_ERR "%s: unable to load firmware image\n", |
770 | pci_name(priv->pdev)); | |
a66098da LB |
771 | return rc; |
772 | } | |
773 | ||
89a91f4f | 774 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 775 | |
89b872e2 | 776 | loops = 500000; |
a66098da | 777 | do { |
eae74e65 LB |
778 | u32 ready_code; |
779 | ||
780 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
781 | if (ready_code == MWL8K_FWAP_READY) { | |
3db1cd5c | 782 | priv->ap_fw = true; |
eae74e65 LB |
783 | break; |
784 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
3db1cd5c | 785 | priv->ap_fw = false; |
a66098da | 786 | break; |
eae74e65 LB |
787 | } |
788 | ||
789 | cond_resched(); | |
a66098da LB |
790 | udelay(1); |
791 | } while (--loops); | |
792 | ||
793 | return loops ? 0 : -ETIMEDOUT; | |
794 | } | |
795 | ||
796 | ||
a66098da LB |
797 | /* DMA header used by firmware and hardware. */ |
798 | struct mwl8k_dma_data { | |
799 | __le16 fwlen; | |
800 | struct ieee80211_hdr wh; | |
20f09c3d | 801 | char data[0]; |
ba2d3587 | 802 | } __packed; |
a66098da LB |
803 | |
804 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 805 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 806 | { |
20f09c3d LB |
807 | struct mwl8k_dma_data *tr; |
808 | int hdrlen; | |
809 | ||
810 | tr = (struct mwl8k_dma_data *)skb->data; | |
811 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
812 | ||
813 | if (hdrlen != sizeof(tr->wh)) { | |
814 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
815 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
816 | *((__le16 *)(tr->data - 2)) = qos; | |
817 | } else { | |
818 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
819 | } | |
a66098da | 820 | } |
20f09c3d LB |
821 | |
822 | if (hdrlen != sizeof(*tr)) | |
823 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
824 | } |
825 | ||
ff776cec YAP |
826 | #define REDUCED_TX_HEADROOM 8 |
827 | ||
252486a1 | 828 | static void |
e4eefec7 YAP |
829 | mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb, |
830 | int head_pad, int tail_pad) | |
a66098da LB |
831 | { |
832 | struct ieee80211_hdr *wh; | |
ca009301 | 833 | int hdrlen; |
252486a1 | 834 | int reqd_hdrlen; |
a66098da LB |
835 | struct mwl8k_dma_data *tr; |
836 | ||
ca009301 LB |
837 | /* |
838 | * Add a firmware DMA header; the firmware requires that we | |
839 | * present a 2-byte payload length followed by a 4-address | |
840 | * header (without QoS field), followed (optionally) by any | |
841 | * WEP/ExtIV header (but only filled in for CCMP). | |
842 | */ | |
a66098da | 843 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 844 | |
a66098da | 845 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
ff776cec YAP |
846 | |
847 | /* | |
848 | * Check if skb_resize is required because of | |
849 | * tx_headroom adjustment. | |
850 | */ | |
851 | if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts) | |
852 | + REDUCED_TX_HEADROOM))) { | |
853 | if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) { | |
854 | ||
855 | wiphy_err(priv->hw->wiphy, | |
856 | "Failed to reallocate TX buffer\n"); | |
857 | return; | |
858 | } | |
859 | skb->truesize += REDUCED_TX_HEADROOM; | |
860 | } | |
861 | ||
e4eefec7 | 862 | reqd_hdrlen = sizeof(*tr) + head_pad; |
252486a1 NS |
863 | |
864 | if (hdrlen != reqd_hdrlen) | |
865 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 866 | |
ca009301 | 867 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 868 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
869 | |
870 | tr = (struct mwl8k_dma_data *)skb->data; | |
871 | if (wh != &tr->wh) | |
872 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
873 | if (hdrlen != sizeof(tr->wh)) |
874 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
875 | |
876 | /* | |
877 | * Firmware length is the length of the fully formed "802.11 | |
878 | * payload". That is, everything except for the 802.11 header. | |
879 | * This includes all crypto material including the MIC. | |
880 | */ | |
252486a1 | 881 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
882 | } |
883 | ||
ff776cec YAP |
884 | static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv, |
885 | struct sk_buff *skb) | |
e53d9b96 NS |
886 | { |
887 | struct ieee80211_hdr *wh; | |
888 | struct ieee80211_tx_info *tx_info; | |
889 | struct ieee80211_key_conf *key_conf; | |
890 | int data_pad; | |
e4eefec7 | 891 | int head_pad = 0; |
e53d9b96 NS |
892 | |
893 | wh = (struct ieee80211_hdr *)skb->data; | |
894 | ||
895 | tx_info = IEEE80211_SKB_CB(skb); | |
896 | ||
897 | key_conf = NULL; | |
898 | if (ieee80211_is_data(wh->frame_control)) | |
899 | key_conf = tx_info->control.hw_key; | |
900 | ||
901 | /* | |
902 | * Make sure the packet header is in the DMA header format (4-address | |
e4eefec7 | 903 | * without QoS), and add head & tail padding when HW crypto is enabled. |
e53d9b96 NS |
904 | * |
905 | * We have the following trailer padding requirements: | |
906 | * - WEP: 4 trailer bytes (ICV) | |
907 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
908 | * - CCMP: 8 trailer bytes (MIC) | |
909 | */ | |
910 | data_pad = 0; | |
911 | if (key_conf != NULL) { | |
e4eefec7 | 912 | head_pad = key_conf->iv_len; |
e53d9b96 NS |
913 | switch (key_conf->cipher) { |
914 | case WLAN_CIPHER_SUITE_WEP40: | |
915 | case WLAN_CIPHER_SUITE_WEP104: | |
916 | data_pad = 4; | |
917 | break; | |
918 | case WLAN_CIPHER_SUITE_TKIP: | |
919 | data_pad = 12; | |
920 | break; | |
921 | case WLAN_CIPHER_SUITE_CCMP: | |
922 | data_pad = 8; | |
923 | break; | |
924 | } | |
925 | } | |
e4eefec7 | 926 | mwl8k_add_dma_header(priv, skb, head_pad, data_pad); |
e53d9b96 | 927 | } |
a66098da LB |
928 | |
929 | /* | |
d926dc7d | 930 | * Packet reception for 88w8366/88w8764 AP firmware. |
6f6d1e9a | 931 | */ |
d926dc7d | 932 | struct mwl8k_rxd_ap { |
6f6d1e9a LB |
933 | __le16 pkt_len; |
934 | __u8 sq2; | |
935 | __u8 rate; | |
936 | __le32 pkt_phys_addr; | |
937 | __le32 next_rxd_phys_addr; | |
938 | __le16 qos_control; | |
939 | __le16 htsig2; | |
940 | __le32 hw_rssi_info; | |
941 | __le32 hw_noise_floor_info; | |
942 | __u8 noise_floor; | |
943 | __u8 pad0[3]; | |
944 | __u8 rssi; | |
945 | __u8 rx_status; | |
946 | __u8 channel; | |
947 | __u8 rx_ctrl; | |
ba2d3587 | 948 | } __packed; |
6f6d1e9a | 949 | |
d926dc7d NS |
950 | #define MWL8K_AP_RATE_INFO_MCS_FORMAT 0x80 |
951 | #define MWL8K_AP_RATE_INFO_40MHZ 0x40 | |
952 | #define MWL8K_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 953 | |
d926dc7d | 954 | #define MWL8K_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 955 | |
d926dc7d NS |
956 | /* 8366/8764 AP rx_status bits */ |
957 | #define MWL8K_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
958 | #define MWL8K_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
959 | #define MWL8K_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
960 | #define MWL8K_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
961 | #define MWL8K_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
d9a07d49 | 962 | |
d926dc7d | 963 | static void mwl8k_rxd_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 964 | { |
d926dc7d | 965 | struct mwl8k_rxd_ap *rxd = _rxd; |
6f6d1e9a LB |
966 | |
967 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
d926dc7d | 968 | rxd->rx_ctrl = MWL8K_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
969 | } |
970 | ||
d926dc7d | 971 | static void mwl8k_rxd_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 972 | { |
d926dc7d | 973 | struct mwl8k_rxd_ap *rxd = _rxd; |
6f6d1e9a LB |
974 | |
975 | rxd->pkt_len = cpu_to_le16(len); | |
976 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
977 | wmb(); | |
978 | rxd->rx_ctrl = 0; | |
979 | } | |
980 | ||
981 | static int | |
d926dc7d NS |
982 | mwl8k_rxd_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
983 | __le16 *qos, s8 *noise) | |
6f6d1e9a | 984 | { |
d926dc7d | 985 | struct mwl8k_rxd_ap *rxd = _rxd; |
6f6d1e9a | 986 | |
d926dc7d | 987 | if (!(rxd->rx_ctrl & MWL8K_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
988 | return -1; |
989 | rmb(); | |
990 | ||
991 | memset(status, 0, sizeof(*status)); | |
992 | ||
993 | status->signal = -rxd->rssi; | |
0d462bbb | 994 | *noise = -rxd->noise_floor; |
6f6d1e9a | 995 | |
d926dc7d | 996 | if (rxd->rate & MWL8K_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 997 | status->flag |= RX_FLAG_HT; |
d926dc7d | 998 | if (rxd->rate & MWL8K_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 999 | status->flag |= RX_FLAG_40MHZ; |
d926dc7d | 1000 | status->rate_idx = MWL8K_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
1001 | } else { |
1002 | int i; | |
1003 | ||
777ad375 LB |
1004 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
1005 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
1006 | status->rate_idx = i; |
1007 | break; | |
1008 | } | |
1009 | } | |
1010 | } | |
1011 | ||
85478344 | 1012 | if (rxd->channel > 14) { |
57fbcce3 | 1013 | status->band = NL80211_BAND_5GHZ; |
85478344 LB |
1014 | if (!(status->flag & RX_FLAG_HT)) |
1015 | status->rate_idx -= 5; | |
1016 | } else { | |
57fbcce3 | 1017 | status->band = NL80211_BAND_2GHZ; |
85478344 | 1018 | } |
59eb21a6 BR |
1019 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1020 | status->band); | |
6f6d1e9a | 1021 | |
20f09c3d LB |
1022 | *qos = rxd->qos_control; |
1023 | ||
d926dc7d NS |
1024 | if ((rxd->rx_status != MWL8K_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
1025 | (rxd->rx_status & MWL8K_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
1026 | (rxd->rx_status & MWL8K_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
d9a07d49 NS |
1027 | status->flag |= RX_FLAG_MMIC_ERROR; |
1028 | ||
6f6d1e9a LB |
1029 | return le16_to_cpu(rxd->pkt_len); |
1030 | } | |
1031 | ||
d926dc7d NS |
1032 | static struct rxd_ops rxd_ap_ops = { |
1033 | .rxd_size = sizeof(struct mwl8k_rxd_ap), | |
1034 | .rxd_init = mwl8k_rxd_ap_init, | |
1035 | .rxd_refill = mwl8k_rxd_ap_refill, | |
1036 | .rxd_process = mwl8k_rxd_ap_process, | |
6f6d1e9a LB |
1037 | }; |
1038 | ||
1039 | /* | |
89a91f4f | 1040 | * Packet reception for STA firmware. |
a66098da | 1041 | */ |
89a91f4f | 1042 | struct mwl8k_rxd_sta { |
a66098da LB |
1043 | __le16 pkt_len; |
1044 | __u8 link_quality; | |
1045 | __u8 noise_level; | |
1046 | __le32 pkt_phys_addr; | |
45eb400d | 1047 | __le32 next_rxd_phys_addr; |
a66098da LB |
1048 | __le16 qos_control; |
1049 | __le16 rate_info; | |
1050 | __le32 pad0[4]; | |
1051 | __u8 rssi; | |
1052 | __u8 channel; | |
1053 | __le16 pad1; | |
1054 | __u8 rx_ctrl; | |
1055 | __u8 rx_status; | |
1056 | __u8 pad2[2]; | |
ba2d3587 | 1057 | } __packed; |
a66098da | 1058 | |
89a91f4f LB |
1059 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
1060 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
1061 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
1062 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
1063 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
1064 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 1065 | |
89a91f4f | 1066 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
1067 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
1068 | /* ICV=0 or MIC=1 */ | |
1069 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
1070 | /* Key is uploaded only in failure case */ | |
1071 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 1072 | |
89a91f4f | 1073 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 1074 | { |
89a91f4f | 1075 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1076 | |
1077 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 1078 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
1079 | } |
1080 | ||
89a91f4f | 1081 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 1082 | { |
89a91f4f | 1083 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1084 | |
1085 | rxd->pkt_len = cpu_to_le16(len); | |
1086 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
1087 | wmb(); | |
1088 | rxd->rx_ctrl = 0; | |
1089 | } | |
1090 | ||
1091 | static int | |
89a91f4f | 1092 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 1093 | __le16 *qos, s8 *noise) |
54bc3a0d | 1094 | { |
89a91f4f | 1095 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1096 | u16 rate_info; |
1097 | ||
89a91f4f | 1098 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
1099 | return -1; |
1100 | rmb(); | |
1101 | ||
1102 | rate_info = le16_to_cpu(rxd->rate_info); | |
1103 | ||
1104 | memset(status, 0, sizeof(*status)); | |
1105 | ||
1106 | status->signal = -rxd->rssi; | |
0d462bbb | 1107 | *noise = -rxd->noise_level; |
89a91f4f LB |
1108 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
1109 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1110 | |
89a91f4f | 1111 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1112 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1113 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1114 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1115 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1116 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1117 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1118 | status->flag |= RX_FLAG_HT; |
1119 | ||
85478344 | 1120 | if (rxd->channel > 14) { |
57fbcce3 | 1121 | status->band = NL80211_BAND_5GHZ; |
85478344 LB |
1122 | if (!(status->flag & RX_FLAG_HT)) |
1123 | status->rate_idx -= 5; | |
1124 | } else { | |
57fbcce3 | 1125 | status->band = NL80211_BAND_2GHZ; |
85478344 | 1126 | } |
59eb21a6 BR |
1127 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1128 | status->band); | |
54bc3a0d | 1129 | |
20f09c3d | 1130 | *qos = rxd->qos_control; |
d9a07d49 NS |
1131 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1132 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1133 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1134 | |
54bc3a0d LB |
1135 | return le16_to_cpu(rxd->pkt_len); |
1136 | } | |
1137 | ||
89a91f4f LB |
1138 | static struct rxd_ops rxd_sta_ops = { |
1139 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1140 | .rxd_init = mwl8k_rxd_sta_init, | |
1141 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1142 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1143 | }; |
1144 | ||
1145 | ||
a66098da LB |
1146 | #define MWL8K_RX_DESCS 256 |
1147 | #define MWL8K_RX_MAXSZ 3800 | |
1148 | ||
1149 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1150 | { | |
1151 | struct mwl8k_priv *priv = hw->priv; | |
1152 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1153 | int size; | |
1154 | int i; | |
1155 | ||
45eb400d LB |
1156 | rxq->rxd_count = 0; |
1157 | rxq->head = 0; | |
1158 | rxq->tail = 0; | |
a66098da | 1159 | |
54bc3a0d | 1160 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1161 | |
e6443b24 | 1162 | rxq->rxd = pci_zalloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
45eb400d | 1163 | if (rxq->rxd == NULL) { |
5db55844 | 1164 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1165 | return -ENOMEM; |
1166 | } | |
a66098da | 1167 | |
b9ede5f1 | 1168 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1169 | if (rxq->buf == NULL) { |
45eb400d | 1170 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1171 | return -ENOMEM; |
1172 | } | |
a66098da LB |
1173 | |
1174 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1175 | int desc_size; |
1176 | void *rxd; | |
a66098da | 1177 | int nexti; |
54bc3a0d LB |
1178 | dma_addr_t next_dma_addr; |
1179 | ||
1180 | desc_size = priv->rxd_ops->rxd_size; | |
1181 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1182 | |
54bc3a0d LB |
1183 | nexti = i + 1; |
1184 | if (nexti == MWL8K_RX_DESCS) | |
1185 | nexti = 0; | |
1186 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1187 | |
54bc3a0d | 1188 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1189 | } |
1190 | ||
1191 | return 0; | |
1192 | } | |
1193 | ||
1194 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1195 | { | |
1196 | struct mwl8k_priv *priv = hw->priv; | |
1197 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1198 | int refilled; | |
1199 | ||
1200 | refilled = 0; | |
45eb400d | 1201 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1202 | struct sk_buff *skb; |
788838eb | 1203 | dma_addr_t addr; |
a66098da | 1204 | int rx; |
54bc3a0d | 1205 | void *rxd; |
a66098da LB |
1206 | |
1207 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1208 | if (skb == NULL) | |
1209 | break; | |
1210 | ||
788838eb LB |
1211 | addr = pci_map_single(priv->pdev, skb->data, |
1212 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1213 | |
54bc3a0d LB |
1214 | rxq->rxd_count++; |
1215 | rx = rxq->tail++; | |
1216 | if (rxq->tail == MWL8K_RX_DESCS) | |
1217 | rxq->tail = 0; | |
788838eb | 1218 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1219 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1220 | |
1221 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1222 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1223 | |
1224 | refilled++; | |
1225 | } | |
1226 | ||
1227 | return refilled; | |
1228 | } | |
1229 | ||
1230 | /* Must be called only when the card's reception is completely halted */ | |
1231 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1232 | { | |
1233 | struct mwl8k_priv *priv = hw->priv; | |
1234 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1235 | int i; | |
1236 | ||
73b46320 BC |
1237 | if (rxq->rxd == NULL) |
1238 | return; | |
1239 | ||
a66098da | 1240 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
788838eb LB |
1241 | if (rxq->buf[i].skb != NULL) { |
1242 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1243 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1244 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1245 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1246 | |
1247 | kfree_skb(rxq->buf[i].skb); | |
1248 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1249 | } |
1250 | } | |
1251 | ||
788838eb LB |
1252 | kfree(rxq->buf); |
1253 | rxq->buf = NULL; | |
a66098da LB |
1254 | |
1255 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1256 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1257 | rxq->rxd, rxq->rxd_dma); |
1258 | rxq->rxd = NULL; | |
a66098da LB |
1259 | } |
1260 | ||
1261 | ||
1262 | /* | |
1263 | * Scan a list of BSSIDs to process for finalize join. | |
1264 | * Allows for extension to process multiple BSSIDs. | |
1265 | */ | |
1266 | static inline int | |
1267 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1268 | { | |
1269 | return priv->capture_beacon && | |
1270 | ieee80211_is_beacon(wh->frame_control) && | |
3f9a79b5 | 1271 | ether_addr_equal_64bits(wh->addr3, priv->capture_bssid); |
a66098da LB |
1272 | } |
1273 | ||
3779752d LB |
1274 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1275 | struct sk_buff *skb) | |
a66098da | 1276 | { |
3779752d LB |
1277 | struct mwl8k_priv *priv = hw->priv; |
1278 | ||
a66098da | 1279 | priv->capture_beacon = false; |
93803b33 | 1280 | eth_zero_addr(priv->capture_bssid); |
a66098da LB |
1281 | |
1282 | /* | |
1283 | * Use GFP_ATOMIC as rxq_process is called from | |
1284 | * the primary interrupt handler, memory allocation call | |
1285 | * must not sleep. | |
1286 | */ | |
1287 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1288 | if (priv->beacon_skb != NULL) | |
3779752d | 1289 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1290 | } |
1291 | ||
d9a07d49 NS |
1292 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1293 | u8 *bssid) | |
1294 | { | |
1295 | struct mwl8k_vif *mwl8k_vif; | |
1296 | ||
1297 | list_for_each_entry(mwl8k_vif, | |
1298 | vif_list, list) { | |
1299 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1300 | ETH_ALEN) == 0) | |
1301 | return mwl8k_vif; | |
1302 | } | |
1303 | ||
1304 | return NULL; | |
1305 | } | |
1306 | ||
a66098da LB |
1307 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1308 | { | |
1309 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1310 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1311 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1312 | int processed; | |
1313 | ||
1314 | processed = 0; | |
45eb400d | 1315 | while (rxq->rxd_count && limit--) { |
a66098da | 1316 | struct sk_buff *skb; |
54bc3a0d LB |
1317 | void *rxd; |
1318 | int pkt_len; | |
a66098da | 1319 | struct ieee80211_rx_status status; |
d9a07d49 | 1320 | struct ieee80211_hdr *wh; |
20f09c3d | 1321 | __le16 qos; |
a66098da | 1322 | |
788838eb | 1323 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1324 | if (skb == NULL) |
1325 | break; | |
54bc3a0d LB |
1326 | |
1327 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1328 | ||
0d462bbb JL |
1329 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1330 | &priv->noise); | |
54bc3a0d LB |
1331 | if (pkt_len < 0) |
1332 | break; | |
1333 | ||
788838eb LB |
1334 | rxq->buf[rxq->head].skb = NULL; |
1335 | ||
1336 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1337 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1338 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1339 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1340 | |
54bc3a0d LB |
1341 | rxq->head++; |
1342 | if (rxq->head == MWL8K_RX_DESCS) | |
1343 | rxq->head = 0; | |
1344 | ||
45eb400d | 1345 | rxq->rxd_count--; |
a66098da | 1346 | |
d9a07d49 | 1347 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1348 | |
a66098da | 1349 | /* |
c2c357ce LB |
1350 | * Check for a pending join operation. Save a |
1351 | * copy of the beacon and schedule a tasklet to | |
1352 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1353 | */ |
54bc3a0d | 1354 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1355 | mwl8k_save_beacon(hw, skb); |
a66098da | 1356 | |
d9a07d49 NS |
1357 | if (ieee80211_has_protected(wh->frame_control)) { |
1358 | ||
1359 | /* Check if hw crypto has been enabled for | |
1360 | * this bss. If yes, set the status flags | |
1361 | * accordingly | |
1362 | */ | |
1363 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1364 | wh->addr1); | |
1365 | ||
1366 | if (mwl8k_vif != NULL && | |
23677ce3 | 1367 | mwl8k_vif->is_hw_crypto_enabled) { |
d9a07d49 NS |
1368 | /* |
1369 | * When MMIC ERROR is encountered | |
1370 | * by the firmware, payload is | |
1371 | * dropped and only 32 bytes of | |
1372 | * mwl8k Firmware header is sent | |
1373 | * to the host. | |
1374 | * | |
1375 | * We need to add four bytes of | |
1376 | * key information. In it | |
1377 | * MAC80211 expects keyidx set to | |
1378 | * 0 for triggering Counter | |
1379 | * Measure of MMIC failure. | |
1380 | */ | |
1381 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1382 | struct mwl8k_dma_data *tr; | |
1383 | tr = (struct mwl8k_dma_data *)skb->data; | |
1384 | memset((void *)&(tr->data), 0, 4); | |
1385 | pkt_len += 4; | |
1386 | } | |
1387 | ||
1388 | if (!ieee80211_is_auth(wh->frame_control)) | |
1389 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1390 | RX_FLAG_DECRYPTED | | |
1391 | RX_FLAG_MMIC_STRIPPED; | |
1392 | } | |
1393 | } | |
1394 | ||
1395 | skb_put(skb, pkt_len); | |
1396 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1397 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1398 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1399 | |
1400 | processed++; | |
1401 | } | |
1402 | ||
1403 | return processed; | |
1404 | } | |
1405 | ||
1406 | ||
1407 | /* | |
1408 | * Packet transmission. | |
1409 | */ | |
1410 | ||
a66098da LB |
1411 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1412 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1413 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1414 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1415 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1416 | |
e0493a8d LB |
1417 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1418 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1419 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1420 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1421 | #define MWL8K_QOS_EOSP 0x0010 | |
1422 | ||
a66098da LB |
1423 | struct mwl8k_tx_desc { |
1424 | __le32 status; | |
1425 | __u8 data_rate; | |
1426 | __u8 tx_priority; | |
1427 | __le16 qos_control; | |
1428 | __le32 pkt_phys_addr; | |
1429 | __le16 pkt_len; | |
d89173f2 | 1430 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1431 | __le32 next_txd_phys_addr; |
8a7a578c | 1432 | __le32 timestamp; |
a66098da LB |
1433 | __le16 rate_info; |
1434 | __u8 peer_id; | |
a1fe24b0 | 1435 | __u8 tx_frag_cnt; |
ba2d3587 | 1436 | } __packed; |
a66098da LB |
1437 | |
1438 | #define MWL8K_TX_DESCS 128 | |
1439 | ||
1440 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1441 | { | |
1442 | struct mwl8k_priv *priv = hw->priv; | |
1443 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1444 | int size; | |
1445 | int i; | |
1446 | ||
8ccbc3b8 | 1447 | txq->len = 0; |
45eb400d LB |
1448 | txq->head = 0; |
1449 | txq->tail = 0; | |
a66098da LB |
1450 | |
1451 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1452 | ||
e6443b24 | 1453 | txq->txd = pci_zalloc_consistent(priv->pdev, size, &txq->txd_dma); |
45eb400d | 1454 | if (txq->txd == NULL) { |
5db55844 | 1455 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1456 | return -ENOMEM; |
1457 | } | |
a66098da | 1458 | |
b9ede5f1 | 1459 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1460 | if (txq->skb == NULL) { |
45eb400d | 1461 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1462 | return -ENOMEM; |
1463 | } | |
a66098da LB |
1464 | |
1465 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1466 | struct mwl8k_tx_desc *tx_desc; | |
1467 | int nexti; | |
1468 | ||
45eb400d | 1469 | tx_desc = txq->txd + i; |
a66098da LB |
1470 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1471 | ||
1472 | tx_desc->status = 0; | |
45eb400d LB |
1473 | tx_desc->next_txd_phys_addr = |
1474 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1475 | } |
1476 | ||
1477 | return 0; | |
1478 | } | |
1479 | ||
1480 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1481 | { | |
1482 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1483 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1484 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1485 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1486 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1487 | } | |
1488 | ||
7e1112d3 | 1489 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1490 | { |
7e1112d3 LB |
1491 | struct mwl8k_priv *priv = hw->priv; |
1492 | int i; | |
1493 | ||
e600707b | 1494 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
7e1112d3 LB |
1495 | struct mwl8k_tx_queue *txq = priv->txq + i; |
1496 | int fw_owned = 0; | |
1497 | int drv_owned = 0; | |
1498 | int unused = 0; | |
1499 | int desc; | |
1500 | ||
a66098da | 1501 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1502 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1503 | u32 status; | |
a66098da | 1504 | |
7e1112d3 | 1505 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1506 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1507 | fw_owned++; |
a66098da | 1508 | else |
7e1112d3 | 1509 | drv_owned++; |
a66098da LB |
1510 | |
1511 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1512 | unused++; |
a66098da | 1513 | } |
a66098da | 1514 | |
c96c31e4 JP |
1515 | wiphy_err(hw->wiphy, |
1516 | "txq[%d] len=%d head=%d tail=%d " | |
1517 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1518 | i, | |
1519 | txq->len, txq->head, txq->tail, | |
1520 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1521 | } |
a66098da LB |
1522 | } |
1523 | ||
618952a7 | 1524 | /* |
88de754a | 1525 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1526 | */ |
62abd3cf | 1527 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1528 | |
950d5b01 | 1529 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1530 | { |
a66098da | 1531 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1532 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1533 | int retry; |
1534 | int rc; | |
a66098da LB |
1535 | |
1536 | might_sleep(); | |
1537 | ||
6b6accc3 YAP |
1538 | /* Since fw restart is in progress, allow only the firmware |
1539 | * commands from the restart code and block the other | |
1540 | * commands since they are going to fail in any case since | |
1541 | * the firmware has crashed | |
1542 | */ | |
1543 | if (priv->hw_restart_in_progress) { | |
1544 | if (priv->hw_restart_owner == current) | |
1545 | return 0; | |
1546 | else | |
1547 | return -EBUSY; | |
1548 | } | |
1549 | ||
c27a54d3 YAP |
1550 | if (atomic_read(&priv->watchdog_event_pending)) |
1551 | return 0; | |
1552 | ||
7e1112d3 LB |
1553 | /* |
1554 | * The TX queues are stopped at this point, so this test | |
1555 | * doesn't need to take ->tx_lock. | |
1556 | */ | |
1557 | if (!priv->pending_tx_pkts) | |
1558 | return 0; | |
1559 | ||
bbf71a8f | 1560 | retry = 1; |
7e1112d3 LB |
1561 | rc = 0; |
1562 | ||
a66098da | 1563 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1564 | priv->tx_wait = &tx_wait; |
1565 | while (!rc) { | |
1566 | int oldcount; | |
1567 | unsigned long timeout; | |
a66098da | 1568 | |
7e1112d3 | 1569 | oldcount = priv->pending_tx_pkts; |
a66098da | 1570 | |
7e1112d3 | 1571 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1572 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1573 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
c27a54d3 YAP |
1574 | |
1575 | if (atomic_read(&priv->watchdog_event_pending)) { | |
1576 | spin_lock_bh(&priv->tx_lock); | |
1577 | priv->tx_wait = NULL; | |
1578 | spin_unlock_bh(&priv->tx_lock); | |
1579 | return 0; | |
1580 | } | |
1581 | ||
a66098da | 1582 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 | 1583 | |
bbf71a8f | 1584 | if (timeout || !priv->pending_tx_pkts) { |
7e1112d3 | 1585 | WARN_ON(priv->pending_tx_pkts); |
ba30c4a5 | 1586 | if (retry) |
c96c31e4 | 1587 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1588 | break; |
1589 | } | |
1590 | ||
bbf71a8f NS |
1591 | if (retry) { |
1592 | mwl8k_tx_start(priv); | |
1593 | retry = 0; | |
1594 | continue; | |
1595 | } | |
1596 | ||
7e1112d3 | 1597 | if (priv->pending_tx_pkts < oldcount) { |
c96c31e4 JP |
1598 | wiphy_notice(hw->wiphy, |
1599 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1600 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1601 | retry = 1; |
1602 | continue; | |
1603 | } | |
1604 | ||
a66098da | 1605 | priv->tx_wait = NULL; |
a66098da | 1606 | |
c96c31e4 JP |
1607 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1608 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 | 1609 | mwl8k_dump_tx_rings(hw); |
6b6accc3 YAP |
1610 | priv->hw_restart_in_progress = true; |
1611 | ieee80211_queue_work(hw, &priv->fw_reload); | |
7e1112d3 LB |
1612 | |
1613 | rc = -ETIMEDOUT; | |
a66098da | 1614 | } |
9b0b11fb | 1615 | priv->tx_wait = NULL; |
7e1112d3 | 1616 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1617 | |
7e1112d3 | 1618 | return rc; |
a66098da LB |
1619 | } |
1620 | ||
c23b5a69 LB |
1621 | #define MWL8K_TXD_SUCCESS(status) \ |
1622 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1623 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1624 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1625 | |
a0e7c6cf NS |
1626 | static int mwl8k_tid_queue_mapping(u8 tid) |
1627 | { | |
1628 | BUG_ON(tid > 7); | |
1629 | ||
1630 | switch (tid) { | |
1631 | case 0: | |
1632 | case 3: | |
1633 | return IEEE80211_AC_BE; | |
a0e7c6cf NS |
1634 | case 1: |
1635 | case 2: | |
1636 | return IEEE80211_AC_BK; | |
a0e7c6cf NS |
1637 | case 4: |
1638 | case 5: | |
1639 | return IEEE80211_AC_VI; | |
a0e7c6cf NS |
1640 | case 6: |
1641 | case 7: | |
1642 | return IEEE80211_AC_VO; | |
a0e7c6cf NS |
1643 | default: |
1644 | return -1; | |
a0e7c6cf NS |
1645 | } |
1646 | } | |
1647 | ||
17033543 NS |
1648 | /* The firmware will fill in the rate information |
1649 | * for each packet that gets queued in the hardware | |
49adc5ce | 1650 | * and these macros will interpret that info. |
17033543 NS |
1651 | */ |
1652 | ||
49adc5ce JL |
1653 | #define RI_FORMAT(a) (a & 0x0001) |
1654 | #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3) | |
17033543 | 1655 | |
efb7c49a LB |
1656 | static int |
1657 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1658 | { |
1659 | struct mwl8k_priv *priv = hw->priv; | |
1660 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1661 | int processed; |
a66098da | 1662 | |
efb7c49a | 1663 | processed = 0; |
8ccbc3b8 | 1664 | while (txq->len > 0 && limit--) { |
a66098da | 1665 | int tx; |
a66098da LB |
1666 | struct mwl8k_tx_desc *tx_desc; |
1667 | unsigned long addr; | |
ce9e2e1b | 1668 | int size; |
a66098da LB |
1669 | struct sk_buff *skb; |
1670 | struct ieee80211_tx_info *info; | |
1671 | u32 status; | |
17033543 NS |
1672 | struct ieee80211_sta *sta; |
1673 | struct mwl8k_sta *sta_info = NULL; | |
1674 | u16 rate_info; | |
17033543 | 1675 | struct ieee80211_hdr *wh; |
a66098da | 1676 | |
45eb400d LB |
1677 | tx = txq->head; |
1678 | tx_desc = txq->txd + tx; | |
a66098da LB |
1679 | |
1680 | status = le32_to_cpu(tx_desc->status); | |
1681 | ||
1682 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1683 | if (!force) | |
1684 | break; | |
1685 | tx_desc->status &= | |
1686 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1687 | } | |
1688 | ||
45eb400d | 1689 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1690 | BUG_ON(txq->len == 0); |
1691 | txq->len--; | |
a66098da LB |
1692 | priv->pending_tx_pkts--; |
1693 | ||
1694 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1695 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1696 | skb = txq->skb[tx]; |
1697 | txq->skb[tx] = NULL; | |
a66098da LB |
1698 | |
1699 | BUG_ON(skb == NULL); | |
1700 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1701 | ||
20f09c3d | 1702 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da | 1703 | |
17033543 NS |
1704 | wh = (struct ieee80211_hdr *) skb->data; |
1705 | ||
a66098da LB |
1706 | /* Mark descriptor as unused */ |
1707 | tx_desc->pkt_phys_addr = 0; | |
1708 | tx_desc->pkt_len = 0; | |
1709 | ||
a66098da | 1710 | info = IEEE80211_SKB_CB(skb); |
17033543 | 1711 | if (ieee80211_is_data(wh->frame_control)) { |
89e11801 TH |
1712 | rcu_read_lock(); |
1713 | sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1, | |
1714 | wh->addr2); | |
17033543 NS |
1715 | if (sta) { |
1716 | sta_info = MWL8K_STA(sta); | |
1717 | BUG_ON(sta_info == NULL); | |
1718 | rate_info = le16_to_cpu(tx_desc->rate_info); | |
17033543 NS |
1719 | /* If rate is < 6.5 Mpbs for an ht station |
1720 | * do not form an ampdu. If the station is a | |
1721 | * legacy station (format = 0), do not form an | |
1722 | * ampdu | |
1723 | */ | |
49adc5ce JL |
1724 | if (RI_RATE_ID_MCS(rate_info) < 1 || |
1725 | RI_FORMAT(rate_info) == 0) { | |
17033543 NS |
1726 | sta_info->is_ampdu_allowed = false; |
1727 | } else { | |
1728 | sta_info->is_ampdu_allowed = true; | |
1729 | } | |
1730 | } | |
89e11801 | 1731 | rcu_read_unlock(); |
17033543 NS |
1732 | } |
1733 | ||
a66098da | 1734 | ieee80211_tx_info_clear_status(info); |
0bf22c37 NS |
1735 | |
1736 | /* Rate control is happening in the firmware. | |
1737 | * Ensure no tx rate is being reported. | |
1738 | */ | |
ba30c4a5 YAP |
1739 | info->status.rates[0].idx = -1; |
1740 | info->status.rates[0].count = 1; | |
0bf22c37 | 1741 | |
ce9e2e1b | 1742 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1743 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1744 | |
1745 | ieee80211_tx_status_irqsafe(hw, skb); | |
1746 | ||
efb7c49a | 1747 | processed++; |
a66098da LB |
1748 | } |
1749 | ||
efb7c49a | 1750 | return processed; |
a66098da LB |
1751 | } |
1752 | ||
1753 | /* must be called only when the card's transmit is completely halted */ | |
1754 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1755 | { | |
1756 | struct mwl8k_priv *priv = hw->priv; | |
1757 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1758 | ||
73b46320 BC |
1759 | if (txq->txd == NULL) |
1760 | return; | |
1761 | ||
efb7c49a | 1762 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1763 | |
45eb400d LB |
1764 | kfree(txq->skb); |
1765 | txq->skb = NULL; | |
a66098da LB |
1766 | |
1767 | pci_free_consistent(priv->pdev, | |
1768 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1769 | txq->txd, txq->txd_dma); |
1770 | txq->txd = NULL; | |
a66098da LB |
1771 | } |
1772 | ||
ac109fd0 | 1773 | /* caller must hold priv->stream_lock when calling the stream functions */ |
ba30c4a5 | 1774 | static struct mwl8k_ampdu_stream * |
ac109fd0 BC |
1775 | mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid) |
1776 | { | |
1777 | struct mwl8k_ampdu_stream *stream; | |
1778 | struct mwl8k_priv *priv = hw->priv; | |
1779 | int i; | |
1780 | ||
7fb978b7 | 1781 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1782 | stream = &priv->ampdu[i]; |
1783 | if (stream->state == AMPDU_NO_STREAM) { | |
1784 | stream->sta = sta; | |
1785 | stream->state = AMPDU_STREAM_NEW; | |
1786 | stream->tid = tid; | |
1787 | stream->idx = i; | |
ac109fd0 BC |
1788 | wiphy_debug(hw->wiphy, "Added a new stream for %pM %d", |
1789 | sta->addr, tid); | |
1790 | return stream; | |
1791 | } | |
1792 | } | |
1793 | return NULL; | |
1794 | } | |
1795 | ||
1796 | static int | |
1797 | mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1798 | { | |
1799 | int ret; | |
1800 | ||
1801 | /* if the stream has already been started, don't start it again */ | |
1802 | if (stream->state != AMPDU_STREAM_NEW) | |
1803 | return 0; | |
1804 | ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0); | |
1805 | if (ret) | |
1806 | wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: " | |
1807 | "%d\n", stream->sta->addr, stream->tid, ret); | |
1808 | else | |
1809 | wiphy_debug(hw->wiphy, "Started stream for %pM %d\n", | |
1810 | stream->sta->addr, stream->tid); | |
1811 | return ret; | |
1812 | } | |
1813 | ||
1814 | static void | |
1815 | mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1816 | { | |
1817 | wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr, | |
1818 | stream->tid); | |
1819 | memset(stream, 0, sizeof(*stream)); | |
1820 | } | |
1821 | ||
1822 | static struct mwl8k_ampdu_stream * | |
1823 | mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid) | |
1824 | { | |
1825 | struct mwl8k_priv *priv = hw->priv; | |
1826 | int i; | |
1827 | ||
7fb978b7 | 1828 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1829 | struct mwl8k_ampdu_stream *stream; |
1830 | stream = &priv->ampdu[i]; | |
1831 | if (stream->state == AMPDU_NO_STREAM) | |
1832 | continue; | |
1833 | if (!memcmp(stream->sta->addr, addr, ETH_ALEN) && | |
1834 | stream->tid == tid) | |
1835 | return stream; | |
1836 | } | |
1837 | return NULL; | |
1838 | } | |
1839 | ||
d0805c1c BC |
1840 | #define MWL8K_AMPDU_PACKET_THRESHOLD 64 |
1841 | static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid) | |
1842 | { | |
1843 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1844 | struct tx_traffic_info *tx_stats; | |
1845 | ||
1846 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1847 | tx_stats = &sta_info->tx_stats[tid]; | |
1848 | ||
1849 | return sta_info->is_ampdu_allowed && | |
1850 | tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD; | |
1851 | } | |
1852 | ||
1853 | static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid) | |
1854 | { | |
1855 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1856 | struct tx_traffic_info *tx_stats; | |
1857 | ||
1858 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1859 | tx_stats = &sta_info->tx_stats[tid]; | |
1860 | ||
1861 | if (tx_stats->start_time == 0) | |
1862 | tx_stats->start_time = jiffies; | |
1863 | ||
1864 | /* reset the packet count after each second elapses. If the number of | |
1865 | * packets ever exceeds the ampdu_min_traffic threshold, we will allow | |
1866 | * an ampdu stream to be started. | |
1867 | */ | |
1868 | if (jiffies - tx_stats->start_time > HZ) { | |
1869 | tx_stats->pkts = 0; | |
1870 | tx_stats->start_time = 0; | |
1871 | } else | |
1872 | tx_stats->pkts++; | |
1873 | } | |
1874 | ||
7fb978b7 YAP |
1875 | /* The hardware ampdu queues start from 5. |
1876 | * txpriorities for ampdu queues are | |
1877 | * 5 6 7 0 1 2 3 4 ie., queue 5 is highest | |
1878 | * and queue 3 is lowest (queue 4 is reserved) | |
1879 | */ | |
1880 | #define BA_QUEUE 5 | |
1881 | ||
7bb45683 | 1882 | static void |
36323f81 TH |
1883 | mwl8k_txq_xmit(struct ieee80211_hw *hw, |
1884 | int index, | |
1885 | struct ieee80211_sta *sta, | |
1886 | struct sk_buff *skb) | |
a66098da LB |
1887 | { |
1888 | struct mwl8k_priv *priv = hw->priv; | |
1889 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1890 | struct mwl8k_vif *mwl8k_vif; |
a66098da LB |
1891 | struct ieee80211_hdr *wh; |
1892 | struct mwl8k_tx_queue *txq; | |
1893 | struct mwl8k_tx_desc *tx; | |
a66098da | 1894 | dma_addr_t dma; |
23b33906 LB |
1895 | u32 txstatus; |
1896 | u8 txdatarate; | |
1897 | u16 qos; | |
65f3ddcd NS |
1898 | int txpriority; |
1899 | u8 tid = 0; | |
1900 | struct mwl8k_ampdu_stream *stream = NULL; | |
1901 | bool start_ba_session = false; | |
3a769888 | 1902 | bool mgmtframe = false; |
a0e7c6cf | 1903 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
e1f4d69b | 1904 | bool eapol_frame = false; |
a66098da | 1905 | |
23b33906 LB |
1906 | wh = (struct ieee80211_hdr *)skb->data; |
1907 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1908 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1909 | else | |
1910 | qos = 0; | |
a66098da | 1911 | |
e1f4d69b NS |
1912 | if (skb->protocol == cpu_to_be16(ETH_P_PAE)) |
1913 | eapol_frame = true; | |
1914 | ||
3a769888 NS |
1915 | if (ieee80211_is_mgmt(wh->frame_control)) |
1916 | mgmtframe = true; | |
1917 | ||
d9a07d49 | 1918 | if (priv->ap_fw) |
ff776cec | 1919 | mwl8k_encapsulate_tx_frame(priv, skb); |
d9a07d49 | 1920 | else |
e4eefec7 | 1921 | mwl8k_add_dma_header(priv, skb, 0, 0); |
d9a07d49 | 1922 | |
23b33906 | 1923 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1924 | |
1925 | tx_info = IEEE80211_SKB_CB(skb); | |
1926 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); | |
a66098da LB |
1927 | |
1928 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1929 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1930 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1931 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1932 | } |
1933 | ||
23b33906 LB |
1934 | /* Setup firmware control bit fields for each frame type. */ |
1935 | txstatus = 0; | |
1936 | txdatarate = 0; | |
1937 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1938 | ieee80211_is_ctl(wh->frame_control)) { | |
1939 | txdatarate = 0; | |
e0493a8d | 1940 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1941 | } else if (ieee80211_is_data(wh->frame_control)) { |
1942 | txdatarate = 1; | |
1943 | if (is_multicast_ether_addr(wh->addr1)) | |
1944 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1945 | ||
e0493a8d | 1946 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1947 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1948 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1949 | else |
e0493a8d | 1950 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1951 | } |
a66098da | 1952 | |
a0e7c6cf NS |
1953 | /* Queue ADDBA request in the respective data queue. While setting up |
1954 | * the ampdu stream, mac80211 queues further packets for that | |
1955 | * particular ra/tid pair. However, packets piled up in the hardware | |
1956 | * for that ra/tid pair will still go out. ADDBA request and the | |
1957 | * related data packets going out from different queues asynchronously | |
1958 | * will cause a shift in the receiver window which might result in | |
1959 | * ampdu packets getting dropped at the receiver after the stream has | |
1960 | * been setup. | |
1961 | */ | |
1962 | if (unlikely(ieee80211_is_action(wh->frame_control) && | |
1963 | mgmt->u.action.category == WLAN_CATEGORY_BACK && | |
1964 | mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ && | |
1965 | priv->ap_fw)) { | |
1966 | u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); | |
1967 | tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2; | |
1968 | index = mwl8k_tid_queue_mapping(tid); | |
1969 | } | |
1970 | ||
65f3ddcd NS |
1971 | txpriority = index; |
1972 | ||
e1f4d69b NS |
1973 | if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame && |
1974 | ieee80211_is_data_qos(wh->frame_control)) { | |
65f3ddcd | 1975 | tid = qos & 0xf; |
d0805c1c | 1976 | mwl8k_tx_count_packet(sta, tid); |
65f3ddcd NS |
1977 | spin_lock(&priv->stream_lock); |
1978 | stream = mwl8k_lookup_stream(hw, sta->addr, tid); | |
1979 | if (stream != NULL) { | |
1980 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
5f2a1494 | 1981 | WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK)); |
7fb978b7 YAP |
1982 | txpriority = (BA_QUEUE + stream->idx) % |
1983 | TOTAL_HW_TX_QUEUES; | |
1984 | if (stream->idx <= 1) | |
1985 | index = stream->idx + | |
1986 | MWL8K_TX_WMM_QUEUES; | |
1987 | ||
65f3ddcd NS |
1988 | } else if (stream->state == AMPDU_STREAM_NEW) { |
1989 | /* We get here if the driver sends us packets | |
1990 | * after we've initiated a stream, but before | |
1991 | * our ampdu_action routine has been called | |
1992 | * with IEEE80211_AMPDU_TX_START to get the SSN | |
1993 | * for the ADDBA request. So this packet can | |
1994 | * go out with no risk of sequence number | |
1995 | * mismatch. No special handling is required. | |
1996 | */ | |
1997 | } else { | |
1998 | /* Drop packets that would go out after the | |
1999 | * ADDBA request was sent but before the ADDBA | |
2000 | * response is received. If we don't do this, | |
2001 | * the recipient would probably receive it | |
2002 | * after the ADDBA request with SSN 0. This | |
2003 | * will cause the recipient's BA receive window | |
2004 | * to shift, which would cause the subsequent | |
2005 | * packets in the BA stream to be discarded. | |
2006 | * mac80211 queues our packets for us in this | |
2007 | * case, so this is really just a safety check. | |
2008 | */ | |
2009 | wiphy_warn(hw->wiphy, | |
2010 | "Cannot send packet while ADDBA " | |
2011 | "dialog is underway.\n"); | |
2012 | spin_unlock(&priv->stream_lock); | |
2013 | dev_kfree_skb(skb); | |
2014 | return; | |
2015 | } | |
2016 | } else { | |
2017 | /* Defer calling mwl8k_start_stream so that the current | |
2018 | * skb can go out before the ADDBA request. This | |
2019 | * prevents sequence number mismatch at the recepient | |
2020 | * as described above. | |
2021 | */ | |
d0805c1c | 2022 | if (mwl8k_ampdu_allowed(sta, tid)) { |
17033543 NS |
2023 | stream = mwl8k_add_stream(hw, sta, tid); |
2024 | if (stream != NULL) | |
2025 | start_ba_session = true; | |
2026 | } | |
65f3ddcd NS |
2027 | } |
2028 | spin_unlock(&priv->stream_lock); | |
5f2a1494 YAP |
2029 | } else { |
2030 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; | |
2031 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; | |
65f3ddcd NS |
2032 | } |
2033 | ||
a66098da LB |
2034 | dma = pci_map_single(priv->pdev, skb->data, |
2035 | skb->len, PCI_DMA_TODEVICE); | |
2036 | ||
2037 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
2038 | wiphy_debug(hw->wiphy, |
2039 | "failed to dma map skb, dropping TX frame.\n"); | |
65f3ddcd NS |
2040 | if (start_ba_session) { |
2041 | spin_lock(&priv->stream_lock); | |
2042 | mwl8k_remove_stream(hw, stream); | |
2043 | spin_unlock(&priv->stream_lock); | |
2044 | } | |
23b33906 | 2045 | dev_kfree_skb(skb); |
7bb45683 | 2046 | return; |
a66098da LB |
2047 | } |
2048 | ||
23b33906 | 2049 | spin_lock_bh(&priv->tx_lock); |
a66098da | 2050 | |
23b33906 | 2051 | txq = priv->txq + index; |
a66098da | 2052 | |
3a769888 NS |
2053 | /* Mgmt frames that go out frequently are probe |
2054 | * responses. Other mgmt frames got out relatively | |
2055 | * infrequently. Hence reserve 2 buffers so that | |
2056 | * other mgmt frames do not get dropped due to an | |
2057 | * already queued probe response in one of the | |
2058 | * reserved buffers. | |
2059 | */ | |
2060 | ||
2061 | if (txq->len >= MWL8K_TX_DESCS - 2) { | |
23677ce3 | 2062 | if (!mgmtframe || txq->len == MWL8K_TX_DESCS) { |
3a769888 NS |
2063 | if (start_ba_session) { |
2064 | spin_lock(&priv->stream_lock); | |
2065 | mwl8k_remove_stream(hw, stream); | |
2066 | spin_unlock(&priv->stream_lock); | |
2067 | } | |
bbf71a8f | 2068 | mwl8k_tx_start(priv); |
3a769888 | 2069 | spin_unlock_bh(&priv->tx_lock); |
ff7aa96f NS |
2070 | pci_unmap_single(priv->pdev, dma, skb->len, |
2071 | PCI_DMA_TODEVICE); | |
3a769888 NS |
2072 | dev_kfree_skb(skb); |
2073 | return; | |
3a7dbc3b | 2074 | } |
65f3ddcd NS |
2075 | } |
2076 | ||
45eb400d LB |
2077 | BUG_ON(txq->skb[txq->tail] != NULL); |
2078 | txq->skb[txq->tail] = skb; | |
a66098da | 2079 | |
45eb400d | 2080 | tx = txq->txd + txq->tail; |
23b33906 | 2081 | tx->data_rate = txdatarate; |
65f3ddcd | 2082 | tx->tx_priority = txpriority; |
a66098da | 2083 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
2084 | tx->pkt_phys_addr = cpu_to_le32(dma); |
2085 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 2086 | tx->rate_info = 0; |
36323f81 TH |
2087 | if (!priv->ap_fw && sta != NULL) |
2088 | tx->peer_id = MWL8K_STA(sta)->peer_id; | |
a680400e LB |
2089 | else |
2090 | tx->peer_id = 0; | |
566875db | 2091 | |
e1f4d69b | 2092 | if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame) |
566875db PN |
2093 | tx->timestamp = cpu_to_le32(ioread32(priv->regs + |
2094 | MWL8K_HW_TIMER_REGISTER)); | |
b8d9e572 NS |
2095 | else |
2096 | tx->timestamp = 0; | |
566875db | 2097 | |
a66098da | 2098 | wmb(); |
23b33906 LB |
2099 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
2100 | ||
8ccbc3b8 | 2101 | txq->len++; |
a66098da | 2102 | priv->pending_tx_pkts++; |
a66098da | 2103 | |
45eb400d LB |
2104 | txq->tail++; |
2105 | if (txq->tail == MWL8K_TX_DESCS) | |
2106 | txq->tail = 0; | |
23b33906 | 2107 | |
23b33906 | 2108 | mwl8k_tx_start(priv); |
a66098da LB |
2109 | |
2110 | spin_unlock_bh(&priv->tx_lock); | |
65f3ddcd NS |
2111 | |
2112 | /* Initiate the ampdu session here */ | |
2113 | if (start_ba_session) { | |
2114 | spin_lock(&priv->stream_lock); | |
2115 | if (mwl8k_start_stream(hw, stream)) | |
2116 | mwl8k_remove_stream(hw, stream); | |
2117 | spin_unlock(&priv->stream_lock); | |
2118 | } | |
a66098da LB |
2119 | } |
2120 | ||
2121 | ||
618952a7 LB |
2122 | /* |
2123 | * Firmware access. | |
2124 | * | |
2125 | * We have the following requirements for issuing firmware commands: | |
2126 | * - Some commands require that the packet transmit path is idle when | |
2127 | * the command is issued. (For simplicity, we'll just quiesce the | |
2128 | * transmit path for every command.) | |
2129 | * - There are certain sequences of commands that need to be issued to | |
2130 | * the hardware sequentially, with no other intervening commands. | |
2131 | * | |
2132 | * This leads to an implementation of a "firmware lock" as a mutex that | |
2133 | * can be taken recursively, and which is taken by both the low-level | |
2134 | * command submission function (mwl8k_post_cmd) as well as any users of | |
2135 | * that function that require issuing of an atomic sequence of commands, | |
2136 | * and quiesces the transmit path whenever it's taken. | |
2137 | */ | |
2138 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
2139 | { | |
2140 | struct mwl8k_priv *priv = hw->priv; | |
2141 | ||
2142 | if (priv->fw_mutex_owner != current) { | |
2143 | int rc; | |
2144 | ||
2145 | mutex_lock(&priv->fw_mutex); | |
2146 | ieee80211_stop_queues(hw); | |
2147 | ||
2148 | rc = mwl8k_tx_wait_empty(hw); | |
2149 | if (rc) { | |
6b6accc3 YAP |
2150 | if (!priv->hw_restart_in_progress) |
2151 | ieee80211_wake_queues(hw); | |
2152 | ||
618952a7 LB |
2153 | mutex_unlock(&priv->fw_mutex); |
2154 | ||
2155 | return rc; | |
2156 | } | |
2157 | ||
2158 | priv->fw_mutex_owner = current; | |
2159 | } | |
2160 | ||
2161 | priv->fw_mutex_depth++; | |
2162 | ||
2163 | return 0; | |
2164 | } | |
2165 | ||
2166 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
2167 | { | |
2168 | struct mwl8k_priv *priv = hw->priv; | |
2169 | ||
2170 | if (!--priv->fw_mutex_depth) { | |
6b6accc3 YAP |
2171 | if (!priv->hw_restart_in_progress) |
2172 | ieee80211_wake_queues(hw); | |
2173 | ||
618952a7 LB |
2174 | priv->fw_mutex_owner = NULL; |
2175 | mutex_unlock(&priv->fw_mutex); | |
2176 | } | |
2177 | } | |
2178 | ||
e882efc9 YAP |
2179 | static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, |
2180 | u32 bitmap); | |
618952a7 | 2181 | |
a66098da LB |
2182 | /* |
2183 | * Command processing. | |
2184 | */ | |
2185 | ||
0c9cc640 LB |
2186 | /* Timeout firmware commands after 10s */ |
2187 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
2188 | |
2189 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
2190 | { | |
2191 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
2192 | struct mwl8k_priv *priv = hw->priv; | |
2193 | void __iomem *regs = priv->regs; | |
2194 | dma_addr_t dma_addr; | |
2195 | unsigned int dma_size; | |
2196 | int rc; | |
a66098da LB |
2197 | unsigned long timeout = 0; |
2198 | u8 buf[32]; | |
e882efc9 YAP |
2199 | u32 bitmap = 0; |
2200 | ||
2201 | wiphy_dbg(hw->wiphy, "Posting %s [%d]\n", | |
2202 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), cmd->macid); | |
2203 | ||
2204 | /* Before posting firmware commands that could change the hardware | |
2205 | * characteristics, make sure that all BSSes are stopped temporary. | |
2206 | * Enable these stopped BSSes after completion of the commands | |
2207 | */ | |
2208 | ||
2209 | rc = mwl8k_fw_lock(hw); | |
2210 | if (rc) | |
2211 | return rc; | |
2212 | ||
2213 | if (priv->ap_fw && priv->running_bsses) { | |
2214 | switch (le16_to_cpu(cmd->code)) { | |
2215 | case MWL8K_CMD_SET_RF_CHANNEL: | |
2216 | case MWL8K_CMD_RADIO_CONTROL: | |
2217 | case MWL8K_CMD_RF_TX_POWER: | |
2218 | case MWL8K_CMD_TX_POWER: | |
2219 | case MWL8K_CMD_RF_ANTENNA: | |
2220 | case MWL8K_CMD_RTS_THRESHOLD: | |
2221 | case MWL8K_CMD_MIMO_CONFIG: | |
2222 | bitmap = priv->running_bsses; | |
2223 | mwl8k_enable_bsses(hw, false, bitmap); | |
2224 | break; | |
2225 | } | |
2226 | } | |
a66098da | 2227 | |
b603742f | 2228 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
2229 | dma_size = le16_to_cpu(cmd->length); |
2230 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
2231 | PCI_DMA_BIDIRECTIONAL); | |
2232 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
2233 | return -ENOMEM; | |
2234 | ||
a66098da LB |
2235 | priv->hostcmd_wait = &cmd_wait; |
2236 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
2237 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
2238 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
2239 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
2240 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
2241 | |
2242 | timeout = wait_for_completion_timeout(&cmd_wait, | |
2243 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
2244 | ||
618952a7 LB |
2245 | priv->hostcmd_wait = NULL; |
2246 | ||
618952a7 | 2247 | |
37055bd4 LB |
2248 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
2249 | PCI_DMA_BIDIRECTIONAL); | |
2250 | ||
a66098da | 2251 | if (!timeout) { |
5db55844 | 2252 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
2253 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2254 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
2255 | rc = -ETIMEDOUT; |
2256 | } else { | |
0c9cc640 LB |
2257 | int ms; |
2258 | ||
2259 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
2260 | ||
ce9e2e1b | 2261 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 2262 | if (rc) |
5db55844 | 2263 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
2264 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2265 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 2266 | else if (ms > 2000) |
5db55844 | 2267 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
2268 | mwl8k_cmd_name(cmd->code, |
2269 | buf, sizeof(buf)), | |
2270 | ms); | |
a66098da LB |
2271 | } |
2272 | ||
e882efc9 YAP |
2273 | if (bitmap) |
2274 | mwl8k_enable_bsses(hw, true, bitmap); | |
2275 | ||
2276 | mwl8k_fw_unlock(hw); | |
2277 | ||
a66098da LB |
2278 | return rc; |
2279 | } | |
2280 | ||
f57ca9c1 LB |
2281 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
2282 | struct ieee80211_vif *vif, | |
2283 | struct mwl8k_cmd_pkt *cmd) | |
2284 | { | |
2285 | if (vif != NULL) | |
2286 | cmd->macid = MWL8K_VIF(vif)->macid; | |
2287 | return mwl8k_post_cmd(hw, cmd); | |
2288 | } | |
2289 | ||
1349ad2f LB |
2290 | /* |
2291 | * Setup code shared between STA and AP firmware images. | |
2292 | */ | |
2293 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
2294 | { | |
2295 | struct mwl8k_priv *priv = hw->priv; | |
2296 | ||
2297 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
2298 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
2299 | ||
2300 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
2301 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
2302 | ||
57fbcce3 | 2303 | priv->band_24.band = NL80211_BAND_2GHZ; |
1349ad2f LB |
2304 | priv->band_24.channels = priv->channels_24; |
2305 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
2306 | priv->band_24.bitrates = priv->rates_24; | |
2307 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
2308 | ||
57fbcce3 | 2309 | hw->wiphy->bands[NL80211_BAND_2GHZ] = &priv->band_24; |
1349ad2f LB |
2310 | } |
2311 | ||
4eae9edd LB |
2312 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
2313 | { | |
2314 | struct mwl8k_priv *priv = hw->priv; | |
2315 | ||
2316 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
2317 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
2318 | ||
2319 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
2320 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
2321 | ||
57fbcce3 | 2322 | priv->band_50.band = NL80211_BAND_5GHZ; |
4eae9edd LB |
2323 | priv->band_50.channels = priv->channels_50; |
2324 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
2325 | priv->band_50.bitrates = priv->rates_50; | |
2326 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
2327 | ||
57fbcce3 | 2328 | hw->wiphy->bands[NL80211_BAND_5GHZ] = &priv->band_50; |
4eae9edd LB |
2329 | } |
2330 | ||
a66098da | 2331 | /* |
04b147b1 | 2332 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 2333 | */ |
04b147b1 | 2334 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
2335 | struct mwl8k_cmd_pkt header; |
2336 | __u8 hw_rev; | |
2337 | __u8 host_interface; | |
2338 | __le16 num_mcaddrs; | |
d89173f2 | 2339 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
2340 | __le16 region_code; |
2341 | __le32 fw_rev; | |
2342 | __le32 ps_cookie; | |
2343 | __le32 caps; | |
2344 | __u8 mcs_bitmap[16]; | |
2345 | __le32 rx_queue_ptr; | |
2346 | __le32 num_tx_queues; | |
e600707b | 2347 | __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES]; |
a66098da LB |
2348 | __le32 caps2; |
2349 | __le32 num_tx_desc_per_queue; | |
45eb400d | 2350 | __le32 total_rxd; |
ba2d3587 | 2351 | } __packed; |
a66098da | 2352 | |
341c9791 LB |
2353 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
2354 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
2355 | #define MWL8K_CAP_AMPDU 0x04000000 | |
2356 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
2357 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
2358 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
2359 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
2360 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
2361 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
2362 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
2363 | #define MWL8K_CAP_MIMO 0x00000200 | |
2364 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
2365 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
2366 | #define MWL8K_CAP_5GHZ 0x00000004 | |
2367 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 2368 | |
06953235 LB |
2369 | static void |
2370 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
2371 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 2372 | { |
341c9791 LB |
2373 | int rx_streams; |
2374 | int tx_streams; | |
2375 | ||
777ad375 | 2376 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
2377 | |
2378 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 2379 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 2380 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 2381 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 | 2382 | if (cap & MWL8K_CAP_AMPDU) { |
30686bf7 | 2383 | ieee80211_hw_set(hw, AMPDU_AGGREGATION); |
777ad375 LB |
2384 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
2385 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
2386 | } |
2387 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 2388 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 2389 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 2390 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 2391 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 2392 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 2393 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 2394 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 2395 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 2396 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 2397 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 2398 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
2399 | |
2400 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
2401 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
2402 | ||
777ad375 | 2403 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 2404 | if (rx_streams >= 2) |
777ad375 | 2405 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 2406 | if (rx_streams >= 3) |
777ad375 LB |
2407 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
2408 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
2409 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
2410 | |
2411 | if (rx_streams != tx_streams) { | |
777ad375 LB |
2412 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
2413 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
2414 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
2415 | } | |
2416 | } | |
2417 | ||
06953235 LB |
2418 | static void |
2419 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
2420 | { | |
2421 | struct mwl8k_priv *priv = hw->priv; | |
2422 | ||
c3f251a3 JG |
2423 | if (priv->caps) |
2424 | return; | |
2425 | ||
06953235 LB |
2426 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { |
2427 | mwl8k_setup_2ghz_band(hw); | |
2428 | if (caps & MWL8K_CAP_MIMO) | |
2429 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
2430 | } | |
2431 | ||
2432 | if (caps & MWL8K_CAP_5GHZ) { | |
2433 | mwl8k_setup_5ghz_band(hw); | |
2434 | if (caps & MWL8K_CAP_MIMO) | |
2435 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
2436 | } | |
c3f251a3 JG |
2437 | |
2438 | priv->caps = caps; | |
06953235 LB |
2439 | } |
2440 | ||
04b147b1 | 2441 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
2442 | { |
2443 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 2444 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
2445 | int rc; |
2446 | int i; | |
2447 | ||
2448 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2449 | if (cmd == NULL) | |
2450 | return -ENOMEM; | |
2451 | ||
2452 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2453 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2454 | ||
2455 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2456 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 2457 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
e600707b BC |
2458 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
2459 | for (i = 0; i < mwl8k_tx_queues(priv); i++) | |
45eb400d | 2460 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 2461 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 2462 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
2463 | |
2464 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2465 | ||
2466 | if (!rc) { | |
2467 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
2468 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 2469 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 2470 | priv->hw_rev = cmd->hw_rev; |
06953235 | 2471 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2472 | priv->ap_macids_supported = 0x00000000; |
2473 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
2474 | } |
2475 | ||
2476 | kfree(cmd); | |
2477 | return rc; | |
2478 | } | |
2479 | ||
42fba21d LB |
2480 | /* |
2481 | * CMD_GET_HW_SPEC (AP version). | |
2482 | */ | |
2483 | struct mwl8k_cmd_get_hw_spec_ap { | |
2484 | struct mwl8k_cmd_pkt header; | |
2485 | __u8 hw_rev; | |
2486 | __u8 host_interface; | |
2487 | __le16 num_wcb; | |
2488 | __le16 num_mcaddrs; | |
2489 | __u8 perm_addr[ETH_ALEN]; | |
2490 | __le16 region_code; | |
2491 | __le16 num_antenna; | |
2492 | __le32 fw_rev; | |
2493 | __le32 wcbbase0; | |
2494 | __le32 rxwrptr; | |
2495 | __le32 rxrdptr; | |
2496 | __le32 ps_cookie; | |
2497 | __le32 wcbbase1; | |
2498 | __le32 wcbbase2; | |
2499 | __le32 wcbbase3; | |
952a0e96 | 2500 | __le32 fw_api_version; |
8a7a578c BC |
2501 | __le32 caps; |
2502 | __le32 num_of_ampdu_queues; | |
2503 | __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
ba2d3587 | 2504 | } __packed; |
42fba21d LB |
2505 | |
2506 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2507 | { | |
2508 | struct mwl8k_priv *priv = hw->priv; | |
2509 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
8a7a578c | 2510 | int rc, i; |
952a0e96 | 2511 | u32 api_version; |
42fba21d LB |
2512 | |
2513 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2514 | if (cmd == NULL) | |
2515 | return -ENOMEM; | |
2516 | ||
2517 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2518 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2519 | ||
2520 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2521 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2522 | ||
2523 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2524 | ||
2525 | if (!rc) { | |
2526 | int off; | |
2527 | ||
952a0e96 BC |
2528 | api_version = le32_to_cpu(cmd->fw_api_version); |
2529 | if (priv->device_info->fw_api_ap != api_version) { | |
2530 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2531 | " Expected %d got %d.\n", MWL8K_NAME, | |
2532 | priv->device_info->part_name, | |
2533 | priv->device_info->fw_api_ap, | |
2534 | api_version); | |
2535 | rc = -EINVAL; | |
2536 | goto done; | |
2537 | } | |
42fba21d LB |
2538 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2539 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2540 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2541 | priv->hw_rev = cmd->hw_rev; | |
8a7a578c | 2542 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 | 2543 | priv->ap_macids_supported = 0x000000ff; |
d59c1cfd | 2544 | priv->sta_macids_supported = 0x00000100; |
8a7a578c BC |
2545 | priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues); |
2546 | if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) { | |
2547 | wiphy_warn(hw->wiphy, "fw reported %d ampdu queues" | |
2548 | " but we only support %d.\n", | |
2549 | priv->num_ampdu_queues, | |
2550 | MWL8K_MAX_AMPDU_QUEUES); | |
2551 | priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES; | |
2552 | } | |
42fba21d | 2553 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; |
b603742f | 2554 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2555 | |
2556 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2557 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d | 2558 | |
73b46320 BC |
2559 | priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff; |
2560 | priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
2561 | priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
2562 | priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
8a7a578c BC |
2563 | |
2564 | for (i = 0; i < priv->num_ampdu_queues; i++) | |
e600707b | 2565 | priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] = |
8a7a578c | 2566 | le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff; |
42fba21d LB |
2567 | } |
2568 | ||
952a0e96 | 2569 | done: |
42fba21d LB |
2570 | kfree(cmd); |
2571 | return rc; | |
2572 | } | |
2573 | ||
2574 | /* | |
2575 | * CMD_SET_HW_SPEC. | |
2576 | */ | |
2577 | struct mwl8k_cmd_set_hw_spec { | |
2578 | struct mwl8k_cmd_pkt header; | |
2579 | __u8 hw_rev; | |
2580 | __u8 host_interface; | |
2581 | __le16 num_mcaddrs; | |
2582 | __u8 perm_addr[ETH_ALEN]; | |
2583 | __le16 region_code; | |
2584 | __le32 fw_rev; | |
2585 | __le32 ps_cookie; | |
2586 | __le32 caps; | |
2587 | __le32 rx_queue_ptr; | |
2588 | __le32 num_tx_queues; | |
e600707b | 2589 | __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES]; |
42fba21d LB |
2590 | __le32 flags; |
2591 | __le32 num_tx_desc_per_queue; | |
2592 | __le32 total_rxd; | |
ba2d3587 | 2593 | } __packed; |
42fba21d | 2594 | |
8a7a578c BC |
2595 | /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause |
2596 | * packets to expire 500 ms after the timestamp in the tx descriptor. That is, | |
2597 | * the packets that are queued for more than 500ms, will be dropped in the | |
2598 | * hardware. This helps minimizing the issues caused due to head-of-line | |
2599 | * blocking where a slow client can hog the bandwidth and affect traffic to a | |
2600 | * faster client. | |
2601 | */ | |
2602 | #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400 | |
3373b28e | 2603 | #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200 |
b64fe619 LB |
2604 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2605 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2606 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2607 | |
2608 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2609 | { | |
2610 | struct mwl8k_priv *priv = hw->priv; | |
2611 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2612 | int rc; | |
2613 | int i; | |
2614 | ||
2615 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2616 | if (cmd == NULL) | |
2617 | return -ENOMEM; | |
2618 | ||
2619 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2620 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2621 | ||
2622 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2623 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
e600707b | 2624 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
85c9205c NS |
2625 | |
2626 | /* | |
2627 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2628 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2629 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2630 | * priority is interpreted the right way in firmware. | |
2631 | */ | |
e600707b BC |
2632 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
2633 | int j = mwl8k_tx_queues(priv) - 1 - i; | |
85c9205c NS |
2634 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); |
2635 | } | |
2636 | ||
b64fe619 LB |
2637 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2638 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
31d291a7 | 2639 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON | |
3373b28e NS |
2640 | MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY | |
2641 | MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR); | |
42fba21d LB |
2642 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2643 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2644 | ||
2645 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2646 | kfree(cmd); | |
2647 | ||
2648 | return rc; | |
2649 | } | |
2650 | ||
a66098da LB |
2651 | /* |
2652 | * CMD_MAC_MULTICAST_ADR. | |
2653 | */ | |
2654 | struct mwl8k_cmd_mac_multicast_adr { | |
2655 | struct mwl8k_cmd_pkt header; | |
2656 | __le16 action; | |
2657 | __le16 numaddr; | |
ce9e2e1b | 2658 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2659 | }; |
2660 | ||
d5e30845 LB |
2661 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2662 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2663 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2664 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2665 | |
e81cd2d6 | 2666 | static struct mwl8k_cmd_pkt * |
447ced07 | 2667 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2668 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2669 | { |
e81cd2d6 | 2670 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2671 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2672 | int size; |
22bedad3 JP |
2673 | int mc_count = 0; |
2674 | ||
2675 | if (mc_list) | |
2676 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2677 | |
447ced07 | 2678 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2679 | allmulti = 1; |
2680 | mc_count = 0; | |
2681 | } | |
e81cd2d6 LB |
2682 | |
2683 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2684 | |
e81cd2d6 | 2685 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2686 | if (cmd == NULL) |
e81cd2d6 | 2687 | return NULL; |
a66098da LB |
2688 | |
2689 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2690 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2691 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2692 | MWL8K_ENABLE_RX_BROADCAST); | |
2693 | ||
2694 | if (allmulti) { | |
2695 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2696 | } else if (mc_count) { | |
22bedad3 JP |
2697 | struct netdev_hw_addr *ha; |
2698 | int i = 0; | |
d5e30845 LB |
2699 | |
2700 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2701 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2702 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2703 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2704 | } |
a66098da LB |
2705 | } |
2706 | ||
e81cd2d6 | 2707 | return &cmd->header; |
a66098da LB |
2708 | } |
2709 | ||
2710 | /* | |
55489b6e | 2711 | * CMD_GET_STAT. |
a66098da | 2712 | */ |
55489b6e | 2713 | struct mwl8k_cmd_get_stat { |
a66098da | 2714 | struct mwl8k_cmd_pkt header; |
a66098da | 2715 | __le32 stats[64]; |
ba2d3587 | 2716 | } __packed; |
a66098da LB |
2717 | |
2718 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2719 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2720 | #define MWL8K_STAT_FCS_ERROR 24 | |
2721 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2722 | ||
55489b6e LB |
2723 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2724 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2725 | { |
55489b6e | 2726 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2727 | int rc; |
2728 | ||
2729 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2730 | if (cmd == NULL) | |
2731 | return -ENOMEM; | |
2732 | ||
2733 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2734 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2735 | |
2736 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2737 | if (!rc) { | |
2738 | stats->dot11ACKFailureCount = | |
2739 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2740 | stats->dot11RTSFailureCount = | |
2741 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2742 | stats->dot11FCSErrorCount = | |
2743 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2744 | stats->dot11RTSSuccessCount = | |
2745 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2746 | } | |
2747 | kfree(cmd); | |
2748 | ||
2749 | return rc; | |
2750 | } | |
2751 | ||
2752 | /* | |
55489b6e | 2753 | * CMD_RADIO_CONTROL. |
a66098da | 2754 | */ |
55489b6e | 2755 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2756 | struct mwl8k_cmd_pkt header; |
2757 | __le16 action; | |
2758 | __le16 control; | |
2759 | __le16 radio_on; | |
ba2d3587 | 2760 | } __packed; |
a66098da | 2761 | |
c46563b7 | 2762 | static int |
55489b6e | 2763 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2764 | { |
2765 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2766 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2767 | int rc; |
2768 | ||
c46563b7 | 2769 | if (enable == priv->radio_on && !force) |
a66098da LB |
2770 | return 0; |
2771 | ||
a66098da LB |
2772 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2773 | if (cmd == NULL) | |
2774 | return -ENOMEM; | |
2775 | ||
2776 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2777 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2778 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2779 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2780 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2781 | ||
2782 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2783 | kfree(cmd); | |
2784 | ||
2785 | if (!rc) | |
c46563b7 | 2786 | priv->radio_on = enable; |
a66098da LB |
2787 | |
2788 | return rc; | |
2789 | } | |
2790 | ||
55489b6e | 2791 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2792 | { |
55489b6e | 2793 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2794 | } |
2795 | ||
55489b6e | 2796 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2797 | { |
55489b6e | 2798 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2799 | } |
2800 | ||
a66098da LB |
2801 | static int |
2802 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2803 | { | |
99200a99 | 2804 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2805 | |
68ce3884 | 2806 | priv->radio_short_preamble = short_preamble; |
a66098da | 2807 | |
55489b6e | 2808 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2809 | } |
2810 | ||
2811 | /* | |
55489b6e | 2812 | * CMD_RF_TX_POWER. |
a66098da | 2813 | */ |
41fdf097 | 2814 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2815 | |
55489b6e | 2816 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2817 | struct mwl8k_cmd_pkt header; |
2818 | __le16 action; | |
2819 | __le16 support_level; | |
2820 | __le16 current_level; | |
2821 | __le16 reserved; | |
41fdf097 | 2822 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2823 | } __packed; |
a66098da | 2824 | |
55489b6e | 2825 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2826 | { |
55489b6e | 2827 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2828 | int rc; |
2829 | ||
2830 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2831 | if (cmd == NULL) | |
2832 | return -ENOMEM; | |
2833 | ||
2834 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2835 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2836 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2837 | cmd->support_level = cpu_to_le16(dBm); | |
2838 | ||
2839 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2840 | kfree(cmd); | |
2841 | ||
2842 | return rc; | |
2843 | } | |
2844 | ||
41fdf097 NS |
2845 | /* |
2846 | * CMD_TX_POWER. | |
2847 | */ | |
2848 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2849 | ||
2850 | struct mwl8k_cmd_tx_power { | |
2851 | struct mwl8k_cmd_pkt header; | |
2852 | __le16 action; | |
2853 | __le16 band; | |
2854 | __le16 channel; | |
2855 | __le16 bw; | |
2856 | __le16 sub_ch; | |
2857 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
ba30c4a5 | 2858 | } __packed; |
41fdf097 NS |
2859 | |
2860 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2861 | struct ieee80211_conf *conf, | |
2862 | unsigned short pwr) | |
2863 | { | |
675a0b04 KB |
2864 | struct ieee80211_channel *channel = conf->chandef.chan; |
2865 | enum nl80211_channel_type channel_type = | |
2866 | cfg80211_get_chandef_type(&conf->chandef); | |
41fdf097 NS |
2867 | struct mwl8k_cmd_tx_power *cmd; |
2868 | int rc; | |
2869 | int i; | |
2870 | ||
2871 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2872 | if (cmd == NULL) | |
2873 | return -ENOMEM; | |
2874 | ||
2875 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2876 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2877 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2878 | ||
57fbcce3 | 2879 | if (channel->band == NL80211_BAND_2GHZ) |
41fdf097 | 2880 | cmd->band = cpu_to_le16(0x1); |
57fbcce3 | 2881 | else if (channel->band == NL80211_BAND_5GHZ) |
41fdf097 NS |
2882 | cmd->band = cpu_to_le16(0x4); |
2883 | ||
604c4ef1 | 2884 | cmd->channel = cpu_to_le16(channel->hw_value); |
41fdf097 | 2885 | |
675a0b04 KB |
2886 | if (channel_type == NL80211_CHAN_NO_HT || |
2887 | channel_type == NL80211_CHAN_HT20) { | |
41fdf097 NS |
2888 | cmd->bw = cpu_to_le16(0x2); |
2889 | } else { | |
2890 | cmd->bw = cpu_to_le16(0x4); | |
675a0b04 | 2891 | if (channel_type == NL80211_CHAN_HT40MINUS) |
41fdf097 | 2892 | cmd->sub_ch = cpu_to_le16(0x3); |
675a0b04 | 2893 | else if (channel_type == NL80211_CHAN_HT40PLUS) |
41fdf097 NS |
2894 | cmd->sub_ch = cpu_to_le16(0x1); |
2895 | } | |
2896 | ||
2897 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2898 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2899 | ||
2900 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2901 | kfree(cmd); | |
2902 | ||
2903 | return rc; | |
2904 | } | |
2905 | ||
08b06347 LB |
2906 | /* |
2907 | * CMD_RF_ANTENNA. | |
2908 | */ | |
2909 | struct mwl8k_cmd_rf_antenna { | |
2910 | struct mwl8k_cmd_pkt header; | |
2911 | __le16 antenna; | |
2912 | __le16 mode; | |
ba2d3587 | 2913 | } __packed; |
08b06347 LB |
2914 | |
2915 | #define MWL8K_RF_ANTENNA_RX 1 | |
2916 | #define MWL8K_RF_ANTENNA_TX 2 | |
2917 | ||
2918 | static int | |
2919 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2920 | { | |
2921 | struct mwl8k_cmd_rf_antenna *cmd; | |
2922 | int rc; | |
2923 | ||
2924 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2925 | if (cmd == NULL) | |
2926 | return -ENOMEM; | |
2927 | ||
2928 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2929 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2930 | cmd->antenna = cpu_to_le16(antenna); | |
2931 | cmd->mode = cpu_to_le16(mask); | |
2932 | ||
2933 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2934 | kfree(cmd); | |
2935 | ||
2936 | return rc; | |
2937 | } | |
2938 | ||
b64fe619 LB |
2939 | /* |
2940 | * CMD_SET_BEACON. | |
2941 | */ | |
2942 | struct mwl8k_cmd_set_beacon { | |
2943 | struct mwl8k_cmd_pkt header; | |
2944 | __le16 beacon_len; | |
2945 | __u8 beacon[0]; | |
2946 | }; | |
2947 | ||
aa21d0f6 LB |
2948 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2949 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2950 | { |
2951 | struct mwl8k_cmd_set_beacon *cmd; | |
2952 | int rc; | |
2953 | ||
2954 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2955 | if (cmd == NULL) | |
2956 | return -ENOMEM; | |
2957 | ||
2958 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2959 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2960 | cmd->beacon_len = cpu_to_le16(len); | |
2961 | memcpy(cmd->beacon, beacon, len); | |
2962 | ||
aa21d0f6 | 2963 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2964 | kfree(cmd); |
2965 | ||
2966 | return rc; | |
2967 | } | |
2968 | ||
a66098da LB |
2969 | /* |
2970 | * CMD_SET_PRE_SCAN. | |
2971 | */ | |
2972 | struct mwl8k_cmd_set_pre_scan { | |
2973 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2974 | } __packed; |
a66098da LB |
2975 | |
2976 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2977 | { | |
2978 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2979 | int rc; | |
2980 | ||
2981 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2982 | if (cmd == NULL) | |
2983 | return -ENOMEM; | |
2984 | ||
2985 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2986 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2987 | ||
2988 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2989 | kfree(cmd); | |
2990 | ||
2991 | return rc; | |
2992 | } | |
2993 | ||
c3015313 YAP |
2994 | /* |
2995 | * CMD_BBP_REG_ACCESS. | |
2996 | */ | |
2997 | struct mwl8k_cmd_bbp_reg_access { | |
2998 | struct mwl8k_cmd_pkt header; | |
2999 | __le16 action; | |
3000 | __le16 offset; | |
3001 | u8 value; | |
3002 | u8 rsrv[3]; | |
3003 | } __packed; | |
3004 | ||
3005 | static int | |
3006 | mwl8k_cmd_bbp_reg_access(struct ieee80211_hw *hw, | |
3007 | u16 action, | |
3008 | u16 offset, | |
3009 | u8 *value) | |
3010 | { | |
3011 | struct mwl8k_cmd_bbp_reg_access *cmd; | |
3012 | int rc; | |
3013 | ||
3014 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3015 | if (cmd == NULL) | |
3016 | return -ENOMEM; | |
3017 | ||
3018 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BBP_REG_ACCESS); | |
3019 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3020 | cmd->action = cpu_to_le16(action); | |
3021 | cmd->offset = cpu_to_le16(offset); | |
3022 | ||
3023 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3024 | ||
3025 | if (!rc) | |
3026 | *value = cmd->value; | |
3027 | else | |
3028 | *value = 0; | |
3029 | ||
3030 | kfree(cmd); | |
3031 | ||
3032 | return rc; | |
3033 | } | |
3034 | ||
a66098da LB |
3035 | /* |
3036 | * CMD_SET_POST_SCAN. | |
3037 | */ | |
3038 | struct mwl8k_cmd_set_post_scan { | |
3039 | struct mwl8k_cmd_pkt header; | |
3040 | __le32 isibss; | |
d89173f2 | 3041 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 3042 | } __packed; |
a66098da LB |
3043 | |
3044 | static int | |
0a11dfc3 | 3045 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
3046 | { |
3047 | struct mwl8k_cmd_set_post_scan *cmd; | |
3048 | int rc; | |
3049 | ||
3050 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3051 | if (cmd == NULL) | |
3052 | return -ENOMEM; | |
3053 | ||
3054 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
3055 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3056 | cmd->isibss = 0; | |
d89173f2 | 3057 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
3058 | |
3059 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3060 | kfree(cmd); | |
3061 | ||
3062 | return rc; | |
3063 | } | |
3064 | ||
031eb464 YAP |
3065 | static int freq_to_idx(struct mwl8k_priv *priv, int freq) |
3066 | { | |
3067 | struct ieee80211_supported_band *sband; | |
3068 | int band, ch, idx = 0; | |
3069 | ||
57fbcce3 | 3070 | for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { |
031eb464 YAP |
3071 | sband = priv->hw->wiphy->bands[band]; |
3072 | if (!sband) | |
3073 | continue; | |
3074 | ||
3075 | for (ch = 0; ch < sband->n_channels; ch++, idx++) | |
3076 | if (sband->channels[ch].center_freq == freq) | |
3077 | goto exit; | |
3078 | } | |
3079 | ||
3080 | exit: | |
3081 | return idx; | |
3082 | } | |
3083 | ||
c7c361ef YAP |
3084 | static void mwl8k_update_survey(struct mwl8k_priv *priv, |
3085 | struct ieee80211_channel *channel) | |
031eb464 YAP |
3086 | { |
3087 | u32 cca_cnt, rx_rdy; | |
3088 | s8 nf = 0, idx; | |
3089 | struct survey_info *survey; | |
3090 | ||
3091 | idx = freq_to_idx(priv, priv->acs_chan->center_freq); | |
3092 | if (idx >= MWL8K_NUM_CHANS) { | |
3093 | wiphy_err(priv->hw->wiphy, "Failed to update survey\n"); | |
3094 | return; | |
3095 | } | |
3096 | ||
3097 | survey = &priv->survey[idx]; | |
3098 | ||
aa0bee1f | 3099 | cca_cnt = ioread32(priv->regs + NOK_CCA_CNT_REG); |
031eb464 | 3100 | cca_cnt /= 1000; /* uSecs to mSecs */ |
4ed20beb | 3101 | survey->time_busy = (u64) cca_cnt; |
031eb464 | 3102 | |
aa0bee1f | 3103 | rx_rdy = ioread32(priv->regs + BBU_RXRDY_CNT_REG); |
031eb464 | 3104 | rx_rdy /= 1000; /* uSecs to mSecs */ |
4ed20beb | 3105 | survey->time_rx = (u64) rx_rdy; |
031eb464 YAP |
3106 | |
3107 | priv->channel_time = jiffies - priv->channel_time; | |
4ed20beb | 3108 | survey->time = jiffies_to_msecs(priv->channel_time); |
031eb464 YAP |
3109 | |
3110 | survey->channel = channel; | |
3111 | ||
3112 | mwl8k_cmd_bbp_reg_access(priv->hw, 0, BBU_AVG_NOISE_VAL, &nf); | |
3113 | ||
3114 | /* Make sure sign is negative else ACS at hostapd fails */ | |
3115 | survey->noise = nf * -1; | |
3116 | ||
3117 | survey->filled = SURVEY_INFO_NOISE_DBM | | |
4ed20beb JB |
3118 | SURVEY_INFO_TIME | |
3119 | SURVEY_INFO_TIME_BUSY | | |
3120 | SURVEY_INFO_TIME_RX; | |
031eb464 YAP |
3121 | } |
3122 | ||
a66098da LB |
3123 | /* |
3124 | * CMD_SET_RF_CHANNEL. | |
3125 | */ | |
3126 | struct mwl8k_cmd_set_rf_channel { | |
3127 | struct mwl8k_cmd_pkt header; | |
3128 | __le16 action; | |
3129 | __u8 current_channel; | |
3130 | __le32 channel_flags; | |
ba2d3587 | 3131 | } __packed; |
a66098da LB |
3132 | |
3133 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 3134 | struct ieee80211_conf *conf) |
a66098da | 3135 | { |
675a0b04 KB |
3136 | struct ieee80211_channel *channel = conf->chandef.chan; |
3137 | enum nl80211_channel_type channel_type = | |
3138 | cfg80211_get_chandef_type(&conf->chandef); | |
a66098da | 3139 | struct mwl8k_cmd_set_rf_channel *cmd; |
031eb464 | 3140 | struct mwl8k_priv *priv = hw->priv; |
a66098da LB |
3141 | int rc; |
3142 | ||
3143 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3144 | if (cmd == NULL) | |
3145 | return -ENOMEM; | |
3146 | ||
3147 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
3148 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3149 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3150 | cmd->current_channel = channel->hw_value; | |
610677d2 | 3151 | |
57fbcce3 | 3152 | if (channel->band == NL80211_BAND_2GHZ) |
610677d2 | 3153 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
57fbcce3 | 3154 | else if (channel->band == NL80211_BAND_5GHZ) |
42574ea2 | 3155 | cmd->channel_flags |= cpu_to_le32(0x00000004); |
610677d2 | 3156 | |
031eb464 YAP |
3157 | if (!priv->sw_scan_start) { |
3158 | if (channel_type == NL80211_CHAN_NO_HT || | |
3159 | channel_type == NL80211_CHAN_HT20) | |
3160 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
3161 | else if (channel_type == NL80211_CHAN_HT40MINUS) | |
3162 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
3163 | else if (channel_type == NL80211_CHAN_HT40PLUS) | |
3164 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
3165 | } else { | |
610677d2 | 3166 | cmd->channel_flags |= cpu_to_le32(0x00000080); |
031eb464 YAP |
3167 | } |
3168 | ||
3169 | if (priv->sw_scan_start) { | |
3170 | /* Store current channel stats | |
3171 | * before switching to newer one. | |
3172 | * This will be processed only for AP fw. | |
3173 | */ | |
3174 | if (priv->channel_time != 0) | |
3175 | mwl8k_update_survey(priv, priv->acs_chan); | |
3176 | ||
3177 | priv->channel_time = jiffies; | |
3178 | priv->acs_chan = channel; | |
3179 | } | |
a66098da LB |
3180 | |
3181 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3182 | kfree(cmd); | |
3183 | ||
3184 | return rc; | |
3185 | } | |
3186 | ||
3187 | /* | |
55489b6e | 3188 | * CMD_SET_AID. |
a66098da | 3189 | */ |
55489b6e LB |
3190 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
3191 | #define MWL8K_FRAME_PROT_11G 0x07 | |
3192 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
3193 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 3194 | |
55489b6e LB |
3195 | struct mwl8k_cmd_update_set_aid { |
3196 | struct mwl8k_cmd_pkt header; | |
3197 | __le16 aid; | |
a66098da | 3198 | |
55489b6e LB |
3199 | /* AP's MAC address (BSSID) */ |
3200 | __u8 bssid[ETH_ALEN]; | |
3201 | __le16 protection_mode; | |
3202 | __u8 supp_rates[14]; | |
ba2d3587 | 3203 | } __packed; |
a66098da | 3204 | |
c6e96010 LB |
3205 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
3206 | { | |
3207 | int i; | |
3208 | int j; | |
3209 | ||
3210 | /* | |
3f524559 | 3211 | * Clear nonstandard rate 4. |
c6e96010 LB |
3212 | */ |
3213 | mask &= 0x1fef; | |
3214 | ||
3f524559 | 3215 | for (i = 0, j = 0; i < 13; i++) { |
c6e96010 | 3216 | if (mask & (1 << i)) |
777ad375 | 3217 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
3218 | } |
3219 | } | |
3220 | ||
55489b6e | 3221 | static int |
c6e96010 LB |
3222 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
3223 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 3224 | { |
55489b6e LB |
3225 | struct mwl8k_cmd_update_set_aid *cmd; |
3226 | u16 prot_mode; | |
a66098da LB |
3227 | int rc; |
3228 | ||
3229 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3230 | if (cmd == NULL) | |
3231 | return -ENOMEM; | |
3232 | ||
55489b6e | 3233 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 3234 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 3235 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 3236 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 3237 | |
7dc6a7a7 | 3238 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
3239 | prot_mode = MWL8K_FRAME_PROT_11G; |
3240 | } else { | |
7dc6a7a7 | 3241 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
3242 | IEEE80211_HT_OP_MODE_PROTECTION) { |
3243 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
3244 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
3245 | break; | |
3246 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
3247 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
3248 | break; | |
3249 | default: | |
3250 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
3251 | break; | |
3252 | } | |
3253 | } | |
3254 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 3255 | |
c6e96010 | 3256 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
3257 | |
3258 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3259 | kfree(cmd); | |
3260 | ||
3261 | return rc; | |
3262 | } | |
3263 | ||
32060e1b | 3264 | /* |
55489b6e | 3265 | * CMD_SET_RATE. |
32060e1b | 3266 | */ |
55489b6e LB |
3267 | struct mwl8k_cmd_set_rate { |
3268 | struct mwl8k_cmd_pkt header; | |
3269 | __u8 legacy_rates[14]; | |
3270 | ||
3271 | /* Bitmap for supported MCS codes. */ | |
3272 | __u8 mcs_set[16]; | |
3273 | __u8 reserved[16]; | |
ba2d3587 | 3274 | } __packed; |
32060e1b | 3275 | |
55489b6e | 3276 | static int |
c6e96010 | 3277 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 3278 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 3279 | { |
55489b6e | 3280 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
3281 | int rc; |
3282 | ||
3283 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3284 | if (cmd == NULL) | |
3285 | return -ENOMEM; | |
3286 | ||
55489b6e | 3287 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 3288 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 3289 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 3290 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
3291 | |
3292 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3293 | kfree(cmd); | |
3294 | ||
3295 | return rc; | |
3296 | } | |
3297 | ||
a66098da | 3298 | /* |
55489b6e | 3299 | * CMD_FINALIZE_JOIN. |
a66098da | 3300 | */ |
55489b6e LB |
3301 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
3302 | ||
3303 | struct mwl8k_cmd_finalize_join { | |
a66098da | 3304 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
3305 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
3306 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 3307 | } __packed; |
a66098da | 3308 | |
55489b6e LB |
3309 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
3310 | int framelen, int dtim) | |
a66098da | 3311 | { |
55489b6e LB |
3312 | struct mwl8k_cmd_finalize_join *cmd; |
3313 | struct ieee80211_mgmt *payload = frame; | |
3314 | int payload_len; | |
a66098da LB |
3315 | int rc; |
3316 | ||
3317 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3318 | if (cmd == NULL) | |
3319 | return -ENOMEM; | |
3320 | ||
55489b6e | 3321 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 3322 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3323 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
3324 | ||
3325 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
3326 | if (payload_len < 0) | |
3327 | payload_len = 0; | |
3328 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
3329 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
3330 | ||
3331 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
3332 | |
3333 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3334 | kfree(cmd); | |
3335 | ||
3336 | return rc; | |
3337 | } | |
3338 | ||
3339 | /* | |
55489b6e | 3340 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 3341 | */ |
55489b6e | 3342 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
3343 | struct mwl8k_cmd_pkt header; |
3344 | __le16 action; | |
55489b6e | 3345 | __le16 threshold; |
ba2d3587 | 3346 | } __packed; |
a66098da | 3347 | |
c2c2b12a LB |
3348 | static int |
3349 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 3350 | { |
55489b6e | 3351 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
3352 | int rc; |
3353 | ||
3354 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3355 | if (cmd == NULL) | |
3356 | return -ENOMEM; | |
3357 | ||
55489b6e | 3358 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 3359 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
3360 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3361 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
3362 | |
3363 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3364 | kfree(cmd); | |
3365 | ||
a66098da LB |
3366 | return rc; |
3367 | } | |
3368 | ||
3369 | /* | |
55489b6e | 3370 | * CMD_SET_SLOT. |
a66098da | 3371 | */ |
55489b6e | 3372 | struct mwl8k_cmd_set_slot { |
a66098da LB |
3373 | struct mwl8k_cmd_pkt header; |
3374 | __le16 action; | |
55489b6e | 3375 | __u8 short_slot; |
ba2d3587 | 3376 | } __packed; |
a66098da | 3377 | |
55489b6e | 3378 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 3379 | { |
55489b6e | 3380 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
3381 | int rc; |
3382 | ||
3383 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3384 | if (cmd == NULL) | |
3385 | return -ENOMEM; | |
3386 | ||
55489b6e | 3387 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 3388 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3389 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3390 | cmd->short_slot = short_slot_time; | |
a66098da LB |
3391 | |
3392 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3393 | kfree(cmd); | |
3394 | ||
3395 | return rc; | |
3396 | } | |
3397 | ||
3398 | /* | |
3399 | * CMD_SET_EDCA_PARAMS. | |
3400 | */ | |
3401 | struct mwl8k_cmd_set_edca_params { | |
3402 | struct mwl8k_cmd_pkt header; | |
3403 | ||
3404 | /* See MWL8K_SET_EDCA_XXX below */ | |
3405 | __le16 action; | |
3406 | ||
3407 | /* TX opportunity in units of 32 us */ | |
3408 | __le16 txop; | |
3409 | ||
2e484c89 LB |
3410 | union { |
3411 | struct { | |
3412 | /* Log exponent of max contention period: 0...15 */ | |
3413 | __le32 log_cw_max; | |
3414 | ||
3415 | /* Log exponent of min contention period: 0...15 */ | |
3416 | __le32 log_cw_min; | |
3417 | ||
3418 | /* Adaptive interframe spacing in units of 32us */ | |
3419 | __u8 aifs; | |
3420 | ||
3421 | /* TX queue to configure */ | |
3422 | __u8 txq; | |
3423 | } ap; | |
3424 | struct { | |
3425 | /* Log exponent of max contention period: 0...15 */ | |
3426 | __u8 log_cw_max; | |
a66098da | 3427 | |
2e484c89 LB |
3428 | /* Log exponent of min contention period: 0...15 */ |
3429 | __u8 log_cw_min; | |
a66098da | 3430 | |
2e484c89 LB |
3431 | /* Adaptive interframe spacing in units of 32us */ |
3432 | __u8 aifs; | |
a66098da | 3433 | |
2e484c89 LB |
3434 | /* TX queue to configure */ |
3435 | __u8 txq; | |
3436 | } sta; | |
3437 | }; | |
ba2d3587 | 3438 | } __packed; |
a66098da | 3439 | |
a66098da LB |
3440 | #define MWL8K_SET_EDCA_CW 0x01 |
3441 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
3442 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
3443 | ||
3444 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
3445 | MWL8K_SET_EDCA_TXOP | \ | |
3446 | MWL8K_SET_EDCA_AIFS) | |
3447 | ||
3448 | static int | |
55489b6e LB |
3449 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
3450 | __u16 cw_min, __u16 cw_max, | |
3451 | __u8 aifs, __u16 txop) | |
a66098da | 3452 | { |
2e484c89 | 3453 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 3454 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
3455 | int rc; |
3456 | ||
3457 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3458 | if (cmd == NULL) | |
3459 | return -ENOMEM; | |
3460 | ||
a66098da LB |
3461 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
3462 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
3463 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
3464 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
3465 | if (priv->ap_fw) { |
3466 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
3467 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
3468 | cmd->ap.aifs = aifs; | |
3469 | cmd->ap.txq = qnum; | |
3470 | } else { | |
3471 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
3472 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
3473 | cmd->sta.aifs = aifs; | |
3474 | cmd->sta.txq = qnum; | |
3475 | } | |
a66098da LB |
3476 | |
3477 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3478 | kfree(cmd); | |
3479 | ||
3480 | return rc; | |
3481 | } | |
3482 | ||
3483 | /* | |
55489b6e | 3484 | * CMD_SET_WMM_MODE. |
a66098da | 3485 | */ |
55489b6e | 3486 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 3487 | struct mwl8k_cmd_pkt header; |
55489b6e | 3488 | __le16 action; |
ba2d3587 | 3489 | } __packed; |
a66098da | 3490 | |
55489b6e | 3491 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 3492 | { |
55489b6e LB |
3493 | struct mwl8k_priv *priv = hw->priv; |
3494 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
3495 | int rc; |
3496 | ||
a66098da LB |
3497 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3498 | if (cmd == NULL) | |
3499 | return -ENOMEM; | |
3500 | ||
55489b6e | 3501 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 3502 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 3503 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
3504 | |
3505 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3506 | kfree(cmd); | |
16cec43d | 3507 | |
55489b6e LB |
3508 | if (!rc) |
3509 | priv->wmm_enabled = enable; | |
a66098da LB |
3510 | |
3511 | return rc; | |
3512 | } | |
3513 | ||
3514 | /* | |
55489b6e | 3515 | * CMD_MIMO_CONFIG. |
a66098da | 3516 | */ |
55489b6e LB |
3517 | struct mwl8k_cmd_mimo_config { |
3518 | struct mwl8k_cmd_pkt header; | |
3519 | __le32 action; | |
3520 | __u8 rx_antenna_map; | |
3521 | __u8 tx_antenna_map; | |
ba2d3587 | 3522 | } __packed; |
a66098da | 3523 | |
55489b6e | 3524 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 3525 | { |
55489b6e | 3526 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
3527 | int rc; |
3528 | ||
3529 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3530 | if (cmd == NULL) | |
3531 | return -ENOMEM; | |
3532 | ||
55489b6e | 3533 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 3534 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3535 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
3536 | cmd->rx_antenna_map = rx; | |
3537 | cmd->tx_antenna_map = tx; | |
a66098da LB |
3538 | |
3539 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3540 | kfree(cmd); | |
3541 | ||
3542 | return rc; | |
3543 | } | |
3544 | ||
3545 | /* | |
b71ed2c6 | 3546 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 3547 | */ |
b71ed2c6 LB |
3548 | struct mwl8k_cmd_use_fixed_rate_sta { |
3549 | struct mwl8k_cmd_pkt header; | |
3550 | __le32 action; | |
3551 | __le32 allow_rate_drop; | |
3552 | __le32 num_rates; | |
3553 | struct { | |
3554 | __le32 is_ht_rate; | |
3555 | __le32 enable_retry; | |
3556 | __le32 rate; | |
3557 | __le32 retry_count; | |
3558 | } rate_entry[8]; | |
3559 | __le32 rate_type; | |
3560 | __le32 reserved1; | |
3561 | __le32 reserved2; | |
ba2d3587 | 3562 | } __packed; |
a66098da | 3563 | |
b71ed2c6 LB |
3564 | #define MWL8K_USE_AUTO_RATE 0x0002 |
3565 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 3566 | |
b71ed2c6 | 3567 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 3568 | { |
b71ed2c6 | 3569 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
3570 | int rc; |
3571 | ||
3572 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3573 | if (cmd == NULL) | |
3574 | return -ENOMEM; | |
3575 | ||
3576 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3577 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
3578 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
3579 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
3580 | |
3581 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3582 | kfree(cmd); | |
3583 | ||
3584 | return rc; | |
3585 | } | |
3586 | ||
088aab8b LB |
3587 | /* |
3588 | * CMD_USE_FIXED_RATE (AP version). | |
3589 | */ | |
3590 | struct mwl8k_cmd_use_fixed_rate_ap { | |
3591 | struct mwl8k_cmd_pkt header; | |
3592 | __le32 action; | |
3593 | __le32 allow_rate_drop; | |
3594 | __le32 num_rates; | |
3595 | struct mwl8k_rate_entry_ap { | |
3596 | __le32 is_ht_rate; | |
3597 | __le32 enable_retry; | |
3598 | __le32 rate; | |
3599 | __le32 retry_count; | |
3600 | } rate_entry[4]; | |
3601 | u8 multicast_rate; | |
3602 | u8 multicast_rate_type; | |
3603 | u8 management_rate; | |
ba2d3587 | 3604 | } __packed; |
088aab8b LB |
3605 | |
3606 | static int | |
3607 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
3608 | { | |
3609 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
3610 | int rc; | |
3611 | ||
3612 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3613 | if (cmd == NULL) | |
3614 | return -ENOMEM; | |
3615 | ||
3616 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3617 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3618 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
3619 | cmd->multicast_rate = mcast; | |
3620 | cmd->management_rate = mgmt; | |
3621 | ||
3622 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3623 | kfree(cmd); | |
3624 | ||
3625 | return rc; | |
3626 | } | |
3627 | ||
55489b6e LB |
3628 | /* |
3629 | * CMD_ENABLE_SNIFFER. | |
3630 | */ | |
3631 | struct mwl8k_cmd_enable_sniffer { | |
3632 | struct mwl8k_cmd_pkt header; | |
3633 | __le32 action; | |
ba2d3587 | 3634 | } __packed; |
55489b6e LB |
3635 | |
3636 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3637 | { | |
3638 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3639 | int rc; | |
3640 | ||
3641 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3642 | if (cmd == NULL) | |
3643 | return -ENOMEM; | |
3644 | ||
3645 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3646 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3647 | cmd->action = cpu_to_le32(!!enable); | |
3648 | ||
3649 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3650 | kfree(cmd); | |
3651 | ||
3652 | return rc; | |
3653 | } | |
3654 | ||
197a4e4e | 3655 | struct mwl8k_cmd_update_mac_addr { |
55489b6e LB |
3656 | struct mwl8k_cmd_pkt header; |
3657 | union { | |
3658 | struct { | |
3659 | __le16 mac_type; | |
3660 | __u8 mac_addr[ETH_ALEN]; | |
3661 | } mbss; | |
3662 | __u8 mac_addr[ETH_ALEN]; | |
3663 | }; | |
ba2d3587 | 3664 | } __packed; |
55489b6e | 3665 | |
ee0ddf18 LB |
3666 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3667 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3668 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3669 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3670 | |
197a4e4e YAP |
3671 | static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw, |
3672 | struct ieee80211_vif *vif, u8 *mac, bool set) | |
55489b6e LB |
3673 | { |
3674 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3675 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
197a4e4e | 3676 | struct mwl8k_cmd_update_mac_addr *cmd; |
ee0ddf18 | 3677 | int mac_type; |
55489b6e LB |
3678 | int rc; |
3679 | ||
ee0ddf18 LB |
3680 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3681 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3682 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
af458831 YAP |
3683 | if (priv->ap_fw) |
3684 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3685 | else | |
3686 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
ee0ddf18 LB |
3687 | else |
3688 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3689 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3690 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3691 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3692 | else | |
3693 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3694 | } | |
3695 | ||
55489b6e LB |
3696 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3697 | if (cmd == NULL) | |
3698 | return -ENOMEM; | |
3699 | ||
197a4e4e YAP |
3700 | if (set) |
3701 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3702 | else | |
3703 | cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR); | |
3704 | ||
55489b6e LB |
3705 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
3706 | if (priv->ap_fw) { | |
ee0ddf18 | 3707 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3708 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3709 | } else { | |
3710 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3711 | } | |
3712 | ||
aa21d0f6 | 3713 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3714 | kfree(cmd); |
3715 | ||
3716 | return rc; | |
3717 | } | |
3718 | ||
197a4e4e YAP |
3719 | /* |
3720 | * MWL8K_CMD_SET_MAC_ADDR. | |
3721 | */ | |
3722 | static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, | |
3723 | struct ieee80211_vif *vif, u8 *mac) | |
3724 | { | |
3725 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, true); | |
3726 | } | |
3727 | ||
3728 | /* | |
3729 | * MWL8K_CMD_DEL_MAC_ADDR. | |
3730 | */ | |
3731 | static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw, | |
3732 | struct ieee80211_vif *vif, u8 *mac) | |
3733 | { | |
3734 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, false); | |
3735 | } | |
3736 | ||
55489b6e LB |
3737 | /* |
3738 | * CMD_SET_RATEADAPT_MODE. | |
3739 | */ | |
3740 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3741 | struct mwl8k_cmd_pkt header; | |
3742 | __le16 action; | |
3743 | __le16 mode; | |
ba2d3587 | 3744 | } __packed; |
55489b6e LB |
3745 | |
3746 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3747 | { | |
3748 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3749 | int rc; | |
3750 | ||
3751 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3752 | if (cmd == NULL) | |
3753 | return -ENOMEM; | |
3754 | ||
3755 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3756 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3757 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3758 | cmd->mode = cpu_to_le16(mode); | |
3759 | ||
3760 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3761 | kfree(cmd); | |
3762 | ||
3763 | return rc; | |
3764 | } | |
3765 | ||
3aefc37e NS |
3766 | /* |
3767 | * CMD_GET_WATCHDOG_BITMAP. | |
3768 | */ | |
3769 | struct mwl8k_cmd_get_watchdog_bitmap { | |
3770 | struct mwl8k_cmd_pkt header; | |
3771 | u8 bitmap; | |
3772 | } __packed; | |
3773 | ||
3774 | static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap) | |
3775 | { | |
3776 | struct mwl8k_cmd_get_watchdog_bitmap *cmd; | |
3777 | int rc; | |
3778 | ||
3779 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3780 | if (cmd == NULL) | |
3781 | return -ENOMEM; | |
3782 | ||
3783 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP); | |
3784 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3785 | ||
3786 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3787 | if (!rc) | |
3788 | *bitmap = cmd->bitmap; | |
3789 | ||
3790 | kfree(cmd); | |
3791 | ||
3792 | return rc; | |
3793 | } | |
3794 | ||
cfacba12 YAP |
3795 | #define MWL8K_WMM_QUEUE_NUMBER 3 |
3796 | ||
3797 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
3798 | u8 idx); | |
3799 | ||
3aefc37e NS |
3800 | static void mwl8k_watchdog_ba_events(struct work_struct *work) |
3801 | { | |
3802 | int rc; | |
3803 | u8 bitmap = 0, stream_index; | |
3804 | struct mwl8k_ampdu_stream *streams; | |
3805 | struct mwl8k_priv *priv = | |
3806 | container_of(work, struct mwl8k_priv, watchdog_ba_handle); | |
cfacba12 YAP |
3807 | struct ieee80211_hw *hw = priv->hw; |
3808 | int i; | |
3809 | u32 status = 0; | |
3810 | ||
3811 | mwl8k_fw_lock(hw); | |
3aefc37e NS |
3812 | |
3813 | rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap); | |
3814 | if (rc) | |
cfacba12 | 3815 | goto done; |
3aefc37e | 3816 | |
cfacba12 | 3817 | spin_lock(&priv->stream_lock); |
3aefc37e NS |
3818 | |
3819 | /* the bitmap is the hw queue number. Map it to the ampdu queue. */ | |
cfacba12 YAP |
3820 | for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) { |
3821 | if (bitmap & (1 << i)) { | |
3822 | stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) % | |
3823 | TOTAL_HW_TX_QUEUES; | |
3824 | streams = &priv->ampdu[stream_index]; | |
3825 | if (streams->state == AMPDU_STREAM_ACTIVE) { | |
3826 | ieee80211_stop_tx_ba_session(streams->sta, | |
3827 | streams->tid); | |
3828 | spin_unlock(&priv->stream_lock); | |
3829 | mwl8k_destroy_ba(hw, stream_index); | |
3830 | spin_lock(&priv->stream_lock); | |
3831 | } | |
3832 | } | |
3833 | } | |
3aefc37e | 3834 | |
cfacba12 YAP |
3835 | spin_unlock(&priv->stream_lock); |
3836 | done: | |
c27a54d3 | 3837 | atomic_dec(&priv->watchdog_event_pending); |
cfacba12 YAP |
3838 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
3839 | iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG), | |
3840 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
3841 | mwl8k_fw_unlock(hw); | |
3aefc37e NS |
3842 | return; |
3843 | } | |
3844 | ||
3845 | ||
b64fe619 LB |
3846 | /* |
3847 | * CMD_BSS_START. | |
3848 | */ | |
3849 | struct mwl8k_cmd_bss_start { | |
3850 | struct mwl8k_cmd_pkt header; | |
3851 | __le32 enable; | |
ba2d3587 | 3852 | } __packed; |
b64fe619 | 3853 | |
aa21d0f6 LB |
3854 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3855 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3856 | { |
3857 | struct mwl8k_cmd_bss_start *cmd; | |
e882efc9 YAP |
3858 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
3859 | struct mwl8k_priv *priv = hw->priv; | |
b64fe619 LB |
3860 | int rc; |
3861 | ||
e882efc9 YAP |
3862 | if (enable && (priv->running_bsses & (1 << mwl8k_vif->macid))) |
3863 | return 0; | |
3864 | ||
3865 | if (!enable && !(priv->running_bsses & (1 << mwl8k_vif->macid))) | |
3866 | return 0; | |
3867 | ||
b64fe619 LB |
3868 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3869 | if (cmd == NULL) | |
3870 | return -ENOMEM; | |
3871 | ||
3872 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3873 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3874 | cmd->enable = cpu_to_le32(enable); | |
3875 | ||
aa21d0f6 | 3876 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3877 | kfree(cmd); |
3878 | ||
e882efc9 YAP |
3879 | if (!rc) { |
3880 | if (enable) | |
3881 | priv->running_bsses |= (1 << mwl8k_vif->macid); | |
3882 | else | |
3883 | priv->running_bsses &= ~(1 << mwl8k_vif->macid); | |
3884 | } | |
b64fe619 LB |
3885 | return rc; |
3886 | } | |
3887 | ||
e882efc9 YAP |
3888 | static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, u32 bitmap) |
3889 | { | |
3890 | struct mwl8k_priv *priv = hw->priv; | |
3891 | struct mwl8k_vif *mwl8k_vif, *tmp_vif; | |
3892 | struct ieee80211_vif *vif; | |
3893 | ||
3894 | list_for_each_entry_safe(mwl8k_vif, tmp_vif, &priv->vif_list, list) { | |
3895 | vif = mwl8k_vif->vif; | |
3896 | ||
3897 | if (!(bitmap & (1 << mwl8k_vif->macid))) | |
3898 | continue; | |
3899 | ||
3900 | if (vif->type == NL80211_IFTYPE_AP) | |
3901 | mwl8k_cmd_bss_start(hw, vif, enable); | |
3902 | } | |
3903 | } | |
5faa1aff NS |
3904 | /* |
3905 | * CMD_BASTREAM. | |
3906 | */ | |
3907 | ||
3908 | /* | |
3909 | * UPSTREAM is tx direction | |
3910 | */ | |
3911 | #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 | |
3912 | #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 | |
3913 | ||
ba30c4a5 | 3914 | enum ba_stream_action_type { |
5faa1aff NS |
3915 | MWL8K_BA_CREATE, |
3916 | MWL8K_BA_UPDATE, | |
3917 | MWL8K_BA_DESTROY, | |
3918 | MWL8K_BA_FLUSH, | |
3919 | MWL8K_BA_CHECK, | |
ba30c4a5 | 3920 | }; |
5faa1aff NS |
3921 | |
3922 | ||
3923 | struct mwl8k_create_ba_stream { | |
3924 | __le32 flags; | |
3925 | __le32 idle_thrs; | |
3926 | __le32 bar_thrs; | |
3927 | __le32 window_size; | |
3928 | u8 peer_mac_addr[6]; | |
3929 | u8 dialog_token; | |
3930 | u8 tid; | |
3931 | u8 queue_id; | |
3932 | u8 param_info; | |
3933 | __le32 ba_context; | |
3934 | u8 reset_seq_no_flag; | |
3935 | __le16 curr_seq_no; | |
3936 | u8 sta_src_mac_addr[6]; | |
3937 | } __packed; | |
3938 | ||
3939 | struct mwl8k_destroy_ba_stream { | |
3940 | __le32 flags; | |
3941 | __le32 ba_context; | |
3942 | } __packed; | |
3943 | ||
3944 | struct mwl8k_cmd_bastream { | |
3945 | struct mwl8k_cmd_pkt header; | |
3946 | __le32 action; | |
3947 | union { | |
3948 | struct mwl8k_create_ba_stream create_params; | |
3949 | struct mwl8k_destroy_ba_stream destroy_params; | |
3950 | }; | |
3951 | } __packed; | |
3952 | ||
3953 | static int | |
f95275c4 YAP |
3954 | mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, |
3955 | struct ieee80211_vif *vif) | |
5faa1aff NS |
3956 | { |
3957 | struct mwl8k_cmd_bastream *cmd; | |
3958 | int rc; | |
3959 | ||
3960 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3961 | if (cmd == NULL) | |
3962 | return -ENOMEM; | |
3963 | ||
3964 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3965 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3966 | ||
3967 | cmd->action = cpu_to_le32(MWL8K_BA_CHECK); | |
3968 | ||
3969 | cmd->create_params.queue_id = stream->idx; | |
3970 | memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr, | |
3971 | ETH_ALEN); | |
3972 | cmd->create_params.tid = stream->tid; | |
3973 | ||
3974 | cmd->create_params.flags = | |
3975 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) | | |
3976 | cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3977 | ||
f95275c4 | 3978 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
3979 | |
3980 | kfree(cmd); | |
3981 | ||
3982 | return rc; | |
3983 | } | |
3984 | ||
3985 | static int | |
3986 | mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, | |
f95275c4 | 3987 | u8 buf_size, struct ieee80211_vif *vif) |
5faa1aff NS |
3988 | { |
3989 | struct mwl8k_cmd_bastream *cmd; | |
3990 | int rc; | |
3991 | ||
3992 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3993 | if (cmd == NULL) | |
3994 | return -ENOMEM; | |
3995 | ||
3996 | ||
3997 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3998 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3999 | ||
4000 | cmd->action = cpu_to_le32(MWL8K_BA_CREATE); | |
4001 | ||
4002 | cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size); | |
4003 | cmd->create_params.window_size = cpu_to_le32((u32)buf_size); | |
4004 | cmd->create_params.queue_id = stream->idx; | |
4005 | ||
4006 | memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN); | |
4007 | cmd->create_params.tid = stream->tid; | |
4008 | cmd->create_params.curr_seq_no = cpu_to_le16(0); | |
4009 | cmd->create_params.reset_seq_no_flag = 1; | |
4010 | ||
4011 | cmd->create_params.param_info = | |
4012 | (stream->sta->ht_cap.ampdu_factor & | |
4013 | IEEE80211_HT_AMPDU_PARM_FACTOR) | | |
4014 | ((stream->sta->ht_cap.ampdu_density << 2) & | |
4015 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
4016 | ||
4017 | cmd->create_params.flags = | |
4018 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE | | |
4019 | BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
4020 | ||
f95275c4 | 4021 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
4022 | |
4023 | wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n", | |
4024 | stream->sta->addr, stream->tid); | |
4025 | kfree(cmd); | |
4026 | ||
4027 | return rc; | |
4028 | } | |
4029 | ||
4030 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
07f6dda1 | 4031 | u8 idx) |
5faa1aff NS |
4032 | { |
4033 | struct mwl8k_cmd_bastream *cmd; | |
4034 | ||
4035 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4036 | if (cmd == NULL) | |
4037 | return; | |
4038 | ||
4039 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
4040 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4041 | cmd->action = cpu_to_le32(MWL8K_BA_DESTROY); | |
4042 | ||
07f6dda1 | 4043 | cmd->destroy_params.ba_context = cpu_to_le32(idx); |
5faa1aff NS |
4044 | mwl8k_post_cmd(hw, &cmd->header); |
4045 | ||
07f6dda1 | 4046 | wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx); |
5faa1aff NS |
4047 | |
4048 | kfree(cmd); | |
4049 | } | |
4050 | ||
3f5610ff LB |
4051 | /* |
4052 | * CMD_SET_NEW_STN. | |
4053 | */ | |
4054 | struct mwl8k_cmd_set_new_stn { | |
4055 | struct mwl8k_cmd_pkt header; | |
4056 | __le16 aid; | |
4057 | __u8 mac_addr[6]; | |
4058 | __le16 stn_id; | |
4059 | __le16 action; | |
4060 | __le16 rsvd; | |
4061 | __le32 legacy_rates; | |
4062 | __u8 ht_rates[4]; | |
4063 | __le16 cap_info; | |
4064 | __le16 ht_capabilities_info; | |
4065 | __u8 mac_ht_param_info; | |
4066 | __u8 rev; | |
4067 | __u8 control_channel; | |
4068 | __u8 add_channel; | |
4069 | __le16 op_mode; | |
4070 | __le16 stbc; | |
4071 | __u8 add_qos_info; | |
4072 | __u8 is_qos_sta; | |
4073 | __le32 fw_sta_ptr; | |
ba2d3587 | 4074 | } __packed; |
3f5610ff LB |
4075 | |
4076 | #define MWL8K_STA_ACTION_ADD 0 | |
4077 | #define MWL8K_STA_ACTION_REMOVE 2 | |
4078 | ||
4079 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
4080 | struct ieee80211_vif *vif, | |
4081 | struct ieee80211_sta *sta) | |
4082 | { | |
4083 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 4084 | u32 rates; |
3f5610ff LB |
4085 | int rc; |
4086 | ||
4087 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4088 | if (cmd == NULL) | |
4089 | return -ENOMEM; | |
4090 | ||
4091 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
4092 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4093 | cmd->aid = cpu_to_le16(sta->aid); | |
4094 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
4095 | cmd->stn_id = cpu_to_le16(sta->aid); | |
4096 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
57fbcce3 JB |
4097 | if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ) |
4098 | rates = sta->supp_rates[NL80211_BAND_2GHZ]; | |
8707d026 | 4099 | else |
57fbcce3 | 4100 | rates = sta->supp_rates[NL80211_BAND_5GHZ] << 5; |
8707d026 | 4101 | cmd->legacy_rates = cpu_to_le32(rates); |
3f5610ff LB |
4102 | if (sta->ht_cap.ht_supported) { |
4103 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
4104 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
4105 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
4106 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
4107 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
4108 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
4109 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
4110 | cmd->is_qos_sta = 1; | |
4111 | } | |
4112 | ||
aa21d0f6 | 4113 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
4114 | kfree(cmd); |
4115 | ||
4116 | return rc; | |
4117 | } | |
4118 | ||
b64fe619 LB |
4119 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
4120 | struct ieee80211_vif *vif) | |
4121 | { | |
4122 | struct mwl8k_cmd_set_new_stn *cmd; | |
4123 | int rc; | |
4124 | ||
4125 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4126 | if (cmd == NULL) | |
4127 | return -ENOMEM; | |
4128 | ||
4129 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
4130 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4131 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
4132 | ||
aa21d0f6 | 4133 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
4134 | kfree(cmd); |
4135 | ||
4136 | return rc; | |
4137 | } | |
4138 | ||
3f5610ff LB |
4139 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
4140 | struct ieee80211_vif *vif, u8 *addr) | |
4141 | { | |
4142 | struct mwl8k_cmd_set_new_stn *cmd; | |
0dd13a48 YAP |
4143 | struct mwl8k_priv *priv = hw->priv; |
4144 | int rc, i; | |
4145 | u8 idx; | |
4146 | ||
4147 | spin_lock(&priv->stream_lock); | |
4148 | /* Destroy any active ampdu streams for this sta */ | |
4149 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { | |
4150 | struct mwl8k_ampdu_stream *s; | |
4151 | s = &priv->ampdu[i]; | |
4152 | if (s->state != AMPDU_NO_STREAM) { | |
4153 | if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) { | |
4154 | if (s->state == AMPDU_STREAM_ACTIVE) { | |
4155 | idx = s->idx; | |
4156 | spin_unlock(&priv->stream_lock); | |
4157 | mwl8k_destroy_ba(hw, idx); | |
4158 | spin_lock(&priv->stream_lock); | |
4159 | } else if (s->state == AMPDU_STREAM_NEW) { | |
4160 | mwl8k_remove_stream(hw, s); | |
4161 | } | |
4162 | } | |
4163 | } | |
4164 | } | |
4165 | ||
4166 | spin_unlock(&priv->stream_lock); | |
3f5610ff LB |
4167 | |
4168 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4169 | if (cmd == NULL) | |
4170 | return -ENOMEM; | |
4171 | ||
4172 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
4173 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4174 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4175 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
4176 | ||
aa21d0f6 | 4177 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
4178 | kfree(cmd); |
4179 | ||
4180 | return rc; | |
4181 | } | |
4182 | ||
fcdc403c NS |
4183 | /* |
4184 | * CMD_UPDATE_ENCRYPTION. | |
4185 | */ | |
4186 | ||
4187 | #define MAX_ENCR_KEY_LENGTH 16 | |
4188 | #define MIC_KEY_LENGTH 8 | |
4189 | ||
4190 | struct mwl8k_cmd_update_encryption { | |
4191 | struct mwl8k_cmd_pkt header; | |
4192 | ||
4193 | __le32 action; | |
4194 | __le32 reserved; | |
4195 | __u8 mac_addr[6]; | |
4196 | __u8 encr_type; | |
4197 | ||
ba30c4a5 | 4198 | } __packed; |
fcdc403c NS |
4199 | |
4200 | struct mwl8k_cmd_set_key { | |
4201 | struct mwl8k_cmd_pkt header; | |
4202 | ||
4203 | __le32 action; | |
4204 | __le32 reserved; | |
4205 | __le16 length; | |
4206 | __le16 key_type_id; | |
4207 | __le32 key_info; | |
4208 | __le32 key_id; | |
4209 | __le16 key_len; | |
4210 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
4211 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
4212 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
4213 | __le16 tkip_rsc_low; | |
4214 | __le32 tkip_rsc_high; | |
4215 | __le16 tkip_tsc_low; | |
4216 | __le32 tkip_tsc_high; | |
4217 | __u8 mac_addr[6]; | |
ba30c4a5 | 4218 | } __packed; |
fcdc403c NS |
4219 | |
4220 | enum { | |
4221 | MWL8K_ENCR_ENABLE, | |
4222 | MWL8K_ENCR_SET_KEY, | |
4223 | MWL8K_ENCR_REMOVE_KEY, | |
4224 | MWL8K_ENCR_SET_GROUP_KEY, | |
4225 | }; | |
4226 | ||
4227 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
4228 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
4229 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
4230 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
4231 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
4232 | ||
4233 | enum { | |
4234 | MWL8K_ALG_WEP, | |
4235 | MWL8K_ALG_TKIP, | |
4236 | MWL8K_ALG_CCMP, | |
4237 | }; | |
4238 | ||
4239 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
4240 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
4241 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
4242 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
4243 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
4244 | ||
4245 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
4246 | struct ieee80211_vif *vif, | |
4247 | u8 *addr, | |
4248 | u8 encr_type) | |
4249 | { | |
4250 | struct mwl8k_cmd_update_encryption *cmd; | |
4251 | int rc; | |
4252 | ||
4253 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4254 | if (cmd == NULL) | |
4255 | return -ENOMEM; | |
4256 | ||
4257 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4258 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4259 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
4260 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4261 | cmd->encr_type = encr_type; | |
4262 | ||
4263 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4264 | kfree(cmd); | |
4265 | ||
4266 | return rc; | |
4267 | } | |
4268 | ||
4269 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
4270 | u8 *addr, | |
4271 | struct ieee80211_key_conf *key) | |
4272 | { | |
4273 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4274 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4275 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
4276 | offsetof(struct mwl8k_cmd_set_key, length)); | |
4277 | cmd->key_id = cpu_to_le32(key->keyidx); | |
4278 | cmd->key_len = cpu_to_le16(key->keylen); | |
4279 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4280 | ||
4281 | switch (key->cipher) { | |
4282 | case WLAN_CIPHER_SUITE_WEP40: | |
4283 | case WLAN_CIPHER_SUITE_WEP104: | |
4284 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
4285 | if (key->keyidx == 0) | |
4286 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
4287 | ||
4288 | break; | |
4289 | case WLAN_CIPHER_SUITE_TKIP: | |
4290 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
4291 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4292 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4293 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4294 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
4295 | | MWL8K_KEY_FLAG_TSC_VALID); | |
4296 | break; | |
4297 | case WLAN_CIPHER_SUITE_CCMP: | |
4298 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
4299 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4300 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4301 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4302 | break; | |
4303 | default: | |
4304 | return -ENOTSUPP; | |
4305 | } | |
4306 | ||
4307 | return 0; | |
4308 | } | |
4309 | ||
4310 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
4311 | struct ieee80211_vif *vif, | |
4312 | u8 *addr, | |
4313 | struct ieee80211_key_conf *key) | |
4314 | { | |
4315 | struct mwl8k_cmd_set_key *cmd; | |
4316 | int rc; | |
4317 | int keymlen; | |
4318 | u32 action; | |
4319 | u8 idx; | |
4320 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4321 | ||
4322 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4323 | if (cmd == NULL) | |
4324 | return -ENOMEM; | |
4325 | ||
4326 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4327 | if (rc < 0) | |
4328 | goto done; | |
4329 | ||
4330 | idx = key->keyidx; | |
4331 | ||
4332 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4333 | action = MWL8K_ENCR_SET_KEY; | |
4334 | else | |
4335 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
4336 | ||
4337 | switch (key->cipher) { | |
4338 | case WLAN_CIPHER_SUITE_WEP40: | |
4339 | case WLAN_CIPHER_SUITE_WEP104: | |
4340 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
4341 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
4342 | sizeof(*key) + key->keylen); | |
4343 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
4344 | } | |
4345 | ||
9b571e24 | 4346 | keymlen = key->keylen; |
fcdc403c NS |
4347 | action = MWL8K_ENCR_SET_KEY; |
4348 | break; | |
4349 | case WLAN_CIPHER_SUITE_TKIP: | |
4350 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
4351 | break; | |
4352 | case WLAN_CIPHER_SUITE_CCMP: | |
4353 | keymlen = key->keylen; | |
4354 | break; | |
4355 | default: | |
4356 | rc = -ENOTSUPP; | |
4357 | goto done; | |
4358 | } | |
4359 | ||
4360 | memcpy(cmd->key_material, key->key, keymlen); | |
4361 | cmd->action = cpu_to_le32(action); | |
4362 | ||
4363 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4364 | done: | |
4365 | kfree(cmd); | |
4366 | ||
4367 | return rc; | |
4368 | } | |
4369 | ||
4370 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
4371 | struct ieee80211_vif *vif, | |
4372 | u8 *addr, | |
4373 | struct ieee80211_key_conf *key) | |
4374 | { | |
4375 | struct mwl8k_cmd_set_key *cmd; | |
4376 | int rc; | |
4377 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4378 | ||
4379 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4380 | if (cmd == NULL) | |
4381 | return -ENOMEM; | |
4382 | ||
4383 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4384 | if (rc < 0) | |
4385 | goto done; | |
4386 | ||
4387 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
d981e059 | 4388 | key->cipher == WLAN_CIPHER_SUITE_WEP104) |
fcdc403c NS |
4389 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; |
4390 | ||
4391 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
4392 | ||
4393 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4394 | done: | |
4395 | kfree(cmd); | |
4396 | ||
4397 | return rc; | |
4398 | } | |
4399 | ||
4400 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
4401 | enum set_key_cmd cmd_param, | |
4402 | struct ieee80211_vif *vif, | |
4403 | struct ieee80211_sta *sta, | |
4404 | struct ieee80211_key_conf *key) | |
4405 | { | |
4406 | int rc = 0; | |
4407 | u8 encr_type; | |
4408 | u8 *addr; | |
4409 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
751930cb | 4410 | struct mwl8k_priv *priv = hw->priv; |
fcdc403c | 4411 | |
751930cb | 4412 | if (vif->type == NL80211_IFTYPE_STATION && !priv->ap_fw) |
fcdc403c NS |
4413 | return -EOPNOTSUPP; |
4414 | ||
4415 | if (sta == NULL) | |
ff7e9f99 | 4416 | addr = vif->addr; |
fcdc403c NS |
4417 | else |
4418 | addr = sta->addr; | |
4419 | ||
4420 | if (cmd_param == SET_KEY) { | |
fcdc403c NS |
4421 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); |
4422 | if (rc) | |
4423 | goto out; | |
4424 | ||
4425 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
4426 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
4427 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
4428 | else | |
4429 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
4430 | ||
4431 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
4432 | encr_type); | |
4433 | if (rc) | |
4434 | goto out; | |
4435 | ||
4436 | mwl8k_vif->is_hw_crypto_enabled = true; | |
4437 | ||
4438 | } else { | |
4439 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
4440 | ||
4441 | if (rc) | |
4442 | goto out; | |
fcdc403c NS |
4443 | } |
4444 | out: | |
4445 | return rc; | |
4446 | } | |
4447 | ||
55489b6e LB |
4448 | /* |
4449 | * CMD_UPDATE_STADB. | |
4450 | */ | |
25d81b1e LB |
4451 | struct ewc_ht_info { |
4452 | __le16 control1; | |
4453 | __le16 control2; | |
4454 | __le16 control3; | |
ba2d3587 | 4455 | } __packed; |
25d81b1e LB |
4456 | |
4457 | struct peer_capability_info { | |
4458 | /* Peer type - AP vs. STA. */ | |
4459 | __u8 peer_type; | |
4460 | ||
4461 | /* Basic 802.11 capabilities from assoc resp. */ | |
4462 | __le16 basic_caps; | |
4463 | ||
4464 | /* Set if peer supports 802.11n high throughput (HT). */ | |
4465 | __u8 ht_support; | |
4466 | ||
4467 | /* Valid if HT is supported. */ | |
4468 | __le16 ht_caps; | |
4469 | __u8 extended_ht_caps; | |
4470 | struct ewc_ht_info ewc_info; | |
4471 | ||
4472 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
4473 | __u8 legacy_rates[12]; | |
4474 | ||
4475 | /* HT rate table. Intersection of our rates and peer rates. */ | |
4476 | __u8 ht_rates[16]; | |
4477 | __u8 pad[16]; | |
4478 | ||
4479 | /* If set, interoperability mode, no proprietary extensions. */ | |
4480 | __u8 interop; | |
4481 | __u8 pad2; | |
4482 | __u8 station_id; | |
4483 | __le16 amsdu_enabled; | |
ba2d3587 | 4484 | } __packed; |
25d81b1e | 4485 | |
55489b6e LB |
4486 | struct mwl8k_cmd_update_stadb { |
4487 | struct mwl8k_cmd_pkt header; | |
4488 | ||
4489 | /* See STADB_ACTION_TYPE */ | |
4490 | __le32 action; | |
4491 | ||
4492 | /* Peer MAC address */ | |
4493 | __u8 peer_addr[ETH_ALEN]; | |
4494 | ||
4495 | __le32 reserved; | |
4496 | ||
4497 | /* Peer info - valid during add/update. */ | |
4498 | struct peer_capability_info peer_info; | |
ba2d3587 | 4499 | } __packed; |
55489b6e | 4500 | |
a680400e LB |
4501 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
4502 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
4503 | ||
4504 | /* Peer Entry flags - used to define the type of the peer node */ | |
4505 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
4506 | ||
4507 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 4508 | struct ieee80211_vif *vif, |
13935e2c | 4509 | struct ieee80211_sta *sta) |
55489b6e | 4510 | { |
55489b6e | 4511 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 4512 | struct peer_capability_info *p; |
8707d026 | 4513 | u32 rates; |
55489b6e LB |
4514 | int rc; |
4515 | ||
4516 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4517 | if (cmd == NULL) | |
4518 | return -ENOMEM; | |
4519 | ||
4520 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4521 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 4522 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 4523 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 4524 | |
a680400e LB |
4525 | p = &cmd->peer_info; |
4526 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
4527 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 4528 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 4529 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
4530 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
4531 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
57fbcce3 JB |
4532 | if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ) |
4533 | rates = sta->supp_rates[NL80211_BAND_2GHZ]; | |
8707d026 | 4534 | else |
57fbcce3 | 4535 | rates = sta->supp_rates[NL80211_BAND_5GHZ] << 5; |
8707d026 | 4536 | legacy_rate_mask_to_array(p->legacy_rates, rates); |
13935e2c | 4537 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
4538 | p->interop = 1; |
4539 | p->amsdu_enabled = 0; | |
4540 | ||
4541 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
c4f74d35 NZ |
4542 | if (!rc) |
4543 | rc = p->station_id; | |
a680400e LB |
4544 | kfree(cmd); |
4545 | ||
c4f74d35 | 4546 | return rc; |
a680400e LB |
4547 | } |
4548 | ||
4549 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
4550 | struct ieee80211_vif *vif, u8 *addr) | |
4551 | { | |
4552 | struct mwl8k_cmd_update_stadb *cmd; | |
4553 | int rc; | |
4554 | ||
4555 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4556 | if (cmd == NULL) | |
4557 | return -ENOMEM; | |
4558 | ||
4559 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4560 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4561 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 4562 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 4563 | |
a680400e | 4564 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
4565 | kfree(cmd); |
4566 | ||
4567 | return rc; | |
4568 | } | |
4569 | ||
a66098da LB |
4570 | |
4571 | /* | |
4572 | * Interrupt handling. | |
4573 | */ | |
4574 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
4575 | { | |
4576 | struct ieee80211_hw *hw = dev_id; | |
4577 | struct mwl8k_priv *priv = hw->priv; | |
4578 | u32 status; | |
4579 | ||
4580 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
4581 | if (!status) |
4582 | return IRQ_NONE; | |
4583 | ||
1e9f9de3 LB |
4584 | if (status & MWL8K_A2H_INT_TX_DONE) { |
4585 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
4586 | tasklet_schedule(&priv->poll_tx_task); | |
4587 | } | |
4588 | ||
a66098da | 4589 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
4590 | status &= ~MWL8K_A2H_INT_RX_READY; |
4591 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
4592 | } |
4593 | ||
3aefc37e | 4594 | if (status & MWL8K_A2H_INT_BA_WATCHDOG) { |
c27a54d3 YAP |
4595 | iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG, |
4596 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
4597 | ||
4598 | atomic_inc(&priv->watchdog_event_pending); | |
3aefc37e NS |
4599 | status &= ~MWL8K_A2H_INT_BA_WATCHDOG; |
4600 | ieee80211_queue_work(hw, &priv->watchdog_ba_handle); | |
4601 | } | |
4602 | ||
67e2eb27 LB |
4603 | if (status) |
4604 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4605 | ||
a66098da | 4606 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 4607 | if (priv->hostcmd_wait != NULL) |
a66098da | 4608 | complete(priv->hostcmd_wait); |
a66098da LB |
4609 | } |
4610 | ||
4611 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 4612 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 4613 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 4614 | mwl8k_tx_start(priv); |
a66098da LB |
4615 | } |
4616 | ||
4617 | return IRQ_HANDLED; | |
4618 | } | |
4619 | ||
1e9f9de3 LB |
4620 | static void mwl8k_tx_poll(unsigned long data) |
4621 | { | |
4622 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4623 | struct mwl8k_priv *priv = hw->priv; | |
4624 | int limit; | |
4625 | int i; | |
4626 | ||
4627 | limit = 32; | |
4628 | ||
4629 | spin_lock_bh(&priv->tx_lock); | |
4630 | ||
e600707b | 4631 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
1e9f9de3 LB |
4632 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); |
4633 | ||
4634 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
4635 | complete(priv->tx_wait); | |
4636 | priv->tx_wait = NULL; | |
4637 | } | |
4638 | ||
4639 | spin_unlock_bh(&priv->tx_lock); | |
4640 | ||
4641 | if (limit) { | |
4642 | writel(~MWL8K_A2H_INT_TX_DONE, | |
4643 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4644 | } else { | |
4645 | tasklet_schedule(&priv->poll_tx_task); | |
4646 | } | |
4647 | } | |
4648 | ||
67e2eb27 LB |
4649 | static void mwl8k_rx_poll(unsigned long data) |
4650 | { | |
4651 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4652 | struct mwl8k_priv *priv = hw->priv; | |
4653 | int limit; | |
4654 | ||
4655 | limit = 32; | |
4656 | limit -= rxq_process(hw, 0, limit); | |
4657 | limit -= rxq_refill(hw, 0, limit); | |
4658 | ||
4659 | if (limit) { | |
4660 | writel(~MWL8K_A2H_INT_RX_READY, | |
4661 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4662 | } else { | |
4663 | tasklet_schedule(&priv->poll_rx_task); | |
4664 | } | |
4665 | } | |
4666 | ||
a66098da LB |
4667 | |
4668 | /* | |
4669 | * Core driver operations. | |
4670 | */ | |
36323f81 TH |
4671 | static void mwl8k_tx(struct ieee80211_hw *hw, |
4672 | struct ieee80211_tx_control *control, | |
4673 | struct sk_buff *skb) | |
a66098da LB |
4674 | { |
4675 | struct mwl8k_priv *priv = hw->priv; | |
4676 | int index = skb_get_queue_mapping(skb); | |
a66098da | 4677 | |
9189c100 | 4678 | if (!priv->radio_on) { |
c96c31e4 JP |
4679 | wiphy_debug(hw->wiphy, |
4680 | "dropped TX frame since radio disabled\n"); | |
a66098da | 4681 | dev_kfree_skb(skb); |
7bb45683 | 4682 | return; |
a66098da LB |
4683 | } |
4684 | ||
36323f81 | 4685 | mwl8k_txq_xmit(hw, index, control->sta, skb); |
a66098da LB |
4686 | } |
4687 | ||
a66098da LB |
4688 | static int mwl8k_start(struct ieee80211_hw *hw) |
4689 | { | |
a66098da LB |
4690 | struct mwl8k_priv *priv = hw->priv; |
4691 | int rc; | |
4692 | ||
a0607fd3 | 4693 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4694 | IRQF_SHARED, MWL8K_NAME, hw); |
4695 | if (rc) { | |
bf3ca7f7 | 4696 | priv->irq = -1; |
5db55844 | 4697 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 4698 | return -EIO; |
a66098da | 4699 | } |
bf3ca7f7 | 4700 | priv->irq = priv->pdev->irq; |
a66098da | 4701 | |
67e2eb27 | 4702 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 4703 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 4704 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 4705 | |
a66098da | 4706 | /* Enable interrupts */ |
c23b5a69 | 4707 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
12488e01 NS |
4708 | iowrite32(MWL8K_A2H_EVENTS, |
4709 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 4710 | |
2ec610cb LB |
4711 | rc = mwl8k_fw_lock(hw); |
4712 | if (!rc) { | |
55489b6e | 4713 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 4714 | |
5e4cf166 LB |
4715 | if (!priv->ap_fw) { |
4716 | if (!rc) | |
55489b6e | 4717 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 4718 | |
5e4cf166 LB |
4719 | if (!rc) |
4720 | rc = mwl8k_cmd_set_pre_scan(hw); | |
4721 | ||
4722 | if (!rc) | |
4723 | rc = mwl8k_cmd_set_post_scan(hw, | |
4724 | "\x00\x00\x00\x00\x00\x00"); | |
4725 | } | |
2ec610cb LB |
4726 | |
4727 | if (!rc) | |
55489b6e | 4728 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 4729 | |
2ec610cb | 4730 | if (!rc) |
55489b6e | 4731 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 4732 | |
2ec610cb LB |
4733 | mwl8k_fw_unlock(hw); |
4734 | } | |
4735 | ||
4736 | if (rc) { | |
4737 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
4738 | free_irq(priv->pdev->irq, hw); | |
bf3ca7f7 | 4739 | priv->irq = -1; |
1e9f9de3 | 4740 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4741 | tasklet_disable(&priv->poll_rx_task); |
4850b6d3 NS |
4742 | } else { |
4743 | ieee80211_wake_queues(hw); | |
2ec610cb | 4744 | } |
a66098da LB |
4745 | |
4746 | return rc; | |
4747 | } | |
4748 | ||
a66098da LB |
4749 | static void mwl8k_stop(struct ieee80211_hw *hw) |
4750 | { | |
a66098da LB |
4751 | struct mwl8k_priv *priv = hw->priv; |
4752 | int i; | |
4753 | ||
6b6accc3 YAP |
4754 | if (!priv->hw_restart_in_progress) |
4755 | mwl8k_cmd_radio_disable(hw); | |
a66098da LB |
4756 | |
4757 | ieee80211_stop_queues(hw); | |
4758 | ||
a66098da | 4759 | /* Disable interrupts */ |
a66098da | 4760 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
bf3ca7f7 BC |
4761 | if (priv->irq != -1) { |
4762 | free_irq(priv->pdev->irq, hw); | |
4763 | priv->irq = -1; | |
4764 | } | |
a66098da LB |
4765 | |
4766 | /* Stop finalize join worker */ | |
4767 | cancel_work_sync(&priv->finalize_join_worker); | |
3aefc37e | 4768 | cancel_work_sync(&priv->watchdog_ba_handle); |
a66098da LB |
4769 | if (priv->beacon_skb != NULL) |
4770 | dev_kfree_skb(priv->beacon_skb); | |
4771 | ||
67e2eb27 | 4772 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 4773 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4774 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 4775 | |
a66098da | 4776 | /* Return all skbs to mac80211 */ |
e600707b | 4777 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 4778 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
4779 | } |
4780 | ||
0863ade8 BC |
4781 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
4782 | ||
a66098da | 4783 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 4784 | struct ieee80211_vif *vif) |
a66098da LB |
4785 | { |
4786 | struct mwl8k_priv *priv = hw->priv; | |
4787 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 4788 | u32 macids_supported; |
0863ade8 BC |
4789 | int macid, rc; |
4790 | struct mwl8k_device_info *di; | |
a66098da | 4791 | |
a43c49a8 LB |
4792 | /* |
4793 | * Reject interface creation if sniffer mode is active, as | |
4794 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 4795 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
4796 | */ |
4797 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
4798 | wiphy_info(hw->wiphy, |
4799 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
4800 | return -EINVAL; |
4801 | } | |
4802 | ||
0863ade8 | 4803 | di = priv->device_info; |
ee0ddf18 LB |
4804 | switch (vif->type) { |
4805 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
4806 | if (!priv->ap_fw && di->fw_image_ap) { |
4807 | /* we must load the ap fw to meet this request */ | |
4808 | if (!list_empty(&priv->vif_list)) | |
4809 | return -EBUSY; | |
4810 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4811 | if (rc) | |
4812 | return rc; | |
4813 | } | |
ee0ddf18 LB |
4814 | macids_supported = priv->ap_macids_supported; |
4815 | break; | |
4816 | case NL80211_IFTYPE_STATION: | |
0863ade8 | 4817 | if (priv->ap_fw && di->fw_image_sta) { |
d59c1cfd YAP |
4818 | if (!list_empty(&priv->vif_list)) { |
4819 | wiphy_warn(hw->wiphy, "AP interface is running.\n" | |
4820 | "Adding STA interface for WDS"); | |
4821 | } else { | |
4822 | /* we must load the sta fw to | |
4823 | * meet this request. | |
4824 | */ | |
4825 | rc = mwl8k_reload_firmware(hw, | |
4826 | di->fw_image_sta); | |
4827 | if (rc) | |
4828 | return rc; | |
4829 | } | |
0863ade8 | 4830 | } |
ee0ddf18 LB |
4831 | macids_supported = priv->sta_macids_supported; |
4832 | break; | |
4833 | default: | |
4834 | return -EINVAL; | |
4835 | } | |
4836 | ||
4837 | macid = ffs(macids_supported & ~priv->macids_used); | |
4838 | if (!macid--) | |
4839 | return -EBUSY; | |
4840 | ||
f5bb87cf | 4841 | /* Setup driver private area. */ |
1ed32e4f | 4842 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4843 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 4844 | mwl8k_vif->vif = vif; |
ee0ddf18 | 4845 | mwl8k_vif->macid = macid; |
a66098da | 4846 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
4847 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
4848 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 4849 | |
aa21d0f6 LB |
4850 | /* Set the mac address. */ |
4851 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
4852 | ||
d994a1c8 | 4853 | if (vif->type == NL80211_IFTYPE_AP) |
aa21d0f6 LB |
4854 | mwl8k_cmd_set_new_stn_add_self(hw, vif); |
4855 | ||
ee0ddf18 | 4856 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 4857 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
4858 | |
4859 | return 0; | |
4860 | } | |
4861 | ||
6b6accc3 YAP |
4862 | static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif) |
4863 | { | |
4864 | /* Has ieee80211_restart_hw re-added the removed interfaces? */ | |
4865 | if (!priv->macids_used) | |
4866 | return; | |
4867 | ||
4868 | priv->macids_used &= ~(1 << vif->macid); | |
4869 | list_del(&vif->list); | |
4870 | } | |
4871 | ||
a66098da | 4872 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 4873 | struct ieee80211_vif *vif) |
a66098da LB |
4874 | { |
4875 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 4876 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4877 | |
d994a1c8 | 4878 | if (vif->type == NL80211_IFTYPE_AP) |
b64fe619 LB |
4879 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); |
4880 | ||
197a4e4e | 4881 | mwl8k_cmd_del_mac_addr(hw, vif, vif->addr); |
32060e1b | 4882 | |
6b6accc3 YAP |
4883 | mwl8k_remove_vif(priv, mwl8k_vif); |
4884 | } | |
4885 | ||
4886 | static void mwl8k_hw_restart_work(struct work_struct *work) | |
4887 | { | |
4888 | struct mwl8k_priv *priv = | |
4889 | container_of(work, struct mwl8k_priv, fw_reload); | |
4890 | struct ieee80211_hw *hw = priv->hw; | |
4891 | struct mwl8k_device_info *di; | |
4892 | int rc; | |
4893 | ||
4894 | /* If some command is waiting for a response, clear it */ | |
4895 | if (priv->hostcmd_wait != NULL) { | |
4896 | complete(priv->hostcmd_wait); | |
4897 | priv->hostcmd_wait = NULL; | |
4898 | } | |
4899 | ||
4900 | priv->hw_restart_owner = current; | |
4901 | di = priv->device_info; | |
4902 | mwl8k_fw_lock(hw); | |
4903 | ||
4904 | if (priv->ap_fw) | |
4905 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4906 | else | |
4907 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4908 | ||
4909 | if (rc) | |
4910 | goto fail; | |
4911 | ||
4912 | priv->hw_restart_owner = NULL; | |
4913 | priv->hw_restart_in_progress = false; | |
4914 | ||
4915 | /* | |
4916 | * This unlock will wake up the queues and | |
4917 | * also opens the command path for other | |
4918 | * commands | |
4919 | */ | |
4920 | mwl8k_fw_unlock(hw); | |
4921 | ||
4922 | ieee80211_restart_hw(hw); | |
4923 | ||
4924 | wiphy_err(hw->wiphy, "Firmware restarted successfully\n"); | |
4925 | ||
4926 | return; | |
4927 | fail: | |
4928 | mwl8k_fw_unlock(hw); | |
4929 | ||
4930 | wiphy_err(hw->wiphy, "Firmware restart failed\n"); | |
a66098da LB |
4931 | } |
4932 | ||
ee03a932 | 4933 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 4934 | { |
a66098da LB |
4935 | struct ieee80211_conf *conf = &hw->conf; |
4936 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 4937 | int rc; |
a66098da | 4938 | |
ee03a932 LB |
4939 | rc = mwl8k_fw_lock(hw); |
4940 | if (rc) | |
4941 | return rc; | |
a66098da | 4942 | |
fe21bb02 JG |
4943 | if (conf->flags & IEEE80211_CONF_IDLE) |
4944 | rc = mwl8k_cmd_radio_disable(hw); | |
4945 | else | |
4946 | rc = mwl8k_cmd_radio_enable(hw); | |
ee03a932 LB |
4947 | if (rc) |
4948 | goto out; | |
a66098da | 4949 | |
0f4316b9 YAP |
4950 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { |
4951 | rc = mwl8k_cmd_set_rf_channel(hw, conf); | |
4952 | if (rc) | |
4953 | goto out; | |
4954 | } | |
ee03a932 | 4955 | |
a66098da LB |
4956 | if (conf->power_level > 18) |
4957 | conf->power_level = 18; | |
a66098da | 4958 | |
08b06347 | 4959 | if (priv->ap_fw) { |
03217087 NS |
4960 | |
4961 | if (conf->flags & IEEE80211_CONF_CHANGE_POWER) { | |
4962 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); | |
4963 | if (rc) | |
4964 | goto out; | |
4965 | } | |
41fdf097 | 4966 | |
da62b761 | 4967 | |
08b06347 | 4968 | } else { |
41fdf097 NS |
4969 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
4970 | if (rc) | |
4971 | goto out; | |
08b06347 LB |
4972 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
4973 | } | |
a66098da | 4974 | |
ee03a932 LB |
4975 | out: |
4976 | mwl8k_fw_unlock(hw); | |
a66098da | 4977 | |
ee03a932 | 4978 | return rc; |
a66098da LB |
4979 | } |
4980 | ||
b64fe619 LB |
4981 | static void |
4982 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4983 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 4984 | { |
a66098da | 4985 | struct mwl8k_priv *priv = hw->priv; |
ba30c4a5 | 4986 | u32 ap_legacy_rates = 0; |
13935e2c | 4987 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
4988 | int rc; |
4989 | ||
c3cbbe8a | 4990 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 4991 | return; |
a66098da | 4992 | |
c3cbbe8a LB |
4993 | /* |
4994 | * No need to capture a beacon if we're no longer associated. | |
4995 | */ | |
4996 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
4997 | priv->capture_beacon = false; | |
3a980d0a | 4998 | |
c3cbbe8a | 4999 | /* |
13935e2c | 5000 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 5001 | */ |
7dc6a7a7 | 5002 | if (vif->bss_conf.assoc) { |
c6e96010 | 5003 | struct ieee80211_sta *ap; |
c97470dd | 5004 | |
c6e96010 | 5005 | rcu_read_lock(); |
c6e96010 | 5006 | |
c3cbbe8a LB |
5007 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
5008 | if (ap == NULL) { | |
5009 | rcu_read_unlock(); | |
c6e96010 | 5010 | goto out; |
c3cbbe8a LB |
5011 | } |
5012 | ||
57fbcce3 JB |
5013 | if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ) { |
5014 | ap_legacy_rates = ap->supp_rates[NL80211_BAND_2GHZ]; | |
8707d026 LB |
5015 | } else { |
5016 | ap_legacy_rates = | |
57fbcce3 | 5017 | ap->supp_rates[NL80211_BAND_5GHZ] << 5; |
8707d026 | 5018 | } |
13935e2c | 5019 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
5020 | |
5021 | rcu_read_unlock(); | |
c6e96010 | 5022 | |
bafc6e4c JL |
5023 | if (changed & BSS_CHANGED_ASSOC) { |
5024 | if (!priv->ap_fw) { | |
5025 | rc = mwl8k_cmd_set_rate(hw, vif, | |
5026 | ap_legacy_rates, | |
5027 | ap_mcs_rates); | |
5028 | if (rc) | |
5029 | goto out; | |
a66098da | 5030 | |
bafc6e4c JL |
5031 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
5032 | if (rc) | |
5033 | goto out; | |
5034 | } else { | |
5035 | int idx; | |
5036 | int rate; | |
dcee7438 | 5037 | |
bafc6e4c JL |
5038 | /* Use AP firmware specific rate command. |
5039 | */ | |
5040 | idx = ffs(vif->bss_conf.basic_rates); | |
5041 | if (idx) | |
5042 | idx--; | |
dcee7438 | 5043 | |
bafc6e4c | 5044 | if (hw->conf.chandef.chan->band == |
57fbcce3 | 5045 | NL80211_BAND_2GHZ) |
bafc6e4c JL |
5046 | rate = mwl8k_rates_24[idx].hw_value; |
5047 | else | |
5048 | rate = mwl8k_rates_50[idx].hw_value; | |
dcee7438 | 5049 | |
bafc6e4c JL |
5050 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); |
5051 | } | |
dcee7438 | 5052 | } |
c3cbbe8a | 5053 | } |
a66098da | 5054 | |
c3cbbe8a | 5055 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
5056 | rc = mwl8k_set_radio_preamble(hw, |
5057 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
5058 | if (rc) |
5059 | goto out; | |
c3cbbe8a | 5060 | } |
a66098da | 5061 | |
dcee7438 | 5062 | if ((changed & BSS_CHANGED_ERP_SLOT) && !priv->ap_fw) { |
7dc6a7a7 | 5063 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
5064 | if (rc) |
5065 | goto out; | |
c3cbbe8a | 5066 | } |
a66098da | 5067 | |
dcee7438 | 5068 | if (vif->bss_conf.assoc && !priv->ap_fw && |
c97470dd LB |
5069 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | |
5070 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 5071 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
5072 | if (rc) |
5073 | goto out; | |
c3cbbe8a | 5074 | } |
a66098da | 5075 | |
c3cbbe8a LB |
5076 | if (vif->bss_conf.assoc && |
5077 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
5078 | /* |
5079 | * Finalize the join. Tell rx handler to process | |
5080 | * next beacon from our BSSID. | |
5081 | */ | |
0a11dfc3 | 5082 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 5083 | priv->capture_beacon = true; |
a66098da LB |
5084 | } |
5085 | ||
3a980d0a LB |
5086 | out: |
5087 | mwl8k_fw_unlock(hw); | |
a66098da LB |
5088 | } |
5089 | ||
b64fe619 LB |
5090 | static void |
5091 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
5092 | struct ieee80211_bss_conf *info, u32 changed) | |
5093 | { | |
5094 | int rc; | |
5095 | ||
5096 | if (mwl8k_fw_lock(hw)) | |
5097 | return; | |
5098 | ||
5099 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
5100 | rc = mwl8k_set_radio_preamble(hw, | |
5101 | vif->bss_conf.use_short_preamble); | |
5102 | if (rc) | |
5103 | goto out; | |
5104 | } | |
5105 | ||
5106 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
5107 | int idx; | |
5108 | int rate; | |
5109 | ||
5110 | /* | |
5111 | * Use lowest supported basic rate for multicasts | |
5112 | * and management frames (such as probe responses -- | |
5113 | * beacons will always go out at 1 Mb/s). | |
5114 | */ | |
5115 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
5116 | if (idx) |
5117 | idx--; | |
5118 | ||
57fbcce3 | 5119 | if (hw->conf.chandef.chan->band == NL80211_BAND_2GHZ) |
8707d026 LB |
5120 | rate = mwl8k_rates_24[idx].hw_value; |
5121 | else | |
5122 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
5123 | |
5124 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
5125 | } | |
5126 | ||
5127 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
5128 | struct sk_buff *skb; | |
5129 | ||
5130 | skb = ieee80211_beacon_get(hw, vif); | |
5131 | if (skb != NULL) { | |
aa21d0f6 | 5132 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
5133 | kfree_skb(skb); |
5134 | } | |
5135 | } | |
5136 | ||
5137 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 5138 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
5139 | |
5140 | out: | |
5141 | mwl8k_fw_unlock(hw); | |
5142 | } | |
5143 | ||
5144 | static void | |
5145 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
5146 | struct ieee80211_bss_conf *info, u32 changed) | |
5147 | { | |
41bf9119 | 5148 | if (vif->type == NL80211_IFTYPE_STATION) |
b64fe619 | 5149 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); |
41bf9119 | 5150 | if (vif->type == NL80211_IFTYPE_AP) |
b64fe619 LB |
5151 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); |
5152 | } | |
5153 | ||
e81cd2d6 | 5154 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 5155 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
5156 | { |
5157 | struct mwl8k_cmd_pkt *cmd; | |
5158 | ||
447ced07 LB |
5159 | /* |
5160 | * Synthesize and return a command packet that programs the | |
5161 | * hardware multicast address filter. At this point we don't | |
5162 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
5163 | * we'll end up throwing this packet away and creating a new | |
5164 | * one in mwl8k_configure_filter(). | |
5165 | */ | |
22bedad3 | 5166 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
5167 | |
5168 | return (unsigned long)cmd; | |
5169 | } | |
5170 | ||
a43c49a8 LB |
5171 | static int |
5172 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
5173 | unsigned int changed_flags, | |
5174 | unsigned int *total_flags) | |
5175 | { | |
5176 | struct mwl8k_priv *priv = hw->priv; | |
5177 | ||
5178 | /* | |
5179 | * Hardware sniffer mode is mutually exclusive with STA | |
5180 | * operation, so refuse to enable sniffer mode if a STA | |
5181 | * interface is active. | |
5182 | */ | |
f5bb87cf | 5183 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 5184 | if (net_ratelimit()) |
c96c31e4 JP |
5185 | wiphy_info(hw->wiphy, |
5186 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
5187 | return 0; |
5188 | } | |
5189 | ||
5190 | if (!priv->sniffer_enabled) { | |
55489b6e | 5191 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
5192 | return 0; |
5193 | priv->sniffer_enabled = true; | |
5194 | } | |
5195 | ||
df140465 | 5196 | *total_flags &= FIF_ALLMULTI | |
a43c49a8 LB |
5197 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | |
5198 | FIF_OTHER_BSS; | |
5199 | ||
5200 | return 1; | |
5201 | } | |
5202 | ||
f5bb87cf LB |
5203 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
5204 | { | |
5205 | if (!list_empty(&priv->vif_list)) | |
5206 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
5207 | ||
5208 | return NULL; | |
5209 | } | |
5210 | ||
e6935ea1 LB |
5211 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
5212 | unsigned int changed_flags, | |
5213 | unsigned int *total_flags, | |
5214 | u64 multicast) | |
5215 | { | |
5216 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
5217 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
5218 | ||
c0adae2c LB |
5219 | /* |
5220 | * AP firmware doesn't allow fine-grained control over | |
5221 | * the receive filter. | |
5222 | */ | |
5223 | if (priv->ap_fw) { | |
5224 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
5225 | kfree(cmd); | |
5226 | return; | |
5227 | } | |
5228 | ||
a43c49a8 LB |
5229 | /* |
5230 | * Enable hardware sniffer mode if FIF_CONTROL or | |
5231 | * FIF_OTHER_BSS is requested. | |
5232 | */ | |
5233 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
5234 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
5235 | kfree(cmd); | |
5236 | return; | |
5237 | } | |
a66098da | 5238 | |
e6935ea1 | 5239 | /* Clear unsupported feature flags */ |
447ced07 | 5240 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 5241 | |
90852f7a LB |
5242 | if (mwl8k_fw_lock(hw)) { |
5243 | kfree(cmd); | |
e6935ea1 | 5244 | return; |
90852f7a | 5245 | } |
a66098da | 5246 | |
a43c49a8 | 5247 | if (priv->sniffer_enabled) { |
55489b6e | 5248 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
5249 | priv->sniffer_enabled = false; |
5250 | } | |
5251 | ||
e6935ea1 | 5252 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
5253 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
5254 | /* | |
5255 | * Disable the BSS filter. | |
5256 | */ | |
e6935ea1 | 5257 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 5258 | } else { |
f5bb87cf | 5259 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 5260 | const u8 *bssid; |
a94cc97e | 5261 | |
77165d88 LB |
5262 | /* |
5263 | * Enable the BSS filter. | |
5264 | * | |
5265 | * If there is an active STA interface, use that | |
5266 | * interface's BSSID, otherwise use a dummy one | |
5267 | * (where the OUI part needs to be nonzero for | |
5268 | * the BSSID to be accepted by POST_SCAN). | |
5269 | */ | |
f5bb87cf LB |
5270 | mwl8k_vif = mwl8k_first_vif(priv); |
5271 | if (mwl8k_vif != NULL) | |
5272 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
5273 | else | |
5274 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 5275 | |
e6935ea1 | 5276 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
5277 | } |
5278 | } | |
5279 | ||
447ced07 LB |
5280 | /* |
5281 | * If FIF_ALLMULTI is being requested, throw away the command | |
5282 | * packet that ->prepare_multicast() built and replace it with | |
5283 | * a command packet that enables reception of all multicast | |
5284 | * packets. | |
5285 | */ | |
5286 | if (*total_flags & FIF_ALLMULTI) { | |
5287 | kfree(cmd); | |
22bedad3 | 5288 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
5289 | } |
5290 | ||
5291 | if (cmd != NULL) { | |
5292 | mwl8k_post_cmd(hw, cmd); | |
5293 | kfree(cmd); | |
e6935ea1 | 5294 | } |
a66098da | 5295 | |
e6935ea1 | 5296 | mwl8k_fw_unlock(hw); |
a66098da LB |
5297 | } |
5298 | ||
a66098da LB |
5299 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
5300 | { | |
c2c2b12a | 5301 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
5302 | } |
5303 | ||
4a6967b8 JB |
5304 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
5305 | struct ieee80211_vif *vif, | |
5306 | struct ieee80211_sta *sta) | |
3f5610ff LB |
5307 | { |
5308 | struct mwl8k_priv *priv = hw->priv; | |
5309 | ||
4a6967b8 JB |
5310 | if (priv->ap_fw) |
5311 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
5312 | else | |
5313 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
5314 | } |
5315 | ||
4a6967b8 JB |
5316 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
5317 | struct ieee80211_vif *vif, | |
5318 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
5319 | { |
5320 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 5321 | int ret; |
fcdc403c NS |
5322 | int i; |
5323 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
5324 | struct ieee80211_key_conf *key; | |
bbfd9128 | 5325 | |
4a6967b8 JB |
5326 | if (!priv->ap_fw) { |
5327 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
5328 | if (ret >= 0) { | |
5329 | MWL8K_STA(sta)->peer_id = ret; | |
17033543 NS |
5330 | if (sta->ht_cap.ht_supported) |
5331 | MWL8K_STA(sta)->is_ampdu_allowed = true; | |
fcdc403c | 5332 | ret = 0; |
4a6967b8 | 5333 | } |
bbfd9128 | 5334 | |
d9a07d49 NS |
5335 | } else { |
5336 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 5337 | } |
4a6967b8 | 5338 | |
d9a07d49 NS |
5339 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
5340 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
5341 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
5342 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
5343 | } | |
fcdc403c | 5344 | return ret; |
bbfd9128 LB |
5345 | } |
5346 | ||
8a3a3c85 EP |
5347 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, |
5348 | struct ieee80211_vif *vif, u16 queue, | |
a66098da LB |
5349 | const struct ieee80211_tx_queue_params *params) |
5350 | { | |
3e4f542c | 5351 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5352 | int rc; |
a66098da | 5353 | |
3e4f542c LB |
5354 | rc = mwl8k_fw_lock(hw); |
5355 | if (!rc) { | |
e600707b | 5356 | BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1); |
0863ade8 BC |
5357 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); |
5358 | ||
3e4f542c | 5359 | if (!priv->wmm_enabled) |
55489b6e | 5360 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 5361 | |
85c9205c | 5362 | if (!rc) { |
e600707b | 5363 | int q = MWL8K_TX_WMM_QUEUES - 1 - queue; |
85c9205c | 5364 | rc = mwl8k_cmd_set_edca_params(hw, q, |
55489b6e LB |
5365 | params->cw_min, |
5366 | params->cw_max, | |
5367 | params->aifs, | |
5368 | params->txop); | |
85c9205c | 5369 | } |
3e4f542c LB |
5370 | |
5371 | mwl8k_fw_unlock(hw); | |
a66098da | 5372 | } |
3e4f542c | 5373 | |
a66098da LB |
5374 | return rc; |
5375 | } | |
5376 | ||
a66098da LB |
5377 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
5378 | struct ieee80211_low_level_stats *stats) | |
5379 | { | |
55489b6e | 5380 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
5381 | } |
5382 | ||
0d462bbb JL |
5383 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
5384 | struct survey_info *survey) | |
5385 | { | |
5386 | struct mwl8k_priv *priv = hw->priv; | |
5387 | struct ieee80211_conf *conf = &hw->conf; | |
031eb464 YAP |
5388 | struct ieee80211_supported_band *sband; |
5389 | ||
5390 | if (priv->ap_fw) { | |
57fbcce3 | 5391 | sband = hw->wiphy->bands[NL80211_BAND_2GHZ]; |
031eb464 YAP |
5392 | |
5393 | if (sband && idx >= sband->n_channels) { | |
5394 | idx -= sband->n_channels; | |
5395 | sband = NULL; | |
5396 | } | |
5397 | ||
5398 | if (!sband) | |
57fbcce3 | 5399 | sband = hw->wiphy->bands[NL80211_BAND_5GHZ]; |
031eb464 YAP |
5400 | |
5401 | if (!sband || idx >= sband->n_channels) | |
5402 | return -ENOENT; | |
5403 | ||
5404 | memcpy(survey, &priv->survey[idx], sizeof(*survey)); | |
5405 | survey->channel = &sband->channels[idx]; | |
5406 | ||
5407 | return 0; | |
5408 | } | |
0d462bbb JL |
5409 | |
5410 | if (idx != 0) | |
5411 | return -ENOENT; | |
5412 | ||
675a0b04 | 5413 | survey->channel = conf->chandef.chan; |
0d462bbb JL |
5414 | survey->filled = SURVEY_INFO_NOISE_DBM; |
5415 | survey->noise = priv->noise; | |
5416 | ||
5417 | return 0; | |
5418 | } | |
5419 | ||
65f3ddcd NS |
5420 | #define MAX_AMPDU_ATTEMPTS 5 |
5421 | ||
a2292d83 LB |
5422 | static int |
5423 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
50ea05ef | 5424 | struct ieee80211_ampdu_params *params) |
a2292d83 | 5425 | { |
50ea05ef SS |
5426 | struct ieee80211_sta *sta = params->sta; |
5427 | enum ieee80211_ampdu_mlme_action action = params->action; | |
5428 | u16 tid = params->tid; | |
5429 | u16 *ssn = ¶ms->ssn; | |
5430 | u8 buf_size = params->buf_size; | |
65f3ddcd NS |
5431 | int i, rc = 0; |
5432 | struct mwl8k_priv *priv = hw->priv; | |
5433 | struct mwl8k_ampdu_stream *stream; | |
07f6dda1 | 5434 | u8 *addr = sta->addr, idx; |
fd712f5f | 5435 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); |
65f3ddcd | 5436 | |
30686bf7 | 5437 | if (!ieee80211_hw_check(hw, AMPDU_AGGREGATION)) |
65f3ddcd NS |
5438 | return -ENOTSUPP; |
5439 | ||
5440 | spin_lock(&priv->stream_lock); | |
5441 | stream = mwl8k_lookup_stream(hw, addr, tid); | |
5442 | ||
a2292d83 LB |
5443 | switch (action) { |
5444 | case IEEE80211_AMPDU_RX_START: | |
5445 | case IEEE80211_AMPDU_RX_STOP: | |
65f3ddcd NS |
5446 | break; |
5447 | case IEEE80211_AMPDU_TX_START: | |
5448 | /* By the time we get here the hw queues may contain outgoing | |
5449 | * packets for this RA/TID that are not part of this BA | |
5450 | * session. The hw will assign sequence numbers to these | |
5451 | * packets as they go out. So if we query the hw for its next | |
5452 | * sequence number and use that for the SSN here, it may end up | |
5453 | * being wrong, which will lead to sequence number mismatch at | |
5454 | * the recipient. To avoid this, we reset the sequence number | |
5455 | * to O for the first MPDU in this BA stream. | |
5456 | */ | |
5457 | *ssn = 0; | |
5458 | if (stream == NULL) { | |
5459 | /* This means that somebody outside this driver called | |
5460 | * ieee80211_start_tx_ba_session. This is unexpected | |
5461 | * because we do our own rate control. Just warn and | |
5462 | * move on. | |
5463 | */ | |
5464 | wiphy_warn(hw->wiphy, "Unexpected call to %s. " | |
5465 | "Proceeding anyway.\n", __func__); | |
5466 | stream = mwl8k_add_stream(hw, sta, tid); | |
5467 | } | |
5468 | if (stream == NULL) { | |
5469 | wiphy_debug(hw->wiphy, "no free AMPDU streams\n"); | |
5470 | rc = -EBUSY; | |
5471 | break; | |
5472 | } | |
5473 | stream->state = AMPDU_STREAM_IN_PROGRESS; | |
5474 | ||
5475 | /* Release the lock before we do the time consuming stuff */ | |
5476 | spin_unlock(&priv->stream_lock); | |
5477 | for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) { | |
fd712f5f YAP |
5478 | |
5479 | /* Check if link is still valid */ | |
5480 | if (!sta_info->is_ampdu_allowed) { | |
5481 | spin_lock(&priv->stream_lock); | |
5482 | mwl8k_remove_stream(hw, stream); | |
5483 | spin_unlock(&priv->stream_lock); | |
5484 | return -EBUSY; | |
5485 | } | |
5486 | ||
f95275c4 | 5487 | rc = mwl8k_check_ba(hw, stream, vif); |
65f3ddcd | 5488 | |
6b6accc3 YAP |
5489 | /* If HW restart is in progress mwl8k_post_cmd will |
5490 | * return -EBUSY. Avoid retrying mwl8k_check_ba in | |
5491 | * such cases | |
5492 | */ | |
5493 | if (!rc || rc == -EBUSY) | |
65f3ddcd NS |
5494 | break; |
5495 | /* | |
5496 | * HW queues take time to be flushed, give them | |
5497 | * sufficient time | |
5498 | */ | |
5499 | ||
5500 | msleep(1000); | |
5501 | } | |
5502 | spin_lock(&priv->stream_lock); | |
5503 | if (rc) { | |
5504 | wiphy_err(hw->wiphy, "Stream for tid %d busy after %d" | |
5505 | " attempts\n", tid, MAX_AMPDU_ATTEMPTS); | |
5506 | mwl8k_remove_stream(hw, stream); | |
5507 | rc = -EBUSY; | |
5508 | break; | |
5509 | } | |
5510 | ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid); | |
5511 | break; | |
18b559d5 JB |
5512 | case IEEE80211_AMPDU_TX_STOP_CONT: |
5513 | case IEEE80211_AMPDU_TX_STOP_FLUSH: | |
5514 | case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: | |
eca107ff YAP |
5515 | if (stream) { |
5516 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
07f6dda1 | 5517 | idx = stream->idx; |
eca107ff | 5518 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5519 | mwl8k_destroy_ba(hw, idx); |
eca107ff YAP |
5520 | spin_lock(&priv->stream_lock); |
5521 | } | |
5522 | mwl8k_remove_stream(hw, stream); | |
65f3ddcd | 5523 | } |
65f3ddcd NS |
5524 | ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid); |
5525 | break; | |
5526 | case IEEE80211_AMPDU_TX_OPERATIONAL: | |
5527 | BUG_ON(stream == NULL); | |
5528 | BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS); | |
5529 | spin_unlock(&priv->stream_lock); | |
f95275c4 | 5530 | rc = mwl8k_create_ba(hw, stream, buf_size, vif); |
65f3ddcd NS |
5531 | spin_lock(&priv->stream_lock); |
5532 | if (!rc) | |
5533 | stream->state = AMPDU_STREAM_ACTIVE; | |
5534 | else { | |
07f6dda1 | 5535 | idx = stream->idx; |
65f3ddcd | 5536 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5537 | mwl8k_destroy_ba(hw, idx); |
65f3ddcd NS |
5538 | spin_lock(&priv->stream_lock); |
5539 | wiphy_debug(hw->wiphy, | |
5540 | "Failed adding stream for sta %pM tid %d\n", | |
5541 | addr, tid); | |
5542 | mwl8k_remove_stream(hw, stream); | |
5543 | } | |
5544 | break; | |
5545 | ||
a2292d83 | 5546 | default: |
65f3ddcd | 5547 | rc = -ENOTSUPP; |
a2292d83 | 5548 | } |
65f3ddcd NS |
5549 | |
5550 | spin_unlock(&priv->stream_lock); | |
5551 | return rc; | |
a2292d83 LB |
5552 | } |
5553 | ||
a344d677 JB |
5554 | static void mwl8k_sw_scan_start(struct ieee80211_hw *hw, |
5555 | struct ieee80211_vif *vif, | |
5556 | const u8 *mac_addr) | |
4c924f42 YAP |
5557 | { |
5558 | struct mwl8k_priv *priv = hw->priv; | |
5559 | u8 tmp; | |
5560 | ||
5561 | if (!priv->ap_fw) | |
5562 | return; | |
5563 | ||
5564 | /* clear all stats */ | |
031eb464 | 5565 | priv->channel_time = 0; |
4c924f42 YAP |
5566 | ioread32(priv->regs + BBU_RXRDY_CNT_REG); |
5567 | ioread32(priv->regs + NOK_CCA_CNT_REG); | |
5568 | mwl8k_cmd_bbp_reg_access(priv->hw, 0, BBU_AVG_NOISE_VAL, &tmp); | |
5569 | ||
5570 | priv->sw_scan_start = true; | |
5571 | } | |
5572 | ||
a344d677 JB |
5573 | static void mwl8k_sw_scan_complete(struct ieee80211_hw *hw, |
5574 | struct ieee80211_vif *vif) | |
4c924f42 YAP |
5575 | { |
5576 | struct mwl8k_priv *priv = hw->priv; | |
5577 | u8 tmp; | |
5578 | ||
5579 | if (!priv->ap_fw) | |
5580 | return; | |
5581 | ||
5582 | priv->sw_scan_start = false; | |
5583 | ||
5584 | /* clear all stats */ | |
031eb464 | 5585 | priv->channel_time = 0; |
4c924f42 YAP |
5586 | ioread32(priv->regs + BBU_RXRDY_CNT_REG); |
5587 | ioread32(priv->regs + NOK_CCA_CNT_REG); | |
5588 | mwl8k_cmd_bbp_reg_access(priv->hw, 0, BBU_AVG_NOISE_VAL, &tmp); | |
5589 | } | |
5590 | ||
a66098da LB |
5591 | static const struct ieee80211_ops mwl8k_ops = { |
5592 | .tx = mwl8k_tx, | |
5593 | .start = mwl8k_start, | |
5594 | .stop = mwl8k_stop, | |
5595 | .add_interface = mwl8k_add_interface, | |
5596 | .remove_interface = mwl8k_remove_interface, | |
5597 | .config = mwl8k_config, | |
a66098da | 5598 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 5599 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 5600 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 5601 | .set_key = mwl8k_set_key, |
a66098da | 5602 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
5603 | .sta_add = mwl8k_sta_add, |
5604 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 5605 | .conf_tx = mwl8k_conf_tx, |
a66098da | 5606 | .get_stats = mwl8k_get_stats, |
0d462bbb | 5607 | .get_survey = mwl8k_get_survey, |
a2292d83 | 5608 | .ampdu_action = mwl8k_ampdu_action, |
4c924f42 YAP |
5609 | .sw_scan_start = mwl8k_sw_scan_start, |
5610 | .sw_scan_complete = mwl8k_sw_scan_complete, | |
a66098da LB |
5611 | }; |
5612 | ||
a66098da LB |
5613 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
5614 | { | |
5615 | struct mwl8k_priv *priv = | |
5616 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
5617 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
5618 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
5619 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
5620 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
5621 | mgmt->u.beacon.variable, len); | |
5622 | int dtim_period = 1; | |
5623 | ||
5624 | if (tim && tim[1] >= 2) | |
5625 | dtim_period = tim[3]; | |
a66098da | 5626 | |
56007a02 | 5627 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 5628 | |
f5bb87cf | 5629 | dev_kfree_skb(skb); |
a66098da LB |
5630 | priv->beacon_skb = NULL; |
5631 | } | |
5632 | ||
bcb628d5 | 5633 | enum { |
9e1b17ea LB |
5634 | MWL8363 = 0, |
5635 | MWL8687, | |
bcb628d5 | 5636 | MWL8366, |
d926dc7d | 5637 | MWL8764, |
6f6d1e9a LB |
5638 | }; |
5639 | ||
c2f2e202 | 5640 | #define MWL8K_8366_AP_FW_API 3 |
952a0e96 BC |
5641 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" |
5642 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
5643 | ||
d926dc7d NS |
5644 | #define MWL8K_8764_AP_FW_API 1 |
5645 | #define _MWL8K_8764_AP_FW(api) "mwl8k/fmimage_8764_ap-" #api ".fw" | |
5646 | #define MWL8K_8764_AP_FW(api) _MWL8K_8764_AP_FW(api) | |
5647 | ||
8dee5eef | 5648 | static struct mwl8k_device_info mwl8k_info_tbl[] = { |
9e1b17ea LB |
5649 | [MWL8363] = { |
5650 | .part_name = "88w8363", | |
5651 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 5652 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 5653 | }, |
49eb691c | 5654 | [MWL8687] = { |
bcb628d5 JL |
5655 | .part_name = "88w8687", |
5656 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 5657 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 5658 | }, |
49eb691c | 5659 | [MWL8366] = { |
bcb628d5 JL |
5660 | .part_name = "88w8366", |
5661 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 5662 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
5663 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
5664 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
d926dc7d NS |
5665 | .ap_rxd_ops = &rxd_ap_ops, |
5666 | }, | |
5667 | [MWL8764] = { | |
5668 | .part_name = "88w8764", | |
5669 | .fw_image_ap = MWL8K_8764_AP_FW(MWL8K_8764_AP_FW_API), | |
5670 | .fw_api_ap = MWL8K_8764_AP_FW_API, | |
5671 | .ap_rxd_ops = &rxd_ap_ops, | |
bcb628d5 | 5672 | }, |
45a390dd LB |
5673 | }; |
5674 | ||
c92d4ede LB |
5675 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
5676 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
5677 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
5678 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
5679 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
5680 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 5681 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 5682 | |
9baa3c34 | 5683 | static const struct pci_device_id mwl8k_pci_id_table[] = { |
e5868ba1 | 5684 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
5685 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
5686 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
5687 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
5688 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
5689 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
fc5bc165 JG |
5690 | { PCI_VDEVICE(MARVELL, 0x2a41), .driver_data = MWL8366, }, |
5691 | { PCI_VDEVICE(MARVELL, 0x2a42), .driver_data = MWL8366, }, | |
ca66527c | 5692 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
d926dc7d | 5693 | { PCI_VDEVICE(MARVELL, 0x2b36), .driver_data = MWL8764, }, |
bcb628d5 | 5694 | { }, |
45a390dd LB |
5695 | }; |
5696 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
5697 | ||
99020471 BC |
5698 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
5699 | { | |
5700 | int rc; | |
5701 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
5702 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
5703 | priv->fw_pref, priv->fw_alt); | |
5704 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
5705 | if (rc) { | |
5706 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5707 | pci_name(priv->pdev), priv->fw_alt); | |
5708 | return rc; | |
5709 | } | |
5710 | return 0; | |
5711 | } | |
5712 | ||
5713 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
5714 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
5715 | { | |
5716 | struct mwl8k_priv *priv = context; | |
5717 | struct mwl8k_device_info *di = priv->device_info; | |
5718 | int rc; | |
5719 | ||
5720 | switch (priv->fw_state) { | |
5721 | case FW_STATE_INIT: | |
5722 | if (!fw) { | |
5723 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
5724 | pci_name(priv->pdev), di->helper_image); | |
5725 | goto fail; | |
5726 | } | |
5727 | priv->fw_helper = fw; | |
5728 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
5729 | true); | |
5730 | if (rc && priv->fw_alt) { | |
5731 | rc = mwl8k_request_alt_fw(priv); | |
5732 | if (rc) | |
5733 | goto fail; | |
5734 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5735 | } else if (rc) | |
5736 | goto fail; | |
5737 | else | |
5738 | priv->fw_state = FW_STATE_LOADING_PREF; | |
5739 | break; | |
5740 | ||
5741 | case FW_STATE_LOADING_PREF: | |
5742 | if (!fw) { | |
5743 | if (priv->fw_alt) { | |
5744 | rc = mwl8k_request_alt_fw(priv); | |
5745 | if (rc) | |
5746 | goto fail; | |
5747 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5748 | } else | |
5749 | goto fail; | |
5750 | } else { | |
5751 | priv->fw_ucode = fw; | |
5752 | rc = mwl8k_firmware_load_success(priv); | |
5753 | if (rc) | |
5754 | goto fail; | |
5755 | else | |
5756 | complete(&priv->firmware_loading_complete); | |
5757 | } | |
5758 | break; | |
5759 | ||
5760 | case FW_STATE_LOADING_ALT: | |
5761 | if (!fw) { | |
5762 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5763 | pci_name(priv->pdev), di->helper_image); | |
5764 | goto fail; | |
5765 | } | |
5766 | priv->fw_ucode = fw; | |
5767 | rc = mwl8k_firmware_load_success(priv); | |
5768 | if (rc) | |
5769 | goto fail; | |
5770 | else | |
5771 | complete(&priv->firmware_loading_complete); | |
5772 | break; | |
5773 | ||
5774 | default: | |
5775 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
5776 | MWL8K_NAME, priv->fw_state); | |
5777 | BUG_ON(1); | |
5778 | } | |
5779 | ||
5780 | return; | |
5781 | ||
5782 | fail: | |
5783 | priv->fw_state = FW_STATE_ERROR; | |
5784 | complete(&priv->firmware_loading_complete); | |
5785 | device_release_driver(&priv->pdev->dev); | |
5786 | mwl8k_release_firmware(priv); | |
5787 | } | |
5788 | ||
6b6accc3 | 5789 | #define MAX_RESTART_ATTEMPTS 1 |
99020471 BC |
5790 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, |
5791 | bool nowait) | |
a66098da | 5792 | { |
3cc7772c | 5793 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5794 | int rc; |
6b6accc3 | 5795 | int count = MAX_RESTART_ATTEMPTS; |
be695fc4 | 5796 | |
6b6accc3 | 5797 | retry: |
be695fc4 LB |
5798 | /* Reset firmware and hardware */ |
5799 | mwl8k_hw_reset(priv); | |
5800 | ||
5801 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 5802 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 5803 | if (rc) { |
5db55844 | 5804 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 5805 | return rc; |
be695fc4 LB |
5806 | } |
5807 | ||
99020471 BC |
5808 | if (nowait) |
5809 | return rc; | |
5810 | ||
be695fc4 LB |
5811 | /* Load firmware into hardware */ |
5812 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 5813 | if (rc) |
5db55844 | 5814 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
5815 | |
5816 | /* Reclaim memory once firmware is successfully loaded */ | |
5817 | mwl8k_release_firmware(priv); | |
5818 | ||
6b6accc3 YAP |
5819 | if (rc && count) { |
5820 | /* FW did not start successfully; | |
5821 | * lets try one more time | |
5822 | */ | |
5823 | count--; | |
5824 | wiphy_err(hw->wiphy, "Trying to reload the firmware again\n"); | |
5825 | msleep(20); | |
5826 | goto retry; | |
5827 | } | |
5828 | ||
3cc7772c BC |
5829 | return rc; |
5830 | } | |
5831 | ||
73b46320 BC |
5832 | static int mwl8k_init_txqs(struct ieee80211_hw *hw) |
5833 | { | |
5834 | struct mwl8k_priv *priv = hw->priv; | |
5835 | int rc = 0; | |
5836 | int i; | |
5837 | ||
e600707b | 5838 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
73b46320 BC |
5839 | rc = mwl8k_txq_init(hw, i); |
5840 | if (rc) | |
5841 | break; | |
5842 | if (priv->ap_fw) | |
5843 | iowrite32(priv->txq[i].txd_dma, | |
5844 | priv->sram + priv->txq_offset[i]); | |
5845 | } | |
5846 | return rc; | |
5847 | } | |
5848 | ||
3cc7772c BC |
5849 | /* initialize hw after successfully loading a firmware image */ |
5850 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
5851 | { | |
5852 | struct mwl8k_priv *priv = hw->priv; | |
5853 | int rc = 0; | |
5854 | int i; | |
be695fc4 | 5855 | |
91942230 | 5856 | if (priv->ap_fw) { |
89a91f4f | 5857 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 5858 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
5859 | wiphy_err(hw->wiphy, |
5860 | "Driver does not have AP firmware image support for this hardware\n"); | |
a2ca8ecb | 5861 | rc = -ENOENT; |
91942230 LB |
5862 | goto err_stop_firmware; |
5863 | } | |
5864 | } else { | |
89a91f4f | 5865 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 5866 | } |
be695fc4 LB |
5867 | |
5868 | priv->sniffer_enabled = false; | |
5869 | priv->wmm_enabled = false; | |
5870 | priv->pending_tx_pkts = 0; | |
c27a54d3 | 5871 | atomic_set(&priv->watchdog_event_pending, 0); |
be695fc4 | 5872 | |
a66098da LB |
5873 | rc = mwl8k_rxq_init(hw, 0); |
5874 | if (rc) | |
3cc7772c | 5875 | goto err_stop_firmware; |
a66098da LB |
5876 | rxq_refill(hw, 0, INT_MAX); |
5877 | ||
73b46320 BC |
5878 | /* For the sta firmware, we need to know the dma addresses of tx queues |
5879 | * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them | |
5880 | * prior to issuing this command. But for the AP case, we learn the | |
5881 | * total number of queues from the result CMD_GET_HW_SPEC, so for this | |
5882 | * case we must initialize the tx queues after. | |
5883 | */ | |
8a7a578c | 5884 | priv->num_ampdu_queues = 0; |
73b46320 BC |
5885 | if (!priv->ap_fw) { |
5886 | rc = mwl8k_init_txqs(hw); | |
a66098da LB |
5887 | if (rc) |
5888 | goto err_free_queues; | |
5889 | } | |
5890 | ||
5891 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 5892 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3aefc37e NS |
5893 | iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY| |
5894 | MWL8K_A2H_INT_BA_WATCHDOG, | |
1e9f9de3 | 5895 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
12488e01 NS |
5896 | iowrite32(MWL8K_A2H_INT_OPC_DONE, |
5897 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 5898 | |
a0607fd3 | 5899 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
5900 | IRQF_SHARED, MWL8K_NAME, hw); |
5901 | if (rc) { | |
5db55844 | 5902 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
5903 | goto err_free_queues; |
5904 | } | |
5905 | ||
6b6accc3 YAP |
5906 | /* |
5907 | * When hw restart is requested, | |
5908 | * mac80211 will take care of clearing | |
5909 | * the ampdu streams, so do not clear | |
5910 | * the ampdu state here | |
5911 | */ | |
5912 | if (!priv->hw_restart_in_progress) | |
5913 | memset(priv->ampdu, 0, sizeof(priv->ampdu)); | |
ac109fd0 | 5914 | |
a66098da LB |
5915 | /* |
5916 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 5917 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
5918 | * interrupts when done. |
5919 | */ | |
c23b5a69 | 5920 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5921 | |
5922 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
5923 | if (priv->ap_fw) { |
5924 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
73b46320 BC |
5925 | if (!rc) |
5926 | rc = mwl8k_init_txqs(hw); | |
42fba21d LB |
5927 | if (!rc) |
5928 | rc = mwl8k_cmd_set_hw_spec(hw); | |
5929 | } else { | |
5930 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
5931 | } | |
a66098da | 5932 | if (rc) { |
5db55844 | 5933 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 5934 | goto err_free_irq; |
a66098da LB |
5935 | } |
5936 | ||
5937 | /* Turn radio off */ | |
55489b6e | 5938 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 5939 | if (rc) { |
5db55844 | 5940 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 5941 | goto err_free_irq; |
a66098da LB |
5942 | } |
5943 | ||
32060e1b | 5944 | /* Clear MAC address */ |
aa21d0f6 | 5945 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 5946 | if (rc) { |
5db55844 | 5947 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 5948 | goto err_free_irq; |
32060e1b LB |
5949 | } |
5950 | ||
a246ac38 YAP |
5951 | /* Configure Antennas */ |
5952 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); | |
5953 | if (rc) | |
5954 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
5955 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
5956 | if (rc) | |
5957 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
5958 | ||
5959 | ||
a66098da | 5960 | /* Disable interrupts */ |
a66098da | 5961 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5962 | free_irq(priv->pdev->irq, hw); |
5963 | ||
c96c31e4 JP |
5964 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
5965 | priv->device_info->part_name, | |
5966 | priv->hw_rev, hw->wiphy->perm_addr, | |
5967 | priv->ap_fw ? "AP" : "STA", | |
5968 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
5969 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
5970 | |
5971 | return 0; | |
5972 | ||
a66098da | 5973 | err_free_irq: |
a66098da | 5974 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5975 | free_irq(priv->pdev->irq, hw); |
5976 | ||
5977 | err_free_queues: | |
e600707b | 5978 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5979 | mwl8k_txq_deinit(hw, i); |
5980 | mwl8k_rxq_deinit(hw, 0); | |
5981 | ||
3cc7772c BC |
5982 | err_stop_firmware: |
5983 | mwl8k_hw_reset(priv); | |
5984 | ||
5985 | return rc; | |
5986 | } | |
5987 | ||
5988 | /* | |
5989 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
5990 | * has already been registered | |
5991 | */ | |
5992 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
5993 | { | |
5994 | int i, rc = 0; | |
5995 | struct mwl8k_priv *priv = hw->priv; | |
6b6accc3 | 5996 | struct mwl8k_vif *vif, *tmp_vif; |
3cc7772c BC |
5997 | |
5998 | mwl8k_stop(hw); | |
5999 | mwl8k_rxq_deinit(hw, 0); | |
6000 | ||
6b6accc3 YAP |
6001 | /* |
6002 | * All the existing interfaces are re-added by the ieee80211_reconfig; | |
6003 | * which means driver should remove existing interfaces before calling | |
6004 | * ieee80211_restart_hw | |
6005 | */ | |
6006 | if (priv->hw_restart_in_progress) | |
6007 | list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list) | |
6008 | mwl8k_remove_vif(priv, vif); | |
6009 | ||
e600707b | 6010 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
6011 | mwl8k_txq_deinit(hw, i); |
6012 | ||
99020471 | 6013 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
6014 | if (rc) |
6015 | goto fail; | |
6016 | ||
6017 | rc = mwl8k_probe_hw(hw); | |
6018 | if (rc) | |
6019 | goto fail; | |
6020 | ||
6b6accc3 YAP |
6021 | if (priv->hw_restart_in_progress) |
6022 | return rc; | |
6023 | ||
3cc7772c BC |
6024 | rc = mwl8k_start(hw); |
6025 | if (rc) | |
6026 | goto fail; | |
6027 | ||
6028 | rc = mwl8k_config(hw, ~0); | |
6029 | if (rc) | |
6030 | goto fail; | |
6031 | ||
e600707b | 6032 | for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) { |
8a3a3c85 | 6033 | rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]); |
3cc7772c BC |
6034 | if (rc) |
6035 | goto fail; | |
6036 | } | |
6037 | ||
6038 | return rc; | |
6039 | ||
6040 | fail: | |
6041 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
6042 | return rc; | |
6043 | } | |
6044 | ||
5d377fca YAP |
6045 | static const struct ieee80211_iface_limit ap_if_limits[] = { |
6046 | { .max = 8, .types = BIT(NL80211_IFTYPE_AP) }, | |
2acdaa7a | 6047 | { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) }, |
5d377fca YAP |
6048 | }; |
6049 | ||
6050 | static const struct ieee80211_iface_combination ap_if_comb = { | |
6051 | .limits = ap_if_limits, | |
6052 | .n_limits = ARRAY_SIZE(ap_if_limits), | |
6053 | .max_interfaces = 8, | |
6054 | .num_different_channels = 1, | |
6055 | }; | |
6056 | ||
6057 | ||
3cc7772c BC |
6058 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) |
6059 | { | |
6060 | struct ieee80211_hw *hw = priv->hw; | |
6061 | int i, rc; | |
6062 | ||
99020471 BC |
6063 | rc = mwl8k_load_firmware(hw); |
6064 | mwl8k_release_firmware(priv); | |
6065 | if (rc) { | |
6066 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
6067 | return rc; | |
6068 | } | |
6069 | ||
3cc7772c BC |
6070 | /* |
6071 | * Extra headroom is the size of the required DMA header | |
6072 | * minus the size of the smallest 802.11 frame (CTS frame). | |
6073 | */ | |
6074 | hw->extra_tx_headroom = | |
6075 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
6076 | ||
ff776cec YAP |
6077 | hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0; |
6078 | ||
e600707b | 6079 | hw->queues = MWL8K_TX_WMM_QUEUES; |
3cc7772c BC |
6080 | |
6081 | /* Set rssi values to dBm */ | |
30686bf7 JB |
6082 | ieee80211_hw_set(hw, SIGNAL_DBM); |
6083 | ieee80211_hw_set(hw, HAS_RATE_CONTROL); | |
2a36a0ec YAP |
6084 | |
6085 | /* | |
6086 | * Ask mac80211 to not to trigger PS mode | |
6087 | * based on PM bit of incoming frames. | |
6088 | */ | |
6089 | if (priv->ap_fw) | |
30686bf7 | 6090 | ieee80211_hw_set(hw, AP_LINK_PS); |
2a36a0ec | 6091 | |
3cc7772c BC |
6092 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
6093 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
6094 | ||
6095 | priv->macids_used = 0; | |
6096 | INIT_LIST_HEAD(&priv->vif_list); | |
6097 | ||
6098 | /* Set default radio state and preamble */ | |
3db1cd5c RR |
6099 | priv->radio_on = false; |
6100 | priv->radio_short_preamble = false; | |
3cc7772c BC |
6101 | |
6102 | /* Finalize join worker */ | |
6103 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
3aefc37e NS |
6104 | /* Handle watchdog ba events */ |
6105 | INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events); | |
6b6accc3 YAP |
6106 | /* To reload the firmware if it crashes */ |
6107 | INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work); | |
3cc7772c BC |
6108 | |
6109 | /* TX reclaim and RX tasklets. */ | |
6110 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
6111 | tasklet_disable(&priv->poll_tx_task); | |
6112 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
6113 | tasklet_disable(&priv->poll_rx_task); | |
6114 | ||
6115 | /* Power management cookie */ | |
6116 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
6117 | if (priv->cookie == NULL) | |
6118 | return -ENOMEM; | |
6119 | ||
6120 | mutex_init(&priv->fw_mutex); | |
6121 | priv->fw_mutex_owner = NULL; | |
6122 | priv->fw_mutex_depth = 0; | |
6123 | priv->hostcmd_wait = NULL; | |
6124 | ||
6125 | spin_lock_init(&priv->tx_lock); | |
6126 | ||
ac109fd0 BC |
6127 | spin_lock_init(&priv->stream_lock); |
6128 | ||
3cc7772c BC |
6129 | priv->tx_wait = NULL; |
6130 | ||
6131 | rc = mwl8k_probe_hw(hw); | |
6132 | if (rc) | |
6133 | goto err_free_cookie; | |
6134 | ||
6135 | hw->wiphy->interface_modes = 0; | |
5d377fca YAP |
6136 | |
6137 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) { | |
3cc7772c | 6138 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); |
2acdaa7a | 6139 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); |
5d377fca YAP |
6140 | hw->wiphy->iface_combinations = &ap_if_comb; |
6141 | hw->wiphy->n_iface_combinations = 1; | |
6142 | } | |
6143 | ||
3cc7772c BC |
6144 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) |
6145 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
6146 | ||
6147 | rc = ieee80211_register_hw(hw); | |
6148 | if (rc) { | |
6149 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
6150 | goto err_unprobe_hw; | |
6151 | } | |
6152 | ||
6153 | return 0; | |
6154 | ||
6155 | err_unprobe_hw: | |
e600707b | 6156 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
6157 | mwl8k_txq_deinit(hw, i); |
6158 | mwl8k_rxq_deinit(hw, 0); | |
6159 | ||
be695fc4 | 6160 | err_free_cookie: |
a66098da LB |
6161 | if (priv->cookie != NULL) |
6162 | pci_free_consistent(priv->pdev, 4, | |
6163 | priv->cookie, priv->cookie_dma); | |
6164 | ||
3cc7772c BC |
6165 | return rc; |
6166 | } | |
8dee5eef | 6167 | static int mwl8k_probe(struct pci_dev *pdev, |
3cc7772c BC |
6168 | const struct pci_device_id *id) |
6169 | { | |
6170 | static int printed_version; | |
6171 | struct ieee80211_hw *hw; | |
6172 | struct mwl8k_priv *priv; | |
0863ade8 | 6173 | struct mwl8k_device_info *di; |
3cc7772c BC |
6174 | int rc; |
6175 | ||
6176 | if (!printed_version) { | |
6177 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
6178 | printed_version = 1; | |
6179 | } | |
6180 | ||
6181 | ||
6182 | rc = pci_enable_device(pdev); | |
6183 | if (rc) { | |
6184 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
6185 | MWL8K_NAME); | |
6186 | return rc; | |
6187 | } | |
6188 | ||
6189 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
6190 | if (rc) { | |
6191 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
6192 | MWL8K_NAME); | |
6193 | goto err_disable_device; | |
6194 | } | |
6195 | ||
6196 | pci_set_master(pdev); | |
6197 | ||
6198 | ||
6199 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
6200 | if (hw == NULL) { | |
6201 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
6202 | rc = -ENOMEM; | |
6203 | goto err_free_reg; | |
6204 | } | |
6205 | ||
6206 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
6207 | pci_set_drvdata(pdev, hw); | |
6208 | ||
6209 | priv = hw->priv; | |
6210 | priv->hw = hw; | |
6211 | priv->pdev = pdev; | |
6212 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
6213 | ||
98929824 NS |
6214 | if (id->driver_data == MWL8764) |
6215 | priv->is_8764 = true; | |
3cc7772c BC |
6216 | |
6217 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
6218 | if (priv->sram == NULL) { | |
6219 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
a2ca8ecb | 6220 | rc = -EIO; |
3cc7772c BC |
6221 | goto err_iounmap; |
6222 | } | |
6223 | ||
6224 | /* | |
6225 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
6226 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
6227 | */ | |
6228 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
6229 | if (priv->regs == NULL) { | |
6230 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
6231 | if (priv->regs == NULL) { | |
6232 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
a2ca8ecb | 6233 | rc = -EIO; |
3cc7772c BC |
6234 | goto err_iounmap; |
6235 | } | |
6236 | } | |
6237 | ||
0863ade8 | 6238 | /* |
99020471 BC |
6239 | * Choose the initial fw image depending on user input. If a second |
6240 | * image is available, make it the alternative image that will be | |
6241 | * loaded if the first one fails. | |
0863ade8 | 6242 | */ |
99020471 | 6243 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 6244 | di = priv->device_info; |
99020471 BC |
6245 | if (ap_mode_default && di->fw_image_ap) { |
6246 | priv->fw_pref = di->fw_image_ap; | |
6247 | priv->fw_alt = di->fw_image_sta; | |
6248 | } else if (!ap_mode_default && di->fw_image_sta) { | |
6249 | priv->fw_pref = di->fw_image_sta; | |
6250 | priv->fw_alt = di->fw_image_ap; | |
6251 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 6252 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 6253 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
6254 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
6255 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
6256 | priv->fw_pref = di->fw_image_ap; |
6257 | } | |
6258 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
6259 | if (rc) |
6260 | goto err_stop_firmware; | |
6b6accc3 YAP |
6261 | |
6262 | priv->hw_restart_in_progress = false; | |
6263 | ||
e882efc9 YAP |
6264 | priv->running_bsses = 0; |
6265 | ||
99020471 | 6266 | return rc; |
3cc7772c | 6267 | |
be695fc4 LB |
6268 | err_stop_firmware: |
6269 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
6270 | |
6271 | err_iounmap: | |
a66098da LB |
6272 | if (priv->regs != NULL) |
6273 | pci_iounmap(pdev, priv->regs); | |
6274 | ||
5b9482dd LB |
6275 | if (priv->sram != NULL) |
6276 | pci_iounmap(pdev, priv->sram); | |
6277 | ||
a66098da LB |
6278 | ieee80211_free_hw(hw); |
6279 | ||
6280 | err_free_reg: | |
6281 | pci_release_regions(pdev); | |
3db95e50 LB |
6282 | |
6283 | err_disable_device: | |
a66098da LB |
6284 | pci_disable_device(pdev); |
6285 | ||
6286 | return rc; | |
6287 | } | |
6288 | ||
8dee5eef | 6289 | static void mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
6290 | { |
6291 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
6292 | struct mwl8k_priv *priv; | |
6293 | int i; | |
6294 | ||
6295 | if (hw == NULL) | |
6296 | return; | |
6297 | priv = hw->priv; | |
6298 | ||
99020471 BC |
6299 | wait_for_completion(&priv->firmware_loading_complete); |
6300 | ||
6301 | if (priv->fw_state == FW_STATE_ERROR) { | |
6302 | mwl8k_hw_reset(priv); | |
6303 | goto unmap; | |
6304 | } | |
6305 | ||
a66098da LB |
6306 | ieee80211_stop_queues(hw); |
6307 | ||
60aa569f LB |
6308 | ieee80211_unregister_hw(hw); |
6309 | ||
67e2eb27 | 6310 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 6311 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 6312 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 6313 | |
a66098da LB |
6314 | /* Stop hardware */ |
6315 | mwl8k_hw_reset(priv); | |
6316 | ||
6317 | /* Return all skbs to mac80211 */ | |
e600707b | 6318 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 6319 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 6320 | |
e600707b | 6321 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
6322 | mwl8k_txq_deinit(hw, i); |
6323 | ||
6324 | mwl8k_rxq_deinit(hw, 0); | |
6325 | ||
c2c357ce | 6326 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 6327 | |
99020471 | 6328 | unmap: |
a66098da | 6329 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 6330 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
6331 | ieee80211_free_hw(hw); |
6332 | pci_release_regions(pdev); | |
6333 | pci_disable_device(pdev); | |
6334 | } | |
6335 | ||
6336 | static struct pci_driver mwl8k_driver = { | |
6337 | .name = MWL8K_NAME, | |
45a390dd | 6338 | .id_table = mwl8k_pci_id_table, |
a66098da | 6339 | .probe = mwl8k_probe, |
8dee5eef | 6340 | .remove = mwl8k_remove, |
a66098da LB |
6341 | }; |
6342 | ||
5b0a3b7e | 6343 | module_pci_driver(mwl8k_driver); |
c2c357ce LB |
6344 | |
6345 | MODULE_DESCRIPTION(MWL8K_DESC); | |
6346 | MODULE_VERSION(MWL8K_VERSION); | |
6347 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
6348 | MODULE_LICENSE("GPL"); |