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Commit | Line | Data |
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a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
3d76e82c | 15 | #include <linux/sched.h> |
a66098da LB |
16 | #include <linux/spinlock.h> |
17 | #include <linux/list.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/completion.h> | |
21 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
a66098da LB |
23 | #include <net/mac80211.h> |
24 | #include <linux/moduleparam.h> | |
25 | #include <linux/firmware.h> | |
26 | #include <linux/workqueue.h> | |
27 | ||
28 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
29 | #define MWL8K_NAME KBUILD_MODNAME | |
a5fb297d | 30 | #define MWL8K_VERSION "0.12" |
a66098da | 31 | |
0863ade8 BC |
32 | /* Module parameters */ |
33 | static unsigned ap_mode_default; | |
34 | module_param(ap_mode_default, bool, 0); | |
35 | MODULE_PARM_DESC(ap_mode_default, | |
36 | "Set to 1 to make ap mode the default instead of sta mode"); | |
37 | ||
a66098da LB |
38 | /* Register definitions */ |
39 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
40 | #define MWL8K_MODE_STA 0x0000005a |
41 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 42 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
43 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
44 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
45 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
46 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
47 | ||
48 | /* Host->device communications */ | |
49 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
54 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
55 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
56 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
57 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
58 | |
59 | /* Device->host communications */ | |
60 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b LB |
65 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
66 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) | |
67 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
68 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
69 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
70 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
71 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
72 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
73 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
74 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da LB |
75 | |
76 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ | |
77 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
78 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
79 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
80 | MWL8K_A2H_INT_RADIO_ON | \ | |
81 | MWL8K_A2H_INT_RADIO_OFF | \ | |
82 | MWL8K_A2H_INT_MAC_EVENT | \ | |
83 | MWL8K_A2H_INT_OPC_DONE | \ | |
84 | MWL8K_A2H_INT_RX_READY | \ | |
85 | MWL8K_A2H_INT_TX_DONE) | |
86 | ||
a66098da LB |
87 | #define MWL8K_RX_QUEUES 1 |
88 | #define MWL8K_TX_QUEUES 4 | |
89 | ||
54bc3a0d LB |
90 | struct rxd_ops { |
91 | int rxd_size; | |
92 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
93 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 94 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 95 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
96 | }; |
97 | ||
45a390dd | 98 | struct mwl8k_device_info { |
a74b295e LB |
99 | char *part_name; |
100 | char *helper_image; | |
0863ade8 BC |
101 | char *fw_image_sta; |
102 | char *fw_image_ap; | |
89a91f4f | 103 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 104 | u32 fw_api_ap; |
45a390dd LB |
105 | }; |
106 | ||
a66098da | 107 | struct mwl8k_rx_queue { |
45eb400d | 108 | int rxd_count; |
a66098da LB |
109 | |
110 | /* hw receives here */ | |
45eb400d | 111 | int head; |
a66098da LB |
112 | |
113 | /* refill descs here */ | |
45eb400d | 114 | int tail; |
a66098da | 115 | |
54bc3a0d | 116 | void *rxd; |
45eb400d | 117 | dma_addr_t rxd_dma; |
788838eb LB |
118 | struct { |
119 | struct sk_buff *skb; | |
53b1b3e1 | 120 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 121 | } *buf; |
a66098da LB |
122 | }; |
123 | ||
a66098da LB |
124 | struct mwl8k_tx_queue { |
125 | /* hw transmits here */ | |
45eb400d | 126 | int head; |
a66098da LB |
127 | |
128 | /* sw appends here */ | |
45eb400d | 129 | int tail; |
a66098da | 130 | |
8ccbc3b8 | 131 | unsigned int len; |
45eb400d LB |
132 | struct mwl8k_tx_desc *txd; |
133 | dma_addr_t txd_dma; | |
134 | struct sk_buff **skb; | |
a66098da LB |
135 | }; |
136 | ||
a66098da | 137 | struct mwl8k_priv { |
a66098da | 138 | struct ieee80211_hw *hw; |
a66098da | 139 | struct pci_dev *pdev; |
a66098da | 140 | |
45a390dd LB |
141 | struct mwl8k_device_info *device_info; |
142 | ||
be695fc4 LB |
143 | void __iomem *sram; |
144 | void __iomem *regs; | |
145 | ||
146 | /* firmware */ | |
d1f9e41d BC |
147 | const struct firmware *fw_helper; |
148 | const struct firmware *fw_ucode; | |
a66098da | 149 | |
be695fc4 LB |
150 | /* hardware/firmware parameters */ |
151 | bool ap_fw; | |
152 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
153 | struct ieee80211_supported_band band_24; |
154 | struct ieee80211_channel channels_24[14]; | |
155 | struct ieee80211_rate rates_24[14]; | |
4eae9edd LB |
156 | struct ieee80211_supported_band band_50; |
157 | struct ieee80211_channel channels_50[4]; | |
158 | struct ieee80211_rate rates_50[9]; | |
ee0ddf18 LB |
159 | u32 ap_macids_supported; |
160 | u32 sta_macids_supported; | |
be695fc4 | 161 | |
618952a7 LB |
162 | /* firmware access */ |
163 | struct mutex fw_mutex; | |
164 | struct task_struct *fw_mutex_owner; | |
165 | int fw_mutex_depth; | |
618952a7 LB |
166 | struct completion *hostcmd_wait; |
167 | ||
a66098da LB |
168 | /* lock held over TX and TX reap */ |
169 | spinlock_t tx_lock; | |
a66098da | 170 | |
88de754a LB |
171 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
172 | struct completion *tx_wait; | |
173 | ||
f5bb87cf | 174 | /* List of interfaces. */ |
ee0ddf18 | 175 | u32 macids_used; |
f5bb87cf | 176 | struct list_head vif_list; |
a66098da | 177 | |
a66098da LB |
178 | /* power management status cookie from firmware */ |
179 | u32 *cookie; | |
180 | dma_addr_t cookie_dma; | |
181 | ||
182 | u16 num_mcaddrs; | |
a66098da | 183 | u8 hw_rev; |
2aa7b01f | 184 | u32 fw_rev; |
a66098da LB |
185 | |
186 | /* | |
187 | * Running count of TX packets in flight, to avoid | |
188 | * iterating over the transmit rings each time. | |
189 | */ | |
190 | int pending_tx_pkts; | |
191 | ||
192 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
193 | struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES]; | |
194 | ||
c46563b7 | 195 | bool radio_on; |
68ce3884 | 196 | bool radio_short_preamble; |
a43c49a8 | 197 | bool sniffer_enabled; |
0439b1f5 | 198 | bool wmm_enabled; |
a66098da | 199 | |
a66098da LB |
200 | /* XXX need to convert this to handle multiple interfaces */ |
201 | bool capture_beacon; | |
d89173f2 | 202 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
203 | struct sk_buff *beacon_skb; |
204 | ||
205 | /* | |
206 | * This FJ worker has to be global as it is scheduled from the | |
207 | * RX handler. At this point we don't know which interface it | |
208 | * belongs to until the list of bssids waiting to complete join | |
209 | * is checked. | |
210 | */ | |
211 | struct work_struct finalize_join_worker; | |
212 | ||
1e9f9de3 LB |
213 | /* Tasklet to perform TX reclaim. */ |
214 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
215 | |
216 | /* Tasklet to perform RX. */ | |
217 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
218 | |
219 | /* Most recently reported noise in dBm */ | |
220 | s8 noise; | |
0863ade8 BC |
221 | |
222 | /* | |
223 | * preserve the queue configurations so they can be restored if/when | |
224 | * the firmware image is swapped. | |
225 | */ | |
226 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES]; | |
99020471 BC |
227 | |
228 | /* async firmware loading state */ | |
229 | unsigned fw_state; | |
230 | char *fw_pref; | |
231 | char *fw_alt; | |
232 | struct completion firmware_loading_complete; | |
a66098da LB |
233 | }; |
234 | ||
e53d9b96 NS |
235 | #define MAX_WEP_KEY_LEN 13 |
236 | #define NUM_WEP_KEYS 4 | |
237 | ||
a66098da LB |
238 | /* Per interface specific private data */ |
239 | struct mwl8k_vif { | |
f5bb87cf LB |
240 | struct list_head list; |
241 | struct ieee80211_vif *vif; | |
242 | ||
f57ca9c1 LB |
243 | /* Firmware macid for this vif. */ |
244 | int macid; | |
245 | ||
c2c2b12a | 246 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 247 | u16 seqno; |
e53d9b96 NS |
248 | |
249 | /* Saved WEP keys */ | |
250 | struct { | |
251 | u8 enabled; | |
252 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
253 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
254 | |
255 | /* BSSID */ | |
256 | u8 bssid[ETH_ALEN]; | |
257 | ||
258 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
259 | bool is_hw_crypto_enabled; | |
a66098da | 260 | }; |
a94cc97e | 261 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 262 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 263 | |
a680400e LB |
264 | struct mwl8k_sta { |
265 | /* Index into station database. Returned by UPDATE_STADB. */ | |
266 | u8 peer_id; | |
267 | }; | |
268 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
269 | ||
777ad375 | 270 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
a66098da LB |
271 | { .center_freq = 2412, .hw_value = 1, }, |
272 | { .center_freq = 2417, .hw_value = 2, }, | |
273 | { .center_freq = 2422, .hw_value = 3, }, | |
274 | { .center_freq = 2427, .hw_value = 4, }, | |
275 | { .center_freq = 2432, .hw_value = 5, }, | |
276 | { .center_freq = 2437, .hw_value = 6, }, | |
277 | { .center_freq = 2442, .hw_value = 7, }, | |
278 | { .center_freq = 2447, .hw_value = 8, }, | |
279 | { .center_freq = 2452, .hw_value = 9, }, | |
280 | { .center_freq = 2457, .hw_value = 10, }, | |
281 | { .center_freq = 2462, .hw_value = 11, }, | |
647ca6b0 LB |
282 | { .center_freq = 2467, .hw_value = 12, }, |
283 | { .center_freq = 2472, .hw_value = 13, }, | |
284 | { .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
285 | }; |
286 | ||
777ad375 | 287 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
288 | { .bitrate = 10, .hw_value = 2, }, |
289 | { .bitrate = 20, .hw_value = 4, }, | |
290 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
291 | { .bitrate = 110, .hw_value = 22, }, |
292 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
293 | { .bitrate = 60, .hw_value = 12, }, |
294 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
295 | { .bitrate = 120, .hw_value = 24, }, |
296 | { .bitrate = 180, .hw_value = 36, }, | |
297 | { .bitrate = 240, .hw_value = 48, }, | |
298 | { .bitrate = 360, .hw_value = 72, }, | |
299 | { .bitrate = 480, .hw_value = 96, }, | |
300 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
301 | { .bitrate = 720, .hw_value = 144, }, |
302 | }; | |
303 | ||
4eae9edd LB |
304 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
305 | { .center_freq = 5180, .hw_value = 36, }, | |
306 | { .center_freq = 5200, .hw_value = 40, }, | |
307 | { .center_freq = 5220, .hw_value = 44, }, | |
308 | { .center_freq = 5240, .hw_value = 48, }, | |
309 | }; | |
310 | ||
311 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
312 | { .bitrate = 60, .hw_value = 12, }, | |
313 | { .bitrate = 90, .hw_value = 18, }, | |
314 | { .bitrate = 120, .hw_value = 24, }, | |
315 | { .bitrate = 180, .hw_value = 36, }, | |
316 | { .bitrate = 240, .hw_value = 48, }, | |
317 | { .bitrate = 360, .hw_value = 72, }, | |
318 | { .bitrate = 480, .hw_value = 96, }, | |
319 | { .bitrate = 540, .hw_value = 108, }, | |
320 | { .bitrate = 720, .hw_value = 144, }, | |
321 | }; | |
322 | ||
a66098da | 323 | /* Set or get info from Firmware */ |
a66098da | 324 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
325 | #define MWL8K_CMD_SET 0x0001 |
326 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
327 | |
328 | /* Firmware command codes */ | |
329 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
330 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 331 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
332 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
333 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
334 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
335 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 336 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 337 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 338 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
339 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
340 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
341 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
342 | #define MWL8K_CMD_SET_AID 0x010d | |
343 | #define MWL8K_CMD_SET_RATE 0x0110 | |
344 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
345 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 346 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
347 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
348 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 349 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 350 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 351 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 352 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 353 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
aa21d0f6 LB |
354 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
355 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 356 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 357 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
a66098da | 358 | |
b603742f | 359 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 360 | { |
b603742f JL |
361 | u16 command = le16_to_cpu(cmd); |
362 | ||
a66098da LB |
363 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
364 | snprintf(buf, bufsize, "%s", #x);\ | |
365 | return buf;\ | |
366 | } while (0) | |
b603742f | 367 | switch (command & ~0x8000) { |
a66098da LB |
368 | MWL8K_CMDNAME(CODE_DNLD); |
369 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 370 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
371 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
372 | MWL8K_CMDNAME(GET_STAT); | |
373 | MWL8K_CMDNAME(RADIO_CONTROL); | |
374 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 375 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 376 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 377 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
378 | MWL8K_CMDNAME(SET_PRE_SCAN); |
379 | MWL8K_CMDNAME(SET_POST_SCAN); | |
380 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
381 | MWL8K_CMDNAME(SET_AID); |
382 | MWL8K_CMDNAME(SET_RATE); | |
383 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
384 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 385 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
386 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
387 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 388 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 389 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 390 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 391 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 392 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 393 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 394 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 395 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 396 | MWL8K_CMDNAME(UPDATE_STADB); |
a66098da LB |
397 | default: |
398 | snprintf(buf, bufsize, "0x%x", cmd); | |
399 | } | |
400 | #undef MWL8K_CMDNAME | |
401 | ||
402 | return buf; | |
403 | } | |
404 | ||
405 | /* Hardware and firmware reset */ | |
406 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
407 | { | |
408 | iowrite32(MWL8K_H2A_INT_RESET, | |
409 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
410 | iowrite32(MWL8K_H2A_INT_RESET, | |
411 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
412 | msleep(20); | |
413 | } | |
414 | ||
415 | /* Release fw image */ | |
d1f9e41d | 416 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
417 | { |
418 | if (*fw == NULL) | |
419 | return; | |
420 | release_firmware(*fw); | |
421 | *fw = NULL; | |
422 | } | |
423 | ||
424 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
425 | { | |
22be40d9 LB |
426 | mwl8k_release_fw(&priv->fw_ucode); |
427 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
428 | } |
429 | ||
99020471 BC |
430 | /* states for asynchronous f/w loading */ |
431 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
432 | enum { | |
433 | FW_STATE_INIT = 0, | |
434 | FW_STATE_LOADING_PREF, | |
435 | FW_STATE_LOADING_ALT, | |
436 | FW_STATE_ERROR, | |
437 | }; | |
438 | ||
a66098da LB |
439 | /* Request fw image */ |
440 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 441 | const char *fname, const struct firmware **fw, |
99020471 | 442 | bool nowait) |
a66098da LB |
443 | { |
444 | /* release current image */ | |
445 | if (*fw != NULL) | |
446 | mwl8k_release_fw(fw); | |
447 | ||
99020471 BC |
448 | if (nowait) |
449 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
450 | &priv->pdev->dev, GFP_KERNEL, | |
451 | priv, mwl8k_fw_state_machine); | |
452 | else | |
d1f9e41d | 453 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
454 | } |
455 | ||
99020471 BC |
456 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
457 | bool nowait) | |
a66098da | 458 | { |
a74b295e | 459 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
460 | int rc; |
461 | ||
a74b295e | 462 | if (di->helper_image != NULL) { |
99020471 BC |
463 | if (nowait) |
464 | rc = mwl8k_request_fw(priv, di->helper_image, | |
465 | &priv->fw_helper, true); | |
466 | else | |
467 | rc = mwl8k_request_fw(priv, di->helper_image, | |
468 | &priv->fw_helper, false); | |
469 | if (rc) | |
470 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
471 | pci_name(priv->pdev), di->helper_image); | |
472 | ||
473 | if (rc || nowait) | |
a74b295e | 474 | return rc; |
a66098da LB |
475 | } |
476 | ||
99020471 BC |
477 | if (nowait) { |
478 | /* | |
479 | * if we get here, no helper image is needed. Skip the | |
480 | * FW_STATE_INIT state. | |
481 | */ | |
482 | priv->fw_state = FW_STATE_LOADING_PREF; | |
483 | rc = mwl8k_request_fw(priv, fw_image, | |
484 | &priv->fw_ucode, | |
485 | true); | |
486 | } else | |
487 | rc = mwl8k_request_fw(priv, fw_image, | |
488 | &priv->fw_ucode, false); | |
a66098da | 489 | if (rc) { |
c2c357ce | 490 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 491 | pci_name(priv->pdev), fw_image); |
22be40d9 | 492 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
493 | return rc; |
494 | } | |
495 | ||
496 | return 0; | |
497 | } | |
498 | ||
499 | struct mwl8k_cmd_pkt { | |
500 | __le16 code; | |
501 | __le16 length; | |
f57ca9c1 LB |
502 | __u8 seq_num; |
503 | __u8 macid; | |
a66098da LB |
504 | __le16 result; |
505 | char payload[0]; | |
ba2d3587 | 506 | } __packed; |
a66098da LB |
507 | |
508 | /* | |
509 | * Firmware loading. | |
510 | */ | |
511 | static int | |
512 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
513 | { | |
514 | void __iomem *regs = priv->regs; | |
515 | dma_addr_t dma_addr; | |
a66098da LB |
516 | int loops; |
517 | ||
518 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
519 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
520 | return -ENOMEM; | |
521 | ||
522 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
523 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
524 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
525 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
526 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
527 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
528 | ||
a66098da LB |
529 | loops = 1000; |
530 | do { | |
531 | u32 int_code; | |
532 | ||
533 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
534 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
535 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
a66098da LB |
536 | break; |
537 | } | |
538 | ||
3d76e82c | 539 | cond_resched(); |
a66098da LB |
540 | udelay(1); |
541 | } while (--loops); | |
542 | ||
543 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
544 | ||
d4b70570 | 545 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
546 | } |
547 | ||
548 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
549 | const u8 *data, size_t length) | |
550 | { | |
551 | struct mwl8k_cmd_pkt *cmd; | |
552 | int done; | |
553 | int rc = 0; | |
554 | ||
555 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
556 | if (cmd == NULL) | |
557 | return -ENOMEM; | |
558 | ||
559 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
560 | cmd->seq_num = 0; | |
f57ca9c1 | 561 | cmd->macid = 0; |
a66098da LB |
562 | cmd->result = 0; |
563 | ||
564 | done = 0; | |
565 | while (length) { | |
566 | int block_size = length > 256 ? 256 : length; | |
567 | ||
568 | memcpy(cmd->payload, data + done, block_size); | |
569 | cmd->length = cpu_to_le16(block_size); | |
570 | ||
571 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
572 | sizeof(*cmd) + block_size); | |
573 | if (rc) | |
574 | break; | |
575 | ||
576 | done += block_size; | |
577 | length -= block_size; | |
578 | } | |
579 | ||
580 | if (!rc) { | |
581 | cmd->length = 0; | |
582 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
583 | } | |
584 | ||
585 | kfree(cmd); | |
586 | ||
587 | return rc; | |
588 | } | |
589 | ||
590 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
591 | const u8 *data, size_t length) | |
592 | { | |
593 | unsigned char *buffer; | |
594 | int may_continue, rc = 0; | |
595 | u32 done, prev_block_size; | |
596 | ||
597 | buffer = kmalloc(1024, GFP_KERNEL); | |
598 | if (buffer == NULL) | |
599 | return -ENOMEM; | |
600 | ||
601 | done = 0; | |
602 | prev_block_size = 0; | |
603 | may_continue = 1000; | |
604 | while (may_continue > 0) { | |
605 | u32 block_size; | |
606 | ||
607 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
608 | if (block_size & 1) { | |
609 | block_size &= ~1; | |
610 | may_continue--; | |
611 | } else { | |
612 | done += prev_block_size; | |
613 | length -= prev_block_size; | |
614 | } | |
615 | ||
616 | if (block_size > 1024 || block_size > length) { | |
617 | rc = -EOVERFLOW; | |
618 | break; | |
619 | } | |
620 | ||
621 | if (length == 0) { | |
622 | rc = 0; | |
623 | break; | |
624 | } | |
625 | ||
626 | if (block_size == 0) { | |
627 | rc = -EPROTO; | |
628 | may_continue--; | |
629 | udelay(1); | |
630 | continue; | |
631 | } | |
632 | ||
633 | prev_block_size = block_size; | |
634 | memcpy(buffer, data + done, block_size); | |
635 | ||
636 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
637 | if (rc) | |
638 | break; | |
639 | } | |
640 | ||
641 | if (!rc && length != 0) | |
642 | rc = -EREMOTEIO; | |
643 | ||
644 | kfree(buffer); | |
645 | ||
646 | return rc; | |
647 | } | |
648 | ||
c2c357ce | 649 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 650 | { |
c2c357ce | 651 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 652 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
653 | int rc; |
654 | int loops; | |
655 | ||
656 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | |
d1f9e41d | 657 | const struct firmware *helper = priv->fw_helper; |
a66098da | 658 | |
c2c357ce LB |
659 | if (helper == NULL) { |
660 | printk(KERN_ERR "%s: helper image needed but none " | |
661 | "given\n", pci_name(priv->pdev)); | |
662 | return -EINVAL; | |
663 | } | |
a66098da | 664 | |
c2c357ce | 665 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
666 | if (rc) { |
667 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 668 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
669 | return rc; |
670 | } | |
89b872e2 | 671 | msleep(5); |
a66098da | 672 | |
c2c357ce | 673 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 674 | } else { |
c2c357ce | 675 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); |
a66098da LB |
676 | } |
677 | ||
678 | if (rc) { | |
c2c357ce LB |
679 | printk(KERN_ERR "%s: unable to load firmware image\n", |
680 | pci_name(priv->pdev)); | |
a66098da LB |
681 | return rc; |
682 | } | |
683 | ||
89a91f4f | 684 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 685 | |
89b872e2 | 686 | loops = 500000; |
a66098da | 687 | do { |
eae74e65 LB |
688 | u32 ready_code; |
689 | ||
690 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
691 | if (ready_code == MWL8K_FWAP_READY) { | |
692 | priv->ap_fw = 1; | |
693 | break; | |
694 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
695 | priv->ap_fw = 0; | |
a66098da | 696 | break; |
eae74e65 LB |
697 | } |
698 | ||
699 | cond_resched(); | |
a66098da LB |
700 | udelay(1); |
701 | } while (--loops); | |
702 | ||
703 | return loops ? 0 : -ETIMEDOUT; | |
704 | } | |
705 | ||
706 | ||
a66098da LB |
707 | /* DMA header used by firmware and hardware. */ |
708 | struct mwl8k_dma_data { | |
709 | __le16 fwlen; | |
710 | struct ieee80211_hdr wh; | |
20f09c3d | 711 | char data[0]; |
ba2d3587 | 712 | } __packed; |
a66098da LB |
713 | |
714 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 715 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 716 | { |
20f09c3d LB |
717 | struct mwl8k_dma_data *tr; |
718 | int hdrlen; | |
719 | ||
720 | tr = (struct mwl8k_dma_data *)skb->data; | |
721 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
722 | ||
723 | if (hdrlen != sizeof(tr->wh)) { | |
724 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
725 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
726 | *((__le16 *)(tr->data - 2)) = qos; | |
727 | } else { | |
728 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
729 | } | |
a66098da | 730 | } |
20f09c3d LB |
731 | |
732 | if (hdrlen != sizeof(*tr)) | |
733 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
734 | } |
735 | ||
252486a1 NS |
736 | static void |
737 | mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad) | |
a66098da LB |
738 | { |
739 | struct ieee80211_hdr *wh; | |
ca009301 | 740 | int hdrlen; |
252486a1 | 741 | int reqd_hdrlen; |
a66098da LB |
742 | struct mwl8k_dma_data *tr; |
743 | ||
ca009301 LB |
744 | /* |
745 | * Add a firmware DMA header; the firmware requires that we | |
746 | * present a 2-byte payload length followed by a 4-address | |
747 | * header (without QoS field), followed (optionally) by any | |
748 | * WEP/ExtIV header (but only filled in for CCMP). | |
749 | */ | |
a66098da | 750 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 751 | |
a66098da | 752 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
252486a1 NS |
753 | reqd_hdrlen = sizeof(*tr); |
754 | ||
755 | if (hdrlen != reqd_hdrlen) | |
756 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 757 | |
ca009301 | 758 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 759 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
760 | |
761 | tr = (struct mwl8k_dma_data *)skb->data; | |
762 | if (wh != &tr->wh) | |
763 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
764 | if (hdrlen != sizeof(tr->wh)) |
765 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
766 | |
767 | /* | |
768 | * Firmware length is the length of the fully formed "802.11 | |
769 | * payload". That is, everything except for the 802.11 header. | |
770 | * This includes all crypto material including the MIC. | |
771 | */ | |
252486a1 | 772 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
773 | } |
774 | ||
e53d9b96 NS |
775 | static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb) |
776 | { | |
777 | struct ieee80211_hdr *wh; | |
778 | struct ieee80211_tx_info *tx_info; | |
779 | struct ieee80211_key_conf *key_conf; | |
780 | int data_pad; | |
781 | ||
782 | wh = (struct ieee80211_hdr *)skb->data; | |
783 | ||
784 | tx_info = IEEE80211_SKB_CB(skb); | |
785 | ||
786 | key_conf = NULL; | |
787 | if (ieee80211_is_data(wh->frame_control)) | |
788 | key_conf = tx_info->control.hw_key; | |
789 | ||
790 | /* | |
791 | * Make sure the packet header is in the DMA header format (4-address | |
792 | * without QoS), the necessary crypto padding between the header and the | |
793 | * payload has already been provided by mac80211, but it doesn't add tail | |
794 | * padding when HW crypto is enabled. | |
795 | * | |
796 | * We have the following trailer padding requirements: | |
797 | * - WEP: 4 trailer bytes (ICV) | |
798 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
799 | * - CCMP: 8 trailer bytes (MIC) | |
800 | */ | |
801 | data_pad = 0; | |
802 | if (key_conf != NULL) { | |
803 | switch (key_conf->cipher) { | |
804 | case WLAN_CIPHER_SUITE_WEP40: | |
805 | case WLAN_CIPHER_SUITE_WEP104: | |
806 | data_pad = 4; | |
807 | break; | |
808 | case WLAN_CIPHER_SUITE_TKIP: | |
809 | data_pad = 12; | |
810 | break; | |
811 | case WLAN_CIPHER_SUITE_CCMP: | |
812 | data_pad = 8; | |
813 | break; | |
814 | } | |
815 | } | |
816 | mwl8k_add_dma_header(skb, data_pad); | |
817 | } | |
a66098da LB |
818 | |
819 | /* | |
89a91f4f | 820 | * Packet reception for 88w8366 AP firmware. |
6f6d1e9a | 821 | */ |
89a91f4f | 822 | struct mwl8k_rxd_8366_ap { |
6f6d1e9a LB |
823 | __le16 pkt_len; |
824 | __u8 sq2; | |
825 | __u8 rate; | |
826 | __le32 pkt_phys_addr; | |
827 | __le32 next_rxd_phys_addr; | |
828 | __le16 qos_control; | |
829 | __le16 htsig2; | |
830 | __le32 hw_rssi_info; | |
831 | __le32 hw_noise_floor_info; | |
832 | __u8 noise_floor; | |
833 | __u8 pad0[3]; | |
834 | __u8 rssi; | |
835 | __u8 rx_status; | |
836 | __u8 channel; | |
837 | __u8 rx_ctrl; | |
ba2d3587 | 838 | } __packed; |
6f6d1e9a | 839 | |
89a91f4f LB |
840 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
841 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | |
842 | #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 843 | |
89a91f4f | 844 | #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 845 | |
d9a07d49 NS |
846 | /* 8366 AP rx_status bits */ |
847 | #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
848 | #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
849 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
850 | #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
851 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
852 | ||
89a91f4f | 853 | static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 854 | { |
89a91f4f | 855 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
856 | |
857 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 858 | rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
859 | } |
860 | ||
89a91f4f | 861 | static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 862 | { |
89a91f4f | 863 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
864 | |
865 | rxd->pkt_len = cpu_to_le16(len); | |
866 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
867 | wmb(); | |
868 | rxd->rx_ctrl = 0; | |
869 | } | |
870 | ||
871 | static int | |
89a91f4f | 872 | mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 873 | __le16 *qos, s8 *noise) |
6f6d1e9a | 874 | { |
89a91f4f | 875 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a | 876 | |
89a91f4f | 877 | if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
878 | return -1; |
879 | rmb(); | |
880 | ||
881 | memset(status, 0, sizeof(*status)); | |
882 | ||
883 | status->signal = -rxd->rssi; | |
0d462bbb | 884 | *noise = -rxd->noise_floor; |
6f6d1e9a | 885 | |
89a91f4f | 886 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 887 | status->flag |= RX_FLAG_HT; |
89a91f4f | 888 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 889 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 890 | status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
891 | } else { |
892 | int i; | |
893 | ||
777ad375 LB |
894 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
895 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
896 | status->rate_idx = i; |
897 | break; | |
898 | } | |
899 | } | |
900 | } | |
901 | ||
85478344 LB |
902 | if (rxd->channel > 14) { |
903 | status->band = IEEE80211_BAND_5GHZ; | |
904 | if (!(status->flag & RX_FLAG_HT)) | |
905 | status->rate_idx -= 5; | |
906 | } else { | |
907 | status->band = IEEE80211_BAND_2GHZ; | |
908 | } | |
59eb21a6 BR |
909 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
910 | status->band); | |
6f6d1e9a | 911 | |
20f09c3d LB |
912 | *qos = rxd->qos_control; |
913 | ||
d9a07d49 NS |
914 | if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
915 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
916 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
917 | status->flag |= RX_FLAG_MMIC_ERROR; | |
918 | ||
6f6d1e9a LB |
919 | return le16_to_cpu(rxd->pkt_len); |
920 | } | |
921 | ||
89a91f4f LB |
922 | static struct rxd_ops rxd_8366_ap_ops = { |
923 | .rxd_size = sizeof(struct mwl8k_rxd_8366_ap), | |
924 | .rxd_init = mwl8k_rxd_8366_ap_init, | |
925 | .rxd_refill = mwl8k_rxd_8366_ap_refill, | |
926 | .rxd_process = mwl8k_rxd_8366_ap_process, | |
6f6d1e9a LB |
927 | }; |
928 | ||
929 | /* | |
89a91f4f | 930 | * Packet reception for STA firmware. |
a66098da | 931 | */ |
89a91f4f | 932 | struct mwl8k_rxd_sta { |
a66098da LB |
933 | __le16 pkt_len; |
934 | __u8 link_quality; | |
935 | __u8 noise_level; | |
936 | __le32 pkt_phys_addr; | |
45eb400d | 937 | __le32 next_rxd_phys_addr; |
a66098da LB |
938 | __le16 qos_control; |
939 | __le16 rate_info; | |
940 | __le32 pad0[4]; | |
941 | __u8 rssi; | |
942 | __u8 channel; | |
943 | __le16 pad1; | |
944 | __u8 rx_ctrl; | |
945 | __u8 rx_status; | |
946 | __u8 pad2[2]; | |
ba2d3587 | 947 | } __packed; |
a66098da | 948 | |
89a91f4f LB |
949 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
950 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
951 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
952 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
953 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
954 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 955 | |
89a91f4f | 956 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
957 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
958 | /* ICV=0 or MIC=1 */ | |
959 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
960 | /* Key is uploaded only in failure case */ | |
961 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 962 | |
89a91f4f | 963 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 964 | { |
89a91f4f | 965 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
966 | |
967 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 968 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
969 | } |
970 | ||
89a91f4f | 971 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 972 | { |
89a91f4f | 973 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
974 | |
975 | rxd->pkt_len = cpu_to_le16(len); | |
976 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
977 | wmb(); | |
978 | rxd->rx_ctrl = 0; | |
979 | } | |
980 | ||
981 | static int | |
89a91f4f | 982 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 983 | __le16 *qos, s8 *noise) |
54bc3a0d | 984 | { |
89a91f4f | 985 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
986 | u16 rate_info; |
987 | ||
89a91f4f | 988 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
989 | return -1; |
990 | rmb(); | |
991 | ||
992 | rate_info = le16_to_cpu(rxd->rate_info); | |
993 | ||
994 | memset(status, 0, sizeof(*status)); | |
995 | ||
996 | status->signal = -rxd->rssi; | |
0d462bbb | 997 | *noise = -rxd->noise_level; |
89a91f4f LB |
998 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
999 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1000 | |
89a91f4f | 1001 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1002 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1003 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1004 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1005 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1006 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1007 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1008 | status->flag |= RX_FLAG_HT; |
1009 | ||
85478344 LB |
1010 | if (rxd->channel > 14) { |
1011 | status->band = IEEE80211_BAND_5GHZ; | |
1012 | if (!(status->flag & RX_FLAG_HT)) | |
1013 | status->rate_idx -= 5; | |
1014 | } else { | |
1015 | status->band = IEEE80211_BAND_2GHZ; | |
1016 | } | |
59eb21a6 BR |
1017 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1018 | status->band); | |
54bc3a0d | 1019 | |
20f09c3d | 1020 | *qos = rxd->qos_control; |
d9a07d49 NS |
1021 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1022 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1023 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1024 | |
54bc3a0d LB |
1025 | return le16_to_cpu(rxd->pkt_len); |
1026 | } | |
1027 | ||
89a91f4f LB |
1028 | static struct rxd_ops rxd_sta_ops = { |
1029 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1030 | .rxd_init = mwl8k_rxd_sta_init, | |
1031 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1032 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1033 | }; |
1034 | ||
1035 | ||
a66098da LB |
1036 | #define MWL8K_RX_DESCS 256 |
1037 | #define MWL8K_RX_MAXSZ 3800 | |
1038 | ||
1039 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1040 | { | |
1041 | struct mwl8k_priv *priv = hw->priv; | |
1042 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1043 | int size; | |
1044 | int i; | |
1045 | ||
45eb400d LB |
1046 | rxq->rxd_count = 0; |
1047 | rxq->head = 0; | |
1048 | rxq->tail = 0; | |
a66098da | 1049 | |
54bc3a0d | 1050 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1051 | |
45eb400d LB |
1052 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
1053 | if (rxq->rxd == NULL) { | |
5db55844 | 1054 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1055 | return -ENOMEM; |
1056 | } | |
45eb400d | 1057 | memset(rxq->rxd, 0, size); |
a66098da | 1058 | |
b9ede5f1 | 1059 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1060 | if (rxq->buf == NULL) { |
5db55844 | 1061 | wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n"); |
45eb400d | 1062 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1063 | return -ENOMEM; |
1064 | } | |
a66098da LB |
1065 | |
1066 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1067 | int desc_size; |
1068 | void *rxd; | |
a66098da | 1069 | int nexti; |
54bc3a0d LB |
1070 | dma_addr_t next_dma_addr; |
1071 | ||
1072 | desc_size = priv->rxd_ops->rxd_size; | |
1073 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1074 | |
54bc3a0d LB |
1075 | nexti = i + 1; |
1076 | if (nexti == MWL8K_RX_DESCS) | |
1077 | nexti = 0; | |
1078 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1079 | |
54bc3a0d | 1080 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1081 | } |
1082 | ||
1083 | return 0; | |
1084 | } | |
1085 | ||
1086 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1087 | { | |
1088 | struct mwl8k_priv *priv = hw->priv; | |
1089 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1090 | int refilled; | |
1091 | ||
1092 | refilled = 0; | |
45eb400d | 1093 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1094 | struct sk_buff *skb; |
788838eb | 1095 | dma_addr_t addr; |
a66098da | 1096 | int rx; |
54bc3a0d | 1097 | void *rxd; |
a66098da LB |
1098 | |
1099 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1100 | if (skb == NULL) | |
1101 | break; | |
1102 | ||
788838eb LB |
1103 | addr = pci_map_single(priv->pdev, skb->data, |
1104 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1105 | |
54bc3a0d LB |
1106 | rxq->rxd_count++; |
1107 | rx = rxq->tail++; | |
1108 | if (rxq->tail == MWL8K_RX_DESCS) | |
1109 | rxq->tail = 0; | |
788838eb | 1110 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1111 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1112 | |
1113 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1114 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1115 | |
1116 | refilled++; | |
1117 | } | |
1118 | ||
1119 | return refilled; | |
1120 | } | |
1121 | ||
1122 | /* Must be called only when the card's reception is completely halted */ | |
1123 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1124 | { | |
1125 | struct mwl8k_priv *priv = hw->priv; | |
1126 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1127 | int i; | |
1128 | ||
1129 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
788838eb LB |
1130 | if (rxq->buf[i].skb != NULL) { |
1131 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1132 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1133 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1134 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1135 | |
1136 | kfree_skb(rxq->buf[i].skb); | |
1137 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1138 | } |
1139 | } | |
1140 | ||
788838eb LB |
1141 | kfree(rxq->buf); |
1142 | rxq->buf = NULL; | |
a66098da LB |
1143 | |
1144 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1145 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1146 | rxq->rxd, rxq->rxd_dma); |
1147 | rxq->rxd = NULL; | |
a66098da LB |
1148 | } |
1149 | ||
1150 | ||
1151 | /* | |
1152 | * Scan a list of BSSIDs to process for finalize join. | |
1153 | * Allows for extension to process multiple BSSIDs. | |
1154 | */ | |
1155 | static inline int | |
1156 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1157 | { | |
1158 | return priv->capture_beacon && | |
1159 | ieee80211_is_beacon(wh->frame_control) && | |
1160 | !compare_ether_addr(wh->addr3, priv->capture_bssid); | |
1161 | } | |
1162 | ||
3779752d LB |
1163 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1164 | struct sk_buff *skb) | |
a66098da | 1165 | { |
3779752d LB |
1166 | struct mwl8k_priv *priv = hw->priv; |
1167 | ||
a66098da | 1168 | priv->capture_beacon = false; |
d89173f2 | 1169 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1170 | |
1171 | /* | |
1172 | * Use GFP_ATOMIC as rxq_process is called from | |
1173 | * the primary interrupt handler, memory allocation call | |
1174 | * must not sleep. | |
1175 | */ | |
1176 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1177 | if (priv->beacon_skb != NULL) | |
3779752d | 1178 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1179 | } |
1180 | ||
d9a07d49 NS |
1181 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1182 | u8 *bssid) | |
1183 | { | |
1184 | struct mwl8k_vif *mwl8k_vif; | |
1185 | ||
1186 | list_for_each_entry(mwl8k_vif, | |
1187 | vif_list, list) { | |
1188 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1189 | ETH_ALEN) == 0) | |
1190 | return mwl8k_vif; | |
1191 | } | |
1192 | ||
1193 | return NULL; | |
1194 | } | |
1195 | ||
a66098da LB |
1196 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1197 | { | |
1198 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1199 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1200 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1201 | int processed; | |
1202 | ||
1203 | processed = 0; | |
45eb400d | 1204 | while (rxq->rxd_count && limit--) { |
a66098da | 1205 | struct sk_buff *skb; |
54bc3a0d LB |
1206 | void *rxd; |
1207 | int pkt_len; | |
a66098da | 1208 | struct ieee80211_rx_status status; |
d9a07d49 | 1209 | struct ieee80211_hdr *wh; |
20f09c3d | 1210 | __le16 qos; |
a66098da | 1211 | |
788838eb | 1212 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1213 | if (skb == NULL) |
1214 | break; | |
54bc3a0d LB |
1215 | |
1216 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1217 | ||
0d462bbb JL |
1218 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1219 | &priv->noise); | |
54bc3a0d LB |
1220 | if (pkt_len < 0) |
1221 | break; | |
1222 | ||
788838eb LB |
1223 | rxq->buf[rxq->head].skb = NULL; |
1224 | ||
1225 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1226 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1227 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1228 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1229 | |
54bc3a0d LB |
1230 | rxq->head++; |
1231 | if (rxq->head == MWL8K_RX_DESCS) | |
1232 | rxq->head = 0; | |
1233 | ||
45eb400d | 1234 | rxq->rxd_count--; |
a66098da | 1235 | |
d9a07d49 | 1236 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1237 | |
a66098da | 1238 | /* |
c2c357ce LB |
1239 | * Check for a pending join operation. Save a |
1240 | * copy of the beacon and schedule a tasklet to | |
1241 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1242 | */ |
54bc3a0d | 1243 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1244 | mwl8k_save_beacon(hw, skb); |
a66098da | 1245 | |
d9a07d49 NS |
1246 | if (ieee80211_has_protected(wh->frame_control)) { |
1247 | ||
1248 | /* Check if hw crypto has been enabled for | |
1249 | * this bss. If yes, set the status flags | |
1250 | * accordingly | |
1251 | */ | |
1252 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1253 | wh->addr1); | |
1254 | ||
1255 | if (mwl8k_vif != NULL && | |
1256 | mwl8k_vif->is_hw_crypto_enabled == true) { | |
1257 | /* | |
1258 | * When MMIC ERROR is encountered | |
1259 | * by the firmware, payload is | |
1260 | * dropped and only 32 bytes of | |
1261 | * mwl8k Firmware header is sent | |
1262 | * to the host. | |
1263 | * | |
1264 | * We need to add four bytes of | |
1265 | * key information. In it | |
1266 | * MAC80211 expects keyidx set to | |
1267 | * 0 for triggering Counter | |
1268 | * Measure of MMIC failure. | |
1269 | */ | |
1270 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1271 | struct mwl8k_dma_data *tr; | |
1272 | tr = (struct mwl8k_dma_data *)skb->data; | |
1273 | memset((void *)&(tr->data), 0, 4); | |
1274 | pkt_len += 4; | |
1275 | } | |
1276 | ||
1277 | if (!ieee80211_is_auth(wh->frame_control)) | |
1278 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1279 | RX_FLAG_DECRYPTED | | |
1280 | RX_FLAG_MMIC_STRIPPED; | |
1281 | } | |
1282 | } | |
1283 | ||
1284 | skb_put(skb, pkt_len); | |
1285 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1286 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1287 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1288 | |
1289 | processed++; | |
1290 | } | |
1291 | ||
1292 | return processed; | |
1293 | } | |
1294 | ||
1295 | ||
1296 | /* | |
1297 | * Packet transmission. | |
1298 | */ | |
1299 | ||
a66098da LB |
1300 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1301 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1302 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1303 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1304 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1305 | |
e0493a8d LB |
1306 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1307 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1308 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1309 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1310 | #define MWL8K_QOS_EOSP 0x0010 | |
1311 | ||
a66098da LB |
1312 | struct mwl8k_tx_desc { |
1313 | __le32 status; | |
1314 | __u8 data_rate; | |
1315 | __u8 tx_priority; | |
1316 | __le16 qos_control; | |
1317 | __le32 pkt_phys_addr; | |
1318 | __le16 pkt_len; | |
d89173f2 | 1319 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1320 | __le32 next_txd_phys_addr; |
a66098da LB |
1321 | __le32 reserved; |
1322 | __le16 rate_info; | |
1323 | __u8 peer_id; | |
a1fe24b0 | 1324 | __u8 tx_frag_cnt; |
ba2d3587 | 1325 | } __packed; |
a66098da LB |
1326 | |
1327 | #define MWL8K_TX_DESCS 128 | |
1328 | ||
1329 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1330 | { | |
1331 | struct mwl8k_priv *priv = hw->priv; | |
1332 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1333 | int size; | |
1334 | int i; | |
1335 | ||
8ccbc3b8 | 1336 | txq->len = 0; |
45eb400d LB |
1337 | txq->head = 0; |
1338 | txq->tail = 0; | |
a66098da LB |
1339 | |
1340 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1341 | ||
45eb400d LB |
1342 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1343 | if (txq->txd == NULL) { | |
5db55844 | 1344 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1345 | return -ENOMEM; |
1346 | } | |
45eb400d | 1347 | memset(txq->txd, 0, size); |
a66098da | 1348 | |
b9ede5f1 | 1349 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1350 | if (txq->skb == NULL) { |
5db55844 | 1351 | wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n"); |
45eb400d | 1352 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1353 | return -ENOMEM; |
1354 | } | |
a66098da LB |
1355 | |
1356 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1357 | struct mwl8k_tx_desc *tx_desc; | |
1358 | int nexti; | |
1359 | ||
45eb400d | 1360 | tx_desc = txq->txd + i; |
a66098da LB |
1361 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1362 | ||
1363 | tx_desc->status = 0; | |
45eb400d LB |
1364 | tx_desc->next_txd_phys_addr = |
1365 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1366 | } |
1367 | ||
1368 | return 0; | |
1369 | } | |
1370 | ||
1371 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1372 | { | |
1373 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1374 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1375 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1376 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1377 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1378 | } | |
1379 | ||
7e1112d3 | 1380 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1381 | { |
7e1112d3 LB |
1382 | struct mwl8k_priv *priv = hw->priv; |
1383 | int i; | |
1384 | ||
1385 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
1386 | struct mwl8k_tx_queue *txq = priv->txq + i; | |
1387 | int fw_owned = 0; | |
1388 | int drv_owned = 0; | |
1389 | int unused = 0; | |
1390 | int desc; | |
1391 | ||
a66098da | 1392 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1393 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1394 | u32 status; | |
a66098da | 1395 | |
7e1112d3 | 1396 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1397 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1398 | fw_owned++; |
a66098da | 1399 | else |
7e1112d3 | 1400 | drv_owned++; |
a66098da LB |
1401 | |
1402 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1403 | unused++; |
a66098da | 1404 | } |
a66098da | 1405 | |
c96c31e4 JP |
1406 | wiphy_err(hw->wiphy, |
1407 | "txq[%d] len=%d head=%d tail=%d " | |
1408 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1409 | i, | |
1410 | txq->len, txq->head, txq->tail, | |
1411 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1412 | } |
a66098da LB |
1413 | } |
1414 | ||
618952a7 | 1415 | /* |
88de754a | 1416 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1417 | */ |
62abd3cf | 1418 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1419 | |
950d5b01 | 1420 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1421 | { |
a66098da | 1422 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1423 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1424 | int retry; |
1425 | int rc; | |
a66098da LB |
1426 | |
1427 | might_sleep(); | |
1428 | ||
7e1112d3 LB |
1429 | /* |
1430 | * The TX queues are stopped at this point, so this test | |
1431 | * doesn't need to take ->tx_lock. | |
1432 | */ | |
1433 | if (!priv->pending_tx_pkts) | |
1434 | return 0; | |
1435 | ||
1436 | retry = 0; | |
1437 | rc = 0; | |
1438 | ||
a66098da | 1439 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1440 | priv->tx_wait = &tx_wait; |
1441 | while (!rc) { | |
1442 | int oldcount; | |
1443 | unsigned long timeout; | |
a66098da | 1444 | |
7e1112d3 | 1445 | oldcount = priv->pending_tx_pkts; |
a66098da | 1446 | |
7e1112d3 | 1447 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1448 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1449 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
a66098da | 1450 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1451 | |
1452 | if (timeout) { | |
1453 | WARN_ON(priv->pending_tx_pkts); | |
1454 | if (retry) { | |
c96c31e4 | 1455 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1456 | } |
1457 | break; | |
1458 | } | |
1459 | ||
1460 | if (priv->pending_tx_pkts < oldcount) { | |
c96c31e4 JP |
1461 | wiphy_notice(hw->wiphy, |
1462 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1463 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1464 | retry = 1; |
1465 | continue; | |
1466 | } | |
1467 | ||
a66098da | 1468 | priv->tx_wait = NULL; |
a66098da | 1469 | |
c96c31e4 JP |
1470 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1471 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 LB |
1472 | mwl8k_dump_tx_rings(hw); |
1473 | ||
1474 | rc = -ETIMEDOUT; | |
a66098da | 1475 | } |
7e1112d3 | 1476 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1477 | |
7e1112d3 | 1478 | return rc; |
a66098da LB |
1479 | } |
1480 | ||
c23b5a69 LB |
1481 | #define MWL8K_TXD_SUCCESS(status) \ |
1482 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1483 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1484 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1485 | |
efb7c49a LB |
1486 | static int |
1487 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1488 | { |
1489 | struct mwl8k_priv *priv = hw->priv; | |
1490 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1491 | int processed; |
a66098da | 1492 | |
efb7c49a | 1493 | processed = 0; |
8ccbc3b8 | 1494 | while (txq->len > 0 && limit--) { |
a66098da | 1495 | int tx; |
a66098da LB |
1496 | struct mwl8k_tx_desc *tx_desc; |
1497 | unsigned long addr; | |
ce9e2e1b | 1498 | int size; |
a66098da LB |
1499 | struct sk_buff *skb; |
1500 | struct ieee80211_tx_info *info; | |
1501 | u32 status; | |
1502 | ||
45eb400d LB |
1503 | tx = txq->head; |
1504 | tx_desc = txq->txd + tx; | |
a66098da LB |
1505 | |
1506 | status = le32_to_cpu(tx_desc->status); | |
1507 | ||
1508 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1509 | if (!force) | |
1510 | break; | |
1511 | tx_desc->status &= | |
1512 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1513 | } | |
1514 | ||
45eb400d | 1515 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1516 | BUG_ON(txq->len == 0); |
1517 | txq->len--; | |
a66098da LB |
1518 | priv->pending_tx_pkts--; |
1519 | ||
1520 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1521 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1522 | skb = txq->skb[tx]; |
1523 | txq->skb[tx] = NULL; | |
a66098da LB |
1524 | |
1525 | BUG_ON(skb == NULL); | |
1526 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1527 | ||
20f09c3d | 1528 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da LB |
1529 | |
1530 | /* Mark descriptor as unused */ | |
1531 | tx_desc->pkt_phys_addr = 0; | |
1532 | tx_desc->pkt_len = 0; | |
1533 | ||
a66098da LB |
1534 | info = IEEE80211_SKB_CB(skb); |
1535 | ieee80211_tx_info_clear_status(info); | |
0bf22c37 NS |
1536 | |
1537 | /* Rate control is happening in the firmware. | |
1538 | * Ensure no tx rate is being reported. | |
1539 | */ | |
1540 | info->status.rates[0].idx = -1; | |
1541 | info->status.rates[0].count = 1; | |
1542 | ||
ce9e2e1b | 1543 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1544 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1545 | |
1546 | ieee80211_tx_status_irqsafe(hw, skb); | |
1547 | ||
efb7c49a | 1548 | processed++; |
a66098da LB |
1549 | } |
1550 | ||
efb7c49a | 1551 | if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex)) |
a66098da | 1552 | ieee80211_wake_queue(hw, index); |
efb7c49a LB |
1553 | |
1554 | return processed; | |
a66098da LB |
1555 | } |
1556 | ||
1557 | /* must be called only when the card's transmit is completely halted */ | |
1558 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1559 | { | |
1560 | struct mwl8k_priv *priv = hw->priv; | |
1561 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1562 | ||
efb7c49a | 1563 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1564 | |
45eb400d LB |
1565 | kfree(txq->skb); |
1566 | txq->skb = NULL; | |
a66098da LB |
1567 | |
1568 | pci_free_consistent(priv->pdev, | |
1569 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1570 | txq->txd, txq->txd_dma); |
1571 | txq->txd = NULL; | |
a66098da LB |
1572 | } |
1573 | ||
7bb45683 | 1574 | static void |
a66098da LB |
1575 | mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb) |
1576 | { | |
1577 | struct mwl8k_priv *priv = hw->priv; | |
1578 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1579 | struct mwl8k_vif *mwl8k_vif; |
a66098da LB |
1580 | struct ieee80211_hdr *wh; |
1581 | struct mwl8k_tx_queue *txq; | |
1582 | struct mwl8k_tx_desc *tx; | |
a66098da | 1583 | dma_addr_t dma; |
23b33906 LB |
1584 | u32 txstatus; |
1585 | u8 txdatarate; | |
1586 | u16 qos; | |
a66098da | 1587 | |
23b33906 LB |
1588 | wh = (struct ieee80211_hdr *)skb->data; |
1589 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1590 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1591 | else | |
1592 | qos = 0; | |
a66098da | 1593 | |
d9a07d49 NS |
1594 | if (priv->ap_fw) |
1595 | mwl8k_encapsulate_tx_frame(skb); | |
1596 | else | |
1597 | mwl8k_add_dma_header(skb, 0); | |
1598 | ||
23b33906 | 1599 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1600 | |
1601 | tx_info = IEEE80211_SKB_CB(skb); | |
1602 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); | |
a66098da LB |
1603 | |
1604 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1605 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1606 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1607 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1608 | } |
1609 | ||
23b33906 LB |
1610 | /* Setup firmware control bit fields for each frame type. */ |
1611 | txstatus = 0; | |
1612 | txdatarate = 0; | |
1613 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1614 | ieee80211_is_ctl(wh->frame_control)) { | |
1615 | txdatarate = 0; | |
e0493a8d | 1616 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1617 | } else if (ieee80211_is_data(wh->frame_control)) { |
1618 | txdatarate = 1; | |
1619 | if (is_multicast_ether_addr(wh->addr1)) | |
1620 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1621 | ||
e0493a8d | 1622 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1623 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1624 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1625 | else |
e0493a8d | 1626 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1627 | } |
a66098da LB |
1628 | |
1629 | dma = pci_map_single(priv->pdev, skb->data, | |
1630 | skb->len, PCI_DMA_TODEVICE); | |
1631 | ||
1632 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
1633 | wiphy_debug(hw->wiphy, |
1634 | "failed to dma map skb, dropping TX frame.\n"); | |
23b33906 | 1635 | dev_kfree_skb(skb); |
7bb45683 | 1636 | return; |
a66098da LB |
1637 | } |
1638 | ||
23b33906 | 1639 | spin_lock_bh(&priv->tx_lock); |
a66098da | 1640 | |
23b33906 | 1641 | txq = priv->txq + index; |
a66098da | 1642 | |
45eb400d LB |
1643 | BUG_ON(txq->skb[txq->tail] != NULL); |
1644 | txq->skb[txq->tail] = skb; | |
a66098da | 1645 | |
45eb400d | 1646 | tx = txq->txd + txq->tail; |
23b33906 LB |
1647 | tx->data_rate = txdatarate; |
1648 | tx->tx_priority = index; | |
a66098da | 1649 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
1650 | tx->pkt_phys_addr = cpu_to_le32(dma); |
1651 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 1652 | tx->rate_info = 0; |
a680400e LB |
1653 | if (!priv->ap_fw && tx_info->control.sta != NULL) |
1654 | tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id; | |
1655 | else | |
1656 | tx->peer_id = 0; | |
a66098da | 1657 | wmb(); |
23b33906 LB |
1658 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
1659 | ||
8ccbc3b8 | 1660 | txq->len++; |
a66098da | 1661 | priv->pending_tx_pkts++; |
a66098da | 1662 | |
45eb400d LB |
1663 | txq->tail++; |
1664 | if (txq->tail == MWL8K_TX_DESCS) | |
1665 | txq->tail = 0; | |
23b33906 | 1666 | |
45eb400d | 1667 | if (txq->head == txq->tail) |
a66098da LB |
1668 | ieee80211_stop_queue(hw, index); |
1669 | ||
23b33906 | 1670 | mwl8k_tx_start(priv); |
a66098da LB |
1671 | |
1672 | spin_unlock_bh(&priv->tx_lock); | |
a66098da LB |
1673 | } |
1674 | ||
1675 | ||
618952a7 LB |
1676 | /* |
1677 | * Firmware access. | |
1678 | * | |
1679 | * We have the following requirements for issuing firmware commands: | |
1680 | * - Some commands require that the packet transmit path is idle when | |
1681 | * the command is issued. (For simplicity, we'll just quiesce the | |
1682 | * transmit path for every command.) | |
1683 | * - There are certain sequences of commands that need to be issued to | |
1684 | * the hardware sequentially, with no other intervening commands. | |
1685 | * | |
1686 | * This leads to an implementation of a "firmware lock" as a mutex that | |
1687 | * can be taken recursively, and which is taken by both the low-level | |
1688 | * command submission function (mwl8k_post_cmd) as well as any users of | |
1689 | * that function that require issuing of an atomic sequence of commands, | |
1690 | * and quiesces the transmit path whenever it's taken. | |
1691 | */ | |
1692 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
1693 | { | |
1694 | struct mwl8k_priv *priv = hw->priv; | |
1695 | ||
1696 | if (priv->fw_mutex_owner != current) { | |
1697 | int rc; | |
1698 | ||
1699 | mutex_lock(&priv->fw_mutex); | |
1700 | ieee80211_stop_queues(hw); | |
1701 | ||
1702 | rc = mwl8k_tx_wait_empty(hw); | |
1703 | if (rc) { | |
1704 | ieee80211_wake_queues(hw); | |
1705 | mutex_unlock(&priv->fw_mutex); | |
1706 | ||
1707 | return rc; | |
1708 | } | |
1709 | ||
1710 | priv->fw_mutex_owner = current; | |
1711 | } | |
1712 | ||
1713 | priv->fw_mutex_depth++; | |
1714 | ||
1715 | return 0; | |
1716 | } | |
1717 | ||
1718 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
1719 | { | |
1720 | struct mwl8k_priv *priv = hw->priv; | |
1721 | ||
1722 | if (!--priv->fw_mutex_depth) { | |
1723 | ieee80211_wake_queues(hw); | |
1724 | priv->fw_mutex_owner = NULL; | |
1725 | mutex_unlock(&priv->fw_mutex); | |
1726 | } | |
1727 | } | |
1728 | ||
1729 | ||
a66098da LB |
1730 | /* |
1731 | * Command processing. | |
1732 | */ | |
1733 | ||
0c9cc640 LB |
1734 | /* Timeout firmware commands after 10s */ |
1735 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
1736 | |
1737 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
1738 | { | |
1739 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
1740 | struct mwl8k_priv *priv = hw->priv; | |
1741 | void __iomem *regs = priv->regs; | |
1742 | dma_addr_t dma_addr; | |
1743 | unsigned int dma_size; | |
1744 | int rc; | |
a66098da LB |
1745 | unsigned long timeout = 0; |
1746 | u8 buf[32]; | |
1747 | ||
b603742f | 1748 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
1749 | dma_size = le16_to_cpu(cmd->length); |
1750 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
1751 | PCI_DMA_BIDIRECTIONAL); | |
1752 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
1753 | return -ENOMEM; | |
1754 | ||
618952a7 | 1755 | rc = mwl8k_fw_lock(hw); |
39a1e42e LB |
1756 | if (rc) { |
1757 | pci_unmap_single(priv->pdev, dma_addr, dma_size, | |
1758 | PCI_DMA_BIDIRECTIONAL); | |
618952a7 | 1759 | return rc; |
39a1e42e | 1760 | } |
a66098da | 1761 | |
a66098da LB |
1762 | priv->hostcmd_wait = &cmd_wait; |
1763 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
1764 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
1765 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1766 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1767 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
1768 | |
1769 | timeout = wait_for_completion_timeout(&cmd_wait, | |
1770 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
1771 | ||
618952a7 LB |
1772 | priv->hostcmd_wait = NULL; |
1773 | ||
1774 | mwl8k_fw_unlock(hw); | |
1775 | ||
37055bd4 LB |
1776 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
1777 | PCI_DMA_BIDIRECTIONAL); | |
1778 | ||
a66098da | 1779 | if (!timeout) { |
5db55844 | 1780 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
1781 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1782 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
1783 | rc = -ETIMEDOUT; |
1784 | } else { | |
0c9cc640 LB |
1785 | int ms; |
1786 | ||
1787 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
1788 | ||
ce9e2e1b | 1789 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 1790 | if (rc) |
5db55844 | 1791 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
1792 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1793 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 1794 | else if (ms > 2000) |
5db55844 | 1795 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
1796 | mwl8k_cmd_name(cmd->code, |
1797 | buf, sizeof(buf)), | |
1798 | ms); | |
a66098da LB |
1799 | } |
1800 | ||
a66098da LB |
1801 | return rc; |
1802 | } | |
1803 | ||
f57ca9c1 LB |
1804 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
1805 | struct ieee80211_vif *vif, | |
1806 | struct mwl8k_cmd_pkt *cmd) | |
1807 | { | |
1808 | if (vif != NULL) | |
1809 | cmd->macid = MWL8K_VIF(vif)->macid; | |
1810 | return mwl8k_post_cmd(hw, cmd); | |
1811 | } | |
1812 | ||
1349ad2f LB |
1813 | /* |
1814 | * Setup code shared between STA and AP firmware images. | |
1815 | */ | |
1816 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
1817 | { | |
1818 | struct mwl8k_priv *priv = hw->priv; | |
1819 | ||
1820 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
1821 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
1822 | ||
1823 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
1824 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
1825 | ||
1826 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
1827 | priv->band_24.channels = priv->channels_24; | |
1828 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
1829 | priv->band_24.bitrates = priv->rates_24; | |
1830 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
1831 | ||
1832 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
1833 | } | |
1834 | ||
4eae9edd LB |
1835 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
1836 | { | |
1837 | struct mwl8k_priv *priv = hw->priv; | |
1838 | ||
1839 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
1840 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
1841 | ||
1842 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
1843 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
1844 | ||
1845 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
1846 | priv->band_50.channels = priv->channels_50; | |
1847 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
1848 | priv->band_50.bitrates = priv->rates_50; | |
1849 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
1850 | ||
1851 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
1852 | } | |
1853 | ||
a66098da | 1854 | /* |
04b147b1 | 1855 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 1856 | */ |
04b147b1 | 1857 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
1858 | struct mwl8k_cmd_pkt header; |
1859 | __u8 hw_rev; | |
1860 | __u8 host_interface; | |
1861 | __le16 num_mcaddrs; | |
d89173f2 | 1862 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
1863 | __le16 region_code; |
1864 | __le32 fw_rev; | |
1865 | __le32 ps_cookie; | |
1866 | __le32 caps; | |
1867 | __u8 mcs_bitmap[16]; | |
1868 | __le32 rx_queue_ptr; | |
1869 | __le32 num_tx_queues; | |
1870 | __le32 tx_queue_ptrs[MWL8K_TX_QUEUES]; | |
1871 | __le32 caps2; | |
1872 | __le32 num_tx_desc_per_queue; | |
45eb400d | 1873 | __le32 total_rxd; |
ba2d3587 | 1874 | } __packed; |
a66098da | 1875 | |
341c9791 LB |
1876 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
1877 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
1878 | #define MWL8K_CAP_AMPDU 0x04000000 | |
1879 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
1880 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
1881 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
1882 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
1883 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
1884 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
1885 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
1886 | #define MWL8K_CAP_MIMO 0x00000200 | |
1887 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
1888 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
1889 | #define MWL8K_CAP_5GHZ 0x00000004 | |
1890 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 1891 | |
06953235 LB |
1892 | static void |
1893 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
1894 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 1895 | { |
341c9791 LB |
1896 | int rx_streams; |
1897 | int tx_streams; | |
1898 | ||
777ad375 | 1899 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
1900 | |
1901 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 1902 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 1903 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 1904 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
1905 | if (cap & MWL8K_CAP_AMPDU) { |
1906 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
1907 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
1908 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
1909 | } |
1910 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 1911 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 1912 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 1913 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 1914 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 1915 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 1916 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 1917 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 1918 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 1919 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 1920 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 1921 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
1922 | |
1923 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
1924 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
1925 | ||
777ad375 | 1926 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 1927 | if (rx_streams >= 2) |
777ad375 | 1928 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 1929 | if (rx_streams >= 3) |
777ad375 LB |
1930 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
1931 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
1932 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
1933 | |
1934 | if (rx_streams != tx_streams) { | |
777ad375 LB |
1935 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
1936 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
1937 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
1938 | } | |
1939 | } | |
1940 | ||
06953235 LB |
1941 | static void |
1942 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
1943 | { | |
1944 | struct mwl8k_priv *priv = hw->priv; | |
1945 | ||
1946 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { | |
1947 | mwl8k_setup_2ghz_band(hw); | |
1948 | if (caps & MWL8K_CAP_MIMO) | |
1949 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
1950 | } | |
1951 | ||
1952 | if (caps & MWL8K_CAP_5GHZ) { | |
1953 | mwl8k_setup_5ghz_band(hw); | |
1954 | if (caps & MWL8K_CAP_MIMO) | |
1955 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
1956 | } | |
1957 | } | |
1958 | ||
04b147b1 | 1959 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
1960 | { |
1961 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 1962 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
1963 | int rc; |
1964 | int i; | |
1965 | ||
1966 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
1967 | if (cmd == NULL) | |
1968 | return -ENOMEM; | |
1969 | ||
1970 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
1971 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
1972 | ||
1973 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
1974 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 1975 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
4ff6432e | 1976 | cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES); |
a66098da | 1977 | for (i = 0; i < MWL8K_TX_QUEUES; i++) |
45eb400d | 1978 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 1979 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 1980 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
1981 | |
1982 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
1983 | ||
1984 | if (!rc) { | |
1985 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
1986 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 1987 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 1988 | priv->hw_rev = cmd->hw_rev; |
06953235 | 1989 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
1990 | priv->ap_macids_supported = 0x00000000; |
1991 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
1992 | } |
1993 | ||
1994 | kfree(cmd); | |
1995 | return rc; | |
1996 | } | |
1997 | ||
42fba21d LB |
1998 | /* |
1999 | * CMD_GET_HW_SPEC (AP version). | |
2000 | */ | |
2001 | struct mwl8k_cmd_get_hw_spec_ap { | |
2002 | struct mwl8k_cmd_pkt header; | |
2003 | __u8 hw_rev; | |
2004 | __u8 host_interface; | |
2005 | __le16 num_wcb; | |
2006 | __le16 num_mcaddrs; | |
2007 | __u8 perm_addr[ETH_ALEN]; | |
2008 | __le16 region_code; | |
2009 | __le16 num_antenna; | |
2010 | __le32 fw_rev; | |
2011 | __le32 wcbbase0; | |
2012 | __le32 rxwrptr; | |
2013 | __le32 rxrdptr; | |
2014 | __le32 ps_cookie; | |
2015 | __le32 wcbbase1; | |
2016 | __le32 wcbbase2; | |
2017 | __le32 wcbbase3; | |
952a0e96 | 2018 | __le32 fw_api_version; |
ba2d3587 | 2019 | } __packed; |
42fba21d LB |
2020 | |
2021 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2022 | { | |
2023 | struct mwl8k_priv *priv = hw->priv; | |
2024 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
2025 | int rc; | |
952a0e96 | 2026 | u32 api_version; |
42fba21d LB |
2027 | |
2028 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2029 | if (cmd == NULL) | |
2030 | return -ENOMEM; | |
2031 | ||
2032 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2033 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2034 | ||
2035 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2036 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2037 | ||
2038 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2039 | ||
2040 | if (!rc) { | |
2041 | int off; | |
2042 | ||
952a0e96 BC |
2043 | api_version = le32_to_cpu(cmd->fw_api_version); |
2044 | if (priv->device_info->fw_api_ap != api_version) { | |
2045 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2046 | " Expected %d got %d.\n", MWL8K_NAME, | |
2047 | priv->device_info->part_name, | |
2048 | priv->device_info->fw_api_ap, | |
2049 | api_version); | |
2050 | rc = -EINVAL; | |
2051 | goto done; | |
2052 | } | |
42fba21d LB |
2053 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2054 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2055 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2056 | priv->hw_rev = cmd->hw_rev; | |
1349ad2f | 2057 | mwl8k_setup_2ghz_band(hw); |
ee0ddf18 LB |
2058 | priv->ap_macids_supported = 0x000000ff; |
2059 | priv->sta_macids_supported = 0x00000000; | |
42fba21d LB |
2060 | |
2061 | off = le32_to_cpu(cmd->wcbbase0) & 0xffff; | |
b603742f | 2062 | iowrite32(priv->txq[0].txd_dma, priv->sram + off); |
42fba21d LB |
2063 | |
2064 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; | |
b603742f | 2065 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2066 | |
2067 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2068 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2069 | |
2070 | off = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
b603742f | 2071 | iowrite32(priv->txq[1].txd_dma, priv->sram + off); |
42fba21d LB |
2072 | |
2073 | off = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
b603742f | 2074 | iowrite32(priv->txq[2].txd_dma, priv->sram + off); |
42fba21d LB |
2075 | |
2076 | off = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
b603742f | 2077 | iowrite32(priv->txq[3].txd_dma, priv->sram + off); |
42fba21d LB |
2078 | } |
2079 | ||
952a0e96 | 2080 | done: |
42fba21d LB |
2081 | kfree(cmd); |
2082 | return rc; | |
2083 | } | |
2084 | ||
2085 | /* | |
2086 | * CMD_SET_HW_SPEC. | |
2087 | */ | |
2088 | struct mwl8k_cmd_set_hw_spec { | |
2089 | struct mwl8k_cmd_pkt header; | |
2090 | __u8 hw_rev; | |
2091 | __u8 host_interface; | |
2092 | __le16 num_mcaddrs; | |
2093 | __u8 perm_addr[ETH_ALEN]; | |
2094 | __le16 region_code; | |
2095 | __le32 fw_rev; | |
2096 | __le32 ps_cookie; | |
2097 | __le32 caps; | |
2098 | __le32 rx_queue_ptr; | |
2099 | __le32 num_tx_queues; | |
2100 | __le32 tx_queue_ptrs[MWL8K_TX_QUEUES]; | |
2101 | __le32 flags; | |
2102 | __le32 num_tx_desc_per_queue; | |
2103 | __le32 total_rxd; | |
ba2d3587 | 2104 | } __packed; |
42fba21d | 2105 | |
b64fe619 LB |
2106 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2107 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2108 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2109 | |
2110 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2111 | { | |
2112 | struct mwl8k_priv *priv = hw->priv; | |
2113 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2114 | int rc; | |
2115 | int i; | |
2116 | ||
2117 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2118 | if (cmd == NULL) | |
2119 | return -ENOMEM; | |
2120 | ||
2121 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2122 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2123 | ||
2124 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2125 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
2126 | cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES); | |
85c9205c NS |
2127 | |
2128 | /* | |
2129 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2130 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2131 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2132 | * priority is interpreted the right way in firmware. | |
2133 | */ | |
2134 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
2135 | int j = MWL8K_TX_QUEUES - 1 - i; | |
2136 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); | |
2137 | } | |
2138 | ||
b64fe619 LB |
2139 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2140 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
2141 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON); | |
42fba21d LB |
2142 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2143 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2144 | ||
2145 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2146 | kfree(cmd); | |
2147 | ||
2148 | return rc; | |
2149 | } | |
2150 | ||
a66098da LB |
2151 | /* |
2152 | * CMD_MAC_MULTICAST_ADR. | |
2153 | */ | |
2154 | struct mwl8k_cmd_mac_multicast_adr { | |
2155 | struct mwl8k_cmd_pkt header; | |
2156 | __le16 action; | |
2157 | __le16 numaddr; | |
ce9e2e1b | 2158 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2159 | }; |
2160 | ||
d5e30845 LB |
2161 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2162 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2163 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2164 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2165 | |
e81cd2d6 | 2166 | static struct mwl8k_cmd_pkt * |
447ced07 | 2167 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2168 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2169 | { |
e81cd2d6 | 2170 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2171 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2172 | int size; |
22bedad3 JP |
2173 | int mc_count = 0; |
2174 | ||
2175 | if (mc_list) | |
2176 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2177 | |
447ced07 | 2178 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2179 | allmulti = 1; |
2180 | mc_count = 0; | |
2181 | } | |
e81cd2d6 LB |
2182 | |
2183 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2184 | |
e81cd2d6 | 2185 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2186 | if (cmd == NULL) |
e81cd2d6 | 2187 | return NULL; |
a66098da LB |
2188 | |
2189 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2190 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2191 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2192 | MWL8K_ENABLE_RX_BROADCAST); | |
2193 | ||
2194 | if (allmulti) { | |
2195 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2196 | } else if (mc_count) { | |
22bedad3 JP |
2197 | struct netdev_hw_addr *ha; |
2198 | int i = 0; | |
d5e30845 LB |
2199 | |
2200 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2201 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2202 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2203 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2204 | } |
a66098da LB |
2205 | } |
2206 | ||
e81cd2d6 | 2207 | return &cmd->header; |
a66098da LB |
2208 | } |
2209 | ||
2210 | /* | |
55489b6e | 2211 | * CMD_GET_STAT. |
a66098da | 2212 | */ |
55489b6e | 2213 | struct mwl8k_cmd_get_stat { |
a66098da | 2214 | struct mwl8k_cmd_pkt header; |
a66098da | 2215 | __le32 stats[64]; |
ba2d3587 | 2216 | } __packed; |
a66098da LB |
2217 | |
2218 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2219 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2220 | #define MWL8K_STAT_FCS_ERROR 24 | |
2221 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2222 | ||
55489b6e LB |
2223 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2224 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2225 | { |
55489b6e | 2226 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2227 | int rc; |
2228 | ||
2229 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2230 | if (cmd == NULL) | |
2231 | return -ENOMEM; | |
2232 | ||
2233 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2234 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2235 | |
2236 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2237 | if (!rc) { | |
2238 | stats->dot11ACKFailureCount = | |
2239 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2240 | stats->dot11RTSFailureCount = | |
2241 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2242 | stats->dot11FCSErrorCount = | |
2243 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2244 | stats->dot11RTSSuccessCount = | |
2245 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2246 | } | |
2247 | kfree(cmd); | |
2248 | ||
2249 | return rc; | |
2250 | } | |
2251 | ||
2252 | /* | |
55489b6e | 2253 | * CMD_RADIO_CONTROL. |
a66098da | 2254 | */ |
55489b6e | 2255 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2256 | struct mwl8k_cmd_pkt header; |
2257 | __le16 action; | |
2258 | __le16 control; | |
2259 | __le16 radio_on; | |
ba2d3587 | 2260 | } __packed; |
a66098da | 2261 | |
c46563b7 | 2262 | static int |
55489b6e | 2263 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2264 | { |
2265 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2266 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2267 | int rc; |
2268 | ||
c46563b7 | 2269 | if (enable == priv->radio_on && !force) |
a66098da LB |
2270 | return 0; |
2271 | ||
a66098da LB |
2272 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2273 | if (cmd == NULL) | |
2274 | return -ENOMEM; | |
2275 | ||
2276 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2277 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2278 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2279 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2280 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2281 | ||
2282 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2283 | kfree(cmd); | |
2284 | ||
2285 | if (!rc) | |
c46563b7 | 2286 | priv->radio_on = enable; |
a66098da LB |
2287 | |
2288 | return rc; | |
2289 | } | |
2290 | ||
55489b6e | 2291 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2292 | { |
55489b6e | 2293 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2294 | } |
2295 | ||
55489b6e | 2296 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2297 | { |
55489b6e | 2298 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2299 | } |
2300 | ||
a66098da LB |
2301 | static int |
2302 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2303 | { | |
99200a99 | 2304 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2305 | |
68ce3884 | 2306 | priv->radio_short_preamble = short_preamble; |
a66098da | 2307 | |
55489b6e | 2308 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2309 | } |
2310 | ||
2311 | /* | |
55489b6e | 2312 | * CMD_RF_TX_POWER. |
a66098da | 2313 | */ |
41fdf097 | 2314 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2315 | |
55489b6e | 2316 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2317 | struct mwl8k_cmd_pkt header; |
2318 | __le16 action; | |
2319 | __le16 support_level; | |
2320 | __le16 current_level; | |
2321 | __le16 reserved; | |
41fdf097 | 2322 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2323 | } __packed; |
a66098da | 2324 | |
55489b6e | 2325 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2326 | { |
55489b6e | 2327 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2328 | int rc; |
2329 | ||
2330 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2331 | if (cmd == NULL) | |
2332 | return -ENOMEM; | |
2333 | ||
2334 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2335 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2336 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2337 | cmd->support_level = cpu_to_le16(dBm); | |
2338 | ||
2339 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2340 | kfree(cmd); | |
2341 | ||
2342 | return rc; | |
2343 | } | |
2344 | ||
41fdf097 NS |
2345 | /* |
2346 | * CMD_TX_POWER. | |
2347 | */ | |
2348 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2349 | ||
2350 | struct mwl8k_cmd_tx_power { | |
2351 | struct mwl8k_cmd_pkt header; | |
2352 | __le16 action; | |
2353 | __le16 band; | |
2354 | __le16 channel; | |
2355 | __le16 bw; | |
2356 | __le16 sub_ch; | |
2357 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
2358 | } __attribute__((packed)); | |
2359 | ||
2360 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2361 | struct ieee80211_conf *conf, | |
2362 | unsigned short pwr) | |
2363 | { | |
2364 | struct ieee80211_channel *channel = conf->channel; | |
2365 | struct mwl8k_cmd_tx_power *cmd; | |
2366 | int rc; | |
2367 | int i; | |
2368 | ||
2369 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2370 | if (cmd == NULL) | |
2371 | return -ENOMEM; | |
2372 | ||
2373 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2374 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2375 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2376 | ||
2377 | if (channel->band == IEEE80211_BAND_2GHZ) | |
2378 | cmd->band = cpu_to_le16(0x1); | |
2379 | else if (channel->band == IEEE80211_BAND_5GHZ) | |
2380 | cmd->band = cpu_to_le16(0x4); | |
2381 | ||
2382 | cmd->channel = channel->hw_value; | |
2383 | ||
2384 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2385 | conf->channel_type == NL80211_CHAN_HT20) { | |
2386 | cmd->bw = cpu_to_le16(0x2); | |
2387 | } else { | |
2388 | cmd->bw = cpu_to_le16(0x4); | |
2389 | if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2390 | cmd->sub_ch = cpu_to_le16(0x3); | |
2391 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2392 | cmd->sub_ch = cpu_to_le16(0x1); | |
2393 | } | |
2394 | ||
2395 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2396 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2397 | ||
2398 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2399 | kfree(cmd); | |
2400 | ||
2401 | return rc; | |
2402 | } | |
2403 | ||
08b06347 LB |
2404 | /* |
2405 | * CMD_RF_ANTENNA. | |
2406 | */ | |
2407 | struct mwl8k_cmd_rf_antenna { | |
2408 | struct mwl8k_cmd_pkt header; | |
2409 | __le16 antenna; | |
2410 | __le16 mode; | |
ba2d3587 | 2411 | } __packed; |
08b06347 LB |
2412 | |
2413 | #define MWL8K_RF_ANTENNA_RX 1 | |
2414 | #define MWL8K_RF_ANTENNA_TX 2 | |
2415 | ||
2416 | static int | |
2417 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2418 | { | |
2419 | struct mwl8k_cmd_rf_antenna *cmd; | |
2420 | int rc; | |
2421 | ||
2422 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2423 | if (cmd == NULL) | |
2424 | return -ENOMEM; | |
2425 | ||
2426 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2427 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2428 | cmd->antenna = cpu_to_le16(antenna); | |
2429 | cmd->mode = cpu_to_le16(mask); | |
2430 | ||
2431 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2432 | kfree(cmd); | |
2433 | ||
2434 | return rc; | |
2435 | } | |
2436 | ||
b64fe619 LB |
2437 | /* |
2438 | * CMD_SET_BEACON. | |
2439 | */ | |
2440 | struct mwl8k_cmd_set_beacon { | |
2441 | struct mwl8k_cmd_pkt header; | |
2442 | __le16 beacon_len; | |
2443 | __u8 beacon[0]; | |
2444 | }; | |
2445 | ||
aa21d0f6 LB |
2446 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2447 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2448 | { |
2449 | struct mwl8k_cmd_set_beacon *cmd; | |
2450 | int rc; | |
2451 | ||
2452 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2453 | if (cmd == NULL) | |
2454 | return -ENOMEM; | |
2455 | ||
2456 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2457 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2458 | cmd->beacon_len = cpu_to_le16(len); | |
2459 | memcpy(cmd->beacon, beacon, len); | |
2460 | ||
aa21d0f6 | 2461 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2462 | kfree(cmd); |
2463 | ||
2464 | return rc; | |
2465 | } | |
2466 | ||
a66098da LB |
2467 | /* |
2468 | * CMD_SET_PRE_SCAN. | |
2469 | */ | |
2470 | struct mwl8k_cmd_set_pre_scan { | |
2471 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2472 | } __packed; |
a66098da LB |
2473 | |
2474 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2475 | { | |
2476 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2477 | int rc; | |
2478 | ||
2479 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2480 | if (cmd == NULL) | |
2481 | return -ENOMEM; | |
2482 | ||
2483 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2484 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2485 | ||
2486 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2487 | kfree(cmd); | |
2488 | ||
2489 | return rc; | |
2490 | } | |
2491 | ||
2492 | /* | |
2493 | * CMD_SET_POST_SCAN. | |
2494 | */ | |
2495 | struct mwl8k_cmd_set_post_scan { | |
2496 | struct mwl8k_cmd_pkt header; | |
2497 | __le32 isibss; | |
d89173f2 | 2498 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 2499 | } __packed; |
a66098da LB |
2500 | |
2501 | static int | |
0a11dfc3 | 2502 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2503 | { |
2504 | struct mwl8k_cmd_set_post_scan *cmd; | |
2505 | int rc; | |
2506 | ||
2507 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2508 | if (cmd == NULL) | |
2509 | return -ENOMEM; | |
2510 | ||
2511 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
2512 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2513 | cmd->isibss = 0; | |
d89173f2 | 2514 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
2515 | |
2516 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2517 | kfree(cmd); | |
2518 | ||
2519 | return rc; | |
2520 | } | |
2521 | ||
2522 | /* | |
2523 | * CMD_SET_RF_CHANNEL. | |
2524 | */ | |
2525 | struct mwl8k_cmd_set_rf_channel { | |
2526 | struct mwl8k_cmd_pkt header; | |
2527 | __le16 action; | |
2528 | __u8 current_channel; | |
2529 | __le32 channel_flags; | |
ba2d3587 | 2530 | } __packed; |
a66098da LB |
2531 | |
2532 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 2533 | struct ieee80211_conf *conf) |
a66098da | 2534 | { |
610677d2 | 2535 | struct ieee80211_channel *channel = conf->channel; |
a66098da LB |
2536 | struct mwl8k_cmd_set_rf_channel *cmd; |
2537 | int rc; | |
2538 | ||
2539 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2540 | if (cmd == NULL) | |
2541 | return -ENOMEM; | |
2542 | ||
2543 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
2544 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2545 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2546 | cmd->current_channel = channel->hw_value; | |
610677d2 | 2547 | |
a66098da | 2548 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 2549 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
2550 | else if (channel->band == IEEE80211_BAND_5GHZ) |
2551 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 LB |
2552 | |
2553 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2554 | conf->channel_type == NL80211_CHAN_HT20) | |
2555 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
2556 | else if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2557 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
2558 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2559 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
a66098da LB |
2560 | |
2561 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2562 | kfree(cmd); | |
2563 | ||
2564 | return rc; | |
2565 | } | |
2566 | ||
2567 | /* | |
55489b6e | 2568 | * CMD_SET_AID. |
a66098da | 2569 | */ |
55489b6e LB |
2570 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
2571 | #define MWL8K_FRAME_PROT_11G 0x07 | |
2572 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
2573 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 2574 | |
55489b6e LB |
2575 | struct mwl8k_cmd_update_set_aid { |
2576 | struct mwl8k_cmd_pkt header; | |
2577 | __le16 aid; | |
a66098da | 2578 | |
55489b6e LB |
2579 | /* AP's MAC address (BSSID) */ |
2580 | __u8 bssid[ETH_ALEN]; | |
2581 | __le16 protection_mode; | |
2582 | __u8 supp_rates[14]; | |
ba2d3587 | 2583 | } __packed; |
a66098da | 2584 | |
c6e96010 LB |
2585 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
2586 | { | |
2587 | int i; | |
2588 | int j; | |
2589 | ||
2590 | /* | |
2591 | * Clear nonstandard rates 4 and 13. | |
2592 | */ | |
2593 | mask &= 0x1fef; | |
2594 | ||
2595 | for (i = 0, j = 0; i < 14; i++) { | |
2596 | if (mask & (1 << i)) | |
777ad375 | 2597 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
2598 | } |
2599 | } | |
2600 | ||
55489b6e | 2601 | static int |
c6e96010 LB |
2602 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
2603 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 2604 | { |
55489b6e LB |
2605 | struct mwl8k_cmd_update_set_aid *cmd; |
2606 | u16 prot_mode; | |
a66098da LB |
2607 | int rc; |
2608 | ||
2609 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2610 | if (cmd == NULL) | |
2611 | return -ENOMEM; | |
2612 | ||
55489b6e | 2613 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 2614 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 2615 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 2616 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 2617 | |
7dc6a7a7 | 2618 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
2619 | prot_mode = MWL8K_FRAME_PROT_11G; |
2620 | } else { | |
7dc6a7a7 | 2621 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
2622 | IEEE80211_HT_OP_MODE_PROTECTION) { |
2623 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
2624 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
2625 | break; | |
2626 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
2627 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
2628 | break; | |
2629 | default: | |
2630 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
2631 | break; | |
2632 | } | |
2633 | } | |
2634 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 2635 | |
c6e96010 | 2636 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
2637 | |
2638 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2639 | kfree(cmd); | |
2640 | ||
2641 | return rc; | |
2642 | } | |
2643 | ||
32060e1b | 2644 | /* |
55489b6e | 2645 | * CMD_SET_RATE. |
32060e1b | 2646 | */ |
55489b6e LB |
2647 | struct mwl8k_cmd_set_rate { |
2648 | struct mwl8k_cmd_pkt header; | |
2649 | __u8 legacy_rates[14]; | |
2650 | ||
2651 | /* Bitmap for supported MCS codes. */ | |
2652 | __u8 mcs_set[16]; | |
2653 | __u8 reserved[16]; | |
ba2d3587 | 2654 | } __packed; |
32060e1b | 2655 | |
55489b6e | 2656 | static int |
c6e96010 | 2657 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 2658 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 2659 | { |
55489b6e | 2660 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
2661 | int rc; |
2662 | ||
2663 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2664 | if (cmd == NULL) | |
2665 | return -ENOMEM; | |
2666 | ||
55489b6e | 2667 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 2668 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 2669 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 2670 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
2671 | |
2672 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2673 | kfree(cmd); | |
2674 | ||
2675 | return rc; | |
2676 | } | |
2677 | ||
a66098da | 2678 | /* |
55489b6e | 2679 | * CMD_FINALIZE_JOIN. |
a66098da | 2680 | */ |
55489b6e LB |
2681 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
2682 | ||
2683 | struct mwl8k_cmd_finalize_join { | |
a66098da | 2684 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
2685 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
2686 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 2687 | } __packed; |
a66098da | 2688 | |
55489b6e LB |
2689 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
2690 | int framelen, int dtim) | |
a66098da | 2691 | { |
55489b6e LB |
2692 | struct mwl8k_cmd_finalize_join *cmd; |
2693 | struct ieee80211_mgmt *payload = frame; | |
2694 | int payload_len; | |
a66098da LB |
2695 | int rc; |
2696 | ||
2697 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2698 | if (cmd == NULL) | |
2699 | return -ENOMEM; | |
2700 | ||
55489b6e | 2701 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 2702 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2703 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
2704 | ||
2705 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
2706 | if (payload_len < 0) | |
2707 | payload_len = 0; | |
2708 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
2709 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
2710 | ||
2711 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
2712 | |
2713 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2714 | kfree(cmd); | |
2715 | ||
2716 | return rc; | |
2717 | } | |
2718 | ||
2719 | /* | |
55489b6e | 2720 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 2721 | */ |
55489b6e | 2722 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
2723 | struct mwl8k_cmd_pkt header; |
2724 | __le16 action; | |
55489b6e | 2725 | __le16 threshold; |
ba2d3587 | 2726 | } __packed; |
a66098da | 2727 | |
c2c2b12a LB |
2728 | static int |
2729 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 2730 | { |
55489b6e | 2731 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
2732 | int rc; |
2733 | ||
2734 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2735 | if (cmd == NULL) | |
2736 | return -ENOMEM; | |
2737 | ||
55489b6e | 2738 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 2739 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
2740 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2741 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
2742 | |
2743 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2744 | kfree(cmd); | |
2745 | ||
a66098da LB |
2746 | return rc; |
2747 | } | |
2748 | ||
2749 | /* | |
55489b6e | 2750 | * CMD_SET_SLOT. |
a66098da | 2751 | */ |
55489b6e | 2752 | struct mwl8k_cmd_set_slot { |
a66098da LB |
2753 | struct mwl8k_cmd_pkt header; |
2754 | __le16 action; | |
55489b6e | 2755 | __u8 short_slot; |
ba2d3587 | 2756 | } __packed; |
a66098da | 2757 | |
55489b6e | 2758 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 2759 | { |
55489b6e | 2760 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
2761 | int rc; |
2762 | ||
2763 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2764 | if (cmd == NULL) | |
2765 | return -ENOMEM; | |
2766 | ||
55489b6e | 2767 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 2768 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2769 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2770 | cmd->short_slot = short_slot_time; | |
a66098da LB |
2771 | |
2772 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2773 | kfree(cmd); | |
2774 | ||
2775 | return rc; | |
2776 | } | |
2777 | ||
2778 | /* | |
2779 | * CMD_SET_EDCA_PARAMS. | |
2780 | */ | |
2781 | struct mwl8k_cmd_set_edca_params { | |
2782 | struct mwl8k_cmd_pkt header; | |
2783 | ||
2784 | /* See MWL8K_SET_EDCA_XXX below */ | |
2785 | __le16 action; | |
2786 | ||
2787 | /* TX opportunity in units of 32 us */ | |
2788 | __le16 txop; | |
2789 | ||
2e484c89 LB |
2790 | union { |
2791 | struct { | |
2792 | /* Log exponent of max contention period: 0...15 */ | |
2793 | __le32 log_cw_max; | |
2794 | ||
2795 | /* Log exponent of min contention period: 0...15 */ | |
2796 | __le32 log_cw_min; | |
2797 | ||
2798 | /* Adaptive interframe spacing in units of 32us */ | |
2799 | __u8 aifs; | |
2800 | ||
2801 | /* TX queue to configure */ | |
2802 | __u8 txq; | |
2803 | } ap; | |
2804 | struct { | |
2805 | /* Log exponent of max contention period: 0...15 */ | |
2806 | __u8 log_cw_max; | |
a66098da | 2807 | |
2e484c89 LB |
2808 | /* Log exponent of min contention period: 0...15 */ |
2809 | __u8 log_cw_min; | |
a66098da | 2810 | |
2e484c89 LB |
2811 | /* Adaptive interframe spacing in units of 32us */ |
2812 | __u8 aifs; | |
a66098da | 2813 | |
2e484c89 LB |
2814 | /* TX queue to configure */ |
2815 | __u8 txq; | |
2816 | } sta; | |
2817 | }; | |
ba2d3587 | 2818 | } __packed; |
a66098da | 2819 | |
a66098da LB |
2820 | #define MWL8K_SET_EDCA_CW 0x01 |
2821 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
2822 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
2823 | ||
2824 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
2825 | MWL8K_SET_EDCA_TXOP | \ | |
2826 | MWL8K_SET_EDCA_AIFS) | |
2827 | ||
2828 | static int | |
55489b6e LB |
2829 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
2830 | __u16 cw_min, __u16 cw_max, | |
2831 | __u8 aifs, __u16 txop) | |
a66098da | 2832 | { |
2e484c89 | 2833 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2834 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
2835 | int rc; |
2836 | ||
2837 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2838 | if (cmd == NULL) | |
2839 | return -ENOMEM; | |
2840 | ||
a66098da LB |
2841 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
2842 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2843 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
2844 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
2845 | if (priv->ap_fw) { |
2846 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
2847 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
2848 | cmd->ap.aifs = aifs; | |
2849 | cmd->ap.txq = qnum; | |
2850 | } else { | |
2851 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
2852 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
2853 | cmd->sta.aifs = aifs; | |
2854 | cmd->sta.txq = qnum; | |
2855 | } | |
a66098da LB |
2856 | |
2857 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2858 | kfree(cmd); | |
2859 | ||
2860 | return rc; | |
2861 | } | |
2862 | ||
2863 | /* | |
55489b6e | 2864 | * CMD_SET_WMM_MODE. |
a66098da | 2865 | */ |
55489b6e | 2866 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 2867 | struct mwl8k_cmd_pkt header; |
55489b6e | 2868 | __le16 action; |
ba2d3587 | 2869 | } __packed; |
a66098da | 2870 | |
55489b6e | 2871 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 2872 | { |
55489b6e LB |
2873 | struct mwl8k_priv *priv = hw->priv; |
2874 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
2875 | int rc; |
2876 | ||
a66098da LB |
2877 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2878 | if (cmd == NULL) | |
2879 | return -ENOMEM; | |
2880 | ||
55489b6e | 2881 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 2882 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 2883 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
2884 | |
2885 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2886 | kfree(cmd); | |
16cec43d | 2887 | |
55489b6e LB |
2888 | if (!rc) |
2889 | priv->wmm_enabled = enable; | |
a66098da LB |
2890 | |
2891 | return rc; | |
2892 | } | |
2893 | ||
2894 | /* | |
55489b6e | 2895 | * CMD_MIMO_CONFIG. |
a66098da | 2896 | */ |
55489b6e LB |
2897 | struct mwl8k_cmd_mimo_config { |
2898 | struct mwl8k_cmd_pkt header; | |
2899 | __le32 action; | |
2900 | __u8 rx_antenna_map; | |
2901 | __u8 tx_antenna_map; | |
ba2d3587 | 2902 | } __packed; |
a66098da | 2903 | |
55489b6e | 2904 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 2905 | { |
55489b6e | 2906 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
2907 | int rc; |
2908 | ||
2909 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2910 | if (cmd == NULL) | |
2911 | return -ENOMEM; | |
2912 | ||
55489b6e | 2913 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 2914 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2915 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
2916 | cmd->rx_antenna_map = rx; | |
2917 | cmd->tx_antenna_map = tx; | |
a66098da LB |
2918 | |
2919 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2920 | kfree(cmd); | |
2921 | ||
2922 | return rc; | |
2923 | } | |
2924 | ||
2925 | /* | |
b71ed2c6 | 2926 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 2927 | */ |
b71ed2c6 LB |
2928 | struct mwl8k_cmd_use_fixed_rate_sta { |
2929 | struct mwl8k_cmd_pkt header; | |
2930 | __le32 action; | |
2931 | __le32 allow_rate_drop; | |
2932 | __le32 num_rates; | |
2933 | struct { | |
2934 | __le32 is_ht_rate; | |
2935 | __le32 enable_retry; | |
2936 | __le32 rate; | |
2937 | __le32 retry_count; | |
2938 | } rate_entry[8]; | |
2939 | __le32 rate_type; | |
2940 | __le32 reserved1; | |
2941 | __le32 reserved2; | |
ba2d3587 | 2942 | } __packed; |
a66098da | 2943 | |
b71ed2c6 LB |
2944 | #define MWL8K_USE_AUTO_RATE 0x0002 |
2945 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 2946 | |
b71ed2c6 | 2947 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 2948 | { |
b71ed2c6 | 2949 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
2950 | int rc; |
2951 | ||
2952 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2953 | if (cmd == NULL) | |
2954 | return -ENOMEM; | |
2955 | ||
2956 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
2957 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
2958 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
2959 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
2960 | |
2961 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2962 | kfree(cmd); | |
2963 | ||
2964 | return rc; | |
2965 | } | |
2966 | ||
088aab8b LB |
2967 | /* |
2968 | * CMD_USE_FIXED_RATE (AP version). | |
2969 | */ | |
2970 | struct mwl8k_cmd_use_fixed_rate_ap { | |
2971 | struct mwl8k_cmd_pkt header; | |
2972 | __le32 action; | |
2973 | __le32 allow_rate_drop; | |
2974 | __le32 num_rates; | |
2975 | struct mwl8k_rate_entry_ap { | |
2976 | __le32 is_ht_rate; | |
2977 | __le32 enable_retry; | |
2978 | __le32 rate; | |
2979 | __le32 retry_count; | |
2980 | } rate_entry[4]; | |
2981 | u8 multicast_rate; | |
2982 | u8 multicast_rate_type; | |
2983 | u8 management_rate; | |
ba2d3587 | 2984 | } __packed; |
088aab8b LB |
2985 | |
2986 | static int | |
2987 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
2988 | { | |
2989 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
2990 | int rc; | |
2991 | ||
2992 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2993 | if (cmd == NULL) | |
2994 | return -ENOMEM; | |
2995 | ||
2996 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
2997 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2998 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
2999 | cmd->multicast_rate = mcast; | |
3000 | cmd->management_rate = mgmt; | |
3001 | ||
3002 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3003 | kfree(cmd); | |
3004 | ||
3005 | return rc; | |
3006 | } | |
3007 | ||
55489b6e LB |
3008 | /* |
3009 | * CMD_ENABLE_SNIFFER. | |
3010 | */ | |
3011 | struct mwl8k_cmd_enable_sniffer { | |
3012 | struct mwl8k_cmd_pkt header; | |
3013 | __le32 action; | |
ba2d3587 | 3014 | } __packed; |
55489b6e LB |
3015 | |
3016 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3017 | { | |
3018 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3019 | int rc; | |
3020 | ||
3021 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3022 | if (cmd == NULL) | |
3023 | return -ENOMEM; | |
3024 | ||
3025 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3026 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3027 | cmd->action = cpu_to_le32(!!enable); | |
3028 | ||
3029 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3030 | kfree(cmd); | |
3031 | ||
3032 | return rc; | |
3033 | } | |
3034 | ||
3035 | /* | |
3036 | * CMD_SET_MAC_ADDR. | |
3037 | */ | |
3038 | struct mwl8k_cmd_set_mac_addr { | |
3039 | struct mwl8k_cmd_pkt header; | |
3040 | union { | |
3041 | struct { | |
3042 | __le16 mac_type; | |
3043 | __u8 mac_addr[ETH_ALEN]; | |
3044 | } mbss; | |
3045 | __u8 mac_addr[ETH_ALEN]; | |
3046 | }; | |
ba2d3587 | 3047 | } __packed; |
55489b6e | 3048 | |
ee0ddf18 LB |
3049 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3050 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3051 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3052 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3053 | |
aa21d0f6 LB |
3054 | static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, |
3055 | struct ieee80211_vif *vif, u8 *mac) | |
55489b6e LB |
3056 | { |
3057 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3058 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
55489b6e | 3059 | struct mwl8k_cmd_set_mac_addr *cmd; |
ee0ddf18 | 3060 | int mac_type; |
55489b6e LB |
3061 | int rc; |
3062 | ||
ee0ddf18 LB |
3063 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3064 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3065 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
3066 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
3067 | else | |
3068 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3069 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3070 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3071 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3072 | else | |
3073 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3074 | } | |
3075 | ||
55489b6e LB |
3076 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3077 | if (cmd == NULL) | |
3078 | return -ENOMEM; | |
3079 | ||
3080 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3081 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3082 | if (priv->ap_fw) { | |
ee0ddf18 | 3083 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3084 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3085 | } else { | |
3086 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3087 | } | |
3088 | ||
aa21d0f6 | 3089 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3090 | kfree(cmd); |
3091 | ||
3092 | return rc; | |
3093 | } | |
3094 | ||
3095 | /* | |
3096 | * CMD_SET_RATEADAPT_MODE. | |
3097 | */ | |
3098 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3099 | struct mwl8k_cmd_pkt header; | |
3100 | __le16 action; | |
3101 | __le16 mode; | |
ba2d3587 | 3102 | } __packed; |
55489b6e LB |
3103 | |
3104 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3105 | { | |
3106 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3107 | int rc; | |
3108 | ||
3109 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3110 | if (cmd == NULL) | |
3111 | return -ENOMEM; | |
3112 | ||
3113 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3114 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3115 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3116 | cmd->mode = cpu_to_le16(mode); | |
3117 | ||
3118 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3119 | kfree(cmd); | |
3120 | ||
3121 | return rc; | |
3122 | } | |
3123 | ||
b64fe619 LB |
3124 | /* |
3125 | * CMD_BSS_START. | |
3126 | */ | |
3127 | struct mwl8k_cmd_bss_start { | |
3128 | struct mwl8k_cmd_pkt header; | |
3129 | __le32 enable; | |
ba2d3587 | 3130 | } __packed; |
b64fe619 | 3131 | |
aa21d0f6 LB |
3132 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3133 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3134 | { |
3135 | struct mwl8k_cmd_bss_start *cmd; | |
3136 | int rc; | |
3137 | ||
3138 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3139 | if (cmd == NULL) | |
3140 | return -ENOMEM; | |
3141 | ||
3142 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3143 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3144 | cmd->enable = cpu_to_le32(enable); | |
3145 | ||
aa21d0f6 | 3146 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3147 | kfree(cmd); |
3148 | ||
3149 | return rc; | |
3150 | } | |
3151 | ||
3f5610ff LB |
3152 | /* |
3153 | * CMD_SET_NEW_STN. | |
3154 | */ | |
3155 | struct mwl8k_cmd_set_new_stn { | |
3156 | struct mwl8k_cmd_pkt header; | |
3157 | __le16 aid; | |
3158 | __u8 mac_addr[6]; | |
3159 | __le16 stn_id; | |
3160 | __le16 action; | |
3161 | __le16 rsvd; | |
3162 | __le32 legacy_rates; | |
3163 | __u8 ht_rates[4]; | |
3164 | __le16 cap_info; | |
3165 | __le16 ht_capabilities_info; | |
3166 | __u8 mac_ht_param_info; | |
3167 | __u8 rev; | |
3168 | __u8 control_channel; | |
3169 | __u8 add_channel; | |
3170 | __le16 op_mode; | |
3171 | __le16 stbc; | |
3172 | __u8 add_qos_info; | |
3173 | __u8 is_qos_sta; | |
3174 | __le32 fw_sta_ptr; | |
ba2d3587 | 3175 | } __packed; |
3f5610ff LB |
3176 | |
3177 | #define MWL8K_STA_ACTION_ADD 0 | |
3178 | #define MWL8K_STA_ACTION_REMOVE 2 | |
3179 | ||
3180 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
3181 | struct ieee80211_vif *vif, | |
3182 | struct ieee80211_sta *sta) | |
3183 | { | |
3184 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 3185 | u32 rates; |
3f5610ff LB |
3186 | int rc; |
3187 | ||
3188 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3189 | if (cmd == NULL) | |
3190 | return -ENOMEM; | |
3191 | ||
3192 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3193 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3194 | cmd->aid = cpu_to_le16(sta->aid); | |
3195 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
3196 | cmd->stn_id = cpu_to_le16(sta->aid); | |
3197 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
8707d026 LB |
3198 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3199 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3200 | else | |
3201 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3202 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
3203 | if (sta->ht_cap.ht_supported) { |
3204 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
3205 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
3206 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
3207 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
3208 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
3209 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
3210 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
3211 | cmd->is_qos_sta = 1; | |
3212 | } | |
3213 | ||
aa21d0f6 | 3214 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3215 | kfree(cmd); |
3216 | ||
3217 | return rc; | |
3218 | } | |
3219 | ||
b64fe619 LB |
3220 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
3221 | struct ieee80211_vif *vif) | |
3222 | { | |
3223 | struct mwl8k_cmd_set_new_stn *cmd; | |
3224 | int rc; | |
3225 | ||
3226 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3227 | if (cmd == NULL) | |
3228 | return -ENOMEM; | |
3229 | ||
3230 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3231 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3232 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
3233 | ||
aa21d0f6 | 3234 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3235 | kfree(cmd); |
3236 | ||
3237 | return rc; | |
3238 | } | |
3239 | ||
3f5610ff LB |
3240 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
3241 | struct ieee80211_vif *vif, u8 *addr) | |
3242 | { | |
3243 | struct mwl8k_cmd_set_new_stn *cmd; | |
3244 | int rc; | |
3245 | ||
3246 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3247 | if (cmd == NULL) | |
3248 | return -ENOMEM; | |
3249 | ||
3250 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3251 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3252 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3253 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
3254 | ||
aa21d0f6 | 3255 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3256 | kfree(cmd); |
3257 | ||
3258 | return rc; | |
3259 | } | |
3260 | ||
fcdc403c NS |
3261 | /* |
3262 | * CMD_UPDATE_ENCRYPTION. | |
3263 | */ | |
3264 | ||
3265 | #define MAX_ENCR_KEY_LENGTH 16 | |
3266 | #define MIC_KEY_LENGTH 8 | |
3267 | ||
3268 | struct mwl8k_cmd_update_encryption { | |
3269 | struct mwl8k_cmd_pkt header; | |
3270 | ||
3271 | __le32 action; | |
3272 | __le32 reserved; | |
3273 | __u8 mac_addr[6]; | |
3274 | __u8 encr_type; | |
3275 | ||
3276 | } __attribute__((packed)); | |
3277 | ||
3278 | struct mwl8k_cmd_set_key { | |
3279 | struct mwl8k_cmd_pkt header; | |
3280 | ||
3281 | __le32 action; | |
3282 | __le32 reserved; | |
3283 | __le16 length; | |
3284 | __le16 key_type_id; | |
3285 | __le32 key_info; | |
3286 | __le32 key_id; | |
3287 | __le16 key_len; | |
3288 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
3289 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
3290 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
3291 | __le16 tkip_rsc_low; | |
3292 | __le32 tkip_rsc_high; | |
3293 | __le16 tkip_tsc_low; | |
3294 | __le32 tkip_tsc_high; | |
3295 | __u8 mac_addr[6]; | |
3296 | } __attribute__((packed)); | |
3297 | ||
3298 | enum { | |
3299 | MWL8K_ENCR_ENABLE, | |
3300 | MWL8K_ENCR_SET_KEY, | |
3301 | MWL8K_ENCR_REMOVE_KEY, | |
3302 | MWL8K_ENCR_SET_GROUP_KEY, | |
3303 | }; | |
3304 | ||
3305 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
3306 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
3307 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
3308 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
3309 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
3310 | ||
3311 | enum { | |
3312 | MWL8K_ALG_WEP, | |
3313 | MWL8K_ALG_TKIP, | |
3314 | MWL8K_ALG_CCMP, | |
3315 | }; | |
3316 | ||
3317 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
3318 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
3319 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
3320 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
3321 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
3322 | ||
3323 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
3324 | struct ieee80211_vif *vif, | |
3325 | u8 *addr, | |
3326 | u8 encr_type) | |
3327 | { | |
3328 | struct mwl8k_cmd_update_encryption *cmd; | |
3329 | int rc; | |
3330 | ||
3331 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3332 | if (cmd == NULL) | |
3333 | return -ENOMEM; | |
3334 | ||
3335 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3336 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3337 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
3338 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3339 | cmd->encr_type = encr_type; | |
3340 | ||
3341 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3342 | kfree(cmd); | |
3343 | ||
3344 | return rc; | |
3345 | } | |
3346 | ||
3347 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
3348 | u8 *addr, | |
3349 | struct ieee80211_key_conf *key) | |
3350 | { | |
3351 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3352 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3353 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
3354 | offsetof(struct mwl8k_cmd_set_key, length)); | |
3355 | cmd->key_id = cpu_to_le32(key->keyidx); | |
3356 | cmd->key_len = cpu_to_le16(key->keylen); | |
3357 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3358 | ||
3359 | switch (key->cipher) { | |
3360 | case WLAN_CIPHER_SUITE_WEP40: | |
3361 | case WLAN_CIPHER_SUITE_WEP104: | |
3362 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
3363 | if (key->keyidx == 0) | |
3364 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
3365 | ||
3366 | break; | |
3367 | case WLAN_CIPHER_SUITE_TKIP: | |
3368 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
3369 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3370 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
3371 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
3372 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
3373 | | MWL8K_KEY_FLAG_TSC_VALID); | |
3374 | break; | |
3375 | case WLAN_CIPHER_SUITE_CCMP: | |
3376 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
3377 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3378 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
3379 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
3380 | break; | |
3381 | default: | |
3382 | return -ENOTSUPP; | |
3383 | } | |
3384 | ||
3385 | return 0; | |
3386 | } | |
3387 | ||
3388 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
3389 | struct ieee80211_vif *vif, | |
3390 | u8 *addr, | |
3391 | struct ieee80211_key_conf *key) | |
3392 | { | |
3393 | struct mwl8k_cmd_set_key *cmd; | |
3394 | int rc; | |
3395 | int keymlen; | |
3396 | u32 action; | |
3397 | u8 idx; | |
3398 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3399 | ||
3400 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3401 | if (cmd == NULL) | |
3402 | return -ENOMEM; | |
3403 | ||
3404 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
3405 | if (rc < 0) | |
3406 | goto done; | |
3407 | ||
3408 | idx = key->keyidx; | |
3409 | ||
3410 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3411 | action = MWL8K_ENCR_SET_KEY; | |
3412 | else | |
3413 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
3414 | ||
3415 | switch (key->cipher) { | |
3416 | case WLAN_CIPHER_SUITE_WEP40: | |
3417 | case WLAN_CIPHER_SUITE_WEP104: | |
3418 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
3419 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
3420 | sizeof(*key) + key->keylen); | |
3421 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
3422 | } | |
3423 | ||
3424 | keymlen = 0; | |
3425 | action = MWL8K_ENCR_SET_KEY; | |
3426 | break; | |
3427 | case WLAN_CIPHER_SUITE_TKIP: | |
3428 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
3429 | break; | |
3430 | case WLAN_CIPHER_SUITE_CCMP: | |
3431 | keymlen = key->keylen; | |
3432 | break; | |
3433 | default: | |
3434 | rc = -ENOTSUPP; | |
3435 | goto done; | |
3436 | } | |
3437 | ||
3438 | memcpy(cmd->key_material, key->key, keymlen); | |
3439 | cmd->action = cpu_to_le32(action); | |
3440 | ||
3441 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3442 | done: | |
3443 | kfree(cmd); | |
3444 | ||
3445 | return rc; | |
3446 | } | |
3447 | ||
3448 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
3449 | struct ieee80211_vif *vif, | |
3450 | u8 *addr, | |
3451 | struct ieee80211_key_conf *key) | |
3452 | { | |
3453 | struct mwl8k_cmd_set_key *cmd; | |
3454 | int rc; | |
3455 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3456 | ||
3457 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3458 | if (cmd == NULL) | |
3459 | return -ENOMEM; | |
3460 | ||
3461 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
3462 | if (rc < 0) | |
3463 | goto done; | |
3464 | ||
3465 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
3466 | WLAN_CIPHER_SUITE_WEP104) | |
3467 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; | |
3468 | ||
3469 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
3470 | ||
3471 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3472 | done: | |
3473 | kfree(cmd); | |
3474 | ||
3475 | return rc; | |
3476 | } | |
3477 | ||
3478 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
3479 | enum set_key_cmd cmd_param, | |
3480 | struct ieee80211_vif *vif, | |
3481 | struct ieee80211_sta *sta, | |
3482 | struct ieee80211_key_conf *key) | |
3483 | { | |
3484 | int rc = 0; | |
3485 | u8 encr_type; | |
3486 | u8 *addr; | |
3487 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3488 | ||
3489 | if (vif->type == NL80211_IFTYPE_STATION) | |
3490 | return -EOPNOTSUPP; | |
3491 | ||
3492 | if (sta == NULL) | |
3493 | addr = hw->wiphy->perm_addr; | |
3494 | else | |
3495 | addr = sta->addr; | |
3496 | ||
3497 | if (cmd_param == SET_KEY) { | |
3498 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
3499 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); | |
3500 | if (rc) | |
3501 | goto out; | |
3502 | ||
3503 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
3504 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
3505 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
3506 | else | |
3507 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
3508 | ||
3509 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
3510 | encr_type); | |
3511 | if (rc) | |
3512 | goto out; | |
3513 | ||
3514 | mwl8k_vif->is_hw_crypto_enabled = true; | |
3515 | ||
3516 | } else { | |
3517 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
3518 | ||
3519 | if (rc) | |
3520 | goto out; | |
3521 | ||
3522 | mwl8k_vif->is_hw_crypto_enabled = false; | |
3523 | ||
3524 | } | |
3525 | out: | |
3526 | return rc; | |
3527 | } | |
3528 | ||
55489b6e LB |
3529 | /* |
3530 | * CMD_UPDATE_STADB. | |
3531 | */ | |
25d81b1e LB |
3532 | struct ewc_ht_info { |
3533 | __le16 control1; | |
3534 | __le16 control2; | |
3535 | __le16 control3; | |
ba2d3587 | 3536 | } __packed; |
25d81b1e LB |
3537 | |
3538 | struct peer_capability_info { | |
3539 | /* Peer type - AP vs. STA. */ | |
3540 | __u8 peer_type; | |
3541 | ||
3542 | /* Basic 802.11 capabilities from assoc resp. */ | |
3543 | __le16 basic_caps; | |
3544 | ||
3545 | /* Set if peer supports 802.11n high throughput (HT). */ | |
3546 | __u8 ht_support; | |
3547 | ||
3548 | /* Valid if HT is supported. */ | |
3549 | __le16 ht_caps; | |
3550 | __u8 extended_ht_caps; | |
3551 | struct ewc_ht_info ewc_info; | |
3552 | ||
3553 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
3554 | __u8 legacy_rates[12]; | |
3555 | ||
3556 | /* HT rate table. Intersection of our rates and peer rates. */ | |
3557 | __u8 ht_rates[16]; | |
3558 | __u8 pad[16]; | |
3559 | ||
3560 | /* If set, interoperability mode, no proprietary extensions. */ | |
3561 | __u8 interop; | |
3562 | __u8 pad2; | |
3563 | __u8 station_id; | |
3564 | __le16 amsdu_enabled; | |
ba2d3587 | 3565 | } __packed; |
25d81b1e | 3566 | |
55489b6e LB |
3567 | struct mwl8k_cmd_update_stadb { |
3568 | struct mwl8k_cmd_pkt header; | |
3569 | ||
3570 | /* See STADB_ACTION_TYPE */ | |
3571 | __le32 action; | |
3572 | ||
3573 | /* Peer MAC address */ | |
3574 | __u8 peer_addr[ETH_ALEN]; | |
3575 | ||
3576 | __le32 reserved; | |
3577 | ||
3578 | /* Peer info - valid during add/update. */ | |
3579 | struct peer_capability_info peer_info; | |
ba2d3587 | 3580 | } __packed; |
55489b6e | 3581 | |
a680400e LB |
3582 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
3583 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
3584 | ||
3585 | /* Peer Entry flags - used to define the type of the peer node */ | |
3586 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
3587 | ||
3588 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 3589 | struct ieee80211_vif *vif, |
13935e2c | 3590 | struct ieee80211_sta *sta) |
55489b6e | 3591 | { |
55489b6e | 3592 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 3593 | struct peer_capability_info *p; |
8707d026 | 3594 | u32 rates; |
55489b6e LB |
3595 | int rc; |
3596 | ||
3597 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3598 | if (cmd == NULL) | |
3599 | return -ENOMEM; | |
3600 | ||
3601 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
3602 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 3603 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 3604 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 3605 | |
a680400e LB |
3606 | p = &cmd->peer_info; |
3607 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
3608 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 3609 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 3610 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
3611 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
3612 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
8707d026 LB |
3613 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3614 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3615 | else | |
3616 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3617 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 3618 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
3619 | p->interop = 1; |
3620 | p->amsdu_enabled = 0; | |
3621 | ||
3622 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3623 | kfree(cmd); | |
3624 | ||
3625 | return rc ? rc : p->station_id; | |
3626 | } | |
3627 | ||
3628 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
3629 | struct ieee80211_vif *vif, u8 *addr) | |
3630 | { | |
3631 | struct mwl8k_cmd_update_stadb *cmd; | |
3632 | int rc; | |
3633 | ||
3634 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3635 | if (cmd == NULL) | |
3636 | return -ENOMEM; | |
3637 | ||
3638 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
3639 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3640 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 3641 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 3642 | |
a680400e | 3643 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
3644 | kfree(cmd); |
3645 | ||
3646 | return rc; | |
3647 | } | |
3648 | ||
a66098da LB |
3649 | |
3650 | /* | |
3651 | * Interrupt handling. | |
3652 | */ | |
3653 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
3654 | { | |
3655 | struct ieee80211_hw *hw = dev_id; | |
3656 | struct mwl8k_priv *priv = hw->priv; | |
3657 | u32 status; | |
3658 | ||
3659 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
3660 | if (!status) |
3661 | return IRQ_NONE; | |
3662 | ||
1e9f9de3 LB |
3663 | if (status & MWL8K_A2H_INT_TX_DONE) { |
3664 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
3665 | tasklet_schedule(&priv->poll_tx_task); | |
3666 | } | |
3667 | ||
a66098da | 3668 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
3669 | status &= ~MWL8K_A2H_INT_RX_READY; |
3670 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
3671 | } |
3672 | ||
67e2eb27 LB |
3673 | if (status) |
3674 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3675 | ||
a66098da | 3676 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 3677 | if (priv->hostcmd_wait != NULL) |
a66098da | 3678 | complete(priv->hostcmd_wait); |
a66098da LB |
3679 | } |
3680 | ||
3681 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 3682 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 3683 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 3684 | mwl8k_tx_start(priv); |
a66098da LB |
3685 | } |
3686 | ||
3687 | return IRQ_HANDLED; | |
3688 | } | |
3689 | ||
1e9f9de3 LB |
3690 | static void mwl8k_tx_poll(unsigned long data) |
3691 | { | |
3692 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
3693 | struct mwl8k_priv *priv = hw->priv; | |
3694 | int limit; | |
3695 | int i; | |
3696 | ||
3697 | limit = 32; | |
3698 | ||
3699 | spin_lock_bh(&priv->tx_lock); | |
3700 | ||
3701 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
3702 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); | |
3703 | ||
3704 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
3705 | complete(priv->tx_wait); | |
3706 | priv->tx_wait = NULL; | |
3707 | } | |
3708 | ||
3709 | spin_unlock_bh(&priv->tx_lock); | |
3710 | ||
3711 | if (limit) { | |
3712 | writel(~MWL8K_A2H_INT_TX_DONE, | |
3713 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3714 | } else { | |
3715 | tasklet_schedule(&priv->poll_tx_task); | |
3716 | } | |
3717 | } | |
3718 | ||
67e2eb27 LB |
3719 | static void mwl8k_rx_poll(unsigned long data) |
3720 | { | |
3721 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
3722 | struct mwl8k_priv *priv = hw->priv; | |
3723 | int limit; | |
3724 | ||
3725 | limit = 32; | |
3726 | limit -= rxq_process(hw, 0, limit); | |
3727 | limit -= rxq_refill(hw, 0, limit); | |
3728 | ||
3729 | if (limit) { | |
3730 | writel(~MWL8K_A2H_INT_RX_READY, | |
3731 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
3732 | } else { | |
3733 | tasklet_schedule(&priv->poll_rx_task); | |
3734 | } | |
3735 | } | |
3736 | ||
a66098da LB |
3737 | |
3738 | /* | |
3739 | * Core driver operations. | |
3740 | */ | |
7bb45683 | 3741 | static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
a66098da LB |
3742 | { |
3743 | struct mwl8k_priv *priv = hw->priv; | |
3744 | int index = skb_get_queue_mapping(skb); | |
a66098da | 3745 | |
9189c100 | 3746 | if (!priv->radio_on) { |
c96c31e4 JP |
3747 | wiphy_debug(hw->wiphy, |
3748 | "dropped TX frame since radio disabled\n"); | |
a66098da | 3749 | dev_kfree_skb(skb); |
7bb45683 | 3750 | return; |
a66098da LB |
3751 | } |
3752 | ||
7bb45683 | 3753 | mwl8k_txq_xmit(hw, index, skb); |
a66098da LB |
3754 | } |
3755 | ||
a66098da LB |
3756 | static int mwl8k_start(struct ieee80211_hw *hw) |
3757 | { | |
a66098da LB |
3758 | struct mwl8k_priv *priv = hw->priv; |
3759 | int rc; | |
3760 | ||
a0607fd3 | 3761 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
3762 | IRQF_SHARED, MWL8K_NAME, hw); |
3763 | if (rc) { | |
5db55844 | 3764 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 3765 | return -EIO; |
a66098da LB |
3766 | } |
3767 | ||
67e2eb27 | 3768 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 3769 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 3770 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 3771 | |
a66098da | 3772 | /* Enable interrupts */ |
c23b5a69 | 3773 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da | 3774 | |
2ec610cb LB |
3775 | rc = mwl8k_fw_lock(hw); |
3776 | if (!rc) { | |
55489b6e | 3777 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 3778 | |
5e4cf166 LB |
3779 | if (!priv->ap_fw) { |
3780 | if (!rc) | |
55489b6e | 3781 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 3782 | |
5e4cf166 LB |
3783 | if (!rc) |
3784 | rc = mwl8k_cmd_set_pre_scan(hw); | |
3785 | ||
3786 | if (!rc) | |
3787 | rc = mwl8k_cmd_set_post_scan(hw, | |
3788 | "\x00\x00\x00\x00\x00\x00"); | |
3789 | } | |
2ec610cb LB |
3790 | |
3791 | if (!rc) | |
55489b6e | 3792 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 3793 | |
2ec610cb | 3794 | if (!rc) |
55489b6e | 3795 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 3796 | |
2ec610cb LB |
3797 | mwl8k_fw_unlock(hw); |
3798 | } | |
3799 | ||
3800 | if (rc) { | |
3801 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
3802 | free_irq(priv->pdev->irq, hw); | |
1e9f9de3 | 3803 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 3804 | tasklet_disable(&priv->poll_rx_task); |
2ec610cb | 3805 | } |
a66098da LB |
3806 | |
3807 | return rc; | |
3808 | } | |
3809 | ||
a66098da LB |
3810 | static void mwl8k_stop(struct ieee80211_hw *hw) |
3811 | { | |
a66098da LB |
3812 | struct mwl8k_priv *priv = hw->priv; |
3813 | int i; | |
3814 | ||
55489b6e | 3815 | mwl8k_cmd_radio_disable(hw); |
a66098da LB |
3816 | |
3817 | ieee80211_stop_queues(hw); | |
3818 | ||
a66098da | 3819 | /* Disable interrupts */ |
a66098da | 3820 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
3821 | free_irq(priv->pdev->irq, hw); |
3822 | ||
3823 | /* Stop finalize join worker */ | |
3824 | cancel_work_sync(&priv->finalize_join_worker); | |
3825 | if (priv->beacon_skb != NULL) | |
3826 | dev_kfree_skb(priv->beacon_skb); | |
3827 | ||
67e2eb27 | 3828 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 3829 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 3830 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 3831 | |
a66098da LB |
3832 | /* Return all skbs to mac80211 */ |
3833 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
efb7c49a | 3834 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
3835 | } |
3836 | ||
0863ade8 BC |
3837 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
3838 | ||
a66098da | 3839 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 3840 | struct ieee80211_vif *vif) |
a66098da LB |
3841 | { |
3842 | struct mwl8k_priv *priv = hw->priv; | |
3843 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 3844 | u32 macids_supported; |
0863ade8 BC |
3845 | int macid, rc; |
3846 | struct mwl8k_device_info *di; | |
a66098da | 3847 | |
a43c49a8 LB |
3848 | /* |
3849 | * Reject interface creation if sniffer mode is active, as | |
3850 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 3851 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
3852 | */ |
3853 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
3854 | wiphy_info(hw->wiphy, |
3855 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
3856 | return -EINVAL; |
3857 | } | |
3858 | ||
0863ade8 | 3859 | di = priv->device_info; |
ee0ddf18 LB |
3860 | switch (vif->type) { |
3861 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
3862 | if (!priv->ap_fw && di->fw_image_ap) { |
3863 | /* we must load the ap fw to meet this request */ | |
3864 | if (!list_empty(&priv->vif_list)) | |
3865 | return -EBUSY; | |
3866 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
3867 | if (rc) | |
3868 | return rc; | |
3869 | } | |
ee0ddf18 LB |
3870 | macids_supported = priv->ap_macids_supported; |
3871 | break; | |
3872 | case NL80211_IFTYPE_STATION: | |
0863ade8 BC |
3873 | if (priv->ap_fw && di->fw_image_sta) { |
3874 | /* we must load the sta fw to meet this request */ | |
3875 | if (!list_empty(&priv->vif_list)) | |
3876 | return -EBUSY; | |
3877 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
3878 | if (rc) | |
3879 | return rc; | |
3880 | } | |
ee0ddf18 LB |
3881 | macids_supported = priv->sta_macids_supported; |
3882 | break; | |
3883 | default: | |
3884 | return -EINVAL; | |
3885 | } | |
3886 | ||
3887 | macid = ffs(macids_supported & ~priv->macids_used); | |
3888 | if (!macid--) | |
3889 | return -EBUSY; | |
3890 | ||
f5bb87cf | 3891 | /* Setup driver private area. */ |
1ed32e4f | 3892 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 3893 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 3894 | mwl8k_vif->vif = vif; |
ee0ddf18 | 3895 | mwl8k_vif->macid = macid; |
a66098da | 3896 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
3897 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
3898 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 3899 | |
aa21d0f6 LB |
3900 | /* Set the mac address. */ |
3901 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
3902 | ||
3903 | if (priv->ap_fw) | |
3904 | mwl8k_cmd_set_new_stn_add_self(hw, vif); | |
3905 | ||
ee0ddf18 | 3906 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 3907 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
3908 | |
3909 | return 0; | |
3910 | } | |
3911 | ||
3912 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 3913 | struct ieee80211_vif *vif) |
a66098da LB |
3914 | { |
3915 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 3916 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 3917 | |
b64fe619 LB |
3918 | if (priv->ap_fw) |
3919 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); | |
3920 | ||
aa21d0f6 | 3921 | mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 3922 | |
ee0ddf18 | 3923 | priv->macids_used &= ~(1 << mwl8k_vif->macid); |
f5bb87cf | 3924 | list_del(&mwl8k_vif->list); |
a66098da LB |
3925 | } |
3926 | ||
ee03a932 | 3927 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 3928 | { |
a66098da LB |
3929 | struct ieee80211_conf *conf = &hw->conf; |
3930 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 3931 | int rc; |
a66098da | 3932 | |
7595d67a | 3933 | if (conf->flags & IEEE80211_CONF_IDLE) { |
55489b6e | 3934 | mwl8k_cmd_radio_disable(hw); |
ee03a932 | 3935 | return 0; |
7595d67a LB |
3936 | } |
3937 | ||
ee03a932 LB |
3938 | rc = mwl8k_fw_lock(hw); |
3939 | if (rc) | |
3940 | return rc; | |
a66098da | 3941 | |
55489b6e | 3942 | rc = mwl8k_cmd_radio_enable(hw); |
ee03a932 LB |
3943 | if (rc) |
3944 | goto out; | |
a66098da | 3945 | |
610677d2 | 3946 | rc = mwl8k_cmd_set_rf_channel(hw, conf); |
ee03a932 LB |
3947 | if (rc) |
3948 | goto out; | |
3949 | ||
a66098da LB |
3950 | if (conf->power_level > 18) |
3951 | conf->power_level = 18; | |
a66098da | 3952 | |
08b06347 | 3953 | if (priv->ap_fw) { |
41fdf097 NS |
3954 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); |
3955 | if (rc) | |
3956 | goto out; | |
3957 | ||
da62b761 NS |
3958 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); |
3959 | if (rc) | |
3960 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
3961 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
3962 | if (rc) | |
3963 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
3964 | ||
08b06347 | 3965 | } else { |
41fdf097 NS |
3966 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
3967 | if (rc) | |
3968 | goto out; | |
08b06347 LB |
3969 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
3970 | } | |
a66098da | 3971 | |
ee03a932 LB |
3972 | out: |
3973 | mwl8k_fw_unlock(hw); | |
a66098da | 3974 | |
ee03a932 | 3975 | return rc; |
a66098da LB |
3976 | } |
3977 | ||
b64fe619 LB |
3978 | static void |
3979 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
3980 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 3981 | { |
a66098da | 3982 | struct mwl8k_priv *priv = hw->priv; |
c3cbbe8a | 3983 | u32 ap_legacy_rates; |
13935e2c | 3984 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
3985 | int rc; |
3986 | ||
c3cbbe8a | 3987 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 3988 | return; |
a66098da | 3989 | |
c3cbbe8a LB |
3990 | /* |
3991 | * No need to capture a beacon if we're no longer associated. | |
3992 | */ | |
3993 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
3994 | priv->capture_beacon = false; | |
3a980d0a | 3995 | |
c3cbbe8a | 3996 | /* |
13935e2c | 3997 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 3998 | */ |
7dc6a7a7 | 3999 | if (vif->bss_conf.assoc) { |
c6e96010 | 4000 | struct ieee80211_sta *ap; |
c97470dd | 4001 | |
c6e96010 | 4002 | rcu_read_lock(); |
c6e96010 | 4003 | |
c3cbbe8a LB |
4004 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
4005 | if (ap == NULL) { | |
4006 | rcu_read_unlock(); | |
c6e96010 | 4007 | goto out; |
c3cbbe8a LB |
4008 | } |
4009 | ||
8707d026 LB |
4010 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) { |
4011 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; | |
4012 | } else { | |
4013 | ap_legacy_rates = | |
4014 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4015 | } | |
13935e2c | 4016 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
4017 | |
4018 | rcu_read_unlock(); | |
4019 | } | |
c6e96010 | 4020 | |
c3cbbe8a | 4021 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) { |
13935e2c | 4022 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
4023 | if (rc) |
4024 | goto out; | |
a66098da | 4025 | |
b71ed2c6 | 4026 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
4027 | if (rc) |
4028 | goto out; | |
c3cbbe8a | 4029 | } |
a66098da | 4030 | |
c3cbbe8a | 4031 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
4032 | rc = mwl8k_set_radio_preamble(hw, |
4033 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
4034 | if (rc) |
4035 | goto out; | |
c3cbbe8a | 4036 | } |
a66098da | 4037 | |
c3cbbe8a | 4038 | if (changed & BSS_CHANGED_ERP_SLOT) { |
7dc6a7a7 | 4039 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
4040 | if (rc) |
4041 | goto out; | |
c3cbbe8a | 4042 | } |
a66098da | 4043 | |
c97470dd LB |
4044 | if (vif->bss_conf.assoc && |
4045 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | | |
4046 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 4047 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
4048 | if (rc) |
4049 | goto out; | |
c3cbbe8a | 4050 | } |
a66098da | 4051 | |
c3cbbe8a LB |
4052 | if (vif->bss_conf.assoc && |
4053 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
4054 | /* |
4055 | * Finalize the join. Tell rx handler to process | |
4056 | * next beacon from our BSSID. | |
4057 | */ | |
0a11dfc3 | 4058 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 4059 | priv->capture_beacon = true; |
a66098da LB |
4060 | } |
4061 | ||
3a980d0a LB |
4062 | out: |
4063 | mwl8k_fw_unlock(hw); | |
a66098da LB |
4064 | } |
4065 | ||
b64fe619 LB |
4066 | static void |
4067 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4068 | struct ieee80211_bss_conf *info, u32 changed) | |
4069 | { | |
4070 | int rc; | |
4071 | ||
4072 | if (mwl8k_fw_lock(hw)) | |
4073 | return; | |
4074 | ||
4075 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
4076 | rc = mwl8k_set_radio_preamble(hw, | |
4077 | vif->bss_conf.use_short_preamble); | |
4078 | if (rc) | |
4079 | goto out; | |
4080 | } | |
4081 | ||
4082 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
4083 | int idx; | |
4084 | int rate; | |
4085 | ||
4086 | /* | |
4087 | * Use lowest supported basic rate for multicasts | |
4088 | * and management frames (such as probe responses -- | |
4089 | * beacons will always go out at 1 Mb/s). | |
4090 | */ | |
4091 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
4092 | if (idx) |
4093 | idx--; | |
4094 | ||
4095 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) | |
4096 | rate = mwl8k_rates_24[idx].hw_value; | |
4097 | else | |
4098 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
4099 | |
4100 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4101 | } | |
4102 | ||
4103 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
4104 | struct sk_buff *skb; | |
4105 | ||
4106 | skb = ieee80211_beacon_get(hw, vif); | |
4107 | if (skb != NULL) { | |
aa21d0f6 | 4108 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
4109 | kfree_skb(skb); |
4110 | } | |
4111 | } | |
4112 | ||
4113 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 4114 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
4115 | |
4116 | out: | |
4117 | mwl8k_fw_unlock(hw); | |
4118 | } | |
4119 | ||
4120 | static void | |
4121 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4122 | struct ieee80211_bss_conf *info, u32 changed) | |
4123 | { | |
4124 | struct mwl8k_priv *priv = hw->priv; | |
4125 | ||
4126 | if (!priv->ap_fw) | |
4127 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); | |
4128 | else | |
4129 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); | |
4130 | } | |
4131 | ||
e81cd2d6 | 4132 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 4133 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
4134 | { |
4135 | struct mwl8k_cmd_pkt *cmd; | |
4136 | ||
447ced07 LB |
4137 | /* |
4138 | * Synthesize and return a command packet that programs the | |
4139 | * hardware multicast address filter. At this point we don't | |
4140 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
4141 | * we'll end up throwing this packet away and creating a new | |
4142 | * one in mwl8k_configure_filter(). | |
4143 | */ | |
22bedad3 | 4144 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
4145 | |
4146 | return (unsigned long)cmd; | |
4147 | } | |
4148 | ||
a43c49a8 LB |
4149 | static int |
4150 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
4151 | unsigned int changed_flags, | |
4152 | unsigned int *total_flags) | |
4153 | { | |
4154 | struct mwl8k_priv *priv = hw->priv; | |
4155 | ||
4156 | /* | |
4157 | * Hardware sniffer mode is mutually exclusive with STA | |
4158 | * operation, so refuse to enable sniffer mode if a STA | |
4159 | * interface is active. | |
4160 | */ | |
f5bb87cf | 4161 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 4162 | if (net_ratelimit()) |
c96c31e4 JP |
4163 | wiphy_info(hw->wiphy, |
4164 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
4165 | return 0; |
4166 | } | |
4167 | ||
4168 | if (!priv->sniffer_enabled) { | |
55489b6e | 4169 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
4170 | return 0; |
4171 | priv->sniffer_enabled = true; | |
4172 | } | |
4173 | ||
4174 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
4175 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
4176 | FIF_OTHER_BSS; | |
4177 | ||
4178 | return 1; | |
4179 | } | |
4180 | ||
f5bb87cf LB |
4181 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
4182 | { | |
4183 | if (!list_empty(&priv->vif_list)) | |
4184 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
4185 | ||
4186 | return NULL; | |
4187 | } | |
4188 | ||
e6935ea1 LB |
4189 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
4190 | unsigned int changed_flags, | |
4191 | unsigned int *total_flags, | |
4192 | u64 multicast) | |
4193 | { | |
4194 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
4195 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
4196 | ||
c0adae2c LB |
4197 | /* |
4198 | * AP firmware doesn't allow fine-grained control over | |
4199 | * the receive filter. | |
4200 | */ | |
4201 | if (priv->ap_fw) { | |
4202 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
4203 | kfree(cmd); | |
4204 | return; | |
4205 | } | |
4206 | ||
a43c49a8 LB |
4207 | /* |
4208 | * Enable hardware sniffer mode if FIF_CONTROL or | |
4209 | * FIF_OTHER_BSS is requested. | |
4210 | */ | |
4211 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
4212 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
4213 | kfree(cmd); | |
4214 | return; | |
4215 | } | |
a66098da | 4216 | |
e6935ea1 | 4217 | /* Clear unsupported feature flags */ |
447ced07 | 4218 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 4219 | |
90852f7a LB |
4220 | if (mwl8k_fw_lock(hw)) { |
4221 | kfree(cmd); | |
e6935ea1 | 4222 | return; |
90852f7a | 4223 | } |
a66098da | 4224 | |
a43c49a8 | 4225 | if (priv->sniffer_enabled) { |
55489b6e | 4226 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
4227 | priv->sniffer_enabled = false; |
4228 | } | |
4229 | ||
e6935ea1 | 4230 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
4231 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
4232 | /* | |
4233 | * Disable the BSS filter. | |
4234 | */ | |
e6935ea1 | 4235 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 4236 | } else { |
f5bb87cf | 4237 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 4238 | const u8 *bssid; |
a94cc97e | 4239 | |
77165d88 LB |
4240 | /* |
4241 | * Enable the BSS filter. | |
4242 | * | |
4243 | * If there is an active STA interface, use that | |
4244 | * interface's BSSID, otherwise use a dummy one | |
4245 | * (where the OUI part needs to be nonzero for | |
4246 | * the BSSID to be accepted by POST_SCAN). | |
4247 | */ | |
f5bb87cf LB |
4248 | mwl8k_vif = mwl8k_first_vif(priv); |
4249 | if (mwl8k_vif != NULL) | |
4250 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
4251 | else | |
4252 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 4253 | |
e6935ea1 | 4254 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
4255 | } |
4256 | } | |
4257 | ||
447ced07 LB |
4258 | /* |
4259 | * If FIF_ALLMULTI is being requested, throw away the command | |
4260 | * packet that ->prepare_multicast() built and replace it with | |
4261 | * a command packet that enables reception of all multicast | |
4262 | * packets. | |
4263 | */ | |
4264 | if (*total_flags & FIF_ALLMULTI) { | |
4265 | kfree(cmd); | |
22bedad3 | 4266 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
4267 | } |
4268 | ||
4269 | if (cmd != NULL) { | |
4270 | mwl8k_post_cmd(hw, cmd); | |
4271 | kfree(cmd); | |
e6935ea1 | 4272 | } |
a66098da | 4273 | |
e6935ea1 | 4274 | mwl8k_fw_unlock(hw); |
a66098da LB |
4275 | } |
4276 | ||
a66098da LB |
4277 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
4278 | { | |
c2c2b12a | 4279 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
4280 | } |
4281 | ||
4a6967b8 JB |
4282 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
4283 | struct ieee80211_vif *vif, | |
4284 | struct ieee80211_sta *sta) | |
3f5610ff LB |
4285 | { |
4286 | struct mwl8k_priv *priv = hw->priv; | |
4287 | ||
4a6967b8 JB |
4288 | if (priv->ap_fw) |
4289 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
4290 | else | |
4291 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
4292 | } |
4293 | ||
4a6967b8 JB |
4294 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
4295 | struct ieee80211_vif *vif, | |
4296 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
4297 | { |
4298 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 4299 | int ret; |
fcdc403c NS |
4300 | int i; |
4301 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4302 | struct ieee80211_key_conf *key; | |
bbfd9128 | 4303 | |
4a6967b8 JB |
4304 | if (!priv->ap_fw) { |
4305 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
4306 | if (ret >= 0) { | |
4307 | MWL8K_STA(sta)->peer_id = ret; | |
fcdc403c | 4308 | ret = 0; |
4a6967b8 | 4309 | } |
bbfd9128 | 4310 | |
d9a07d49 NS |
4311 | } else { |
4312 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 4313 | } |
4a6967b8 | 4314 | |
d9a07d49 NS |
4315 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
4316 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
4317 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
4318 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
4319 | } | |
fcdc403c | 4320 | return ret; |
bbfd9128 LB |
4321 | } |
4322 | ||
a66098da LB |
4323 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue, |
4324 | const struct ieee80211_tx_queue_params *params) | |
4325 | { | |
3e4f542c | 4326 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 4327 | int rc; |
a66098da | 4328 | |
3e4f542c LB |
4329 | rc = mwl8k_fw_lock(hw); |
4330 | if (!rc) { | |
0863ade8 BC |
4331 | BUG_ON(queue > MWL8K_TX_QUEUES - 1); |
4332 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); | |
4333 | ||
3e4f542c | 4334 | if (!priv->wmm_enabled) |
55489b6e | 4335 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 4336 | |
85c9205c NS |
4337 | if (!rc) { |
4338 | int q = MWL8K_TX_QUEUES - 1 - queue; | |
4339 | rc = mwl8k_cmd_set_edca_params(hw, q, | |
55489b6e LB |
4340 | params->cw_min, |
4341 | params->cw_max, | |
4342 | params->aifs, | |
4343 | params->txop); | |
85c9205c | 4344 | } |
3e4f542c LB |
4345 | |
4346 | mwl8k_fw_unlock(hw); | |
a66098da | 4347 | } |
3e4f542c | 4348 | |
a66098da LB |
4349 | return rc; |
4350 | } | |
4351 | ||
a66098da LB |
4352 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
4353 | struct ieee80211_low_level_stats *stats) | |
4354 | { | |
55489b6e | 4355 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
4356 | } |
4357 | ||
0d462bbb JL |
4358 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
4359 | struct survey_info *survey) | |
4360 | { | |
4361 | struct mwl8k_priv *priv = hw->priv; | |
4362 | struct ieee80211_conf *conf = &hw->conf; | |
4363 | ||
4364 | if (idx != 0) | |
4365 | return -ENOENT; | |
4366 | ||
4367 | survey->channel = conf->channel; | |
4368 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
4369 | survey->noise = priv->noise; | |
4370 | ||
4371 | return 0; | |
4372 | } | |
4373 | ||
a2292d83 LB |
4374 | static int |
4375 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4376 | enum ieee80211_ampdu_mlme_action action, | |
0b01f030 JB |
4377 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
4378 | u8 buf_size) | |
a2292d83 LB |
4379 | { |
4380 | switch (action) { | |
4381 | case IEEE80211_AMPDU_RX_START: | |
4382 | case IEEE80211_AMPDU_RX_STOP: | |
4383 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
4384 | return -ENOTSUPP; | |
4385 | return 0; | |
4386 | default: | |
4387 | return -ENOTSUPP; | |
4388 | } | |
4389 | } | |
4390 | ||
a66098da LB |
4391 | static const struct ieee80211_ops mwl8k_ops = { |
4392 | .tx = mwl8k_tx, | |
4393 | .start = mwl8k_start, | |
4394 | .stop = mwl8k_stop, | |
4395 | .add_interface = mwl8k_add_interface, | |
4396 | .remove_interface = mwl8k_remove_interface, | |
4397 | .config = mwl8k_config, | |
a66098da | 4398 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 4399 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 4400 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 4401 | .set_key = mwl8k_set_key, |
a66098da | 4402 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
4403 | .sta_add = mwl8k_sta_add, |
4404 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 4405 | .conf_tx = mwl8k_conf_tx, |
a66098da | 4406 | .get_stats = mwl8k_get_stats, |
0d462bbb | 4407 | .get_survey = mwl8k_get_survey, |
a2292d83 | 4408 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
4409 | }; |
4410 | ||
a66098da LB |
4411 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
4412 | { | |
4413 | struct mwl8k_priv *priv = | |
4414 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
4415 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
4416 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
4417 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
4418 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
4419 | mgmt->u.beacon.variable, len); | |
4420 | int dtim_period = 1; | |
4421 | ||
4422 | if (tim && tim[1] >= 2) | |
4423 | dtim_period = tim[3]; | |
a66098da | 4424 | |
56007a02 | 4425 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 4426 | |
f5bb87cf | 4427 | dev_kfree_skb(skb); |
a66098da LB |
4428 | priv->beacon_skb = NULL; |
4429 | } | |
4430 | ||
bcb628d5 | 4431 | enum { |
9e1b17ea LB |
4432 | MWL8363 = 0, |
4433 | MWL8687, | |
bcb628d5 | 4434 | MWL8366, |
6f6d1e9a LB |
4435 | }; |
4436 | ||
952a0e96 BC |
4437 | #define MWL8K_8366_AP_FW_API 1 |
4438 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" | |
4439 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
4440 | ||
bcb628d5 | 4441 | static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = { |
9e1b17ea LB |
4442 | [MWL8363] = { |
4443 | .part_name = "88w8363", | |
4444 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 4445 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 4446 | }, |
49eb691c | 4447 | [MWL8687] = { |
bcb628d5 JL |
4448 | .part_name = "88w8687", |
4449 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 4450 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 4451 | }, |
49eb691c | 4452 | [MWL8366] = { |
bcb628d5 JL |
4453 | .part_name = "88w8366", |
4454 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 4455 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
4456 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
4457 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
89a91f4f | 4458 | .ap_rxd_ops = &rxd_8366_ap_ops, |
bcb628d5 | 4459 | }, |
45a390dd LB |
4460 | }; |
4461 | ||
c92d4ede LB |
4462 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
4463 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
4464 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
4465 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
4466 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
4467 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 4468 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 4469 | |
45a390dd | 4470 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
e5868ba1 | 4471 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
4472 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
4473 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
4474 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
4475 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
4476 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
ca66527c | 4477 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
bcb628d5 | 4478 | { }, |
45a390dd LB |
4479 | }; |
4480 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
4481 | ||
99020471 BC |
4482 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
4483 | { | |
4484 | int rc; | |
4485 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
4486 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
4487 | priv->fw_pref, priv->fw_alt); | |
4488 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
4489 | if (rc) { | |
4490 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
4491 | pci_name(priv->pdev), priv->fw_alt); | |
4492 | return rc; | |
4493 | } | |
4494 | return 0; | |
4495 | } | |
4496 | ||
4497 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
4498 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
4499 | { | |
4500 | struct mwl8k_priv *priv = context; | |
4501 | struct mwl8k_device_info *di = priv->device_info; | |
4502 | int rc; | |
4503 | ||
4504 | switch (priv->fw_state) { | |
4505 | case FW_STATE_INIT: | |
4506 | if (!fw) { | |
4507 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
4508 | pci_name(priv->pdev), di->helper_image); | |
4509 | goto fail; | |
4510 | } | |
4511 | priv->fw_helper = fw; | |
4512 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
4513 | true); | |
4514 | if (rc && priv->fw_alt) { | |
4515 | rc = mwl8k_request_alt_fw(priv); | |
4516 | if (rc) | |
4517 | goto fail; | |
4518 | priv->fw_state = FW_STATE_LOADING_ALT; | |
4519 | } else if (rc) | |
4520 | goto fail; | |
4521 | else | |
4522 | priv->fw_state = FW_STATE_LOADING_PREF; | |
4523 | break; | |
4524 | ||
4525 | case FW_STATE_LOADING_PREF: | |
4526 | if (!fw) { | |
4527 | if (priv->fw_alt) { | |
4528 | rc = mwl8k_request_alt_fw(priv); | |
4529 | if (rc) | |
4530 | goto fail; | |
4531 | priv->fw_state = FW_STATE_LOADING_ALT; | |
4532 | } else | |
4533 | goto fail; | |
4534 | } else { | |
4535 | priv->fw_ucode = fw; | |
4536 | rc = mwl8k_firmware_load_success(priv); | |
4537 | if (rc) | |
4538 | goto fail; | |
4539 | else | |
4540 | complete(&priv->firmware_loading_complete); | |
4541 | } | |
4542 | break; | |
4543 | ||
4544 | case FW_STATE_LOADING_ALT: | |
4545 | if (!fw) { | |
4546 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
4547 | pci_name(priv->pdev), di->helper_image); | |
4548 | goto fail; | |
4549 | } | |
4550 | priv->fw_ucode = fw; | |
4551 | rc = mwl8k_firmware_load_success(priv); | |
4552 | if (rc) | |
4553 | goto fail; | |
4554 | else | |
4555 | complete(&priv->firmware_loading_complete); | |
4556 | break; | |
4557 | ||
4558 | default: | |
4559 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
4560 | MWL8K_NAME, priv->fw_state); | |
4561 | BUG_ON(1); | |
4562 | } | |
4563 | ||
4564 | return; | |
4565 | ||
4566 | fail: | |
4567 | priv->fw_state = FW_STATE_ERROR; | |
4568 | complete(&priv->firmware_loading_complete); | |
4569 | device_release_driver(&priv->pdev->dev); | |
4570 | mwl8k_release_firmware(priv); | |
4571 | } | |
4572 | ||
4573 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, | |
4574 | bool nowait) | |
a66098da | 4575 | { |
3cc7772c | 4576 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 4577 | int rc; |
be695fc4 LB |
4578 | |
4579 | /* Reset firmware and hardware */ | |
4580 | mwl8k_hw_reset(priv); | |
4581 | ||
4582 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 4583 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 4584 | if (rc) { |
5db55844 | 4585 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 4586 | return rc; |
be695fc4 LB |
4587 | } |
4588 | ||
99020471 BC |
4589 | if (nowait) |
4590 | return rc; | |
4591 | ||
be695fc4 LB |
4592 | /* Load firmware into hardware */ |
4593 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 4594 | if (rc) |
5db55844 | 4595 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
4596 | |
4597 | /* Reclaim memory once firmware is successfully loaded */ | |
4598 | mwl8k_release_firmware(priv); | |
4599 | ||
3cc7772c BC |
4600 | return rc; |
4601 | } | |
4602 | ||
4603 | /* initialize hw after successfully loading a firmware image */ | |
4604 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
4605 | { | |
4606 | struct mwl8k_priv *priv = hw->priv; | |
4607 | int rc = 0; | |
4608 | int i; | |
be695fc4 | 4609 | |
91942230 | 4610 | if (priv->ap_fw) { |
89a91f4f | 4611 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 4612 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
4613 | wiphy_err(hw->wiphy, |
4614 | "Driver does not have AP firmware image support for this hardware\n"); | |
91942230 LB |
4615 | goto err_stop_firmware; |
4616 | } | |
4617 | } else { | |
89a91f4f | 4618 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 4619 | } |
be695fc4 LB |
4620 | |
4621 | priv->sniffer_enabled = false; | |
4622 | priv->wmm_enabled = false; | |
4623 | priv->pending_tx_pkts = 0; | |
4624 | ||
a66098da LB |
4625 | rc = mwl8k_rxq_init(hw, 0); |
4626 | if (rc) | |
3cc7772c | 4627 | goto err_stop_firmware; |
a66098da LB |
4628 | rxq_refill(hw, 0, INT_MAX); |
4629 | ||
a66098da LB |
4630 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { |
4631 | rc = mwl8k_txq_init(hw, i); | |
4632 | if (rc) | |
4633 | goto err_free_queues; | |
4634 | } | |
4635 | ||
4636 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 4637 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
67e2eb27 | 4638 | iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY, |
1e9f9de3 | 4639 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
a66098da LB |
4640 | iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
4641 | ||
a0607fd3 | 4642 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4643 | IRQF_SHARED, MWL8K_NAME, hw); |
4644 | if (rc) { | |
5db55844 | 4645 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
4646 | goto err_free_queues; |
4647 | } | |
4648 | ||
a66098da LB |
4649 | /* |
4650 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 4651 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
4652 | * interrupts when done. |
4653 | */ | |
c23b5a69 | 4654 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4655 | |
4656 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
4657 | if (priv->ap_fw) { |
4658 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
4659 | if (!rc) | |
4660 | rc = mwl8k_cmd_set_hw_spec(hw); | |
4661 | } else { | |
4662 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
4663 | } | |
a66098da | 4664 | if (rc) { |
5db55844 | 4665 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 4666 | goto err_free_irq; |
a66098da LB |
4667 | } |
4668 | ||
4669 | /* Turn radio off */ | |
55489b6e | 4670 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 4671 | if (rc) { |
5db55844 | 4672 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 4673 | goto err_free_irq; |
a66098da LB |
4674 | } |
4675 | ||
32060e1b | 4676 | /* Clear MAC address */ |
aa21d0f6 | 4677 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 4678 | if (rc) { |
5db55844 | 4679 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 4680 | goto err_free_irq; |
32060e1b LB |
4681 | } |
4682 | ||
a66098da | 4683 | /* Disable interrupts */ |
a66098da | 4684 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4685 | free_irq(priv->pdev->irq, hw); |
4686 | ||
c96c31e4 JP |
4687 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
4688 | priv->device_info->part_name, | |
4689 | priv->hw_rev, hw->wiphy->perm_addr, | |
4690 | priv->ap_fw ? "AP" : "STA", | |
4691 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
4692 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
4693 | |
4694 | return 0; | |
4695 | ||
a66098da | 4696 | err_free_irq: |
a66098da | 4697 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4698 | free_irq(priv->pdev->irq, hw); |
4699 | ||
4700 | err_free_queues: | |
4701 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
4702 | mwl8k_txq_deinit(hw, i); | |
4703 | mwl8k_rxq_deinit(hw, 0); | |
4704 | ||
3cc7772c BC |
4705 | err_stop_firmware: |
4706 | mwl8k_hw_reset(priv); | |
4707 | ||
4708 | return rc; | |
4709 | } | |
4710 | ||
4711 | /* | |
4712 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
4713 | * has already been registered | |
4714 | */ | |
4715 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
4716 | { | |
4717 | int i, rc = 0; | |
4718 | struct mwl8k_priv *priv = hw->priv; | |
4719 | ||
4720 | mwl8k_stop(hw); | |
4721 | mwl8k_rxq_deinit(hw, 0); | |
4722 | ||
4723 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
4724 | mwl8k_txq_deinit(hw, i); | |
4725 | ||
99020471 | 4726 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
4727 | if (rc) |
4728 | goto fail; | |
4729 | ||
4730 | rc = mwl8k_probe_hw(hw); | |
4731 | if (rc) | |
4732 | goto fail; | |
4733 | ||
4734 | rc = mwl8k_start(hw); | |
4735 | if (rc) | |
4736 | goto fail; | |
4737 | ||
4738 | rc = mwl8k_config(hw, ~0); | |
4739 | if (rc) | |
4740 | goto fail; | |
4741 | ||
4742 | for (i = 0; i < MWL8K_TX_QUEUES; i++) { | |
4743 | rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]); | |
4744 | if (rc) | |
4745 | goto fail; | |
4746 | } | |
4747 | ||
4748 | return rc; | |
4749 | ||
4750 | fail: | |
4751 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
4752 | return rc; | |
4753 | } | |
4754 | ||
4755 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) | |
4756 | { | |
4757 | struct ieee80211_hw *hw = priv->hw; | |
4758 | int i, rc; | |
4759 | ||
99020471 BC |
4760 | rc = mwl8k_load_firmware(hw); |
4761 | mwl8k_release_firmware(priv); | |
4762 | if (rc) { | |
4763 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
4764 | return rc; | |
4765 | } | |
4766 | ||
3cc7772c BC |
4767 | /* |
4768 | * Extra headroom is the size of the required DMA header | |
4769 | * minus the size of the smallest 802.11 frame (CTS frame). | |
4770 | */ | |
4771 | hw->extra_tx_headroom = | |
4772 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
4773 | ||
4774 | hw->channel_change_time = 10; | |
4775 | ||
4776 | hw->queues = MWL8K_TX_QUEUES; | |
4777 | ||
4778 | /* Set rssi values to dBm */ | |
0bf22c37 | 4779 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; |
3cc7772c BC |
4780 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
4781 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
4782 | ||
4783 | priv->macids_used = 0; | |
4784 | INIT_LIST_HEAD(&priv->vif_list); | |
4785 | ||
4786 | /* Set default radio state and preamble */ | |
4787 | priv->radio_on = 0; | |
4788 | priv->radio_short_preamble = 0; | |
4789 | ||
4790 | /* Finalize join worker */ | |
4791 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
4792 | ||
4793 | /* TX reclaim and RX tasklets. */ | |
4794 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
4795 | tasklet_disable(&priv->poll_tx_task); | |
4796 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
4797 | tasklet_disable(&priv->poll_rx_task); | |
4798 | ||
4799 | /* Power management cookie */ | |
4800 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
4801 | if (priv->cookie == NULL) | |
4802 | return -ENOMEM; | |
4803 | ||
4804 | mutex_init(&priv->fw_mutex); | |
4805 | priv->fw_mutex_owner = NULL; | |
4806 | priv->fw_mutex_depth = 0; | |
4807 | priv->hostcmd_wait = NULL; | |
4808 | ||
4809 | spin_lock_init(&priv->tx_lock); | |
4810 | ||
4811 | priv->tx_wait = NULL; | |
4812 | ||
4813 | rc = mwl8k_probe_hw(hw); | |
4814 | if (rc) | |
4815 | goto err_free_cookie; | |
4816 | ||
4817 | hw->wiphy->interface_modes = 0; | |
4818 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) | |
4819 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); | |
4820 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) | |
4821 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
4822 | ||
4823 | rc = ieee80211_register_hw(hw); | |
4824 | if (rc) { | |
4825 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
4826 | goto err_unprobe_hw; | |
4827 | } | |
4828 | ||
4829 | return 0; | |
4830 | ||
4831 | err_unprobe_hw: | |
4832 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
4833 | mwl8k_txq_deinit(hw, i); | |
4834 | mwl8k_rxq_deinit(hw, 0); | |
4835 | ||
be695fc4 | 4836 | err_free_cookie: |
a66098da LB |
4837 | if (priv->cookie != NULL) |
4838 | pci_free_consistent(priv->pdev, 4, | |
4839 | priv->cookie, priv->cookie_dma); | |
4840 | ||
3cc7772c BC |
4841 | return rc; |
4842 | } | |
4843 | static int __devinit mwl8k_probe(struct pci_dev *pdev, | |
4844 | const struct pci_device_id *id) | |
4845 | { | |
4846 | static int printed_version; | |
4847 | struct ieee80211_hw *hw; | |
4848 | struct mwl8k_priv *priv; | |
0863ade8 | 4849 | struct mwl8k_device_info *di; |
3cc7772c BC |
4850 | int rc; |
4851 | ||
4852 | if (!printed_version) { | |
4853 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
4854 | printed_version = 1; | |
4855 | } | |
4856 | ||
4857 | ||
4858 | rc = pci_enable_device(pdev); | |
4859 | if (rc) { | |
4860 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
4861 | MWL8K_NAME); | |
4862 | return rc; | |
4863 | } | |
4864 | ||
4865 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
4866 | if (rc) { | |
4867 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
4868 | MWL8K_NAME); | |
4869 | goto err_disable_device; | |
4870 | } | |
4871 | ||
4872 | pci_set_master(pdev); | |
4873 | ||
4874 | ||
4875 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
4876 | if (hw == NULL) { | |
4877 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
4878 | rc = -ENOMEM; | |
4879 | goto err_free_reg; | |
4880 | } | |
4881 | ||
4882 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
4883 | pci_set_drvdata(pdev, hw); | |
4884 | ||
4885 | priv = hw->priv; | |
4886 | priv->hw = hw; | |
4887 | priv->pdev = pdev; | |
4888 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
4889 | ||
4890 | ||
4891 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
4892 | if (priv->sram == NULL) { | |
4893 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
4894 | goto err_iounmap; | |
4895 | } | |
4896 | ||
4897 | /* | |
4898 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
4899 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
4900 | */ | |
4901 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
4902 | if (priv->regs == NULL) { | |
4903 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
4904 | if (priv->regs == NULL) { | |
4905 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
4906 | goto err_iounmap; | |
4907 | } | |
4908 | } | |
4909 | ||
0863ade8 | 4910 | /* |
99020471 BC |
4911 | * Choose the initial fw image depending on user input. If a second |
4912 | * image is available, make it the alternative image that will be | |
4913 | * loaded if the first one fails. | |
0863ade8 | 4914 | */ |
99020471 | 4915 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 4916 | di = priv->device_info; |
99020471 BC |
4917 | if (ap_mode_default && di->fw_image_ap) { |
4918 | priv->fw_pref = di->fw_image_ap; | |
4919 | priv->fw_alt = di->fw_image_sta; | |
4920 | } else if (!ap_mode_default && di->fw_image_sta) { | |
4921 | priv->fw_pref = di->fw_image_sta; | |
4922 | priv->fw_alt = di->fw_image_ap; | |
4923 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 4924 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 4925 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
4926 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
4927 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
4928 | priv->fw_pref = di->fw_image_ap; |
4929 | } | |
4930 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
4931 | if (rc) |
4932 | goto err_stop_firmware; | |
99020471 | 4933 | return rc; |
3cc7772c | 4934 | |
be695fc4 LB |
4935 | err_stop_firmware: |
4936 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
4937 | |
4938 | err_iounmap: | |
a66098da LB |
4939 | if (priv->regs != NULL) |
4940 | pci_iounmap(pdev, priv->regs); | |
4941 | ||
5b9482dd LB |
4942 | if (priv->sram != NULL) |
4943 | pci_iounmap(pdev, priv->sram); | |
4944 | ||
a66098da LB |
4945 | pci_set_drvdata(pdev, NULL); |
4946 | ieee80211_free_hw(hw); | |
4947 | ||
4948 | err_free_reg: | |
4949 | pci_release_regions(pdev); | |
3db95e50 LB |
4950 | |
4951 | err_disable_device: | |
a66098da LB |
4952 | pci_disable_device(pdev); |
4953 | ||
4954 | return rc; | |
4955 | } | |
4956 | ||
230f7af0 | 4957 | static void __devexit mwl8k_shutdown(struct pci_dev *pdev) |
a66098da LB |
4958 | { |
4959 | printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__); | |
4960 | } | |
4961 | ||
230f7af0 | 4962 | static void __devexit mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
4963 | { |
4964 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
4965 | struct mwl8k_priv *priv; | |
4966 | int i; | |
4967 | ||
4968 | if (hw == NULL) | |
4969 | return; | |
4970 | priv = hw->priv; | |
4971 | ||
99020471 BC |
4972 | wait_for_completion(&priv->firmware_loading_complete); |
4973 | ||
4974 | if (priv->fw_state == FW_STATE_ERROR) { | |
4975 | mwl8k_hw_reset(priv); | |
4976 | goto unmap; | |
4977 | } | |
4978 | ||
a66098da LB |
4979 | ieee80211_stop_queues(hw); |
4980 | ||
60aa569f LB |
4981 | ieee80211_unregister_hw(hw); |
4982 | ||
67e2eb27 | 4983 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 4984 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 4985 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 4986 | |
a66098da LB |
4987 | /* Stop hardware */ |
4988 | mwl8k_hw_reset(priv); | |
4989 | ||
4990 | /* Return all skbs to mac80211 */ | |
4991 | for (i = 0; i < MWL8K_TX_QUEUES; i++) | |
efb7c49a | 4992 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 4993 | |
a66098da LB |
4994 | for (i = 0; i < MWL8K_TX_QUEUES; i++) |
4995 | mwl8k_txq_deinit(hw, i); | |
4996 | ||
4997 | mwl8k_rxq_deinit(hw, 0); | |
4998 | ||
c2c357ce | 4999 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 5000 | |
99020471 | 5001 | unmap: |
a66098da | 5002 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 5003 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
5004 | pci_set_drvdata(pdev, NULL); |
5005 | ieee80211_free_hw(hw); | |
5006 | pci_release_regions(pdev); | |
5007 | pci_disable_device(pdev); | |
5008 | } | |
5009 | ||
5010 | static struct pci_driver mwl8k_driver = { | |
5011 | .name = MWL8K_NAME, | |
45a390dd | 5012 | .id_table = mwl8k_pci_id_table, |
a66098da LB |
5013 | .probe = mwl8k_probe, |
5014 | .remove = __devexit_p(mwl8k_remove), | |
5015 | .shutdown = __devexit_p(mwl8k_shutdown), | |
5016 | }; | |
5017 | ||
5018 | static int __init mwl8k_init(void) | |
5019 | { | |
5020 | return pci_register_driver(&mwl8k_driver); | |
5021 | } | |
5022 | ||
5023 | static void __exit mwl8k_exit(void) | |
5024 | { | |
5025 | pci_unregister_driver(&mwl8k_driver); | |
5026 | } | |
5027 | ||
5028 | module_init(mwl8k_init); | |
5029 | module_exit(mwl8k_exit); | |
c2c357ce LB |
5030 | |
5031 | MODULE_DESCRIPTION(MWL8K_DESC); | |
5032 | MODULE_VERSION(MWL8K_VERSION); | |
5033 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
5034 | MODULE_LICENSE("GPL"); |