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a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
3d76e82c | 15 | #include <linux/sched.h> |
a66098da LB |
16 | #include <linux/spinlock.h> |
17 | #include <linux/list.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/completion.h> | |
21 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
a66098da LB |
23 | #include <net/mac80211.h> |
24 | #include <linux/moduleparam.h> | |
25 | #include <linux/firmware.h> | |
26 | #include <linux/workqueue.h> | |
27 | ||
28 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
29 | #define MWL8K_NAME KBUILD_MODNAME | |
a5fb297d | 30 | #define MWL8K_VERSION "0.12" |
a66098da | 31 | |
0863ade8 BC |
32 | /* Module parameters */ |
33 | static unsigned ap_mode_default; | |
34 | module_param(ap_mode_default, bool, 0); | |
35 | MODULE_PARM_DESC(ap_mode_default, | |
36 | "Set to 1 to make ap mode the default instead of sta mode"); | |
37 | ||
a66098da LB |
38 | /* Register definitions */ |
39 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
40 | #define MWL8K_MODE_STA 0x0000005a |
41 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 42 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
43 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
44 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
45 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
46 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
47 | ||
48 | /* Host->device communications */ | |
49 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
54 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
55 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
56 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
57 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
58 | |
59 | /* Device->host communications */ | |
60 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b | 65 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
3aefc37e | 66 | #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14) |
ce9e2e1b LB |
67 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) |
68 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
69 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
70 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
71 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
72 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
73 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
74 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
75 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da LB |
76 | |
77 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ | |
78 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
79 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
80 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
81 | MWL8K_A2H_INT_RADIO_ON | \ | |
82 | MWL8K_A2H_INT_RADIO_OFF | \ | |
83 | MWL8K_A2H_INT_MAC_EVENT | \ | |
84 | MWL8K_A2H_INT_OPC_DONE | \ | |
85 | MWL8K_A2H_INT_RX_READY | \ | |
3aefc37e NS |
86 | MWL8K_A2H_INT_TX_DONE | \ |
87 | MWL8K_A2H_INT_BA_WATCHDOG) | |
a66098da | 88 | |
a66098da | 89 | #define MWL8K_RX_QUEUES 1 |
e600707b | 90 | #define MWL8K_TX_WMM_QUEUES 4 |
8a7a578c | 91 | #define MWL8K_MAX_AMPDU_QUEUES 8 |
e600707b BC |
92 | #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES) |
93 | #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues) | |
a66098da | 94 | |
54bc3a0d LB |
95 | struct rxd_ops { |
96 | int rxd_size; | |
97 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
98 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 99 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 100 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
101 | }; |
102 | ||
45a390dd | 103 | struct mwl8k_device_info { |
a74b295e LB |
104 | char *part_name; |
105 | char *helper_image; | |
0863ade8 BC |
106 | char *fw_image_sta; |
107 | char *fw_image_ap; | |
89a91f4f | 108 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 109 | u32 fw_api_ap; |
45a390dd LB |
110 | }; |
111 | ||
a66098da | 112 | struct mwl8k_rx_queue { |
45eb400d | 113 | int rxd_count; |
a66098da LB |
114 | |
115 | /* hw receives here */ | |
45eb400d | 116 | int head; |
a66098da LB |
117 | |
118 | /* refill descs here */ | |
45eb400d | 119 | int tail; |
a66098da | 120 | |
54bc3a0d | 121 | void *rxd; |
45eb400d | 122 | dma_addr_t rxd_dma; |
788838eb LB |
123 | struct { |
124 | struct sk_buff *skb; | |
53b1b3e1 | 125 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 126 | } *buf; |
a66098da LB |
127 | }; |
128 | ||
a66098da LB |
129 | struct mwl8k_tx_queue { |
130 | /* hw transmits here */ | |
45eb400d | 131 | int head; |
a66098da LB |
132 | |
133 | /* sw appends here */ | |
45eb400d | 134 | int tail; |
a66098da | 135 | |
8ccbc3b8 | 136 | unsigned int len; |
45eb400d LB |
137 | struct mwl8k_tx_desc *txd; |
138 | dma_addr_t txd_dma; | |
139 | struct sk_buff **skb; | |
a66098da LB |
140 | }; |
141 | ||
ac109fd0 BC |
142 | enum { |
143 | AMPDU_NO_STREAM, | |
144 | AMPDU_STREAM_NEW, | |
145 | AMPDU_STREAM_IN_PROGRESS, | |
146 | AMPDU_STREAM_ACTIVE, | |
147 | }; | |
148 | ||
5faa1aff NS |
149 | struct mwl8k_ampdu_stream { |
150 | struct ieee80211_sta *sta; | |
151 | u8 tid; | |
152 | u8 state; | |
153 | u8 idx; | |
154 | u8 txq_idx; /* index of this stream in priv->txq */ | |
155 | }; | |
156 | ||
a66098da | 157 | struct mwl8k_priv { |
a66098da | 158 | struct ieee80211_hw *hw; |
a66098da | 159 | struct pci_dev *pdev; |
a66098da | 160 | |
45a390dd LB |
161 | struct mwl8k_device_info *device_info; |
162 | ||
be695fc4 LB |
163 | void __iomem *sram; |
164 | void __iomem *regs; | |
165 | ||
166 | /* firmware */ | |
d1f9e41d BC |
167 | const struct firmware *fw_helper; |
168 | const struct firmware *fw_ucode; | |
a66098da | 169 | |
be695fc4 LB |
170 | /* hardware/firmware parameters */ |
171 | bool ap_fw; | |
172 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
173 | struct ieee80211_supported_band band_24; |
174 | struct ieee80211_channel channels_24[14]; | |
175 | struct ieee80211_rate rates_24[14]; | |
4eae9edd LB |
176 | struct ieee80211_supported_band band_50; |
177 | struct ieee80211_channel channels_50[4]; | |
178 | struct ieee80211_rate rates_50[9]; | |
ee0ddf18 LB |
179 | u32 ap_macids_supported; |
180 | u32 sta_macids_supported; | |
be695fc4 | 181 | |
8a7a578c BC |
182 | /* Ampdu stream information */ |
183 | u8 num_ampdu_queues; | |
ac109fd0 BC |
184 | spinlock_t stream_lock; |
185 | struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
3aefc37e | 186 | struct work_struct watchdog_ba_handle; |
8a7a578c | 187 | |
618952a7 LB |
188 | /* firmware access */ |
189 | struct mutex fw_mutex; | |
190 | struct task_struct *fw_mutex_owner; | |
191 | int fw_mutex_depth; | |
618952a7 LB |
192 | struct completion *hostcmd_wait; |
193 | ||
a66098da LB |
194 | /* lock held over TX and TX reap */ |
195 | spinlock_t tx_lock; | |
a66098da | 196 | |
88de754a LB |
197 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
198 | struct completion *tx_wait; | |
199 | ||
f5bb87cf | 200 | /* List of interfaces. */ |
ee0ddf18 | 201 | u32 macids_used; |
f5bb87cf | 202 | struct list_head vif_list; |
a66098da | 203 | |
a66098da LB |
204 | /* power management status cookie from firmware */ |
205 | u32 *cookie; | |
206 | dma_addr_t cookie_dma; | |
207 | ||
208 | u16 num_mcaddrs; | |
a66098da | 209 | u8 hw_rev; |
2aa7b01f | 210 | u32 fw_rev; |
a66098da LB |
211 | |
212 | /* | |
213 | * Running count of TX packets in flight, to avoid | |
214 | * iterating over the transmit rings each time. | |
215 | */ | |
216 | int pending_tx_pkts; | |
217 | ||
218 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
e600707b BC |
219 | struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES]; |
220 | u32 txq_offset[MWL8K_MAX_TX_QUEUES]; | |
a66098da | 221 | |
c46563b7 | 222 | bool radio_on; |
68ce3884 | 223 | bool radio_short_preamble; |
a43c49a8 | 224 | bool sniffer_enabled; |
0439b1f5 | 225 | bool wmm_enabled; |
a66098da | 226 | |
a66098da LB |
227 | /* XXX need to convert this to handle multiple interfaces */ |
228 | bool capture_beacon; | |
d89173f2 | 229 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
230 | struct sk_buff *beacon_skb; |
231 | ||
232 | /* | |
233 | * This FJ worker has to be global as it is scheduled from the | |
234 | * RX handler. At this point we don't know which interface it | |
235 | * belongs to until the list of bssids waiting to complete join | |
236 | * is checked. | |
237 | */ | |
238 | struct work_struct finalize_join_worker; | |
239 | ||
1e9f9de3 LB |
240 | /* Tasklet to perform TX reclaim. */ |
241 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
242 | |
243 | /* Tasklet to perform RX. */ | |
244 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
245 | |
246 | /* Most recently reported noise in dBm */ | |
247 | s8 noise; | |
0863ade8 BC |
248 | |
249 | /* | |
250 | * preserve the queue configurations so they can be restored if/when | |
251 | * the firmware image is swapped. | |
252 | */ | |
e600707b | 253 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES]; |
99020471 BC |
254 | |
255 | /* async firmware loading state */ | |
256 | unsigned fw_state; | |
257 | char *fw_pref; | |
258 | char *fw_alt; | |
259 | struct completion firmware_loading_complete; | |
a66098da LB |
260 | }; |
261 | ||
e53d9b96 NS |
262 | #define MAX_WEP_KEY_LEN 13 |
263 | #define NUM_WEP_KEYS 4 | |
264 | ||
a66098da LB |
265 | /* Per interface specific private data */ |
266 | struct mwl8k_vif { | |
f5bb87cf LB |
267 | struct list_head list; |
268 | struct ieee80211_vif *vif; | |
269 | ||
f57ca9c1 LB |
270 | /* Firmware macid for this vif. */ |
271 | int macid; | |
272 | ||
c2c2b12a | 273 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 274 | u16 seqno; |
e53d9b96 NS |
275 | |
276 | /* Saved WEP keys */ | |
277 | struct { | |
278 | u8 enabled; | |
279 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
280 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
281 | |
282 | /* BSSID */ | |
283 | u8 bssid[ETH_ALEN]; | |
284 | ||
285 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
286 | bool is_hw_crypto_enabled; | |
a66098da | 287 | }; |
a94cc97e | 288 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 289 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 290 | |
a680400e LB |
291 | struct mwl8k_sta { |
292 | /* Index into station database. Returned by UPDATE_STADB. */ | |
293 | u8 peer_id; | |
294 | }; | |
295 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
296 | ||
777ad375 | 297 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
a66098da LB |
298 | { .center_freq = 2412, .hw_value = 1, }, |
299 | { .center_freq = 2417, .hw_value = 2, }, | |
300 | { .center_freq = 2422, .hw_value = 3, }, | |
301 | { .center_freq = 2427, .hw_value = 4, }, | |
302 | { .center_freq = 2432, .hw_value = 5, }, | |
303 | { .center_freq = 2437, .hw_value = 6, }, | |
304 | { .center_freq = 2442, .hw_value = 7, }, | |
305 | { .center_freq = 2447, .hw_value = 8, }, | |
306 | { .center_freq = 2452, .hw_value = 9, }, | |
307 | { .center_freq = 2457, .hw_value = 10, }, | |
308 | { .center_freq = 2462, .hw_value = 11, }, | |
647ca6b0 LB |
309 | { .center_freq = 2467, .hw_value = 12, }, |
310 | { .center_freq = 2472, .hw_value = 13, }, | |
311 | { .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
312 | }; |
313 | ||
777ad375 | 314 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
315 | { .bitrate = 10, .hw_value = 2, }, |
316 | { .bitrate = 20, .hw_value = 4, }, | |
317 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
318 | { .bitrate = 110, .hw_value = 22, }, |
319 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
320 | { .bitrate = 60, .hw_value = 12, }, |
321 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
322 | { .bitrate = 120, .hw_value = 24, }, |
323 | { .bitrate = 180, .hw_value = 36, }, | |
324 | { .bitrate = 240, .hw_value = 48, }, | |
325 | { .bitrate = 360, .hw_value = 72, }, | |
326 | { .bitrate = 480, .hw_value = 96, }, | |
327 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
328 | { .bitrate = 720, .hw_value = 144, }, |
329 | }; | |
330 | ||
4eae9edd LB |
331 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
332 | { .center_freq = 5180, .hw_value = 36, }, | |
333 | { .center_freq = 5200, .hw_value = 40, }, | |
334 | { .center_freq = 5220, .hw_value = 44, }, | |
335 | { .center_freq = 5240, .hw_value = 48, }, | |
336 | }; | |
337 | ||
338 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
339 | { .bitrate = 60, .hw_value = 12, }, | |
340 | { .bitrate = 90, .hw_value = 18, }, | |
341 | { .bitrate = 120, .hw_value = 24, }, | |
342 | { .bitrate = 180, .hw_value = 36, }, | |
343 | { .bitrate = 240, .hw_value = 48, }, | |
344 | { .bitrate = 360, .hw_value = 72, }, | |
345 | { .bitrate = 480, .hw_value = 96, }, | |
346 | { .bitrate = 540, .hw_value = 108, }, | |
347 | { .bitrate = 720, .hw_value = 144, }, | |
348 | }; | |
349 | ||
a66098da | 350 | /* Set or get info from Firmware */ |
a66098da | 351 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
352 | #define MWL8K_CMD_SET 0x0001 |
353 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
354 | |
355 | /* Firmware command codes */ | |
356 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
357 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 358 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
359 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
360 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
361 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
362 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 363 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 364 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 365 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
366 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
367 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
368 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
369 | #define MWL8K_CMD_SET_AID 0x010d | |
370 | #define MWL8K_CMD_SET_RATE 0x0110 | |
371 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
372 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 373 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
374 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
375 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 376 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 377 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 378 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 379 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 380 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
3aefc37e | 381 | #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205 |
aa21d0f6 LB |
382 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
383 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 384 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 385 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
5faa1aff | 386 | #define MWL8K_CMD_BASTREAM 0x1125 |
a66098da | 387 | |
b603742f | 388 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 389 | { |
b603742f JL |
390 | u16 command = le16_to_cpu(cmd); |
391 | ||
a66098da LB |
392 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
393 | snprintf(buf, bufsize, "%s", #x);\ | |
394 | return buf;\ | |
395 | } while (0) | |
b603742f | 396 | switch (command & ~0x8000) { |
a66098da LB |
397 | MWL8K_CMDNAME(CODE_DNLD); |
398 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 399 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
400 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
401 | MWL8K_CMDNAME(GET_STAT); | |
402 | MWL8K_CMDNAME(RADIO_CONTROL); | |
403 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 404 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 405 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 406 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
407 | MWL8K_CMDNAME(SET_PRE_SCAN); |
408 | MWL8K_CMDNAME(SET_POST_SCAN); | |
409 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
410 | MWL8K_CMDNAME(SET_AID); |
411 | MWL8K_CMDNAME(SET_RATE); | |
412 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
413 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 414 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
415 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
416 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 417 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 418 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 419 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 420 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 421 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 422 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 423 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 424 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 425 | MWL8K_CMDNAME(UPDATE_STADB); |
5faa1aff | 426 | MWL8K_CMDNAME(BASTREAM); |
3aefc37e | 427 | MWL8K_CMDNAME(GET_WATCHDOG_BITMAP); |
a66098da LB |
428 | default: |
429 | snprintf(buf, bufsize, "0x%x", cmd); | |
430 | } | |
431 | #undef MWL8K_CMDNAME | |
432 | ||
433 | return buf; | |
434 | } | |
435 | ||
436 | /* Hardware and firmware reset */ | |
437 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
438 | { | |
439 | iowrite32(MWL8K_H2A_INT_RESET, | |
440 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
441 | iowrite32(MWL8K_H2A_INT_RESET, | |
442 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
443 | msleep(20); | |
444 | } | |
445 | ||
446 | /* Release fw image */ | |
d1f9e41d | 447 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
448 | { |
449 | if (*fw == NULL) | |
450 | return; | |
451 | release_firmware(*fw); | |
452 | *fw = NULL; | |
453 | } | |
454 | ||
455 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
456 | { | |
22be40d9 LB |
457 | mwl8k_release_fw(&priv->fw_ucode); |
458 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
459 | } |
460 | ||
99020471 BC |
461 | /* states for asynchronous f/w loading */ |
462 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
463 | enum { | |
464 | FW_STATE_INIT = 0, | |
465 | FW_STATE_LOADING_PREF, | |
466 | FW_STATE_LOADING_ALT, | |
467 | FW_STATE_ERROR, | |
468 | }; | |
469 | ||
a66098da LB |
470 | /* Request fw image */ |
471 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 472 | const char *fname, const struct firmware **fw, |
99020471 | 473 | bool nowait) |
a66098da LB |
474 | { |
475 | /* release current image */ | |
476 | if (*fw != NULL) | |
477 | mwl8k_release_fw(fw); | |
478 | ||
99020471 BC |
479 | if (nowait) |
480 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
481 | &priv->pdev->dev, GFP_KERNEL, | |
482 | priv, mwl8k_fw_state_machine); | |
483 | else | |
d1f9e41d | 484 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
485 | } |
486 | ||
99020471 BC |
487 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
488 | bool nowait) | |
a66098da | 489 | { |
a74b295e | 490 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
491 | int rc; |
492 | ||
a74b295e | 493 | if (di->helper_image != NULL) { |
99020471 BC |
494 | if (nowait) |
495 | rc = mwl8k_request_fw(priv, di->helper_image, | |
496 | &priv->fw_helper, true); | |
497 | else | |
498 | rc = mwl8k_request_fw(priv, di->helper_image, | |
499 | &priv->fw_helper, false); | |
500 | if (rc) | |
501 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
502 | pci_name(priv->pdev), di->helper_image); | |
503 | ||
504 | if (rc || nowait) | |
a74b295e | 505 | return rc; |
a66098da LB |
506 | } |
507 | ||
99020471 BC |
508 | if (nowait) { |
509 | /* | |
510 | * if we get here, no helper image is needed. Skip the | |
511 | * FW_STATE_INIT state. | |
512 | */ | |
513 | priv->fw_state = FW_STATE_LOADING_PREF; | |
514 | rc = mwl8k_request_fw(priv, fw_image, | |
515 | &priv->fw_ucode, | |
516 | true); | |
517 | } else | |
518 | rc = mwl8k_request_fw(priv, fw_image, | |
519 | &priv->fw_ucode, false); | |
a66098da | 520 | if (rc) { |
c2c357ce | 521 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 522 | pci_name(priv->pdev), fw_image); |
22be40d9 | 523 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
524 | return rc; |
525 | } | |
526 | ||
527 | return 0; | |
528 | } | |
529 | ||
530 | struct mwl8k_cmd_pkt { | |
531 | __le16 code; | |
532 | __le16 length; | |
f57ca9c1 LB |
533 | __u8 seq_num; |
534 | __u8 macid; | |
a66098da LB |
535 | __le16 result; |
536 | char payload[0]; | |
ba2d3587 | 537 | } __packed; |
a66098da LB |
538 | |
539 | /* | |
540 | * Firmware loading. | |
541 | */ | |
542 | static int | |
543 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
544 | { | |
545 | void __iomem *regs = priv->regs; | |
546 | dma_addr_t dma_addr; | |
a66098da LB |
547 | int loops; |
548 | ||
549 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
550 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
551 | return -ENOMEM; | |
552 | ||
553 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
554 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
555 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
556 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
557 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
558 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
559 | ||
a66098da LB |
560 | loops = 1000; |
561 | do { | |
562 | u32 int_code; | |
563 | ||
564 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
565 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
566 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
a66098da LB |
567 | break; |
568 | } | |
569 | ||
3d76e82c | 570 | cond_resched(); |
a66098da LB |
571 | udelay(1); |
572 | } while (--loops); | |
573 | ||
574 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
575 | ||
d4b70570 | 576 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
577 | } |
578 | ||
579 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
580 | const u8 *data, size_t length) | |
581 | { | |
582 | struct mwl8k_cmd_pkt *cmd; | |
583 | int done; | |
584 | int rc = 0; | |
585 | ||
586 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
587 | if (cmd == NULL) | |
588 | return -ENOMEM; | |
589 | ||
590 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
591 | cmd->seq_num = 0; | |
f57ca9c1 | 592 | cmd->macid = 0; |
a66098da LB |
593 | cmd->result = 0; |
594 | ||
595 | done = 0; | |
596 | while (length) { | |
597 | int block_size = length > 256 ? 256 : length; | |
598 | ||
599 | memcpy(cmd->payload, data + done, block_size); | |
600 | cmd->length = cpu_to_le16(block_size); | |
601 | ||
602 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
603 | sizeof(*cmd) + block_size); | |
604 | if (rc) | |
605 | break; | |
606 | ||
607 | done += block_size; | |
608 | length -= block_size; | |
609 | } | |
610 | ||
611 | if (!rc) { | |
612 | cmd->length = 0; | |
613 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
614 | } | |
615 | ||
616 | kfree(cmd); | |
617 | ||
618 | return rc; | |
619 | } | |
620 | ||
621 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
622 | const u8 *data, size_t length) | |
623 | { | |
624 | unsigned char *buffer; | |
625 | int may_continue, rc = 0; | |
626 | u32 done, prev_block_size; | |
627 | ||
628 | buffer = kmalloc(1024, GFP_KERNEL); | |
629 | if (buffer == NULL) | |
630 | return -ENOMEM; | |
631 | ||
632 | done = 0; | |
633 | prev_block_size = 0; | |
634 | may_continue = 1000; | |
635 | while (may_continue > 0) { | |
636 | u32 block_size; | |
637 | ||
638 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
639 | if (block_size & 1) { | |
640 | block_size &= ~1; | |
641 | may_continue--; | |
642 | } else { | |
643 | done += prev_block_size; | |
644 | length -= prev_block_size; | |
645 | } | |
646 | ||
647 | if (block_size > 1024 || block_size > length) { | |
648 | rc = -EOVERFLOW; | |
649 | break; | |
650 | } | |
651 | ||
652 | if (length == 0) { | |
653 | rc = 0; | |
654 | break; | |
655 | } | |
656 | ||
657 | if (block_size == 0) { | |
658 | rc = -EPROTO; | |
659 | may_continue--; | |
660 | udelay(1); | |
661 | continue; | |
662 | } | |
663 | ||
664 | prev_block_size = block_size; | |
665 | memcpy(buffer, data + done, block_size); | |
666 | ||
667 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
668 | if (rc) | |
669 | break; | |
670 | } | |
671 | ||
672 | if (!rc && length != 0) | |
673 | rc = -EREMOTEIO; | |
674 | ||
675 | kfree(buffer); | |
676 | ||
677 | return rc; | |
678 | } | |
679 | ||
c2c357ce | 680 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 681 | { |
c2c357ce | 682 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 683 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
684 | int rc; |
685 | int loops; | |
686 | ||
687 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | |
d1f9e41d | 688 | const struct firmware *helper = priv->fw_helper; |
a66098da | 689 | |
c2c357ce LB |
690 | if (helper == NULL) { |
691 | printk(KERN_ERR "%s: helper image needed but none " | |
692 | "given\n", pci_name(priv->pdev)); | |
693 | return -EINVAL; | |
694 | } | |
a66098da | 695 | |
c2c357ce | 696 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
697 | if (rc) { |
698 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 699 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
700 | return rc; |
701 | } | |
89b872e2 | 702 | msleep(5); |
a66098da | 703 | |
c2c357ce | 704 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 705 | } else { |
c2c357ce | 706 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); |
a66098da LB |
707 | } |
708 | ||
709 | if (rc) { | |
c2c357ce LB |
710 | printk(KERN_ERR "%s: unable to load firmware image\n", |
711 | pci_name(priv->pdev)); | |
a66098da LB |
712 | return rc; |
713 | } | |
714 | ||
89a91f4f | 715 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 716 | |
89b872e2 | 717 | loops = 500000; |
a66098da | 718 | do { |
eae74e65 LB |
719 | u32 ready_code; |
720 | ||
721 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
722 | if (ready_code == MWL8K_FWAP_READY) { | |
723 | priv->ap_fw = 1; | |
724 | break; | |
725 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
726 | priv->ap_fw = 0; | |
a66098da | 727 | break; |
eae74e65 LB |
728 | } |
729 | ||
730 | cond_resched(); | |
a66098da LB |
731 | udelay(1); |
732 | } while (--loops); | |
733 | ||
734 | return loops ? 0 : -ETIMEDOUT; | |
735 | } | |
736 | ||
737 | ||
a66098da LB |
738 | /* DMA header used by firmware and hardware. */ |
739 | struct mwl8k_dma_data { | |
740 | __le16 fwlen; | |
741 | struct ieee80211_hdr wh; | |
20f09c3d | 742 | char data[0]; |
ba2d3587 | 743 | } __packed; |
a66098da LB |
744 | |
745 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 746 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 747 | { |
20f09c3d LB |
748 | struct mwl8k_dma_data *tr; |
749 | int hdrlen; | |
750 | ||
751 | tr = (struct mwl8k_dma_data *)skb->data; | |
752 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
753 | ||
754 | if (hdrlen != sizeof(tr->wh)) { | |
755 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
756 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
757 | *((__le16 *)(tr->data - 2)) = qos; | |
758 | } else { | |
759 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
760 | } | |
a66098da | 761 | } |
20f09c3d LB |
762 | |
763 | if (hdrlen != sizeof(*tr)) | |
764 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
765 | } |
766 | ||
252486a1 NS |
767 | static void |
768 | mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad) | |
a66098da LB |
769 | { |
770 | struct ieee80211_hdr *wh; | |
ca009301 | 771 | int hdrlen; |
252486a1 | 772 | int reqd_hdrlen; |
a66098da LB |
773 | struct mwl8k_dma_data *tr; |
774 | ||
ca009301 LB |
775 | /* |
776 | * Add a firmware DMA header; the firmware requires that we | |
777 | * present a 2-byte payload length followed by a 4-address | |
778 | * header (without QoS field), followed (optionally) by any | |
779 | * WEP/ExtIV header (but only filled in for CCMP). | |
780 | */ | |
a66098da | 781 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 782 | |
a66098da | 783 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
252486a1 NS |
784 | reqd_hdrlen = sizeof(*tr); |
785 | ||
786 | if (hdrlen != reqd_hdrlen) | |
787 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 788 | |
ca009301 | 789 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 790 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
791 | |
792 | tr = (struct mwl8k_dma_data *)skb->data; | |
793 | if (wh != &tr->wh) | |
794 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
795 | if (hdrlen != sizeof(tr->wh)) |
796 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
797 | |
798 | /* | |
799 | * Firmware length is the length of the fully formed "802.11 | |
800 | * payload". That is, everything except for the 802.11 header. | |
801 | * This includes all crypto material including the MIC. | |
802 | */ | |
252486a1 | 803 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
804 | } |
805 | ||
e53d9b96 NS |
806 | static void mwl8k_encapsulate_tx_frame(struct sk_buff *skb) |
807 | { | |
808 | struct ieee80211_hdr *wh; | |
809 | struct ieee80211_tx_info *tx_info; | |
810 | struct ieee80211_key_conf *key_conf; | |
811 | int data_pad; | |
812 | ||
813 | wh = (struct ieee80211_hdr *)skb->data; | |
814 | ||
815 | tx_info = IEEE80211_SKB_CB(skb); | |
816 | ||
817 | key_conf = NULL; | |
818 | if (ieee80211_is_data(wh->frame_control)) | |
819 | key_conf = tx_info->control.hw_key; | |
820 | ||
821 | /* | |
822 | * Make sure the packet header is in the DMA header format (4-address | |
823 | * without QoS), the necessary crypto padding between the header and the | |
824 | * payload has already been provided by mac80211, but it doesn't add tail | |
825 | * padding when HW crypto is enabled. | |
826 | * | |
827 | * We have the following trailer padding requirements: | |
828 | * - WEP: 4 trailer bytes (ICV) | |
829 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
830 | * - CCMP: 8 trailer bytes (MIC) | |
831 | */ | |
832 | data_pad = 0; | |
833 | if (key_conf != NULL) { | |
834 | switch (key_conf->cipher) { | |
835 | case WLAN_CIPHER_SUITE_WEP40: | |
836 | case WLAN_CIPHER_SUITE_WEP104: | |
837 | data_pad = 4; | |
838 | break; | |
839 | case WLAN_CIPHER_SUITE_TKIP: | |
840 | data_pad = 12; | |
841 | break; | |
842 | case WLAN_CIPHER_SUITE_CCMP: | |
843 | data_pad = 8; | |
844 | break; | |
845 | } | |
846 | } | |
847 | mwl8k_add_dma_header(skb, data_pad); | |
848 | } | |
a66098da LB |
849 | |
850 | /* | |
89a91f4f | 851 | * Packet reception for 88w8366 AP firmware. |
6f6d1e9a | 852 | */ |
89a91f4f | 853 | struct mwl8k_rxd_8366_ap { |
6f6d1e9a LB |
854 | __le16 pkt_len; |
855 | __u8 sq2; | |
856 | __u8 rate; | |
857 | __le32 pkt_phys_addr; | |
858 | __le32 next_rxd_phys_addr; | |
859 | __le16 qos_control; | |
860 | __le16 htsig2; | |
861 | __le32 hw_rssi_info; | |
862 | __le32 hw_noise_floor_info; | |
863 | __u8 noise_floor; | |
864 | __u8 pad0[3]; | |
865 | __u8 rssi; | |
866 | __u8 rx_status; | |
867 | __u8 channel; | |
868 | __u8 rx_ctrl; | |
ba2d3587 | 869 | } __packed; |
6f6d1e9a | 870 | |
89a91f4f LB |
871 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
872 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | |
873 | #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 874 | |
89a91f4f | 875 | #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 876 | |
d9a07d49 NS |
877 | /* 8366 AP rx_status bits */ |
878 | #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
879 | #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
880 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
881 | #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
882 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
883 | ||
89a91f4f | 884 | static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 885 | { |
89a91f4f | 886 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
887 | |
888 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 889 | rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
890 | } |
891 | ||
89a91f4f | 892 | static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 893 | { |
89a91f4f | 894 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
895 | |
896 | rxd->pkt_len = cpu_to_le16(len); | |
897 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
898 | wmb(); | |
899 | rxd->rx_ctrl = 0; | |
900 | } | |
901 | ||
902 | static int | |
89a91f4f | 903 | mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 904 | __le16 *qos, s8 *noise) |
6f6d1e9a | 905 | { |
89a91f4f | 906 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a | 907 | |
89a91f4f | 908 | if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
909 | return -1; |
910 | rmb(); | |
911 | ||
912 | memset(status, 0, sizeof(*status)); | |
913 | ||
914 | status->signal = -rxd->rssi; | |
0d462bbb | 915 | *noise = -rxd->noise_floor; |
6f6d1e9a | 916 | |
89a91f4f | 917 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 918 | status->flag |= RX_FLAG_HT; |
89a91f4f | 919 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 920 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 921 | status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
922 | } else { |
923 | int i; | |
924 | ||
777ad375 LB |
925 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
926 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
927 | status->rate_idx = i; |
928 | break; | |
929 | } | |
930 | } | |
931 | } | |
932 | ||
85478344 LB |
933 | if (rxd->channel > 14) { |
934 | status->band = IEEE80211_BAND_5GHZ; | |
935 | if (!(status->flag & RX_FLAG_HT)) | |
936 | status->rate_idx -= 5; | |
937 | } else { | |
938 | status->band = IEEE80211_BAND_2GHZ; | |
939 | } | |
59eb21a6 BR |
940 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
941 | status->band); | |
6f6d1e9a | 942 | |
20f09c3d LB |
943 | *qos = rxd->qos_control; |
944 | ||
d9a07d49 NS |
945 | if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
946 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
947 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
948 | status->flag |= RX_FLAG_MMIC_ERROR; | |
949 | ||
6f6d1e9a LB |
950 | return le16_to_cpu(rxd->pkt_len); |
951 | } | |
952 | ||
89a91f4f LB |
953 | static struct rxd_ops rxd_8366_ap_ops = { |
954 | .rxd_size = sizeof(struct mwl8k_rxd_8366_ap), | |
955 | .rxd_init = mwl8k_rxd_8366_ap_init, | |
956 | .rxd_refill = mwl8k_rxd_8366_ap_refill, | |
957 | .rxd_process = mwl8k_rxd_8366_ap_process, | |
6f6d1e9a LB |
958 | }; |
959 | ||
960 | /* | |
89a91f4f | 961 | * Packet reception for STA firmware. |
a66098da | 962 | */ |
89a91f4f | 963 | struct mwl8k_rxd_sta { |
a66098da LB |
964 | __le16 pkt_len; |
965 | __u8 link_quality; | |
966 | __u8 noise_level; | |
967 | __le32 pkt_phys_addr; | |
45eb400d | 968 | __le32 next_rxd_phys_addr; |
a66098da LB |
969 | __le16 qos_control; |
970 | __le16 rate_info; | |
971 | __le32 pad0[4]; | |
972 | __u8 rssi; | |
973 | __u8 channel; | |
974 | __le16 pad1; | |
975 | __u8 rx_ctrl; | |
976 | __u8 rx_status; | |
977 | __u8 pad2[2]; | |
ba2d3587 | 978 | } __packed; |
a66098da | 979 | |
89a91f4f LB |
980 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
981 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
982 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
983 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
984 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
985 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 986 | |
89a91f4f | 987 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
988 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
989 | /* ICV=0 or MIC=1 */ | |
990 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
991 | /* Key is uploaded only in failure case */ | |
992 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 993 | |
89a91f4f | 994 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 995 | { |
89a91f4f | 996 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
997 | |
998 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 999 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
1000 | } |
1001 | ||
89a91f4f | 1002 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 1003 | { |
89a91f4f | 1004 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1005 | |
1006 | rxd->pkt_len = cpu_to_le16(len); | |
1007 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
1008 | wmb(); | |
1009 | rxd->rx_ctrl = 0; | |
1010 | } | |
1011 | ||
1012 | static int | |
89a91f4f | 1013 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 1014 | __le16 *qos, s8 *noise) |
54bc3a0d | 1015 | { |
89a91f4f | 1016 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1017 | u16 rate_info; |
1018 | ||
89a91f4f | 1019 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
1020 | return -1; |
1021 | rmb(); | |
1022 | ||
1023 | rate_info = le16_to_cpu(rxd->rate_info); | |
1024 | ||
1025 | memset(status, 0, sizeof(*status)); | |
1026 | ||
1027 | status->signal = -rxd->rssi; | |
0d462bbb | 1028 | *noise = -rxd->noise_level; |
89a91f4f LB |
1029 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
1030 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1031 | |
89a91f4f | 1032 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1033 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1034 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1035 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1036 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1037 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1038 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1039 | status->flag |= RX_FLAG_HT; |
1040 | ||
85478344 LB |
1041 | if (rxd->channel > 14) { |
1042 | status->band = IEEE80211_BAND_5GHZ; | |
1043 | if (!(status->flag & RX_FLAG_HT)) | |
1044 | status->rate_idx -= 5; | |
1045 | } else { | |
1046 | status->band = IEEE80211_BAND_2GHZ; | |
1047 | } | |
59eb21a6 BR |
1048 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1049 | status->band); | |
54bc3a0d | 1050 | |
20f09c3d | 1051 | *qos = rxd->qos_control; |
d9a07d49 NS |
1052 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1053 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1054 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1055 | |
54bc3a0d LB |
1056 | return le16_to_cpu(rxd->pkt_len); |
1057 | } | |
1058 | ||
89a91f4f LB |
1059 | static struct rxd_ops rxd_sta_ops = { |
1060 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1061 | .rxd_init = mwl8k_rxd_sta_init, | |
1062 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1063 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1064 | }; |
1065 | ||
1066 | ||
a66098da LB |
1067 | #define MWL8K_RX_DESCS 256 |
1068 | #define MWL8K_RX_MAXSZ 3800 | |
1069 | ||
1070 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1071 | { | |
1072 | struct mwl8k_priv *priv = hw->priv; | |
1073 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1074 | int size; | |
1075 | int i; | |
1076 | ||
45eb400d LB |
1077 | rxq->rxd_count = 0; |
1078 | rxq->head = 0; | |
1079 | rxq->tail = 0; | |
a66098da | 1080 | |
54bc3a0d | 1081 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1082 | |
45eb400d LB |
1083 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
1084 | if (rxq->rxd == NULL) { | |
5db55844 | 1085 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1086 | return -ENOMEM; |
1087 | } | |
45eb400d | 1088 | memset(rxq->rxd, 0, size); |
a66098da | 1089 | |
b9ede5f1 | 1090 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1091 | if (rxq->buf == NULL) { |
5db55844 | 1092 | wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n"); |
45eb400d | 1093 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1094 | return -ENOMEM; |
1095 | } | |
a66098da LB |
1096 | |
1097 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1098 | int desc_size; |
1099 | void *rxd; | |
a66098da | 1100 | int nexti; |
54bc3a0d LB |
1101 | dma_addr_t next_dma_addr; |
1102 | ||
1103 | desc_size = priv->rxd_ops->rxd_size; | |
1104 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1105 | |
54bc3a0d LB |
1106 | nexti = i + 1; |
1107 | if (nexti == MWL8K_RX_DESCS) | |
1108 | nexti = 0; | |
1109 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1110 | |
54bc3a0d | 1111 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1112 | } |
1113 | ||
1114 | return 0; | |
1115 | } | |
1116 | ||
1117 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1118 | { | |
1119 | struct mwl8k_priv *priv = hw->priv; | |
1120 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1121 | int refilled; | |
1122 | ||
1123 | refilled = 0; | |
45eb400d | 1124 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1125 | struct sk_buff *skb; |
788838eb | 1126 | dma_addr_t addr; |
a66098da | 1127 | int rx; |
54bc3a0d | 1128 | void *rxd; |
a66098da LB |
1129 | |
1130 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1131 | if (skb == NULL) | |
1132 | break; | |
1133 | ||
788838eb LB |
1134 | addr = pci_map_single(priv->pdev, skb->data, |
1135 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1136 | |
54bc3a0d LB |
1137 | rxq->rxd_count++; |
1138 | rx = rxq->tail++; | |
1139 | if (rxq->tail == MWL8K_RX_DESCS) | |
1140 | rxq->tail = 0; | |
788838eb | 1141 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1142 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1143 | |
1144 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1145 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1146 | |
1147 | refilled++; | |
1148 | } | |
1149 | ||
1150 | return refilled; | |
1151 | } | |
1152 | ||
1153 | /* Must be called only when the card's reception is completely halted */ | |
1154 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1155 | { | |
1156 | struct mwl8k_priv *priv = hw->priv; | |
1157 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1158 | int i; | |
1159 | ||
73b46320 BC |
1160 | if (rxq->rxd == NULL) |
1161 | return; | |
1162 | ||
a66098da | 1163 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
788838eb LB |
1164 | if (rxq->buf[i].skb != NULL) { |
1165 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1166 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1167 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1168 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1169 | |
1170 | kfree_skb(rxq->buf[i].skb); | |
1171 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1172 | } |
1173 | } | |
1174 | ||
788838eb LB |
1175 | kfree(rxq->buf); |
1176 | rxq->buf = NULL; | |
a66098da LB |
1177 | |
1178 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1179 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1180 | rxq->rxd, rxq->rxd_dma); |
1181 | rxq->rxd = NULL; | |
a66098da LB |
1182 | } |
1183 | ||
1184 | ||
1185 | /* | |
1186 | * Scan a list of BSSIDs to process for finalize join. | |
1187 | * Allows for extension to process multiple BSSIDs. | |
1188 | */ | |
1189 | static inline int | |
1190 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1191 | { | |
1192 | return priv->capture_beacon && | |
1193 | ieee80211_is_beacon(wh->frame_control) && | |
1194 | !compare_ether_addr(wh->addr3, priv->capture_bssid); | |
1195 | } | |
1196 | ||
3779752d LB |
1197 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1198 | struct sk_buff *skb) | |
a66098da | 1199 | { |
3779752d LB |
1200 | struct mwl8k_priv *priv = hw->priv; |
1201 | ||
a66098da | 1202 | priv->capture_beacon = false; |
d89173f2 | 1203 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1204 | |
1205 | /* | |
1206 | * Use GFP_ATOMIC as rxq_process is called from | |
1207 | * the primary interrupt handler, memory allocation call | |
1208 | * must not sleep. | |
1209 | */ | |
1210 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1211 | if (priv->beacon_skb != NULL) | |
3779752d | 1212 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1213 | } |
1214 | ||
d9a07d49 NS |
1215 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1216 | u8 *bssid) | |
1217 | { | |
1218 | struct mwl8k_vif *mwl8k_vif; | |
1219 | ||
1220 | list_for_each_entry(mwl8k_vif, | |
1221 | vif_list, list) { | |
1222 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1223 | ETH_ALEN) == 0) | |
1224 | return mwl8k_vif; | |
1225 | } | |
1226 | ||
1227 | return NULL; | |
1228 | } | |
1229 | ||
a66098da LB |
1230 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1231 | { | |
1232 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1233 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1234 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1235 | int processed; | |
1236 | ||
1237 | processed = 0; | |
45eb400d | 1238 | while (rxq->rxd_count && limit--) { |
a66098da | 1239 | struct sk_buff *skb; |
54bc3a0d LB |
1240 | void *rxd; |
1241 | int pkt_len; | |
a66098da | 1242 | struct ieee80211_rx_status status; |
d9a07d49 | 1243 | struct ieee80211_hdr *wh; |
20f09c3d | 1244 | __le16 qos; |
a66098da | 1245 | |
788838eb | 1246 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1247 | if (skb == NULL) |
1248 | break; | |
54bc3a0d LB |
1249 | |
1250 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1251 | ||
0d462bbb JL |
1252 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1253 | &priv->noise); | |
54bc3a0d LB |
1254 | if (pkt_len < 0) |
1255 | break; | |
1256 | ||
788838eb LB |
1257 | rxq->buf[rxq->head].skb = NULL; |
1258 | ||
1259 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1260 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1261 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1262 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1263 | |
54bc3a0d LB |
1264 | rxq->head++; |
1265 | if (rxq->head == MWL8K_RX_DESCS) | |
1266 | rxq->head = 0; | |
1267 | ||
45eb400d | 1268 | rxq->rxd_count--; |
a66098da | 1269 | |
d9a07d49 | 1270 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1271 | |
a66098da | 1272 | /* |
c2c357ce LB |
1273 | * Check for a pending join operation. Save a |
1274 | * copy of the beacon and schedule a tasklet to | |
1275 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1276 | */ |
54bc3a0d | 1277 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1278 | mwl8k_save_beacon(hw, skb); |
a66098da | 1279 | |
d9a07d49 NS |
1280 | if (ieee80211_has_protected(wh->frame_control)) { |
1281 | ||
1282 | /* Check if hw crypto has been enabled for | |
1283 | * this bss. If yes, set the status flags | |
1284 | * accordingly | |
1285 | */ | |
1286 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1287 | wh->addr1); | |
1288 | ||
1289 | if (mwl8k_vif != NULL && | |
1290 | mwl8k_vif->is_hw_crypto_enabled == true) { | |
1291 | /* | |
1292 | * When MMIC ERROR is encountered | |
1293 | * by the firmware, payload is | |
1294 | * dropped and only 32 bytes of | |
1295 | * mwl8k Firmware header is sent | |
1296 | * to the host. | |
1297 | * | |
1298 | * We need to add four bytes of | |
1299 | * key information. In it | |
1300 | * MAC80211 expects keyidx set to | |
1301 | * 0 for triggering Counter | |
1302 | * Measure of MMIC failure. | |
1303 | */ | |
1304 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1305 | struct mwl8k_dma_data *tr; | |
1306 | tr = (struct mwl8k_dma_data *)skb->data; | |
1307 | memset((void *)&(tr->data), 0, 4); | |
1308 | pkt_len += 4; | |
1309 | } | |
1310 | ||
1311 | if (!ieee80211_is_auth(wh->frame_control)) | |
1312 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1313 | RX_FLAG_DECRYPTED | | |
1314 | RX_FLAG_MMIC_STRIPPED; | |
1315 | } | |
1316 | } | |
1317 | ||
1318 | skb_put(skb, pkt_len); | |
1319 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1320 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1321 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1322 | |
1323 | processed++; | |
1324 | } | |
1325 | ||
1326 | return processed; | |
1327 | } | |
1328 | ||
1329 | ||
1330 | /* | |
1331 | * Packet transmission. | |
1332 | */ | |
1333 | ||
a66098da LB |
1334 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1335 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1336 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1337 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1338 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1339 | |
e0493a8d LB |
1340 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1341 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1342 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1343 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1344 | #define MWL8K_QOS_EOSP 0x0010 | |
1345 | ||
a66098da LB |
1346 | struct mwl8k_tx_desc { |
1347 | __le32 status; | |
1348 | __u8 data_rate; | |
1349 | __u8 tx_priority; | |
1350 | __le16 qos_control; | |
1351 | __le32 pkt_phys_addr; | |
1352 | __le16 pkt_len; | |
d89173f2 | 1353 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1354 | __le32 next_txd_phys_addr; |
8a7a578c | 1355 | __le32 timestamp; |
a66098da LB |
1356 | __le16 rate_info; |
1357 | __u8 peer_id; | |
a1fe24b0 | 1358 | __u8 tx_frag_cnt; |
ba2d3587 | 1359 | } __packed; |
a66098da LB |
1360 | |
1361 | #define MWL8K_TX_DESCS 128 | |
1362 | ||
1363 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1364 | { | |
1365 | struct mwl8k_priv *priv = hw->priv; | |
1366 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1367 | int size; | |
1368 | int i; | |
1369 | ||
8ccbc3b8 | 1370 | txq->len = 0; |
45eb400d LB |
1371 | txq->head = 0; |
1372 | txq->tail = 0; | |
a66098da LB |
1373 | |
1374 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1375 | ||
45eb400d LB |
1376 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1377 | if (txq->txd == NULL) { | |
5db55844 | 1378 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1379 | return -ENOMEM; |
1380 | } | |
45eb400d | 1381 | memset(txq->txd, 0, size); |
a66098da | 1382 | |
b9ede5f1 | 1383 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1384 | if (txq->skb == NULL) { |
5db55844 | 1385 | wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n"); |
45eb400d | 1386 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1387 | return -ENOMEM; |
1388 | } | |
a66098da LB |
1389 | |
1390 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1391 | struct mwl8k_tx_desc *tx_desc; | |
1392 | int nexti; | |
1393 | ||
45eb400d | 1394 | tx_desc = txq->txd + i; |
a66098da LB |
1395 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1396 | ||
1397 | tx_desc->status = 0; | |
45eb400d LB |
1398 | tx_desc->next_txd_phys_addr = |
1399 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1400 | } |
1401 | ||
1402 | return 0; | |
1403 | } | |
1404 | ||
1405 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1406 | { | |
1407 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1408 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1409 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1410 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1411 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1412 | } | |
1413 | ||
7e1112d3 | 1414 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1415 | { |
7e1112d3 LB |
1416 | struct mwl8k_priv *priv = hw->priv; |
1417 | int i; | |
1418 | ||
e600707b | 1419 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
7e1112d3 LB |
1420 | struct mwl8k_tx_queue *txq = priv->txq + i; |
1421 | int fw_owned = 0; | |
1422 | int drv_owned = 0; | |
1423 | int unused = 0; | |
1424 | int desc; | |
1425 | ||
a66098da | 1426 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1427 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1428 | u32 status; | |
a66098da | 1429 | |
7e1112d3 | 1430 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1431 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1432 | fw_owned++; |
a66098da | 1433 | else |
7e1112d3 | 1434 | drv_owned++; |
a66098da LB |
1435 | |
1436 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1437 | unused++; |
a66098da | 1438 | } |
a66098da | 1439 | |
c96c31e4 JP |
1440 | wiphy_err(hw->wiphy, |
1441 | "txq[%d] len=%d head=%d tail=%d " | |
1442 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1443 | i, | |
1444 | txq->len, txq->head, txq->tail, | |
1445 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1446 | } |
a66098da LB |
1447 | } |
1448 | ||
618952a7 | 1449 | /* |
88de754a | 1450 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1451 | */ |
62abd3cf | 1452 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1453 | |
950d5b01 | 1454 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1455 | { |
a66098da | 1456 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1457 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1458 | int retry; |
1459 | int rc; | |
a66098da LB |
1460 | |
1461 | might_sleep(); | |
1462 | ||
7e1112d3 LB |
1463 | /* |
1464 | * The TX queues are stopped at this point, so this test | |
1465 | * doesn't need to take ->tx_lock. | |
1466 | */ | |
1467 | if (!priv->pending_tx_pkts) | |
1468 | return 0; | |
1469 | ||
1470 | retry = 0; | |
1471 | rc = 0; | |
1472 | ||
a66098da | 1473 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1474 | priv->tx_wait = &tx_wait; |
1475 | while (!rc) { | |
1476 | int oldcount; | |
1477 | unsigned long timeout; | |
a66098da | 1478 | |
7e1112d3 | 1479 | oldcount = priv->pending_tx_pkts; |
a66098da | 1480 | |
7e1112d3 | 1481 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1482 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1483 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
a66098da | 1484 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1485 | |
1486 | if (timeout) { | |
1487 | WARN_ON(priv->pending_tx_pkts); | |
1488 | if (retry) { | |
c96c31e4 | 1489 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1490 | } |
1491 | break; | |
1492 | } | |
1493 | ||
1494 | if (priv->pending_tx_pkts < oldcount) { | |
c96c31e4 JP |
1495 | wiphy_notice(hw->wiphy, |
1496 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1497 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1498 | retry = 1; |
1499 | continue; | |
1500 | } | |
1501 | ||
a66098da | 1502 | priv->tx_wait = NULL; |
a66098da | 1503 | |
c96c31e4 JP |
1504 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1505 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 LB |
1506 | mwl8k_dump_tx_rings(hw); |
1507 | ||
1508 | rc = -ETIMEDOUT; | |
a66098da | 1509 | } |
7e1112d3 | 1510 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1511 | |
7e1112d3 | 1512 | return rc; |
a66098da LB |
1513 | } |
1514 | ||
c23b5a69 LB |
1515 | #define MWL8K_TXD_SUCCESS(status) \ |
1516 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1517 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1518 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1519 | |
efb7c49a LB |
1520 | static int |
1521 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1522 | { |
1523 | struct mwl8k_priv *priv = hw->priv; | |
1524 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1525 | int processed; |
a66098da | 1526 | |
efb7c49a | 1527 | processed = 0; |
8ccbc3b8 | 1528 | while (txq->len > 0 && limit--) { |
a66098da | 1529 | int tx; |
a66098da LB |
1530 | struct mwl8k_tx_desc *tx_desc; |
1531 | unsigned long addr; | |
ce9e2e1b | 1532 | int size; |
a66098da LB |
1533 | struct sk_buff *skb; |
1534 | struct ieee80211_tx_info *info; | |
1535 | u32 status; | |
1536 | ||
45eb400d LB |
1537 | tx = txq->head; |
1538 | tx_desc = txq->txd + tx; | |
a66098da LB |
1539 | |
1540 | status = le32_to_cpu(tx_desc->status); | |
1541 | ||
1542 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1543 | if (!force) | |
1544 | break; | |
1545 | tx_desc->status &= | |
1546 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1547 | } | |
1548 | ||
45eb400d | 1549 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1550 | BUG_ON(txq->len == 0); |
1551 | txq->len--; | |
a66098da LB |
1552 | priv->pending_tx_pkts--; |
1553 | ||
1554 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1555 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1556 | skb = txq->skb[tx]; |
1557 | txq->skb[tx] = NULL; | |
a66098da LB |
1558 | |
1559 | BUG_ON(skb == NULL); | |
1560 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1561 | ||
20f09c3d | 1562 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da LB |
1563 | |
1564 | /* Mark descriptor as unused */ | |
1565 | tx_desc->pkt_phys_addr = 0; | |
1566 | tx_desc->pkt_len = 0; | |
1567 | ||
a66098da LB |
1568 | info = IEEE80211_SKB_CB(skb); |
1569 | ieee80211_tx_info_clear_status(info); | |
0bf22c37 NS |
1570 | |
1571 | /* Rate control is happening in the firmware. | |
1572 | * Ensure no tx rate is being reported. | |
1573 | */ | |
1574 | info->status.rates[0].idx = -1; | |
1575 | info->status.rates[0].count = 1; | |
1576 | ||
ce9e2e1b | 1577 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1578 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1579 | |
1580 | ieee80211_tx_status_irqsafe(hw, skb); | |
1581 | ||
efb7c49a | 1582 | processed++; |
a66098da LB |
1583 | } |
1584 | ||
65f3ddcd NS |
1585 | if (index < MWL8K_TX_WMM_QUEUES && processed && priv->radio_on && |
1586 | !mutex_is_locked(&priv->fw_mutex)) | |
a66098da | 1587 | ieee80211_wake_queue(hw, index); |
efb7c49a LB |
1588 | |
1589 | return processed; | |
a66098da LB |
1590 | } |
1591 | ||
1592 | /* must be called only when the card's transmit is completely halted */ | |
1593 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1594 | { | |
1595 | struct mwl8k_priv *priv = hw->priv; | |
1596 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1597 | ||
73b46320 BC |
1598 | if (txq->txd == NULL) |
1599 | return; | |
1600 | ||
efb7c49a | 1601 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1602 | |
45eb400d LB |
1603 | kfree(txq->skb); |
1604 | txq->skb = NULL; | |
a66098da LB |
1605 | |
1606 | pci_free_consistent(priv->pdev, | |
1607 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1608 | txq->txd, txq->txd_dma); |
1609 | txq->txd = NULL; | |
a66098da LB |
1610 | } |
1611 | ||
ac109fd0 BC |
1612 | /* caller must hold priv->stream_lock when calling the stream functions */ |
1613 | struct mwl8k_ampdu_stream * | |
1614 | mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid) | |
1615 | { | |
1616 | struct mwl8k_ampdu_stream *stream; | |
1617 | struct mwl8k_priv *priv = hw->priv; | |
1618 | int i; | |
1619 | ||
1620 | for (i = 0; i < priv->num_ampdu_queues; i++) { | |
1621 | stream = &priv->ampdu[i]; | |
1622 | if (stream->state == AMPDU_NO_STREAM) { | |
1623 | stream->sta = sta; | |
1624 | stream->state = AMPDU_STREAM_NEW; | |
1625 | stream->tid = tid; | |
1626 | stream->idx = i; | |
1627 | stream->txq_idx = MWL8K_TX_WMM_QUEUES + i; | |
1628 | wiphy_debug(hw->wiphy, "Added a new stream for %pM %d", | |
1629 | sta->addr, tid); | |
1630 | return stream; | |
1631 | } | |
1632 | } | |
1633 | return NULL; | |
1634 | } | |
1635 | ||
1636 | static int | |
1637 | mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1638 | { | |
1639 | int ret; | |
1640 | ||
1641 | /* if the stream has already been started, don't start it again */ | |
1642 | if (stream->state != AMPDU_STREAM_NEW) | |
1643 | return 0; | |
1644 | ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0); | |
1645 | if (ret) | |
1646 | wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: " | |
1647 | "%d\n", stream->sta->addr, stream->tid, ret); | |
1648 | else | |
1649 | wiphy_debug(hw->wiphy, "Started stream for %pM %d\n", | |
1650 | stream->sta->addr, stream->tid); | |
1651 | return ret; | |
1652 | } | |
1653 | ||
1654 | static void | |
1655 | mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1656 | { | |
1657 | wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr, | |
1658 | stream->tid); | |
1659 | memset(stream, 0, sizeof(*stream)); | |
1660 | } | |
1661 | ||
1662 | static struct mwl8k_ampdu_stream * | |
1663 | mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid) | |
1664 | { | |
1665 | struct mwl8k_priv *priv = hw->priv; | |
1666 | int i; | |
1667 | ||
1668 | for (i = 0 ; i < priv->num_ampdu_queues; i++) { | |
1669 | struct mwl8k_ampdu_stream *stream; | |
1670 | stream = &priv->ampdu[i]; | |
1671 | if (stream->state == AMPDU_NO_STREAM) | |
1672 | continue; | |
1673 | if (!memcmp(stream->sta->addr, addr, ETH_ALEN) && | |
1674 | stream->tid == tid) | |
1675 | return stream; | |
1676 | } | |
1677 | return NULL; | |
1678 | } | |
1679 | ||
7bb45683 | 1680 | static void |
a66098da LB |
1681 | mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb) |
1682 | { | |
1683 | struct mwl8k_priv *priv = hw->priv; | |
1684 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1685 | struct mwl8k_vif *mwl8k_vif; |
65f3ddcd | 1686 | struct ieee80211_sta *sta; |
a66098da LB |
1687 | struct ieee80211_hdr *wh; |
1688 | struct mwl8k_tx_queue *txq; | |
1689 | struct mwl8k_tx_desc *tx; | |
a66098da | 1690 | dma_addr_t dma; |
23b33906 LB |
1691 | u32 txstatus; |
1692 | u8 txdatarate; | |
1693 | u16 qos; | |
65f3ddcd NS |
1694 | int txpriority; |
1695 | u8 tid = 0; | |
1696 | struct mwl8k_ampdu_stream *stream = NULL; | |
1697 | bool start_ba_session = false; | |
a66098da | 1698 | |
23b33906 LB |
1699 | wh = (struct ieee80211_hdr *)skb->data; |
1700 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1701 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1702 | else | |
1703 | qos = 0; | |
a66098da | 1704 | |
d9a07d49 NS |
1705 | if (priv->ap_fw) |
1706 | mwl8k_encapsulate_tx_frame(skb); | |
1707 | else | |
1708 | mwl8k_add_dma_header(skb, 0); | |
1709 | ||
23b33906 | 1710 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1711 | |
1712 | tx_info = IEEE80211_SKB_CB(skb); | |
65f3ddcd | 1713 | sta = tx_info->control.sta; |
a66098da | 1714 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); |
a66098da LB |
1715 | |
1716 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1717 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1718 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1719 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1720 | } |
1721 | ||
23b33906 LB |
1722 | /* Setup firmware control bit fields for each frame type. */ |
1723 | txstatus = 0; | |
1724 | txdatarate = 0; | |
1725 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1726 | ieee80211_is_ctl(wh->frame_control)) { | |
1727 | txdatarate = 0; | |
e0493a8d | 1728 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1729 | } else if (ieee80211_is_data(wh->frame_control)) { |
1730 | txdatarate = 1; | |
1731 | if (is_multicast_ether_addr(wh->addr1)) | |
1732 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1733 | ||
e0493a8d | 1734 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1735 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1736 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1737 | else |
e0493a8d | 1738 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1739 | } |
a66098da | 1740 | |
65f3ddcd NS |
1741 | txpriority = index; |
1742 | ||
1743 | if (ieee80211_is_data_qos(wh->frame_control) && | |
1744 | skb->protocol != cpu_to_be16(ETH_P_PAE) && | |
1745 | sta->ht_cap.ht_supported && priv->ap_fw) { | |
1746 | tid = qos & 0xf; | |
1747 | spin_lock(&priv->stream_lock); | |
1748 | stream = mwl8k_lookup_stream(hw, sta->addr, tid); | |
1749 | if (stream != NULL) { | |
1750 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
1751 | txpriority = stream->txq_idx; | |
1752 | index = stream->txq_idx; | |
1753 | } else if (stream->state == AMPDU_STREAM_NEW) { | |
1754 | /* We get here if the driver sends us packets | |
1755 | * after we've initiated a stream, but before | |
1756 | * our ampdu_action routine has been called | |
1757 | * with IEEE80211_AMPDU_TX_START to get the SSN | |
1758 | * for the ADDBA request. So this packet can | |
1759 | * go out with no risk of sequence number | |
1760 | * mismatch. No special handling is required. | |
1761 | */ | |
1762 | } else { | |
1763 | /* Drop packets that would go out after the | |
1764 | * ADDBA request was sent but before the ADDBA | |
1765 | * response is received. If we don't do this, | |
1766 | * the recipient would probably receive it | |
1767 | * after the ADDBA request with SSN 0. This | |
1768 | * will cause the recipient's BA receive window | |
1769 | * to shift, which would cause the subsequent | |
1770 | * packets in the BA stream to be discarded. | |
1771 | * mac80211 queues our packets for us in this | |
1772 | * case, so this is really just a safety check. | |
1773 | */ | |
1774 | wiphy_warn(hw->wiphy, | |
1775 | "Cannot send packet while ADDBA " | |
1776 | "dialog is underway.\n"); | |
1777 | spin_unlock(&priv->stream_lock); | |
1778 | dev_kfree_skb(skb); | |
1779 | return; | |
1780 | } | |
1781 | } else { | |
1782 | /* Defer calling mwl8k_start_stream so that the current | |
1783 | * skb can go out before the ADDBA request. This | |
1784 | * prevents sequence number mismatch at the recepient | |
1785 | * as described above. | |
1786 | */ | |
1787 | stream = mwl8k_add_stream(hw, sta, tid); | |
1788 | if (stream != NULL) | |
1789 | start_ba_session = true; | |
1790 | } | |
1791 | spin_unlock(&priv->stream_lock); | |
1792 | } | |
1793 | ||
a66098da LB |
1794 | dma = pci_map_single(priv->pdev, skb->data, |
1795 | skb->len, PCI_DMA_TODEVICE); | |
1796 | ||
1797 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
1798 | wiphy_debug(hw->wiphy, |
1799 | "failed to dma map skb, dropping TX frame.\n"); | |
65f3ddcd NS |
1800 | if (start_ba_session) { |
1801 | spin_lock(&priv->stream_lock); | |
1802 | mwl8k_remove_stream(hw, stream); | |
1803 | spin_unlock(&priv->stream_lock); | |
1804 | } | |
23b33906 | 1805 | dev_kfree_skb(skb); |
7bb45683 | 1806 | return; |
a66098da LB |
1807 | } |
1808 | ||
23b33906 | 1809 | spin_lock_bh(&priv->tx_lock); |
a66098da | 1810 | |
23b33906 | 1811 | txq = priv->txq + index; |
a66098da | 1812 | |
65f3ddcd NS |
1813 | if (index >= MWL8K_TX_WMM_QUEUES && txq->len >= MWL8K_TX_DESCS) { |
1814 | /* This is the case in which the tx packet is destined for an | |
1815 | * AMPDU queue and that AMPDU queue is full. Because we don't | |
1816 | * start and stop the AMPDU queues, we must drop these packets. | |
1817 | */ | |
1818 | dev_kfree_skb(skb); | |
1819 | spin_unlock_bh(&priv->tx_lock); | |
1820 | return; | |
1821 | } | |
1822 | ||
45eb400d LB |
1823 | BUG_ON(txq->skb[txq->tail] != NULL); |
1824 | txq->skb[txq->tail] = skb; | |
a66098da | 1825 | |
45eb400d | 1826 | tx = txq->txd + txq->tail; |
23b33906 | 1827 | tx->data_rate = txdatarate; |
65f3ddcd | 1828 | tx->tx_priority = txpriority; |
a66098da | 1829 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
1830 | tx->pkt_phys_addr = cpu_to_le32(dma); |
1831 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 1832 | tx->rate_info = 0; |
a680400e LB |
1833 | if (!priv->ap_fw && tx_info->control.sta != NULL) |
1834 | tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id; | |
1835 | else | |
1836 | tx->peer_id = 0; | |
a66098da | 1837 | wmb(); |
23b33906 LB |
1838 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
1839 | ||
8ccbc3b8 | 1840 | txq->len++; |
a66098da | 1841 | priv->pending_tx_pkts++; |
a66098da | 1842 | |
45eb400d LB |
1843 | txq->tail++; |
1844 | if (txq->tail == MWL8K_TX_DESCS) | |
1845 | txq->tail = 0; | |
23b33906 | 1846 | |
65f3ddcd | 1847 | if (txq->head == txq->tail && index < MWL8K_TX_WMM_QUEUES) |
a66098da LB |
1848 | ieee80211_stop_queue(hw, index); |
1849 | ||
23b33906 | 1850 | mwl8k_tx_start(priv); |
a66098da LB |
1851 | |
1852 | spin_unlock_bh(&priv->tx_lock); | |
65f3ddcd NS |
1853 | |
1854 | /* Initiate the ampdu session here */ | |
1855 | if (start_ba_session) { | |
1856 | spin_lock(&priv->stream_lock); | |
1857 | if (mwl8k_start_stream(hw, stream)) | |
1858 | mwl8k_remove_stream(hw, stream); | |
1859 | spin_unlock(&priv->stream_lock); | |
1860 | } | |
a66098da LB |
1861 | } |
1862 | ||
1863 | ||
618952a7 LB |
1864 | /* |
1865 | * Firmware access. | |
1866 | * | |
1867 | * We have the following requirements for issuing firmware commands: | |
1868 | * - Some commands require that the packet transmit path is idle when | |
1869 | * the command is issued. (For simplicity, we'll just quiesce the | |
1870 | * transmit path for every command.) | |
1871 | * - There are certain sequences of commands that need to be issued to | |
1872 | * the hardware sequentially, with no other intervening commands. | |
1873 | * | |
1874 | * This leads to an implementation of a "firmware lock" as a mutex that | |
1875 | * can be taken recursively, and which is taken by both the low-level | |
1876 | * command submission function (mwl8k_post_cmd) as well as any users of | |
1877 | * that function that require issuing of an atomic sequence of commands, | |
1878 | * and quiesces the transmit path whenever it's taken. | |
1879 | */ | |
1880 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
1881 | { | |
1882 | struct mwl8k_priv *priv = hw->priv; | |
1883 | ||
1884 | if (priv->fw_mutex_owner != current) { | |
1885 | int rc; | |
1886 | ||
1887 | mutex_lock(&priv->fw_mutex); | |
1888 | ieee80211_stop_queues(hw); | |
1889 | ||
1890 | rc = mwl8k_tx_wait_empty(hw); | |
1891 | if (rc) { | |
1892 | ieee80211_wake_queues(hw); | |
1893 | mutex_unlock(&priv->fw_mutex); | |
1894 | ||
1895 | return rc; | |
1896 | } | |
1897 | ||
1898 | priv->fw_mutex_owner = current; | |
1899 | } | |
1900 | ||
1901 | priv->fw_mutex_depth++; | |
1902 | ||
1903 | return 0; | |
1904 | } | |
1905 | ||
1906 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
1907 | { | |
1908 | struct mwl8k_priv *priv = hw->priv; | |
1909 | ||
1910 | if (!--priv->fw_mutex_depth) { | |
1911 | ieee80211_wake_queues(hw); | |
1912 | priv->fw_mutex_owner = NULL; | |
1913 | mutex_unlock(&priv->fw_mutex); | |
1914 | } | |
1915 | } | |
1916 | ||
1917 | ||
a66098da LB |
1918 | /* |
1919 | * Command processing. | |
1920 | */ | |
1921 | ||
0c9cc640 LB |
1922 | /* Timeout firmware commands after 10s */ |
1923 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
1924 | |
1925 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
1926 | { | |
1927 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
1928 | struct mwl8k_priv *priv = hw->priv; | |
1929 | void __iomem *regs = priv->regs; | |
1930 | dma_addr_t dma_addr; | |
1931 | unsigned int dma_size; | |
1932 | int rc; | |
a66098da LB |
1933 | unsigned long timeout = 0; |
1934 | u8 buf[32]; | |
1935 | ||
b603742f | 1936 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
1937 | dma_size = le16_to_cpu(cmd->length); |
1938 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
1939 | PCI_DMA_BIDIRECTIONAL); | |
1940 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
1941 | return -ENOMEM; | |
1942 | ||
618952a7 | 1943 | rc = mwl8k_fw_lock(hw); |
39a1e42e LB |
1944 | if (rc) { |
1945 | pci_unmap_single(priv->pdev, dma_addr, dma_size, | |
1946 | PCI_DMA_BIDIRECTIONAL); | |
618952a7 | 1947 | return rc; |
39a1e42e | 1948 | } |
a66098da | 1949 | |
a66098da LB |
1950 | priv->hostcmd_wait = &cmd_wait; |
1951 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
1952 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
1953 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1954 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1955 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
1956 | |
1957 | timeout = wait_for_completion_timeout(&cmd_wait, | |
1958 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
1959 | ||
618952a7 LB |
1960 | priv->hostcmd_wait = NULL; |
1961 | ||
1962 | mwl8k_fw_unlock(hw); | |
1963 | ||
37055bd4 LB |
1964 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
1965 | PCI_DMA_BIDIRECTIONAL); | |
1966 | ||
a66098da | 1967 | if (!timeout) { |
5db55844 | 1968 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
1969 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1970 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
1971 | rc = -ETIMEDOUT; |
1972 | } else { | |
0c9cc640 LB |
1973 | int ms; |
1974 | ||
1975 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
1976 | ||
ce9e2e1b | 1977 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 1978 | if (rc) |
5db55844 | 1979 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
1980 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1981 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 1982 | else if (ms > 2000) |
5db55844 | 1983 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
1984 | mwl8k_cmd_name(cmd->code, |
1985 | buf, sizeof(buf)), | |
1986 | ms); | |
a66098da LB |
1987 | } |
1988 | ||
a66098da LB |
1989 | return rc; |
1990 | } | |
1991 | ||
f57ca9c1 LB |
1992 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
1993 | struct ieee80211_vif *vif, | |
1994 | struct mwl8k_cmd_pkt *cmd) | |
1995 | { | |
1996 | if (vif != NULL) | |
1997 | cmd->macid = MWL8K_VIF(vif)->macid; | |
1998 | return mwl8k_post_cmd(hw, cmd); | |
1999 | } | |
2000 | ||
1349ad2f LB |
2001 | /* |
2002 | * Setup code shared between STA and AP firmware images. | |
2003 | */ | |
2004 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
2005 | { | |
2006 | struct mwl8k_priv *priv = hw->priv; | |
2007 | ||
2008 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
2009 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
2010 | ||
2011 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
2012 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
2013 | ||
2014 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
2015 | priv->band_24.channels = priv->channels_24; | |
2016 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
2017 | priv->band_24.bitrates = priv->rates_24; | |
2018 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
2019 | ||
2020 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
2021 | } | |
2022 | ||
4eae9edd LB |
2023 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
2024 | { | |
2025 | struct mwl8k_priv *priv = hw->priv; | |
2026 | ||
2027 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
2028 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
2029 | ||
2030 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
2031 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
2032 | ||
2033 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
2034 | priv->band_50.channels = priv->channels_50; | |
2035 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
2036 | priv->band_50.bitrates = priv->rates_50; | |
2037 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
2038 | ||
2039 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
2040 | } | |
2041 | ||
a66098da | 2042 | /* |
04b147b1 | 2043 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 2044 | */ |
04b147b1 | 2045 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
2046 | struct mwl8k_cmd_pkt header; |
2047 | __u8 hw_rev; | |
2048 | __u8 host_interface; | |
2049 | __le16 num_mcaddrs; | |
d89173f2 | 2050 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
2051 | __le16 region_code; |
2052 | __le32 fw_rev; | |
2053 | __le32 ps_cookie; | |
2054 | __le32 caps; | |
2055 | __u8 mcs_bitmap[16]; | |
2056 | __le32 rx_queue_ptr; | |
2057 | __le32 num_tx_queues; | |
e600707b | 2058 | __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES]; |
a66098da LB |
2059 | __le32 caps2; |
2060 | __le32 num_tx_desc_per_queue; | |
45eb400d | 2061 | __le32 total_rxd; |
ba2d3587 | 2062 | } __packed; |
a66098da | 2063 | |
341c9791 LB |
2064 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
2065 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
2066 | #define MWL8K_CAP_AMPDU 0x04000000 | |
2067 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
2068 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
2069 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
2070 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
2071 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
2072 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
2073 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
2074 | #define MWL8K_CAP_MIMO 0x00000200 | |
2075 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
2076 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
2077 | #define MWL8K_CAP_5GHZ 0x00000004 | |
2078 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 2079 | |
06953235 LB |
2080 | static void |
2081 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
2082 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 2083 | { |
341c9791 LB |
2084 | int rx_streams; |
2085 | int tx_streams; | |
2086 | ||
777ad375 | 2087 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
2088 | |
2089 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 2090 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 2091 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 2092 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
2093 | if (cap & MWL8K_CAP_AMPDU) { |
2094 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
2095 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
2096 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
2097 | } |
2098 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 2099 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 2100 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 2101 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 2102 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 2103 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 2104 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 2105 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 2106 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 2107 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 2108 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 2109 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
2110 | |
2111 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
2112 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
2113 | ||
777ad375 | 2114 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 2115 | if (rx_streams >= 2) |
777ad375 | 2116 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 2117 | if (rx_streams >= 3) |
777ad375 LB |
2118 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
2119 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
2120 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
2121 | |
2122 | if (rx_streams != tx_streams) { | |
777ad375 LB |
2123 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
2124 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
2125 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
2126 | } | |
2127 | } | |
2128 | ||
06953235 LB |
2129 | static void |
2130 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
2131 | { | |
2132 | struct mwl8k_priv *priv = hw->priv; | |
2133 | ||
2134 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { | |
2135 | mwl8k_setup_2ghz_band(hw); | |
2136 | if (caps & MWL8K_CAP_MIMO) | |
2137 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
2138 | } | |
2139 | ||
2140 | if (caps & MWL8K_CAP_5GHZ) { | |
2141 | mwl8k_setup_5ghz_band(hw); | |
2142 | if (caps & MWL8K_CAP_MIMO) | |
2143 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
2144 | } | |
2145 | } | |
2146 | ||
04b147b1 | 2147 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
2148 | { |
2149 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 2150 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
2151 | int rc; |
2152 | int i; | |
2153 | ||
2154 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2155 | if (cmd == NULL) | |
2156 | return -ENOMEM; | |
2157 | ||
2158 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2159 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2160 | ||
2161 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2162 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 2163 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
e600707b BC |
2164 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
2165 | for (i = 0; i < mwl8k_tx_queues(priv); i++) | |
45eb400d | 2166 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 2167 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 2168 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
2169 | |
2170 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2171 | ||
2172 | if (!rc) { | |
2173 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
2174 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 2175 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 2176 | priv->hw_rev = cmd->hw_rev; |
06953235 | 2177 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2178 | priv->ap_macids_supported = 0x00000000; |
2179 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
2180 | } |
2181 | ||
2182 | kfree(cmd); | |
2183 | return rc; | |
2184 | } | |
2185 | ||
42fba21d LB |
2186 | /* |
2187 | * CMD_GET_HW_SPEC (AP version). | |
2188 | */ | |
2189 | struct mwl8k_cmd_get_hw_spec_ap { | |
2190 | struct mwl8k_cmd_pkt header; | |
2191 | __u8 hw_rev; | |
2192 | __u8 host_interface; | |
2193 | __le16 num_wcb; | |
2194 | __le16 num_mcaddrs; | |
2195 | __u8 perm_addr[ETH_ALEN]; | |
2196 | __le16 region_code; | |
2197 | __le16 num_antenna; | |
2198 | __le32 fw_rev; | |
2199 | __le32 wcbbase0; | |
2200 | __le32 rxwrptr; | |
2201 | __le32 rxrdptr; | |
2202 | __le32 ps_cookie; | |
2203 | __le32 wcbbase1; | |
2204 | __le32 wcbbase2; | |
2205 | __le32 wcbbase3; | |
952a0e96 | 2206 | __le32 fw_api_version; |
8a7a578c BC |
2207 | __le32 caps; |
2208 | __le32 num_of_ampdu_queues; | |
2209 | __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
ba2d3587 | 2210 | } __packed; |
42fba21d LB |
2211 | |
2212 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2213 | { | |
2214 | struct mwl8k_priv *priv = hw->priv; | |
2215 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
8a7a578c | 2216 | int rc, i; |
952a0e96 | 2217 | u32 api_version; |
42fba21d LB |
2218 | |
2219 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2220 | if (cmd == NULL) | |
2221 | return -ENOMEM; | |
2222 | ||
2223 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2224 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2225 | ||
2226 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2227 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2228 | ||
2229 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2230 | ||
2231 | if (!rc) { | |
2232 | int off; | |
2233 | ||
952a0e96 BC |
2234 | api_version = le32_to_cpu(cmd->fw_api_version); |
2235 | if (priv->device_info->fw_api_ap != api_version) { | |
2236 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2237 | " Expected %d got %d.\n", MWL8K_NAME, | |
2238 | priv->device_info->part_name, | |
2239 | priv->device_info->fw_api_ap, | |
2240 | api_version); | |
2241 | rc = -EINVAL; | |
2242 | goto done; | |
2243 | } | |
42fba21d LB |
2244 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2245 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2246 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2247 | priv->hw_rev = cmd->hw_rev; | |
8a7a578c | 2248 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2249 | priv->ap_macids_supported = 0x000000ff; |
2250 | priv->sta_macids_supported = 0x00000000; | |
8a7a578c BC |
2251 | priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues); |
2252 | if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) { | |
2253 | wiphy_warn(hw->wiphy, "fw reported %d ampdu queues" | |
2254 | " but we only support %d.\n", | |
2255 | priv->num_ampdu_queues, | |
2256 | MWL8K_MAX_AMPDU_QUEUES); | |
2257 | priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES; | |
2258 | } | |
42fba21d | 2259 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; |
b603742f | 2260 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2261 | |
2262 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2263 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d | 2264 | |
73b46320 BC |
2265 | priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff; |
2266 | priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
2267 | priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
2268 | priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
8a7a578c BC |
2269 | |
2270 | for (i = 0; i < priv->num_ampdu_queues; i++) | |
e600707b | 2271 | priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] = |
8a7a578c | 2272 | le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff; |
42fba21d LB |
2273 | } |
2274 | ||
952a0e96 | 2275 | done: |
42fba21d LB |
2276 | kfree(cmd); |
2277 | return rc; | |
2278 | } | |
2279 | ||
2280 | /* | |
2281 | * CMD_SET_HW_SPEC. | |
2282 | */ | |
2283 | struct mwl8k_cmd_set_hw_spec { | |
2284 | struct mwl8k_cmd_pkt header; | |
2285 | __u8 hw_rev; | |
2286 | __u8 host_interface; | |
2287 | __le16 num_mcaddrs; | |
2288 | __u8 perm_addr[ETH_ALEN]; | |
2289 | __le16 region_code; | |
2290 | __le32 fw_rev; | |
2291 | __le32 ps_cookie; | |
2292 | __le32 caps; | |
2293 | __le32 rx_queue_ptr; | |
2294 | __le32 num_tx_queues; | |
e600707b | 2295 | __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES]; |
42fba21d LB |
2296 | __le32 flags; |
2297 | __le32 num_tx_desc_per_queue; | |
2298 | __le32 total_rxd; | |
ba2d3587 | 2299 | } __packed; |
42fba21d | 2300 | |
8a7a578c BC |
2301 | /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause |
2302 | * packets to expire 500 ms after the timestamp in the tx descriptor. That is, | |
2303 | * the packets that are queued for more than 500ms, will be dropped in the | |
2304 | * hardware. This helps minimizing the issues caused due to head-of-line | |
2305 | * blocking where a slow client can hog the bandwidth and affect traffic to a | |
2306 | * faster client. | |
2307 | */ | |
2308 | #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400 | |
b64fe619 LB |
2309 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2310 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2311 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2312 | |
2313 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2314 | { | |
2315 | struct mwl8k_priv *priv = hw->priv; | |
2316 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2317 | int rc; | |
2318 | int i; | |
2319 | ||
2320 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2321 | if (cmd == NULL) | |
2322 | return -ENOMEM; | |
2323 | ||
2324 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2325 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2326 | ||
2327 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2328 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
e600707b | 2329 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
85c9205c NS |
2330 | |
2331 | /* | |
2332 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2333 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2334 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2335 | * priority is interpreted the right way in firmware. | |
2336 | */ | |
e600707b BC |
2337 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
2338 | int j = mwl8k_tx_queues(priv) - 1 - i; | |
85c9205c NS |
2339 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); |
2340 | } | |
2341 | ||
b64fe619 LB |
2342 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2343 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
2344 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON); | |
42fba21d LB |
2345 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2346 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2347 | ||
2348 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2349 | kfree(cmd); | |
2350 | ||
2351 | return rc; | |
2352 | } | |
2353 | ||
a66098da LB |
2354 | /* |
2355 | * CMD_MAC_MULTICAST_ADR. | |
2356 | */ | |
2357 | struct mwl8k_cmd_mac_multicast_adr { | |
2358 | struct mwl8k_cmd_pkt header; | |
2359 | __le16 action; | |
2360 | __le16 numaddr; | |
ce9e2e1b | 2361 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2362 | }; |
2363 | ||
d5e30845 LB |
2364 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2365 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2366 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2367 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2368 | |
e81cd2d6 | 2369 | static struct mwl8k_cmd_pkt * |
447ced07 | 2370 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2371 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2372 | { |
e81cd2d6 | 2373 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2374 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2375 | int size; |
22bedad3 JP |
2376 | int mc_count = 0; |
2377 | ||
2378 | if (mc_list) | |
2379 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2380 | |
447ced07 | 2381 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2382 | allmulti = 1; |
2383 | mc_count = 0; | |
2384 | } | |
e81cd2d6 LB |
2385 | |
2386 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2387 | |
e81cd2d6 | 2388 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2389 | if (cmd == NULL) |
e81cd2d6 | 2390 | return NULL; |
a66098da LB |
2391 | |
2392 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2393 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2394 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2395 | MWL8K_ENABLE_RX_BROADCAST); | |
2396 | ||
2397 | if (allmulti) { | |
2398 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2399 | } else if (mc_count) { | |
22bedad3 JP |
2400 | struct netdev_hw_addr *ha; |
2401 | int i = 0; | |
d5e30845 LB |
2402 | |
2403 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2404 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2405 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2406 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2407 | } |
a66098da LB |
2408 | } |
2409 | ||
e81cd2d6 | 2410 | return &cmd->header; |
a66098da LB |
2411 | } |
2412 | ||
2413 | /* | |
55489b6e | 2414 | * CMD_GET_STAT. |
a66098da | 2415 | */ |
55489b6e | 2416 | struct mwl8k_cmd_get_stat { |
a66098da | 2417 | struct mwl8k_cmd_pkt header; |
a66098da | 2418 | __le32 stats[64]; |
ba2d3587 | 2419 | } __packed; |
a66098da LB |
2420 | |
2421 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2422 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2423 | #define MWL8K_STAT_FCS_ERROR 24 | |
2424 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2425 | ||
55489b6e LB |
2426 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2427 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2428 | { |
55489b6e | 2429 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2430 | int rc; |
2431 | ||
2432 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2433 | if (cmd == NULL) | |
2434 | return -ENOMEM; | |
2435 | ||
2436 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2437 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2438 | |
2439 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2440 | if (!rc) { | |
2441 | stats->dot11ACKFailureCount = | |
2442 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2443 | stats->dot11RTSFailureCount = | |
2444 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2445 | stats->dot11FCSErrorCount = | |
2446 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2447 | stats->dot11RTSSuccessCount = | |
2448 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2449 | } | |
2450 | kfree(cmd); | |
2451 | ||
2452 | return rc; | |
2453 | } | |
2454 | ||
2455 | /* | |
55489b6e | 2456 | * CMD_RADIO_CONTROL. |
a66098da | 2457 | */ |
55489b6e | 2458 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2459 | struct mwl8k_cmd_pkt header; |
2460 | __le16 action; | |
2461 | __le16 control; | |
2462 | __le16 radio_on; | |
ba2d3587 | 2463 | } __packed; |
a66098da | 2464 | |
c46563b7 | 2465 | static int |
55489b6e | 2466 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2467 | { |
2468 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2469 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2470 | int rc; |
2471 | ||
c46563b7 | 2472 | if (enable == priv->radio_on && !force) |
a66098da LB |
2473 | return 0; |
2474 | ||
a66098da LB |
2475 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2476 | if (cmd == NULL) | |
2477 | return -ENOMEM; | |
2478 | ||
2479 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2480 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2481 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2482 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2483 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2484 | ||
2485 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2486 | kfree(cmd); | |
2487 | ||
2488 | if (!rc) | |
c46563b7 | 2489 | priv->radio_on = enable; |
a66098da LB |
2490 | |
2491 | return rc; | |
2492 | } | |
2493 | ||
55489b6e | 2494 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2495 | { |
55489b6e | 2496 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2497 | } |
2498 | ||
55489b6e | 2499 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2500 | { |
55489b6e | 2501 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2502 | } |
2503 | ||
a66098da LB |
2504 | static int |
2505 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2506 | { | |
99200a99 | 2507 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2508 | |
68ce3884 | 2509 | priv->radio_short_preamble = short_preamble; |
a66098da | 2510 | |
55489b6e | 2511 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2512 | } |
2513 | ||
2514 | /* | |
55489b6e | 2515 | * CMD_RF_TX_POWER. |
a66098da | 2516 | */ |
41fdf097 | 2517 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2518 | |
55489b6e | 2519 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2520 | struct mwl8k_cmd_pkt header; |
2521 | __le16 action; | |
2522 | __le16 support_level; | |
2523 | __le16 current_level; | |
2524 | __le16 reserved; | |
41fdf097 | 2525 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2526 | } __packed; |
a66098da | 2527 | |
55489b6e | 2528 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2529 | { |
55489b6e | 2530 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2531 | int rc; |
2532 | ||
2533 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2534 | if (cmd == NULL) | |
2535 | return -ENOMEM; | |
2536 | ||
2537 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2538 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2539 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2540 | cmd->support_level = cpu_to_le16(dBm); | |
2541 | ||
2542 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2543 | kfree(cmd); | |
2544 | ||
2545 | return rc; | |
2546 | } | |
2547 | ||
41fdf097 NS |
2548 | /* |
2549 | * CMD_TX_POWER. | |
2550 | */ | |
2551 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2552 | ||
2553 | struct mwl8k_cmd_tx_power { | |
2554 | struct mwl8k_cmd_pkt header; | |
2555 | __le16 action; | |
2556 | __le16 band; | |
2557 | __le16 channel; | |
2558 | __le16 bw; | |
2559 | __le16 sub_ch; | |
2560 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
2561 | } __attribute__((packed)); | |
2562 | ||
2563 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2564 | struct ieee80211_conf *conf, | |
2565 | unsigned short pwr) | |
2566 | { | |
2567 | struct ieee80211_channel *channel = conf->channel; | |
2568 | struct mwl8k_cmd_tx_power *cmd; | |
2569 | int rc; | |
2570 | int i; | |
2571 | ||
2572 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2573 | if (cmd == NULL) | |
2574 | return -ENOMEM; | |
2575 | ||
2576 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2577 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2578 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2579 | ||
2580 | if (channel->band == IEEE80211_BAND_2GHZ) | |
2581 | cmd->band = cpu_to_le16(0x1); | |
2582 | else if (channel->band == IEEE80211_BAND_5GHZ) | |
2583 | cmd->band = cpu_to_le16(0x4); | |
2584 | ||
2585 | cmd->channel = channel->hw_value; | |
2586 | ||
2587 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2588 | conf->channel_type == NL80211_CHAN_HT20) { | |
2589 | cmd->bw = cpu_to_le16(0x2); | |
2590 | } else { | |
2591 | cmd->bw = cpu_to_le16(0x4); | |
2592 | if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2593 | cmd->sub_ch = cpu_to_le16(0x3); | |
2594 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2595 | cmd->sub_ch = cpu_to_le16(0x1); | |
2596 | } | |
2597 | ||
2598 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2599 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2600 | ||
2601 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2602 | kfree(cmd); | |
2603 | ||
2604 | return rc; | |
2605 | } | |
2606 | ||
08b06347 LB |
2607 | /* |
2608 | * CMD_RF_ANTENNA. | |
2609 | */ | |
2610 | struct mwl8k_cmd_rf_antenna { | |
2611 | struct mwl8k_cmd_pkt header; | |
2612 | __le16 antenna; | |
2613 | __le16 mode; | |
ba2d3587 | 2614 | } __packed; |
08b06347 LB |
2615 | |
2616 | #define MWL8K_RF_ANTENNA_RX 1 | |
2617 | #define MWL8K_RF_ANTENNA_TX 2 | |
2618 | ||
2619 | static int | |
2620 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2621 | { | |
2622 | struct mwl8k_cmd_rf_antenna *cmd; | |
2623 | int rc; | |
2624 | ||
2625 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2626 | if (cmd == NULL) | |
2627 | return -ENOMEM; | |
2628 | ||
2629 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2630 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2631 | cmd->antenna = cpu_to_le16(antenna); | |
2632 | cmd->mode = cpu_to_le16(mask); | |
2633 | ||
2634 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2635 | kfree(cmd); | |
2636 | ||
2637 | return rc; | |
2638 | } | |
2639 | ||
b64fe619 LB |
2640 | /* |
2641 | * CMD_SET_BEACON. | |
2642 | */ | |
2643 | struct mwl8k_cmd_set_beacon { | |
2644 | struct mwl8k_cmd_pkt header; | |
2645 | __le16 beacon_len; | |
2646 | __u8 beacon[0]; | |
2647 | }; | |
2648 | ||
aa21d0f6 LB |
2649 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2650 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2651 | { |
2652 | struct mwl8k_cmd_set_beacon *cmd; | |
2653 | int rc; | |
2654 | ||
2655 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2656 | if (cmd == NULL) | |
2657 | return -ENOMEM; | |
2658 | ||
2659 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2660 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2661 | cmd->beacon_len = cpu_to_le16(len); | |
2662 | memcpy(cmd->beacon, beacon, len); | |
2663 | ||
aa21d0f6 | 2664 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2665 | kfree(cmd); |
2666 | ||
2667 | return rc; | |
2668 | } | |
2669 | ||
a66098da LB |
2670 | /* |
2671 | * CMD_SET_PRE_SCAN. | |
2672 | */ | |
2673 | struct mwl8k_cmd_set_pre_scan { | |
2674 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2675 | } __packed; |
a66098da LB |
2676 | |
2677 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2678 | { | |
2679 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2680 | int rc; | |
2681 | ||
2682 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2683 | if (cmd == NULL) | |
2684 | return -ENOMEM; | |
2685 | ||
2686 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2687 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2688 | ||
2689 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2690 | kfree(cmd); | |
2691 | ||
2692 | return rc; | |
2693 | } | |
2694 | ||
2695 | /* | |
2696 | * CMD_SET_POST_SCAN. | |
2697 | */ | |
2698 | struct mwl8k_cmd_set_post_scan { | |
2699 | struct mwl8k_cmd_pkt header; | |
2700 | __le32 isibss; | |
d89173f2 | 2701 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 2702 | } __packed; |
a66098da LB |
2703 | |
2704 | static int | |
0a11dfc3 | 2705 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2706 | { |
2707 | struct mwl8k_cmd_set_post_scan *cmd; | |
2708 | int rc; | |
2709 | ||
2710 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2711 | if (cmd == NULL) | |
2712 | return -ENOMEM; | |
2713 | ||
2714 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
2715 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2716 | cmd->isibss = 0; | |
d89173f2 | 2717 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
2718 | |
2719 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2720 | kfree(cmd); | |
2721 | ||
2722 | return rc; | |
2723 | } | |
2724 | ||
2725 | /* | |
2726 | * CMD_SET_RF_CHANNEL. | |
2727 | */ | |
2728 | struct mwl8k_cmd_set_rf_channel { | |
2729 | struct mwl8k_cmd_pkt header; | |
2730 | __le16 action; | |
2731 | __u8 current_channel; | |
2732 | __le32 channel_flags; | |
ba2d3587 | 2733 | } __packed; |
a66098da LB |
2734 | |
2735 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 2736 | struct ieee80211_conf *conf) |
a66098da | 2737 | { |
610677d2 | 2738 | struct ieee80211_channel *channel = conf->channel; |
a66098da LB |
2739 | struct mwl8k_cmd_set_rf_channel *cmd; |
2740 | int rc; | |
2741 | ||
2742 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2743 | if (cmd == NULL) | |
2744 | return -ENOMEM; | |
2745 | ||
2746 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
2747 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2748 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2749 | cmd->current_channel = channel->hw_value; | |
610677d2 | 2750 | |
a66098da | 2751 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 2752 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
2753 | else if (channel->band == IEEE80211_BAND_5GHZ) |
2754 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 LB |
2755 | |
2756 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2757 | conf->channel_type == NL80211_CHAN_HT20) | |
2758 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
2759 | else if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2760 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
2761 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2762 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
a66098da LB |
2763 | |
2764 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2765 | kfree(cmd); | |
2766 | ||
2767 | return rc; | |
2768 | } | |
2769 | ||
2770 | /* | |
55489b6e | 2771 | * CMD_SET_AID. |
a66098da | 2772 | */ |
55489b6e LB |
2773 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
2774 | #define MWL8K_FRAME_PROT_11G 0x07 | |
2775 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
2776 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 2777 | |
55489b6e LB |
2778 | struct mwl8k_cmd_update_set_aid { |
2779 | struct mwl8k_cmd_pkt header; | |
2780 | __le16 aid; | |
a66098da | 2781 | |
55489b6e LB |
2782 | /* AP's MAC address (BSSID) */ |
2783 | __u8 bssid[ETH_ALEN]; | |
2784 | __le16 protection_mode; | |
2785 | __u8 supp_rates[14]; | |
ba2d3587 | 2786 | } __packed; |
a66098da | 2787 | |
c6e96010 LB |
2788 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
2789 | { | |
2790 | int i; | |
2791 | int j; | |
2792 | ||
2793 | /* | |
2794 | * Clear nonstandard rates 4 and 13. | |
2795 | */ | |
2796 | mask &= 0x1fef; | |
2797 | ||
2798 | for (i = 0, j = 0; i < 14; i++) { | |
2799 | if (mask & (1 << i)) | |
777ad375 | 2800 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
2801 | } |
2802 | } | |
2803 | ||
55489b6e | 2804 | static int |
c6e96010 LB |
2805 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
2806 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 2807 | { |
55489b6e LB |
2808 | struct mwl8k_cmd_update_set_aid *cmd; |
2809 | u16 prot_mode; | |
a66098da LB |
2810 | int rc; |
2811 | ||
2812 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2813 | if (cmd == NULL) | |
2814 | return -ENOMEM; | |
2815 | ||
55489b6e | 2816 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 2817 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 2818 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 2819 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 2820 | |
7dc6a7a7 | 2821 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
2822 | prot_mode = MWL8K_FRAME_PROT_11G; |
2823 | } else { | |
7dc6a7a7 | 2824 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
2825 | IEEE80211_HT_OP_MODE_PROTECTION) { |
2826 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
2827 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
2828 | break; | |
2829 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
2830 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
2831 | break; | |
2832 | default: | |
2833 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
2834 | break; | |
2835 | } | |
2836 | } | |
2837 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 2838 | |
c6e96010 | 2839 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
2840 | |
2841 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2842 | kfree(cmd); | |
2843 | ||
2844 | return rc; | |
2845 | } | |
2846 | ||
32060e1b | 2847 | /* |
55489b6e | 2848 | * CMD_SET_RATE. |
32060e1b | 2849 | */ |
55489b6e LB |
2850 | struct mwl8k_cmd_set_rate { |
2851 | struct mwl8k_cmd_pkt header; | |
2852 | __u8 legacy_rates[14]; | |
2853 | ||
2854 | /* Bitmap for supported MCS codes. */ | |
2855 | __u8 mcs_set[16]; | |
2856 | __u8 reserved[16]; | |
ba2d3587 | 2857 | } __packed; |
32060e1b | 2858 | |
55489b6e | 2859 | static int |
c6e96010 | 2860 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 2861 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 2862 | { |
55489b6e | 2863 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
2864 | int rc; |
2865 | ||
2866 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2867 | if (cmd == NULL) | |
2868 | return -ENOMEM; | |
2869 | ||
55489b6e | 2870 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 2871 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 2872 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 2873 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
2874 | |
2875 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2876 | kfree(cmd); | |
2877 | ||
2878 | return rc; | |
2879 | } | |
2880 | ||
a66098da | 2881 | /* |
55489b6e | 2882 | * CMD_FINALIZE_JOIN. |
a66098da | 2883 | */ |
55489b6e LB |
2884 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
2885 | ||
2886 | struct mwl8k_cmd_finalize_join { | |
a66098da | 2887 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
2888 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
2889 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 2890 | } __packed; |
a66098da | 2891 | |
55489b6e LB |
2892 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
2893 | int framelen, int dtim) | |
a66098da | 2894 | { |
55489b6e LB |
2895 | struct mwl8k_cmd_finalize_join *cmd; |
2896 | struct ieee80211_mgmt *payload = frame; | |
2897 | int payload_len; | |
a66098da LB |
2898 | int rc; |
2899 | ||
2900 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2901 | if (cmd == NULL) | |
2902 | return -ENOMEM; | |
2903 | ||
55489b6e | 2904 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 2905 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2906 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
2907 | ||
2908 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
2909 | if (payload_len < 0) | |
2910 | payload_len = 0; | |
2911 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
2912 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
2913 | ||
2914 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
2915 | |
2916 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2917 | kfree(cmd); | |
2918 | ||
2919 | return rc; | |
2920 | } | |
2921 | ||
2922 | /* | |
55489b6e | 2923 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 2924 | */ |
55489b6e | 2925 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
2926 | struct mwl8k_cmd_pkt header; |
2927 | __le16 action; | |
55489b6e | 2928 | __le16 threshold; |
ba2d3587 | 2929 | } __packed; |
a66098da | 2930 | |
c2c2b12a LB |
2931 | static int |
2932 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 2933 | { |
55489b6e | 2934 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
2935 | int rc; |
2936 | ||
2937 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2938 | if (cmd == NULL) | |
2939 | return -ENOMEM; | |
2940 | ||
55489b6e | 2941 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 2942 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
2943 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2944 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
2945 | |
2946 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2947 | kfree(cmd); | |
2948 | ||
a66098da LB |
2949 | return rc; |
2950 | } | |
2951 | ||
2952 | /* | |
55489b6e | 2953 | * CMD_SET_SLOT. |
a66098da | 2954 | */ |
55489b6e | 2955 | struct mwl8k_cmd_set_slot { |
a66098da LB |
2956 | struct mwl8k_cmd_pkt header; |
2957 | __le16 action; | |
55489b6e | 2958 | __u8 short_slot; |
ba2d3587 | 2959 | } __packed; |
a66098da | 2960 | |
55489b6e | 2961 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 2962 | { |
55489b6e | 2963 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
2964 | int rc; |
2965 | ||
2966 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2967 | if (cmd == NULL) | |
2968 | return -ENOMEM; | |
2969 | ||
55489b6e | 2970 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 2971 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
2972 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
2973 | cmd->short_slot = short_slot_time; | |
a66098da LB |
2974 | |
2975 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2976 | kfree(cmd); | |
2977 | ||
2978 | return rc; | |
2979 | } | |
2980 | ||
2981 | /* | |
2982 | * CMD_SET_EDCA_PARAMS. | |
2983 | */ | |
2984 | struct mwl8k_cmd_set_edca_params { | |
2985 | struct mwl8k_cmd_pkt header; | |
2986 | ||
2987 | /* See MWL8K_SET_EDCA_XXX below */ | |
2988 | __le16 action; | |
2989 | ||
2990 | /* TX opportunity in units of 32 us */ | |
2991 | __le16 txop; | |
2992 | ||
2e484c89 LB |
2993 | union { |
2994 | struct { | |
2995 | /* Log exponent of max contention period: 0...15 */ | |
2996 | __le32 log_cw_max; | |
2997 | ||
2998 | /* Log exponent of min contention period: 0...15 */ | |
2999 | __le32 log_cw_min; | |
3000 | ||
3001 | /* Adaptive interframe spacing in units of 32us */ | |
3002 | __u8 aifs; | |
3003 | ||
3004 | /* TX queue to configure */ | |
3005 | __u8 txq; | |
3006 | } ap; | |
3007 | struct { | |
3008 | /* Log exponent of max contention period: 0...15 */ | |
3009 | __u8 log_cw_max; | |
a66098da | 3010 | |
2e484c89 LB |
3011 | /* Log exponent of min contention period: 0...15 */ |
3012 | __u8 log_cw_min; | |
a66098da | 3013 | |
2e484c89 LB |
3014 | /* Adaptive interframe spacing in units of 32us */ |
3015 | __u8 aifs; | |
a66098da | 3016 | |
2e484c89 LB |
3017 | /* TX queue to configure */ |
3018 | __u8 txq; | |
3019 | } sta; | |
3020 | }; | |
ba2d3587 | 3021 | } __packed; |
a66098da | 3022 | |
a66098da LB |
3023 | #define MWL8K_SET_EDCA_CW 0x01 |
3024 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
3025 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
3026 | ||
3027 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
3028 | MWL8K_SET_EDCA_TXOP | \ | |
3029 | MWL8K_SET_EDCA_AIFS) | |
3030 | ||
3031 | static int | |
55489b6e LB |
3032 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
3033 | __u16 cw_min, __u16 cw_max, | |
3034 | __u8 aifs, __u16 txop) | |
a66098da | 3035 | { |
2e484c89 | 3036 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 3037 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
3038 | int rc; |
3039 | ||
3040 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3041 | if (cmd == NULL) | |
3042 | return -ENOMEM; | |
3043 | ||
a66098da LB |
3044 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
3045 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
3046 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
3047 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
3048 | if (priv->ap_fw) { |
3049 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
3050 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
3051 | cmd->ap.aifs = aifs; | |
3052 | cmd->ap.txq = qnum; | |
3053 | } else { | |
3054 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
3055 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
3056 | cmd->sta.aifs = aifs; | |
3057 | cmd->sta.txq = qnum; | |
3058 | } | |
a66098da LB |
3059 | |
3060 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3061 | kfree(cmd); | |
3062 | ||
3063 | return rc; | |
3064 | } | |
3065 | ||
3066 | /* | |
55489b6e | 3067 | * CMD_SET_WMM_MODE. |
a66098da | 3068 | */ |
55489b6e | 3069 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 3070 | struct mwl8k_cmd_pkt header; |
55489b6e | 3071 | __le16 action; |
ba2d3587 | 3072 | } __packed; |
a66098da | 3073 | |
55489b6e | 3074 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 3075 | { |
55489b6e LB |
3076 | struct mwl8k_priv *priv = hw->priv; |
3077 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
3078 | int rc; |
3079 | ||
a66098da LB |
3080 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3081 | if (cmd == NULL) | |
3082 | return -ENOMEM; | |
3083 | ||
55489b6e | 3084 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 3085 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 3086 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
3087 | |
3088 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3089 | kfree(cmd); | |
16cec43d | 3090 | |
55489b6e LB |
3091 | if (!rc) |
3092 | priv->wmm_enabled = enable; | |
a66098da LB |
3093 | |
3094 | return rc; | |
3095 | } | |
3096 | ||
3097 | /* | |
55489b6e | 3098 | * CMD_MIMO_CONFIG. |
a66098da | 3099 | */ |
55489b6e LB |
3100 | struct mwl8k_cmd_mimo_config { |
3101 | struct mwl8k_cmd_pkt header; | |
3102 | __le32 action; | |
3103 | __u8 rx_antenna_map; | |
3104 | __u8 tx_antenna_map; | |
ba2d3587 | 3105 | } __packed; |
a66098da | 3106 | |
55489b6e | 3107 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 3108 | { |
55489b6e | 3109 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
3110 | int rc; |
3111 | ||
3112 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3113 | if (cmd == NULL) | |
3114 | return -ENOMEM; | |
3115 | ||
55489b6e | 3116 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 3117 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3118 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
3119 | cmd->rx_antenna_map = rx; | |
3120 | cmd->tx_antenna_map = tx; | |
a66098da LB |
3121 | |
3122 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3123 | kfree(cmd); | |
3124 | ||
3125 | return rc; | |
3126 | } | |
3127 | ||
3128 | /* | |
b71ed2c6 | 3129 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 3130 | */ |
b71ed2c6 LB |
3131 | struct mwl8k_cmd_use_fixed_rate_sta { |
3132 | struct mwl8k_cmd_pkt header; | |
3133 | __le32 action; | |
3134 | __le32 allow_rate_drop; | |
3135 | __le32 num_rates; | |
3136 | struct { | |
3137 | __le32 is_ht_rate; | |
3138 | __le32 enable_retry; | |
3139 | __le32 rate; | |
3140 | __le32 retry_count; | |
3141 | } rate_entry[8]; | |
3142 | __le32 rate_type; | |
3143 | __le32 reserved1; | |
3144 | __le32 reserved2; | |
ba2d3587 | 3145 | } __packed; |
a66098da | 3146 | |
b71ed2c6 LB |
3147 | #define MWL8K_USE_AUTO_RATE 0x0002 |
3148 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 3149 | |
b71ed2c6 | 3150 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 3151 | { |
b71ed2c6 | 3152 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
3153 | int rc; |
3154 | ||
3155 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3156 | if (cmd == NULL) | |
3157 | return -ENOMEM; | |
3158 | ||
3159 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3160 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
3161 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
3162 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
3163 | |
3164 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3165 | kfree(cmd); | |
3166 | ||
3167 | return rc; | |
3168 | } | |
3169 | ||
088aab8b LB |
3170 | /* |
3171 | * CMD_USE_FIXED_RATE (AP version). | |
3172 | */ | |
3173 | struct mwl8k_cmd_use_fixed_rate_ap { | |
3174 | struct mwl8k_cmd_pkt header; | |
3175 | __le32 action; | |
3176 | __le32 allow_rate_drop; | |
3177 | __le32 num_rates; | |
3178 | struct mwl8k_rate_entry_ap { | |
3179 | __le32 is_ht_rate; | |
3180 | __le32 enable_retry; | |
3181 | __le32 rate; | |
3182 | __le32 retry_count; | |
3183 | } rate_entry[4]; | |
3184 | u8 multicast_rate; | |
3185 | u8 multicast_rate_type; | |
3186 | u8 management_rate; | |
ba2d3587 | 3187 | } __packed; |
088aab8b LB |
3188 | |
3189 | static int | |
3190 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
3191 | { | |
3192 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
3193 | int rc; | |
3194 | ||
3195 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3196 | if (cmd == NULL) | |
3197 | return -ENOMEM; | |
3198 | ||
3199 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3200 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3201 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
3202 | cmd->multicast_rate = mcast; | |
3203 | cmd->management_rate = mgmt; | |
3204 | ||
3205 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3206 | kfree(cmd); | |
3207 | ||
3208 | return rc; | |
3209 | } | |
3210 | ||
55489b6e LB |
3211 | /* |
3212 | * CMD_ENABLE_SNIFFER. | |
3213 | */ | |
3214 | struct mwl8k_cmd_enable_sniffer { | |
3215 | struct mwl8k_cmd_pkt header; | |
3216 | __le32 action; | |
ba2d3587 | 3217 | } __packed; |
55489b6e LB |
3218 | |
3219 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3220 | { | |
3221 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3222 | int rc; | |
3223 | ||
3224 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3225 | if (cmd == NULL) | |
3226 | return -ENOMEM; | |
3227 | ||
3228 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3229 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3230 | cmd->action = cpu_to_le32(!!enable); | |
3231 | ||
3232 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3233 | kfree(cmd); | |
3234 | ||
3235 | return rc; | |
3236 | } | |
3237 | ||
3238 | /* | |
3239 | * CMD_SET_MAC_ADDR. | |
3240 | */ | |
3241 | struct mwl8k_cmd_set_mac_addr { | |
3242 | struct mwl8k_cmd_pkt header; | |
3243 | union { | |
3244 | struct { | |
3245 | __le16 mac_type; | |
3246 | __u8 mac_addr[ETH_ALEN]; | |
3247 | } mbss; | |
3248 | __u8 mac_addr[ETH_ALEN]; | |
3249 | }; | |
ba2d3587 | 3250 | } __packed; |
55489b6e | 3251 | |
ee0ddf18 LB |
3252 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3253 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3254 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3255 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3256 | |
aa21d0f6 LB |
3257 | static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, |
3258 | struct ieee80211_vif *vif, u8 *mac) | |
55489b6e LB |
3259 | { |
3260 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3261 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
55489b6e | 3262 | struct mwl8k_cmd_set_mac_addr *cmd; |
ee0ddf18 | 3263 | int mac_type; |
55489b6e LB |
3264 | int rc; |
3265 | ||
ee0ddf18 LB |
3266 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3267 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3268 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
3269 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
3270 | else | |
3271 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3272 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3273 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3274 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3275 | else | |
3276 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3277 | } | |
3278 | ||
55489b6e LB |
3279 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3280 | if (cmd == NULL) | |
3281 | return -ENOMEM; | |
3282 | ||
3283 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3284 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3285 | if (priv->ap_fw) { | |
ee0ddf18 | 3286 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3287 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3288 | } else { | |
3289 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3290 | } | |
3291 | ||
aa21d0f6 | 3292 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3293 | kfree(cmd); |
3294 | ||
3295 | return rc; | |
3296 | } | |
3297 | ||
3298 | /* | |
3299 | * CMD_SET_RATEADAPT_MODE. | |
3300 | */ | |
3301 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3302 | struct mwl8k_cmd_pkt header; | |
3303 | __le16 action; | |
3304 | __le16 mode; | |
ba2d3587 | 3305 | } __packed; |
55489b6e LB |
3306 | |
3307 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3308 | { | |
3309 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3310 | int rc; | |
3311 | ||
3312 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3313 | if (cmd == NULL) | |
3314 | return -ENOMEM; | |
3315 | ||
3316 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3317 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3318 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3319 | cmd->mode = cpu_to_le16(mode); | |
3320 | ||
3321 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3322 | kfree(cmd); | |
3323 | ||
3324 | return rc; | |
3325 | } | |
3326 | ||
3aefc37e NS |
3327 | /* |
3328 | * CMD_GET_WATCHDOG_BITMAP. | |
3329 | */ | |
3330 | struct mwl8k_cmd_get_watchdog_bitmap { | |
3331 | struct mwl8k_cmd_pkt header; | |
3332 | u8 bitmap; | |
3333 | } __packed; | |
3334 | ||
3335 | static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap) | |
3336 | { | |
3337 | struct mwl8k_cmd_get_watchdog_bitmap *cmd; | |
3338 | int rc; | |
3339 | ||
3340 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3341 | if (cmd == NULL) | |
3342 | return -ENOMEM; | |
3343 | ||
3344 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP); | |
3345 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3346 | ||
3347 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3348 | if (!rc) | |
3349 | *bitmap = cmd->bitmap; | |
3350 | ||
3351 | kfree(cmd); | |
3352 | ||
3353 | return rc; | |
3354 | } | |
3355 | ||
3356 | #define INVALID_BA 0xAA | |
3357 | static void mwl8k_watchdog_ba_events(struct work_struct *work) | |
3358 | { | |
3359 | int rc; | |
3360 | u8 bitmap = 0, stream_index; | |
3361 | struct mwl8k_ampdu_stream *streams; | |
3362 | struct mwl8k_priv *priv = | |
3363 | container_of(work, struct mwl8k_priv, watchdog_ba_handle); | |
3364 | ||
3365 | rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap); | |
3366 | if (rc) | |
3367 | return; | |
3368 | ||
3369 | if (bitmap == INVALID_BA) | |
3370 | return; | |
3371 | ||
3372 | /* the bitmap is the hw queue number. Map it to the ampdu queue. */ | |
3373 | stream_index = bitmap - MWL8K_TX_WMM_QUEUES; | |
3374 | ||
3375 | BUG_ON(stream_index >= priv->num_ampdu_queues); | |
3376 | ||
3377 | streams = &priv->ampdu[stream_index]; | |
3378 | ||
3379 | if (streams->state == AMPDU_STREAM_ACTIVE) | |
3380 | ieee80211_stop_tx_ba_session(streams->sta, streams->tid); | |
3381 | ||
3382 | return; | |
3383 | } | |
3384 | ||
3385 | ||
b64fe619 LB |
3386 | /* |
3387 | * CMD_BSS_START. | |
3388 | */ | |
3389 | struct mwl8k_cmd_bss_start { | |
3390 | struct mwl8k_cmd_pkt header; | |
3391 | __le32 enable; | |
ba2d3587 | 3392 | } __packed; |
b64fe619 | 3393 | |
aa21d0f6 LB |
3394 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3395 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3396 | { |
3397 | struct mwl8k_cmd_bss_start *cmd; | |
3398 | int rc; | |
3399 | ||
3400 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3401 | if (cmd == NULL) | |
3402 | return -ENOMEM; | |
3403 | ||
3404 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3405 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3406 | cmd->enable = cpu_to_le32(enable); | |
3407 | ||
aa21d0f6 | 3408 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3409 | kfree(cmd); |
3410 | ||
3411 | return rc; | |
3412 | } | |
3413 | ||
5faa1aff NS |
3414 | /* |
3415 | * CMD_BASTREAM. | |
3416 | */ | |
3417 | ||
3418 | /* | |
3419 | * UPSTREAM is tx direction | |
3420 | */ | |
3421 | #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 | |
3422 | #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 | |
3423 | ||
3424 | enum { | |
3425 | MWL8K_BA_CREATE, | |
3426 | MWL8K_BA_UPDATE, | |
3427 | MWL8K_BA_DESTROY, | |
3428 | MWL8K_BA_FLUSH, | |
3429 | MWL8K_BA_CHECK, | |
3430 | } ba_stream_action_type; | |
3431 | ||
3432 | ||
3433 | struct mwl8k_create_ba_stream { | |
3434 | __le32 flags; | |
3435 | __le32 idle_thrs; | |
3436 | __le32 bar_thrs; | |
3437 | __le32 window_size; | |
3438 | u8 peer_mac_addr[6]; | |
3439 | u8 dialog_token; | |
3440 | u8 tid; | |
3441 | u8 queue_id; | |
3442 | u8 param_info; | |
3443 | __le32 ba_context; | |
3444 | u8 reset_seq_no_flag; | |
3445 | __le16 curr_seq_no; | |
3446 | u8 sta_src_mac_addr[6]; | |
3447 | } __packed; | |
3448 | ||
3449 | struct mwl8k_destroy_ba_stream { | |
3450 | __le32 flags; | |
3451 | __le32 ba_context; | |
3452 | } __packed; | |
3453 | ||
3454 | struct mwl8k_cmd_bastream { | |
3455 | struct mwl8k_cmd_pkt header; | |
3456 | __le32 action; | |
3457 | union { | |
3458 | struct mwl8k_create_ba_stream create_params; | |
3459 | struct mwl8k_destroy_ba_stream destroy_params; | |
3460 | }; | |
3461 | } __packed; | |
3462 | ||
3463 | static int | |
3464 | mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
3465 | { | |
3466 | struct mwl8k_cmd_bastream *cmd; | |
3467 | int rc; | |
3468 | ||
3469 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3470 | if (cmd == NULL) | |
3471 | return -ENOMEM; | |
3472 | ||
3473 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3474 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3475 | ||
3476 | cmd->action = cpu_to_le32(MWL8K_BA_CHECK); | |
3477 | ||
3478 | cmd->create_params.queue_id = stream->idx; | |
3479 | memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr, | |
3480 | ETH_ALEN); | |
3481 | cmd->create_params.tid = stream->tid; | |
3482 | ||
3483 | cmd->create_params.flags = | |
3484 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) | | |
3485 | cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3486 | ||
3487 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3488 | ||
3489 | kfree(cmd); | |
3490 | ||
3491 | return rc; | |
3492 | } | |
3493 | ||
3494 | static int | |
3495 | mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, | |
3496 | u8 buf_size) | |
3497 | { | |
3498 | struct mwl8k_cmd_bastream *cmd; | |
3499 | int rc; | |
3500 | ||
3501 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3502 | if (cmd == NULL) | |
3503 | return -ENOMEM; | |
3504 | ||
3505 | ||
3506 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3507 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3508 | ||
3509 | cmd->action = cpu_to_le32(MWL8K_BA_CREATE); | |
3510 | ||
3511 | cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size); | |
3512 | cmd->create_params.window_size = cpu_to_le32((u32)buf_size); | |
3513 | cmd->create_params.queue_id = stream->idx; | |
3514 | ||
3515 | memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN); | |
3516 | cmd->create_params.tid = stream->tid; | |
3517 | cmd->create_params.curr_seq_no = cpu_to_le16(0); | |
3518 | cmd->create_params.reset_seq_no_flag = 1; | |
3519 | ||
3520 | cmd->create_params.param_info = | |
3521 | (stream->sta->ht_cap.ampdu_factor & | |
3522 | IEEE80211_HT_AMPDU_PARM_FACTOR) | | |
3523 | ((stream->sta->ht_cap.ampdu_density << 2) & | |
3524 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
3525 | ||
3526 | cmd->create_params.flags = | |
3527 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE | | |
3528 | BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3529 | ||
3530 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3531 | ||
3532 | wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n", | |
3533 | stream->sta->addr, stream->tid); | |
3534 | kfree(cmd); | |
3535 | ||
3536 | return rc; | |
3537 | } | |
3538 | ||
3539 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
3540 | struct mwl8k_ampdu_stream *stream) | |
3541 | { | |
3542 | struct mwl8k_cmd_bastream *cmd; | |
3543 | ||
3544 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3545 | if (cmd == NULL) | |
3546 | return; | |
3547 | ||
3548 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3549 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3550 | cmd->action = cpu_to_le32(MWL8K_BA_DESTROY); | |
3551 | ||
3552 | cmd->destroy_params.ba_context = cpu_to_le32(stream->idx); | |
3553 | mwl8k_post_cmd(hw, &cmd->header); | |
3554 | ||
3555 | wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx); | |
3556 | ||
3557 | kfree(cmd); | |
3558 | } | |
3559 | ||
3f5610ff LB |
3560 | /* |
3561 | * CMD_SET_NEW_STN. | |
3562 | */ | |
3563 | struct mwl8k_cmd_set_new_stn { | |
3564 | struct mwl8k_cmd_pkt header; | |
3565 | __le16 aid; | |
3566 | __u8 mac_addr[6]; | |
3567 | __le16 stn_id; | |
3568 | __le16 action; | |
3569 | __le16 rsvd; | |
3570 | __le32 legacy_rates; | |
3571 | __u8 ht_rates[4]; | |
3572 | __le16 cap_info; | |
3573 | __le16 ht_capabilities_info; | |
3574 | __u8 mac_ht_param_info; | |
3575 | __u8 rev; | |
3576 | __u8 control_channel; | |
3577 | __u8 add_channel; | |
3578 | __le16 op_mode; | |
3579 | __le16 stbc; | |
3580 | __u8 add_qos_info; | |
3581 | __u8 is_qos_sta; | |
3582 | __le32 fw_sta_ptr; | |
ba2d3587 | 3583 | } __packed; |
3f5610ff LB |
3584 | |
3585 | #define MWL8K_STA_ACTION_ADD 0 | |
3586 | #define MWL8K_STA_ACTION_REMOVE 2 | |
3587 | ||
3588 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
3589 | struct ieee80211_vif *vif, | |
3590 | struct ieee80211_sta *sta) | |
3591 | { | |
3592 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 3593 | u32 rates; |
3f5610ff LB |
3594 | int rc; |
3595 | ||
3596 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3597 | if (cmd == NULL) | |
3598 | return -ENOMEM; | |
3599 | ||
3600 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3601 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3602 | cmd->aid = cpu_to_le16(sta->aid); | |
3603 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
3604 | cmd->stn_id = cpu_to_le16(sta->aid); | |
3605 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
8707d026 LB |
3606 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3607 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3608 | else | |
3609 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3610 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
3611 | if (sta->ht_cap.ht_supported) { |
3612 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
3613 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
3614 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
3615 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
3616 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
3617 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
3618 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
3619 | cmd->is_qos_sta = 1; | |
3620 | } | |
3621 | ||
aa21d0f6 | 3622 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3623 | kfree(cmd); |
3624 | ||
3625 | return rc; | |
3626 | } | |
3627 | ||
b64fe619 LB |
3628 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
3629 | struct ieee80211_vif *vif) | |
3630 | { | |
3631 | struct mwl8k_cmd_set_new_stn *cmd; | |
3632 | int rc; | |
3633 | ||
3634 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3635 | if (cmd == NULL) | |
3636 | return -ENOMEM; | |
3637 | ||
3638 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3639 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3640 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
3641 | ||
aa21d0f6 | 3642 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3643 | kfree(cmd); |
3644 | ||
3645 | return rc; | |
3646 | } | |
3647 | ||
3f5610ff LB |
3648 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
3649 | struct ieee80211_vif *vif, u8 *addr) | |
3650 | { | |
3651 | struct mwl8k_cmd_set_new_stn *cmd; | |
3652 | int rc; | |
3653 | ||
3654 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3655 | if (cmd == NULL) | |
3656 | return -ENOMEM; | |
3657 | ||
3658 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3659 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3660 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3661 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
3662 | ||
aa21d0f6 | 3663 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3664 | kfree(cmd); |
3665 | ||
3666 | return rc; | |
3667 | } | |
3668 | ||
fcdc403c NS |
3669 | /* |
3670 | * CMD_UPDATE_ENCRYPTION. | |
3671 | */ | |
3672 | ||
3673 | #define MAX_ENCR_KEY_LENGTH 16 | |
3674 | #define MIC_KEY_LENGTH 8 | |
3675 | ||
3676 | struct mwl8k_cmd_update_encryption { | |
3677 | struct mwl8k_cmd_pkt header; | |
3678 | ||
3679 | __le32 action; | |
3680 | __le32 reserved; | |
3681 | __u8 mac_addr[6]; | |
3682 | __u8 encr_type; | |
3683 | ||
3684 | } __attribute__((packed)); | |
3685 | ||
3686 | struct mwl8k_cmd_set_key { | |
3687 | struct mwl8k_cmd_pkt header; | |
3688 | ||
3689 | __le32 action; | |
3690 | __le32 reserved; | |
3691 | __le16 length; | |
3692 | __le16 key_type_id; | |
3693 | __le32 key_info; | |
3694 | __le32 key_id; | |
3695 | __le16 key_len; | |
3696 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
3697 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
3698 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
3699 | __le16 tkip_rsc_low; | |
3700 | __le32 tkip_rsc_high; | |
3701 | __le16 tkip_tsc_low; | |
3702 | __le32 tkip_tsc_high; | |
3703 | __u8 mac_addr[6]; | |
3704 | } __attribute__((packed)); | |
3705 | ||
3706 | enum { | |
3707 | MWL8K_ENCR_ENABLE, | |
3708 | MWL8K_ENCR_SET_KEY, | |
3709 | MWL8K_ENCR_REMOVE_KEY, | |
3710 | MWL8K_ENCR_SET_GROUP_KEY, | |
3711 | }; | |
3712 | ||
3713 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
3714 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
3715 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
3716 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
3717 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
3718 | ||
3719 | enum { | |
3720 | MWL8K_ALG_WEP, | |
3721 | MWL8K_ALG_TKIP, | |
3722 | MWL8K_ALG_CCMP, | |
3723 | }; | |
3724 | ||
3725 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
3726 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
3727 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
3728 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
3729 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
3730 | ||
3731 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
3732 | struct ieee80211_vif *vif, | |
3733 | u8 *addr, | |
3734 | u8 encr_type) | |
3735 | { | |
3736 | struct mwl8k_cmd_update_encryption *cmd; | |
3737 | int rc; | |
3738 | ||
3739 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3740 | if (cmd == NULL) | |
3741 | return -ENOMEM; | |
3742 | ||
3743 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3744 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3745 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
3746 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3747 | cmd->encr_type = encr_type; | |
3748 | ||
3749 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3750 | kfree(cmd); | |
3751 | ||
3752 | return rc; | |
3753 | } | |
3754 | ||
3755 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
3756 | u8 *addr, | |
3757 | struct ieee80211_key_conf *key) | |
3758 | { | |
3759 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
3760 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3761 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
3762 | offsetof(struct mwl8k_cmd_set_key, length)); | |
3763 | cmd->key_id = cpu_to_le32(key->keyidx); | |
3764 | cmd->key_len = cpu_to_le16(key->keylen); | |
3765 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
3766 | ||
3767 | switch (key->cipher) { | |
3768 | case WLAN_CIPHER_SUITE_WEP40: | |
3769 | case WLAN_CIPHER_SUITE_WEP104: | |
3770 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
3771 | if (key->keyidx == 0) | |
3772 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
3773 | ||
3774 | break; | |
3775 | case WLAN_CIPHER_SUITE_TKIP: | |
3776 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
3777 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3778 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
3779 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
3780 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
3781 | | MWL8K_KEY_FLAG_TSC_VALID); | |
3782 | break; | |
3783 | case WLAN_CIPHER_SUITE_CCMP: | |
3784 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
3785 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3786 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
3787 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
3788 | break; | |
3789 | default: | |
3790 | return -ENOTSUPP; | |
3791 | } | |
3792 | ||
3793 | return 0; | |
3794 | } | |
3795 | ||
3796 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
3797 | struct ieee80211_vif *vif, | |
3798 | u8 *addr, | |
3799 | struct ieee80211_key_conf *key) | |
3800 | { | |
3801 | struct mwl8k_cmd_set_key *cmd; | |
3802 | int rc; | |
3803 | int keymlen; | |
3804 | u32 action; | |
3805 | u8 idx; | |
3806 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3807 | ||
3808 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3809 | if (cmd == NULL) | |
3810 | return -ENOMEM; | |
3811 | ||
3812 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
3813 | if (rc < 0) | |
3814 | goto done; | |
3815 | ||
3816 | idx = key->keyidx; | |
3817 | ||
3818 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
3819 | action = MWL8K_ENCR_SET_KEY; | |
3820 | else | |
3821 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
3822 | ||
3823 | switch (key->cipher) { | |
3824 | case WLAN_CIPHER_SUITE_WEP40: | |
3825 | case WLAN_CIPHER_SUITE_WEP104: | |
3826 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
3827 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
3828 | sizeof(*key) + key->keylen); | |
3829 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
3830 | } | |
3831 | ||
3832 | keymlen = 0; | |
3833 | action = MWL8K_ENCR_SET_KEY; | |
3834 | break; | |
3835 | case WLAN_CIPHER_SUITE_TKIP: | |
3836 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
3837 | break; | |
3838 | case WLAN_CIPHER_SUITE_CCMP: | |
3839 | keymlen = key->keylen; | |
3840 | break; | |
3841 | default: | |
3842 | rc = -ENOTSUPP; | |
3843 | goto done; | |
3844 | } | |
3845 | ||
3846 | memcpy(cmd->key_material, key->key, keymlen); | |
3847 | cmd->action = cpu_to_le32(action); | |
3848 | ||
3849 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3850 | done: | |
3851 | kfree(cmd); | |
3852 | ||
3853 | return rc; | |
3854 | } | |
3855 | ||
3856 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
3857 | struct ieee80211_vif *vif, | |
3858 | u8 *addr, | |
3859 | struct ieee80211_key_conf *key) | |
3860 | { | |
3861 | struct mwl8k_cmd_set_key *cmd; | |
3862 | int rc; | |
3863 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3864 | ||
3865 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3866 | if (cmd == NULL) | |
3867 | return -ENOMEM; | |
3868 | ||
3869 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
3870 | if (rc < 0) | |
3871 | goto done; | |
3872 | ||
3873 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
3874 | WLAN_CIPHER_SUITE_WEP104) | |
3875 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; | |
3876 | ||
3877 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
3878 | ||
3879 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
3880 | done: | |
3881 | kfree(cmd); | |
3882 | ||
3883 | return rc; | |
3884 | } | |
3885 | ||
3886 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
3887 | enum set_key_cmd cmd_param, | |
3888 | struct ieee80211_vif *vif, | |
3889 | struct ieee80211_sta *sta, | |
3890 | struct ieee80211_key_conf *key) | |
3891 | { | |
3892 | int rc = 0; | |
3893 | u8 encr_type; | |
3894 | u8 *addr; | |
3895 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
3896 | ||
3897 | if (vif->type == NL80211_IFTYPE_STATION) | |
3898 | return -EOPNOTSUPP; | |
3899 | ||
3900 | if (sta == NULL) | |
3901 | addr = hw->wiphy->perm_addr; | |
3902 | else | |
3903 | addr = sta->addr; | |
3904 | ||
3905 | if (cmd_param == SET_KEY) { | |
3906 | key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | |
3907 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); | |
3908 | if (rc) | |
3909 | goto out; | |
3910 | ||
3911 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
3912 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
3913 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
3914 | else | |
3915 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
3916 | ||
3917 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
3918 | encr_type); | |
3919 | if (rc) | |
3920 | goto out; | |
3921 | ||
3922 | mwl8k_vif->is_hw_crypto_enabled = true; | |
3923 | ||
3924 | } else { | |
3925 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
3926 | ||
3927 | if (rc) | |
3928 | goto out; | |
3929 | ||
3930 | mwl8k_vif->is_hw_crypto_enabled = false; | |
3931 | ||
3932 | } | |
3933 | out: | |
3934 | return rc; | |
3935 | } | |
3936 | ||
55489b6e LB |
3937 | /* |
3938 | * CMD_UPDATE_STADB. | |
3939 | */ | |
25d81b1e LB |
3940 | struct ewc_ht_info { |
3941 | __le16 control1; | |
3942 | __le16 control2; | |
3943 | __le16 control3; | |
ba2d3587 | 3944 | } __packed; |
25d81b1e LB |
3945 | |
3946 | struct peer_capability_info { | |
3947 | /* Peer type - AP vs. STA. */ | |
3948 | __u8 peer_type; | |
3949 | ||
3950 | /* Basic 802.11 capabilities from assoc resp. */ | |
3951 | __le16 basic_caps; | |
3952 | ||
3953 | /* Set if peer supports 802.11n high throughput (HT). */ | |
3954 | __u8 ht_support; | |
3955 | ||
3956 | /* Valid if HT is supported. */ | |
3957 | __le16 ht_caps; | |
3958 | __u8 extended_ht_caps; | |
3959 | struct ewc_ht_info ewc_info; | |
3960 | ||
3961 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
3962 | __u8 legacy_rates[12]; | |
3963 | ||
3964 | /* HT rate table. Intersection of our rates and peer rates. */ | |
3965 | __u8 ht_rates[16]; | |
3966 | __u8 pad[16]; | |
3967 | ||
3968 | /* If set, interoperability mode, no proprietary extensions. */ | |
3969 | __u8 interop; | |
3970 | __u8 pad2; | |
3971 | __u8 station_id; | |
3972 | __le16 amsdu_enabled; | |
ba2d3587 | 3973 | } __packed; |
25d81b1e | 3974 | |
55489b6e LB |
3975 | struct mwl8k_cmd_update_stadb { |
3976 | struct mwl8k_cmd_pkt header; | |
3977 | ||
3978 | /* See STADB_ACTION_TYPE */ | |
3979 | __le32 action; | |
3980 | ||
3981 | /* Peer MAC address */ | |
3982 | __u8 peer_addr[ETH_ALEN]; | |
3983 | ||
3984 | __le32 reserved; | |
3985 | ||
3986 | /* Peer info - valid during add/update. */ | |
3987 | struct peer_capability_info peer_info; | |
ba2d3587 | 3988 | } __packed; |
55489b6e | 3989 | |
a680400e LB |
3990 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
3991 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
3992 | ||
3993 | /* Peer Entry flags - used to define the type of the peer node */ | |
3994 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
3995 | ||
3996 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 3997 | struct ieee80211_vif *vif, |
13935e2c | 3998 | struct ieee80211_sta *sta) |
55489b6e | 3999 | { |
55489b6e | 4000 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 4001 | struct peer_capability_info *p; |
8707d026 | 4002 | u32 rates; |
55489b6e LB |
4003 | int rc; |
4004 | ||
4005 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4006 | if (cmd == NULL) | |
4007 | return -ENOMEM; | |
4008 | ||
4009 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4010 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 4011 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 4012 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 4013 | |
a680400e LB |
4014 | p = &cmd->peer_info; |
4015 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
4016 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 4017 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 4018 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
4019 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
4020 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
8707d026 LB |
4021 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
4022 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
4023 | else | |
4024 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4025 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 4026 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
4027 | p->interop = 1; |
4028 | p->amsdu_enabled = 0; | |
4029 | ||
4030 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
4031 | kfree(cmd); | |
4032 | ||
4033 | return rc ? rc : p->station_id; | |
4034 | } | |
4035 | ||
4036 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
4037 | struct ieee80211_vif *vif, u8 *addr) | |
4038 | { | |
4039 | struct mwl8k_cmd_update_stadb *cmd; | |
4040 | int rc; | |
4041 | ||
4042 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4043 | if (cmd == NULL) | |
4044 | return -ENOMEM; | |
4045 | ||
4046 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4047 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4048 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 4049 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 4050 | |
a680400e | 4051 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
4052 | kfree(cmd); |
4053 | ||
4054 | return rc; | |
4055 | } | |
4056 | ||
a66098da LB |
4057 | |
4058 | /* | |
4059 | * Interrupt handling. | |
4060 | */ | |
4061 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
4062 | { | |
4063 | struct ieee80211_hw *hw = dev_id; | |
4064 | struct mwl8k_priv *priv = hw->priv; | |
4065 | u32 status; | |
4066 | ||
4067 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
4068 | if (!status) |
4069 | return IRQ_NONE; | |
4070 | ||
1e9f9de3 LB |
4071 | if (status & MWL8K_A2H_INT_TX_DONE) { |
4072 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
4073 | tasklet_schedule(&priv->poll_tx_task); | |
4074 | } | |
4075 | ||
a66098da | 4076 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
4077 | status &= ~MWL8K_A2H_INT_RX_READY; |
4078 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
4079 | } |
4080 | ||
3aefc37e NS |
4081 | if (status & MWL8K_A2H_INT_BA_WATCHDOG) { |
4082 | status &= ~MWL8K_A2H_INT_BA_WATCHDOG; | |
4083 | ieee80211_queue_work(hw, &priv->watchdog_ba_handle); | |
4084 | } | |
4085 | ||
67e2eb27 LB |
4086 | if (status) |
4087 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4088 | ||
a66098da | 4089 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 4090 | if (priv->hostcmd_wait != NULL) |
a66098da | 4091 | complete(priv->hostcmd_wait); |
a66098da LB |
4092 | } |
4093 | ||
4094 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 4095 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 4096 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 4097 | mwl8k_tx_start(priv); |
a66098da LB |
4098 | } |
4099 | ||
4100 | return IRQ_HANDLED; | |
4101 | } | |
4102 | ||
1e9f9de3 LB |
4103 | static void mwl8k_tx_poll(unsigned long data) |
4104 | { | |
4105 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4106 | struct mwl8k_priv *priv = hw->priv; | |
4107 | int limit; | |
4108 | int i; | |
4109 | ||
4110 | limit = 32; | |
4111 | ||
4112 | spin_lock_bh(&priv->tx_lock); | |
4113 | ||
e600707b | 4114 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
1e9f9de3 LB |
4115 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); |
4116 | ||
4117 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
4118 | complete(priv->tx_wait); | |
4119 | priv->tx_wait = NULL; | |
4120 | } | |
4121 | ||
4122 | spin_unlock_bh(&priv->tx_lock); | |
4123 | ||
4124 | if (limit) { | |
4125 | writel(~MWL8K_A2H_INT_TX_DONE, | |
4126 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4127 | } else { | |
4128 | tasklet_schedule(&priv->poll_tx_task); | |
4129 | } | |
4130 | } | |
4131 | ||
67e2eb27 LB |
4132 | static void mwl8k_rx_poll(unsigned long data) |
4133 | { | |
4134 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4135 | struct mwl8k_priv *priv = hw->priv; | |
4136 | int limit; | |
4137 | ||
4138 | limit = 32; | |
4139 | limit -= rxq_process(hw, 0, limit); | |
4140 | limit -= rxq_refill(hw, 0, limit); | |
4141 | ||
4142 | if (limit) { | |
4143 | writel(~MWL8K_A2H_INT_RX_READY, | |
4144 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4145 | } else { | |
4146 | tasklet_schedule(&priv->poll_rx_task); | |
4147 | } | |
4148 | } | |
4149 | ||
a66098da LB |
4150 | |
4151 | /* | |
4152 | * Core driver operations. | |
4153 | */ | |
7bb45683 | 4154 | static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
a66098da LB |
4155 | { |
4156 | struct mwl8k_priv *priv = hw->priv; | |
4157 | int index = skb_get_queue_mapping(skb); | |
a66098da | 4158 | |
9189c100 | 4159 | if (!priv->radio_on) { |
c96c31e4 JP |
4160 | wiphy_debug(hw->wiphy, |
4161 | "dropped TX frame since radio disabled\n"); | |
a66098da | 4162 | dev_kfree_skb(skb); |
7bb45683 | 4163 | return; |
a66098da LB |
4164 | } |
4165 | ||
7bb45683 | 4166 | mwl8k_txq_xmit(hw, index, skb); |
a66098da LB |
4167 | } |
4168 | ||
a66098da LB |
4169 | static int mwl8k_start(struct ieee80211_hw *hw) |
4170 | { | |
a66098da LB |
4171 | struct mwl8k_priv *priv = hw->priv; |
4172 | int rc; | |
4173 | ||
a0607fd3 | 4174 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4175 | IRQF_SHARED, MWL8K_NAME, hw); |
4176 | if (rc) { | |
5db55844 | 4177 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 4178 | return -EIO; |
a66098da LB |
4179 | } |
4180 | ||
67e2eb27 | 4181 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 4182 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 4183 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 4184 | |
a66098da | 4185 | /* Enable interrupts */ |
c23b5a69 | 4186 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da | 4187 | |
2ec610cb LB |
4188 | rc = mwl8k_fw_lock(hw); |
4189 | if (!rc) { | |
55489b6e | 4190 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 4191 | |
5e4cf166 LB |
4192 | if (!priv->ap_fw) { |
4193 | if (!rc) | |
55489b6e | 4194 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 4195 | |
5e4cf166 LB |
4196 | if (!rc) |
4197 | rc = mwl8k_cmd_set_pre_scan(hw); | |
4198 | ||
4199 | if (!rc) | |
4200 | rc = mwl8k_cmd_set_post_scan(hw, | |
4201 | "\x00\x00\x00\x00\x00\x00"); | |
4202 | } | |
2ec610cb LB |
4203 | |
4204 | if (!rc) | |
55489b6e | 4205 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 4206 | |
2ec610cb | 4207 | if (!rc) |
55489b6e | 4208 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 4209 | |
2ec610cb LB |
4210 | mwl8k_fw_unlock(hw); |
4211 | } | |
4212 | ||
4213 | if (rc) { | |
4214 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
4215 | free_irq(priv->pdev->irq, hw); | |
1e9f9de3 | 4216 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4217 | tasklet_disable(&priv->poll_rx_task); |
2ec610cb | 4218 | } |
a66098da LB |
4219 | |
4220 | return rc; | |
4221 | } | |
4222 | ||
a66098da LB |
4223 | static void mwl8k_stop(struct ieee80211_hw *hw) |
4224 | { | |
a66098da LB |
4225 | struct mwl8k_priv *priv = hw->priv; |
4226 | int i; | |
4227 | ||
55489b6e | 4228 | mwl8k_cmd_radio_disable(hw); |
a66098da LB |
4229 | |
4230 | ieee80211_stop_queues(hw); | |
4231 | ||
a66098da | 4232 | /* Disable interrupts */ |
a66098da | 4233 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
4234 | free_irq(priv->pdev->irq, hw); |
4235 | ||
4236 | /* Stop finalize join worker */ | |
4237 | cancel_work_sync(&priv->finalize_join_worker); | |
3aefc37e | 4238 | cancel_work_sync(&priv->watchdog_ba_handle); |
a66098da LB |
4239 | if (priv->beacon_skb != NULL) |
4240 | dev_kfree_skb(priv->beacon_skb); | |
4241 | ||
67e2eb27 | 4242 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 4243 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4244 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 4245 | |
a66098da | 4246 | /* Return all skbs to mac80211 */ |
e600707b | 4247 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 4248 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
4249 | } |
4250 | ||
0863ade8 BC |
4251 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
4252 | ||
a66098da | 4253 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 4254 | struct ieee80211_vif *vif) |
a66098da LB |
4255 | { |
4256 | struct mwl8k_priv *priv = hw->priv; | |
4257 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 4258 | u32 macids_supported; |
0863ade8 BC |
4259 | int macid, rc; |
4260 | struct mwl8k_device_info *di; | |
a66098da | 4261 | |
a43c49a8 LB |
4262 | /* |
4263 | * Reject interface creation if sniffer mode is active, as | |
4264 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 4265 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
4266 | */ |
4267 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
4268 | wiphy_info(hw->wiphy, |
4269 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
4270 | return -EINVAL; |
4271 | } | |
4272 | ||
0863ade8 | 4273 | di = priv->device_info; |
ee0ddf18 LB |
4274 | switch (vif->type) { |
4275 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
4276 | if (!priv->ap_fw && di->fw_image_ap) { |
4277 | /* we must load the ap fw to meet this request */ | |
4278 | if (!list_empty(&priv->vif_list)) | |
4279 | return -EBUSY; | |
4280 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4281 | if (rc) | |
4282 | return rc; | |
4283 | } | |
ee0ddf18 LB |
4284 | macids_supported = priv->ap_macids_supported; |
4285 | break; | |
4286 | case NL80211_IFTYPE_STATION: | |
0863ade8 BC |
4287 | if (priv->ap_fw && di->fw_image_sta) { |
4288 | /* we must load the sta fw to meet this request */ | |
4289 | if (!list_empty(&priv->vif_list)) | |
4290 | return -EBUSY; | |
4291 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4292 | if (rc) | |
4293 | return rc; | |
4294 | } | |
ee0ddf18 LB |
4295 | macids_supported = priv->sta_macids_supported; |
4296 | break; | |
4297 | default: | |
4298 | return -EINVAL; | |
4299 | } | |
4300 | ||
4301 | macid = ffs(macids_supported & ~priv->macids_used); | |
4302 | if (!macid--) | |
4303 | return -EBUSY; | |
4304 | ||
f5bb87cf | 4305 | /* Setup driver private area. */ |
1ed32e4f | 4306 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4307 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 4308 | mwl8k_vif->vif = vif; |
ee0ddf18 | 4309 | mwl8k_vif->macid = macid; |
a66098da | 4310 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
4311 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
4312 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 4313 | |
aa21d0f6 LB |
4314 | /* Set the mac address. */ |
4315 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
4316 | ||
4317 | if (priv->ap_fw) | |
4318 | mwl8k_cmd_set_new_stn_add_self(hw, vif); | |
4319 | ||
ee0ddf18 | 4320 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 4321 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
4322 | |
4323 | return 0; | |
4324 | } | |
4325 | ||
4326 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, | |
1ed32e4f | 4327 | struct ieee80211_vif *vif) |
a66098da LB |
4328 | { |
4329 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 4330 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4331 | |
b64fe619 LB |
4332 | if (priv->ap_fw) |
4333 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); | |
4334 | ||
aa21d0f6 | 4335 | mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 4336 | |
ee0ddf18 | 4337 | priv->macids_used &= ~(1 << mwl8k_vif->macid); |
f5bb87cf | 4338 | list_del(&mwl8k_vif->list); |
a66098da LB |
4339 | } |
4340 | ||
ee03a932 | 4341 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 4342 | { |
a66098da LB |
4343 | struct ieee80211_conf *conf = &hw->conf; |
4344 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 4345 | int rc; |
a66098da | 4346 | |
7595d67a | 4347 | if (conf->flags & IEEE80211_CONF_IDLE) { |
55489b6e | 4348 | mwl8k_cmd_radio_disable(hw); |
ee03a932 | 4349 | return 0; |
7595d67a LB |
4350 | } |
4351 | ||
ee03a932 LB |
4352 | rc = mwl8k_fw_lock(hw); |
4353 | if (rc) | |
4354 | return rc; | |
a66098da | 4355 | |
55489b6e | 4356 | rc = mwl8k_cmd_radio_enable(hw); |
ee03a932 LB |
4357 | if (rc) |
4358 | goto out; | |
a66098da | 4359 | |
610677d2 | 4360 | rc = mwl8k_cmd_set_rf_channel(hw, conf); |
ee03a932 LB |
4361 | if (rc) |
4362 | goto out; | |
4363 | ||
a66098da LB |
4364 | if (conf->power_level > 18) |
4365 | conf->power_level = 18; | |
a66098da | 4366 | |
08b06347 | 4367 | if (priv->ap_fw) { |
41fdf097 NS |
4368 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); |
4369 | if (rc) | |
4370 | goto out; | |
4371 | ||
da62b761 NS |
4372 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); |
4373 | if (rc) | |
4374 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
4375 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
4376 | if (rc) | |
4377 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
4378 | ||
08b06347 | 4379 | } else { |
41fdf097 NS |
4380 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
4381 | if (rc) | |
4382 | goto out; | |
08b06347 LB |
4383 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
4384 | } | |
a66098da | 4385 | |
ee03a932 LB |
4386 | out: |
4387 | mwl8k_fw_unlock(hw); | |
a66098da | 4388 | |
ee03a932 | 4389 | return rc; |
a66098da LB |
4390 | } |
4391 | ||
b64fe619 LB |
4392 | static void |
4393 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4394 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 4395 | { |
a66098da | 4396 | struct mwl8k_priv *priv = hw->priv; |
c3cbbe8a | 4397 | u32 ap_legacy_rates; |
13935e2c | 4398 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
4399 | int rc; |
4400 | ||
c3cbbe8a | 4401 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 4402 | return; |
a66098da | 4403 | |
c3cbbe8a LB |
4404 | /* |
4405 | * No need to capture a beacon if we're no longer associated. | |
4406 | */ | |
4407 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
4408 | priv->capture_beacon = false; | |
3a980d0a | 4409 | |
c3cbbe8a | 4410 | /* |
13935e2c | 4411 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 4412 | */ |
7dc6a7a7 | 4413 | if (vif->bss_conf.assoc) { |
c6e96010 | 4414 | struct ieee80211_sta *ap; |
c97470dd | 4415 | |
c6e96010 | 4416 | rcu_read_lock(); |
c6e96010 | 4417 | |
c3cbbe8a LB |
4418 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
4419 | if (ap == NULL) { | |
4420 | rcu_read_unlock(); | |
c6e96010 | 4421 | goto out; |
c3cbbe8a LB |
4422 | } |
4423 | ||
8707d026 LB |
4424 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) { |
4425 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; | |
4426 | } else { | |
4427 | ap_legacy_rates = | |
4428 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4429 | } | |
13935e2c | 4430 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
4431 | |
4432 | rcu_read_unlock(); | |
4433 | } | |
c6e96010 | 4434 | |
c3cbbe8a | 4435 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) { |
13935e2c | 4436 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
4437 | if (rc) |
4438 | goto out; | |
a66098da | 4439 | |
b71ed2c6 | 4440 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
4441 | if (rc) |
4442 | goto out; | |
c3cbbe8a | 4443 | } |
a66098da | 4444 | |
c3cbbe8a | 4445 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
4446 | rc = mwl8k_set_radio_preamble(hw, |
4447 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
4448 | if (rc) |
4449 | goto out; | |
c3cbbe8a | 4450 | } |
a66098da | 4451 | |
c3cbbe8a | 4452 | if (changed & BSS_CHANGED_ERP_SLOT) { |
7dc6a7a7 | 4453 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
4454 | if (rc) |
4455 | goto out; | |
c3cbbe8a | 4456 | } |
a66098da | 4457 | |
c97470dd LB |
4458 | if (vif->bss_conf.assoc && |
4459 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | | |
4460 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 4461 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
4462 | if (rc) |
4463 | goto out; | |
c3cbbe8a | 4464 | } |
a66098da | 4465 | |
c3cbbe8a LB |
4466 | if (vif->bss_conf.assoc && |
4467 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
4468 | /* |
4469 | * Finalize the join. Tell rx handler to process | |
4470 | * next beacon from our BSSID. | |
4471 | */ | |
0a11dfc3 | 4472 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 4473 | priv->capture_beacon = true; |
a66098da LB |
4474 | } |
4475 | ||
3a980d0a LB |
4476 | out: |
4477 | mwl8k_fw_unlock(hw); | |
a66098da LB |
4478 | } |
4479 | ||
b64fe619 LB |
4480 | static void |
4481 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4482 | struct ieee80211_bss_conf *info, u32 changed) | |
4483 | { | |
4484 | int rc; | |
4485 | ||
4486 | if (mwl8k_fw_lock(hw)) | |
4487 | return; | |
4488 | ||
4489 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
4490 | rc = mwl8k_set_radio_preamble(hw, | |
4491 | vif->bss_conf.use_short_preamble); | |
4492 | if (rc) | |
4493 | goto out; | |
4494 | } | |
4495 | ||
4496 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
4497 | int idx; | |
4498 | int rate; | |
4499 | ||
4500 | /* | |
4501 | * Use lowest supported basic rate for multicasts | |
4502 | * and management frames (such as probe responses -- | |
4503 | * beacons will always go out at 1 Mb/s). | |
4504 | */ | |
4505 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
4506 | if (idx) |
4507 | idx--; | |
4508 | ||
4509 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) | |
4510 | rate = mwl8k_rates_24[idx].hw_value; | |
4511 | else | |
4512 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
4513 | |
4514 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4515 | } | |
4516 | ||
4517 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
4518 | struct sk_buff *skb; | |
4519 | ||
4520 | skb = ieee80211_beacon_get(hw, vif); | |
4521 | if (skb != NULL) { | |
aa21d0f6 | 4522 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
4523 | kfree_skb(skb); |
4524 | } | |
4525 | } | |
4526 | ||
4527 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 4528 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
4529 | |
4530 | out: | |
4531 | mwl8k_fw_unlock(hw); | |
4532 | } | |
4533 | ||
4534 | static void | |
4535 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4536 | struct ieee80211_bss_conf *info, u32 changed) | |
4537 | { | |
4538 | struct mwl8k_priv *priv = hw->priv; | |
4539 | ||
4540 | if (!priv->ap_fw) | |
4541 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); | |
4542 | else | |
4543 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); | |
4544 | } | |
4545 | ||
e81cd2d6 | 4546 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 4547 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
4548 | { |
4549 | struct mwl8k_cmd_pkt *cmd; | |
4550 | ||
447ced07 LB |
4551 | /* |
4552 | * Synthesize and return a command packet that programs the | |
4553 | * hardware multicast address filter. At this point we don't | |
4554 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
4555 | * we'll end up throwing this packet away and creating a new | |
4556 | * one in mwl8k_configure_filter(). | |
4557 | */ | |
22bedad3 | 4558 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
4559 | |
4560 | return (unsigned long)cmd; | |
4561 | } | |
4562 | ||
a43c49a8 LB |
4563 | static int |
4564 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
4565 | unsigned int changed_flags, | |
4566 | unsigned int *total_flags) | |
4567 | { | |
4568 | struct mwl8k_priv *priv = hw->priv; | |
4569 | ||
4570 | /* | |
4571 | * Hardware sniffer mode is mutually exclusive with STA | |
4572 | * operation, so refuse to enable sniffer mode if a STA | |
4573 | * interface is active. | |
4574 | */ | |
f5bb87cf | 4575 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 4576 | if (net_ratelimit()) |
c96c31e4 JP |
4577 | wiphy_info(hw->wiphy, |
4578 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
4579 | return 0; |
4580 | } | |
4581 | ||
4582 | if (!priv->sniffer_enabled) { | |
55489b6e | 4583 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
4584 | return 0; |
4585 | priv->sniffer_enabled = true; | |
4586 | } | |
4587 | ||
4588 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
4589 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
4590 | FIF_OTHER_BSS; | |
4591 | ||
4592 | return 1; | |
4593 | } | |
4594 | ||
f5bb87cf LB |
4595 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
4596 | { | |
4597 | if (!list_empty(&priv->vif_list)) | |
4598 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
4599 | ||
4600 | return NULL; | |
4601 | } | |
4602 | ||
e6935ea1 LB |
4603 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
4604 | unsigned int changed_flags, | |
4605 | unsigned int *total_flags, | |
4606 | u64 multicast) | |
4607 | { | |
4608 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
4609 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
4610 | ||
c0adae2c LB |
4611 | /* |
4612 | * AP firmware doesn't allow fine-grained control over | |
4613 | * the receive filter. | |
4614 | */ | |
4615 | if (priv->ap_fw) { | |
4616 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
4617 | kfree(cmd); | |
4618 | return; | |
4619 | } | |
4620 | ||
a43c49a8 LB |
4621 | /* |
4622 | * Enable hardware sniffer mode if FIF_CONTROL or | |
4623 | * FIF_OTHER_BSS is requested. | |
4624 | */ | |
4625 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
4626 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
4627 | kfree(cmd); | |
4628 | return; | |
4629 | } | |
a66098da | 4630 | |
e6935ea1 | 4631 | /* Clear unsupported feature flags */ |
447ced07 | 4632 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 4633 | |
90852f7a LB |
4634 | if (mwl8k_fw_lock(hw)) { |
4635 | kfree(cmd); | |
e6935ea1 | 4636 | return; |
90852f7a | 4637 | } |
a66098da | 4638 | |
a43c49a8 | 4639 | if (priv->sniffer_enabled) { |
55489b6e | 4640 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
4641 | priv->sniffer_enabled = false; |
4642 | } | |
4643 | ||
e6935ea1 | 4644 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
4645 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
4646 | /* | |
4647 | * Disable the BSS filter. | |
4648 | */ | |
e6935ea1 | 4649 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 4650 | } else { |
f5bb87cf | 4651 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 4652 | const u8 *bssid; |
a94cc97e | 4653 | |
77165d88 LB |
4654 | /* |
4655 | * Enable the BSS filter. | |
4656 | * | |
4657 | * If there is an active STA interface, use that | |
4658 | * interface's BSSID, otherwise use a dummy one | |
4659 | * (where the OUI part needs to be nonzero for | |
4660 | * the BSSID to be accepted by POST_SCAN). | |
4661 | */ | |
f5bb87cf LB |
4662 | mwl8k_vif = mwl8k_first_vif(priv); |
4663 | if (mwl8k_vif != NULL) | |
4664 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
4665 | else | |
4666 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 4667 | |
e6935ea1 | 4668 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
4669 | } |
4670 | } | |
4671 | ||
447ced07 LB |
4672 | /* |
4673 | * If FIF_ALLMULTI is being requested, throw away the command | |
4674 | * packet that ->prepare_multicast() built and replace it with | |
4675 | * a command packet that enables reception of all multicast | |
4676 | * packets. | |
4677 | */ | |
4678 | if (*total_flags & FIF_ALLMULTI) { | |
4679 | kfree(cmd); | |
22bedad3 | 4680 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
4681 | } |
4682 | ||
4683 | if (cmd != NULL) { | |
4684 | mwl8k_post_cmd(hw, cmd); | |
4685 | kfree(cmd); | |
e6935ea1 | 4686 | } |
a66098da | 4687 | |
e6935ea1 | 4688 | mwl8k_fw_unlock(hw); |
a66098da LB |
4689 | } |
4690 | ||
a66098da LB |
4691 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
4692 | { | |
c2c2b12a | 4693 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
4694 | } |
4695 | ||
4a6967b8 JB |
4696 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
4697 | struct ieee80211_vif *vif, | |
4698 | struct ieee80211_sta *sta) | |
3f5610ff LB |
4699 | { |
4700 | struct mwl8k_priv *priv = hw->priv; | |
4701 | ||
4a6967b8 JB |
4702 | if (priv->ap_fw) |
4703 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
4704 | else | |
4705 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
4706 | } |
4707 | ||
4a6967b8 JB |
4708 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
4709 | struct ieee80211_vif *vif, | |
4710 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
4711 | { |
4712 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 4713 | int ret; |
fcdc403c NS |
4714 | int i; |
4715 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4716 | struct ieee80211_key_conf *key; | |
bbfd9128 | 4717 | |
4a6967b8 JB |
4718 | if (!priv->ap_fw) { |
4719 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
4720 | if (ret >= 0) { | |
4721 | MWL8K_STA(sta)->peer_id = ret; | |
fcdc403c | 4722 | ret = 0; |
4a6967b8 | 4723 | } |
bbfd9128 | 4724 | |
d9a07d49 NS |
4725 | } else { |
4726 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 4727 | } |
4a6967b8 | 4728 | |
d9a07d49 NS |
4729 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
4730 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
4731 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
4732 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
4733 | } | |
fcdc403c | 4734 | return ret; |
bbfd9128 LB |
4735 | } |
4736 | ||
a66098da LB |
4737 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue, |
4738 | const struct ieee80211_tx_queue_params *params) | |
4739 | { | |
3e4f542c | 4740 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 4741 | int rc; |
a66098da | 4742 | |
3e4f542c LB |
4743 | rc = mwl8k_fw_lock(hw); |
4744 | if (!rc) { | |
e600707b | 4745 | BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1); |
0863ade8 BC |
4746 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); |
4747 | ||
3e4f542c | 4748 | if (!priv->wmm_enabled) |
55489b6e | 4749 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 4750 | |
85c9205c | 4751 | if (!rc) { |
e600707b | 4752 | int q = MWL8K_TX_WMM_QUEUES - 1 - queue; |
85c9205c | 4753 | rc = mwl8k_cmd_set_edca_params(hw, q, |
55489b6e LB |
4754 | params->cw_min, |
4755 | params->cw_max, | |
4756 | params->aifs, | |
4757 | params->txop); | |
85c9205c | 4758 | } |
3e4f542c LB |
4759 | |
4760 | mwl8k_fw_unlock(hw); | |
a66098da | 4761 | } |
3e4f542c | 4762 | |
a66098da LB |
4763 | return rc; |
4764 | } | |
4765 | ||
a66098da LB |
4766 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
4767 | struct ieee80211_low_level_stats *stats) | |
4768 | { | |
55489b6e | 4769 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
4770 | } |
4771 | ||
0d462bbb JL |
4772 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
4773 | struct survey_info *survey) | |
4774 | { | |
4775 | struct mwl8k_priv *priv = hw->priv; | |
4776 | struct ieee80211_conf *conf = &hw->conf; | |
4777 | ||
4778 | if (idx != 0) | |
4779 | return -ENOENT; | |
4780 | ||
4781 | survey->channel = conf->channel; | |
4782 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
4783 | survey->noise = priv->noise; | |
4784 | ||
4785 | return 0; | |
4786 | } | |
4787 | ||
65f3ddcd NS |
4788 | #define MAX_AMPDU_ATTEMPTS 5 |
4789 | ||
a2292d83 LB |
4790 | static int |
4791 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4792 | enum ieee80211_ampdu_mlme_action action, | |
0b01f030 JB |
4793 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
4794 | u8 buf_size) | |
a2292d83 | 4795 | { |
65f3ddcd NS |
4796 | |
4797 | int i, rc = 0; | |
4798 | struct mwl8k_priv *priv = hw->priv; | |
4799 | struct mwl8k_ampdu_stream *stream; | |
4800 | u8 *addr = sta->addr; | |
4801 | ||
4802 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
4803 | return -ENOTSUPP; | |
4804 | ||
4805 | spin_lock(&priv->stream_lock); | |
4806 | stream = mwl8k_lookup_stream(hw, addr, tid); | |
4807 | ||
a2292d83 LB |
4808 | switch (action) { |
4809 | case IEEE80211_AMPDU_RX_START: | |
4810 | case IEEE80211_AMPDU_RX_STOP: | |
65f3ddcd NS |
4811 | break; |
4812 | case IEEE80211_AMPDU_TX_START: | |
4813 | /* By the time we get here the hw queues may contain outgoing | |
4814 | * packets for this RA/TID that are not part of this BA | |
4815 | * session. The hw will assign sequence numbers to these | |
4816 | * packets as they go out. So if we query the hw for its next | |
4817 | * sequence number and use that for the SSN here, it may end up | |
4818 | * being wrong, which will lead to sequence number mismatch at | |
4819 | * the recipient. To avoid this, we reset the sequence number | |
4820 | * to O for the first MPDU in this BA stream. | |
4821 | */ | |
4822 | *ssn = 0; | |
4823 | if (stream == NULL) { | |
4824 | /* This means that somebody outside this driver called | |
4825 | * ieee80211_start_tx_ba_session. This is unexpected | |
4826 | * because we do our own rate control. Just warn and | |
4827 | * move on. | |
4828 | */ | |
4829 | wiphy_warn(hw->wiphy, "Unexpected call to %s. " | |
4830 | "Proceeding anyway.\n", __func__); | |
4831 | stream = mwl8k_add_stream(hw, sta, tid); | |
4832 | } | |
4833 | if (stream == NULL) { | |
4834 | wiphy_debug(hw->wiphy, "no free AMPDU streams\n"); | |
4835 | rc = -EBUSY; | |
4836 | break; | |
4837 | } | |
4838 | stream->state = AMPDU_STREAM_IN_PROGRESS; | |
4839 | ||
4840 | /* Release the lock before we do the time consuming stuff */ | |
4841 | spin_unlock(&priv->stream_lock); | |
4842 | for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) { | |
4843 | rc = mwl8k_check_ba(hw, stream); | |
4844 | ||
4845 | if (!rc) | |
4846 | break; | |
4847 | /* | |
4848 | * HW queues take time to be flushed, give them | |
4849 | * sufficient time | |
4850 | */ | |
4851 | ||
4852 | msleep(1000); | |
4853 | } | |
4854 | spin_lock(&priv->stream_lock); | |
4855 | if (rc) { | |
4856 | wiphy_err(hw->wiphy, "Stream for tid %d busy after %d" | |
4857 | " attempts\n", tid, MAX_AMPDU_ATTEMPTS); | |
4858 | mwl8k_remove_stream(hw, stream); | |
4859 | rc = -EBUSY; | |
4860 | break; | |
4861 | } | |
4862 | ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid); | |
4863 | break; | |
4864 | case IEEE80211_AMPDU_TX_STOP: | |
4865 | if (stream == NULL) | |
4866 | break; | |
4867 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
4868 | spin_unlock(&priv->stream_lock); | |
4869 | mwl8k_destroy_ba(hw, stream); | |
4870 | spin_lock(&priv->stream_lock); | |
4871 | } | |
4872 | mwl8k_remove_stream(hw, stream); | |
4873 | ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid); | |
4874 | break; | |
4875 | case IEEE80211_AMPDU_TX_OPERATIONAL: | |
4876 | BUG_ON(stream == NULL); | |
4877 | BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS); | |
4878 | spin_unlock(&priv->stream_lock); | |
4879 | rc = mwl8k_create_ba(hw, stream, buf_size); | |
4880 | spin_lock(&priv->stream_lock); | |
4881 | if (!rc) | |
4882 | stream->state = AMPDU_STREAM_ACTIVE; | |
4883 | else { | |
4884 | spin_unlock(&priv->stream_lock); | |
4885 | mwl8k_destroy_ba(hw, stream); | |
4886 | spin_lock(&priv->stream_lock); | |
4887 | wiphy_debug(hw->wiphy, | |
4888 | "Failed adding stream for sta %pM tid %d\n", | |
4889 | addr, tid); | |
4890 | mwl8k_remove_stream(hw, stream); | |
4891 | } | |
4892 | break; | |
4893 | ||
a2292d83 | 4894 | default: |
65f3ddcd | 4895 | rc = -ENOTSUPP; |
a2292d83 | 4896 | } |
65f3ddcd NS |
4897 | |
4898 | spin_unlock(&priv->stream_lock); | |
4899 | return rc; | |
a2292d83 LB |
4900 | } |
4901 | ||
a66098da LB |
4902 | static const struct ieee80211_ops mwl8k_ops = { |
4903 | .tx = mwl8k_tx, | |
4904 | .start = mwl8k_start, | |
4905 | .stop = mwl8k_stop, | |
4906 | .add_interface = mwl8k_add_interface, | |
4907 | .remove_interface = mwl8k_remove_interface, | |
4908 | .config = mwl8k_config, | |
a66098da | 4909 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 4910 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 4911 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 4912 | .set_key = mwl8k_set_key, |
a66098da | 4913 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
4914 | .sta_add = mwl8k_sta_add, |
4915 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 4916 | .conf_tx = mwl8k_conf_tx, |
a66098da | 4917 | .get_stats = mwl8k_get_stats, |
0d462bbb | 4918 | .get_survey = mwl8k_get_survey, |
a2292d83 | 4919 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
4920 | }; |
4921 | ||
a66098da LB |
4922 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
4923 | { | |
4924 | struct mwl8k_priv *priv = | |
4925 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
4926 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
4927 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
4928 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
4929 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
4930 | mgmt->u.beacon.variable, len); | |
4931 | int dtim_period = 1; | |
4932 | ||
4933 | if (tim && tim[1] >= 2) | |
4934 | dtim_period = tim[3]; | |
a66098da | 4935 | |
56007a02 | 4936 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 4937 | |
f5bb87cf | 4938 | dev_kfree_skb(skb); |
a66098da LB |
4939 | priv->beacon_skb = NULL; |
4940 | } | |
4941 | ||
bcb628d5 | 4942 | enum { |
9e1b17ea LB |
4943 | MWL8363 = 0, |
4944 | MWL8687, | |
bcb628d5 | 4945 | MWL8366, |
6f6d1e9a LB |
4946 | }; |
4947 | ||
8a7a578c | 4948 | #define MWL8K_8366_AP_FW_API 2 |
952a0e96 BC |
4949 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" |
4950 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
4951 | ||
bcb628d5 | 4952 | static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = { |
9e1b17ea LB |
4953 | [MWL8363] = { |
4954 | .part_name = "88w8363", | |
4955 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 4956 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 4957 | }, |
49eb691c | 4958 | [MWL8687] = { |
bcb628d5 JL |
4959 | .part_name = "88w8687", |
4960 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 4961 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 4962 | }, |
49eb691c | 4963 | [MWL8366] = { |
bcb628d5 JL |
4964 | .part_name = "88w8366", |
4965 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 4966 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
4967 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
4968 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
89a91f4f | 4969 | .ap_rxd_ops = &rxd_8366_ap_ops, |
bcb628d5 | 4970 | }, |
45a390dd LB |
4971 | }; |
4972 | ||
c92d4ede LB |
4973 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
4974 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
4975 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
4976 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
4977 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
4978 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 4979 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 4980 | |
45a390dd | 4981 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
e5868ba1 | 4982 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
4983 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
4984 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
4985 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
4986 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
4987 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
ca66527c | 4988 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
bcb628d5 | 4989 | { }, |
45a390dd LB |
4990 | }; |
4991 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
4992 | ||
99020471 BC |
4993 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
4994 | { | |
4995 | int rc; | |
4996 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
4997 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
4998 | priv->fw_pref, priv->fw_alt); | |
4999 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
5000 | if (rc) { | |
5001 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5002 | pci_name(priv->pdev), priv->fw_alt); | |
5003 | return rc; | |
5004 | } | |
5005 | return 0; | |
5006 | } | |
5007 | ||
5008 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
5009 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
5010 | { | |
5011 | struct mwl8k_priv *priv = context; | |
5012 | struct mwl8k_device_info *di = priv->device_info; | |
5013 | int rc; | |
5014 | ||
5015 | switch (priv->fw_state) { | |
5016 | case FW_STATE_INIT: | |
5017 | if (!fw) { | |
5018 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
5019 | pci_name(priv->pdev), di->helper_image); | |
5020 | goto fail; | |
5021 | } | |
5022 | priv->fw_helper = fw; | |
5023 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
5024 | true); | |
5025 | if (rc && priv->fw_alt) { | |
5026 | rc = mwl8k_request_alt_fw(priv); | |
5027 | if (rc) | |
5028 | goto fail; | |
5029 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5030 | } else if (rc) | |
5031 | goto fail; | |
5032 | else | |
5033 | priv->fw_state = FW_STATE_LOADING_PREF; | |
5034 | break; | |
5035 | ||
5036 | case FW_STATE_LOADING_PREF: | |
5037 | if (!fw) { | |
5038 | if (priv->fw_alt) { | |
5039 | rc = mwl8k_request_alt_fw(priv); | |
5040 | if (rc) | |
5041 | goto fail; | |
5042 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5043 | } else | |
5044 | goto fail; | |
5045 | } else { | |
5046 | priv->fw_ucode = fw; | |
5047 | rc = mwl8k_firmware_load_success(priv); | |
5048 | if (rc) | |
5049 | goto fail; | |
5050 | else | |
5051 | complete(&priv->firmware_loading_complete); | |
5052 | } | |
5053 | break; | |
5054 | ||
5055 | case FW_STATE_LOADING_ALT: | |
5056 | if (!fw) { | |
5057 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5058 | pci_name(priv->pdev), di->helper_image); | |
5059 | goto fail; | |
5060 | } | |
5061 | priv->fw_ucode = fw; | |
5062 | rc = mwl8k_firmware_load_success(priv); | |
5063 | if (rc) | |
5064 | goto fail; | |
5065 | else | |
5066 | complete(&priv->firmware_loading_complete); | |
5067 | break; | |
5068 | ||
5069 | default: | |
5070 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
5071 | MWL8K_NAME, priv->fw_state); | |
5072 | BUG_ON(1); | |
5073 | } | |
5074 | ||
5075 | return; | |
5076 | ||
5077 | fail: | |
5078 | priv->fw_state = FW_STATE_ERROR; | |
5079 | complete(&priv->firmware_loading_complete); | |
5080 | device_release_driver(&priv->pdev->dev); | |
5081 | mwl8k_release_firmware(priv); | |
5082 | } | |
5083 | ||
5084 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, | |
5085 | bool nowait) | |
a66098da | 5086 | { |
3cc7772c | 5087 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5088 | int rc; |
be695fc4 LB |
5089 | |
5090 | /* Reset firmware and hardware */ | |
5091 | mwl8k_hw_reset(priv); | |
5092 | ||
5093 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 5094 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 5095 | if (rc) { |
5db55844 | 5096 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 5097 | return rc; |
be695fc4 LB |
5098 | } |
5099 | ||
99020471 BC |
5100 | if (nowait) |
5101 | return rc; | |
5102 | ||
be695fc4 LB |
5103 | /* Load firmware into hardware */ |
5104 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 5105 | if (rc) |
5db55844 | 5106 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
5107 | |
5108 | /* Reclaim memory once firmware is successfully loaded */ | |
5109 | mwl8k_release_firmware(priv); | |
5110 | ||
3cc7772c BC |
5111 | return rc; |
5112 | } | |
5113 | ||
73b46320 BC |
5114 | static int mwl8k_init_txqs(struct ieee80211_hw *hw) |
5115 | { | |
5116 | struct mwl8k_priv *priv = hw->priv; | |
5117 | int rc = 0; | |
5118 | int i; | |
5119 | ||
e600707b | 5120 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
73b46320 BC |
5121 | rc = mwl8k_txq_init(hw, i); |
5122 | if (rc) | |
5123 | break; | |
5124 | if (priv->ap_fw) | |
5125 | iowrite32(priv->txq[i].txd_dma, | |
5126 | priv->sram + priv->txq_offset[i]); | |
5127 | } | |
5128 | return rc; | |
5129 | } | |
5130 | ||
3cc7772c BC |
5131 | /* initialize hw after successfully loading a firmware image */ |
5132 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
5133 | { | |
5134 | struct mwl8k_priv *priv = hw->priv; | |
5135 | int rc = 0; | |
5136 | int i; | |
be695fc4 | 5137 | |
91942230 | 5138 | if (priv->ap_fw) { |
89a91f4f | 5139 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 5140 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
5141 | wiphy_err(hw->wiphy, |
5142 | "Driver does not have AP firmware image support for this hardware\n"); | |
91942230 LB |
5143 | goto err_stop_firmware; |
5144 | } | |
5145 | } else { | |
89a91f4f | 5146 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 5147 | } |
be695fc4 LB |
5148 | |
5149 | priv->sniffer_enabled = false; | |
5150 | priv->wmm_enabled = false; | |
5151 | priv->pending_tx_pkts = 0; | |
5152 | ||
a66098da LB |
5153 | rc = mwl8k_rxq_init(hw, 0); |
5154 | if (rc) | |
3cc7772c | 5155 | goto err_stop_firmware; |
a66098da LB |
5156 | rxq_refill(hw, 0, INT_MAX); |
5157 | ||
73b46320 BC |
5158 | /* For the sta firmware, we need to know the dma addresses of tx queues |
5159 | * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them | |
5160 | * prior to issuing this command. But for the AP case, we learn the | |
5161 | * total number of queues from the result CMD_GET_HW_SPEC, so for this | |
5162 | * case we must initialize the tx queues after. | |
5163 | */ | |
8a7a578c | 5164 | priv->num_ampdu_queues = 0; |
73b46320 BC |
5165 | if (!priv->ap_fw) { |
5166 | rc = mwl8k_init_txqs(hw); | |
a66098da LB |
5167 | if (rc) |
5168 | goto err_free_queues; | |
5169 | } | |
5170 | ||
5171 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 5172 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3aefc37e NS |
5173 | iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY| |
5174 | MWL8K_A2H_INT_BA_WATCHDOG, | |
1e9f9de3 | 5175 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
a66098da LB |
5176 | iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
5177 | ||
a0607fd3 | 5178 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
5179 | IRQF_SHARED, MWL8K_NAME, hw); |
5180 | if (rc) { | |
5db55844 | 5181 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
5182 | goto err_free_queues; |
5183 | } | |
5184 | ||
ac109fd0 BC |
5185 | memset(priv->ampdu, 0, sizeof(priv->ampdu)); |
5186 | ||
a66098da LB |
5187 | /* |
5188 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 5189 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
5190 | * interrupts when done. |
5191 | */ | |
c23b5a69 | 5192 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5193 | |
5194 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
5195 | if (priv->ap_fw) { |
5196 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
73b46320 BC |
5197 | if (!rc) |
5198 | rc = mwl8k_init_txqs(hw); | |
42fba21d LB |
5199 | if (!rc) |
5200 | rc = mwl8k_cmd_set_hw_spec(hw); | |
5201 | } else { | |
5202 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
5203 | } | |
a66098da | 5204 | if (rc) { |
5db55844 | 5205 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 5206 | goto err_free_irq; |
a66098da LB |
5207 | } |
5208 | ||
5209 | /* Turn radio off */ | |
55489b6e | 5210 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 5211 | if (rc) { |
5db55844 | 5212 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 5213 | goto err_free_irq; |
a66098da LB |
5214 | } |
5215 | ||
32060e1b | 5216 | /* Clear MAC address */ |
aa21d0f6 | 5217 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 5218 | if (rc) { |
5db55844 | 5219 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 5220 | goto err_free_irq; |
32060e1b LB |
5221 | } |
5222 | ||
a66098da | 5223 | /* Disable interrupts */ |
a66098da | 5224 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5225 | free_irq(priv->pdev->irq, hw); |
5226 | ||
c96c31e4 JP |
5227 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
5228 | priv->device_info->part_name, | |
5229 | priv->hw_rev, hw->wiphy->perm_addr, | |
5230 | priv->ap_fw ? "AP" : "STA", | |
5231 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
5232 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
5233 | |
5234 | return 0; | |
5235 | ||
a66098da | 5236 | err_free_irq: |
a66098da | 5237 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5238 | free_irq(priv->pdev->irq, hw); |
5239 | ||
5240 | err_free_queues: | |
e600707b | 5241 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5242 | mwl8k_txq_deinit(hw, i); |
5243 | mwl8k_rxq_deinit(hw, 0); | |
5244 | ||
3cc7772c BC |
5245 | err_stop_firmware: |
5246 | mwl8k_hw_reset(priv); | |
5247 | ||
5248 | return rc; | |
5249 | } | |
5250 | ||
5251 | /* | |
5252 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
5253 | * has already been registered | |
5254 | */ | |
5255 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
5256 | { | |
5257 | int i, rc = 0; | |
5258 | struct mwl8k_priv *priv = hw->priv; | |
5259 | ||
5260 | mwl8k_stop(hw); | |
5261 | mwl8k_rxq_deinit(hw, 0); | |
5262 | ||
e600707b | 5263 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5264 | mwl8k_txq_deinit(hw, i); |
5265 | ||
99020471 | 5266 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
5267 | if (rc) |
5268 | goto fail; | |
5269 | ||
5270 | rc = mwl8k_probe_hw(hw); | |
5271 | if (rc) | |
5272 | goto fail; | |
5273 | ||
5274 | rc = mwl8k_start(hw); | |
5275 | if (rc) | |
5276 | goto fail; | |
5277 | ||
5278 | rc = mwl8k_config(hw, ~0); | |
5279 | if (rc) | |
5280 | goto fail; | |
5281 | ||
e600707b | 5282 | for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) { |
3cc7772c BC |
5283 | rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]); |
5284 | if (rc) | |
5285 | goto fail; | |
5286 | } | |
5287 | ||
5288 | return rc; | |
5289 | ||
5290 | fail: | |
5291 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
5292 | return rc; | |
5293 | } | |
5294 | ||
5295 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) | |
5296 | { | |
5297 | struct ieee80211_hw *hw = priv->hw; | |
5298 | int i, rc; | |
5299 | ||
99020471 BC |
5300 | rc = mwl8k_load_firmware(hw); |
5301 | mwl8k_release_firmware(priv); | |
5302 | if (rc) { | |
5303 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
5304 | return rc; | |
5305 | } | |
5306 | ||
3cc7772c BC |
5307 | /* |
5308 | * Extra headroom is the size of the required DMA header | |
5309 | * minus the size of the smallest 802.11 frame (CTS frame). | |
5310 | */ | |
5311 | hw->extra_tx_headroom = | |
5312 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
5313 | ||
5314 | hw->channel_change_time = 10; | |
5315 | ||
e600707b | 5316 | hw->queues = MWL8K_TX_WMM_QUEUES; |
3cc7772c BC |
5317 | |
5318 | /* Set rssi values to dBm */ | |
0bf22c37 | 5319 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; |
3cc7772c BC |
5320 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
5321 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
5322 | ||
5323 | priv->macids_used = 0; | |
5324 | INIT_LIST_HEAD(&priv->vif_list); | |
5325 | ||
5326 | /* Set default radio state and preamble */ | |
5327 | priv->radio_on = 0; | |
5328 | priv->radio_short_preamble = 0; | |
5329 | ||
5330 | /* Finalize join worker */ | |
5331 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
3aefc37e NS |
5332 | /* Handle watchdog ba events */ |
5333 | INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events); | |
3cc7772c BC |
5334 | |
5335 | /* TX reclaim and RX tasklets. */ | |
5336 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
5337 | tasklet_disable(&priv->poll_tx_task); | |
5338 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
5339 | tasklet_disable(&priv->poll_rx_task); | |
5340 | ||
5341 | /* Power management cookie */ | |
5342 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
5343 | if (priv->cookie == NULL) | |
5344 | return -ENOMEM; | |
5345 | ||
5346 | mutex_init(&priv->fw_mutex); | |
5347 | priv->fw_mutex_owner = NULL; | |
5348 | priv->fw_mutex_depth = 0; | |
5349 | priv->hostcmd_wait = NULL; | |
5350 | ||
5351 | spin_lock_init(&priv->tx_lock); | |
5352 | ||
ac109fd0 BC |
5353 | spin_lock_init(&priv->stream_lock); |
5354 | ||
3cc7772c BC |
5355 | priv->tx_wait = NULL; |
5356 | ||
5357 | rc = mwl8k_probe_hw(hw); | |
5358 | if (rc) | |
5359 | goto err_free_cookie; | |
5360 | ||
5361 | hw->wiphy->interface_modes = 0; | |
5362 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) | |
5363 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); | |
5364 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) | |
5365 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
5366 | ||
5367 | rc = ieee80211_register_hw(hw); | |
5368 | if (rc) { | |
5369 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
5370 | goto err_unprobe_hw; | |
5371 | } | |
5372 | ||
5373 | return 0; | |
5374 | ||
5375 | err_unprobe_hw: | |
e600707b | 5376 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5377 | mwl8k_txq_deinit(hw, i); |
5378 | mwl8k_rxq_deinit(hw, 0); | |
5379 | ||
be695fc4 | 5380 | err_free_cookie: |
a66098da LB |
5381 | if (priv->cookie != NULL) |
5382 | pci_free_consistent(priv->pdev, 4, | |
5383 | priv->cookie, priv->cookie_dma); | |
5384 | ||
3cc7772c BC |
5385 | return rc; |
5386 | } | |
5387 | static int __devinit mwl8k_probe(struct pci_dev *pdev, | |
5388 | const struct pci_device_id *id) | |
5389 | { | |
5390 | static int printed_version; | |
5391 | struct ieee80211_hw *hw; | |
5392 | struct mwl8k_priv *priv; | |
0863ade8 | 5393 | struct mwl8k_device_info *di; |
3cc7772c BC |
5394 | int rc; |
5395 | ||
5396 | if (!printed_version) { | |
5397 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
5398 | printed_version = 1; | |
5399 | } | |
5400 | ||
5401 | ||
5402 | rc = pci_enable_device(pdev); | |
5403 | if (rc) { | |
5404 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
5405 | MWL8K_NAME); | |
5406 | return rc; | |
5407 | } | |
5408 | ||
5409 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
5410 | if (rc) { | |
5411 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
5412 | MWL8K_NAME); | |
5413 | goto err_disable_device; | |
5414 | } | |
5415 | ||
5416 | pci_set_master(pdev); | |
5417 | ||
5418 | ||
5419 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
5420 | if (hw == NULL) { | |
5421 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
5422 | rc = -ENOMEM; | |
5423 | goto err_free_reg; | |
5424 | } | |
5425 | ||
5426 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
5427 | pci_set_drvdata(pdev, hw); | |
5428 | ||
5429 | priv = hw->priv; | |
5430 | priv->hw = hw; | |
5431 | priv->pdev = pdev; | |
5432 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
5433 | ||
5434 | ||
5435 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
5436 | if (priv->sram == NULL) { | |
5437 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
5438 | goto err_iounmap; | |
5439 | } | |
5440 | ||
5441 | /* | |
5442 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
5443 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
5444 | */ | |
5445 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
5446 | if (priv->regs == NULL) { | |
5447 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
5448 | if (priv->regs == NULL) { | |
5449 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
5450 | goto err_iounmap; | |
5451 | } | |
5452 | } | |
5453 | ||
0863ade8 | 5454 | /* |
99020471 BC |
5455 | * Choose the initial fw image depending on user input. If a second |
5456 | * image is available, make it the alternative image that will be | |
5457 | * loaded if the first one fails. | |
0863ade8 | 5458 | */ |
99020471 | 5459 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 5460 | di = priv->device_info; |
99020471 BC |
5461 | if (ap_mode_default && di->fw_image_ap) { |
5462 | priv->fw_pref = di->fw_image_ap; | |
5463 | priv->fw_alt = di->fw_image_sta; | |
5464 | } else if (!ap_mode_default && di->fw_image_sta) { | |
5465 | priv->fw_pref = di->fw_image_sta; | |
5466 | priv->fw_alt = di->fw_image_ap; | |
5467 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 5468 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 5469 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
5470 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
5471 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
5472 | priv->fw_pref = di->fw_image_ap; |
5473 | } | |
5474 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
5475 | if (rc) |
5476 | goto err_stop_firmware; | |
99020471 | 5477 | return rc; |
3cc7772c | 5478 | |
be695fc4 LB |
5479 | err_stop_firmware: |
5480 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
5481 | |
5482 | err_iounmap: | |
a66098da LB |
5483 | if (priv->regs != NULL) |
5484 | pci_iounmap(pdev, priv->regs); | |
5485 | ||
5b9482dd LB |
5486 | if (priv->sram != NULL) |
5487 | pci_iounmap(pdev, priv->sram); | |
5488 | ||
a66098da LB |
5489 | pci_set_drvdata(pdev, NULL); |
5490 | ieee80211_free_hw(hw); | |
5491 | ||
5492 | err_free_reg: | |
5493 | pci_release_regions(pdev); | |
3db95e50 LB |
5494 | |
5495 | err_disable_device: | |
a66098da LB |
5496 | pci_disable_device(pdev); |
5497 | ||
5498 | return rc; | |
5499 | } | |
5500 | ||
230f7af0 | 5501 | static void __devexit mwl8k_shutdown(struct pci_dev *pdev) |
a66098da LB |
5502 | { |
5503 | printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__); | |
5504 | } | |
5505 | ||
230f7af0 | 5506 | static void __devexit mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
5507 | { |
5508 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
5509 | struct mwl8k_priv *priv; | |
5510 | int i; | |
5511 | ||
5512 | if (hw == NULL) | |
5513 | return; | |
5514 | priv = hw->priv; | |
5515 | ||
99020471 BC |
5516 | wait_for_completion(&priv->firmware_loading_complete); |
5517 | ||
5518 | if (priv->fw_state == FW_STATE_ERROR) { | |
5519 | mwl8k_hw_reset(priv); | |
5520 | goto unmap; | |
5521 | } | |
5522 | ||
a66098da LB |
5523 | ieee80211_stop_queues(hw); |
5524 | ||
60aa569f LB |
5525 | ieee80211_unregister_hw(hw); |
5526 | ||
67e2eb27 | 5527 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 5528 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 5529 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 5530 | |
a66098da LB |
5531 | /* Stop hardware */ |
5532 | mwl8k_hw_reset(priv); | |
5533 | ||
5534 | /* Return all skbs to mac80211 */ | |
e600707b | 5535 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 5536 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 5537 | |
e600707b | 5538 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5539 | mwl8k_txq_deinit(hw, i); |
5540 | ||
5541 | mwl8k_rxq_deinit(hw, 0); | |
5542 | ||
c2c357ce | 5543 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 5544 | |
99020471 | 5545 | unmap: |
a66098da | 5546 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 5547 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
5548 | pci_set_drvdata(pdev, NULL); |
5549 | ieee80211_free_hw(hw); | |
5550 | pci_release_regions(pdev); | |
5551 | pci_disable_device(pdev); | |
5552 | } | |
5553 | ||
5554 | static struct pci_driver mwl8k_driver = { | |
5555 | .name = MWL8K_NAME, | |
45a390dd | 5556 | .id_table = mwl8k_pci_id_table, |
a66098da LB |
5557 | .probe = mwl8k_probe, |
5558 | .remove = __devexit_p(mwl8k_remove), | |
5559 | .shutdown = __devexit_p(mwl8k_shutdown), | |
5560 | }; | |
5561 | ||
5562 | static int __init mwl8k_init(void) | |
5563 | { | |
5564 | return pci_register_driver(&mwl8k_driver); | |
5565 | } | |
5566 | ||
5567 | static void __exit mwl8k_exit(void) | |
5568 | { | |
5569 | pci_unregister_driver(&mwl8k_driver); | |
5570 | } | |
5571 | ||
5572 | module_init(mwl8k_init); | |
5573 | module_exit(mwl8k_exit); | |
c2c357ce LB |
5574 | |
5575 | MODULE_DESCRIPTION(MWL8K_DESC); | |
5576 | MODULE_VERSION(MWL8K_VERSION); | |
5577 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
5578 | MODULE_LICENSE("GPL"); |