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a66098da | 1 | /* |
ce9e2e1b LB |
2 | * drivers/net/wireless/mwl8k.c |
3 | * Driver for Marvell TOPDOG 802.11 Wireless cards | |
a66098da | 4 | * |
a5fb297d | 5 | * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc. |
a66098da LB |
6 | * |
7 | * This file is licensed under the terms of the GNU General Public | |
8 | * License version 2. This program is licensed "as is" without any | |
9 | * warranty of any kind, whether express or implied. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
a6b7a407 | 13 | #include <linux/interrupt.h> |
a66098da LB |
14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | |
3d76e82c | 16 | #include <linux/sched.h> |
a66098da LB |
17 | #include <linux/spinlock.h> |
18 | #include <linux/list.h> | |
19 | #include <linux/pci.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/completion.h> | |
22 | #include <linux/etherdevice.h> | |
5a0e3ad6 | 23 | #include <linux/slab.h> |
a66098da LB |
24 | #include <net/mac80211.h> |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/firmware.h> | |
27 | #include <linux/workqueue.h> | |
28 | ||
29 | #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" | |
30 | #define MWL8K_NAME KBUILD_MODNAME | |
00e8e692 | 31 | #define MWL8K_VERSION "0.13" |
a66098da | 32 | |
0863ade8 | 33 | /* Module parameters */ |
eb939922 | 34 | static bool ap_mode_default; |
0863ade8 BC |
35 | module_param(ap_mode_default, bool, 0); |
36 | MODULE_PARM_DESC(ap_mode_default, | |
37 | "Set to 1 to make ap mode the default instead of sta mode"); | |
38 | ||
a66098da LB |
39 | /* Register definitions */ |
40 | #define MWL8K_HIU_GEN_PTR 0x00000c10 | |
ce9e2e1b LB |
41 | #define MWL8K_MODE_STA 0x0000005a |
42 | #define MWL8K_MODE_AP 0x000000a5 | |
a66098da | 43 | #define MWL8K_HIU_INT_CODE 0x00000c14 |
ce9e2e1b LB |
44 | #define MWL8K_FWSTA_READY 0xf0f1f2f4 |
45 | #define MWL8K_FWAP_READY 0xf1f2f4a5 | |
46 | #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005 | |
a66098da LB |
47 | #define MWL8K_HIU_SCRATCH 0x00000c40 |
48 | ||
49 | /* Host->device communications */ | |
50 | #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18 | |
51 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c | |
52 | #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20 | |
53 | #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24 | |
54 | #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28 | |
ce9e2e1b LB |
55 | #define MWL8K_H2A_INT_DUMMY (1 << 20) |
56 | #define MWL8K_H2A_INT_RESET (1 << 15) | |
57 | #define MWL8K_H2A_INT_DOORBELL (1 << 1) | |
58 | #define MWL8K_H2A_INT_PPA_READY (1 << 0) | |
a66098da LB |
59 | |
60 | /* Device->host communications */ | |
61 | #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c | |
62 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30 | |
63 | #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34 | |
64 | #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38 | |
65 | #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c | |
ce9e2e1b | 66 | #define MWL8K_A2H_INT_DUMMY (1 << 20) |
3aefc37e | 67 | #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14) |
ce9e2e1b LB |
68 | #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11) |
69 | #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10) | |
70 | #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7) | |
71 | #define MWL8K_A2H_INT_RADIO_ON (1 << 6) | |
72 | #define MWL8K_A2H_INT_RADIO_OFF (1 << 5) | |
73 | #define MWL8K_A2H_INT_MAC_EVENT (1 << 3) | |
74 | #define MWL8K_A2H_INT_OPC_DONE (1 << 2) | |
75 | #define MWL8K_A2H_INT_RX_READY (1 << 1) | |
76 | #define MWL8K_A2H_INT_TX_DONE (1 << 0) | |
a66098da | 77 | |
566875db PN |
78 | /* HW micro second timer register |
79 | * located at offset 0xA600. This | |
80 | * will be used to timestamp tx | |
81 | * packets. | |
82 | */ | |
83 | ||
84 | #define MWL8K_HW_TIMER_REGISTER 0x0000a600 | |
85 | ||
a66098da LB |
86 | #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \ |
87 | MWL8K_A2H_INT_CHNL_SWITCHED | \ | |
88 | MWL8K_A2H_INT_QUEUE_EMPTY | \ | |
89 | MWL8K_A2H_INT_RADAR_DETECT | \ | |
90 | MWL8K_A2H_INT_RADIO_ON | \ | |
91 | MWL8K_A2H_INT_RADIO_OFF | \ | |
92 | MWL8K_A2H_INT_MAC_EVENT | \ | |
93 | MWL8K_A2H_INT_OPC_DONE | \ | |
94 | MWL8K_A2H_INT_RX_READY | \ | |
3aefc37e NS |
95 | MWL8K_A2H_INT_TX_DONE | \ |
96 | MWL8K_A2H_INT_BA_WATCHDOG) | |
a66098da | 97 | |
a66098da | 98 | #define MWL8K_RX_QUEUES 1 |
e600707b | 99 | #define MWL8K_TX_WMM_QUEUES 4 |
8a7a578c | 100 | #define MWL8K_MAX_AMPDU_QUEUES 8 |
e600707b BC |
101 | #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES) |
102 | #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues) | |
a66098da | 103 | |
7fb978b7 YAP |
104 | /* txpriorities are mapped with hw queues. |
105 | * Each hw queue has a txpriority. | |
106 | */ | |
107 | #define TOTAL_HW_TX_QUEUES 8 | |
108 | ||
109 | /* Each HW queue can have one AMPDU stream. | |
110 | * But, because one of the hw queue is reserved, | |
111 | * maximum AMPDU queues that can be created are | |
112 | * one short of total tx queues. | |
113 | */ | |
114 | #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1) | |
115 | ||
54bc3a0d LB |
116 | struct rxd_ops { |
117 | int rxd_size; | |
118 | void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr); | |
119 | void (*rxd_refill)(void *rxd, dma_addr_t addr, int len); | |
20f09c3d | 120 | int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status, |
0d462bbb | 121 | __le16 *qos, s8 *noise); |
54bc3a0d LB |
122 | }; |
123 | ||
45a390dd | 124 | struct mwl8k_device_info { |
a74b295e LB |
125 | char *part_name; |
126 | char *helper_image; | |
0863ade8 BC |
127 | char *fw_image_sta; |
128 | char *fw_image_ap; | |
89a91f4f | 129 | struct rxd_ops *ap_rxd_ops; |
952a0e96 | 130 | u32 fw_api_ap; |
45a390dd LB |
131 | }; |
132 | ||
a66098da | 133 | struct mwl8k_rx_queue { |
45eb400d | 134 | int rxd_count; |
a66098da LB |
135 | |
136 | /* hw receives here */ | |
45eb400d | 137 | int head; |
a66098da LB |
138 | |
139 | /* refill descs here */ | |
45eb400d | 140 | int tail; |
a66098da | 141 | |
54bc3a0d | 142 | void *rxd; |
45eb400d | 143 | dma_addr_t rxd_dma; |
788838eb LB |
144 | struct { |
145 | struct sk_buff *skb; | |
53b1b3e1 | 146 | DEFINE_DMA_UNMAP_ADDR(dma); |
788838eb | 147 | } *buf; |
a66098da LB |
148 | }; |
149 | ||
a66098da LB |
150 | struct mwl8k_tx_queue { |
151 | /* hw transmits here */ | |
45eb400d | 152 | int head; |
a66098da LB |
153 | |
154 | /* sw appends here */ | |
45eb400d | 155 | int tail; |
a66098da | 156 | |
8ccbc3b8 | 157 | unsigned int len; |
45eb400d LB |
158 | struct mwl8k_tx_desc *txd; |
159 | dma_addr_t txd_dma; | |
160 | struct sk_buff **skb; | |
a66098da LB |
161 | }; |
162 | ||
ac109fd0 BC |
163 | enum { |
164 | AMPDU_NO_STREAM, | |
165 | AMPDU_STREAM_NEW, | |
166 | AMPDU_STREAM_IN_PROGRESS, | |
167 | AMPDU_STREAM_ACTIVE, | |
168 | }; | |
169 | ||
5faa1aff NS |
170 | struct mwl8k_ampdu_stream { |
171 | struct ieee80211_sta *sta; | |
172 | u8 tid; | |
173 | u8 state; | |
174 | u8 idx; | |
5faa1aff NS |
175 | }; |
176 | ||
a66098da | 177 | struct mwl8k_priv { |
a66098da | 178 | struct ieee80211_hw *hw; |
a66098da | 179 | struct pci_dev *pdev; |
bf3ca7f7 | 180 | int irq; |
a66098da | 181 | |
45a390dd LB |
182 | struct mwl8k_device_info *device_info; |
183 | ||
be695fc4 LB |
184 | void __iomem *sram; |
185 | void __iomem *regs; | |
186 | ||
187 | /* firmware */ | |
d1f9e41d BC |
188 | const struct firmware *fw_helper; |
189 | const struct firmware *fw_ucode; | |
a66098da | 190 | |
be695fc4 LB |
191 | /* hardware/firmware parameters */ |
192 | bool ap_fw; | |
193 | struct rxd_ops *rxd_ops; | |
777ad375 LB |
194 | struct ieee80211_supported_band band_24; |
195 | struct ieee80211_channel channels_24[14]; | |
196 | struct ieee80211_rate rates_24[14]; | |
4eae9edd LB |
197 | struct ieee80211_supported_band band_50; |
198 | struct ieee80211_channel channels_50[4]; | |
199 | struct ieee80211_rate rates_50[9]; | |
ee0ddf18 LB |
200 | u32 ap_macids_supported; |
201 | u32 sta_macids_supported; | |
be695fc4 | 202 | |
8a7a578c BC |
203 | /* Ampdu stream information */ |
204 | u8 num_ampdu_queues; | |
ac109fd0 BC |
205 | spinlock_t stream_lock; |
206 | struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
3aefc37e | 207 | struct work_struct watchdog_ba_handle; |
8a7a578c | 208 | |
618952a7 LB |
209 | /* firmware access */ |
210 | struct mutex fw_mutex; | |
211 | struct task_struct *fw_mutex_owner; | |
6b6accc3 | 212 | struct task_struct *hw_restart_owner; |
618952a7 | 213 | int fw_mutex_depth; |
618952a7 LB |
214 | struct completion *hostcmd_wait; |
215 | ||
c27a54d3 YAP |
216 | atomic_t watchdog_event_pending; |
217 | ||
a66098da LB |
218 | /* lock held over TX and TX reap */ |
219 | spinlock_t tx_lock; | |
a66098da | 220 | |
88de754a LB |
221 | /* TX quiesce completion, protected by fw_mutex and tx_lock */ |
222 | struct completion *tx_wait; | |
223 | ||
f5bb87cf | 224 | /* List of interfaces. */ |
ee0ddf18 | 225 | u32 macids_used; |
f5bb87cf | 226 | struct list_head vif_list; |
a66098da | 227 | |
a66098da LB |
228 | /* power management status cookie from firmware */ |
229 | u32 *cookie; | |
230 | dma_addr_t cookie_dma; | |
231 | ||
232 | u16 num_mcaddrs; | |
a66098da | 233 | u8 hw_rev; |
2aa7b01f | 234 | u32 fw_rev; |
a66098da LB |
235 | |
236 | /* | |
237 | * Running count of TX packets in flight, to avoid | |
238 | * iterating over the transmit rings each time. | |
239 | */ | |
240 | int pending_tx_pkts; | |
241 | ||
242 | struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; | |
e600707b BC |
243 | struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES]; |
244 | u32 txq_offset[MWL8K_MAX_TX_QUEUES]; | |
a66098da | 245 | |
c46563b7 | 246 | bool radio_on; |
68ce3884 | 247 | bool radio_short_preamble; |
a43c49a8 | 248 | bool sniffer_enabled; |
0439b1f5 | 249 | bool wmm_enabled; |
a66098da | 250 | |
a66098da LB |
251 | /* XXX need to convert this to handle multiple interfaces */ |
252 | bool capture_beacon; | |
d89173f2 | 253 | u8 capture_bssid[ETH_ALEN]; |
a66098da LB |
254 | struct sk_buff *beacon_skb; |
255 | ||
256 | /* | |
257 | * This FJ worker has to be global as it is scheduled from the | |
258 | * RX handler. At this point we don't know which interface it | |
259 | * belongs to until the list of bssids waiting to complete join | |
260 | * is checked. | |
261 | */ | |
262 | struct work_struct finalize_join_worker; | |
263 | ||
1e9f9de3 LB |
264 | /* Tasklet to perform TX reclaim. */ |
265 | struct tasklet_struct poll_tx_task; | |
67e2eb27 LB |
266 | |
267 | /* Tasklet to perform RX. */ | |
268 | struct tasklet_struct poll_rx_task; | |
0d462bbb JL |
269 | |
270 | /* Most recently reported noise in dBm */ | |
271 | s8 noise; | |
0863ade8 BC |
272 | |
273 | /* | |
274 | * preserve the queue configurations so they can be restored if/when | |
275 | * the firmware image is swapped. | |
276 | */ | |
e600707b | 277 | struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES]; |
99020471 | 278 | |
6b6accc3 YAP |
279 | /* To perform the task of reloading the firmware */ |
280 | struct work_struct fw_reload; | |
281 | bool hw_restart_in_progress; | |
282 | ||
99020471 BC |
283 | /* async firmware loading state */ |
284 | unsigned fw_state; | |
285 | char *fw_pref; | |
286 | char *fw_alt; | |
287 | struct completion firmware_loading_complete; | |
e882efc9 YAP |
288 | |
289 | /* bitmap of running BSSes */ | |
290 | u32 running_bsses; | |
a66098da LB |
291 | }; |
292 | ||
e53d9b96 NS |
293 | #define MAX_WEP_KEY_LEN 13 |
294 | #define NUM_WEP_KEYS 4 | |
295 | ||
a66098da LB |
296 | /* Per interface specific private data */ |
297 | struct mwl8k_vif { | |
f5bb87cf LB |
298 | struct list_head list; |
299 | struct ieee80211_vif *vif; | |
300 | ||
f57ca9c1 LB |
301 | /* Firmware macid for this vif. */ |
302 | int macid; | |
303 | ||
c2c2b12a | 304 | /* Non AMPDU sequence number assigned by driver. */ |
a680400e | 305 | u16 seqno; |
e53d9b96 NS |
306 | |
307 | /* Saved WEP keys */ | |
308 | struct { | |
309 | u8 enabled; | |
310 | u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN]; | |
311 | } wep_key_conf[NUM_WEP_KEYS]; | |
d9a07d49 NS |
312 | |
313 | /* BSSID */ | |
314 | u8 bssid[ETH_ALEN]; | |
315 | ||
316 | /* A flag to indicate is HW crypto is enabled for this bssid */ | |
317 | bool is_hw_crypto_enabled; | |
a66098da | 318 | }; |
a94cc97e | 319 | #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) |
fcdc403c | 320 | #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8)) |
a66098da | 321 | |
d0805c1c BC |
322 | struct tx_traffic_info { |
323 | u32 start_time; | |
324 | u32 pkts; | |
325 | }; | |
326 | ||
327 | #define MWL8K_MAX_TID 8 | |
a680400e LB |
328 | struct mwl8k_sta { |
329 | /* Index into station database. Returned by UPDATE_STADB. */ | |
330 | u8 peer_id; | |
17033543 | 331 | u8 is_ampdu_allowed; |
d0805c1c | 332 | struct tx_traffic_info tx_stats[MWL8K_MAX_TID]; |
a680400e LB |
333 | }; |
334 | #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv)) | |
335 | ||
777ad375 | 336 | static const struct ieee80211_channel mwl8k_channels_24[] = { |
a66098da LB |
337 | { .center_freq = 2412, .hw_value = 1, }, |
338 | { .center_freq = 2417, .hw_value = 2, }, | |
339 | { .center_freq = 2422, .hw_value = 3, }, | |
340 | { .center_freq = 2427, .hw_value = 4, }, | |
341 | { .center_freq = 2432, .hw_value = 5, }, | |
342 | { .center_freq = 2437, .hw_value = 6, }, | |
343 | { .center_freq = 2442, .hw_value = 7, }, | |
344 | { .center_freq = 2447, .hw_value = 8, }, | |
345 | { .center_freq = 2452, .hw_value = 9, }, | |
346 | { .center_freq = 2457, .hw_value = 10, }, | |
347 | { .center_freq = 2462, .hw_value = 11, }, | |
647ca6b0 LB |
348 | { .center_freq = 2467, .hw_value = 12, }, |
349 | { .center_freq = 2472, .hw_value = 13, }, | |
350 | { .center_freq = 2484, .hw_value = 14, }, | |
a66098da LB |
351 | }; |
352 | ||
777ad375 | 353 | static const struct ieee80211_rate mwl8k_rates_24[] = { |
a66098da LB |
354 | { .bitrate = 10, .hw_value = 2, }, |
355 | { .bitrate = 20, .hw_value = 4, }, | |
356 | { .bitrate = 55, .hw_value = 11, }, | |
5dfd3e2c LB |
357 | { .bitrate = 110, .hw_value = 22, }, |
358 | { .bitrate = 220, .hw_value = 44, }, | |
a66098da LB |
359 | { .bitrate = 60, .hw_value = 12, }, |
360 | { .bitrate = 90, .hw_value = 18, }, | |
a66098da LB |
361 | { .bitrate = 120, .hw_value = 24, }, |
362 | { .bitrate = 180, .hw_value = 36, }, | |
363 | { .bitrate = 240, .hw_value = 48, }, | |
364 | { .bitrate = 360, .hw_value = 72, }, | |
365 | { .bitrate = 480, .hw_value = 96, }, | |
366 | { .bitrate = 540, .hw_value = 108, }, | |
140eb5e2 LB |
367 | { .bitrate = 720, .hw_value = 144, }, |
368 | }; | |
369 | ||
4eae9edd LB |
370 | static const struct ieee80211_channel mwl8k_channels_50[] = { |
371 | { .center_freq = 5180, .hw_value = 36, }, | |
372 | { .center_freq = 5200, .hw_value = 40, }, | |
373 | { .center_freq = 5220, .hw_value = 44, }, | |
374 | { .center_freq = 5240, .hw_value = 48, }, | |
375 | }; | |
376 | ||
377 | static const struct ieee80211_rate mwl8k_rates_50[] = { | |
378 | { .bitrate = 60, .hw_value = 12, }, | |
379 | { .bitrate = 90, .hw_value = 18, }, | |
380 | { .bitrate = 120, .hw_value = 24, }, | |
381 | { .bitrate = 180, .hw_value = 36, }, | |
382 | { .bitrate = 240, .hw_value = 48, }, | |
383 | { .bitrate = 360, .hw_value = 72, }, | |
384 | { .bitrate = 480, .hw_value = 96, }, | |
385 | { .bitrate = 540, .hw_value = 108, }, | |
386 | { .bitrate = 720, .hw_value = 144, }, | |
387 | }; | |
388 | ||
a66098da | 389 | /* Set or get info from Firmware */ |
a66098da | 390 | #define MWL8K_CMD_GET 0x0000 |
41fdf097 NS |
391 | #define MWL8K_CMD_SET 0x0001 |
392 | #define MWL8K_CMD_SET_LIST 0x0002 | |
a66098da LB |
393 | |
394 | /* Firmware command codes */ | |
395 | #define MWL8K_CMD_CODE_DNLD 0x0001 | |
396 | #define MWL8K_CMD_GET_HW_SPEC 0x0003 | |
42fba21d | 397 | #define MWL8K_CMD_SET_HW_SPEC 0x0004 |
a66098da LB |
398 | #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 |
399 | #define MWL8K_CMD_GET_STAT 0x0014 | |
ff45fc60 LB |
400 | #define MWL8K_CMD_RADIO_CONTROL 0x001c |
401 | #define MWL8K_CMD_RF_TX_POWER 0x001e | |
41fdf097 | 402 | #define MWL8K_CMD_TX_POWER 0x001f |
08b06347 | 403 | #define MWL8K_CMD_RF_ANTENNA 0x0020 |
aa21d0f6 | 404 | #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */ |
a66098da LB |
405 | #define MWL8K_CMD_SET_PRE_SCAN 0x0107 |
406 | #define MWL8K_CMD_SET_POST_SCAN 0x0108 | |
ff45fc60 LB |
407 | #define MWL8K_CMD_SET_RF_CHANNEL 0x010a |
408 | #define MWL8K_CMD_SET_AID 0x010d | |
409 | #define MWL8K_CMD_SET_RATE 0x0110 | |
410 | #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111 | |
411 | #define MWL8K_CMD_RTS_THRESHOLD 0x0113 | |
a66098da | 412 | #define MWL8K_CMD_SET_SLOT 0x0114 |
ff45fc60 LB |
413 | #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115 |
414 | #define MWL8K_CMD_SET_WMM_MODE 0x0123 | |
a66098da | 415 | #define MWL8K_CMD_MIMO_CONFIG 0x0125 |
ff45fc60 | 416 | #define MWL8K_CMD_USE_FIXED_RATE 0x0126 |
a66098da | 417 | #define MWL8K_CMD_ENABLE_SNIFFER 0x0150 |
aa21d0f6 | 418 | #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */ |
a66098da | 419 | #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 |
3aefc37e | 420 | #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205 |
197a4e4e | 421 | #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */ |
aa21d0f6 LB |
422 | #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */ |
423 | #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */ | |
fcdc403c | 424 | #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */ |
ff45fc60 | 425 | #define MWL8K_CMD_UPDATE_STADB 0x1123 |
5faa1aff | 426 | #define MWL8K_CMD_BASTREAM 0x1125 |
a66098da | 427 | |
b603742f | 428 | static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize) |
a66098da | 429 | { |
b603742f JL |
430 | u16 command = le16_to_cpu(cmd); |
431 | ||
a66098da LB |
432 | #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\ |
433 | snprintf(buf, bufsize, "%s", #x);\ | |
434 | return buf;\ | |
435 | } while (0) | |
b603742f | 436 | switch (command & ~0x8000) { |
a66098da LB |
437 | MWL8K_CMDNAME(CODE_DNLD); |
438 | MWL8K_CMDNAME(GET_HW_SPEC); | |
42fba21d | 439 | MWL8K_CMDNAME(SET_HW_SPEC); |
a66098da LB |
440 | MWL8K_CMDNAME(MAC_MULTICAST_ADR); |
441 | MWL8K_CMDNAME(GET_STAT); | |
442 | MWL8K_CMDNAME(RADIO_CONTROL); | |
443 | MWL8K_CMDNAME(RF_TX_POWER); | |
41fdf097 | 444 | MWL8K_CMDNAME(TX_POWER); |
08b06347 | 445 | MWL8K_CMDNAME(RF_ANTENNA); |
b64fe619 | 446 | MWL8K_CMDNAME(SET_BEACON); |
a66098da LB |
447 | MWL8K_CMDNAME(SET_PRE_SCAN); |
448 | MWL8K_CMDNAME(SET_POST_SCAN); | |
449 | MWL8K_CMDNAME(SET_RF_CHANNEL); | |
ff45fc60 LB |
450 | MWL8K_CMDNAME(SET_AID); |
451 | MWL8K_CMDNAME(SET_RATE); | |
452 | MWL8K_CMDNAME(SET_FINALIZE_JOIN); | |
453 | MWL8K_CMDNAME(RTS_THRESHOLD); | |
a66098da | 454 | MWL8K_CMDNAME(SET_SLOT); |
ff45fc60 LB |
455 | MWL8K_CMDNAME(SET_EDCA_PARAMS); |
456 | MWL8K_CMDNAME(SET_WMM_MODE); | |
a66098da | 457 | MWL8K_CMDNAME(MIMO_CONFIG); |
ff45fc60 | 458 | MWL8K_CMDNAME(USE_FIXED_RATE); |
a66098da | 459 | MWL8K_CMDNAME(ENABLE_SNIFFER); |
32060e1b | 460 | MWL8K_CMDNAME(SET_MAC_ADDR); |
a66098da | 461 | MWL8K_CMDNAME(SET_RATEADAPT_MODE); |
b64fe619 | 462 | MWL8K_CMDNAME(BSS_START); |
3f5610ff | 463 | MWL8K_CMDNAME(SET_NEW_STN); |
fcdc403c | 464 | MWL8K_CMDNAME(UPDATE_ENCRYPTION); |
ff45fc60 | 465 | MWL8K_CMDNAME(UPDATE_STADB); |
5faa1aff | 466 | MWL8K_CMDNAME(BASTREAM); |
3aefc37e | 467 | MWL8K_CMDNAME(GET_WATCHDOG_BITMAP); |
a66098da LB |
468 | default: |
469 | snprintf(buf, bufsize, "0x%x", cmd); | |
470 | } | |
471 | #undef MWL8K_CMDNAME | |
472 | ||
473 | return buf; | |
474 | } | |
475 | ||
476 | /* Hardware and firmware reset */ | |
477 | static void mwl8k_hw_reset(struct mwl8k_priv *priv) | |
478 | { | |
479 | iowrite32(MWL8K_H2A_INT_RESET, | |
480 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
481 | iowrite32(MWL8K_H2A_INT_RESET, | |
482 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
483 | msleep(20); | |
484 | } | |
485 | ||
486 | /* Release fw image */ | |
d1f9e41d | 487 | static void mwl8k_release_fw(const struct firmware **fw) |
a66098da LB |
488 | { |
489 | if (*fw == NULL) | |
490 | return; | |
491 | release_firmware(*fw); | |
492 | *fw = NULL; | |
493 | } | |
494 | ||
495 | static void mwl8k_release_firmware(struct mwl8k_priv *priv) | |
496 | { | |
22be40d9 LB |
497 | mwl8k_release_fw(&priv->fw_ucode); |
498 | mwl8k_release_fw(&priv->fw_helper); | |
a66098da LB |
499 | } |
500 | ||
99020471 BC |
501 | /* states for asynchronous f/w loading */ |
502 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context); | |
503 | enum { | |
504 | FW_STATE_INIT = 0, | |
505 | FW_STATE_LOADING_PREF, | |
506 | FW_STATE_LOADING_ALT, | |
507 | FW_STATE_ERROR, | |
508 | }; | |
509 | ||
a66098da LB |
510 | /* Request fw image */ |
511 | static int mwl8k_request_fw(struct mwl8k_priv *priv, | |
d1f9e41d | 512 | const char *fname, const struct firmware **fw, |
99020471 | 513 | bool nowait) |
a66098da LB |
514 | { |
515 | /* release current image */ | |
516 | if (*fw != NULL) | |
517 | mwl8k_release_fw(fw); | |
518 | ||
99020471 BC |
519 | if (nowait) |
520 | return request_firmware_nowait(THIS_MODULE, 1, fname, | |
521 | &priv->pdev->dev, GFP_KERNEL, | |
522 | priv, mwl8k_fw_state_machine); | |
523 | else | |
d1f9e41d | 524 | return request_firmware(fw, fname, &priv->pdev->dev); |
a66098da LB |
525 | } |
526 | ||
99020471 BC |
527 | static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image, |
528 | bool nowait) | |
a66098da | 529 | { |
a74b295e | 530 | struct mwl8k_device_info *di = priv->device_info; |
a66098da LB |
531 | int rc; |
532 | ||
a74b295e | 533 | if (di->helper_image != NULL) { |
99020471 BC |
534 | if (nowait) |
535 | rc = mwl8k_request_fw(priv, di->helper_image, | |
536 | &priv->fw_helper, true); | |
537 | else | |
538 | rc = mwl8k_request_fw(priv, di->helper_image, | |
539 | &priv->fw_helper, false); | |
540 | if (rc) | |
541 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
542 | pci_name(priv->pdev), di->helper_image); | |
543 | ||
544 | if (rc || nowait) | |
a74b295e | 545 | return rc; |
a66098da LB |
546 | } |
547 | ||
99020471 BC |
548 | if (nowait) { |
549 | /* | |
550 | * if we get here, no helper image is needed. Skip the | |
551 | * FW_STATE_INIT state. | |
552 | */ | |
553 | priv->fw_state = FW_STATE_LOADING_PREF; | |
554 | rc = mwl8k_request_fw(priv, fw_image, | |
555 | &priv->fw_ucode, | |
556 | true); | |
557 | } else | |
558 | rc = mwl8k_request_fw(priv, fw_image, | |
559 | &priv->fw_ucode, false); | |
a66098da | 560 | if (rc) { |
c2c357ce | 561 | printk(KERN_ERR "%s: Error requesting firmware file %s\n", |
0863ade8 | 562 | pci_name(priv->pdev), fw_image); |
22be40d9 | 563 | mwl8k_release_fw(&priv->fw_helper); |
a66098da LB |
564 | return rc; |
565 | } | |
566 | ||
567 | return 0; | |
568 | } | |
569 | ||
570 | struct mwl8k_cmd_pkt { | |
571 | __le16 code; | |
572 | __le16 length; | |
f57ca9c1 LB |
573 | __u8 seq_num; |
574 | __u8 macid; | |
a66098da LB |
575 | __le16 result; |
576 | char payload[0]; | |
ba2d3587 | 577 | } __packed; |
a66098da LB |
578 | |
579 | /* | |
580 | * Firmware loading. | |
581 | */ | |
582 | static int | |
583 | mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length) | |
584 | { | |
585 | void __iomem *regs = priv->regs; | |
586 | dma_addr_t dma_addr; | |
a66098da LB |
587 | int loops; |
588 | ||
589 | dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE); | |
590 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
591 | return -ENOMEM; | |
592 | ||
593 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
594 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
595 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
596 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
597 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
598 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
599 | ||
a66098da LB |
600 | loops = 1000; |
601 | do { | |
602 | u32 int_code; | |
603 | ||
604 | int_code = ioread32(regs + MWL8K_HIU_INT_CODE); | |
605 | if (int_code == MWL8K_INT_CODE_CMD_FINISHED) { | |
606 | iowrite32(0, regs + MWL8K_HIU_INT_CODE); | |
a66098da LB |
607 | break; |
608 | } | |
609 | ||
3d76e82c | 610 | cond_resched(); |
a66098da LB |
611 | udelay(1); |
612 | } while (--loops); | |
613 | ||
614 | pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE); | |
615 | ||
d4b70570 | 616 | return loops ? 0 : -ETIMEDOUT; |
a66098da LB |
617 | } |
618 | ||
619 | static int mwl8k_load_fw_image(struct mwl8k_priv *priv, | |
620 | const u8 *data, size_t length) | |
621 | { | |
622 | struct mwl8k_cmd_pkt *cmd; | |
623 | int done; | |
624 | int rc = 0; | |
625 | ||
626 | cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL); | |
627 | if (cmd == NULL) | |
628 | return -ENOMEM; | |
629 | ||
630 | cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); | |
631 | cmd->seq_num = 0; | |
f57ca9c1 | 632 | cmd->macid = 0; |
a66098da LB |
633 | cmd->result = 0; |
634 | ||
635 | done = 0; | |
636 | while (length) { | |
637 | int block_size = length > 256 ? 256 : length; | |
638 | ||
639 | memcpy(cmd->payload, data + done, block_size); | |
640 | cmd->length = cpu_to_le16(block_size); | |
641 | ||
642 | rc = mwl8k_send_fw_load_cmd(priv, cmd, | |
643 | sizeof(*cmd) + block_size); | |
644 | if (rc) | |
645 | break; | |
646 | ||
647 | done += block_size; | |
648 | length -= block_size; | |
649 | } | |
650 | ||
651 | if (!rc) { | |
652 | cmd->length = 0; | |
653 | rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd)); | |
654 | } | |
655 | ||
656 | kfree(cmd); | |
657 | ||
658 | return rc; | |
659 | } | |
660 | ||
661 | static int mwl8k_feed_fw_image(struct mwl8k_priv *priv, | |
662 | const u8 *data, size_t length) | |
663 | { | |
664 | unsigned char *buffer; | |
665 | int may_continue, rc = 0; | |
666 | u32 done, prev_block_size; | |
667 | ||
668 | buffer = kmalloc(1024, GFP_KERNEL); | |
669 | if (buffer == NULL) | |
670 | return -ENOMEM; | |
671 | ||
672 | done = 0; | |
673 | prev_block_size = 0; | |
674 | may_continue = 1000; | |
675 | while (may_continue > 0) { | |
676 | u32 block_size; | |
677 | ||
678 | block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH); | |
679 | if (block_size & 1) { | |
680 | block_size &= ~1; | |
681 | may_continue--; | |
682 | } else { | |
683 | done += prev_block_size; | |
684 | length -= prev_block_size; | |
685 | } | |
686 | ||
687 | if (block_size > 1024 || block_size > length) { | |
688 | rc = -EOVERFLOW; | |
689 | break; | |
690 | } | |
691 | ||
692 | if (length == 0) { | |
693 | rc = 0; | |
694 | break; | |
695 | } | |
696 | ||
697 | if (block_size == 0) { | |
698 | rc = -EPROTO; | |
699 | may_continue--; | |
700 | udelay(1); | |
701 | continue; | |
702 | } | |
703 | ||
704 | prev_block_size = block_size; | |
705 | memcpy(buffer, data + done, block_size); | |
706 | ||
707 | rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size); | |
708 | if (rc) | |
709 | break; | |
710 | } | |
711 | ||
712 | if (!rc && length != 0) | |
713 | rc = -EREMOTEIO; | |
714 | ||
715 | kfree(buffer); | |
716 | ||
717 | return rc; | |
718 | } | |
719 | ||
c2c357ce | 720 | static int mwl8k_load_firmware(struct ieee80211_hw *hw) |
a66098da | 721 | { |
c2c357ce | 722 | struct mwl8k_priv *priv = hw->priv; |
d1f9e41d | 723 | const struct firmware *fw = priv->fw_ucode; |
c2c357ce LB |
724 | int rc; |
725 | int loops; | |
726 | ||
727 | if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) { | |
d1f9e41d | 728 | const struct firmware *helper = priv->fw_helper; |
a66098da | 729 | |
c2c357ce LB |
730 | if (helper == NULL) { |
731 | printk(KERN_ERR "%s: helper image needed but none " | |
732 | "given\n", pci_name(priv->pdev)); | |
733 | return -EINVAL; | |
734 | } | |
a66098da | 735 | |
c2c357ce | 736 | rc = mwl8k_load_fw_image(priv, helper->data, helper->size); |
a66098da LB |
737 | if (rc) { |
738 | printk(KERN_ERR "%s: unable to load firmware " | |
c2c357ce | 739 | "helper image\n", pci_name(priv->pdev)); |
a66098da LB |
740 | return rc; |
741 | } | |
ba30c4a5 | 742 | msleep(20); |
a66098da | 743 | |
c2c357ce | 744 | rc = mwl8k_feed_fw_image(priv, fw->data, fw->size); |
a66098da | 745 | } else { |
c2c357ce | 746 | rc = mwl8k_load_fw_image(priv, fw->data, fw->size); |
a66098da LB |
747 | } |
748 | ||
749 | if (rc) { | |
c2c357ce LB |
750 | printk(KERN_ERR "%s: unable to load firmware image\n", |
751 | pci_name(priv->pdev)); | |
a66098da LB |
752 | return rc; |
753 | } | |
754 | ||
89a91f4f | 755 | iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); |
a66098da | 756 | |
89b872e2 | 757 | loops = 500000; |
a66098da | 758 | do { |
eae74e65 LB |
759 | u32 ready_code; |
760 | ||
761 | ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
762 | if (ready_code == MWL8K_FWAP_READY) { | |
3db1cd5c | 763 | priv->ap_fw = true; |
eae74e65 LB |
764 | break; |
765 | } else if (ready_code == MWL8K_FWSTA_READY) { | |
3db1cd5c | 766 | priv->ap_fw = false; |
a66098da | 767 | break; |
eae74e65 LB |
768 | } |
769 | ||
770 | cond_resched(); | |
a66098da LB |
771 | udelay(1); |
772 | } while (--loops); | |
773 | ||
774 | return loops ? 0 : -ETIMEDOUT; | |
775 | } | |
776 | ||
777 | ||
a66098da LB |
778 | /* DMA header used by firmware and hardware. */ |
779 | struct mwl8k_dma_data { | |
780 | __le16 fwlen; | |
781 | struct ieee80211_hdr wh; | |
20f09c3d | 782 | char data[0]; |
ba2d3587 | 783 | } __packed; |
a66098da LB |
784 | |
785 | /* Routines to add/remove DMA header from skb. */ | |
20f09c3d | 786 | static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos) |
a66098da | 787 | { |
20f09c3d LB |
788 | struct mwl8k_dma_data *tr; |
789 | int hdrlen; | |
790 | ||
791 | tr = (struct mwl8k_dma_data *)skb->data; | |
792 | hdrlen = ieee80211_hdrlen(tr->wh.frame_control); | |
793 | ||
794 | if (hdrlen != sizeof(tr->wh)) { | |
795 | if (ieee80211_is_data_qos(tr->wh.frame_control)) { | |
796 | memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2); | |
797 | *((__le16 *)(tr->data - 2)) = qos; | |
798 | } else { | |
799 | memmove(tr->data - hdrlen, &tr->wh, hdrlen); | |
800 | } | |
a66098da | 801 | } |
20f09c3d LB |
802 | |
803 | if (hdrlen != sizeof(*tr)) | |
804 | skb_pull(skb, sizeof(*tr) - hdrlen); | |
a66098da LB |
805 | } |
806 | ||
ff776cec YAP |
807 | #define REDUCED_TX_HEADROOM 8 |
808 | ||
252486a1 | 809 | static void |
e4eefec7 YAP |
810 | mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb, |
811 | int head_pad, int tail_pad) | |
a66098da LB |
812 | { |
813 | struct ieee80211_hdr *wh; | |
ca009301 | 814 | int hdrlen; |
252486a1 | 815 | int reqd_hdrlen; |
a66098da LB |
816 | struct mwl8k_dma_data *tr; |
817 | ||
ca009301 LB |
818 | /* |
819 | * Add a firmware DMA header; the firmware requires that we | |
820 | * present a 2-byte payload length followed by a 4-address | |
821 | * header (without QoS field), followed (optionally) by any | |
822 | * WEP/ExtIV header (but only filled in for CCMP). | |
823 | */ | |
a66098da | 824 | wh = (struct ieee80211_hdr *)skb->data; |
ca009301 | 825 | |
a66098da | 826 | hdrlen = ieee80211_hdrlen(wh->frame_control); |
ff776cec YAP |
827 | |
828 | /* | |
829 | * Check if skb_resize is required because of | |
830 | * tx_headroom adjustment. | |
831 | */ | |
832 | if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts) | |
833 | + REDUCED_TX_HEADROOM))) { | |
834 | if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) { | |
835 | ||
836 | wiphy_err(priv->hw->wiphy, | |
837 | "Failed to reallocate TX buffer\n"); | |
838 | return; | |
839 | } | |
840 | skb->truesize += REDUCED_TX_HEADROOM; | |
841 | } | |
842 | ||
e4eefec7 | 843 | reqd_hdrlen = sizeof(*tr) + head_pad; |
252486a1 NS |
844 | |
845 | if (hdrlen != reqd_hdrlen) | |
846 | skb_push(skb, reqd_hdrlen - hdrlen); | |
a66098da | 847 | |
ca009301 | 848 | if (ieee80211_is_data_qos(wh->frame_control)) |
252486a1 | 849 | hdrlen -= IEEE80211_QOS_CTL_LEN; |
a66098da LB |
850 | |
851 | tr = (struct mwl8k_dma_data *)skb->data; | |
852 | if (wh != &tr->wh) | |
853 | memmove(&tr->wh, wh, hdrlen); | |
ca009301 LB |
854 | if (hdrlen != sizeof(tr->wh)) |
855 | memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen); | |
a66098da LB |
856 | |
857 | /* | |
858 | * Firmware length is the length of the fully formed "802.11 | |
859 | * payload". That is, everything except for the 802.11 header. | |
860 | * This includes all crypto material including the MIC. | |
861 | */ | |
252486a1 | 862 | tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad); |
a66098da LB |
863 | } |
864 | ||
ff776cec YAP |
865 | static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv, |
866 | struct sk_buff *skb) | |
e53d9b96 NS |
867 | { |
868 | struct ieee80211_hdr *wh; | |
869 | struct ieee80211_tx_info *tx_info; | |
870 | struct ieee80211_key_conf *key_conf; | |
871 | int data_pad; | |
e4eefec7 | 872 | int head_pad = 0; |
e53d9b96 NS |
873 | |
874 | wh = (struct ieee80211_hdr *)skb->data; | |
875 | ||
876 | tx_info = IEEE80211_SKB_CB(skb); | |
877 | ||
878 | key_conf = NULL; | |
879 | if (ieee80211_is_data(wh->frame_control)) | |
880 | key_conf = tx_info->control.hw_key; | |
881 | ||
882 | /* | |
883 | * Make sure the packet header is in the DMA header format (4-address | |
e4eefec7 | 884 | * without QoS), and add head & tail padding when HW crypto is enabled. |
e53d9b96 NS |
885 | * |
886 | * We have the following trailer padding requirements: | |
887 | * - WEP: 4 trailer bytes (ICV) | |
888 | * - TKIP: 12 trailer bytes (8 MIC + 4 ICV) | |
889 | * - CCMP: 8 trailer bytes (MIC) | |
890 | */ | |
891 | data_pad = 0; | |
892 | if (key_conf != NULL) { | |
e4eefec7 | 893 | head_pad = key_conf->iv_len; |
e53d9b96 NS |
894 | switch (key_conf->cipher) { |
895 | case WLAN_CIPHER_SUITE_WEP40: | |
896 | case WLAN_CIPHER_SUITE_WEP104: | |
897 | data_pad = 4; | |
898 | break; | |
899 | case WLAN_CIPHER_SUITE_TKIP: | |
900 | data_pad = 12; | |
901 | break; | |
902 | case WLAN_CIPHER_SUITE_CCMP: | |
903 | data_pad = 8; | |
904 | break; | |
905 | } | |
906 | } | |
e4eefec7 | 907 | mwl8k_add_dma_header(priv, skb, head_pad, data_pad); |
e53d9b96 | 908 | } |
a66098da LB |
909 | |
910 | /* | |
89a91f4f | 911 | * Packet reception for 88w8366 AP firmware. |
6f6d1e9a | 912 | */ |
89a91f4f | 913 | struct mwl8k_rxd_8366_ap { |
6f6d1e9a LB |
914 | __le16 pkt_len; |
915 | __u8 sq2; | |
916 | __u8 rate; | |
917 | __le32 pkt_phys_addr; | |
918 | __le32 next_rxd_phys_addr; | |
919 | __le16 qos_control; | |
920 | __le16 htsig2; | |
921 | __le32 hw_rssi_info; | |
922 | __le32 hw_noise_floor_info; | |
923 | __u8 noise_floor; | |
924 | __u8 pad0[3]; | |
925 | __u8 rssi; | |
926 | __u8 rx_status; | |
927 | __u8 channel; | |
928 | __u8 rx_ctrl; | |
ba2d3587 | 929 | } __packed; |
6f6d1e9a | 930 | |
89a91f4f LB |
931 | #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80 |
932 | #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40 | |
933 | #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f) | |
8e9f33f0 | 934 | |
89a91f4f | 935 | #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80 |
6f6d1e9a | 936 | |
d9a07d49 NS |
937 | /* 8366 AP rx_status bits */ |
938 | #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80 | |
939 | #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF | |
940 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02 | |
941 | #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04 | |
942 | #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08 | |
943 | ||
89a91f4f | 944 | static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr) |
6f6d1e9a | 945 | { |
89a91f4f | 946 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
947 | |
948 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 949 | rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST; |
6f6d1e9a LB |
950 | } |
951 | ||
89a91f4f | 952 | static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len) |
6f6d1e9a | 953 | { |
89a91f4f | 954 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a LB |
955 | |
956 | rxd->pkt_len = cpu_to_le16(len); | |
957 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
958 | wmb(); | |
959 | rxd->rx_ctrl = 0; | |
960 | } | |
961 | ||
962 | static int | |
89a91f4f | 963 | mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 964 | __le16 *qos, s8 *noise) |
6f6d1e9a | 965 | { |
89a91f4f | 966 | struct mwl8k_rxd_8366_ap *rxd = _rxd; |
6f6d1e9a | 967 | |
89a91f4f | 968 | if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST)) |
6f6d1e9a LB |
969 | return -1; |
970 | rmb(); | |
971 | ||
972 | memset(status, 0, sizeof(*status)); | |
973 | ||
974 | status->signal = -rxd->rssi; | |
0d462bbb | 975 | *noise = -rxd->noise_floor; |
6f6d1e9a | 976 | |
89a91f4f | 977 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) { |
6f6d1e9a | 978 | status->flag |= RX_FLAG_HT; |
89a91f4f | 979 | if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ) |
8e9f33f0 | 980 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 981 | status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate); |
6f6d1e9a LB |
982 | } else { |
983 | int i; | |
984 | ||
777ad375 LB |
985 | for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) { |
986 | if (mwl8k_rates_24[i].hw_value == rxd->rate) { | |
6f6d1e9a LB |
987 | status->rate_idx = i; |
988 | break; | |
989 | } | |
990 | } | |
991 | } | |
992 | ||
85478344 LB |
993 | if (rxd->channel > 14) { |
994 | status->band = IEEE80211_BAND_5GHZ; | |
995 | if (!(status->flag & RX_FLAG_HT)) | |
996 | status->rate_idx -= 5; | |
997 | } else { | |
998 | status->band = IEEE80211_BAND_2GHZ; | |
999 | } | |
59eb21a6 BR |
1000 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1001 | status->band); | |
6f6d1e9a | 1002 | |
20f09c3d LB |
1003 | *qos = rxd->qos_control; |
1004 | ||
d9a07d49 NS |
1005 | if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) && |
1006 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) && | |
1007 | (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR)) | |
1008 | status->flag |= RX_FLAG_MMIC_ERROR; | |
1009 | ||
6f6d1e9a LB |
1010 | return le16_to_cpu(rxd->pkt_len); |
1011 | } | |
1012 | ||
89a91f4f LB |
1013 | static struct rxd_ops rxd_8366_ap_ops = { |
1014 | .rxd_size = sizeof(struct mwl8k_rxd_8366_ap), | |
1015 | .rxd_init = mwl8k_rxd_8366_ap_init, | |
1016 | .rxd_refill = mwl8k_rxd_8366_ap_refill, | |
1017 | .rxd_process = mwl8k_rxd_8366_ap_process, | |
6f6d1e9a LB |
1018 | }; |
1019 | ||
1020 | /* | |
89a91f4f | 1021 | * Packet reception for STA firmware. |
a66098da | 1022 | */ |
89a91f4f | 1023 | struct mwl8k_rxd_sta { |
a66098da LB |
1024 | __le16 pkt_len; |
1025 | __u8 link_quality; | |
1026 | __u8 noise_level; | |
1027 | __le32 pkt_phys_addr; | |
45eb400d | 1028 | __le32 next_rxd_phys_addr; |
a66098da LB |
1029 | __le16 qos_control; |
1030 | __le16 rate_info; | |
1031 | __le32 pad0[4]; | |
1032 | __u8 rssi; | |
1033 | __u8 channel; | |
1034 | __le16 pad1; | |
1035 | __u8 rx_ctrl; | |
1036 | __u8 rx_status; | |
1037 | __u8 pad2[2]; | |
ba2d3587 | 1038 | } __packed; |
a66098da | 1039 | |
89a91f4f LB |
1040 | #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000 |
1041 | #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3) | |
1042 | #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f) | |
1043 | #define MWL8K_STA_RATE_INFO_40MHZ 0x0004 | |
1044 | #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002 | |
1045 | #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001 | |
54bc3a0d | 1046 | |
89a91f4f | 1047 | #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02 |
d9a07d49 NS |
1048 | #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04 |
1049 | /* ICV=0 or MIC=1 */ | |
1050 | #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08 | |
1051 | /* Key is uploaded only in failure case */ | |
1052 | #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30 | |
54bc3a0d | 1053 | |
89a91f4f | 1054 | static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr) |
54bc3a0d | 1055 | { |
89a91f4f | 1056 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1057 | |
1058 | rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr); | |
89a91f4f | 1059 | rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST; |
54bc3a0d LB |
1060 | } |
1061 | ||
89a91f4f | 1062 | static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len) |
54bc3a0d | 1063 | { |
89a91f4f | 1064 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1065 | |
1066 | rxd->pkt_len = cpu_to_le16(len); | |
1067 | rxd->pkt_phys_addr = cpu_to_le32(addr); | |
1068 | wmb(); | |
1069 | rxd->rx_ctrl = 0; | |
1070 | } | |
1071 | ||
1072 | static int | |
89a91f4f | 1073 | mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status, |
0d462bbb | 1074 | __le16 *qos, s8 *noise) |
54bc3a0d | 1075 | { |
89a91f4f | 1076 | struct mwl8k_rxd_sta *rxd = _rxd; |
54bc3a0d LB |
1077 | u16 rate_info; |
1078 | ||
89a91f4f | 1079 | if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST)) |
54bc3a0d LB |
1080 | return -1; |
1081 | rmb(); | |
1082 | ||
1083 | rate_info = le16_to_cpu(rxd->rate_info); | |
1084 | ||
1085 | memset(status, 0, sizeof(*status)); | |
1086 | ||
1087 | status->signal = -rxd->rssi; | |
0d462bbb | 1088 | *noise = -rxd->noise_level; |
89a91f4f LB |
1089 | status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info); |
1090 | status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info); | |
54bc3a0d | 1091 | |
89a91f4f | 1092 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE) |
54bc3a0d | 1093 | status->flag |= RX_FLAG_SHORTPRE; |
89a91f4f | 1094 | if (rate_info & MWL8K_STA_RATE_INFO_40MHZ) |
54bc3a0d | 1095 | status->flag |= RX_FLAG_40MHZ; |
89a91f4f | 1096 | if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI) |
54bc3a0d | 1097 | status->flag |= RX_FLAG_SHORT_GI; |
89a91f4f | 1098 | if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT) |
54bc3a0d LB |
1099 | status->flag |= RX_FLAG_HT; |
1100 | ||
85478344 LB |
1101 | if (rxd->channel > 14) { |
1102 | status->band = IEEE80211_BAND_5GHZ; | |
1103 | if (!(status->flag & RX_FLAG_HT)) | |
1104 | status->rate_idx -= 5; | |
1105 | } else { | |
1106 | status->band = IEEE80211_BAND_2GHZ; | |
1107 | } | |
59eb21a6 BR |
1108 | status->freq = ieee80211_channel_to_frequency(rxd->channel, |
1109 | status->band); | |
54bc3a0d | 1110 | |
20f09c3d | 1111 | *qos = rxd->qos_control; |
d9a07d49 NS |
1112 | if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) && |
1113 | (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE)) | |
1114 | status->flag |= RX_FLAG_MMIC_ERROR; | |
20f09c3d | 1115 | |
54bc3a0d LB |
1116 | return le16_to_cpu(rxd->pkt_len); |
1117 | } | |
1118 | ||
89a91f4f LB |
1119 | static struct rxd_ops rxd_sta_ops = { |
1120 | .rxd_size = sizeof(struct mwl8k_rxd_sta), | |
1121 | .rxd_init = mwl8k_rxd_sta_init, | |
1122 | .rxd_refill = mwl8k_rxd_sta_refill, | |
1123 | .rxd_process = mwl8k_rxd_sta_process, | |
54bc3a0d LB |
1124 | }; |
1125 | ||
1126 | ||
a66098da LB |
1127 | #define MWL8K_RX_DESCS 256 |
1128 | #define MWL8K_RX_MAXSZ 3800 | |
1129 | ||
1130 | static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |
1131 | { | |
1132 | struct mwl8k_priv *priv = hw->priv; | |
1133 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1134 | int size; | |
1135 | int i; | |
1136 | ||
45eb400d LB |
1137 | rxq->rxd_count = 0; |
1138 | rxq->head = 0; | |
1139 | rxq->tail = 0; | |
a66098da | 1140 | |
54bc3a0d | 1141 | size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size; |
a66098da | 1142 | |
45eb400d LB |
1143 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
1144 | if (rxq->rxd == NULL) { | |
5db55844 | 1145 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
a66098da LB |
1146 | return -ENOMEM; |
1147 | } | |
45eb400d | 1148 | memset(rxq->rxd, 0, size); |
a66098da | 1149 | |
b9ede5f1 | 1150 | rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL); |
788838eb | 1151 | if (rxq->buf == NULL) { |
5db55844 | 1152 | wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n"); |
45eb400d | 1153 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
a66098da LB |
1154 | return -ENOMEM; |
1155 | } | |
a66098da LB |
1156 | |
1157 | for (i = 0; i < MWL8K_RX_DESCS; i++) { | |
54bc3a0d LB |
1158 | int desc_size; |
1159 | void *rxd; | |
a66098da | 1160 | int nexti; |
54bc3a0d LB |
1161 | dma_addr_t next_dma_addr; |
1162 | ||
1163 | desc_size = priv->rxd_ops->rxd_size; | |
1164 | rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size); | |
a66098da | 1165 | |
54bc3a0d LB |
1166 | nexti = i + 1; |
1167 | if (nexti == MWL8K_RX_DESCS) | |
1168 | nexti = 0; | |
1169 | next_dma_addr = rxq->rxd_dma + (nexti * desc_size); | |
a66098da | 1170 | |
54bc3a0d | 1171 | priv->rxd_ops->rxd_init(rxd, next_dma_addr); |
a66098da LB |
1172 | } |
1173 | ||
1174 | return 0; | |
1175 | } | |
1176 | ||
1177 | static int rxq_refill(struct ieee80211_hw *hw, int index, int limit) | |
1178 | { | |
1179 | struct mwl8k_priv *priv = hw->priv; | |
1180 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1181 | int refilled; | |
1182 | ||
1183 | refilled = 0; | |
45eb400d | 1184 | while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) { |
a66098da | 1185 | struct sk_buff *skb; |
788838eb | 1186 | dma_addr_t addr; |
a66098da | 1187 | int rx; |
54bc3a0d | 1188 | void *rxd; |
a66098da LB |
1189 | |
1190 | skb = dev_alloc_skb(MWL8K_RX_MAXSZ); | |
1191 | if (skb == NULL) | |
1192 | break; | |
1193 | ||
788838eb LB |
1194 | addr = pci_map_single(priv->pdev, skb->data, |
1195 | MWL8K_RX_MAXSZ, DMA_FROM_DEVICE); | |
a66098da | 1196 | |
54bc3a0d LB |
1197 | rxq->rxd_count++; |
1198 | rx = rxq->tail++; | |
1199 | if (rxq->tail == MWL8K_RX_DESCS) | |
1200 | rxq->tail = 0; | |
788838eb | 1201 | rxq->buf[rx].skb = skb; |
53b1b3e1 | 1202 | dma_unmap_addr_set(&rxq->buf[rx], dma, addr); |
54bc3a0d LB |
1203 | |
1204 | rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size); | |
1205 | priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ); | |
a66098da LB |
1206 | |
1207 | refilled++; | |
1208 | } | |
1209 | ||
1210 | return refilled; | |
1211 | } | |
1212 | ||
1213 | /* Must be called only when the card's reception is completely halted */ | |
1214 | static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index) | |
1215 | { | |
1216 | struct mwl8k_priv *priv = hw->priv; | |
1217 | struct mwl8k_rx_queue *rxq = priv->rxq + index; | |
1218 | int i; | |
1219 | ||
73b46320 BC |
1220 | if (rxq->rxd == NULL) |
1221 | return; | |
1222 | ||
a66098da | 1223 | for (i = 0; i < MWL8K_RX_DESCS; i++) { |
788838eb LB |
1224 | if (rxq->buf[i].skb != NULL) { |
1225 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1226 | dma_unmap_addr(&rxq->buf[i], dma), |
788838eb | 1227 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1228 | dma_unmap_addr_set(&rxq->buf[i], dma, 0); |
788838eb LB |
1229 | |
1230 | kfree_skb(rxq->buf[i].skb); | |
1231 | rxq->buf[i].skb = NULL; | |
a66098da LB |
1232 | } |
1233 | } | |
1234 | ||
788838eb LB |
1235 | kfree(rxq->buf); |
1236 | rxq->buf = NULL; | |
a66098da LB |
1237 | |
1238 | pci_free_consistent(priv->pdev, | |
54bc3a0d | 1239 | MWL8K_RX_DESCS * priv->rxd_ops->rxd_size, |
45eb400d LB |
1240 | rxq->rxd, rxq->rxd_dma); |
1241 | rxq->rxd = NULL; | |
a66098da LB |
1242 | } |
1243 | ||
1244 | ||
1245 | /* | |
1246 | * Scan a list of BSSIDs to process for finalize join. | |
1247 | * Allows for extension to process multiple BSSIDs. | |
1248 | */ | |
1249 | static inline int | |
1250 | mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh) | |
1251 | { | |
1252 | return priv->capture_beacon && | |
1253 | ieee80211_is_beacon(wh->frame_control) && | |
2e42e474 | 1254 | ether_addr_equal(wh->addr3, priv->capture_bssid); |
a66098da LB |
1255 | } |
1256 | ||
3779752d LB |
1257 | static inline void mwl8k_save_beacon(struct ieee80211_hw *hw, |
1258 | struct sk_buff *skb) | |
a66098da | 1259 | { |
3779752d LB |
1260 | struct mwl8k_priv *priv = hw->priv; |
1261 | ||
a66098da | 1262 | priv->capture_beacon = false; |
d89173f2 | 1263 | memset(priv->capture_bssid, 0, ETH_ALEN); |
a66098da LB |
1264 | |
1265 | /* | |
1266 | * Use GFP_ATOMIC as rxq_process is called from | |
1267 | * the primary interrupt handler, memory allocation call | |
1268 | * must not sleep. | |
1269 | */ | |
1270 | priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); | |
1271 | if (priv->beacon_skb != NULL) | |
3779752d | 1272 | ieee80211_queue_work(hw, &priv->finalize_join_worker); |
a66098da LB |
1273 | } |
1274 | ||
d9a07d49 NS |
1275 | static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list, |
1276 | u8 *bssid) | |
1277 | { | |
1278 | struct mwl8k_vif *mwl8k_vif; | |
1279 | ||
1280 | list_for_each_entry(mwl8k_vif, | |
1281 | vif_list, list) { | |
1282 | if (memcmp(bssid, mwl8k_vif->bssid, | |
1283 | ETH_ALEN) == 0) | |
1284 | return mwl8k_vif; | |
1285 | } | |
1286 | ||
1287 | return NULL; | |
1288 | } | |
1289 | ||
a66098da LB |
1290 | static int rxq_process(struct ieee80211_hw *hw, int index, int limit) |
1291 | { | |
1292 | struct mwl8k_priv *priv = hw->priv; | |
d9a07d49 | 1293 | struct mwl8k_vif *mwl8k_vif = NULL; |
a66098da LB |
1294 | struct mwl8k_rx_queue *rxq = priv->rxq + index; |
1295 | int processed; | |
1296 | ||
1297 | processed = 0; | |
45eb400d | 1298 | while (rxq->rxd_count && limit--) { |
a66098da | 1299 | struct sk_buff *skb; |
54bc3a0d LB |
1300 | void *rxd; |
1301 | int pkt_len; | |
a66098da | 1302 | struct ieee80211_rx_status status; |
d9a07d49 | 1303 | struct ieee80211_hdr *wh; |
20f09c3d | 1304 | __le16 qos; |
a66098da | 1305 | |
788838eb | 1306 | skb = rxq->buf[rxq->head].skb; |
d25f9f13 LB |
1307 | if (skb == NULL) |
1308 | break; | |
54bc3a0d LB |
1309 | |
1310 | rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size); | |
1311 | ||
0d462bbb JL |
1312 | pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos, |
1313 | &priv->noise); | |
54bc3a0d LB |
1314 | if (pkt_len < 0) |
1315 | break; | |
1316 | ||
788838eb LB |
1317 | rxq->buf[rxq->head].skb = NULL; |
1318 | ||
1319 | pci_unmap_single(priv->pdev, | |
53b1b3e1 | 1320 | dma_unmap_addr(&rxq->buf[rxq->head], dma), |
788838eb | 1321 | MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); |
53b1b3e1 | 1322 | dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0); |
a66098da | 1323 | |
54bc3a0d LB |
1324 | rxq->head++; |
1325 | if (rxq->head == MWL8K_RX_DESCS) | |
1326 | rxq->head = 0; | |
1327 | ||
45eb400d | 1328 | rxq->rxd_count--; |
a66098da | 1329 | |
d9a07d49 | 1330 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da | 1331 | |
a66098da | 1332 | /* |
c2c357ce LB |
1333 | * Check for a pending join operation. Save a |
1334 | * copy of the beacon and schedule a tasklet to | |
1335 | * send a FINALIZE_JOIN command to the firmware. | |
a66098da | 1336 | */ |
54bc3a0d | 1337 | if (mwl8k_capture_bssid(priv, (void *)skb->data)) |
3779752d | 1338 | mwl8k_save_beacon(hw, skb); |
a66098da | 1339 | |
d9a07d49 NS |
1340 | if (ieee80211_has_protected(wh->frame_control)) { |
1341 | ||
1342 | /* Check if hw crypto has been enabled for | |
1343 | * this bss. If yes, set the status flags | |
1344 | * accordingly | |
1345 | */ | |
1346 | mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list, | |
1347 | wh->addr1); | |
1348 | ||
1349 | if (mwl8k_vif != NULL && | |
23677ce3 | 1350 | mwl8k_vif->is_hw_crypto_enabled) { |
d9a07d49 NS |
1351 | /* |
1352 | * When MMIC ERROR is encountered | |
1353 | * by the firmware, payload is | |
1354 | * dropped and only 32 bytes of | |
1355 | * mwl8k Firmware header is sent | |
1356 | * to the host. | |
1357 | * | |
1358 | * We need to add four bytes of | |
1359 | * key information. In it | |
1360 | * MAC80211 expects keyidx set to | |
1361 | * 0 for triggering Counter | |
1362 | * Measure of MMIC failure. | |
1363 | */ | |
1364 | if (status.flag & RX_FLAG_MMIC_ERROR) { | |
1365 | struct mwl8k_dma_data *tr; | |
1366 | tr = (struct mwl8k_dma_data *)skb->data; | |
1367 | memset((void *)&(tr->data), 0, 4); | |
1368 | pkt_len += 4; | |
1369 | } | |
1370 | ||
1371 | if (!ieee80211_is_auth(wh->frame_control)) | |
1372 | status.flag |= RX_FLAG_IV_STRIPPED | | |
1373 | RX_FLAG_DECRYPTED | | |
1374 | RX_FLAG_MMIC_STRIPPED; | |
1375 | } | |
1376 | } | |
1377 | ||
1378 | skb_put(skb, pkt_len); | |
1379 | mwl8k_remove_dma_header(skb, qos); | |
f1d58c25 JB |
1380 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); |
1381 | ieee80211_rx_irqsafe(hw, skb); | |
a66098da LB |
1382 | |
1383 | processed++; | |
1384 | } | |
1385 | ||
1386 | return processed; | |
1387 | } | |
1388 | ||
1389 | ||
1390 | /* | |
1391 | * Packet transmission. | |
1392 | */ | |
1393 | ||
a66098da LB |
1394 | #define MWL8K_TXD_STATUS_OK 0x00000001 |
1395 | #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 | |
1396 | #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 | |
1397 | #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 | |
a66098da | 1398 | #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 |
a66098da | 1399 | |
e0493a8d LB |
1400 | #define MWL8K_QOS_QLEN_UNSPEC 0xff00 |
1401 | #define MWL8K_QOS_ACK_POLICY_MASK 0x0060 | |
1402 | #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000 | |
1403 | #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060 | |
1404 | #define MWL8K_QOS_EOSP 0x0010 | |
1405 | ||
a66098da LB |
1406 | struct mwl8k_tx_desc { |
1407 | __le32 status; | |
1408 | __u8 data_rate; | |
1409 | __u8 tx_priority; | |
1410 | __le16 qos_control; | |
1411 | __le32 pkt_phys_addr; | |
1412 | __le16 pkt_len; | |
d89173f2 | 1413 | __u8 dest_MAC_addr[ETH_ALEN]; |
45eb400d | 1414 | __le32 next_txd_phys_addr; |
8a7a578c | 1415 | __le32 timestamp; |
a66098da LB |
1416 | __le16 rate_info; |
1417 | __u8 peer_id; | |
a1fe24b0 | 1418 | __u8 tx_frag_cnt; |
ba2d3587 | 1419 | } __packed; |
a66098da LB |
1420 | |
1421 | #define MWL8K_TX_DESCS 128 | |
1422 | ||
1423 | static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |
1424 | { | |
1425 | struct mwl8k_priv *priv = hw->priv; | |
1426 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1427 | int size; | |
1428 | int i; | |
1429 | ||
8ccbc3b8 | 1430 | txq->len = 0; |
45eb400d LB |
1431 | txq->head = 0; |
1432 | txq->tail = 0; | |
a66098da LB |
1433 | |
1434 | size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); | |
1435 | ||
45eb400d LB |
1436 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1437 | if (txq->txd == NULL) { | |
5db55844 | 1438 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
a66098da LB |
1439 | return -ENOMEM; |
1440 | } | |
45eb400d | 1441 | memset(txq->txd, 0, size); |
a66098da | 1442 | |
b9ede5f1 | 1443 | txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL); |
45eb400d | 1444 | if (txq->skb == NULL) { |
5db55844 | 1445 | wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n"); |
45eb400d | 1446 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
a66098da LB |
1447 | return -ENOMEM; |
1448 | } | |
a66098da LB |
1449 | |
1450 | for (i = 0; i < MWL8K_TX_DESCS; i++) { | |
1451 | struct mwl8k_tx_desc *tx_desc; | |
1452 | int nexti; | |
1453 | ||
45eb400d | 1454 | tx_desc = txq->txd + i; |
a66098da LB |
1455 | nexti = (i + 1) % MWL8K_TX_DESCS; |
1456 | ||
1457 | tx_desc->status = 0; | |
45eb400d LB |
1458 | tx_desc->next_txd_phys_addr = |
1459 | cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc)); | |
a66098da LB |
1460 | } |
1461 | ||
1462 | return 0; | |
1463 | } | |
1464 | ||
1465 | static inline void mwl8k_tx_start(struct mwl8k_priv *priv) | |
1466 | { | |
1467 | iowrite32(MWL8K_H2A_INT_PPA_READY, | |
1468 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1469 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
1470 | priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
1471 | ioread32(priv->regs + MWL8K_HIU_INT_CODE); | |
1472 | } | |
1473 | ||
7e1112d3 | 1474 | static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw) |
a66098da | 1475 | { |
7e1112d3 LB |
1476 | struct mwl8k_priv *priv = hw->priv; |
1477 | int i; | |
1478 | ||
e600707b | 1479 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
7e1112d3 LB |
1480 | struct mwl8k_tx_queue *txq = priv->txq + i; |
1481 | int fw_owned = 0; | |
1482 | int drv_owned = 0; | |
1483 | int unused = 0; | |
1484 | int desc; | |
1485 | ||
a66098da | 1486 | for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { |
7e1112d3 LB |
1487 | struct mwl8k_tx_desc *tx_desc = txq->txd + desc; |
1488 | u32 status; | |
a66098da | 1489 | |
7e1112d3 | 1490 | status = le32_to_cpu(tx_desc->status); |
a66098da | 1491 | if (status & MWL8K_TXD_STATUS_FW_OWNED) |
7e1112d3 | 1492 | fw_owned++; |
a66098da | 1493 | else |
7e1112d3 | 1494 | drv_owned++; |
a66098da LB |
1495 | |
1496 | if (tx_desc->pkt_len == 0) | |
7e1112d3 | 1497 | unused++; |
a66098da | 1498 | } |
a66098da | 1499 | |
c96c31e4 JP |
1500 | wiphy_err(hw->wiphy, |
1501 | "txq[%d] len=%d head=%d tail=%d " | |
1502 | "fw_owned=%d drv_owned=%d unused=%d\n", | |
1503 | i, | |
1504 | txq->len, txq->head, txq->tail, | |
1505 | fw_owned, drv_owned, unused); | |
7e1112d3 | 1506 | } |
a66098da LB |
1507 | } |
1508 | ||
618952a7 | 1509 | /* |
88de754a | 1510 | * Must be called with priv->fw_mutex held and tx queues stopped. |
618952a7 | 1511 | */ |
62abd3cf | 1512 | #define MWL8K_TX_WAIT_TIMEOUT_MS 5000 |
7e1112d3 | 1513 | |
950d5b01 | 1514 | static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) |
a66098da | 1515 | { |
a66098da | 1516 | struct mwl8k_priv *priv = hw->priv; |
88de754a | 1517 | DECLARE_COMPLETION_ONSTACK(tx_wait); |
7e1112d3 LB |
1518 | int retry; |
1519 | int rc; | |
a66098da LB |
1520 | |
1521 | might_sleep(); | |
1522 | ||
6b6accc3 YAP |
1523 | /* Since fw restart is in progress, allow only the firmware |
1524 | * commands from the restart code and block the other | |
1525 | * commands since they are going to fail in any case since | |
1526 | * the firmware has crashed | |
1527 | */ | |
1528 | if (priv->hw_restart_in_progress) { | |
1529 | if (priv->hw_restart_owner == current) | |
1530 | return 0; | |
1531 | else | |
1532 | return -EBUSY; | |
1533 | } | |
1534 | ||
c27a54d3 YAP |
1535 | if (atomic_read(&priv->watchdog_event_pending)) |
1536 | return 0; | |
1537 | ||
7e1112d3 LB |
1538 | /* |
1539 | * The TX queues are stopped at this point, so this test | |
1540 | * doesn't need to take ->tx_lock. | |
1541 | */ | |
1542 | if (!priv->pending_tx_pkts) | |
1543 | return 0; | |
1544 | ||
1545 | retry = 0; | |
1546 | rc = 0; | |
1547 | ||
a66098da | 1548 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1549 | priv->tx_wait = &tx_wait; |
1550 | while (!rc) { | |
1551 | int oldcount; | |
1552 | unsigned long timeout; | |
a66098da | 1553 | |
7e1112d3 | 1554 | oldcount = priv->pending_tx_pkts; |
a66098da | 1555 | |
7e1112d3 | 1556 | spin_unlock_bh(&priv->tx_lock); |
88de754a | 1557 | timeout = wait_for_completion_timeout(&tx_wait, |
7e1112d3 | 1558 | msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS)); |
c27a54d3 YAP |
1559 | |
1560 | if (atomic_read(&priv->watchdog_event_pending)) { | |
1561 | spin_lock_bh(&priv->tx_lock); | |
1562 | priv->tx_wait = NULL; | |
1563 | spin_unlock_bh(&priv->tx_lock); | |
1564 | return 0; | |
1565 | } | |
1566 | ||
a66098da | 1567 | spin_lock_bh(&priv->tx_lock); |
7e1112d3 LB |
1568 | |
1569 | if (timeout) { | |
1570 | WARN_ON(priv->pending_tx_pkts); | |
ba30c4a5 | 1571 | if (retry) |
c96c31e4 | 1572 | wiphy_notice(hw->wiphy, "tx rings drained\n"); |
7e1112d3 LB |
1573 | break; |
1574 | } | |
1575 | ||
1576 | if (priv->pending_tx_pkts < oldcount) { | |
c96c31e4 JP |
1577 | wiphy_notice(hw->wiphy, |
1578 | "waiting for tx rings to drain (%d -> %d pkts)\n", | |
1579 | oldcount, priv->pending_tx_pkts); | |
7e1112d3 LB |
1580 | retry = 1; |
1581 | continue; | |
1582 | } | |
1583 | ||
a66098da | 1584 | priv->tx_wait = NULL; |
a66098da | 1585 | |
c96c31e4 JP |
1586 | wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n", |
1587 | MWL8K_TX_WAIT_TIMEOUT_MS); | |
7e1112d3 | 1588 | mwl8k_dump_tx_rings(hw); |
6b6accc3 YAP |
1589 | priv->hw_restart_in_progress = true; |
1590 | ieee80211_queue_work(hw, &priv->fw_reload); | |
7e1112d3 LB |
1591 | |
1592 | rc = -ETIMEDOUT; | |
a66098da | 1593 | } |
9b0b11fb | 1594 | priv->tx_wait = NULL; |
7e1112d3 | 1595 | spin_unlock_bh(&priv->tx_lock); |
a66098da | 1596 | |
7e1112d3 | 1597 | return rc; |
a66098da LB |
1598 | } |
1599 | ||
c23b5a69 LB |
1600 | #define MWL8K_TXD_SUCCESS(status) \ |
1601 | ((status) & (MWL8K_TXD_STATUS_OK | \ | |
1602 | MWL8K_TXD_STATUS_OK_RETRY | \ | |
1603 | MWL8K_TXD_STATUS_OK_MORE_RETRY)) | |
a66098da | 1604 | |
a0e7c6cf NS |
1605 | static int mwl8k_tid_queue_mapping(u8 tid) |
1606 | { | |
1607 | BUG_ON(tid > 7); | |
1608 | ||
1609 | switch (tid) { | |
1610 | case 0: | |
1611 | case 3: | |
1612 | return IEEE80211_AC_BE; | |
1613 | break; | |
1614 | case 1: | |
1615 | case 2: | |
1616 | return IEEE80211_AC_BK; | |
1617 | break; | |
1618 | case 4: | |
1619 | case 5: | |
1620 | return IEEE80211_AC_VI; | |
1621 | break; | |
1622 | case 6: | |
1623 | case 7: | |
1624 | return IEEE80211_AC_VO; | |
1625 | break; | |
1626 | default: | |
1627 | return -1; | |
1628 | break; | |
1629 | } | |
1630 | } | |
1631 | ||
17033543 NS |
1632 | /* The firmware will fill in the rate information |
1633 | * for each packet that gets queued in the hardware | |
49adc5ce | 1634 | * and these macros will interpret that info. |
17033543 NS |
1635 | */ |
1636 | ||
49adc5ce JL |
1637 | #define RI_FORMAT(a) (a & 0x0001) |
1638 | #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3) | |
17033543 | 1639 | |
efb7c49a LB |
1640 | static int |
1641 | mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force) | |
a66098da LB |
1642 | { |
1643 | struct mwl8k_priv *priv = hw->priv; | |
1644 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
efb7c49a | 1645 | int processed; |
a66098da | 1646 | |
efb7c49a | 1647 | processed = 0; |
8ccbc3b8 | 1648 | while (txq->len > 0 && limit--) { |
a66098da | 1649 | int tx; |
a66098da LB |
1650 | struct mwl8k_tx_desc *tx_desc; |
1651 | unsigned long addr; | |
ce9e2e1b | 1652 | int size; |
a66098da LB |
1653 | struct sk_buff *skb; |
1654 | struct ieee80211_tx_info *info; | |
1655 | u32 status; | |
17033543 NS |
1656 | struct ieee80211_sta *sta; |
1657 | struct mwl8k_sta *sta_info = NULL; | |
1658 | u16 rate_info; | |
17033543 | 1659 | struct ieee80211_hdr *wh; |
a66098da | 1660 | |
45eb400d LB |
1661 | tx = txq->head; |
1662 | tx_desc = txq->txd + tx; | |
a66098da LB |
1663 | |
1664 | status = le32_to_cpu(tx_desc->status); | |
1665 | ||
1666 | if (status & MWL8K_TXD_STATUS_FW_OWNED) { | |
1667 | if (!force) | |
1668 | break; | |
1669 | tx_desc->status &= | |
1670 | ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); | |
1671 | } | |
1672 | ||
45eb400d | 1673 | txq->head = (tx + 1) % MWL8K_TX_DESCS; |
8ccbc3b8 KV |
1674 | BUG_ON(txq->len == 0); |
1675 | txq->len--; | |
a66098da LB |
1676 | priv->pending_tx_pkts--; |
1677 | ||
1678 | addr = le32_to_cpu(tx_desc->pkt_phys_addr); | |
ce9e2e1b | 1679 | size = le16_to_cpu(tx_desc->pkt_len); |
45eb400d LB |
1680 | skb = txq->skb[tx]; |
1681 | txq->skb[tx] = NULL; | |
a66098da LB |
1682 | |
1683 | BUG_ON(skb == NULL); | |
1684 | pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); | |
1685 | ||
20f09c3d | 1686 | mwl8k_remove_dma_header(skb, tx_desc->qos_control); |
a66098da | 1687 | |
17033543 NS |
1688 | wh = (struct ieee80211_hdr *) skb->data; |
1689 | ||
a66098da LB |
1690 | /* Mark descriptor as unused */ |
1691 | tx_desc->pkt_phys_addr = 0; | |
1692 | tx_desc->pkt_len = 0; | |
1693 | ||
a66098da | 1694 | info = IEEE80211_SKB_CB(skb); |
17033543 | 1695 | if (ieee80211_is_data(wh->frame_control)) { |
89e11801 TH |
1696 | rcu_read_lock(); |
1697 | sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1, | |
1698 | wh->addr2); | |
17033543 NS |
1699 | if (sta) { |
1700 | sta_info = MWL8K_STA(sta); | |
1701 | BUG_ON(sta_info == NULL); | |
1702 | rate_info = le16_to_cpu(tx_desc->rate_info); | |
17033543 NS |
1703 | /* If rate is < 6.5 Mpbs for an ht station |
1704 | * do not form an ampdu. If the station is a | |
1705 | * legacy station (format = 0), do not form an | |
1706 | * ampdu | |
1707 | */ | |
49adc5ce JL |
1708 | if (RI_RATE_ID_MCS(rate_info) < 1 || |
1709 | RI_FORMAT(rate_info) == 0) { | |
17033543 NS |
1710 | sta_info->is_ampdu_allowed = false; |
1711 | } else { | |
1712 | sta_info->is_ampdu_allowed = true; | |
1713 | } | |
1714 | } | |
89e11801 | 1715 | rcu_read_unlock(); |
17033543 NS |
1716 | } |
1717 | ||
a66098da | 1718 | ieee80211_tx_info_clear_status(info); |
0bf22c37 NS |
1719 | |
1720 | /* Rate control is happening in the firmware. | |
1721 | * Ensure no tx rate is being reported. | |
1722 | */ | |
ba30c4a5 YAP |
1723 | info->status.rates[0].idx = -1; |
1724 | info->status.rates[0].count = 1; | |
0bf22c37 | 1725 | |
ce9e2e1b | 1726 | if (MWL8K_TXD_SUCCESS(status)) |
a66098da | 1727 | info->flags |= IEEE80211_TX_STAT_ACK; |
a66098da LB |
1728 | |
1729 | ieee80211_tx_status_irqsafe(hw, skb); | |
1730 | ||
efb7c49a | 1731 | processed++; |
a66098da LB |
1732 | } |
1733 | ||
efb7c49a | 1734 | return processed; |
a66098da LB |
1735 | } |
1736 | ||
1737 | /* must be called only when the card's transmit is completely halted */ | |
1738 | static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index) | |
1739 | { | |
1740 | struct mwl8k_priv *priv = hw->priv; | |
1741 | struct mwl8k_tx_queue *txq = priv->txq + index; | |
1742 | ||
73b46320 BC |
1743 | if (txq->txd == NULL) |
1744 | return; | |
1745 | ||
efb7c49a | 1746 | mwl8k_txq_reclaim(hw, index, INT_MAX, 1); |
a66098da | 1747 | |
45eb400d LB |
1748 | kfree(txq->skb); |
1749 | txq->skb = NULL; | |
a66098da LB |
1750 | |
1751 | pci_free_consistent(priv->pdev, | |
1752 | MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), | |
45eb400d LB |
1753 | txq->txd, txq->txd_dma); |
1754 | txq->txd = NULL; | |
a66098da LB |
1755 | } |
1756 | ||
ac109fd0 | 1757 | /* caller must hold priv->stream_lock when calling the stream functions */ |
ba30c4a5 | 1758 | static struct mwl8k_ampdu_stream * |
ac109fd0 BC |
1759 | mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid) |
1760 | { | |
1761 | struct mwl8k_ampdu_stream *stream; | |
1762 | struct mwl8k_priv *priv = hw->priv; | |
1763 | int i; | |
1764 | ||
7fb978b7 | 1765 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1766 | stream = &priv->ampdu[i]; |
1767 | if (stream->state == AMPDU_NO_STREAM) { | |
1768 | stream->sta = sta; | |
1769 | stream->state = AMPDU_STREAM_NEW; | |
1770 | stream->tid = tid; | |
1771 | stream->idx = i; | |
ac109fd0 BC |
1772 | wiphy_debug(hw->wiphy, "Added a new stream for %pM %d", |
1773 | sta->addr, tid); | |
1774 | return stream; | |
1775 | } | |
1776 | } | |
1777 | return NULL; | |
1778 | } | |
1779 | ||
1780 | static int | |
1781 | mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1782 | { | |
1783 | int ret; | |
1784 | ||
1785 | /* if the stream has already been started, don't start it again */ | |
1786 | if (stream->state != AMPDU_STREAM_NEW) | |
1787 | return 0; | |
1788 | ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0); | |
1789 | if (ret) | |
1790 | wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: " | |
1791 | "%d\n", stream->sta->addr, stream->tid, ret); | |
1792 | else | |
1793 | wiphy_debug(hw->wiphy, "Started stream for %pM %d\n", | |
1794 | stream->sta->addr, stream->tid); | |
1795 | return ret; | |
1796 | } | |
1797 | ||
1798 | static void | |
1799 | mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream) | |
1800 | { | |
1801 | wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr, | |
1802 | stream->tid); | |
1803 | memset(stream, 0, sizeof(*stream)); | |
1804 | } | |
1805 | ||
1806 | static struct mwl8k_ampdu_stream * | |
1807 | mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid) | |
1808 | { | |
1809 | struct mwl8k_priv *priv = hw->priv; | |
1810 | int i; | |
1811 | ||
7fb978b7 | 1812 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { |
ac109fd0 BC |
1813 | struct mwl8k_ampdu_stream *stream; |
1814 | stream = &priv->ampdu[i]; | |
1815 | if (stream->state == AMPDU_NO_STREAM) | |
1816 | continue; | |
1817 | if (!memcmp(stream->sta->addr, addr, ETH_ALEN) && | |
1818 | stream->tid == tid) | |
1819 | return stream; | |
1820 | } | |
1821 | return NULL; | |
1822 | } | |
1823 | ||
d0805c1c BC |
1824 | #define MWL8K_AMPDU_PACKET_THRESHOLD 64 |
1825 | static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid) | |
1826 | { | |
1827 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1828 | struct tx_traffic_info *tx_stats; | |
1829 | ||
1830 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1831 | tx_stats = &sta_info->tx_stats[tid]; | |
1832 | ||
1833 | return sta_info->is_ampdu_allowed && | |
1834 | tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD; | |
1835 | } | |
1836 | ||
1837 | static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid) | |
1838 | { | |
1839 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); | |
1840 | struct tx_traffic_info *tx_stats; | |
1841 | ||
1842 | BUG_ON(tid >= MWL8K_MAX_TID); | |
1843 | tx_stats = &sta_info->tx_stats[tid]; | |
1844 | ||
1845 | if (tx_stats->start_time == 0) | |
1846 | tx_stats->start_time = jiffies; | |
1847 | ||
1848 | /* reset the packet count after each second elapses. If the number of | |
1849 | * packets ever exceeds the ampdu_min_traffic threshold, we will allow | |
1850 | * an ampdu stream to be started. | |
1851 | */ | |
1852 | if (jiffies - tx_stats->start_time > HZ) { | |
1853 | tx_stats->pkts = 0; | |
1854 | tx_stats->start_time = 0; | |
1855 | } else | |
1856 | tx_stats->pkts++; | |
1857 | } | |
1858 | ||
7fb978b7 YAP |
1859 | /* The hardware ampdu queues start from 5. |
1860 | * txpriorities for ampdu queues are | |
1861 | * 5 6 7 0 1 2 3 4 ie., queue 5 is highest | |
1862 | * and queue 3 is lowest (queue 4 is reserved) | |
1863 | */ | |
1864 | #define BA_QUEUE 5 | |
1865 | ||
7bb45683 | 1866 | static void |
36323f81 TH |
1867 | mwl8k_txq_xmit(struct ieee80211_hw *hw, |
1868 | int index, | |
1869 | struct ieee80211_sta *sta, | |
1870 | struct sk_buff *skb) | |
a66098da LB |
1871 | { |
1872 | struct mwl8k_priv *priv = hw->priv; | |
1873 | struct ieee80211_tx_info *tx_info; | |
23b33906 | 1874 | struct mwl8k_vif *mwl8k_vif; |
a66098da LB |
1875 | struct ieee80211_hdr *wh; |
1876 | struct mwl8k_tx_queue *txq; | |
1877 | struct mwl8k_tx_desc *tx; | |
a66098da | 1878 | dma_addr_t dma; |
23b33906 LB |
1879 | u32 txstatus; |
1880 | u8 txdatarate; | |
1881 | u16 qos; | |
65f3ddcd NS |
1882 | int txpriority; |
1883 | u8 tid = 0; | |
1884 | struct mwl8k_ampdu_stream *stream = NULL; | |
1885 | bool start_ba_session = false; | |
3a769888 | 1886 | bool mgmtframe = false; |
a0e7c6cf | 1887 | struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; |
e1f4d69b | 1888 | bool eapol_frame = false; |
a66098da | 1889 | |
23b33906 LB |
1890 | wh = (struct ieee80211_hdr *)skb->data; |
1891 | if (ieee80211_is_data_qos(wh->frame_control)) | |
1892 | qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh))); | |
1893 | else | |
1894 | qos = 0; | |
a66098da | 1895 | |
e1f4d69b NS |
1896 | if (skb->protocol == cpu_to_be16(ETH_P_PAE)) |
1897 | eapol_frame = true; | |
1898 | ||
3a769888 NS |
1899 | if (ieee80211_is_mgmt(wh->frame_control)) |
1900 | mgmtframe = true; | |
1901 | ||
d9a07d49 | 1902 | if (priv->ap_fw) |
ff776cec | 1903 | mwl8k_encapsulate_tx_frame(priv, skb); |
d9a07d49 | 1904 | else |
e4eefec7 | 1905 | mwl8k_add_dma_header(priv, skb, 0, 0); |
d9a07d49 | 1906 | |
23b33906 | 1907 | wh = &((struct mwl8k_dma_data *)skb->data)->wh; |
a66098da LB |
1908 | |
1909 | tx_info = IEEE80211_SKB_CB(skb); | |
1910 | mwl8k_vif = MWL8K_VIF(tx_info->control.vif); | |
a66098da LB |
1911 | |
1912 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
a66098da | 1913 | wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); |
657232b6 LB |
1914 | wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno); |
1915 | mwl8k_vif->seqno += 0x10; | |
a66098da LB |
1916 | } |
1917 | ||
23b33906 LB |
1918 | /* Setup firmware control bit fields for each frame type. */ |
1919 | txstatus = 0; | |
1920 | txdatarate = 0; | |
1921 | if (ieee80211_is_mgmt(wh->frame_control) || | |
1922 | ieee80211_is_ctl(wh->frame_control)) { | |
1923 | txdatarate = 0; | |
e0493a8d | 1924 | qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP; |
23b33906 LB |
1925 | } else if (ieee80211_is_data(wh->frame_control)) { |
1926 | txdatarate = 1; | |
1927 | if (is_multicast_ether_addr(wh->addr1)) | |
1928 | txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; | |
1929 | ||
e0493a8d | 1930 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; |
23b33906 | 1931 | if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) |
e0493a8d | 1932 | qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK; |
23b33906 | 1933 | else |
e0493a8d | 1934 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; |
23b33906 | 1935 | } |
a66098da | 1936 | |
a0e7c6cf NS |
1937 | /* Queue ADDBA request in the respective data queue. While setting up |
1938 | * the ampdu stream, mac80211 queues further packets for that | |
1939 | * particular ra/tid pair. However, packets piled up in the hardware | |
1940 | * for that ra/tid pair will still go out. ADDBA request and the | |
1941 | * related data packets going out from different queues asynchronously | |
1942 | * will cause a shift in the receiver window which might result in | |
1943 | * ampdu packets getting dropped at the receiver after the stream has | |
1944 | * been setup. | |
1945 | */ | |
1946 | if (unlikely(ieee80211_is_action(wh->frame_control) && | |
1947 | mgmt->u.action.category == WLAN_CATEGORY_BACK && | |
1948 | mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ && | |
1949 | priv->ap_fw)) { | |
1950 | u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab); | |
1951 | tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2; | |
1952 | index = mwl8k_tid_queue_mapping(tid); | |
1953 | } | |
1954 | ||
65f3ddcd NS |
1955 | txpriority = index; |
1956 | ||
e1f4d69b NS |
1957 | if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame && |
1958 | ieee80211_is_data_qos(wh->frame_control)) { | |
65f3ddcd | 1959 | tid = qos & 0xf; |
d0805c1c | 1960 | mwl8k_tx_count_packet(sta, tid); |
65f3ddcd NS |
1961 | spin_lock(&priv->stream_lock); |
1962 | stream = mwl8k_lookup_stream(hw, sta->addr, tid); | |
1963 | if (stream != NULL) { | |
1964 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
5f2a1494 | 1965 | WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK)); |
7fb978b7 YAP |
1966 | txpriority = (BA_QUEUE + stream->idx) % |
1967 | TOTAL_HW_TX_QUEUES; | |
1968 | if (stream->idx <= 1) | |
1969 | index = stream->idx + | |
1970 | MWL8K_TX_WMM_QUEUES; | |
1971 | ||
65f3ddcd NS |
1972 | } else if (stream->state == AMPDU_STREAM_NEW) { |
1973 | /* We get here if the driver sends us packets | |
1974 | * after we've initiated a stream, but before | |
1975 | * our ampdu_action routine has been called | |
1976 | * with IEEE80211_AMPDU_TX_START to get the SSN | |
1977 | * for the ADDBA request. So this packet can | |
1978 | * go out with no risk of sequence number | |
1979 | * mismatch. No special handling is required. | |
1980 | */ | |
1981 | } else { | |
1982 | /* Drop packets that would go out after the | |
1983 | * ADDBA request was sent but before the ADDBA | |
1984 | * response is received. If we don't do this, | |
1985 | * the recipient would probably receive it | |
1986 | * after the ADDBA request with SSN 0. This | |
1987 | * will cause the recipient's BA receive window | |
1988 | * to shift, which would cause the subsequent | |
1989 | * packets in the BA stream to be discarded. | |
1990 | * mac80211 queues our packets for us in this | |
1991 | * case, so this is really just a safety check. | |
1992 | */ | |
1993 | wiphy_warn(hw->wiphy, | |
1994 | "Cannot send packet while ADDBA " | |
1995 | "dialog is underway.\n"); | |
1996 | spin_unlock(&priv->stream_lock); | |
1997 | dev_kfree_skb(skb); | |
1998 | return; | |
1999 | } | |
2000 | } else { | |
2001 | /* Defer calling mwl8k_start_stream so that the current | |
2002 | * skb can go out before the ADDBA request. This | |
2003 | * prevents sequence number mismatch at the recepient | |
2004 | * as described above. | |
2005 | */ | |
d0805c1c | 2006 | if (mwl8k_ampdu_allowed(sta, tid)) { |
17033543 NS |
2007 | stream = mwl8k_add_stream(hw, sta, tid); |
2008 | if (stream != NULL) | |
2009 | start_ba_session = true; | |
2010 | } | |
65f3ddcd NS |
2011 | } |
2012 | spin_unlock(&priv->stream_lock); | |
5f2a1494 YAP |
2013 | } else { |
2014 | qos &= ~MWL8K_QOS_ACK_POLICY_MASK; | |
2015 | qos |= MWL8K_QOS_ACK_POLICY_NORMAL; | |
65f3ddcd NS |
2016 | } |
2017 | ||
a66098da LB |
2018 | dma = pci_map_single(priv->pdev, skb->data, |
2019 | skb->len, PCI_DMA_TODEVICE); | |
2020 | ||
2021 | if (pci_dma_mapping_error(priv->pdev, dma)) { | |
c96c31e4 JP |
2022 | wiphy_debug(hw->wiphy, |
2023 | "failed to dma map skb, dropping TX frame.\n"); | |
65f3ddcd NS |
2024 | if (start_ba_session) { |
2025 | spin_lock(&priv->stream_lock); | |
2026 | mwl8k_remove_stream(hw, stream); | |
2027 | spin_unlock(&priv->stream_lock); | |
2028 | } | |
23b33906 | 2029 | dev_kfree_skb(skb); |
7bb45683 | 2030 | return; |
a66098da LB |
2031 | } |
2032 | ||
23b33906 | 2033 | spin_lock_bh(&priv->tx_lock); |
a66098da | 2034 | |
23b33906 | 2035 | txq = priv->txq + index; |
a66098da | 2036 | |
3a769888 NS |
2037 | /* Mgmt frames that go out frequently are probe |
2038 | * responses. Other mgmt frames got out relatively | |
2039 | * infrequently. Hence reserve 2 buffers so that | |
2040 | * other mgmt frames do not get dropped due to an | |
2041 | * already queued probe response in one of the | |
2042 | * reserved buffers. | |
2043 | */ | |
2044 | ||
2045 | if (txq->len >= MWL8K_TX_DESCS - 2) { | |
23677ce3 | 2046 | if (!mgmtframe || txq->len == MWL8K_TX_DESCS) { |
3a769888 NS |
2047 | if (start_ba_session) { |
2048 | spin_lock(&priv->stream_lock); | |
2049 | mwl8k_remove_stream(hw, stream); | |
2050 | spin_unlock(&priv->stream_lock); | |
2051 | } | |
2052 | spin_unlock_bh(&priv->tx_lock); | |
ff7aa96f NS |
2053 | pci_unmap_single(priv->pdev, dma, skb->len, |
2054 | PCI_DMA_TODEVICE); | |
3a769888 NS |
2055 | dev_kfree_skb(skb); |
2056 | return; | |
3a7dbc3b | 2057 | } |
65f3ddcd NS |
2058 | } |
2059 | ||
45eb400d LB |
2060 | BUG_ON(txq->skb[txq->tail] != NULL); |
2061 | txq->skb[txq->tail] = skb; | |
a66098da | 2062 | |
45eb400d | 2063 | tx = txq->txd + txq->tail; |
23b33906 | 2064 | tx->data_rate = txdatarate; |
65f3ddcd | 2065 | tx->tx_priority = txpriority; |
a66098da | 2066 | tx->qos_control = cpu_to_le16(qos); |
a66098da LB |
2067 | tx->pkt_phys_addr = cpu_to_le32(dma); |
2068 | tx->pkt_len = cpu_to_le16(skb->len); | |
23b33906 | 2069 | tx->rate_info = 0; |
36323f81 TH |
2070 | if (!priv->ap_fw && sta != NULL) |
2071 | tx->peer_id = MWL8K_STA(sta)->peer_id; | |
a680400e LB |
2072 | else |
2073 | tx->peer_id = 0; | |
566875db | 2074 | |
e1f4d69b | 2075 | if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame) |
566875db PN |
2076 | tx->timestamp = cpu_to_le32(ioread32(priv->regs + |
2077 | MWL8K_HW_TIMER_REGISTER)); | |
b8d9e572 NS |
2078 | else |
2079 | tx->timestamp = 0; | |
566875db | 2080 | |
a66098da | 2081 | wmb(); |
23b33906 LB |
2082 | tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); |
2083 | ||
8ccbc3b8 | 2084 | txq->len++; |
a66098da | 2085 | priv->pending_tx_pkts++; |
a66098da | 2086 | |
45eb400d LB |
2087 | txq->tail++; |
2088 | if (txq->tail == MWL8K_TX_DESCS) | |
2089 | txq->tail = 0; | |
23b33906 | 2090 | |
23b33906 | 2091 | mwl8k_tx_start(priv); |
a66098da LB |
2092 | |
2093 | spin_unlock_bh(&priv->tx_lock); | |
65f3ddcd NS |
2094 | |
2095 | /* Initiate the ampdu session here */ | |
2096 | if (start_ba_session) { | |
2097 | spin_lock(&priv->stream_lock); | |
2098 | if (mwl8k_start_stream(hw, stream)) | |
2099 | mwl8k_remove_stream(hw, stream); | |
2100 | spin_unlock(&priv->stream_lock); | |
2101 | } | |
a66098da LB |
2102 | } |
2103 | ||
2104 | ||
618952a7 LB |
2105 | /* |
2106 | * Firmware access. | |
2107 | * | |
2108 | * We have the following requirements for issuing firmware commands: | |
2109 | * - Some commands require that the packet transmit path is idle when | |
2110 | * the command is issued. (For simplicity, we'll just quiesce the | |
2111 | * transmit path for every command.) | |
2112 | * - There are certain sequences of commands that need to be issued to | |
2113 | * the hardware sequentially, with no other intervening commands. | |
2114 | * | |
2115 | * This leads to an implementation of a "firmware lock" as a mutex that | |
2116 | * can be taken recursively, and which is taken by both the low-level | |
2117 | * command submission function (mwl8k_post_cmd) as well as any users of | |
2118 | * that function that require issuing of an atomic sequence of commands, | |
2119 | * and quiesces the transmit path whenever it's taken. | |
2120 | */ | |
2121 | static int mwl8k_fw_lock(struct ieee80211_hw *hw) | |
2122 | { | |
2123 | struct mwl8k_priv *priv = hw->priv; | |
2124 | ||
2125 | if (priv->fw_mutex_owner != current) { | |
2126 | int rc; | |
2127 | ||
2128 | mutex_lock(&priv->fw_mutex); | |
2129 | ieee80211_stop_queues(hw); | |
2130 | ||
2131 | rc = mwl8k_tx_wait_empty(hw); | |
2132 | if (rc) { | |
6b6accc3 YAP |
2133 | if (!priv->hw_restart_in_progress) |
2134 | ieee80211_wake_queues(hw); | |
2135 | ||
618952a7 LB |
2136 | mutex_unlock(&priv->fw_mutex); |
2137 | ||
2138 | return rc; | |
2139 | } | |
2140 | ||
2141 | priv->fw_mutex_owner = current; | |
2142 | } | |
2143 | ||
2144 | priv->fw_mutex_depth++; | |
2145 | ||
2146 | return 0; | |
2147 | } | |
2148 | ||
2149 | static void mwl8k_fw_unlock(struct ieee80211_hw *hw) | |
2150 | { | |
2151 | struct mwl8k_priv *priv = hw->priv; | |
2152 | ||
2153 | if (!--priv->fw_mutex_depth) { | |
6b6accc3 YAP |
2154 | if (!priv->hw_restart_in_progress) |
2155 | ieee80211_wake_queues(hw); | |
2156 | ||
618952a7 LB |
2157 | priv->fw_mutex_owner = NULL; |
2158 | mutex_unlock(&priv->fw_mutex); | |
2159 | } | |
2160 | } | |
2161 | ||
e882efc9 YAP |
2162 | static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, |
2163 | u32 bitmap); | |
618952a7 | 2164 | |
a66098da LB |
2165 | /* |
2166 | * Command processing. | |
2167 | */ | |
2168 | ||
0c9cc640 LB |
2169 | /* Timeout firmware commands after 10s */ |
2170 | #define MWL8K_CMD_TIMEOUT_MS 10000 | |
a66098da LB |
2171 | |
2172 | static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |
2173 | { | |
2174 | DECLARE_COMPLETION_ONSTACK(cmd_wait); | |
2175 | struct mwl8k_priv *priv = hw->priv; | |
2176 | void __iomem *regs = priv->regs; | |
2177 | dma_addr_t dma_addr; | |
2178 | unsigned int dma_size; | |
2179 | int rc; | |
a66098da LB |
2180 | unsigned long timeout = 0; |
2181 | u8 buf[32]; | |
e882efc9 YAP |
2182 | u32 bitmap = 0; |
2183 | ||
2184 | wiphy_dbg(hw->wiphy, "Posting %s [%d]\n", | |
2185 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), cmd->macid); | |
2186 | ||
2187 | /* Before posting firmware commands that could change the hardware | |
2188 | * characteristics, make sure that all BSSes are stopped temporary. | |
2189 | * Enable these stopped BSSes after completion of the commands | |
2190 | */ | |
2191 | ||
2192 | rc = mwl8k_fw_lock(hw); | |
2193 | if (rc) | |
2194 | return rc; | |
2195 | ||
2196 | if (priv->ap_fw && priv->running_bsses) { | |
2197 | switch (le16_to_cpu(cmd->code)) { | |
2198 | case MWL8K_CMD_SET_RF_CHANNEL: | |
2199 | case MWL8K_CMD_RADIO_CONTROL: | |
2200 | case MWL8K_CMD_RF_TX_POWER: | |
2201 | case MWL8K_CMD_TX_POWER: | |
2202 | case MWL8K_CMD_RF_ANTENNA: | |
2203 | case MWL8K_CMD_RTS_THRESHOLD: | |
2204 | case MWL8K_CMD_MIMO_CONFIG: | |
2205 | bitmap = priv->running_bsses; | |
2206 | mwl8k_enable_bsses(hw, false, bitmap); | |
2207 | break; | |
2208 | } | |
2209 | } | |
a66098da | 2210 | |
b603742f | 2211 | cmd->result = (__force __le16) 0xffff; |
a66098da LB |
2212 | dma_size = le16_to_cpu(cmd->length); |
2213 | dma_addr = pci_map_single(priv->pdev, cmd, dma_size, | |
2214 | PCI_DMA_BIDIRECTIONAL); | |
2215 | if (pci_dma_mapping_error(priv->pdev, dma_addr)) | |
2216 | return -ENOMEM; | |
2217 | ||
a66098da LB |
2218 | priv->hostcmd_wait = &cmd_wait; |
2219 | iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR); | |
2220 | iowrite32(MWL8K_H2A_INT_DOORBELL, | |
2221 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
2222 | iowrite32(MWL8K_H2A_INT_DUMMY, | |
2223 | regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS); | |
a66098da LB |
2224 | |
2225 | timeout = wait_for_completion_timeout(&cmd_wait, | |
2226 | msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS)); | |
2227 | ||
618952a7 LB |
2228 | priv->hostcmd_wait = NULL; |
2229 | ||
618952a7 | 2230 | |
37055bd4 LB |
2231 | pci_unmap_single(priv->pdev, dma_addr, dma_size, |
2232 | PCI_DMA_BIDIRECTIONAL); | |
2233 | ||
a66098da | 2234 | if (!timeout) { |
5db55844 | 2235 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
c96c31e4 JP |
2236 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2237 | MWL8K_CMD_TIMEOUT_MS); | |
a66098da LB |
2238 | rc = -ETIMEDOUT; |
2239 | } else { | |
0c9cc640 LB |
2240 | int ms; |
2241 | ||
2242 | ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout); | |
2243 | ||
ce9e2e1b | 2244 | rc = cmd->result ? -EINVAL : 0; |
a66098da | 2245 | if (rc) |
5db55844 | 2246 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
c96c31e4 JP |
2247 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
2248 | le16_to_cpu(cmd->result)); | |
0c9cc640 | 2249 | else if (ms > 2000) |
5db55844 | 2250 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
c96c31e4 JP |
2251 | mwl8k_cmd_name(cmd->code, |
2252 | buf, sizeof(buf)), | |
2253 | ms); | |
a66098da LB |
2254 | } |
2255 | ||
e882efc9 YAP |
2256 | if (bitmap) |
2257 | mwl8k_enable_bsses(hw, true, bitmap); | |
2258 | ||
2259 | mwl8k_fw_unlock(hw); | |
2260 | ||
a66098da LB |
2261 | return rc; |
2262 | } | |
2263 | ||
f57ca9c1 LB |
2264 | static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw, |
2265 | struct ieee80211_vif *vif, | |
2266 | struct mwl8k_cmd_pkt *cmd) | |
2267 | { | |
2268 | if (vif != NULL) | |
2269 | cmd->macid = MWL8K_VIF(vif)->macid; | |
2270 | return mwl8k_post_cmd(hw, cmd); | |
2271 | } | |
2272 | ||
1349ad2f LB |
2273 | /* |
2274 | * Setup code shared between STA and AP firmware images. | |
2275 | */ | |
2276 | static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw) | |
2277 | { | |
2278 | struct mwl8k_priv *priv = hw->priv; | |
2279 | ||
2280 | BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24)); | |
2281 | memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24)); | |
2282 | ||
2283 | BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24)); | |
2284 | memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24)); | |
2285 | ||
2286 | priv->band_24.band = IEEE80211_BAND_2GHZ; | |
2287 | priv->band_24.channels = priv->channels_24; | |
2288 | priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24); | |
2289 | priv->band_24.bitrates = priv->rates_24; | |
2290 | priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24); | |
2291 | ||
2292 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24; | |
2293 | } | |
2294 | ||
4eae9edd LB |
2295 | static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw) |
2296 | { | |
2297 | struct mwl8k_priv *priv = hw->priv; | |
2298 | ||
2299 | BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50)); | |
2300 | memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50)); | |
2301 | ||
2302 | BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50)); | |
2303 | memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50)); | |
2304 | ||
2305 | priv->band_50.band = IEEE80211_BAND_5GHZ; | |
2306 | priv->band_50.channels = priv->channels_50; | |
2307 | priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50); | |
2308 | priv->band_50.bitrates = priv->rates_50; | |
2309 | priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50); | |
2310 | ||
2311 | hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50; | |
2312 | } | |
2313 | ||
a66098da | 2314 | /* |
04b147b1 | 2315 | * CMD_GET_HW_SPEC (STA version). |
a66098da | 2316 | */ |
04b147b1 | 2317 | struct mwl8k_cmd_get_hw_spec_sta { |
a66098da LB |
2318 | struct mwl8k_cmd_pkt header; |
2319 | __u8 hw_rev; | |
2320 | __u8 host_interface; | |
2321 | __le16 num_mcaddrs; | |
d89173f2 | 2322 | __u8 perm_addr[ETH_ALEN]; |
a66098da LB |
2323 | __le16 region_code; |
2324 | __le32 fw_rev; | |
2325 | __le32 ps_cookie; | |
2326 | __le32 caps; | |
2327 | __u8 mcs_bitmap[16]; | |
2328 | __le32 rx_queue_ptr; | |
2329 | __le32 num_tx_queues; | |
e600707b | 2330 | __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES]; |
a66098da LB |
2331 | __le32 caps2; |
2332 | __le32 num_tx_desc_per_queue; | |
45eb400d | 2333 | __le32 total_rxd; |
ba2d3587 | 2334 | } __packed; |
a66098da | 2335 | |
341c9791 LB |
2336 | #define MWL8K_CAP_MAX_AMSDU 0x20000000 |
2337 | #define MWL8K_CAP_GREENFIELD 0x08000000 | |
2338 | #define MWL8K_CAP_AMPDU 0x04000000 | |
2339 | #define MWL8K_CAP_RX_STBC 0x01000000 | |
2340 | #define MWL8K_CAP_TX_STBC 0x00800000 | |
2341 | #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000 | |
2342 | #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000 | |
2343 | #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000 | |
2344 | #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000 | |
2345 | #define MWL8K_CAP_DELAY_BA 0x00003000 | |
2346 | #define MWL8K_CAP_MIMO 0x00000200 | |
2347 | #define MWL8K_CAP_40MHZ 0x00000100 | |
06953235 LB |
2348 | #define MWL8K_CAP_BAND_MASK 0x00000007 |
2349 | #define MWL8K_CAP_5GHZ 0x00000004 | |
2350 | #define MWL8K_CAP_2GHZ4 0x00000001 | |
341c9791 | 2351 | |
06953235 LB |
2352 | static void |
2353 | mwl8k_set_ht_caps(struct ieee80211_hw *hw, | |
2354 | struct ieee80211_supported_band *band, u32 cap) | |
341c9791 | 2355 | { |
341c9791 LB |
2356 | int rx_streams; |
2357 | int tx_streams; | |
2358 | ||
777ad375 | 2359 | band->ht_cap.ht_supported = 1; |
341c9791 LB |
2360 | |
2361 | if (cap & MWL8K_CAP_MAX_AMSDU) | |
777ad375 | 2362 | band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU; |
341c9791 | 2363 | if (cap & MWL8K_CAP_GREENFIELD) |
777ad375 | 2364 | band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD; |
341c9791 LB |
2365 | if (cap & MWL8K_CAP_AMPDU) { |
2366 | hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION; | |
777ad375 LB |
2367 | band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; |
2368 | band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE; | |
341c9791 LB |
2369 | } |
2370 | if (cap & MWL8K_CAP_RX_STBC) | |
777ad375 | 2371 | band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC; |
341c9791 | 2372 | if (cap & MWL8K_CAP_TX_STBC) |
777ad375 | 2373 | band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC; |
341c9791 | 2374 | if (cap & MWL8K_CAP_SHORTGI_40MHZ) |
777ad375 | 2375 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40; |
341c9791 | 2376 | if (cap & MWL8K_CAP_SHORTGI_20MHZ) |
777ad375 | 2377 | band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20; |
341c9791 | 2378 | if (cap & MWL8K_CAP_DELAY_BA) |
777ad375 | 2379 | band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA; |
341c9791 | 2380 | if (cap & MWL8K_CAP_40MHZ) |
777ad375 | 2381 | band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; |
341c9791 LB |
2382 | |
2383 | rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK); | |
2384 | tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK); | |
2385 | ||
777ad375 | 2386 | band->ht_cap.mcs.rx_mask[0] = 0xff; |
341c9791 | 2387 | if (rx_streams >= 2) |
777ad375 | 2388 | band->ht_cap.mcs.rx_mask[1] = 0xff; |
341c9791 | 2389 | if (rx_streams >= 3) |
777ad375 LB |
2390 | band->ht_cap.mcs.rx_mask[2] = 0xff; |
2391 | band->ht_cap.mcs.rx_mask[4] = 0x01; | |
2392 | band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; | |
341c9791 LB |
2393 | |
2394 | if (rx_streams != tx_streams) { | |
777ad375 LB |
2395 | band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF; |
2396 | band->ht_cap.mcs.tx_params |= (tx_streams - 1) << | |
341c9791 LB |
2397 | IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; |
2398 | } | |
2399 | } | |
2400 | ||
06953235 LB |
2401 | static void |
2402 | mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps) | |
2403 | { | |
2404 | struct mwl8k_priv *priv = hw->priv; | |
2405 | ||
2406 | if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) { | |
2407 | mwl8k_setup_2ghz_band(hw); | |
2408 | if (caps & MWL8K_CAP_MIMO) | |
2409 | mwl8k_set_ht_caps(hw, &priv->band_24, caps); | |
2410 | } | |
2411 | ||
2412 | if (caps & MWL8K_CAP_5GHZ) { | |
2413 | mwl8k_setup_5ghz_band(hw); | |
2414 | if (caps & MWL8K_CAP_MIMO) | |
2415 | mwl8k_set_ht_caps(hw, &priv->band_50, caps); | |
2416 | } | |
2417 | } | |
2418 | ||
04b147b1 | 2419 | static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw) |
a66098da LB |
2420 | { |
2421 | struct mwl8k_priv *priv = hw->priv; | |
04b147b1 | 2422 | struct mwl8k_cmd_get_hw_spec_sta *cmd; |
a66098da LB |
2423 | int rc; |
2424 | int i; | |
2425 | ||
2426 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2427 | if (cmd == NULL) | |
2428 | return -ENOMEM; | |
2429 | ||
2430 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2431 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2432 | ||
2433 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2434 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
45eb400d | 2435 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); |
e600707b BC |
2436 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
2437 | for (i = 0; i < mwl8k_tx_queues(priv); i++) | |
45eb400d | 2438 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma); |
4ff6432e | 2439 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
45eb400d | 2440 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); |
a66098da LB |
2441 | |
2442 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2443 | ||
2444 | if (!rc) { | |
2445 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); | |
2446 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
4ff6432e | 2447 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); |
a66098da | 2448 | priv->hw_rev = cmd->hw_rev; |
06953235 | 2449 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 LB |
2450 | priv->ap_macids_supported = 0x00000000; |
2451 | priv->sta_macids_supported = 0x00000001; | |
a66098da LB |
2452 | } |
2453 | ||
2454 | kfree(cmd); | |
2455 | return rc; | |
2456 | } | |
2457 | ||
42fba21d LB |
2458 | /* |
2459 | * CMD_GET_HW_SPEC (AP version). | |
2460 | */ | |
2461 | struct mwl8k_cmd_get_hw_spec_ap { | |
2462 | struct mwl8k_cmd_pkt header; | |
2463 | __u8 hw_rev; | |
2464 | __u8 host_interface; | |
2465 | __le16 num_wcb; | |
2466 | __le16 num_mcaddrs; | |
2467 | __u8 perm_addr[ETH_ALEN]; | |
2468 | __le16 region_code; | |
2469 | __le16 num_antenna; | |
2470 | __le32 fw_rev; | |
2471 | __le32 wcbbase0; | |
2472 | __le32 rxwrptr; | |
2473 | __le32 rxrdptr; | |
2474 | __le32 ps_cookie; | |
2475 | __le32 wcbbase1; | |
2476 | __le32 wcbbase2; | |
2477 | __le32 wcbbase3; | |
952a0e96 | 2478 | __le32 fw_api_version; |
8a7a578c BC |
2479 | __le32 caps; |
2480 | __le32 num_of_ampdu_queues; | |
2481 | __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES]; | |
ba2d3587 | 2482 | } __packed; |
42fba21d LB |
2483 | |
2484 | static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw) | |
2485 | { | |
2486 | struct mwl8k_priv *priv = hw->priv; | |
2487 | struct mwl8k_cmd_get_hw_spec_ap *cmd; | |
8a7a578c | 2488 | int rc, i; |
952a0e96 | 2489 | u32 api_version; |
42fba21d LB |
2490 | |
2491 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2492 | if (cmd == NULL) | |
2493 | return -ENOMEM; | |
2494 | ||
2495 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC); | |
2496 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2497 | ||
2498 | memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); | |
2499 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2500 | ||
2501 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2502 | ||
2503 | if (!rc) { | |
2504 | int off; | |
2505 | ||
952a0e96 BC |
2506 | api_version = le32_to_cpu(cmd->fw_api_version); |
2507 | if (priv->device_info->fw_api_ap != api_version) { | |
2508 | printk(KERN_ERR "%s: Unsupported fw API version for %s." | |
2509 | " Expected %d got %d.\n", MWL8K_NAME, | |
2510 | priv->device_info->part_name, | |
2511 | priv->device_info->fw_api_ap, | |
2512 | api_version); | |
2513 | rc = -EINVAL; | |
2514 | goto done; | |
2515 | } | |
42fba21d LB |
2516 | SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); |
2517 | priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); | |
2518 | priv->fw_rev = le32_to_cpu(cmd->fw_rev); | |
2519 | priv->hw_rev = cmd->hw_rev; | |
8a7a578c | 2520 | mwl8k_set_caps(hw, le32_to_cpu(cmd->caps)); |
ee0ddf18 | 2521 | priv->ap_macids_supported = 0x000000ff; |
d59c1cfd | 2522 | priv->sta_macids_supported = 0x00000100; |
8a7a578c BC |
2523 | priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues); |
2524 | if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) { | |
2525 | wiphy_warn(hw->wiphy, "fw reported %d ampdu queues" | |
2526 | " but we only support %d.\n", | |
2527 | priv->num_ampdu_queues, | |
2528 | MWL8K_MAX_AMPDU_QUEUES); | |
2529 | priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES; | |
2530 | } | |
42fba21d | 2531 | off = le32_to_cpu(cmd->rxwrptr) & 0xffff; |
b603742f | 2532 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d LB |
2533 | |
2534 | off = le32_to_cpu(cmd->rxrdptr) & 0xffff; | |
b603742f | 2535 | iowrite32(priv->rxq[0].rxd_dma, priv->sram + off); |
42fba21d | 2536 | |
73b46320 BC |
2537 | priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff; |
2538 | priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff; | |
2539 | priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff; | |
2540 | priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff; | |
8a7a578c BC |
2541 | |
2542 | for (i = 0; i < priv->num_ampdu_queues; i++) | |
e600707b | 2543 | priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] = |
8a7a578c | 2544 | le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff; |
42fba21d LB |
2545 | } |
2546 | ||
952a0e96 | 2547 | done: |
42fba21d LB |
2548 | kfree(cmd); |
2549 | return rc; | |
2550 | } | |
2551 | ||
2552 | /* | |
2553 | * CMD_SET_HW_SPEC. | |
2554 | */ | |
2555 | struct mwl8k_cmd_set_hw_spec { | |
2556 | struct mwl8k_cmd_pkt header; | |
2557 | __u8 hw_rev; | |
2558 | __u8 host_interface; | |
2559 | __le16 num_mcaddrs; | |
2560 | __u8 perm_addr[ETH_ALEN]; | |
2561 | __le16 region_code; | |
2562 | __le32 fw_rev; | |
2563 | __le32 ps_cookie; | |
2564 | __le32 caps; | |
2565 | __le32 rx_queue_ptr; | |
2566 | __le32 num_tx_queues; | |
e600707b | 2567 | __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES]; |
42fba21d LB |
2568 | __le32 flags; |
2569 | __le32 num_tx_desc_per_queue; | |
2570 | __le32 total_rxd; | |
ba2d3587 | 2571 | } __packed; |
42fba21d | 2572 | |
8a7a578c BC |
2573 | /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause |
2574 | * packets to expire 500 ms after the timestamp in the tx descriptor. That is, | |
2575 | * the packets that are queued for more than 500ms, will be dropped in the | |
2576 | * hardware. This helps minimizing the issues caused due to head-of-line | |
2577 | * blocking where a slow client can hog the bandwidth and affect traffic to a | |
2578 | * faster client. | |
2579 | */ | |
2580 | #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400 | |
3373b28e | 2581 | #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200 |
b64fe619 LB |
2582 | #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080 |
2583 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020 | |
2584 | #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010 | |
42fba21d LB |
2585 | |
2586 | static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw) | |
2587 | { | |
2588 | struct mwl8k_priv *priv = hw->priv; | |
2589 | struct mwl8k_cmd_set_hw_spec *cmd; | |
2590 | int rc; | |
2591 | int i; | |
2592 | ||
2593 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2594 | if (cmd == NULL) | |
2595 | return -ENOMEM; | |
2596 | ||
2597 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC); | |
2598 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2599 | ||
2600 | cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); | |
2601 | cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma); | |
e600707b | 2602 | cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv)); |
85c9205c NS |
2603 | |
2604 | /* | |
2605 | * Mac80211 stack has Q0 as highest priority and Q3 as lowest in | |
2606 | * that order. Firmware has Q3 as highest priority and Q0 as lowest | |
2607 | * in that order. Map Q3 of mac80211 to Q0 of firmware so that the | |
2608 | * priority is interpreted the right way in firmware. | |
2609 | */ | |
e600707b BC |
2610 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
2611 | int j = mwl8k_tx_queues(priv) - 1 - i; | |
85c9205c NS |
2612 | cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma); |
2613 | } | |
2614 | ||
b64fe619 LB |
2615 | cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT | |
2616 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP | | |
31d291a7 | 2617 | MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON | |
3373b28e NS |
2618 | MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY | |
2619 | MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR); | |
42fba21d LB |
2620 | cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); |
2621 | cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS); | |
2622 | ||
2623 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2624 | kfree(cmd); | |
2625 | ||
2626 | return rc; | |
2627 | } | |
2628 | ||
a66098da LB |
2629 | /* |
2630 | * CMD_MAC_MULTICAST_ADR. | |
2631 | */ | |
2632 | struct mwl8k_cmd_mac_multicast_adr { | |
2633 | struct mwl8k_cmd_pkt header; | |
2634 | __le16 action; | |
2635 | __le16 numaddr; | |
ce9e2e1b | 2636 | __u8 addr[0][ETH_ALEN]; |
a66098da LB |
2637 | }; |
2638 | ||
d5e30845 LB |
2639 | #define MWL8K_ENABLE_RX_DIRECTED 0x0001 |
2640 | #define MWL8K_ENABLE_RX_MULTICAST 0x0002 | |
2641 | #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004 | |
2642 | #define MWL8K_ENABLE_RX_BROADCAST 0x0008 | |
ce9e2e1b | 2643 | |
e81cd2d6 | 2644 | static struct mwl8k_cmd_pkt * |
447ced07 | 2645 | __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti, |
22bedad3 | 2646 | struct netdev_hw_addr_list *mc_list) |
a66098da | 2647 | { |
e81cd2d6 | 2648 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2649 | struct mwl8k_cmd_mac_multicast_adr *cmd; |
e81cd2d6 | 2650 | int size; |
22bedad3 JP |
2651 | int mc_count = 0; |
2652 | ||
2653 | if (mc_list) | |
2654 | mc_count = netdev_hw_addr_list_count(mc_list); | |
e81cd2d6 | 2655 | |
447ced07 | 2656 | if (allmulti || mc_count > priv->num_mcaddrs) { |
d5e30845 LB |
2657 | allmulti = 1; |
2658 | mc_count = 0; | |
2659 | } | |
e81cd2d6 LB |
2660 | |
2661 | size = sizeof(*cmd) + mc_count * ETH_ALEN; | |
ce9e2e1b | 2662 | |
e81cd2d6 | 2663 | cmd = kzalloc(size, GFP_ATOMIC); |
a66098da | 2664 | if (cmd == NULL) |
e81cd2d6 | 2665 | return NULL; |
a66098da LB |
2666 | |
2667 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); | |
2668 | cmd->header.length = cpu_to_le16(size); | |
d5e30845 LB |
2669 | cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED | |
2670 | MWL8K_ENABLE_RX_BROADCAST); | |
2671 | ||
2672 | if (allmulti) { | |
2673 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST); | |
2674 | } else if (mc_count) { | |
22bedad3 JP |
2675 | struct netdev_hw_addr *ha; |
2676 | int i = 0; | |
d5e30845 LB |
2677 | |
2678 | cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); | |
2679 | cmd->numaddr = cpu_to_le16(mc_count); | |
22bedad3 JP |
2680 | netdev_hw_addr_list_for_each(ha, mc_list) { |
2681 | memcpy(cmd->addr[i], ha->addr, ETH_ALEN); | |
a66098da | 2682 | } |
a66098da LB |
2683 | } |
2684 | ||
e81cd2d6 | 2685 | return &cmd->header; |
a66098da LB |
2686 | } |
2687 | ||
2688 | /* | |
55489b6e | 2689 | * CMD_GET_STAT. |
a66098da | 2690 | */ |
55489b6e | 2691 | struct mwl8k_cmd_get_stat { |
a66098da | 2692 | struct mwl8k_cmd_pkt header; |
a66098da | 2693 | __le32 stats[64]; |
ba2d3587 | 2694 | } __packed; |
a66098da LB |
2695 | |
2696 | #define MWL8K_STAT_ACK_FAILURE 9 | |
2697 | #define MWL8K_STAT_RTS_FAILURE 12 | |
2698 | #define MWL8K_STAT_FCS_ERROR 24 | |
2699 | #define MWL8K_STAT_RTS_SUCCESS 11 | |
2700 | ||
55489b6e LB |
2701 | static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw, |
2702 | struct ieee80211_low_level_stats *stats) | |
a66098da | 2703 | { |
55489b6e | 2704 | struct mwl8k_cmd_get_stat *cmd; |
a66098da LB |
2705 | int rc; |
2706 | ||
2707 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2708 | if (cmd == NULL) | |
2709 | return -ENOMEM; | |
2710 | ||
2711 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); | |
2712 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
2713 | |
2714 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2715 | if (!rc) { | |
2716 | stats->dot11ACKFailureCount = | |
2717 | le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]); | |
2718 | stats->dot11RTSFailureCount = | |
2719 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]); | |
2720 | stats->dot11FCSErrorCount = | |
2721 | le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]); | |
2722 | stats->dot11RTSSuccessCount = | |
2723 | le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]); | |
2724 | } | |
2725 | kfree(cmd); | |
2726 | ||
2727 | return rc; | |
2728 | } | |
2729 | ||
2730 | /* | |
55489b6e | 2731 | * CMD_RADIO_CONTROL. |
a66098da | 2732 | */ |
55489b6e | 2733 | struct mwl8k_cmd_radio_control { |
a66098da LB |
2734 | struct mwl8k_cmd_pkt header; |
2735 | __le16 action; | |
2736 | __le16 control; | |
2737 | __le16 radio_on; | |
ba2d3587 | 2738 | } __packed; |
a66098da | 2739 | |
c46563b7 | 2740 | static int |
55489b6e | 2741 | mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force) |
a66098da LB |
2742 | { |
2743 | struct mwl8k_priv *priv = hw->priv; | |
55489b6e | 2744 | struct mwl8k_cmd_radio_control *cmd; |
a66098da LB |
2745 | int rc; |
2746 | ||
c46563b7 | 2747 | if (enable == priv->radio_on && !force) |
a66098da LB |
2748 | return 0; |
2749 | ||
a66098da LB |
2750 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
2751 | if (cmd == NULL) | |
2752 | return -ENOMEM; | |
2753 | ||
2754 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL); | |
2755 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2756 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
68ce3884 | 2757 | cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1); |
a66098da LB |
2758 | cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000); |
2759 | ||
2760 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2761 | kfree(cmd); | |
2762 | ||
2763 | if (!rc) | |
c46563b7 | 2764 | priv->radio_on = enable; |
a66098da LB |
2765 | |
2766 | return rc; | |
2767 | } | |
2768 | ||
55489b6e | 2769 | static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw) |
c46563b7 | 2770 | { |
55489b6e | 2771 | return mwl8k_cmd_radio_control(hw, 0, 0); |
c46563b7 LB |
2772 | } |
2773 | ||
55489b6e | 2774 | static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw) |
c46563b7 | 2775 | { |
55489b6e | 2776 | return mwl8k_cmd_radio_control(hw, 1, 0); |
c46563b7 LB |
2777 | } |
2778 | ||
a66098da LB |
2779 | static int |
2780 | mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) | |
2781 | { | |
99200a99 | 2782 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 2783 | |
68ce3884 | 2784 | priv->radio_short_preamble = short_preamble; |
a66098da | 2785 | |
55489b6e | 2786 | return mwl8k_cmd_radio_control(hw, 1, 1); |
a66098da LB |
2787 | } |
2788 | ||
2789 | /* | |
55489b6e | 2790 | * CMD_RF_TX_POWER. |
a66098da | 2791 | */ |
41fdf097 | 2792 | #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8 |
a66098da | 2793 | |
55489b6e | 2794 | struct mwl8k_cmd_rf_tx_power { |
a66098da LB |
2795 | struct mwl8k_cmd_pkt header; |
2796 | __le16 action; | |
2797 | __le16 support_level; | |
2798 | __le16 current_level; | |
2799 | __le16 reserved; | |
41fdf097 | 2800 | __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL]; |
ba2d3587 | 2801 | } __packed; |
a66098da | 2802 | |
55489b6e | 2803 | static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm) |
a66098da | 2804 | { |
55489b6e | 2805 | struct mwl8k_cmd_rf_tx_power *cmd; |
a66098da LB |
2806 | int rc; |
2807 | ||
2808 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2809 | if (cmd == NULL) | |
2810 | return -ENOMEM; | |
2811 | ||
2812 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER); | |
2813 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2814 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
2815 | cmd->support_level = cpu_to_le16(dBm); | |
2816 | ||
2817 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2818 | kfree(cmd); | |
2819 | ||
2820 | return rc; | |
2821 | } | |
2822 | ||
41fdf097 NS |
2823 | /* |
2824 | * CMD_TX_POWER. | |
2825 | */ | |
2826 | #define MWL8K_TX_POWER_LEVEL_TOTAL 12 | |
2827 | ||
2828 | struct mwl8k_cmd_tx_power { | |
2829 | struct mwl8k_cmd_pkt header; | |
2830 | __le16 action; | |
2831 | __le16 band; | |
2832 | __le16 channel; | |
2833 | __le16 bw; | |
2834 | __le16 sub_ch; | |
2835 | __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; | |
ba30c4a5 | 2836 | } __packed; |
41fdf097 NS |
2837 | |
2838 | static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw, | |
2839 | struct ieee80211_conf *conf, | |
2840 | unsigned short pwr) | |
2841 | { | |
2842 | struct ieee80211_channel *channel = conf->channel; | |
2843 | struct mwl8k_cmd_tx_power *cmd; | |
2844 | int rc; | |
2845 | int i; | |
2846 | ||
2847 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2848 | if (cmd == NULL) | |
2849 | return -ENOMEM; | |
2850 | ||
2851 | cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER); | |
2852 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2853 | cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST); | |
2854 | ||
2855 | if (channel->band == IEEE80211_BAND_2GHZ) | |
2856 | cmd->band = cpu_to_le16(0x1); | |
2857 | else if (channel->band == IEEE80211_BAND_5GHZ) | |
2858 | cmd->band = cpu_to_le16(0x4); | |
2859 | ||
604c4ef1 | 2860 | cmd->channel = cpu_to_le16(channel->hw_value); |
41fdf097 NS |
2861 | |
2862 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
2863 | conf->channel_type == NL80211_CHAN_HT20) { | |
2864 | cmd->bw = cpu_to_le16(0x2); | |
2865 | } else { | |
2866 | cmd->bw = cpu_to_le16(0x4); | |
2867 | if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
2868 | cmd->sub_ch = cpu_to_le16(0x3); | |
2869 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
2870 | cmd->sub_ch = cpu_to_le16(0x1); | |
2871 | } | |
2872 | ||
2873 | for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++) | |
2874 | cmd->power_level_list[i] = cpu_to_le16(pwr); | |
2875 | ||
2876 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2877 | kfree(cmd); | |
2878 | ||
2879 | return rc; | |
2880 | } | |
2881 | ||
08b06347 LB |
2882 | /* |
2883 | * CMD_RF_ANTENNA. | |
2884 | */ | |
2885 | struct mwl8k_cmd_rf_antenna { | |
2886 | struct mwl8k_cmd_pkt header; | |
2887 | __le16 antenna; | |
2888 | __le16 mode; | |
ba2d3587 | 2889 | } __packed; |
08b06347 LB |
2890 | |
2891 | #define MWL8K_RF_ANTENNA_RX 1 | |
2892 | #define MWL8K_RF_ANTENNA_TX 2 | |
2893 | ||
2894 | static int | |
2895 | mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask) | |
2896 | { | |
2897 | struct mwl8k_cmd_rf_antenna *cmd; | |
2898 | int rc; | |
2899 | ||
2900 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2901 | if (cmd == NULL) | |
2902 | return -ENOMEM; | |
2903 | ||
2904 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA); | |
2905 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2906 | cmd->antenna = cpu_to_le16(antenna); | |
2907 | cmd->mode = cpu_to_le16(mask); | |
2908 | ||
2909 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2910 | kfree(cmd); | |
2911 | ||
2912 | return rc; | |
2913 | } | |
2914 | ||
b64fe619 LB |
2915 | /* |
2916 | * CMD_SET_BEACON. | |
2917 | */ | |
2918 | struct mwl8k_cmd_set_beacon { | |
2919 | struct mwl8k_cmd_pkt header; | |
2920 | __le16 beacon_len; | |
2921 | __u8 beacon[0]; | |
2922 | }; | |
2923 | ||
aa21d0f6 LB |
2924 | static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, |
2925 | struct ieee80211_vif *vif, u8 *beacon, int len) | |
b64fe619 LB |
2926 | { |
2927 | struct mwl8k_cmd_set_beacon *cmd; | |
2928 | int rc; | |
2929 | ||
2930 | cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL); | |
2931 | if (cmd == NULL) | |
2932 | return -ENOMEM; | |
2933 | ||
2934 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON); | |
2935 | cmd->header.length = cpu_to_le16(sizeof(*cmd) + len); | |
2936 | cmd->beacon_len = cpu_to_le16(len); | |
2937 | memcpy(cmd->beacon, beacon, len); | |
2938 | ||
aa21d0f6 | 2939 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
2940 | kfree(cmd); |
2941 | ||
2942 | return rc; | |
2943 | } | |
2944 | ||
a66098da LB |
2945 | /* |
2946 | * CMD_SET_PRE_SCAN. | |
2947 | */ | |
2948 | struct mwl8k_cmd_set_pre_scan { | |
2949 | struct mwl8k_cmd_pkt header; | |
ba2d3587 | 2950 | } __packed; |
a66098da LB |
2951 | |
2952 | static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw) | |
2953 | { | |
2954 | struct mwl8k_cmd_set_pre_scan *cmd; | |
2955 | int rc; | |
2956 | ||
2957 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2958 | if (cmd == NULL) | |
2959 | return -ENOMEM; | |
2960 | ||
2961 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN); | |
2962 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2963 | ||
2964 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2965 | kfree(cmd); | |
2966 | ||
2967 | return rc; | |
2968 | } | |
2969 | ||
2970 | /* | |
2971 | * CMD_SET_POST_SCAN. | |
2972 | */ | |
2973 | struct mwl8k_cmd_set_post_scan { | |
2974 | struct mwl8k_cmd_pkt header; | |
2975 | __le32 isibss; | |
d89173f2 | 2976 | __u8 bssid[ETH_ALEN]; |
ba2d3587 | 2977 | } __packed; |
a66098da LB |
2978 | |
2979 | static int | |
0a11dfc3 | 2980 | mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac) |
a66098da LB |
2981 | { |
2982 | struct mwl8k_cmd_set_post_scan *cmd; | |
2983 | int rc; | |
2984 | ||
2985 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
2986 | if (cmd == NULL) | |
2987 | return -ENOMEM; | |
2988 | ||
2989 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN); | |
2990 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
2991 | cmd->isibss = 0; | |
d89173f2 | 2992 | memcpy(cmd->bssid, mac, ETH_ALEN); |
a66098da LB |
2993 | |
2994 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
2995 | kfree(cmd); | |
2996 | ||
2997 | return rc; | |
2998 | } | |
2999 | ||
3000 | /* | |
3001 | * CMD_SET_RF_CHANNEL. | |
3002 | */ | |
3003 | struct mwl8k_cmd_set_rf_channel { | |
3004 | struct mwl8k_cmd_pkt header; | |
3005 | __le16 action; | |
3006 | __u8 current_channel; | |
3007 | __le32 channel_flags; | |
ba2d3587 | 3008 | } __packed; |
a66098da LB |
3009 | |
3010 | static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, | |
610677d2 | 3011 | struct ieee80211_conf *conf) |
a66098da | 3012 | { |
610677d2 | 3013 | struct ieee80211_channel *channel = conf->channel; |
a66098da LB |
3014 | struct mwl8k_cmd_set_rf_channel *cmd; |
3015 | int rc; | |
3016 | ||
3017 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3018 | if (cmd == NULL) | |
3019 | return -ENOMEM; | |
3020 | ||
3021 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL); | |
3022 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3023 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3024 | cmd->current_channel = channel->hw_value; | |
610677d2 | 3025 | |
a66098da | 3026 | if (channel->band == IEEE80211_BAND_2GHZ) |
610677d2 | 3027 | cmd->channel_flags |= cpu_to_le32(0x00000001); |
42574ea2 LB |
3028 | else if (channel->band == IEEE80211_BAND_5GHZ) |
3029 | cmd->channel_flags |= cpu_to_le32(0x00000004); | |
610677d2 LB |
3030 | |
3031 | if (conf->channel_type == NL80211_CHAN_NO_HT || | |
3032 | conf->channel_type == NL80211_CHAN_HT20) | |
3033 | cmd->channel_flags |= cpu_to_le32(0x00000080); | |
3034 | else if (conf->channel_type == NL80211_CHAN_HT40MINUS) | |
3035 | cmd->channel_flags |= cpu_to_le32(0x000001900); | |
3036 | else if (conf->channel_type == NL80211_CHAN_HT40PLUS) | |
3037 | cmd->channel_flags |= cpu_to_le32(0x000000900); | |
a66098da LB |
3038 | |
3039 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3040 | kfree(cmd); | |
3041 | ||
3042 | return rc; | |
3043 | } | |
3044 | ||
3045 | /* | |
55489b6e | 3046 | * CMD_SET_AID. |
a66098da | 3047 | */ |
55489b6e LB |
3048 | #define MWL8K_FRAME_PROT_DISABLED 0x00 |
3049 | #define MWL8K_FRAME_PROT_11G 0x07 | |
3050 | #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 | |
3051 | #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 | |
a66098da | 3052 | |
55489b6e LB |
3053 | struct mwl8k_cmd_update_set_aid { |
3054 | struct mwl8k_cmd_pkt header; | |
3055 | __le16 aid; | |
a66098da | 3056 | |
55489b6e LB |
3057 | /* AP's MAC address (BSSID) */ |
3058 | __u8 bssid[ETH_ALEN]; | |
3059 | __le16 protection_mode; | |
3060 | __u8 supp_rates[14]; | |
ba2d3587 | 3061 | } __packed; |
a66098da | 3062 | |
c6e96010 LB |
3063 | static void legacy_rate_mask_to_array(u8 *rates, u32 mask) |
3064 | { | |
3065 | int i; | |
3066 | int j; | |
3067 | ||
3068 | /* | |
3069 | * Clear nonstandard rates 4 and 13. | |
3070 | */ | |
3071 | mask &= 0x1fef; | |
3072 | ||
3073 | for (i = 0, j = 0; i < 14; i++) { | |
3074 | if (mask & (1 << i)) | |
777ad375 | 3075 | rates[j++] = mwl8k_rates_24[i].hw_value; |
c6e96010 LB |
3076 | } |
3077 | } | |
3078 | ||
55489b6e | 3079 | static int |
c6e96010 LB |
3080 | mwl8k_cmd_set_aid(struct ieee80211_hw *hw, |
3081 | struct ieee80211_vif *vif, u32 legacy_rate_mask) | |
a66098da | 3082 | { |
55489b6e LB |
3083 | struct mwl8k_cmd_update_set_aid *cmd; |
3084 | u16 prot_mode; | |
a66098da LB |
3085 | int rc; |
3086 | ||
3087 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3088 | if (cmd == NULL) | |
3089 | return -ENOMEM; | |
3090 | ||
55489b6e | 3091 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); |
a66098da | 3092 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
7dc6a7a7 | 3093 | cmd->aid = cpu_to_le16(vif->bss_conf.aid); |
0a11dfc3 | 3094 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 3095 | |
7dc6a7a7 | 3096 | if (vif->bss_conf.use_cts_prot) { |
55489b6e LB |
3097 | prot_mode = MWL8K_FRAME_PROT_11G; |
3098 | } else { | |
7dc6a7a7 | 3099 | switch (vif->bss_conf.ht_operation_mode & |
55489b6e LB |
3100 | IEEE80211_HT_OP_MODE_PROTECTION) { |
3101 | case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ: | |
3102 | prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY; | |
3103 | break; | |
3104 | case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED: | |
3105 | prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL; | |
3106 | break; | |
3107 | default: | |
3108 | prot_mode = MWL8K_FRAME_PROT_DISABLED; | |
3109 | break; | |
3110 | } | |
3111 | } | |
3112 | cmd->protection_mode = cpu_to_le16(prot_mode); | |
a66098da | 3113 | |
c6e96010 | 3114 | legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask); |
a66098da LB |
3115 | |
3116 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3117 | kfree(cmd); | |
3118 | ||
3119 | return rc; | |
3120 | } | |
3121 | ||
32060e1b | 3122 | /* |
55489b6e | 3123 | * CMD_SET_RATE. |
32060e1b | 3124 | */ |
55489b6e LB |
3125 | struct mwl8k_cmd_set_rate { |
3126 | struct mwl8k_cmd_pkt header; | |
3127 | __u8 legacy_rates[14]; | |
3128 | ||
3129 | /* Bitmap for supported MCS codes. */ | |
3130 | __u8 mcs_set[16]; | |
3131 | __u8 reserved[16]; | |
ba2d3587 | 3132 | } __packed; |
32060e1b | 3133 | |
55489b6e | 3134 | static int |
c6e96010 | 3135 | mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
13935e2c | 3136 | u32 legacy_rate_mask, u8 *mcs_rates) |
32060e1b | 3137 | { |
55489b6e | 3138 | struct mwl8k_cmd_set_rate *cmd; |
32060e1b LB |
3139 | int rc; |
3140 | ||
3141 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3142 | if (cmd == NULL) | |
3143 | return -ENOMEM; | |
3144 | ||
55489b6e | 3145 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); |
32060e1b | 3146 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c6e96010 | 3147 | legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask); |
13935e2c | 3148 | memcpy(cmd->mcs_set, mcs_rates, 16); |
32060e1b LB |
3149 | |
3150 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3151 | kfree(cmd); | |
3152 | ||
3153 | return rc; | |
3154 | } | |
3155 | ||
a66098da | 3156 | /* |
55489b6e | 3157 | * CMD_FINALIZE_JOIN. |
a66098da | 3158 | */ |
55489b6e LB |
3159 | #define MWL8K_FJ_BEACON_MAXLEN 128 |
3160 | ||
3161 | struct mwl8k_cmd_finalize_join { | |
a66098da | 3162 | struct mwl8k_cmd_pkt header; |
55489b6e LB |
3163 | __le32 sleep_interval; /* Number of beacon periods to sleep */ |
3164 | __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN]; | |
ba2d3587 | 3165 | } __packed; |
a66098da | 3166 | |
55489b6e LB |
3167 | static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame, |
3168 | int framelen, int dtim) | |
a66098da | 3169 | { |
55489b6e LB |
3170 | struct mwl8k_cmd_finalize_join *cmd; |
3171 | struct ieee80211_mgmt *payload = frame; | |
3172 | int payload_len; | |
a66098da LB |
3173 | int rc; |
3174 | ||
3175 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3176 | if (cmd == NULL) | |
3177 | return -ENOMEM; | |
3178 | ||
55489b6e | 3179 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); |
a66098da | 3180 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3181 | cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); |
3182 | ||
3183 | payload_len = framelen - ieee80211_hdrlen(payload->frame_control); | |
3184 | if (payload_len < 0) | |
3185 | payload_len = 0; | |
3186 | else if (payload_len > MWL8K_FJ_BEACON_MAXLEN) | |
3187 | payload_len = MWL8K_FJ_BEACON_MAXLEN; | |
3188 | ||
3189 | memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); | |
a66098da LB |
3190 | |
3191 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3192 | kfree(cmd); | |
3193 | ||
3194 | return rc; | |
3195 | } | |
3196 | ||
3197 | /* | |
55489b6e | 3198 | * CMD_SET_RTS_THRESHOLD. |
a66098da | 3199 | */ |
55489b6e | 3200 | struct mwl8k_cmd_set_rts_threshold { |
a66098da LB |
3201 | struct mwl8k_cmd_pkt header; |
3202 | __le16 action; | |
55489b6e | 3203 | __le16 threshold; |
ba2d3587 | 3204 | } __packed; |
a66098da | 3205 | |
c2c2b12a LB |
3206 | static int |
3207 | mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh) | |
a66098da | 3208 | { |
55489b6e | 3209 | struct mwl8k_cmd_set_rts_threshold *cmd; |
a66098da LB |
3210 | int rc; |
3211 | ||
3212 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3213 | if (cmd == NULL) | |
3214 | return -ENOMEM; | |
3215 | ||
55489b6e | 3216 | cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); |
a66098da | 3217 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
c2c2b12a LB |
3218 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3219 | cmd->threshold = cpu_to_le16(rts_thresh); | |
a66098da LB |
3220 | |
3221 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3222 | kfree(cmd); | |
3223 | ||
a66098da LB |
3224 | return rc; |
3225 | } | |
3226 | ||
3227 | /* | |
55489b6e | 3228 | * CMD_SET_SLOT. |
a66098da | 3229 | */ |
55489b6e | 3230 | struct mwl8k_cmd_set_slot { |
a66098da LB |
3231 | struct mwl8k_cmd_pkt header; |
3232 | __le16 action; | |
55489b6e | 3233 | __u8 short_slot; |
ba2d3587 | 3234 | } __packed; |
a66098da | 3235 | |
55489b6e | 3236 | static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) |
a66098da | 3237 | { |
55489b6e | 3238 | struct mwl8k_cmd_set_slot *cmd; |
a66098da LB |
3239 | int rc; |
3240 | ||
3241 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3242 | if (cmd == NULL) | |
3243 | return -ENOMEM; | |
3244 | ||
55489b6e | 3245 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); |
a66098da | 3246 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3247 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); |
3248 | cmd->short_slot = short_slot_time; | |
a66098da LB |
3249 | |
3250 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3251 | kfree(cmd); | |
3252 | ||
3253 | return rc; | |
3254 | } | |
3255 | ||
3256 | /* | |
3257 | * CMD_SET_EDCA_PARAMS. | |
3258 | */ | |
3259 | struct mwl8k_cmd_set_edca_params { | |
3260 | struct mwl8k_cmd_pkt header; | |
3261 | ||
3262 | /* See MWL8K_SET_EDCA_XXX below */ | |
3263 | __le16 action; | |
3264 | ||
3265 | /* TX opportunity in units of 32 us */ | |
3266 | __le16 txop; | |
3267 | ||
2e484c89 LB |
3268 | union { |
3269 | struct { | |
3270 | /* Log exponent of max contention period: 0...15 */ | |
3271 | __le32 log_cw_max; | |
3272 | ||
3273 | /* Log exponent of min contention period: 0...15 */ | |
3274 | __le32 log_cw_min; | |
3275 | ||
3276 | /* Adaptive interframe spacing in units of 32us */ | |
3277 | __u8 aifs; | |
3278 | ||
3279 | /* TX queue to configure */ | |
3280 | __u8 txq; | |
3281 | } ap; | |
3282 | struct { | |
3283 | /* Log exponent of max contention period: 0...15 */ | |
3284 | __u8 log_cw_max; | |
a66098da | 3285 | |
2e484c89 LB |
3286 | /* Log exponent of min contention period: 0...15 */ |
3287 | __u8 log_cw_min; | |
a66098da | 3288 | |
2e484c89 LB |
3289 | /* Adaptive interframe spacing in units of 32us */ |
3290 | __u8 aifs; | |
a66098da | 3291 | |
2e484c89 LB |
3292 | /* TX queue to configure */ |
3293 | __u8 txq; | |
3294 | } sta; | |
3295 | }; | |
ba2d3587 | 3296 | } __packed; |
a66098da | 3297 | |
a66098da LB |
3298 | #define MWL8K_SET_EDCA_CW 0x01 |
3299 | #define MWL8K_SET_EDCA_TXOP 0x02 | |
3300 | #define MWL8K_SET_EDCA_AIFS 0x04 | |
3301 | ||
3302 | #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \ | |
3303 | MWL8K_SET_EDCA_TXOP | \ | |
3304 | MWL8K_SET_EDCA_AIFS) | |
3305 | ||
3306 | static int | |
55489b6e LB |
3307 | mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, |
3308 | __u16 cw_min, __u16 cw_max, | |
3309 | __u8 aifs, __u16 txop) | |
a66098da | 3310 | { |
2e484c89 | 3311 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 3312 | struct mwl8k_cmd_set_edca_params *cmd; |
a66098da LB |
3313 | int rc; |
3314 | ||
3315 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3316 | if (cmd == NULL) | |
3317 | return -ENOMEM; | |
3318 | ||
a66098da LB |
3319 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS); |
3320 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a66098da LB |
3321 | cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); |
3322 | cmd->txop = cpu_to_le16(txop); | |
2e484c89 LB |
3323 | if (priv->ap_fw) { |
3324 | cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1)); | |
3325 | cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1)); | |
3326 | cmd->ap.aifs = aifs; | |
3327 | cmd->ap.txq = qnum; | |
3328 | } else { | |
3329 | cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1); | |
3330 | cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1); | |
3331 | cmd->sta.aifs = aifs; | |
3332 | cmd->sta.txq = qnum; | |
3333 | } | |
a66098da LB |
3334 | |
3335 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3336 | kfree(cmd); | |
3337 | ||
3338 | return rc; | |
3339 | } | |
3340 | ||
3341 | /* | |
55489b6e | 3342 | * CMD_SET_WMM_MODE. |
a66098da | 3343 | */ |
55489b6e | 3344 | struct mwl8k_cmd_set_wmm_mode { |
a66098da | 3345 | struct mwl8k_cmd_pkt header; |
55489b6e | 3346 | __le16 action; |
ba2d3587 | 3347 | } __packed; |
a66098da | 3348 | |
55489b6e | 3349 | static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable) |
a66098da | 3350 | { |
55489b6e LB |
3351 | struct mwl8k_priv *priv = hw->priv; |
3352 | struct mwl8k_cmd_set_wmm_mode *cmd; | |
a66098da LB |
3353 | int rc; |
3354 | ||
a66098da LB |
3355 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3356 | if (cmd == NULL) | |
3357 | return -ENOMEM; | |
3358 | ||
55489b6e | 3359 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); |
a66098da | 3360 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e | 3361 | cmd->action = cpu_to_le16(!!enable); |
a66098da LB |
3362 | |
3363 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3364 | kfree(cmd); | |
16cec43d | 3365 | |
55489b6e LB |
3366 | if (!rc) |
3367 | priv->wmm_enabled = enable; | |
a66098da LB |
3368 | |
3369 | return rc; | |
3370 | } | |
3371 | ||
3372 | /* | |
55489b6e | 3373 | * CMD_MIMO_CONFIG. |
a66098da | 3374 | */ |
55489b6e LB |
3375 | struct mwl8k_cmd_mimo_config { |
3376 | struct mwl8k_cmd_pkt header; | |
3377 | __le32 action; | |
3378 | __u8 rx_antenna_map; | |
3379 | __u8 tx_antenna_map; | |
ba2d3587 | 3380 | } __packed; |
a66098da | 3381 | |
55489b6e | 3382 | static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx) |
a66098da | 3383 | { |
55489b6e | 3384 | struct mwl8k_cmd_mimo_config *cmd; |
a66098da LB |
3385 | int rc; |
3386 | ||
3387 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3388 | if (cmd == NULL) | |
3389 | return -ENOMEM; | |
3390 | ||
55489b6e | 3391 | cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); |
a66098da | 3392 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
55489b6e LB |
3393 | cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); |
3394 | cmd->rx_antenna_map = rx; | |
3395 | cmd->tx_antenna_map = tx; | |
a66098da LB |
3396 | |
3397 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3398 | kfree(cmd); | |
3399 | ||
3400 | return rc; | |
3401 | } | |
3402 | ||
3403 | /* | |
b71ed2c6 | 3404 | * CMD_USE_FIXED_RATE (STA version). |
a66098da | 3405 | */ |
b71ed2c6 LB |
3406 | struct mwl8k_cmd_use_fixed_rate_sta { |
3407 | struct mwl8k_cmd_pkt header; | |
3408 | __le32 action; | |
3409 | __le32 allow_rate_drop; | |
3410 | __le32 num_rates; | |
3411 | struct { | |
3412 | __le32 is_ht_rate; | |
3413 | __le32 enable_retry; | |
3414 | __le32 rate; | |
3415 | __le32 retry_count; | |
3416 | } rate_entry[8]; | |
3417 | __le32 rate_type; | |
3418 | __le32 reserved1; | |
3419 | __le32 reserved2; | |
ba2d3587 | 3420 | } __packed; |
a66098da | 3421 | |
b71ed2c6 LB |
3422 | #define MWL8K_USE_AUTO_RATE 0x0002 |
3423 | #define MWL8K_UCAST_RATE 0 | |
a66098da | 3424 | |
b71ed2c6 | 3425 | static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw) |
a66098da | 3426 | { |
b71ed2c6 | 3427 | struct mwl8k_cmd_use_fixed_rate_sta *cmd; |
a66098da LB |
3428 | int rc; |
3429 | ||
3430 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3431 | if (cmd == NULL) | |
3432 | return -ENOMEM; | |
3433 | ||
3434 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3435 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
b71ed2c6 LB |
3436 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); |
3437 | cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE); | |
a66098da LB |
3438 | |
3439 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3440 | kfree(cmd); | |
3441 | ||
3442 | return rc; | |
3443 | } | |
3444 | ||
088aab8b LB |
3445 | /* |
3446 | * CMD_USE_FIXED_RATE (AP version). | |
3447 | */ | |
3448 | struct mwl8k_cmd_use_fixed_rate_ap { | |
3449 | struct mwl8k_cmd_pkt header; | |
3450 | __le32 action; | |
3451 | __le32 allow_rate_drop; | |
3452 | __le32 num_rates; | |
3453 | struct mwl8k_rate_entry_ap { | |
3454 | __le32 is_ht_rate; | |
3455 | __le32 enable_retry; | |
3456 | __le32 rate; | |
3457 | __le32 retry_count; | |
3458 | } rate_entry[4]; | |
3459 | u8 multicast_rate; | |
3460 | u8 multicast_rate_type; | |
3461 | u8 management_rate; | |
ba2d3587 | 3462 | } __packed; |
088aab8b LB |
3463 | |
3464 | static int | |
3465 | mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt) | |
3466 | { | |
3467 | struct mwl8k_cmd_use_fixed_rate_ap *cmd; | |
3468 | int rc; | |
3469 | ||
3470 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3471 | if (cmd == NULL) | |
3472 | return -ENOMEM; | |
3473 | ||
3474 | cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); | |
3475 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3476 | cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE); | |
3477 | cmd->multicast_rate = mcast; | |
3478 | cmd->management_rate = mgmt; | |
3479 | ||
3480 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3481 | kfree(cmd); | |
3482 | ||
3483 | return rc; | |
3484 | } | |
3485 | ||
55489b6e LB |
3486 | /* |
3487 | * CMD_ENABLE_SNIFFER. | |
3488 | */ | |
3489 | struct mwl8k_cmd_enable_sniffer { | |
3490 | struct mwl8k_cmd_pkt header; | |
3491 | __le32 action; | |
ba2d3587 | 3492 | } __packed; |
55489b6e LB |
3493 | |
3494 | static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable) | |
3495 | { | |
3496 | struct mwl8k_cmd_enable_sniffer *cmd; | |
3497 | int rc; | |
3498 | ||
3499 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3500 | if (cmd == NULL) | |
3501 | return -ENOMEM; | |
3502 | ||
3503 | cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); | |
3504 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3505 | cmd->action = cpu_to_le32(!!enable); | |
3506 | ||
3507 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3508 | kfree(cmd); | |
3509 | ||
3510 | return rc; | |
3511 | } | |
3512 | ||
197a4e4e | 3513 | struct mwl8k_cmd_update_mac_addr { |
55489b6e LB |
3514 | struct mwl8k_cmd_pkt header; |
3515 | union { | |
3516 | struct { | |
3517 | __le16 mac_type; | |
3518 | __u8 mac_addr[ETH_ALEN]; | |
3519 | } mbss; | |
3520 | __u8 mac_addr[ETH_ALEN]; | |
3521 | }; | |
ba2d3587 | 3522 | } __packed; |
55489b6e | 3523 | |
ee0ddf18 LB |
3524 | #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0 |
3525 | #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1 | |
3526 | #define MWL8K_MAC_TYPE_PRIMARY_AP 2 | |
3527 | #define MWL8K_MAC_TYPE_SECONDARY_AP 3 | |
a9e00b15 | 3528 | |
197a4e4e YAP |
3529 | static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw, |
3530 | struct ieee80211_vif *vif, u8 *mac, bool set) | |
55489b6e LB |
3531 | { |
3532 | struct mwl8k_priv *priv = hw->priv; | |
ee0ddf18 | 3533 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
197a4e4e | 3534 | struct mwl8k_cmd_update_mac_addr *cmd; |
ee0ddf18 | 3535 | int mac_type; |
55489b6e LB |
3536 | int rc; |
3537 | ||
ee0ddf18 LB |
3538 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; |
3539 | if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) { | |
3540 | if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported)) | |
af458831 YAP |
3541 | if (priv->ap_fw) |
3542 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3543 | else | |
3544 | mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT; | |
ee0ddf18 LB |
3545 | else |
3546 | mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT; | |
3547 | } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) { | |
3548 | if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported)) | |
3549 | mac_type = MWL8K_MAC_TYPE_PRIMARY_AP; | |
3550 | else | |
3551 | mac_type = MWL8K_MAC_TYPE_SECONDARY_AP; | |
3552 | } | |
3553 | ||
55489b6e LB |
3554 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3555 | if (cmd == NULL) | |
3556 | return -ENOMEM; | |
3557 | ||
197a4e4e YAP |
3558 | if (set) |
3559 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR); | |
3560 | else | |
3561 | cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR); | |
3562 | ||
55489b6e LB |
3563 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); |
3564 | if (priv->ap_fw) { | |
ee0ddf18 | 3565 | cmd->mbss.mac_type = cpu_to_le16(mac_type); |
55489b6e LB |
3566 | memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN); |
3567 | } else { | |
3568 | memcpy(cmd->mac_addr, mac, ETH_ALEN); | |
3569 | } | |
3570 | ||
aa21d0f6 | 3571 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
55489b6e LB |
3572 | kfree(cmd); |
3573 | ||
3574 | return rc; | |
3575 | } | |
3576 | ||
197a4e4e YAP |
3577 | /* |
3578 | * MWL8K_CMD_SET_MAC_ADDR. | |
3579 | */ | |
3580 | static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, | |
3581 | struct ieee80211_vif *vif, u8 *mac) | |
3582 | { | |
3583 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, true); | |
3584 | } | |
3585 | ||
3586 | /* | |
3587 | * MWL8K_CMD_DEL_MAC_ADDR. | |
3588 | */ | |
3589 | static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw, | |
3590 | struct ieee80211_vif *vif, u8 *mac) | |
3591 | { | |
3592 | return mwl8k_cmd_update_mac_addr(hw, vif, mac, false); | |
3593 | } | |
3594 | ||
55489b6e LB |
3595 | /* |
3596 | * CMD_SET_RATEADAPT_MODE. | |
3597 | */ | |
3598 | struct mwl8k_cmd_set_rate_adapt_mode { | |
3599 | struct mwl8k_cmd_pkt header; | |
3600 | __le16 action; | |
3601 | __le16 mode; | |
ba2d3587 | 3602 | } __packed; |
55489b6e LB |
3603 | |
3604 | static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode) | |
3605 | { | |
3606 | struct mwl8k_cmd_set_rate_adapt_mode *cmd; | |
3607 | int rc; | |
3608 | ||
3609 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3610 | if (cmd == NULL) | |
3611 | return -ENOMEM; | |
3612 | ||
3613 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); | |
3614 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3615 | cmd->action = cpu_to_le16(MWL8K_CMD_SET); | |
3616 | cmd->mode = cpu_to_le16(mode); | |
3617 | ||
3618 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3619 | kfree(cmd); | |
3620 | ||
3621 | return rc; | |
3622 | } | |
3623 | ||
3aefc37e NS |
3624 | /* |
3625 | * CMD_GET_WATCHDOG_BITMAP. | |
3626 | */ | |
3627 | struct mwl8k_cmd_get_watchdog_bitmap { | |
3628 | struct mwl8k_cmd_pkt header; | |
3629 | u8 bitmap; | |
3630 | } __packed; | |
3631 | ||
3632 | static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap) | |
3633 | { | |
3634 | struct mwl8k_cmd_get_watchdog_bitmap *cmd; | |
3635 | int rc; | |
3636 | ||
3637 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3638 | if (cmd == NULL) | |
3639 | return -ENOMEM; | |
3640 | ||
3641 | cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP); | |
3642 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3643 | ||
3644 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
3645 | if (!rc) | |
3646 | *bitmap = cmd->bitmap; | |
3647 | ||
3648 | kfree(cmd); | |
3649 | ||
3650 | return rc; | |
3651 | } | |
3652 | ||
cfacba12 YAP |
3653 | #define MWL8K_WMM_QUEUE_NUMBER 3 |
3654 | ||
3655 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
3656 | u8 idx); | |
3657 | ||
3aefc37e NS |
3658 | static void mwl8k_watchdog_ba_events(struct work_struct *work) |
3659 | { | |
3660 | int rc; | |
3661 | u8 bitmap = 0, stream_index; | |
3662 | struct mwl8k_ampdu_stream *streams; | |
3663 | struct mwl8k_priv *priv = | |
3664 | container_of(work, struct mwl8k_priv, watchdog_ba_handle); | |
cfacba12 YAP |
3665 | struct ieee80211_hw *hw = priv->hw; |
3666 | int i; | |
3667 | u32 status = 0; | |
3668 | ||
3669 | mwl8k_fw_lock(hw); | |
3aefc37e NS |
3670 | |
3671 | rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap); | |
3672 | if (rc) | |
cfacba12 | 3673 | goto done; |
3aefc37e | 3674 | |
cfacba12 | 3675 | spin_lock(&priv->stream_lock); |
3aefc37e NS |
3676 | |
3677 | /* the bitmap is the hw queue number. Map it to the ampdu queue. */ | |
cfacba12 YAP |
3678 | for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) { |
3679 | if (bitmap & (1 << i)) { | |
3680 | stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) % | |
3681 | TOTAL_HW_TX_QUEUES; | |
3682 | streams = &priv->ampdu[stream_index]; | |
3683 | if (streams->state == AMPDU_STREAM_ACTIVE) { | |
3684 | ieee80211_stop_tx_ba_session(streams->sta, | |
3685 | streams->tid); | |
3686 | spin_unlock(&priv->stream_lock); | |
3687 | mwl8k_destroy_ba(hw, stream_index); | |
3688 | spin_lock(&priv->stream_lock); | |
3689 | } | |
3690 | } | |
3691 | } | |
3aefc37e | 3692 | |
cfacba12 YAP |
3693 | spin_unlock(&priv->stream_lock); |
3694 | done: | |
c27a54d3 | 3695 | atomic_dec(&priv->watchdog_event_pending); |
cfacba12 YAP |
3696 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); |
3697 | iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG), | |
3698 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
3699 | mwl8k_fw_unlock(hw); | |
3aefc37e NS |
3700 | return; |
3701 | } | |
3702 | ||
3703 | ||
b64fe619 LB |
3704 | /* |
3705 | * CMD_BSS_START. | |
3706 | */ | |
3707 | struct mwl8k_cmd_bss_start { | |
3708 | struct mwl8k_cmd_pkt header; | |
3709 | __le32 enable; | |
ba2d3587 | 3710 | } __packed; |
b64fe619 | 3711 | |
aa21d0f6 LB |
3712 | static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, |
3713 | struct ieee80211_vif *vif, int enable) | |
b64fe619 LB |
3714 | { |
3715 | struct mwl8k_cmd_bss_start *cmd; | |
e882efc9 YAP |
3716 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
3717 | struct mwl8k_priv *priv = hw->priv; | |
b64fe619 LB |
3718 | int rc; |
3719 | ||
e882efc9 YAP |
3720 | if (enable && (priv->running_bsses & (1 << mwl8k_vif->macid))) |
3721 | return 0; | |
3722 | ||
3723 | if (!enable && !(priv->running_bsses & (1 << mwl8k_vif->macid))) | |
3724 | return 0; | |
3725 | ||
b64fe619 LB |
3726 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); |
3727 | if (cmd == NULL) | |
3728 | return -ENOMEM; | |
3729 | ||
3730 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START); | |
3731 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3732 | cmd->enable = cpu_to_le32(enable); | |
3733 | ||
aa21d0f6 | 3734 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3735 | kfree(cmd); |
3736 | ||
e882efc9 YAP |
3737 | if (!rc) { |
3738 | if (enable) | |
3739 | priv->running_bsses |= (1 << mwl8k_vif->macid); | |
3740 | else | |
3741 | priv->running_bsses &= ~(1 << mwl8k_vif->macid); | |
3742 | } | |
b64fe619 LB |
3743 | return rc; |
3744 | } | |
3745 | ||
e882efc9 YAP |
3746 | static void mwl8k_enable_bsses(struct ieee80211_hw *hw, bool enable, u32 bitmap) |
3747 | { | |
3748 | struct mwl8k_priv *priv = hw->priv; | |
3749 | struct mwl8k_vif *mwl8k_vif, *tmp_vif; | |
3750 | struct ieee80211_vif *vif; | |
3751 | ||
3752 | list_for_each_entry_safe(mwl8k_vif, tmp_vif, &priv->vif_list, list) { | |
3753 | vif = mwl8k_vif->vif; | |
3754 | ||
3755 | if (!(bitmap & (1 << mwl8k_vif->macid))) | |
3756 | continue; | |
3757 | ||
3758 | if (vif->type == NL80211_IFTYPE_AP) | |
3759 | mwl8k_cmd_bss_start(hw, vif, enable); | |
3760 | } | |
3761 | } | |
5faa1aff NS |
3762 | /* |
3763 | * CMD_BASTREAM. | |
3764 | */ | |
3765 | ||
3766 | /* | |
3767 | * UPSTREAM is tx direction | |
3768 | */ | |
3769 | #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00 | |
3770 | #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01 | |
3771 | ||
ba30c4a5 | 3772 | enum ba_stream_action_type { |
5faa1aff NS |
3773 | MWL8K_BA_CREATE, |
3774 | MWL8K_BA_UPDATE, | |
3775 | MWL8K_BA_DESTROY, | |
3776 | MWL8K_BA_FLUSH, | |
3777 | MWL8K_BA_CHECK, | |
ba30c4a5 | 3778 | }; |
5faa1aff NS |
3779 | |
3780 | ||
3781 | struct mwl8k_create_ba_stream { | |
3782 | __le32 flags; | |
3783 | __le32 idle_thrs; | |
3784 | __le32 bar_thrs; | |
3785 | __le32 window_size; | |
3786 | u8 peer_mac_addr[6]; | |
3787 | u8 dialog_token; | |
3788 | u8 tid; | |
3789 | u8 queue_id; | |
3790 | u8 param_info; | |
3791 | __le32 ba_context; | |
3792 | u8 reset_seq_no_flag; | |
3793 | __le16 curr_seq_no; | |
3794 | u8 sta_src_mac_addr[6]; | |
3795 | } __packed; | |
3796 | ||
3797 | struct mwl8k_destroy_ba_stream { | |
3798 | __le32 flags; | |
3799 | __le32 ba_context; | |
3800 | } __packed; | |
3801 | ||
3802 | struct mwl8k_cmd_bastream { | |
3803 | struct mwl8k_cmd_pkt header; | |
3804 | __le32 action; | |
3805 | union { | |
3806 | struct mwl8k_create_ba_stream create_params; | |
3807 | struct mwl8k_destroy_ba_stream destroy_params; | |
3808 | }; | |
3809 | } __packed; | |
3810 | ||
3811 | static int | |
f95275c4 YAP |
3812 | mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, |
3813 | struct ieee80211_vif *vif) | |
5faa1aff NS |
3814 | { |
3815 | struct mwl8k_cmd_bastream *cmd; | |
3816 | int rc; | |
3817 | ||
3818 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3819 | if (cmd == NULL) | |
3820 | return -ENOMEM; | |
3821 | ||
3822 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3823 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3824 | ||
3825 | cmd->action = cpu_to_le32(MWL8K_BA_CHECK); | |
3826 | ||
3827 | cmd->create_params.queue_id = stream->idx; | |
3828 | memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr, | |
3829 | ETH_ALEN); | |
3830 | cmd->create_params.tid = stream->tid; | |
3831 | ||
3832 | cmd->create_params.flags = | |
3833 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) | | |
3834 | cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3835 | ||
f95275c4 | 3836 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
3837 | |
3838 | kfree(cmd); | |
3839 | ||
3840 | return rc; | |
3841 | } | |
3842 | ||
3843 | static int | |
3844 | mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream, | |
f95275c4 | 3845 | u8 buf_size, struct ieee80211_vif *vif) |
5faa1aff NS |
3846 | { |
3847 | struct mwl8k_cmd_bastream *cmd; | |
3848 | int rc; | |
3849 | ||
3850 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3851 | if (cmd == NULL) | |
3852 | return -ENOMEM; | |
3853 | ||
3854 | ||
3855 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3856 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3857 | ||
3858 | cmd->action = cpu_to_le32(MWL8K_BA_CREATE); | |
3859 | ||
3860 | cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size); | |
3861 | cmd->create_params.window_size = cpu_to_le32((u32)buf_size); | |
3862 | cmd->create_params.queue_id = stream->idx; | |
3863 | ||
3864 | memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN); | |
3865 | cmd->create_params.tid = stream->tid; | |
3866 | cmd->create_params.curr_seq_no = cpu_to_le16(0); | |
3867 | cmd->create_params.reset_seq_no_flag = 1; | |
3868 | ||
3869 | cmd->create_params.param_info = | |
3870 | (stream->sta->ht_cap.ampdu_factor & | |
3871 | IEEE80211_HT_AMPDU_PARM_FACTOR) | | |
3872 | ((stream->sta->ht_cap.ampdu_density << 2) & | |
3873 | IEEE80211_HT_AMPDU_PARM_DENSITY); | |
3874 | ||
3875 | cmd->create_params.flags = | |
3876 | cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE | | |
3877 | BASTREAM_FLAG_DIRECTION_UPSTREAM); | |
3878 | ||
f95275c4 | 3879 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
5faa1aff NS |
3880 | |
3881 | wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n", | |
3882 | stream->sta->addr, stream->tid); | |
3883 | kfree(cmd); | |
3884 | ||
3885 | return rc; | |
3886 | } | |
3887 | ||
3888 | static void mwl8k_destroy_ba(struct ieee80211_hw *hw, | |
07f6dda1 | 3889 | u8 idx) |
5faa1aff NS |
3890 | { |
3891 | struct mwl8k_cmd_bastream *cmd; | |
3892 | ||
3893 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3894 | if (cmd == NULL) | |
3895 | return; | |
3896 | ||
3897 | cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM); | |
3898 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3899 | cmd->action = cpu_to_le32(MWL8K_BA_DESTROY); | |
3900 | ||
07f6dda1 | 3901 | cmd->destroy_params.ba_context = cpu_to_le32(idx); |
5faa1aff NS |
3902 | mwl8k_post_cmd(hw, &cmd->header); |
3903 | ||
07f6dda1 | 3904 | wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx); |
5faa1aff NS |
3905 | |
3906 | kfree(cmd); | |
3907 | } | |
3908 | ||
3f5610ff LB |
3909 | /* |
3910 | * CMD_SET_NEW_STN. | |
3911 | */ | |
3912 | struct mwl8k_cmd_set_new_stn { | |
3913 | struct mwl8k_cmd_pkt header; | |
3914 | __le16 aid; | |
3915 | __u8 mac_addr[6]; | |
3916 | __le16 stn_id; | |
3917 | __le16 action; | |
3918 | __le16 rsvd; | |
3919 | __le32 legacy_rates; | |
3920 | __u8 ht_rates[4]; | |
3921 | __le16 cap_info; | |
3922 | __le16 ht_capabilities_info; | |
3923 | __u8 mac_ht_param_info; | |
3924 | __u8 rev; | |
3925 | __u8 control_channel; | |
3926 | __u8 add_channel; | |
3927 | __le16 op_mode; | |
3928 | __le16 stbc; | |
3929 | __u8 add_qos_info; | |
3930 | __u8 is_qos_sta; | |
3931 | __le32 fw_sta_ptr; | |
ba2d3587 | 3932 | } __packed; |
3f5610ff LB |
3933 | |
3934 | #define MWL8K_STA_ACTION_ADD 0 | |
3935 | #define MWL8K_STA_ACTION_REMOVE 2 | |
3936 | ||
3937 | static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw, | |
3938 | struct ieee80211_vif *vif, | |
3939 | struct ieee80211_sta *sta) | |
3940 | { | |
3941 | struct mwl8k_cmd_set_new_stn *cmd; | |
8707d026 | 3942 | u32 rates; |
3f5610ff LB |
3943 | int rc; |
3944 | ||
3945 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3946 | if (cmd == NULL) | |
3947 | return -ENOMEM; | |
3948 | ||
3949 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3950 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3951 | cmd->aid = cpu_to_le16(sta->aid); | |
3952 | memcpy(cmd->mac_addr, sta->addr, ETH_ALEN); | |
3953 | cmd->stn_id = cpu_to_le16(sta->aid); | |
3954 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD); | |
8707d026 LB |
3955 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
3956 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
3957 | else | |
3958 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
3959 | cmd->legacy_rates = cpu_to_le32(rates); | |
3f5610ff LB |
3960 | if (sta->ht_cap.ht_supported) { |
3961 | cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0]; | |
3962 | cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1]; | |
3963 | cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2]; | |
3964 | cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3]; | |
3965 | cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap); | |
3966 | cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) | | |
3967 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
3968 | cmd->is_qos_sta = 1; | |
3969 | } | |
3970 | ||
aa21d0f6 | 3971 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
3972 | kfree(cmd); |
3973 | ||
3974 | return rc; | |
3975 | } | |
3976 | ||
b64fe619 LB |
3977 | static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw, |
3978 | struct ieee80211_vif *vif) | |
3979 | { | |
3980 | struct mwl8k_cmd_set_new_stn *cmd; | |
3981 | int rc; | |
3982 | ||
3983 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
3984 | if (cmd == NULL) | |
3985 | return -ENOMEM; | |
3986 | ||
3987 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
3988 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
3989 | memcpy(cmd->mac_addr, vif->addr, ETH_ALEN); | |
3990 | ||
aa21d0f6 | 3991 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
b64fe619 LB |
3992 | kfree(cmd); |
3993 | ||
3994 | return rc; | |
3995 | } | |
3996 | ||
3f5610ff LB |
3997 | static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw, |
3998 | struct ieee80211_vif *vif, u8 *addr) | |
3999 | { | |
4000 | struct mwl8k_cmd_set_new_stn *cmd; | |
0dd13a48 YAP |
4001 | struct mwl8k_priv *priv = hw->priv; |
4002 | int rc, i; | |
4003 | u8 idx; | |
4004 | ||
4005 | spin_lock(&priv->stream_lock); | |
4006 | /* Destroy any active ampdu streams for this sta */ | |
4007 | for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) { | |
4008 | struct mwl8k_ampdu_stream *s; | |
4009 | s = &priv->ampdu[i]; | |
4010 | if (s->state != AMPDU_NO_STREAM) { | |
4011 | if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) { | |
4012 | if (s->state == AMPDU_STREAM_ACTIVE) { | |
4013 | idx = s->idx; | |
4014 | spin_unlock(&priv->stream_lock); | |
4015 | mwl8k_destroy_ba(hw, idx); | |
4016 | spin_lock(&priv->stream_lock); | |
4017 | } else if (s->state == AMPDU_STREAM_NEW) { | |
4018 | mwl8k_remove_stream(hw, s); | |
4019 | } | |
4020 | } | |
4021 | } | |
4022 | } | |
4023 | ||
4024 | spin_unlock(&priv->stream_lock); | |
3f5610ff LB |
4025 | |
4026 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4027 | if (cmd == NULL) | |
4028 | return -ENOMEM; | |
4029 | ||
4030 | cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN); | |
4031 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4032 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4033 | cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE); | |
4034 | ||
aa21d0f6 | 4035 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); |
3f5610ff LB |
4036 | kfree(cmd); |
4037 | ||
4038 | return rc; | |
4039 | } | |
4040 | ||
fcdc403c NS |
4041 | /* |
4042 | * CMD_UPDATE_ENCRYPTION. | |
4043 | */ | |
4044 | ||
4045 | #define MAX_ENCR_KEY_LENGTH 16 | |
4046 | #define MIC_KEY_LENGTH 8 | |
4047 | ||
4048 | struct mwl8k_cmd_update_encryption { | |
4049 | struct mwl8k_cmd_pkt header; | |
4050 | ||
4051 | __le32 action; | |
4052 | __le32 reserved; | |
4053 | __u8 mac_addr[6]; | |
4054 | __u8 encr_type; | |
4055 | ||
ba30c4a5 | 4056 | } __packed; |
fcdc403c NS |
4057 | |
4058 | struct mwl8k_cmd_set_key { | |
4059 | struct mwl8k_cmd_pkt header; | |
4060 | ||
4061 | __le32 action; | |
4062 | __le32 reserved; | |
4063 | __le16 length; | |
4064 | __le16 key_type_id; | |
4065 | __le32 key_info; | |
4066 | __le32 key_id; | |
4067 | __le16 key_len; | |
4068 | __u8 key_material[MAX_ENCR_KEY_LENGTH]; | |
4069 | __u8 tkip_tx_mic_key[MIC_KEY_LENGTH]; | |
4070 | __u8 tkip_rx_mic_key[MIC_KEY_LENGTH]; | |
4071 | __le16 tkip_rsc_low; | |
4072 | __le32 tkip_rsc_high; | |
4073 | __le16 tkip_tsc_low; | |
4074 | __le32 tkip_tsc_high; | |
4075 | __u8 mac_addr[6]; | |
ba30c4a5 | 4076 | } __packed; |
fcdc403c NS |
4077 | |
4078 | enum { | |
4079 | MWL8K_ENCR_ENABLE, | |
4080 | MWL8K_ENCR_SET_KEY, | |
4081 | MWL8K_ENCR_REMOVE_KEY, | |
4082 | MWL8K_ENCR_SET_GROUP_KEY, | |
4083 | }; | |
4084 | ||
4085 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0 | |
4086 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1 | |
4087 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4 | |
4088 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7 | |
4089 | #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8 | |
4090 | ||
4091 | enum { | |
4092 | MWL8K_ALG_WEP, | |
4093 | MWL8K_ALG_TKIP, | |
4094 | MWL8K_ALG_CCMP, | |
4095 | }; | |
4096 | ||
4097 | #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004 | |
4098 | #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008 | |
4099 | #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040 | |
4100 | #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000 | |
4101 | #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000 | |
4102 | ||
4103 | static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw, | |
4104 | struct ieee80211_vif *vif, | |
4105 | u8 *addr, | |
4106 | u8 encr_type) | |
4107 | { | |
4108 | struct mwl8k_cmd_update_encryption *cmd; | |
4109 | int rc; | |
4110 | ||
4111 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4112 | if (cmd == NULL) | |
4113 | return -ENOMEM; | |
4114 | ||
4115 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4116 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4117 | cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE); | |
4118 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4119 | cmd->encr_type = encr_type; | |
4120 | ||
4121 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4122 | kfree(cmd); | |
4123 | ||
4124 | return rc; | |
4125 | } | |
4126 | ||
4127 | static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd, | |
4128 | u8 *addr, | |
4129 | struct ieee80211_key_conf *key) | |
4130 | { | |
4131 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION); | |
4132 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4133 | cmd->length = cpu_to_le16(sizeof(*cmd) - | |
4134 | offsetof(struct mwl8k_cmd_set_key, length)); | |
4135 | cmd->key_id = cpu_to_le32(key->keyidx); | |
4136 | cmd->key_len = cpu_to_le16(key->keylen); | |
4137 | memcpy(cmd->mac_addr, addr, ETH_ALEN); | |
4138 | ||
4139 | switch (key->cipher) { | |
4140 | case WLAN_CIPHER_SUITE_WEP40: | |
4141 | case WLAN_CIPHER_SUITE_WEP104: | |
4142 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP); | |
4143 | if (key->keyidx == 0) | |
4144 | cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY); | |
4145 | ||
4146 | break; | |
4147 | case WLAN_CIPHER_SUITE_TKIP: | |
4148 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP); | |
4149 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4150 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4151 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4152 | cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID | |
4153 | | MWL8K_KEY_FLAG_TSC_VALID); | |
4154 | break; | |
4155 | case WLAN_CIPHER_SUITE_CCMP: | |
4156 | cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP); | |
4157 | cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4158 | ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE) | |
4159 | : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY); | |
4160 | break; | |
4161 | default: | |
4162 | return -ENOTSUPP; | |
4163 | } | |
4164 | ||
4165 | return 0; | |
4166 | } | |
4167 | ||
4168 | static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw, | |
4169 | struct ieee80211_vif *vif, | |
4170 | u8 *addr, | |
4171 | struct ieee80211_key_conf *key) | |
4172 | { | |
4173 | struct mwl8k_cmd_set_key *cmd; | |
4174 | int rc; | |
4175 | int keymlen; | |
4176 | u32 action; | |
4177 | u8 idx; | |
4178 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4179 | ||
4180 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4181 | if (cmd == NULL) | |
4182 | return -ENOMEM; | |
4183 | ||
4184 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4185 | if (rc < 0) | |
4186 | goto done; | |
4187 | ||
4188 | idx = key->keyidx; | |
4189 | ||
4190 | if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) | |
4191 | action = MWL8K_ENCR_SET_KEY; | |
4192 | else | |
4193 | action = MWL8K_ENCR_SET_GROUP_KEY; | |
4194 | ||
4195 | switch (key->cipher) { | |
4196 | case WLAN_CIPHER_SUITE_WEP40: | |
4197 | case WLAN_CIPHER_SUITE_WEP104: | |
4198 | if (!mwl8k_vif->wep_key_conf[idx].enabled) { | |
4199 | memcpy(mwl8k_vif->wep_key_conf[idx].key, key, | |
4200 | sizeof(*key) + key->keylen); | |
4201 | mwl8k_vif->wep_key_conf[idx].enabled = 1; | |
4202 | } | |
4203 | ||
9b571e24 | 4204 | keymlen = key->keylen; |
fcdc403c NS |
4205 | action = MWL8K_ENCR_SET_KEY; |
4206 | break; | |
4207 | case WLAN_CIPHER_SUITE_TKIP: | |
4208 | keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH; | |
4209 | break; | |
4210 | case WLAN_CIPHER_SUITE_CCMP: | |
4211 | keymlen = key->keylen; | |
4212 | break; | |
4213 | default: | |
4214 | rc = -ENOTSUPP; | |
4215 | goto done; | |
4216 | } | |
4217 | ||
4218 | memcpy(cmd->key_material, key->key, keymlen); | |
4219 | cmd->action = cpu_to_le32(action); | |
4220 | ||
4221 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4222 | done: | |
4223 | kfree(cmd); | |
4224 | ||
4225 | return rc; | |
4226 | } | |
4227 | ||
4228 | static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw, | |
4229 | struct ieee80211_vif *vif, | |
4230 | u8 *addr, | |
4231 | struct ieee80211_key_conf *key) | |
4232 | { | |
4233 | struct mwl8k_cmd_set_key *cmd; | |
4234 | int rc; | |
4235 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4236 | ||
4237 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4238 | if (cmd == NULL) | |
4239 | return -ENOMEM; | |
4240 | ||
4241 | rc = mwl8k_encryption_set_cmd_info(cmd, addr, key); | |
4242 | if (rc < 0) | |
4243 | goto done; | |
4244 | ||
4245 | if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || | |
d981e059 | 4246 | key->cipher == WLAN_CIPHER_SUITE_WEP104) |
fcdc403c NS |
4247 | mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; |
4248 | ||
4249 | cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY); | |
4250 | ||
4251 | rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header); | |
4252 | done: | |
4253 | kfree(cmd); | |
4254 | ||
4255 | return rc; | |
4256 | } | |
4257 | ||
4258 | static int mwl8k_set_key(struct ieee80211_hw *hw, | |
4259 | enum set_key_cmd cmd_param, | |
4260 | struct ieee80211_vif *vif, | |
4261 | struct ieee80211_sta *sta, | |
4262 | struct ieee80211_key_conf *key) | |
4263 | { | |
4264 | int rc = 0; | |
4265 | u8 encr_type; | |
4266 | u8 *addr; | |
4267 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
4268 | ||
4269 | if (vif->type == NL80211_IFTYPE_STATION) | |
4270 | return -EOPNOTSUPP; | |
4271 | ||
4272 | if (sta == NULL) | |
ff7e9f99 | 4273 | addr = vif->addr; |
fcdc403c NS |
4274 | else |
4275 | addr = sta->addr; | |
4276 | ||
4277 | if (cmd_param == SET_KEY) { | |
fcdc403c NS |
4278 | rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key); |
4279 | if (rc) | |
4280 | goto out; | |
4281 | ||
4282 | if ((key->cipher == WLAN_CIPHER_SUITE_WEP40) | |
4283 | || (key->cipher == WLAN_CIPHER_SUITE_WEP104)) | |
4284 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP; | |
4285 | else | |
4286 | encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED; | |
4287 | ||
4288 | rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr, | |
4289 | encr_type); | |
4290 | if (rc) | |
4291 | goto out; | |
4292 | ||
4293 | mwl8k_vif->is_hw_crypto_enabled = true; | |
4294 | ||
4295 | } else { | |
4296 | rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key); | |
4297 | ||
4298 | if (rc) | |
4299 | goto out; | |
fcdc403c NS |
4300 | } |
4301 | out: | |
4302 | return rc; | |
4303 | } | |
4304 | ||
55489b6e LB |
4305 | /* |
4306 | * CMD_UPDATE_STADB. | |
4307 | */ | |
25d81b1e LB |
4308 | struct ewc_ht_info { |
4309 | __le16 control1; | |
4310 | __le16 control2; | |
4311 | __le16 control3; | |
ba2d3587 | 4312 | } __packed; |
25d81b1e LB |
4313 | |
4314 | struct peer_capability_info { | |
4315 | /* Peer type - AP vs. STA. */ | |
4316 | __u8 peer_type; | |
4317 | ||
4318 | /* Basic 802.11 capabilities from assoc resp. */ | |
4319 | __le16 basic_caps; | |
4320 | ||
4321 | /* Set if peer supports 802.11n high throughput (HT). */ | |
4322 | __u8 ht_support; | |
4323 | ||
4324 | /* Valid if HT is supported. */ | |
4325 | __le16 ht_caps; | |
4326 | __u8 extended_ht_caps; | |
4327 | struct ewc_ht_info ewc_info; | |
4328 | ||
4329 | /* Legacy rate table. Intersection of our rates and peer rates. */ | |
4330 | __u8 legacy_rates[12]; | |
4331 | ||
4332 | /* HT rate table. Intersection of our rates and peer rates. */ | |
4333 | __u8 ht_rates[16]; | |
4334 | __u8 pad[16]; | |
4335 | ||
4336 | /* If set, interoperability mode, no proprietary extensions. */ | |
4337 | __u8 interop; | |
4338 | __u8 pad2; | |
4339 | __u8 station_id; | |
4340 | __le16 amsdu_enabled; | |
ba2d3587 | 4341 | } __packed; |
25d81b1e | 4342 | |
55489b6e LB |
4343 | struct mwl8k_cmd_update_stadb { |
4344 | struct mwl8k_cmd_pkt header; | |
4345 | ||
4346 | /* See STADB_ACTION_TYPE */ | |
4347 | __le32 action; | |
4348 | ||
4349 | /* Peer MAC address */ | |
4350 | __u8 peer_addr[ETH_ALEN]; | |
4351 | ||
4352 | __le32 reserved; | |
4353 | ||
4354 | /* Peer info - valid during add/update. */ | |
4355 | struct peer_capability_info peer_info; | |
ba2d3587 | 4356 | } __packed; |
55489b6e | 4357 | |
a680400e LB |
4358 | #define MWL8K_STA_DB_MODIFY_ENTRY 1 |
4359 | #define MWL8K_STA_DB_DEL_ENTRY 2 | |
4360 | ||
4361 | /* Peer Entry flags - used to define the type of the peer node */ | |
4362 | #define MWL8K_PEER_TYPE_ACCESSPOINT 2 | |
4363 | ||
4364 | static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw, | |
c6e96010 | 4365 | struct ieee80211_vif *vif, |
13935e2c | 4366 | struct ieee80211_sta *sta) |
55489b6e | 4367 | { |
55489b6e | 4368 | struct mwl8k_cmd_update_stadb *cmd; |
a680400e | 4369 | struct peer_capability_info *p; |
8707d026 | 4370 | u32 rates; |
55489b6e LB |
4371 | int rc; |
4372 | ||
4373 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4374 | if (cmd == NULL) | |
4375 | return -ENOMEM; | |
4376 | ||
4377 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4378 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
a680400e | 4379 | cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY); |
13935e2c | 4380 | memcpy(cmd->peer_addr, sta->addr, ETH_ALEN); |
55489b6e | 4381 | |
a680400e LB |
4382 | p = &cmd->peer_info; |
4383 | p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT; | |
4384 | p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability); | |
13935e2c | 4385 | p->ht_support = sta->ht_cap.ht_supported; |
b603742f | 4386 | p->ht_caps = cpu_to_le16(sta->ht_cap.cap); |
13935e2c LB |
4387 | p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) | |
4388 | ((sta->ht_cap.ampdu_density & 7) << 2); | |
8707d026 LB |
4389 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) |
4390 | rates = sta->supp_rates[IEEE80211_BAND_2GHZ]; | |
4391 | else | |
4392 | rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4393 | legacy_rate_mask_to_array(p->legacy_rates, rates); | |
13935e2c | 4394 | memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16); |
a680400e LB |
4395 | p->interop = 1; |
4396 | p->amsdu_enabled = 0; | |
4397 | ||
4398 | rc = mwl8k_post_cmd(hw, &cmd->header); | |
c4f74d35 NZ |
4399 | if (!rc) |
4400 | rc = p->station_id; | |
a680400e LB |
4401 | kfree(cmd); |
4402 | ||
c4f74d35 | 4403 | return rc; |
a680400e LB |
4404 | } |
4405 | ||
4406 | static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw, | |
4407 | struct ieee80211_vif *vif, u8 *addr) | |
4408 | { | |
4409 | struct mwl8k_cmd_update_stadb *cmd; | |
4410 | int rc; | |
4411 | ||
4412 | cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); | |
4413 | if (cmd == NULL) | |
4414 | return -ENOMEM; | |
4415 | ||
4416 | cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); | |
4417 | cmd->header.length = cpu_to_le16(sizeof(*cmd)); | |
4418 | cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY); | |
bbfd9128 | 4419 | memcpy(cmd->peer_addr, addr, ETH_ALEN); |
55489b6e | 4420 | |
a680400e | 4421 | rc = mwl8k_post_cmd(hw, &cmd->header); |
55489b6e LB |
4422 | kfree(cmd); |
4423 | ||
4424 | return rc; | |
4425 | } | |
4426 | ||
a66098da LB |
4427 | |
4428 | /* | |
4429 | * Interrupt handling. | |
4430 | */ | |
4431 | static irqreturn_t mwl8k_interrupt(int irq, void *dev_id) | |
4432 | { | |
4433 | struct ieee80211_hw *hw = dev_id; | |
4434 | struct mwl8k_priv *priv = hw->priv; | |
4435 | u32 status; | |
4436 | ||
4437 | status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
a66098da LB |
4438 | if (!status) |
4439 | return IRQ_NONE; | |
4440 | ||
1e9f9de3 LB |
4441 | if (status & MWL8K_A2H_INT_TX_DONE) { |
4442 | status &= ~MWL8K_A2H_INT_TX_DONE; | |
4443 | tasklet_schedule(&priv->poll_tx_task); | |
4444 | } | |
4445 | ||
a66098da | 4446 | if (status & MWL8K_A2H_INT_RX_READY) { |
67e2eb27 LB |
4447 | status &= ~MWL8K_A2H_INT_RX_READY; |
4448 | tasklet_schedule(&priv->poll_rx_task); | |
a66098da LB |
4449 | } |
4450 | ||
3aefc37e | 4451 | if (status & MWL8K_A2H_INT_BA_WATCHDOG) { |
c27a54d3 YAP |
4452 | iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG, |
4453 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
4454 | ||
4455 | atomic_inc(&priv->watchdog_event_pending); | |
3aefc37e NS |
4456 | status &= ~MWL8K_A2H_INT_BA_WATCHDOG; |
4457 | ieee80211_queue_work(hw, &priv->watchdog_ba_handle); | |
4458 | } | |
4459 | ||
67e2eb27 LB |
4460 | if (status) |
4461 | iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4462 | ||
a66098da | 4463 | if (status & MWL8K_A2H_INT_OPC_DONE) { |
618952a7 | 4464 | if (priv->hostcmd_wait != NULL) |
a66098da | 4465 | complete(priv->hostcmd_wait); |
a66098da LB |
4466 | } |
4467 | ||
4468 | if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { | |
618952a7 | 4469 | if (!mutex_is_locked(&priv->fw_mutex) && |
88de754a | 4470 | priv->radio_on && priv->pending_tx_pkts) |
618952a7 | 4471 | mwl8k_tx_start(priv); |
a66098da LB |
4472 | } |
4473 | ||
4474 | return IRQ_HANDLED; | |
4475 | } | |
4476 | ||
1e9f9de3 LB |
4477 | static void mwl8k_tx_poll(unsigned long data) |
4478 | { | |
4479 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4480 | struct mwl8k_priv *priv = hw->priv; | |
4481 | int limit; | |
4482 | int i; | |
4483 | ||
4484 | limit = 32; | |
4485 | ||
4486 | spin_lock_bh(&priv->tx_lock); | |
4487 | ||
e600707b | 4488 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
1e9f9de3 LB |
4489 | limit -= mwl8k_txq_reclaim(hw, i, limit, 0); |
4490 | ||
4491 | if (!priv->pending_tx_pkts && priv->tx_wait != NULL) { | |
4492 | complete(priv->tx_wait); | |
4493 | priv->tx_wait = NULL; | |
4494 | } | |
4495 | ||
4496 | spin_unlock_bh(&priv->tx_lock); | |
4497 | ||
4498 | if (limit) { | |
4499 | writel(~MWL8K_A2H_INT_TX_DONE, | |
4500 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4501 | } else { | |
4502 | tasklet_schedule(&priv->poll_tx_task); | |
4503 | } | |
4504 | } | |
4505 | ||
67e2eb27 LB |
4506 | static void mwl8k_rx_poll(unsigned long data) |
4507 | { | |
4508 | struct ieee80211_hw *hw = (struct ieee80211_hw *)data; | |
4509 | struct mwl8k_priv *priv = hw->priv; | |
4510 | int limit; | |
4511 | ||
4512 | limit = 32; | |
4513 | limit -= rxq_process(hw, 0, limit); | |
4514 | limit -= rxq_refill(hw, 0, limit); | |
4515 | ||
4516 | if (limit) { | |
4517 | writel(~MWL8K_A2H_INT_RX_READY, | |
4518 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
4519 | } else { | |
4520 | tasklet_schedule(&priv->poll_rx_task); | |
4521 | } | |
4522 | } | |
4523 | ||
a66098da LB |
4524 | |
4525 | /* | |
4526 | * Core driver operations. | |
4527 | */ | |
36323f81 TH |
4528 | static void mwl8k_tx(struct ieee80211_hw *hw, |
4529 | struct ieee80211_tx_control *control, | |
4530 | struct sk_buff *skb) | |
a66098da LB |
4531 | { |
4532 | struct mwl8k_priv *priv = hw->priv; | |
4533 | int index = skb_get_queue_mapping(skb); | |
a66098da | 4534 | |
9189c100 | 4535 | if (!priv->radio_on) { |
c96c31e4 JP |
4536 | wiphy_debug(hw->wiphy, |
4537 | "dropped TX frame since radio disabled\n"); | |
a66098da | 4538 | dev_kfree_skb(skb); |
7bb45683 | 4539 | return; |
a66098da LB |
4540 | } |
4541 | ||
36323f81 | 4542 | mwl8k_txq_xmit(hw, index, control->sta, skb); |
a66098da LB |
4543 | } |
4544 | ||
a66098da LB |
4545 | static int mwl8k_start(struct ieee80211_hw *hw) |
4546 | { | |
a66098da LB |
4547 | struct mwl8k_priv *priv = hw->priv; |
4548 | int rc; | |
4549 | ||
a0607fd3 | 4550 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
4551 | IRQF_SHARED, MWL8K_NAME, hw); |
4552 | if (rc) { | |
bf3ca7f7 | 4553 | priv->irq = -1; |
5db55844 | 4554 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
2ec610cb | 4555 | return -EIO; |
a66098da | 4556 | } |
bf3ca7f7 | 4557 | priv->irq = priv->pdev->irq; |
a66098da | 4558 | |
67e2eb27 | 4559 | /* Enable TX reclaim and RX tasklets. */ |
1e9f9de3 | 4560 | tasklet_enable(&priv->poll_tx_task); |
67e2eb27 | 4561 | tasklet_enable(&priv->poll_rx_task); |
2ec610cb | 4562 | |
a66098da | 4563 | /* Enable interrupts */ |
c23b5a69 | 4564 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
12488e01 NS |
4565 | iowrite32(MWL8K_A2H_EVENTS, |
4566 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 4567 | |
2ec610cb LB |
4568 | rc = mwl8k_fw_lock(hw); |
4569 | if (!rc) { | |
55489b6e | 4570 | rc = mwl8k_cmd_radio_enable(hw); |
a66098da | 4571 | |
5e4cf166 LB |
4572 | if (!priv->ap_fw) { |
4573 | if (!rc) | |
55489b6e | 4574 | rc = mwl8k_cmd_enable_sniffer(hw, 0); |
a66098da | 4575 | |
5e4cf166 LB |
4576 | if (!rc) |
4577 | rc = mwl8k_cmd_set_pre_scan(hw); | |
4578 | ||
4579 | if (!rc) | |
4580 | rc = mwl8k_cmd_set_post_scan(hw, | |
4581 | "\x00\x00\x00\x00\x00\x00"); | |
4582 | } | |
2ec610cb LB |
4583 | |
4584 | if (!rc) | |
55489b6e | 4585 | rc = mwl8k_cmd_set_rateadapt_mode(hw, 0); |
a66098da | 4586 | |
2ec610cb | 4587 | if (!rc) |
55489b6e | 4588 | rc = mwl8k_cmd_set_wmm_mode(hw, 0); |
a66098da | 4589 | |
2ec610cb LB |
4590 | mwl8k_fw_unlock(hw); |
4591 | } | |
4592 | ||
4593 | if (rc) { | |
4594 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); | |
4595 | free_irq(priv->pdev->irq, hw); | |
bf3ca7f7 | 4596 | priv->irq = -1; |
1e9f9de3 | 4597 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4598 | tasklet_disable(&priv->poll_rx_task); |
4850b6d3 NS |
4599 | } else { |
4600 | ieee80211_wake_queues(hw); | |
2ec610cb | 4601 | } |
a66098da LB |
4602 | |
4603 | return rc; | |
4604 | } | |
4605 | ||
a66098da LB |
4606 | static void mwl8k_stop(struct ieee80211_hw *hw) |
4607 | { | |
a66098da LB |
4608 | struct mwl8k_priv *priv = hw->priv; |
4609 | int i; | |
4610 | ||
6b6accc3 YAP |
4611 | if (!priv->hw_restart_in_progress) |
4612 | mwl8k_cmd_radio_disable(hw); | |
a66098da LB |
4613 | |
4614 | ieee80211_stop_queues(hw); | |
4615 | ||
a66098da | 4616 | /* Disable interrupts */ |
a66098da | 4617 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
bf3ca7f7 BC |
4618 | if (priv->irq != -1) { |
4619 | free_irq(priv->pdev->irq, hw); | |
4620 | priv->irq = -1; | |
4621 | } | |
a66098da LB |
4622 | |
4623 | /* Stop finalize join worker */ | |
4624 | cancel_work_sync(&priv->finalize_join_worker); | |
3aefc37e | 4625 | cancel_work_sync(&priv->watchdog_ba_handle); |
a66098da LB |
4626 | if (priv->beacon_skb != NULL) |
4627 | dev_kfree_skb(priv->beacon_skb); | |
4628 | ||
67e2eb27 | 4629 | /* Stop TX reclaim and RX tasklets. */ |
1e9f9de3 | 4630 | tasklet_disable(&priv->poll_tx_task); |
67e2eb27 | 4631 | tasklet_disable(&priv->poll_rx_task); |
a66098da | 4632 | |
a66098da | 4633 | /* Return all skbs to mac80211 */ |
e600707b | 4634 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 4635 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da LB |
4636 | } |
4637 | ||
0863ade8 BC |
4638 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image); |
4639 | ||
a66098da | 4640 | static int mwl8k_add_interface(struct ieee80211_hw *hw, |
f5bb87cf | 4641 | struct ieee80211_vif *vif) |
a66098da LB |
4642 | { |
4643 | struct mwl8k_priv *priv = hw->priv; | |
4644 | struct mwl8k_vif *mwl8k_vif; | |
ee0ddf18 | 4645 | u32 macids_supported; |
0863ade8 BC |
4646 | int macid, rc; |
4647 | struct mwl8k_device_info *di; | |
a66098da | 4648 | |
a43c49a8 LB |
4649 | /* |
4650 | * Reject interface creation if sniffer mode is active, as | |
4651 | * STA operation is mutually exclusive with hardware sniffer | |
b64fe619 | 4652 | * mode. (Sniffer mode is only used on STA firmware.) |
a43c49a8 LB |
4653 | */ |
4654 | if (priv->sniffer_enabled) { | |
c96c31e4 JP |
4655 | wiphy_info(hw->wiphy, |
4656 | "unable to create STA interface because sniffer mode is enabled\n"); | |
a43c49a8 LB |
4657 | return -EINVAL; |
4658 | } | |
4659 | ||
0863ade8 | 4660 | di = priv->device_info; |
ee0ddf18 LB |
4661 | switch (vif->type) { |
4662 | case NL80211_IFTYPE_AP: | |
0863ade8 BC |
4663 | if (!priv->ap_fw && di->fw_image_ap) { |
4664 | /* we must load the ap fw to meet this request */ | |
4665 | if (!list_empty(&priv->vif_list)) | |
4666 | return -EBUSY; | |
4667 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4668 | if (rc) | |
4669 | return rc; | |
4670 | } | |
ee0ddf18 LB |
4671 | macids_supported = priv->ap_macids_supported; |
4672 | break; | |
4673 | case NL80211_IFTYPE_STATION: | |
0863ade8 | 4674 | if (priv->ap_fw && di->fw_image_sta) { |
d59c1cfd YAP |
4675 | if (!list_empty(&priv->vif_list)) { |
4676 | wiphy_warn(hw->wiphy, "AP interface is running.\n" | |
4677 | "Adding STA interface for WDS"); | |
4678 | } else { | |
4679 | /* we must load the sta fw to | |
4680 | * meet this request. | |
4681 | */ | |
4682 | rc = mwl8k_reload_firmware(hw, | |
4683 | di->fw_image_sta); | |
4684 | if (rc) | |
4685 | return rc; | |
4686 | } | |
0863ade8 | 4687 | } |
ee0ddf18 LB |
4688 | macids_supported = priv->sta_macids_supported; |
4689 | break; | |
4690 | default: | |
4691 | return -EINVAL; | |
4692 | } | |
4693 | ||
4694 | macid = ffs(macids_supported & ~priv->macids_used); | |
4695 | if (!macid--) | |
4696 | return -EBUSY; | |
4697 | ||
f5bb87cf | 4698 | /* Setup driver private area. */ |
1ed32e4f | 4699 | mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4700 | memset(mwl8k_vif, 0, sizeof(*mwl8k_vif)); |
f5bb87cf | 4701 | mwl8k_vif->vif = vif; |
ee0ddf18 | 4702 | mwl8k_vif->macid = macid; |
a66098da | 4703 | mwl8k_vif->seqno = 0; |
d9a07d49 NS |
4704 | memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN); |
4705 | mwl8k_vif->is_hw_crypto_enabled = false; | |
a66098da | 4706 | |
aa21d0f6 LB |
4707 | /* Set the mac address. */ |
4708 | mwl8k_cmd_set_mac_addr(hw, vif, vif->addr); | |
4709 | ||
4710 | if (priv->ap_fw) | |
4711 | mwl8k_cmd_set_new_stn_add_self(hw, vif); | |
4712 | ||
ee0ddf18 | 4713 | priv->macids_used |= 1 << mwl8k_vif->macid; |
f5bb87cf | 4714 | list_add_tail(&mwl8k_vif->list, &priv->vif_list); |
a66098da LB |
4715 | |
4716 | return 0; | |
4717 | } | |
4718 | ||
6b6accc3 YAP |
4719 | static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif) |
4720 | { | |
4721 | /* Has ieee80211_restart_hw re-added the removed interfaces? */ | |
4722 | if (!priv->macids_used) | |
4723 | return; | |
4724 | ||
4725 | priv->macids_used &= ~(1 << vif->macid); | |
4726 | list_del(&vif->list); | |
4727 | } | |
4728 | ||
a66098da | 4729 | static void mwl8k_remove_interface(struct ieee80211_hw *hw, |
1ed32e4f | 4730 | struct ieee80211_vif *vif) |
a66098da LB |
4731 | { |
4732 | struct mwl8k_priv *priv = hw->priv; | |
f5bb87cf | 4733 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); |
a66098da | 4734 | |
b64fe619 LB |
4735 | if (priv->ap_fw) |
4736 | mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr); | |
4737 | ||
197a4e4e | 4738 | mwl8k_cmd_del_mac_addr(hw, vif, vif->addr); |
32060e1b | 4739 | |
6b6accc3 YAP |
4740 | mwl8k_remove_vif(priv, mwl8k_vif); |
4741 | } | |
4742 | ||
4743 | static void mwl8k_hw_restart_work(struct work_struct *work) | |
4744 | { | |
4745 | struct mwl8k_priv *priv = | |
4746 | container_of(work, struct mwl8k_priv, fw_reload); | |
4747 | struct ieee80211_hw *hw = priv->hw; | |
4748 | struct mwl8k_device_info *di; | |
4749 | int rc; | |
4750 | ||
4751 | /* If some command is waiting for a response, clear it */ | |
4752 | if (priv->hostcmd_wait != NULL) { | |
4753 | complete(priv->hostcmd_wait); | |
4754 | priv->hostcmd_wait = NULL; | |
4755 | } | |
4756 | ||
4757 | priv->hw_restart_owner = current; | |
4758 | di = priv->device_info; | |
4759 | mwl8k_fw_lock(hw); | |
4760 | ||
4761 | if (priv->ap_fw) | |
4762 | rc = mwl8k_reload_firmware(hw, di->fw_image_ap); | |
4763 | else | |
4764 | rc = mwl8k_reload_firmware(hw, di->fw_image_sta); | |
4765 | ||
4766 | if (rc) | |
4767 | goto fail; | |
4768 | ||
4769 | priv->hw_restart_owner = NULL; | |
4770 | priv->hw_restart_in_progress = false; | |
4771 | ||
4772 | /* | |
4773 | * This unlock will wake up the queues and | |
4774 | * also opens the command path for other | |
4775 | * commands | |
4776 | */ | |
4777 | mwl8k_fw_unlock(hw); | |
4778 | ||
4779 | ieee80211_restart_hw(hw); | |
4780 | ||
4781 | wiphy_err(hw->wiphy, "Firmware restarted successfully\n"); | |
4782 | ||
4783 | return; | |
4784 | fail: | |
4785 | mwl8k_fw_unlock(hw); | |
4786 | ||
4787 | wiphy_err(hw->wiphy, "Firmware restart failed\n"); | |
a66098da LB |
4788 | } |
4789 | ||
ee03a932 | 4790 | static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) |
a66098da | 4791 | { |
a66098da LB |
4792 | struct ieee80211_conf *conf = &hw->conf; |
4793 | struct mwl8k_priv *priv = hw->priv; | |
ee03a932 | 4794 | int rc; |
a66098da | 4795 | |
7595d67a | 4796 | if (conf->flags & IEEE80211_CONF_IDLE) { |
55489b6e | 4797 | mwl8k_cmd_radio_disable(hw); |
ee03a932 | 4798 | return 0; |
7595d67a LB |
4799 | } |
4800 | ||
ee03a932 LB |
4801 | rc = mwl8k_fw_lock(hw); |
4802 | if (rc) | |
4803 | return rc; | |
a66098da | 4804 | |
55489b6e | 4805 | rc = mwl8k_cmd_radio_enable(hw); |
ee03a932 LB |
4806 | if (rc) |
4807 | goto out; | |
a66098da | 4808 | |
0f4316b9 YAP |
4809 | if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { |
4810 | rc = mwl8k_cmd_set_rf_channel(hw, conf); | |
4811 | if (rc) | |
4812 | goto out; | |
4813 | } | |
ee03a932 | 4814 | |
a66098da LB |
4815 | if (conf->power_level > 18) |
4816 | conf->power_level = 18; | |
a66098da | 4817 | |
08b06347 | 4818 | if (priv->ap_fw) { |
03217087 NS |
4819 | |
4820 | if (conf->flags & IEEE80211_CONF_CHANGE_POWER) { | |
4821 | rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level); | |
4822 | if (rc) | |
4823 | goto out; | |
4824 | } | |
41fdf097 | 4825 | |
da62b761 | 4826 | |
08b06347 | 4827 | } else { |
41fdf097 NS |
4828 | rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level); |
4829 | if (rc) | |
4830 | goto out; | |
08b06347 LB |
4831 | rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7); |
4832 | } | |
a66098da | 4833 | |
ee03a932 LB |
4834 | out: |
4835 | mwl8k_fw_unlock(hw); | |
a66098da | 4836 | |
ee03a932 | 4837 | return rc; |
a66098da LB |
4838 | } |
4839 | ||
b64fe619 LB |
4840 | static void |
4841 | mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4842 | struct ieee80211_bss_conf *info, u32 changed) | |
a66098da | 4843 | { |
a66098da | 4844 | struct mwl8k_priv *priv = hw->priv; |
ba30c4a5 | 4845 | u32 ap_legacy_rates = 0; |
13935e2c | 4846 | u8 ap_mcs_rates[16]; |
3a980d0a LB |
4847 | int rc; |
4848 | ||
c3cbbe8a | 4849 | if (mwl8k_fw_lock(hw)) |
3a980d0a | 4850 | return; |
a66098da | 4851 | |
c3cbbe8a LB |
4852 | /* |
4853 | * No need to capture a beacon if we're no longer associated. | |
4854 | */ | |
4855 | if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc) | |
4856 | priv->capture_beacon = false; | |
3a980d0a | 4857 | |
c3cbbe8a | 4858 | /* |
13935e2c | 4859 | * Get the AP's legacy and MCS rates. |
c3cbbe8a | 4860 | */ |
7dc6a7a7 | 4861 | if (vif->bss_conf.assoc) { |
c6e96010 | 4862 | struct ieee80211_sta *ap; |
c97470dd | 4863 | |
c6e96010 | 4864 | rcu_read_lock(); |
c6e96010 | 4865 | |
c3cbbe8a LB |
4866 | ap = ieee80211_find_sta(vif, vif->bss_conf.bssid); |
4867 | if (ap == NULL) { | |
4868 | rcu_read_unlock(); | |
c6e96010 | 4869 | goto out; |
c3cbbe8a LB |
4870 | } |
4871 | ||
8707d026 LB |
4872 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) { |
4873 | ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ]; | |
4874 | } else { | |
4875 | ap_legacy_rates = | |
4876 | ap->supp_rates[IEEE80211_BAND_5GHZ] << 5; | |
4877 | } | |
13935e2c | 4878 | memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16); |
c3cbbe8a LB |
4879 | |
4880 | rcu_read_unlock(); | |
4881 | } | |
c6e96010 | 4882 | |
c3cbbe8a | 4883 | if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) { |
13935e2c | 4884 | rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates); |
3a980d0a LB |
4885 | if (rc) |
4886 | goto out; | |
a66098da | 4887 | |
b71ed2c6 | 4888 | rc = mwl8k_cmd_use_fixed_rate_sta(hw); |
3a980d0a LB |
4889 | if (rc) |
4890 | goto out; | |
c3cbbe8a | 4891 | } |
a66098da | 4892 | |
c3cbbe8a | 4893 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { |
7dc6a7a7 LB |
4894 | rc = mwl8k_set_radio_preamble(hw, |
4895 | vif->bss_conf.use_short_preamble); | |
3a980d0a LB |
4896 | if (rc) |
4897 | goto out; | |
c3cbbe8a | 4898 | } |
a66098da | 4899 | |
c3cbbe8a | 4900 | if (changed & BSS_CHANGED_ERP_SLOT) { |
7dc6a7a7 | 4901 | rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot); |
3a980d0a LB |
4902 | if (rc) |
4903 | goto out; | |
c3cbbe8a | 4904 | } |
a66098da | 4905 | |
c97470dd LB |
4906 | if (vif->bss_conf.assoc && |
4907 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT | | |
4908 | BSS_CHANGED_HT))) { | |
c3cbbe8a | 4909 | rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates); |
3a980d0a LB |
4910 | if (rc) |
4911 | goto out; | |
c3cbbe8a | 4912 | } |
a66098da | 4913 | |
c3cbbe8a LB |
4914 | if (vif->bss_conf.assoc && |
4915 | (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) { | |
a66098da LB |
4916 | /* |
4917 | * Finalize the join. Tell rx handler to process | |
4918 | * next beacon from our BSSID. | |
4919 | */ | |
0a11dfc3 | 4920 | memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN); |
a66098da | 4921 | priv->capture_beacon = true; |
a66098da LB |
4922 | } |
4923 | ||
3a980d0a LB |
4924 | out: |
4925 | mwl8k_fw_unlock(hw); | |
a66098da LB |
4926 | } |
4927 | ||
b64fe619 LB |
4928 | static void |
4929 | mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4930 | struct ieee80211_bss_conf *info, u32 changed) | |
4931 | { | |
4932 | int rc; | |
4933 | ||
4934 | if (mwl8k_fw_lock(hw)) | |
4935 | return; | |
4936 | ||
4937 | if (changed & BSS_CHANGED_ERP_PREAMBLE) { | |
4938 | rc = mwl8k_set_radio_preamble(hw, | |
4939 | vif->bss_conf.use_short_preamble); | |
4940 | if (rc) | |
4941 | goto out; | |
4942 | } | |
4943 | ||
4944 | if (changed & BSS_CHANGED_BASIC_RATES) { | |
4945 | int idx; | |
4946 | int rate; | |
4947 | ||
4948 | /* | |
4949 | * Use lowest supported basic rate for multicasts | |
4950 | * and management frames (such as probe responses -- | |
4951 | * beacons will always go out at 1 Mb/s). | |
4952 | */ | |
4953 | idx = ffs(vif->bss_conf.basic_rates); | |
8707d026 LB |
4954 | if (idx) |
4955 | idx--; | |
4956 | ||
4957 | if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) | |
4958 | rate = mwl8k_rates_24[idx].hw_value; | |
4959 | else | |
4960 | rate = mwl8k_rates_50[idx].hw_value; | |
b64fe619 LB |
4961 | |
4962 | mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate); | |
4963 | } | |
4964 | ||
4965 | if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) { | |
4966 | struct sk_buff *skb; | |
4967 | ||
4968 | skb = ieee80211_beacon_get(hw, vif); | |
4969 | if (skb != NULL) { | |
aa21d0f6 | 4970 | mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len); |
b64fe619 LB |
4971 | kfree_skb(skb); |
4972 | } | |
4973 | } | |
4974 | ||
4975 | if (changed & BSS_CHANGED_BEACON_ENABLED) | |
aa21d0f6 | 4976 | mwl8k_cmd_bss_start(hw, vif, info->enable_beacon); |
b64fe619 LB |
4977 | |
4978 | out: | |
4979 | mwl8k_fw_unlock(hw); | |
4980 | } | |
4981 | ||
4982 | static void | |
4983 | mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
4984 | struct ieee80211_bss_conf *info, u32 changed) | |
4985 | { | |
4986 | struct mwl8k_priv *priv = hw->priv; | |
4987 | ||
4988 | if (!priv->ap_fw) | |
4989 | mwl8k_bss_info_changed_sta(hw, vif, info, changed); | |
4990 | else | |
4991 | mwl8k_bss_info_changed_ap(hw, vif, info, changed); | |
4992 | } | |
4993 | ||
e81cd2d6 | 4994 | static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, |
22bedad3 | 4995 | struct netdev_hw_addr_list *mc_list) |
e81cd2d6 LB |
4996 | { |
4997 | struct mwl8k_cmd_pkt *cmd; | |
4998 | ||
447ced07 LB |
4999 | /* |
5000 | * Synthesize and return a command packet that programs the | |
5001 | * hardware multicast address filter. At this point we don't | |
5002 | * know whether FIF_ALLMULTI is being requested, but if it is, | |
5003 | * we'll end up throwing this packet away and creating a new | |
5004 | * one in mwl8k_configure_filter(). | |
5005 | */ | |
22bedad3 | 5006 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list); |
e81cd2d6 LB |
5007 | |
5008 | return (unsigned long)cmd; | |
5009 | } | |
5010 | ||
a43c49a8 LB |
5011 | static int |
5012 | mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw, | |
5013 | unsigned int changed_flags, | |
5014 | unsigned int *total_flags) | |
5015 | { | |
5016 | struct mwl8k_priv *priv = hw->priv; | |
5017 | ||
5018 | /* | |
5019 | * Hardware sniffer mode is mutually exclusive with STA | |
5020 | * operation, so refuse to enable sniffer mode if a STA | |
5021 | * interface is active. | |
5022 | */ | |
f5bb87cf | 5023 | if (!list_empty(&priv->vif_list)) { |
a43c49a8 | 5024 | if (net_ratelimit()) |
c96c31e4 JP |
5025 | wiphy_info(hw->wiphy, |
5026 | "not enabling sniffer mode because STA interface is active\n"); | |
a43c49a8 LB |
5027 | return 0; |
5028 | } | |
5029 | ||
5030 | if (!priv->sniffer_enabled) { | |
55489b6e | 5031 | if (mwl8k_cmd_enable_sniffer(hw, 1)) |
a43c49a8 LB |
5032 | return 0; |
5033 | priv->sniffer_enabled = true; | |
5034 | } | |
5035 | ||
5036 | *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI | | |
5037 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL | | |
5038 | FIF_OTHER_BSS; | |
5039 | ||
5040 | return 1; | |
5041 | } | |
5042 | ||
f5bb87cf LB |
5043 | static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv) |
5044 | { | |
5045 | if (!list_empty(&priv->vif_list)) | |
5046 | return list_entry(priv->vif_list.next, struct mwl8k_vif, list); | |
5047 | ||
5048 | return NULL; | |
5049 | } | |
5050 | ||
e6935ea1 LB |
5051 | static void mwl8k_configure_filter(struct ieee80211_hw *hw, |
5052 | unsigned int changed_flags, | |
5053 | unsigned int *total_flags, | |
5054 | u64 multicast) | |
5055 | { | |
5056 | struct mwl8k_priv *priv = hw->priv; | |
a43c49a8 LB |
5057 | struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast; |
5058 | ||
c0adae2c LB |
5059 | /* |
5060 | * AP firmware doesn't allow fine-grained control over | |
5061 | * the receive filter. | |
5062 | */ | |
5063 | if (priv->ap_fw) { | |
5064 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; | |
5065 | kfree(cmd); | |
5066 | return; | |
5067 | } | |
5068 | ||
a43c49a8 LB |
5069 | /* |
5070 | * Enable hardware sniffer mode if FIF_CONTROL or | |
5071 | * FIF_OTHER_BSS is requested. | |
5072 | */ | |
5073 | if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) && | |
5074 | mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) { | |
5075 | kfree(cmd); | |
5076 | return; | |
5077 | } | |
a66098da | 5078 | |
e6935ea1 | 5079 | /* Clear unsupported feature flags */ |
447ced07 | 5080 | *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC; |
a66098da | 5081 | |
90852f7a LB |
5082 | if (mwl8k_fw_lock(hw)) { |
5083 | kfree(cmd); | |
e6935ea1 | 5084 | return; |
90852f7a | 5085 | } |
a66098da | 5086 | |
a43c49a8 | 5087 | if (priv->sniffer_enabled) { |
55489b6e | 5088 | mwl8k_cmd_enable_sniffer(hw, 0); |
a43c49a8 LB |
5089 | priv->sniffer_enabled = false; |
5090 | } | |
5091 | ||
e6935ea1 | 5092 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { |
77165d88 LB |
5093 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { |
5094 | /* | |
5095 | * Disable the BSS filter. | |
5096 | */ | |
e6935ea1 | 5097 | mwl8k_cmd_set_pre_scan(hw); |
77165d88 | 5098 | } else { |
f5bb87cf | 5099 | struct mwl8k_vif *mwl8k_vif; |
0a11dfc3 | 5100 | const u8 *bssid; |
a94cc97e | 5101 | |
77165d88 LB |
5102 | /* |
5103 | * Enable the BSS filter. | |
5104 | * | |
5105 | * If there is an active STA interface, use that | |
5106 | * interface's BSSID, otherwise use a dummy one | |
5107 | * (where the OUI part needs to be nonzero for | |
5108 | * the BSSID to be accepted by POST_SCAN). | |
5109 | */ | |
f5bb87cf LB |
5110 | mwl8k_vif = mwl8k_first_vif(priv); |
5111 | if (mwl8k_vif != NULL) | |
5112 | bssid = mwl8k_vif->vif->bss_conf.bssid; | |
5113 | else | |
5114 | bssid = "\x01\x00\x00\x00\x00\x00"; | |
a94cc97e | 5115 | |
e6935ea1 | 5116 | mwl8k_cmd_set_post_scan(hw, bssid); |
a66098da LB |
5117 | } |
5118 | } | |
5119 | ||
447ced07 LB |
5120 | /* |
5121 | * If FIF_ALLMULTI is being requested, throw away the command | |
5122 | * packet that ->prepare_multicast() built and replace it with | |
5123 | * a command packet that enables reception of all multicast | |
5124 | * packets. | |
5125 | */ | |
5126 | if (*total_flags & FIF_ALLMULTI) { | |
5127 | kfree(cmd); | |
22bedad3 | 5128 | cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL); |
447ced07 LB |
5129 | } |
5130 | ||
5131 | if (cmd != NULL) { | |
5132 | mwl8k_post_cmd(hw, cmd); | |
5133 | kfree(cmd); | |
e6935ea1 | 5134 | } |
a66098da | 5135 | |
e6935ea1 | 5136 | mwl8k_fw_unlock(hw); |
a66098da LB |
5137 | } |
5138 | ||
a66098da LB |
5139 | static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) |
5140 | { | |
c2c2b12a | 5141 | return mwl8k_cmd_set_rts_threshold(hw, value); |
a66098da LB |
5142 | } |
5143 | ||
4a6967b8 JB |
5144 | static int mwl8k_sta_remove(struct ieee80211_hw *hw, |
5145 | struct ieee80211_vif *vif, | |
5146 | struct ieee80211_sta *sta) | |
3f5610ff LB |
5147 | { |
5148 | struct mwl8k_priv *priv = hw->priv; | |
5149 | ||
4a6967b8 JB |
5150 | if (priv->ap_fw) |
5151 | return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr); | |
5152 | else | |
5153 | return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr); | |
bbfd9128 LB |
5154 | } |
5155 | ||
4a6967b8 JB |
5156 | static int mwl8k_sta_add(struct ieee80211_hw *hw, |
5157 | struct ieee80211_vif *vif, | |
5158 | struct ieee80211_sta *sta) | |
bbfd9128 LB |
5159 | { |
5160 | struct mwl8k_priv *priv = hw->priv; | |
4a6967b8 | 5161 | int ret; |
fcdc403c NS |
5162 | int i; |
5163 | struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); | |
5164 | struct ieee80211_key_conf *key; | |
bbfd9128 | 5165 | |
4a6967b8 JB |
5166 | if (!priv->ap_fw) { |
5167 | ret = mwl8k_cmd_update_stadb_add(hw, vif, sta); | |
5168 | if (ret >= 0) { | |
5169 | MWL8K_STA(sta)->peer_id = ret; | |
17033543 NS |
5170 | if (sta->ht_cap.ht_supported) |
5171 | MWL8K_STA(sta)->is_ampdu_allowed = true; | |
fcdc403c | 5172 | ret = 0; |
4a6967b8 | 5173 | } |
bbfd9128 | 5174 | |
d9a07d49 NS |
5175 | } else { |
5176 | ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta); | |
bbfd9128 | 5177 | } |
4a6967b8 | 5178 | |
d9a07d49 NS |
5179 | for (i = 0; i < NUM_WEP_KEYS; i++) { |
5180 | key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key); | |
5181 | if (mwl8k_vif->wep_key_conf[i].enabled) | |
5182 | mwl8k_set_key(hw, SET_KEY, vif, sta, key); | |
5183 | } | |
fcdc403c | 5184 | return ret; |
bbfd9128 LB |
5185 | } |
5186 | ||
8a3a3c85 EP |
5187 | static int mwl8k_conf_tx(struct ieee80211_hw *hw, |
5188 | struct ieee80211_vif *vif, u16 queue, | |
a66098da LB |
5189 | const struct ieee80211_tx_queue_params *params) |
5190 | { | |
3e4f542c | 5191 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5192 | int rc; |
a66098da | 5193 | |
3e4f542c LB |
5194 | rc = mwl8k_fw_lock(hw); |
5195 | if (!rc) { | |
e600707b | 5196 | BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1); |
0863ade8 BC |
5197 | memcpy(&priv->wmm_params[queue], params, sizeof(*params)); |
5198 | ||
3e4f542c | 5199 | if (!priv->wmm_enabled) |
55489b6e | 5200 | rc = mwl8k_cmd_set_wmm_mode(hw, 1); |
a66098da | 5201 | |
85c9205c | 5202 | if (!rc) { |
e600707b | 5203 | int q = MWL8K_TX_WMM_QUEUES - 1 - queue; |
85c9205c | 5204 | rc = mwl8k_cmd_set_edca_params(hw, q, |
55489b6e LB |
5205 | params->cw_min, |
5206 | params->cw_max, | |
5207 | params->aifs, | |
5208 | params->txop); | |
85c9205c | 5209 | } |
3e4f542c LB |
5210 | |
5211 | mwl8k_fw_unlock(hw); | |
a66098da | 5212 | } |
3e4f542c | 5213 | |
a66098da LB |
5214 | return rc; |
5215 | } | |
5216 | ||
a66098da LB |
5217 | static int mwl8k_get_stats(struct ieee80211_hw *hw, |
5218 | struct ieee80211_low_level_stats *stats) | |
5219 | { | |
55489b6e | 5220 | return mwl8k_cmd_get_stat(hw, stats); |
a66098da LB |
5221 | } |
5222 | ||
0d462bbb JL |
5223 | static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx, |
5224 | struct survey_info *survey) | |
5225 | { | |
5226 | struct mwl8k_priv *priv = hw->priv; | |
5227 | struct ieee80211_conf *conf = &hw->conf; | |
5228 | ||
5229 | if (idx != 0) | |
5230 | return -ENOENT; | |
5231 | ||
5232 | survey->channel = conf->channel; | |
5233 | survey->filled = SURVEY_INFO_NOISE_DBM; | |
5234 | survey->noise = priv->noise; | |
5235 | ||
5236 | return 0; | |
5237 | } | |
5238 | ||
65f3ddcd NS |
5239 | #define MAX_AMPDU_ATTEMPTS 5 |
5240 | ||
a2292d83 LB |
5241 | static int |
5242 | mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, | |
5243 | enum ieee80211_ampdu_mlme_action action, | |
0b01f030 JB |
5244 | struct ieee80211_sta *sta, u16 tid, u16 *ssn, |
5245 | u8 buf_size) | |
a2292d83 | 5246 | { |
65f3ddcd NS |
5247 | |
5248 | int i, rc = 0; | |
5249 | struct mwl8k_priv *priv = hw->priv; | |
5250 | struct mwl8k_ampdu_stream *stream; | |
07f6dda1 | 5251 | u8 *addr = sta->addr, idx; |
fd712f5f | 5252 | struct mwl8k_sta *sta_info = MWL8K_STA(sta); |
65f3ddcd NS |
5253 | |
5254 | if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION)) | |
5255 | return -ENOTSUPP; | |
5256 | ||
5257 | spin_lock(&priv->stream_lock); | |
5258 | stream = mwl8k_lookup_stream(hw, addr, tid); | |
5259 | ||
a2292d83 LB |
5260 | switch (action) { |
5261 | case IEEE80211_AMPDU_RX_START: | |
5262 | case IEEE80211_AMPDU_RX_STOP: | |
65f3ddcd NS |
5263 | break; |
5264 | case IEEE80211_AMPDU_TX_START: | |
5265 | /* By the time we get here the hw queues may contain outgoing | |
5266 | * packets for this RA/TID that are not part of this BA | |
5267 | * session. The hw will assign sequence numbers to these | |
5268 | * packets as they go out. So if we query the hw for its next | |
5269 | * sequence number and use that for the SSN here, it may end up | |
5270 | * being wrong, which will lead to sequence number mismatch at | |
5271 | * the recipient. To avoid this, we reset the sequence number | |
5272 | * to O for the first MPDU in this BA stream. | |
5273 | */ | |
5274 | *ssn = 0; | |
5275 | if (stream == NULL) { | |
5276 | /* This means that somebody outside this driver called | |
5277 | * ieee80211_start_tx_ba_session. This is unexpected | |
5278 | * because we do our own rate control. Just warn and | |
5279 | * move on. | |
5280 | */ | |
5281 | wiphy_warn(hw->wiphy, "Unexpected call to %s. " | |
5282 | "Proceeding anyway.\n", __func__); | |
5283 | stream = mwl8k_add_stream(hw, sta, tid); | |
5284 | } | |
5285 | if (stream == NULL) { | |
5286 | wiphy_debug(hw->wiphy, "no free AMPDU streams\n"); | |
5287 | rc = -EBUSY; | |
5288 | break; | |
5289 | } | |
5290 | stream->state = AMPDU_STREAM_IN_PROGRESS; | |
5291 | ||
5292 | /* Release the lock before we do the time consuming stuff */ | |
5293 | spin_unlock(&priv->stream_lock); | |
5294 | for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) { | |
fd712f5f YAP |
5295 | |
5296 | /* Check if link is still valid */ | |
5297 | if (!sta_info->is_ampdu_allowed) { | |
5298 | spin_lock(&priv->stream_lock); | |
5299 | mwl8k_remove_stream(hw, stream); | |
5300 | spin_unlock(&priv->stream_lock); | |
5301 | return -EBUSY; | |
5302 | } | |
5303 | ||
f95275c4 | 5304 | rc = mwl8k_check_ba(hw, stream, vif); |
65f3ddcd | 5305 | |
6b6accc3 YAP |
5306 | /* If HW restart is in progress mwl8k_post_cmd will |
5307 | * return -EBUSY. Avoid retrying mwl8k_check_ba in | |
5308 | * such cases | |
5309 | */ | |
5310 | if (!rc || rc == -EBUSY) | |
65f3ddcd NS |
5311 | break; |
5312 | /* | |
5313 | * HW queues take time to be flushed, give them | |
5314 | * sufficient time | |
5315 | */ | |
5316 | ||
5317 | msleep(1000); | |
5318 | } | |
5319 | spin_lock(&priv->stream_lock); | |
5320 | if (rc) { | |
5321 | wiphy_err(hw->wiphy, "Stream for tid %d busy after %d" | |
5322 | " attempts\n", tid, MAX_AMPDU_ATTEMPTS); | |
5323 | mwl8k_remove_stream(hw, stream); | |
5324 | rc = -EBUSY; | |
5325 | break; | |
5326 | } | |
5327 | ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid); | |
5328 | break; | |
18b559d5 JB |
5329 | case IEEE80211_AMPDU_TX_STOP_CONT: |
5330 | case IEEE80211_AMPDU_TX_STOP_FLUSH: | |
5331 | case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: | |
eca107ff YAP |
5332 | if (stream) { |
5333 | if (stream->state == AMPDU_STREAM_ACTIVE) { | |
07f6dda1 | 5334 | idx = stream->idx; |
eca107ff | 5335 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5336 | mwl8k_destroy_ba(hw, idx); |
eca107ff YAP |
5337 | spin_lock(&priv->stream_lock); |
5338 | } | |
5339 | mwl8k_remove_stream(hw, stream); | |
65f3ddcd | 5340 | } |
65f3ddcd NS |
5341 | ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid); |
5342 | break; | |
5343 | case IEEE80211_AMPDU_TX_OPERATIONAL: | |
5344 | BUG_ON(stream == NULL); | |
5345 | BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS); | |
5346 | spin_unlock(&priv->stream_lock); | |
f95275c4 | 5347 | rc = mwl8k_create_ba(hw, stream, buf_size, vif); |
65f3ddcd NS |
5348 | spin_lock(&priv->stream_lock); |
5349 | if (!rc) | |
5350 | stream->state = AMPDU_STREAM_ACTIVE; | |
5351 | else { | |
07f6dda1 | 5352 | idx = stream->idx; |
65f3ddcd | 5353 | spin_unlock(&priv->stream_lock); |
07f6dda1 | 5354 | mwl8k_destroy_ba(hw, idx); |
65f3ddcd NS |
5355 | spin_lock(&priv->stream_lock); |
5356 | wiphy_debug(hw->wiphy, | |
5357 | "Failed adding stream for sta %pM tid %d\n", | |
5358 | addr, tid); | |
5359 | mwl8k_remove_stream(hw, stream); | |
5360 | } | |
5361 | break; | |
5362 | ||
a2292d83 | 5363 | default: |
65f3ddcd | 5364 | rc = -ENOTSUPP; |
a2292d83 | 5365 | } |
65f3ddcd NS |
5366 | |
5367 | spin_unlock(&priv->stream_lock); | |
5368 | return rc; | |
a2292d83 LB |
5369 | } |
5370 | ||
a66098da LB |
5371 | static const struct ieee80211_ops mwl8k_ops = { |
5372 | .tx = mwl8k_tx, | |
5373 | .start = mwl8k_start, | |
5374 | .stop = mwl8k_stop, | |
5375 | .add_interface = mwl8k_add_interface, | |
5376 | .remove_interface = mwl8k_remove_interface, | |
5377 | .config = mwl8k_config, | |
a66098da | 5378 | .bss_info_changed = mwl8k_bss_info_changed, |
3ac64bee | 5379 | .prepare_multicast = mwl8k_prepare_multicast, |
a66098da | 5380 | .configure_filter = mwl8k_configure_filter, |
fcdc403c | 5381 | .set_key = mwl8k_set_key, |
a66098da | 5382 | .set_rts_threshold = mwl8k_set_rts_threshold, |
4a6967b8 JB |
5383 | .sta_add = mwl8k_sta_add, |
5384 | .sta_remove = mwl8k_sta_remove, | |
a66098da | 5385 | .conf_tx = mwl8k_conf_tx, |
a66098da | 5386 | .get_stats = mwl8k_get_stats, |
0d462bbb | 5387 | .get_survey = mwl8k_get_survey, |
a2292d83 | 5388 | .ampdu_action = mwl8k_ampdu_action, |
a66098da LB |
5389 | }; |
5390 | ||
a66098da LB |
5391 | static void mwl8k_finalize_join_worker(struct work_struct *work) |
5392 | { | |
5393 | struct mwl8k_priv *priv = | |
5394 | container_of(work, struct mwl8k_priv, finalize_join_worker); | |
5395 | struct sk_buff *skb = priv->beacon_skb; | |
56007a02 JB |
5396 | struct ieee80211_mgmt *mgmt = (void *)skb->data; |
5397 | int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable); | |
5398 | const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM, | |
5399 | mgmt->u.beacon.variable, len); | |
5400 | int dtim_period = 1; | |
5401 | ||
5402 | if (tim && tim[1] >= 2) | |
5403 | dtim_period = tim[3]; | |
a66098da | 5404 | |
56007a02 | 5405 | mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period); |
a66098da | 5406 | |
f5bb87cf | 5407 | dev_kfree_skb(skb); |
a66098da LB |
5408 | priv->beacon_skb = NULL; |
5409 | } | |
5410 | ||
bcb628d5 | 5411 | enum { |
9e1b17ea LB |
5412 | MWL8363 = 0, |
5413 | MWL8687, | |
bcb628d5 | 5414 | MWL8366, |
6f6d1e9a LB |
5415 | }; |
5416 | ||
c2f2e202 | 5417 | #define MWL8K_8366_AP_FW_API 3 |
952a0e96 BC |
5418 | #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw" |
5419 | #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api) | |
5420 | ||
8dee5eef | 5421 | static struct mwl8k_device_info mwl8k_info_tbl[] = { |
9e1b17ea LB |
5422 | [MWL8363] = { |
5423 | .part_name = "88w8363", | |
5424 | .helper_image = "mwl8k/helper_8363.fw", | |
0863ade8 | 5425 | .fw_image_sta = "mwl8k/fmimage_8363.fw", |
9e1b17ea | 5426 | }, |
49eb691c | 5427 | [MWL8687] = { |
bcb628d5 JL |
5428 | .part_name = "88w8687", |
5429 | .helper_image = "mwl8k/helper_8687.fw", | |
0863ade8 | 5430 | .fw_image_sta = "mwl8k/fmimage_8687.fw", |
bcb628d5 | 5431 | }, |
49eb691c | 5432 | [MWL8366] = { |
bcb628d5 JL |
5433 | .part_name = "88w8366", |
5434 | .helper_image = "mwl8k/helper_8366.fw", | |
0863ade8 | 5435 | .fw_image_sta = "mwl8k/fmimage_8366.fw", |
952a0e96 BC |
5436 | .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API), |
5437 | .fw_api_ap = MWL8K_8366_AP_FW_API, | |
89a91f4f | 5438 | .ap_rxd_ops = &rxd_8366_ap_ops, |
bcb628d5 | 5439 | }, |
45a390dd LB |
5440 | }; |
5441 | ||
c92d4ede LB |
5442 | MODULE_FIRMWARE("mwl8k/helper_8363.fw"); |
5443 | MODULE_FIRMWARE("mwl8k/fmimage_8363.fw"); | |
5444 | MODULE_FIRMWARE("mwl8k/helper_8687.fw"); | |
5445 | MODULE_FIRMWARE("mwl8k/fmimage_8687.fw"); | |
5446 | MODULE_FIRMWARE("mwl8k/helper_8366.fw"); | |
5447 | MODULE_FIRMWARE("mwl8k/fmimage_8366.fw"); | |
952a0e96 | 5448 | MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API)); |
c92d4ede | 5449 | |
45a390dd | 5450 | static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = { |
e5868ba1 | 5451 | { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, }, |
9e1b17ea LB |
5452 | { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, }, |
5453 | { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, }, | |
bcb628d5 JL |
5454 | { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, }, |
5455 | { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, }, | |
5456 | { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, }, | |
ca66527c | 5457 | { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, }, |
bcb628d5 | 5458 | { }, |
45a390dd LB |
5459 | }; |
5460 | MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table); | |
5461 | ||
99020471 BC |
5462 | static int mwl8k_request_alt_fw(struct mwl8k_priv *priv) |
5463 | { | |
5464 | int rc; | |
5465 | printk(KERN_ERR "%s: Error requesting preferred fw %s.\n" | |
5466 | "Trying alternative firmware %s\n", pci_name(priv->pdev), | |
5467 | priv->fw_pref, priv->fw_alt); | |
5468 | rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true); | |
5469 | if (rc) { | |
5470 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5471 | pci_name(priv->pdev), priv->fw_alt); | |
5472 | return rc; | |
5473 | } | |
5474 | return 0; | |
5475 | } | |
5476 | ||
5477 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv); | |
5478 | static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) | |
5479 | { | |
5480 | struct mwl8k_priv *priv = context; | |
5481 | struct mwl8k_device_info *di = priv->device_info; | |
5482 | int rc; | |
5483 | ||
5484 | switch (priv->fw_state) { | |
5485 | case FW_STATE_INIT: | |
5486 | if (!fw) { | |
5487 | printk(KERN_ERR "%s: Error requesting helper fw %s\n", | |
5488 | pci_name(priv->pdev), di->helper_image); | |
5489 | goto fail; | |
5490 | } | |
5491 | priv->fw_helper = fw; | |
5492 | rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, | |
5493 | true); | |
5494 | if (rc && priv->fw_alt) { | |
5495 | rc = mwl8k_request_alt_fw(priv); | |
5496 | if (rc) | |
5497 | goto fail; | |
5498 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5499 | } else if (rc) | |
5500 | goto fail; | |
5501 | else | |
5502 | priv->fw_state = FW_STATE_LOADING_PREF; | |
5503 | break; | |
5504 | ||
5505 | case FW_STATE_LOADING_PREF: | |
5506 | if (!fw) { | |
5507 | if (priv->fw_alt) { | |
5508 | rc = mwl8k_request_alt_fw(priv); | |
5509 | if (rc) | |
5510 | goto fail; | |
5511 | priv->fw_state = FW_STATE_LOADING_ALT; | |
5512 | } else | |
5513 | goto fail; | |
5514 | } else { | |
5515 | priv->fw_ucode = fw; | |
5516 | rc = mwl8k_firmware_load_success(priv); | |
5517 | if (rc) | |
5518 | goto fail; | |
5519 | else | |
5520 | complete(&priv->firmware_loading_complete); | |
5521 | } | |
5522 | break; | |
5523 | ||
5524 | case FW_STATE_LOADING_ALT: | |
5525 | if (!fw) { | |
5526 | printk(KERN_ERR "%s: Error requesting alt fw %s\n", | |
5527 | pci_name(priv->pdev), di->helper_image); | |
5528 | goto fail; | |
5529 | } | |
5530 | priv->fw_ucode = fw; | |
5531 | rc = mwl8k_firmware_load_success(priv); | |
5532 | if (rc) | |
5533 | goto fail; | |
5534 | else | |
5535 | complete(&priv->firmware_loading_complete); | |
5536 | break; | |
5537 | ||
5538 | default: | |
5539 | printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n", | |
5540 | MWL8K_NAME, priv->fw_state); | |
5541 | BUG_ON(1); | |
5542 | } | |
5543 | ||
5544 | return; | |
5545 | ||
5546 | fail: | |
5547 | priv->fw_state = FW_STATE_ERROR; | |
5548 | complete(&priv->firmware_loading_complete); | |
5549 | device_release_driver(&priv->pdev->dev); | |
5550 | mwl8k_release_firmware(priv); | |
5551 | } | |
5552 | ||
6b6accc3 | 5553 | #define MAX_RESTART_ATTEMPTS 1 |
99020471 BC |
5554 | static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image, |
5555 | bool nowait) | |
a66098da | 5556 | { |
3cc7772c | 5557 | struct mwl8k_priv *priv = hw->priv; |
a66098da | 5558 | int rc; |
6b6accc3 | 5559 | int count = MAX_RESTART_ATTEMPTS; |
be695fc4 | 5560 | |
6b6accc3 | 5561 | retry: |
be695fc4 LB |
5562 | /* Reset firmware and hardware */ |
5563 | mwl8k_hw_reset(priv); | |
5564 | ||
5565 | /* Ask userland hotplug daemon for the device firmware */ | |
99020471 | 5566 | rc = mwl8k_request_firmware(priv, fw_image, nowait); |
be695fc4 | 5567 | if (rc) { |
5db55844 | 5568 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3cc7772c | 5569 | return rc; |
be695fc4 LB |
5570 | } |
5571 | ||
99020471 BC |
5572 | if (nowait) |
5573 | return rc; | |
5574 | ||
be695fc4 LB |
5575 | /* Load firmware into hardware */ |
5576 | rc = mwl8k_load_firmware(hw); | |
3cc7772c | 5577 | if (rc) |
5db55844 | 5578 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
be695fc4 LB |
5579 | |
5580 | /* Reclaim memory once firmware is successfully loaded */ | |
5581 | mwl8k_release_firmware(priv); | |
5582 | ||
6b6accc3 YAP |
5583 | if (rc && count) { |
5584 | /* FW did not start successfully; | |
5585 | * lets try one more time | |
5586 | */ | |
5587 | count--; | |
5588 | wiphy_err(hw->wiphy, "Trying to reload the firmware again\n"); | |
5589 | msleep(20); | |
5590 | goto retry; | |
5591 | } | |
5592 | ||
3cc7772c BC |
5593 | return rc; |
5594 | } | |
5595 | ||
73b46320 BC |
5596 | static int mwl8k_init_txqs(struct ieee80211_hw *hw) |
5597 | { | |
5598 | struct mwl8k_priv *priv = hw->priv; | |
5599 | int rc = 0; | |
5600 | int i; | |
5601 | ||
e600707b | 5602 | for (i = 0; i < mwl8k_tx_queues(priv); i++) { |
73b46320 BC |
5603 | rc = mwl8k_txq_init(hw, i); |
5604 | if (rc) | |
5605 | break; | |
5606 | if (priv->ap_fw) | |
5607 | iowrite32(priv->txq[i].txd_dma, | |
5608 | priv->sram + priv->txq_offset[i]); | |
5609 | } | |
5610 | return rc; | |
5611 | } | |
5612 | ||
3cc7772c BC |
5613 | /* initialize hw after successfully loading a firmware image */ |
5614 | static int mwl8k_probe_hw(struct ieee80211_hw *hw) | |
5615 | { | |
5616 | struct mwl8k_priv *priv = hw->priv; | |
5617 | int rc = 0; | |
5618 | int i; | |
be695fc4 | 5619 | |
91942230 | 5620 | if (priv->ap_fw) { |
89a91f4f | 5621 | priv->rxd_ops = priv->device_info->ap_rxd_ops; |
91942230 | 5622 | if (priv->rxd_ops == NULL) { |
c96c31e4 JP |
5623 | wiphy_err(hw->wiphy, |
5624 | "Driver does not have AP firmware image support for this hardware\n"); | |
a2ca8ecb | 5625 | rc = -ENOENT; |
91942230 LB |
5626 | goto err_stop_firmware; |
5627 | } | |
5628 | } else { | |
89a91f4f | 5629 | priv->rxd_ops = &rxd_sta_ops; |
91942230 | 5630 | } |
be695fc4 LB |
5631 | |
5632 | priv->sniffer_enabled = false; | |
5633 | priv->wmm_enabled = false; | |
5634 | priv->pending_tx_pkts = 0; | |
c27a54d3 | 5635 | atomic_set(&priv->watchdog_event_pending, 0); |
be695fc4 | 5636 | |
a66098da LB |
5637 | rc = mwl8k_rxq_init(hw, 0); |
5638 | if (rc) | |
3cc7772c | 5639 | goto err_stop_firmware; |
a66098da LB |
5640 | rxq_refill(hw, 0, INT_MAX); |
5641 | ||
73b46320 BC |
5642 | /* For the sta firmware, we need to know the dma addresses of tx queues |
5643 | * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them | |
5644 | * prior to issuing this command. But for the AP case, we learn the | |
5645 | * total number of queues from the result CMD_GET_HW_SPEC, so for this | |
5646 | * case we must initialize the tx queues after. | |
5647 | */ | |
8a7a578c | 5648 | priv->num_ampdu_queues = 0; |
73b46320 BC |
5649 | if (!priv->ap_fw) { |
5650 | rc = mwl8k_init_txqs(hw); | |
a66098da LB |
5651 | if (rc) |
5652 | goto err_free_queues; | |
5653 | } | |
5654 | ||
5655 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); | |
c23b5a69 | 5656 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
3aefc37e NS |
5657 | iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY| |
5658 | MWL8K_A2H_INT_BA_WATCHDOG, | |
1e9f9de3 | 5659 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); |
12488e01 NS |
5660 | iowrite32(MWL8K_A2H_INT_OPC_DONE, |
5661 | priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); | |
a66098da | 5662 | |
a0607fd3 | 5663 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
a66098da LB |
5664 | IRQF_SHARED, MWL8K_NAME, hw); |
5665 | if (rc) { | |
5db55844 | 5666 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
a66098da LB |
5667 | goto err_free_queues; |
5668 | } | |
5669 | ||
6b6accc3 YAP |
5670 | /* |
5671 | * When hw restart is requested, | |
5672 | * mac80211 will take care of clearing | |
5673 | * the ampdu streams, so do not clear | |
5674 | * the ampdu state here | |
5675 | */ | |
5676 | if (!priv->hw_restart_in_progress) | |
5677 | memset(priv->ampdu, 0, sizeof(priv->ampdu)); | |
ac109fd0 | 5678 | |
a66098da LB |
5679 | /* |
5680 | * Temporarily enable interrupts. Initial firmware host | |
c2c2b12a | 5681 | * commands use interrupts and avoid polling. Disable |
a66098da LB |
5682 | * interrupts when done. |
5683 | */ | |
c23b5a69 | 5684 | iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5685 | |
5686 | /* Get config data, mac addrs etc */ | |
42fba21d LB |
5687 | if (priv->ap_fw) { |
5688 | rc = mwl8k_cmd_get_hw_spec_ap(hw); | |
73b46320 BC |
5689 | if (!rc) |
5690 | rc = mwl8k_init_txqs(hw); | |
42fba21d LB |
5691 | if (!rc) |
5692 | rc = mwl8k_cmd_set_hw_spec(hw); | |
5693 | } else { | |
5694 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | |
5695 | } | |
a66098da | 5696 | if (rc) { |
5db55844 | 5697 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
be695fc4 | 5698 | goto err_free_irq; |
a66098da LB |
5699 | } |
5700 | ||
5701 | /* Turn radio off */ | |
55489b6e | 5702 | rc = mwl8k_cmd_radio_disable(hw); |
a66098da | 5703 | if (rc) { |
5db55844 | 5704 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
be695fc4 | 5705 | goto err_free_irq; |
a66098da LB |
5706 | } |
5707 | ||
32060e1b | 5708 | /* Clear MAC address */ |
aa21d0f6 | 5709 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
32060e1b | 5710 | if (rc) { |
5db55844 | 5711 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
be695fc4 | 5712 | goto err_free_irq; |
32060e1b LB |
5713 | } |
5714 | ||
a246ac38 YAP |
5715 | /* Configure Antennas */ |
5716 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3); | |
5717 | if (rc) | |
5718 | wiphy_warn(hw->wiphy, "failed to set # of RX antennas"); | |
5719 | rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7); | |
5720 | if (rc) | |
5721 | wiphy_warn(hw->wiphy, "failed to set # of TX antennas"); | |
5722 | ||
5723 | ||
a66098da | 5724 | /* Disable interrupts */ |
a66098da | 5725 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5726 | free_irq(priv->pdev->irq, hw); |
5727 | ||
c96c31e4 JP |
5728 | wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n", |
5729 | priv->device_info->part_name, | |
5730 | priv->hw_rev, hw->wiphy->perm_addr, | |
5731 | priv->ap_fw ? "AP" : "STA", | |
5732 | (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, | |
5733 | (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); | |
a66098da LB |
5734 | |
5735 | return 0; | |
5736 | ||
a66098da | 5737 | err_free_irq: |
a66098da | 5738 | iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); |
a66098da LB |
5739 | free_irq(priv->pdev->irq, hw); |
5740 | ||
5741 | err_free_queues: | |
e600707b | 5742 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
5743 | mwl8k_txq_deinit(hw, i); |
5744 | mwl8k_rxq_deinit(hw, 0); | |
5745 | ||
3cc7772c BC |
5746 | err_stop_firmware: |
5747 | mwl8k_hw_reset(priv); | |
5748 | ||
5749 | return rc; | |
5750 | } | |
5751 | ||
5752 | /* | |
5753 | * invoke mwl8k_reload_firmware to change the firmware image after the device | |
5754 | * has already been registered | |
5755 | */ | |
5756 | static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image) | |
5757 | { | |
5758 | int i, rc = 0; | |
5759 | struct mwl8k_priv *priv = hw->priv; | |
6b6accc3 | 5760 | struct mwl8k_vif *vif, *tmp_vif; |
3cc7772c BC |
5761 | |
5762 | mwl8k_stop(hw); | |
5763 | mwl8k_rxq_deinit(hw, 0); | |
5764 | ||
6b6accc3 YAP |
5765 | /* |
5766 | * All the existing interfaces are re-added by the ieee80211_reconfig; | |
5767 | * which means driver should remove existing interfaces before calling | |
5768 | * ieee80211_restart_hw | |
5769 | */ | |
5770 | if (priv->hw_restart_in_progress) | |
5771 | list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list) | |
5772 | mwl8k_remove_vif(priv, vif); | |
5773 | ||
e600707b | 5774 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5775 | mwl8k_txq_deinit(hw, i); |
5776 | ||
99020471 | 5777 | rc = mwl8k_init_firmware(hw, fw_image, false); |
3cc7772c BC |
5778 | if (rc) |
5779 | goto fail; | |
5780 | ||
5781 | rc = mwl8k_probe_hw(hw); | |
5782 | if (rc) | |
5783 | goto fail; | |
5784 | ||
6b6accc3 YAP |
5785 | if (priv->hw_restart_in_progress) |
5786 | return rc; | |
5787 | ||
3cc7772c BC |
5788 | rc = mwl8k_start(hw); |
5789 | if (rc) | |
5790 | goto fail; | |
5791 | ||
5792 | rc = mwl8k_config(hw, ~0); | |
5793 | if (rc) | |
5794 | goto fail; | |
5795 | ||
e600707b | 5796 | for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) { |
8a3a3c85 | 5797 | rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]); |
3cc7772c BC |
5798 | if (rc) |
5799 | goto fail; | |
5800 | } | |
5801 | ||
5802 | return rc; | |
5803 | ||
5804 | fail: | |
5805 | printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n"); | |
5806 | return rc; | |
5807 | } | |
5808 | ||
5d377fca YAP |
5809 | static const struct ieee80211_iface_limit ap_if_limits[] = { |
5810 | { .max = 8, .types = BIT(NL80211_IFTYPE_AP) }, | |
2acdaa7a | 5811 | { .max = 1, .types = BIT(NL80211_IFTYPE_STATION) }, |
5d377fca YAP |
5812 | }; |
5813 | ||
5814 | static const struct ieee80211_iface_combination ap_if_comb = { | |
5815 | .limits = ap_if_limits, | |
5816 | .n_limits = ARRAY_SIZE(ap_if_limits), | |
5817 | .max_interfaces = 8, | |
5818 | .num_different_channels = 1, | |
5819 | }; | |
5820 | ||
5821 | ||
3cc7772c BC |
5822 | static int mwl8k_firmware_load_success(struct mwl8k_priv *priv) |
5823 | { | |
5824 | struct ieee80211_hw *hw = priv->hw; | |
5825 | int i, rc; | |
5826 | ||
99020471 BC |
5827 | rc = mwl8k_load_firmware(hw); |
5828 | mwl8k_release_firmware(priv); | |
5829 | if (rc) { | |
5830 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); | |
5831 | return rc; | |
5832 | } | |
5833 | ||
3cc7772c BC |
5834 | /* |
5835 | * Extra headroom is the size of the required DMA header | |
5836 | * minus the size of the smallest 802.11 frame (CTS frame). | |
5837 | */ | |
5838 | hw->extra_tx_headroom = | |
5839 | sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts); | |
5840 | ||
ff776cec YAP |
5841 | hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0; |
5842 | ||
3cc7772c BC |
5843 | hw->channel_change_time = 10; |
5844 | ||
e600707b | 5845 | hw->queues = MWL8K_TX_WMM_QUEUES; |
3cc7772c BC |
5846 | |
5847 | /* Set rssi values to dBm */ | |
0bf22c37 | 5848 | hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL; |
2a36a0ec YAP |
5849 | |
5850 | /* | |
5851 | * Ask mac80211 to not to trigger PS mode | |
5852 | * based on PM bit of incoming frames. | |
5853 | */ | |
5854 | if (priv->ap_fw) | |
5855 | hw->flags |= IEEE80211_HW_AP_LINK_PS; | |
5856 | ||
3cc7772c BC |
5857 | hw->vif_data_size = sizeof(struct mwl8k_vif); |
5858 | hw->sta_data_size = sizeof(struct mwl8k_sta); | |
5859 | ||
5860 | priv->macids_used = 0; | |
5861 | INIT_LIST_HEAD(&priv->vif_list); | |
5862 | ||
5863 | /* Set default radio state and preamble */ | |
3db1cd5c RR |
5864 | priv->radio_on = false; |
5865 | priv->radio_short_preamble = false; | |
3cc7772c BC |
5866 | |
5867 | /* Finalize join worker */ | |
5868 | INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); | |
3aefc37e NS |
5869 | /* Handle watchdog ba events */ |
5870 | INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events); | |
6b6accc3 YAP |
5871 | /* To reload the firmware if it crashes */ |
5872 | INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work); | |
3cc7772c BC |
5873 | |
5874 | /* TX reclaim and RX tasklets. */ | |
5875 | tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw); | |
5876 | tasklet_disable(&priv->poll_tx_task); | |
5877 | tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw); | |
5878 | tasklet_disable(&priv->poll_rx_task); | |
5879 | ||
5880 | /* Power management cookie */ | |
5881 | priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); | |
5882 | if (priv->cookie == NULL) | |
5883 | return -ENOMEM; | |
5884 | ||
5885 | mutex_init(&priv->fw_mutex); | |
5886 | priv->fw_mutex_owner = NULL; | |
5887 | priv->fw_mutex_depth = 0; | |
5888 | priv->hostcmd_wait = NULL; | |
5889 | ||
5890 | spin_lock_init(&priv->tx_lock); | |
5891 | ||
ac109fd0 BC |
5892 | spin_lock_init(&priv->stream_lock); |
5893 | ||
3cc7772c BC |
5894 | priv->tx_wait = NULL; |
5895 | ||
5896 | rc = mwl8k_probe_hw(hw); | |
5897 | if (rc) | |
5898 | goto err_free_cookie; | |
5899 | ||
5900 | hw->wiphy->interface_modes = 0; | |
5d377fca YAP |
5901 | |
5902 | if (priv->ap_macids_supported || priv->device_info->fw_image_ap) { | |
3cc7772c | 5903 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP); |
2acdaa7a | 5904 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); |
5d377fca YAP |
5905 | hw->wiphy->iface_combinations = &ap_if_comb; |
5906 | hw->wiphy->n_iface_combinations = 1; | |
5907 | } | |
5908 | ||
3cc7772c BC |
5909 | if (priv->sta_macids_supported || priv->device_info->fw_image_sta) |
5910 | hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION); | |
5911 | ||
5912 | rc = ieee80211_register_hw(hw); | |
5913 | if (rc) { | |
5914 | wiphy_err(hw->wiphy, "Cannot register device\n"); | |
5915 | goto err_unprobe_hw; | |
5916 | } | |
5917 | ||
5918 | return 0; | |
5919 | ||
5920 | err_unprobe_hw: | |
e600707b | 5921 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
3cc7772c BC |
5922 | mwl8k_txq_deinit(hw, i); |
5923 | mwl8k_rxq_deinit(hw, 0); | |
5924 | ||
be695fc4 | 5925 | err_free_cookie: |
a66098da LB |
5926 | if (priv->cookie != NULL) |
5927 | pci_free_consistent(priv->pdev, 4, | |
5928 | priv->cookie, priv->cookie_dma); | |
5929 | ||
3cc7772c BC |
5930 | return rc; |
5931 | } | |
8dee5eef | 5932 | static int mwl8k_probe(struct pci_dev *pdev, |
3cc7772c BC |
5933 | const struct pci_device_id *id) |
5934 | { | |
5935 | static int printed_version; | |
5936 | struct ieee80211_hw *hw; | |
5937 | struct mwl8k_priv *priv; | |
0863ade8 | 5938 | struct mwl8k_device_info *di; |
3cc7772c BC |
5939 | int rc; |
5940 | ||
5941 | if (!printed_version) { | |
5942 | printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION); | |
5943 | printed_version = 1; | |
5944 | } | |
5945 | ||
5946 | ||
5947 | rc = pci_enable_device(pdev); | |
5948 | if (rc) { | |
5949 | printk(KERN_ERR "%s: Cannot enable new PCI device\n", | |
5950 | MWL8K_NAME); | |
5951 | return rc; | |
5952 | } | |
5953 | ||
5954 | rc = pci_request_regions(pdev, MWL8K_NAME); | |
5955 | if (rc) { | |
5956 | printk(KERN_ERR "%s: Cannot obtain PCI resources\n", | |
5957 | MWL8K_NAME); | |
5958 | goto err_disable_device; | |
5959 | } | |
5960 | ||
5961 | pci_set_master(pdev); | |
5962 | ||
5963 | ||
5964 | hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); | |
5965 | if (hw == NULL) { | |
5966 | printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); | |
5967 | rc = -ENOMEM; | |
5968 | goto err_free_reg; | |
5969 | } | |
5970 | ||
5971 | SET_IEEE80211_DEV(hw, &pdev->dev); | |
5972 | pci_set_drvdata(pdev, hw); | |
5973 | ||
5974 | priv = hw->priv; | |
5975 | priv->hw = hw; | |
5976 | priv->pdev = pdev; | |
5977 | priv->device_info = &mwl8k_info_tbl[id->driver_data]; | |
5978 | ||
5979 | ||
5980 | priv->sram = pci_iomap(pdev, 0, 0x10000); | |
5981 | if (priv->sram == NULL) { | |
5982 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); | |
a2ca8ecb | 5983 | rc = -EIO; |
3cc7772c BC |
5984 | goto err_iounmap; |
5985 | } | |
5986 | ||
5987 | /* | |
5988 | * If BAR0 is a 32 bit BAR, the register BAR will be BAR1. | |
5989 | * If BAR0 is a 64 bit BAR, the register BAR will be BAR2. | |
5990 | */ | |
5991 | priv->regs = pci_iomap(pdev, 1, 0x10000); | |
5992 | if (priv->regs == NULL) { | |
5993 | priv->regs = pci_iomap(pdev, 2, 0x10000); | |
5994 | if (priv->regs == NULL) { | |
5995 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); | |
a2ca8ecb | 5996 | rc = -EIO; |
3cc7772c BC |
5997 | goto err_iounmap; |
5998 | } | |
5999 | } | |
6000 | ||
0863ade8 | 6001 | /* |
99020471 BC |
6002 | * Choose the initial fw image depending on user input. If a second |
6003 | * image is available, make it the alternative image that will be | |
6004 | * loaded if the first one fails. | |
0863ade8 | 6005 | */ |
99020471 | 6006 | init_completion(&priv->firmware_loading_complete); |
0863ade8 | 6007 | di = priv->device_info; |
99020471 BC |
6008 | if (ap_mode_default && di->fw_image_ap) { |
6009 | priv->fw_pref = di->fw_image_ap; | |
6010 | priv->fw_alt = di->fw_image_sta; | |
6011 | } else if (!ap_mode_default && di->fw_image_sta) { | |
6012 | priv->fw_pref = di->fw_image_sta; | |
6013 | priv->fw_alt = di->fw_image_ap; | |
6014 | } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) { | |
0863ade8 | 6015 | printk(KERN_WARNING "AP fw is unavailable. Using STA fw."); |
99020471 | 6016 | priv->fw_pref = di->fw_image_sta; |
0863ade8 BC |
6017 | } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) { |
6018 | printk(KERN_WARNING "STA fw is unavailable. Using AP fw."); | |
99020471 BC |
6019 | priv->fw_pref = di->fw_image_ap; |
6020 | } | |
6021 | rc = mwl8k_init_firmware(hw, priv->fw_pref, true); | |
3cc7772c BC |
6022 | if (rc) |
6023 | goto err_stop_firmware; | |
6b6accc3 YAP |
6024 | |
6025 | priv->hw_restart_in_progress = false; | |
6026 | ||
e882efc9 YAP |
6027 | priv->running_bsses = 0; |
6028 | ||
99020471 | 6029 | return rc; |
3cc7772c | 6030 | |
be695fc4 LB |
6031 | err_stop_firmware: |
6032 | mwl8k_hw_reset(priv); | |
be695fc4 LB |
6033 | |
6034 | err_iounmap: | |
a66098da LB |
6035 | if (priv->regs != NULL) |
6036 | pci_iounmap(pdev, priv->regs); | |
6037 | ||
5b9482dd LB |
6038 | if (priv->sram != NULL) |
6039 | pci_iounmap(pdev, priv->sram); | |
6040 | ||
a66098da LB |
6041 | pci_set_drvdata(pdev, NULL); |
6042 | ieee80211_free_hw(hw); | |
6043 | ||
6044 | err_free_reg: | |
6045 | pci_release_regions(pdev); | |
3db95e50 LB |
6046 | |
6047 | err_disable_device: | |
a66098da LB |
6048 | pci_disable_device(pdev); |
6049 | ||
6050 | return rc; | |
6051 | } | |
6052 | ||
8dee5eef | 6053 | static void mwl8k_remove(struct pci_dev *pdev) |
a66098da LB |
6054 | { |
6055 | struct ieee80211_hw *hw = pci_get_drvdata(pdev); | |
6056 | struct mwl8k_priv *priv; | |
6057 | int i; | |
6058 | ||
6059 | if (hw == NULL) | |
6060 | return; | |
6061 | priv = hw->priv; | |
6062 | ||
99020471 BC |
6063 | wait_for_completion(&priv->firmware_loading_complete); |
6064 | ||
6065 | if (priv->fw_state == FW_STATE_ERROR) { | |
6066 | mwl8k_hw_reset(priv); | |
6067 | goto unmap; | |
6068 | } | |
6069 | ||
a66098da LB |
6070 | ieee80211_stop_queues(hw); |
6071 | ||
60aa569f LB |
6072 | ieee80211_unregister_hw(hw); |
6073 | ||
67e2eb27 | 6074 | /* Remove TX reclaim and RX tasklets. */ |
1e9f9de3 | 6075 | tasklet_kill(&priv->poll_tx_task); |
67e2eb27 | 6076 | tasklet_kill(&priv->poll_rx_task); |
a66098da | 6077 | |
a66098da LB |
6078 | /* Stop hardware */ |
6079 | mwl8k_hw_reset(priv); | |
6080 | ||
6081 | /* Return all skbs to mac80211 */ | |
e600707b | 6082 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
efb7c49a | 6083 | mwl8k_txq_reclaim(hw, i, INT_MAX, 1); |
a66098da | 6084 | |
e600707b | 6085 | for (i = 0; i < mwl8k_tx_queues(priv); i++) |
a66098da LB |
6086 | mwl8k_txq_deinit(hw, i); |
6087 | ||
6088 | mwl8k_rxq_deinit(hw, 0); | |
6089 | ||
c2c357ce | 6090 | pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma); |
a66098da | 6091 | |
99020471 | 6092 | unmap: |
a66098da | 6093 | pci_iounmap(pdev, priv->regs); |
5b9482dd | 6094 | pci_iounmap(pdev, priv->sram); |
a66098da LB |
6095 | pci_set_drvdata(pdev, NULL); |
6096 | ieee80211_free_hw(hw); | |
6097 | pci_release_regions(pdev); | |
6098 | pci_disable_device(pdev); | |
6099 | } | |
6100 | ||
6101 | static struct pci_driver mwl8k_driver = { | |
6102 | .name = MWL8K_NAME, | |
45a390dd | 6103 | .id_table = mwl8k_pci_id_table, |
a66098da | 6104 | .probe = mwl8k_probe, |
8dee5eef | 6105 | .remove = mwl8k_remove, |
a66098da LB |
6106 | }; |
6107 | ||
5b0a3b7e | 6108 | module_pci_driver(mwl8k_driver); |
c2c357ce LB |
6109 | |
6110 | MODULE_DESCRIPTION(MWL8K_DESC); | |
6111 | MODULE_VERSION(MWL8K_VERSION); | |
6112 | MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>"); | |
6113 | MODULE_LICENSE("GPL"); |