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mwl8k: remove various unused struct members and defines
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / mwl8k.c
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a66098da
LB		 1/*
2 * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
3 *
4 * Copyright (C) 2008 Marvell Semiconductor Inc.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/init.h>
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/spinlock.h>
15#include <linux/list.h>
16#include <linux/pci.h>
17#include <linux/delay.h>
18#include <linux/completion.h>
19#include <linux/etherdevice.h>
20#include <net/mac80211.h>
21#include <linux/moduleparam.h>
22#include <linux/firmware.h>
23#include <linux/workqueue.h>
24
25#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
26#define MWL8K_NAME KBUILD_MODNAME
27#define MWL8K_VERSION "0.9.1"
28
29MODULE_DESCRIPTION(MWL8K_DESC);
30MODULE_VERSION(MWL8K_VERSION);
31MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
32MODULE_LICENSE("GPL");
33
34static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
35 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
36 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
37 { }
38};
39MODULE_DEVICE_TABLE(pci, mwl8k_table);
40
41#define IEEE80211_ADDR_LEN ETH_ALEN
42
43/* Register definitions */
44#define MWL8K_HIU_GEN_PTR 0x00000c10
45#define MWL8K_MODE_STA 0x0000005a
46#define MWL8K_MODE_AP 0x000000a5
47#define MWL8K_HIU_INT_CODE 0x00000c14
48#define MWL8K_FWSTA_READY 0xf0f1f2f4
49#define MWL8K_FWAP_READY 0xf1f2f4a5
50#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
51#define MWL8K_HIU_SCRATCH 0x00000c40
52
53/* Host->device communications */
54#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
55#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
56#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
57#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
58#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
59#define MWL8K_H2A_INT_DUMMY (1 << 20)
60#define MWL8K_H2A_INT_RESET (1 << 15)
a66098da
LB		 61#define MWL8K_H2A_INT_DOORBELL (1 << 1)
62#define MWL8K_H2A_INT_PPA_READY (1 << 0)
63
64/* Device->host communications */
65#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
66#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
67#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
68#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
69#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
70#define MWL8K_A2H_INT_DUMMY (1 << 20)
71#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
72#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
73#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
74#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
75#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
76#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
77#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
78#define MWL8K_A2H_INT_RX_READY (1 << 1)
79#define MWL8K_A2H_INT_TX_DONE (1 << 0)
80
81#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
82 MWL8K_A2H_INT_CHNL_SWITCHED | \
83 MWL8K_A2H_INT_QUEUE_EMPTY | \
84 MWL8K_A2H_INT_RADAR_DETECT | \
85 MWL8K_A2H_INT_RADIO_ON | \
86 MWL8K_A2H_INT_RADIO_OFF | \
87 MWL8K_A2H_INT_MAC_EVENT | \
88 MWL8K_A2H_INT_OPC_DONE | \
89 MWL8K_A2H_INT_RX_READY | \
90 MWL8K_A2H_INT_TX_DONE)
91
92/* WME stream classes */
93#define WME_AC_BE 0 /* best effort */
94#define WME_AC_BK 1 /* background */
95#define WME_AC_VI 2 /* video */
96#define WME_AC_VO 3 /* voice */
97
98#define MWL8K_RX_QUEUES 1
99#define MWL8K_TX_QUEUES 4
100
101struct mwl8k_rx_queue {
102 int rx_desc_count;
103
104 /* hw receives here */
105 int rx_head;
106
107 /* refill descs here */
108 int rx_tail;
109
110 struct mwl8k_rx_desc *rx_desc_area;
111 dma_addr_t rx_desc_dma;
112 struct sk_buff **rx_skb;
113};
114
115struct mwl8k_skb {
116 /*
117 * The DMA engine requires a modification to the payload.
118 * If the skbuff is shared/cloned, it needs to be unshared.
119 * This method is used to ensure the stack always gets back
120 * the skbuff it sent for transmission.
121 */
122 struct sk_buff *clone;
123 struct sk_buff *skb;
124};
125
126struct mwl8k_tx_queue {
127 /* hw transmits here */
128 int tx_head;
129
130 /* sw appends here */
131 int tx_tail;
132
133 struct ieee80211_tx_queue_stats tx_stats;
134 struct mwl8k_tx_desc *tx_desc_area;
135 dma_addr_t tx_desc_dma;
136 struct mwl8k_skb *tx_skb;
137};
138
139/* Pointers to the firmware data and meta information about it. */
140struct mwl8k_firmware {
141 /* Microcode */
142 struct firmware *ucode;
143
144 /* Boot helper code */
145 struct firmware *helper;
146};
147
148struct mwl8k_priv {
149 void __iomem *regs;
150 struct ieee80211_hw *hw;
151
152 struct pci_dev *pdev;
153 u8 name[16];
154 /* firmware access lock */
155 spinlock_t fw_lock;
156
157 /* firmware files and meta data */
158 struct mwl8k_firmware fw;
159 u32 part_num;
160
161 /* lock held over TX and TX reap */
162 spinlock_t tx_lock;
a66098da
LB		 163
164 struct ieee80211_vif *vif;
a66098da
LB		 165
166 struct ieee80211_channel *current_channel;
167
168 /* power management status cookie from firmware */
169 u32 *cookie;
170 dma_addr_t cookie_dma;
171
172 u16 num_mcaddrs;
a66098da
LB		 173 u8 hw_rev;
174 __le32 fw_rev;
a66098da
LB		 175
176 /*
177 * Running count of TX packets in flight, to avoid
178 * iterating over the transmit rings each time.
179 */
180 int pending_tx_pkts;
181
182 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
183 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
184
185 /* PHY parameters */
186 struct ieee80211_supported_band band;
187 struct ieee80211_channel channels[14];
188 struct ieee80211_rate rates[12];
189
190 /* RF preamble: Short, Long or Auto */
191 u8 radio_preamble;
192 u8 radio_state;
193
194 /* WMM MODE 1 for enabled; 0 for disabled */
195 bool wmm_mode;
196
197 /* Set if PHY config is in progress */
198 bool inconfig;
199
200 /* XXX need to convert this to handle multiple interfaces */
201 bool capture_beacon;
202 u8 capture_bssid[IEEE80211_ADDR_LEN];
203 struct sk_buff *beacon_skb;
204
205 /*
206 * This FJ worker has to be global as it is scheduled from the
207 * RX handler. At this point we don't know which interface it
208 * belongs to until the list of bssids waiting to complete join
209 * is checked.
210 */
211 struct work_struct finalize_join_worker;
212
213 /* Tasklet to reclaim TX descriptors and buffers after tx */
214 struct tasklet_struct tx_reclaim_task;
215
216 /* Work thread to serialize configuration requests */
217 struct workqueue_struct *config_wq;
218 struct completion *hostcmd_wait;
219 struct completion *tx_wait;
220};
221
222/* Per interface specific private data */
223struct mwl8k_vif {
a66098da
LB		 224 /* backpointer to parent config block */
225 struct mwl8k_priv *priv;
226
227 /* BSS config of AP or IBSS from mac80211*/
228 struct ieee80211_bss_conf bss_info;
229
230 /* BSSID of AP or IBSS */
231 u8 bssid[IEEE80211_ADDR_LEN];
232 u8 mac_addr[IEEE80211_ADDR_LEN];
233
234 /*
235 * Subset of supported legacy rates.
236 * Intersection of AP and STA supported rates.
237 */
238 struct ieee80211_rate legacy_rates[12];
239
240 /* number of supported legacy rates */
241 u8 legacy_nrates;
242
a66098da
LB		 243 /* Index into station database.Returned by update_sta_db call */
244 u8 peer_id;
245
246 /* Non AMPDU sequence number assigned by driver */
247 u16 seqno;
a66098da
LB		 248};
249
a94cc97e 250#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
a66098da
LB		 251
252static const struct ieee80211_channel mwl8k_channels[] = {
253 { .center_freq = 2412, .hw_value = 1, },
254 { .center_freq = 2417, .hw_value = 2, },
255 { .center_freq = 2422, .hw_value = 3, },
256 { .center_freq = 2427, .hw_value = 4, },
257 { .center_freq = 2432, .hw_value = 5, },
258 { .center_freq = 2437, .hw_value = 6, },
259 { .center_freq = 2442, .hw_value = 7, },
260 { .center_freq = 2447, .hw_value = 8, },
261 { .center_freq = 2452, .hw_value = 9, },
262 { .center_freq = 2457, .hw_value = 10, },
263 { .center_freq = 2462, .hw_value = 11, },
264};
265
266static const struct ieee80211_rate mwl8k_rates[] = {
267 { .bitrate = 10, .hw_value = 2, },
268 { .bitrate = 20, .hw_value = 4, },
269 { .bitrate = 55, .hw_value = 11, },
270 { .bitrate = 60, .hw_value = 12, },
271 { .bitrate = 90, .hw_value = 18, },
272 { .bitrate = 110, .hw_value = 22, },
273 { .bitrate = 120, .hw_value = 24, },
274 { .bitrate = 180, .hw_value = 36, },
275 { .bitrate = 240, .hw_value = 48, },
276 { .bitrate = 360, .hw_value = 72, },
277 { .bitrate = 480, .hw_value = 96, },
278 { .bitrate = 540, .hw_value = 108, },
279};
280
281/* Radio settings */
282#define MWL8K_RADIO_FORCE 0x2
283#define MWL8K_RADIO_ENABLE 0x1
284#define MWL8K_RADIO_DISABLE 0x0
285#define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
286#define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
287#define MWL8K_RADIO_LONG_PREAMBLE 0x0001
288
289/* WMM */
290#define MWL8K_WMM_ENABLE 1
291#define MWL8K_WMM_DISABLE 0
292
293#define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
294
295/* Slot time */
296
297/* Short Slot: 9us slot time */
298#define MWL8K_SHORT_SLOTTIME 1
299
300/* Long slot: 20us slot time */
301#define MWL8K_LONG_SLOTTIME 0
302
303/* Set or get info from Firmware */
304#define MWL8K_CMD_SET 0x0001
305#define MWL8K_CMD_GET 0x0000
306
307/* Firmware command codes */
308#define MWL8K_CMD_CODE_DNLD 0x0001
309#define MWL8K_CMD_GET_HW_SPEC 0x0003
310#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
311#define MWL8K_CMD_GET_STAT 0x0014
312#define MWL8K_CMD_RADIO_CONTROL 0x001C
313#define MWL8K_CMD_RF_TX_POWER 0x001E
314#define MWL8K_CMD_SET_PRE_SCAN 0x0107
315#define MWL8K_CMD_SET_POST_SCAN 0x0108
316#define MWL8K_CMD_SET_RF_CHANNEL 0x010A
317#define MWL8K_CMD_SET_SLOT 0x0114
318#define MWL8K_CMD_MIMO_CONFIG 0x0125
319#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
320#define MWL8K_CMD_SET_WMM_MODE 0x0123
321#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
322#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
323#define MWL8K_CMD_UPDATE_STADB 0x1123
324#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
325#define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
326#define MWL8K_CMD_SET_AID 0x010d
327#define MWL8K_CMD_SET_RATE 0x0110
328#define MWL8K_CMD_USE_FIXED_RATE 0x0126
329#define MWL8K_CMD_RTS_THRESHOLD 0x0113
330#define MWL8K_CMD_ENCRYPTION 0x1122
331
332static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
333{
334#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
335 snprintf(buf, bufsize, "%s", #x);\
336 return buf;\
337 } while (0)
338 switch (cmd & (~0x8000)) {
339 MWL8K_CMDNAME(CODE_DNLD);
340 MWL8K_CMDNAME(GET_HW_SPEC);
341 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
342 MWL8K_CMDNAME(GET_STAT);
343 MWL8K_CMDNAME(RADIO_CONTROL);
344 MWL8K_CMDNAME(RF_TX_POWER);
345 MWL8K_CMDNAME(SET_PRE_SCAN);
346 MWL8K_CMDNAME(SET_POST_SCAN);
347 MWL8K_CMDNAME(SET_RF_CHANNEL);
348 MWL8K_CMDNAME(SET_SLOT);
349 MWL8K_CMDNAME(MIMO_CONFIG);
350 MWL8K_CMDNAME(ENABLE_SNIFFER);
351 MWL8K_CMDNAME(SET_WMM_MODE);
352 MWL8K_CMDNAME(SET_EDCA_PARAMS);
353 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
354 MWL8K_CMDNAME(UPDATE_STADB);
355 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
356 MWL8K_CMDNAME(SET_LINKADAPT_MODE);
357 MWL8K_CMDNAME(SET_AID);
358 MWL8K_CMDNAME(SET_RATE);
359 MWL8K_CMDNAME(USE_FIXED_RATE);
360 MWL8K_CMDNAME(RTS_THRESHOLD);
361 MWL8K_CMDNAME(ENCRYPTION);
362 default:
363 snprintf(buf, bufsize, "0x%x", cmd);
364 }
365#undef MWL8K_CMDNAME
366
367 return buf;
368}
369
370/* Hardware and firmware reset */
371static void mwl8k_hw_reset(struct mwl8k_priv *priv)
372{
373 iowrite32(MWL8K_H2A_INT_RESET,
374 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
375 iowrite32(MWL8K_H2A_INT_RESET,
376 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
377 msleep(20);
378}
379
380/* Release fw image */
381static void mwl8k_release_fw(struct firmware **fw)
382{
383 if (*fw == NULL)
384 return;
385 release_firmware(*fw);
386 *fw = NULL;
387}
388
389static void mwl8k_release_firmware(struct mwl8k_priv *priv)
390{
391 mwl8k_release_fw(&priv->fw.ucode);
392 mwl8k_release_fw(&priv->fw.helper);
393}
394
395/* Request fw image */
396static int mwl8k_request_fw(struct mwl8k_priv *priv,
397 const char *fname, struct firmware **fw)
398{
399 /* release current image */
400 if (*fw != NULL)
401 mwl8k_release_fw(fw);
402
403 return request_firmware((const struct firmware **)fw,
404 fname, &priv->pdev->dev);
405}
406
407static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
408{
409 u8 filename[64];
410 int rc;
411
412 priv->part_num = part_num;
413
414 snprintf(filename, sizeof(filename),
415 "mwl8k/helper_%u.fw", priv->part_num);
416
417 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
418 if (rc) {
419 printk(KERN_ERR
420 "%s Error requesting helper firmware file %s\n",
421 pci_name(priv->pdev), filename);
422 return rc;
423 }
424
425 snprintf(filename, sizeof(filename),
426 "mwl8k/fmimage_%u.fw", priv->part_num);
427
428 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
429 if (rc) {
430 printk(KERN_ERR "%s Error requesting firmware file %s\n",
431 pci_name(priv->pdev), filename);
432 mwl8k_release_fw(&priv->fw.helper);
433 return rc;
434 }
435
436 return 0;
437}
438
439struct mwl8k_cmd_pkt {
440 __le16 code;
441 __le16 length;
442 __le16 seq_num;
443 __le16 result;
444 char payload[0];
445} __attribute__((packed));
446
447/*
448 * Firmware loading.
449 */
450static int
451mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
452{
453 void __iomem *regs = priv->regs;
454 dma_addr_t dma_addr;
455 int rc;
456 int loops;
457
458 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
459 if (pci_dma_mapping_error(priv->pdev, dma_addr))
460 return -ENOMEM;
461
462 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
463 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
464 iowrite32(MWL8K_H2A_INT_DOORBELL,
465 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
466 iowrite32(MWL8K_H2A_INT_DUMMY,
467 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
468
469 rc = -ETIMEDOUT;
470 loops = 1000;
471 do {
472 u32 int_code;
473
474 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
475 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
476 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
477 rc = 0;
478 break;
479 }
480
481 udelay(1);
482 } while (--loops);
483
484 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
485
486 /*
487 * Clear 'command done' interrupt bit.
488 */
489 loops = 1000;
490 do {
491 u32 status;
492
493 status = ioread32(priv->regs +
494 MWL8K_HIU_A2H_INTERRUPT_STATUS);
495 if (status & MWL8K_A2H_INT_OPC_DONE) {
496 iowrite32(~MWL8K_A2H_INT_OPC_DONE,
497 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
498 ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
499 break;
500 }
501
502 udelay(1);
503 } while (--loops);
504
505 return rc;
506}
507
508static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
509 const u8 *data, size_t length)
510{
511 struct mwl8k_cmd_pkt *cmd;
512 int done;
513 int rc = 0;
514
515 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
516 if (cmd == NULL)
517 return -ENOMEM;
518
519 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
520 cmd->seq_num = 0;
521 cmd->result = 0;
522
523 done = 0;
524 while (length) {
525 int block_size = length > 256 ? 256 : length;
526
527 memcpy(cmd->payload, data + done, block_size);
528 cmd->length = cpu_to_le16(block_size);
529
530 rc = mwl8k_send_fw_load_cmd(priv, cmd,
531 sizeof(*cmd) + block_size);
532 if (rc)
533 break;
534
535 done += block_size;
536 length -= block_size;
537 }
538
539 if (!rc) {
540 cmd->length = 0;
541 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
542 }
543
544 kfree(cmd);
545
546 return rc;
547}
548
549static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
550 const u8 *data, size_t length)
551{
552 unsigned char *buffer;
553 int may_continue, rc = 0;
554 u32 done, prev_block_size;
555
556 buffer = kmalloc(1024, GFP_KERNEL);
557 if (buffer == NULL)
558 return -ENOMEM;
559
560 done = 0;
561 prev_block_size = 0;
562 may_continue = 1000;
563 while (may_continue > 0) {
564 u32 block_size;
565
566 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
567 if (block_size & 1) {
568 block_size &= ~1;
569 may_continue--;
570 } else {
571 done += prev_block_size;
572 length -= prev_block_size;
573 }
574
575 if (block_size > 1024 || block_size > length) {
576 rc = -EOVERFLOW;
577 break;
578 }
579
580 if (length == 0) {
581 rc = 0;
582 break;
583 }
584
585 if (block_size == 0) {
586 rc = -EPROTO;
587 may_continue--;
588 udelay(1);
589 continue;
590 }
591
592 prev_block_size = block_size;
593 memcpy(buffer, data + done, block_size);
594
595 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
596 if (rc)
597 break;
598 }
599
600 if (!rc && length != 0)
601 rc = -EREMOTEIO;
602
603 kfree(buffer);
604
605 return rc;
606}
607
608static int mwl8k_load_firmware(struct mwl8k_priv *priv)
609{
610 int loops, rc;
611
612 const u8 *ucode = priv->fw.ucode->data;
613 size_t ucode_len = priv->fw.ucode->size;
614 const u8 *helper = priv->fw.helper->data;
615 size_t helper_len = priv->fw.helper->size;
616
617 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
618 rc = mwl8k_load_fw_image(priv, helper, helper_len);
619 if (rc) {
620 printk(KERN_ERR "%s: unable to load firmware "
621 "helper image\n", pci_name(priv->pdev));
622 return rc;
623 }
624 msleep(1);
625
626 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
627 } else {
628 rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
629 }
630
631 if (rc) {
632 printk(KERN_ERR "%s: unable to load firmware data\n",
633 pci_name(priv->pdev));
634 return rc;
635 }
636
637 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
638 msleep(1);
639
640 loops = 200000;
641 do {
642 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
643 == MWL8K_FWSTA_READY)
644 break;
645 udelay(1);
646 } while (--loops);
647
648 return loops ? 0 : -ETIMEDOUT;
649}
650
651
652/*
653 * Defines shared between transmission and reception.
654 */
655/* HT control fields for firmware */
656struct ewc_ht_info {
657 __le16 control1;
658 __le16 control2;
659 __le16 control3;
660} __attribute__((packed));
661
662/* Firmware Station database operations */
663#define MWL8K_STA_DB_ADD_ENTRY 0
664#define MWL8K_STA_DB_MODIFY_ENTRY 1
665#define MWL8K_STA_DB_DEL_ENTRY 2
666#define MWL8K_STA_DB_FLUSH 3
667
668/* Peer Entry flags - used to define the type of the peer node */
669#define MWL8K_PEER_TYPE_ACCESSPOINT 2
a66098da
LB		 670
671#define MWL8K_IEEE_LEGACY_DATA_RATES 12
672#define MWL8K_MCS_BITMAP_SIZE 16
a66098da
LB		 673
674struct peer_capability_info {
675 /* Peer type - AP vs. STA. */
676 __u8 peer_type;
677
678 /* Basic 802.11 capabilities from assoc resp. */
679 __le16 basic_caps;
680
681 /* Set if peer supports 802.11n high throughput (HT). */
682 __u8 ht_support;
683
684 /* Valid if HT is supported. */
685 __le16 ht_caps;
686 __u8 extended_ht_caps;
687 struct ewc_ht_info ewc_info;
688
689 /* Legacy rate table. Intersection of our rates and peer rates. */
690 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
691
692 /* HT rate table. Intersection of our rates and peer rates. */
693 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
c23b5a69 694 __u8 pad[16];
a66098da
LB		 695
696 /* If set, interoperability mode, no proprietary extensions. */
697 __u8 interop;
698 __u8 pad2;
699 __u8 station_id;
700 __le16 amsdu_enabled;
701} __attribute__((packed));
702
703/* Inline functions to manipulate QoS field in data descriptor. */
a66098da
LB		 704static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
705{
706 u16 val_mask = 1 << 4;
707
708 /* End of Service Period Bit 4 */
709 return qos | val_mask;
710}
711
712static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
713{
714 u16 val_mask = 0x3;
715 u8 shift = 5;
716 u16 qos_mask = ~(val_mask << shift);
717
718 /* Ack Policy Bit 5-6 */
719 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
720}
721
722static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
723{
724 u16 val_mask = 1 << 7;
725
726 /* AMSDU present Bit 7 */
727 return qos | val_mask;
728}
729
730static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
731{
732 u16 val_mask = 0xff;
733 u8 shift = 8;
734 u16 qos_mask = ~(val_mask << shift);
735
736 /* Queue Length Bits 8-15 */
737 return (qos & qos_mask) | ((len & val_mask) << shift);
738}
739
740/* DMA header used by firmware and hardware. */
741struct mwl8k_dma_data {
742 __le16 fwlen;
743 struct ieee80211_hdr wh;
744} __attribute__((packed));
745
746/* Routines to add/remove DMA header from skb. */
747static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
748{
749 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
750 void *dst, *src = &tr->wh;
751 __le16 fc = tr->wh.frame_control;
752 int hdrlen = ieee80211_hdrlen(fc);
753 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
754
755 dst = (void *)tr + space;
756 if (dst != src) {
757 memmove(dst, src, hdrlen);
758 skb_pull(skb, space);
759 }
760
761 return 0;
762}
763
764static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
765{
766 struct ieee80211_hdr *wh;
767 u32 hdrlen, pktlen;
768 struct mwl8k_dma_data *tr;
769
770 wh = (struct ieee80211_hdr *)skb->data;
771 hdrlen = ieee80211_hdrlen(wh->frame_control);
772 pktlen = skb->len;
773
774 /*
775 * Copy up/down the 802.11 header; the firmware requires
776 * we present a 2-byte payload length followed by a
777 * 4-address header (w/o QoS), followed (optionally) by
778 * any WEP/ExtIV header (but only filled in for CCMP).
779 */
780 if (hdrlen != sizeof(struct mwl8k_dma_data))
781 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
782
783 tr = (struct mwl8k_dma_data *)skb->data;
784 if (wh != &tr->wh)
785 memmove(&tr->wh, wh, hdrlen);
786
787 /* Clear addr4 */
788 memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
789
790 /*
791 * Firmware length is the length of the fully formed "802.11
792 * payload". That is, everything except for the 802.11 header.
793 * This includes all crypto material including the MIC.
794 */
795 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
796
797 return skb;
798}
799
800
801/*
802 * Packet reception.
803 */
a66098da 804#define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
a66098da
LB		 805
806struct mwl8k_rx_desc {
807 __le16 pkt_len;
808 __u8 link_quality;
809 __u8 noise_level;
810 __le32 pkt_phys_addr;
811 __le32 next_rx_desc_phys_addr;
812 __le16 qos_control;
813 __le16 rate_info;
814 __le32 pad0[4];
815 __u8 rssi;
816 __u8 channel;
817 __le16 pad1;
818 __u8 rx_ctrl;
819 __u8 rx_status;
820 __u8 pad2[2];
821} __attribute__((packed));
822
823#define MWL8K_RX_DESCS 256
824#define MWL8K_RX_MAXSZ 3800
825
826static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
827{
828 struct mwl8k_priv *priv = hw->priv;
829 struct mwl8k_rx_queue *rxq = priv->rxq + index;
830 int size;
831 int i;
832
833 rxq->rx_desc_count = 0;
834 rxq->rx_head = 0;
835 rxq->rx_tail = 0;
836
837 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
838
839 rxq->rx_desc_area =
840 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
841 if (rxq->rx_desc_area == NULL) {
842 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
843 priv->name);
844 return -ENOMEM;
845 }
846 memset(rxq->rx_desc_area, 0, size);
847
848 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
849 sizeof(*rxq->rx_skb), GFP_KERNEL);
850 if (rxq->rx_skb == NULL) {
851 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
852 priv->name);
853 pci_free_consistent(priv->pdev, size,
854 rxq->rx_desc_area, rxq->rx_desc_dma);
855 return -ENOMEM;
856 }
857 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
858
859 for (i = 0; i < MWL8K_RX_DESCS; i++) {
860 struct mwl8k_rx_desc *rx_desc;
861 int nexti;
862
863 rx_desc = rxq->rx_desc_area + i;
864 nexti = (i + 1) % MWL8K_RX_DESCS;
865
866 rx_desc->next_rx_desc_phys_addr =
867 cpu_to_le32(rxq->rx_desc_dma
868 + nexti * sizeof(*rx_desc));
c491bf12 869 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
a66098da
LB		 870 }
871
872 return 0;
873}
874
875static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
876{
877 struct mwl8k_priv *priv = hw->priv;
878 struct mwl8k_rx_queue *rxq = priv->rxq + index;
879 int refilled;
880
881 refilled = 0;
882 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
883 struct sk_buff *skb;
884 int rx;
885
886 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
887 if (skb == NULL)
888 break;
889
890 rxq->rx_desc_count++;
891
892 rx = rxq->rx_tail;
893 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
894
895 rxq->rx_desc_area[rx].pkt_phys_addr =
896 cpu_to_le32(pci_map_single(priv->pdev, skb->data,
897 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
898
899 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
900 rxq->rx_skb[rx] = skb;
901 wmb();
902 rxq->rx_desc_area[rx].rx_ctrl = 0;
903
904 refilled++;
905 }
906
907 return refilled;
908}
909
910/* Must be called only when the card's reception is completely halted */
911static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
912{
913 struct mwl8k_priv *priv = hw->priv;
914 struct mwl8k_rx_queue *rxq = priv->rxq + index;
915 int i;
916
917 for (i = 0; i < MWL8K_RX_DESCS; i++) {
918 if (rxq->rx_skb[i] != NULL) {
919 unsigned long addr;
920
921 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
922 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
923 PCI_DMA_FROMDEVICE);
924 kfree_skb(rxq->rx_skb[i]);
925 rxq->rx_skb[i] = NULL;
926 }
927 }
928
929 kfree(rxq->rx_skb);
930 rxq->rx_skb = NULL;
931
932 pci_free_consistent(priv->pdev,
933 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
934 rxq->rx_desc_area, rxq->rx_desc_dma);
935 rxq->rx_desc_area = NULL;
936}
937
938
939/*
940 * Scan a list of BSSIDs to process for finalize join.
941 * Allows for extension to process multiple BSSIDs.
942 */
943static inline int
944mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
945{
946 return priv->capture_beacon &&
947 ieee80211_is_beacon(wh->frame_control) &&
948 !compare_ether_addr(wh->addr3, priv->capture_bssid);
949}
950
951static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
952 struct sk_buff *skb)
953{
954 priv->capture_beacon = false;
955 memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
956
957 /*
958 * Use GFP_ATOMIC as rxq_process is called from
959 * the primary interrupt handler, memory allocation call
960 * must not sleep.
961 */
962 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
963 if (priv->beacon_skb != NULL)
964 queue_work(priv->config_wq,
965 &priv->finalize_join_worker);
966}
967
968static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
969{
970 struct mwl8k_priv *priv = hw->priv;
971 struct mwl8k_rx_queue *rxq = priv->rxq + index;
972 int processed;
973
974 processed = 0;
975 while (rxq->rx_desc_count && limit--) {
976 struct mwl8k_rx_desc *rx_desc;
977 struct sk_buff *skb;
978 struct ieee80211_rx_status status;
979 unsigned long addr;
980 struct ieee80211_hdr *wh;
981
982 rx_desc = rxq->rx_desc_area + rxq->rx_head;
983 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
984 break;
985 rmb();
986
987 skb = rxq->rx_skb[rxq->rx_head];
d25f9f13
LB		 988 if (skb == NULL)
989 break;
a66098da
LB		 990 rxq->rx_skb[rxq->rx_head] = NULL;
991
992 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
993 rxq->rx_desc_count--;
994
995 addr = le32_to_cpu(rx_desc->pkt_phys_addr);
996 pci_unmap_single(priv->pdev, addr,
997 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
998
999 skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
1000 if (mwl8k_remove_dma_header(skb)) {
1001 dev_kfree_skb(skb);
1002 continue;
1003 }
1004
1005 wh = (struct ieee80211_hdr *)skb->data;
1006
1007 /*
1008 * Check for pending join operation. save a copy of
1009 * the beacon and schedule a tasklet to send finalize
1010 * join command to the firmware.
1011 */
1012 if (mwl8k_capture_bssid(priv, wh))
1013 mwl8k_save_beacon(priv, skb);
1014
1015 memset(&status, 0, sizeof(status));
1016 status.mactime = 0;
1017 status.signal = -rx_desc->rssi;
1018 status.noise = -rx_desc->noise_level;
1019 status.qual = rx_desc->link_quality;
1020 status.antenna = 1;
1021 status.rate_idx = 1;
1022 status.flag = 0;
1023 status.band = IEEE80211_BAND_2GHZ;
1024 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
f1d58c25
JB		 1025 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1026 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1027
1028 processed++;
1029 }
1030
1031 return processed;
1032}
1033
1034
1035/*
1036 * Packet transmission.
1037 */
1038
1039/* Transmit queue assignment. */
1040enum {
1041 MWL8K_WME_AC_BK = 0, /* background access */
1042 MWL8K_WME_AC_BE = 1, /* best effort access */
1043 MWL8K_WME_AC_VI = 2, /* video access */
1044 MWL8K_WME_AC_VO = 3, /* voice access */
1045};
1046
1047/* Transmit packet ACK policy */
1048#define MWL8K_TXD_ACK_POLICY_NORMAL 0
a66098da
LB		 1049#define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
1050
1051#define GET_TXQ(_ac) (\
1052 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
1053 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
1054 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
1055 MWL8K_WME_AC_BE)
1056
a66098da
LB		 1057#define MWL8K_TXD_STATUS_OK 0x00000001
1058#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1059#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1060#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1061#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da
LB		 1062
1063struct mwl8k_tx_desc {
1064 __le32 status;
1065 __u8 data_rate;
1066 __u8 tx_priority;
1067 __le16 qos_control;
1068 __le32 pkt_phys_addr;
1069 __le16 pkt_len;
1070 __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
1071 __le32 next_tx_desc_phys_addr;
1072 __le32 reserved;
1073 __le16 rate_info;
1074 __u8 peer_id;
1075 __u8 tx_frag_cnt;
1076} __attribute__((packed));
1077
1078#define MWL8K_TX_DESCS 128
1079
1080static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1081{
1082 struct mwl8k_priv *priv = hw->priv;
1083 struct mwl8k_tx_queue *txq = priv->txq + index;
1084 int size;
1085 int i;
1086
1087 memset(&txq->tx_stats, 0,
1088 sizeof(struct ieee80211_tx_queue_stats));
1089 txq->tx_stats.limit = MWL8K_TX_DESCS;
1090 txq->tx_head = 0;
1091 txq->tx_tail = 0;
1092
1093 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1094
1095 txq->tx_desc_area =
1096 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
1097 if (txq->tx_desc_area == NULL) {
1098 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1099 priv->name);
1100 return -ENOMEM;
1101 }
1102 memset(txq->tx_desc_area, 0, size);
1103
1104 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
1105 GFP_KERNEL);
1106 if (txq->tx_skb == NULL) {
1107 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1108 priv->name);
1109 pci_free_consistent(priv->pdev, size,
1110 txq->tx_desc_area, txq->tx_desc_dma);
1111 return -ENOMEM;
1112 }
1113 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
1114
1115 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1116 struct mwl8k_tx_desc *tx_desc;
1117 int nexti;
1118
1119 tx_desc = txq->tx_desc_area + i;
1120 nexti = (i + 1) % MWL8K_TX_DESCS;
1121
1122 tx_desc->status = 0;
1123 tx_desc->next_tx_desc_phys_addr =
1124 cpu_to_le32(txq->tx_desc_dma +
1125 nexti * sizeof(*tx_desc));
1126 }
1127
1128 return 0;
1129}
1130
1131static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1132{
1133 iowrite32(MWL8K_H2A_INT_PPA_READY,
1134 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1135 iowrite32(MWL8K_H2A_INT_DUMMY,
1136 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1137 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1138}
1139
1140static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
1141{
1142 return priv->pending_tx_pkts;
1143}
1144
1145struct mwl8k_txq_info {
1146 u32 fw_owned;
1147 u32 drv_owned;
1148 u32 unused;
1149 u32 len;
1150 u32 head;
1151 u32 tail;
1152};
1153
1154static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1155 struct mwl8k_txq_info txinfo[],
1156 u32 num_queues)
1157{
1158 int count, desc, status;
1159 struct mwl8k_tx_queue *txq;
1160 struct mwl8k_tx_desc *tx_desc;
1161 int ndescs = 0;
1162
1163 memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
1164 spin_lock_bh(&priv->tx_lock);
1165 for (count = 0; count < num_queues; count++) {
1166 txq = priv->txq + count;
1167 txinfo[count].len = txq->tx_stats.len;
1168 txinfo[count].head = txq->tx_head;
1169 txinfo[count].tail = txq->tx_tail;
1170 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1171 tx_desc = txq->tx_desc_area + desc;
1172 status = le32_to_cpu(tx_desc->status);
1173
1174 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1175 txinfo[count].fw_owned++;
1176 else
1177 txinfo[count].drv_owned++;
1178
1179 if (tx_desc->pkt_len == 0)
1180 txinfo[count].unused++;
1181 }
1182 }
1183 spin_unlock_bh(&priv->tx_lock);
1184
1185 return ndescs;
1186}
1187
1188static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
1189{
1190 u32 count = 0;
1191 unsigned long timeout = 0;
1192 struct mwl8k_priv *priv = hw->priv;
1193 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1194
1195 might_sleep();
1196
1197 if (priv->tx_wait != NULL)
1198 printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
1199
1200 spin_lock_bh(&priv->tx_lock);
1201 count = mwl8k_txq_busy(priv);
1202 if (count) {
1203 priv->tx_wait = &cmd_wait;
1204 if (priv->radio_state)
1205 mwl8k_tx_start(priv);
1206 }
1207 spin_unlock_bh(&priv->tx_lock);
1208
1209 if (count) {
1210 struct mwl8k_txq_info txinfo[4];
1211 int index;
1212 int newcount;
1213
1214 timeout = wait_for_completion_timeout(&cmd_wait,
1215 msecs_to_jiffies(delay_ms));
1216 if (timeout)
1217 return 0;
1218
1219 spin_lock_bh(&priv->tx_lock);
1220 priv->tx_wait = NULL;
1221 newcount = mwl8k_txq_busy(priv);
1222 spin_unlock_bh(&priv->tx_lock);
1223
1224 printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
1225 __func__, __LINE__, delay_ms, count, newcount);
1226
1227 mwl8k_scan_tx_ring(priv, txinfo, 4);
1228 for (index = 0 ; index < 4; index++)
1229 printk(KERN_ERR
1230 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1231 index,
1232 txinfo[index].len,
1233 txinfo[index].head,
1234 txinfo[index].tail,
1235 txinfo[index].fw_owned,
1236 txinfo[index].drv_owned,
1237 txinfo[index].unused);
1238 return -ETIMEDOUT;
1239 }
1240
1241 return 0;
1242}
1243
c23b5a69
LB		 1244#define MWL8K_TXD_SUCCESS(status) \
1245 ((status) & (MWL8K_TXD_STATUS_OK | \
1246 MWL8K_TXD_STATUS_OK_RETRY | \
1247 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da
LB		 1248
1249static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1250{
1251 struct mwl8k_priv *priv = hw->priv;
1252 struct mwl8k_tx_queue *txq = priv->txq + index;
1253 int wake = 0;
1254
1255 while (txq->tx_stats.len > 0) {
1256 int tx;
1257 int rc;
1258 struct mwl8k_tx_desc *tx_desc;
1259 unsigned long addr;
1260 size_t size;
1261 struct sk_buff *skb;
1262 struct ieee80211_tx_info *info;
1263 u32 status;
1264
1265 rc = 0;
1266 tx = txq->tx_head;
1267 tx_desc = txq->tx_desc_area + tx;
1268
1269 status = le32_to_cpu(tx_desc->status);
1270
1271 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1272 if (!force)
1273 break;
1274 tx_desc->status &=
1275 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1276 }
1277
1278 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
1279 BUG_ON(txq->tx_stats.len == 0);
1280 txq->tx_stats.len--;
1281 priv->pending_tx_pkts--;
1282
1283 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1284 size = (u32)(le16_to_cpu(tx_desc->pkt_len));
1285 skb = txq->tx_skb[tx].skb;
1286 txq->tx_skb[tx].skb = NULL;
1287
1288 BUG_ON(skb == NULL);
1289 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1290
1291 rc = mwl8k_remove_dma_header(skb);
1292
1293 /* Mark descriptor as unused */
1294 tx_desc->pkt_phys_addr = 0;
1295 tx_desc->pkt_len = 0;
1296
1297 if (txq->tx_skb[tx].clone) {
1298 /* Replace with original skb
1299 * before returning to stack
1300 * as buffer has been cloned
1301 */
1302 dev_kfree_skb(skb);
1303 skb = txq->tx_skb[tx].clone;
1304 txq->tx_skb[tx].clone = NULL;
1305 }
1306
1307 if (rc) {
1308 /* Something has gone wrong here.
1309 * Failed to remove DMA header.
1310 * Print error message and drop packet.
1311 */
1312 printk(KERN_ERR "%s: Error removing DMA header from "
1313 "tx skb 0x%p.\n", priv->name, skb);
1314
1315 dev_kfree_skb(skb);
1316 continue;
1317 }
1318
1319 info = IEEE80211_SKB_CB(skb);
1320 ieee80211_tx_info_clear_status(info);
1321
1322 /* Convert firmware status stuff into tx_status */
1323 if (MWL8K_TXD_SUCCESS(status)) {
1324 /* Transmit OK */
1325 info->flags |= IEEE80211_TX_STAT_ACK;
1326 }
1327
1328 ieee80211_tx_status_irqsafe(hw, skb);
1329
1330 wake = !priv->inconfig && priv->radio_state;
1331 }
1332
1333 if (wake)
1334 ieee80211_wake_queue(hw, index);
1335}
1336
1337/* must be called only when the card's transmit is completely halted */
1338static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1339{
1340 struct mwl8k_priv *priv = hw->priv;
1341 struct mwl8k_tx_queue *txq = priv->txq + index;
1342
1343 mwl8k_txq_reclaim(hw, index, 1);
1344
1345 kfree(txq->tx_skb);
1346 txq->tx_skb = NULL;
1347
1348 pci_free_consistent(priv->pdev,
1349 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1350 txq->tx_desc_area, txq->tx_desc_dma);
1351 txq->tx_desc_area = NULL;
1352}
1353
1354static int
1355mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1356{
1357 struct mwl8k_priv *priv = hw->priv;
1358 struct ieee80211_tx_info *tx_info;
1359 struct ieee80211_hdr *wh;
1360 struct mwl8k_tx_queue *txq;
1361 struct mwl8k_tx_desc *tx;
1362 struct mwl8k_dma_data *tr;
1363 struct mwl8k_vif *mwl8k_vif;
1364 struct sk_buff *org_skb = skb;
1365 dma_addr_t dma;
1366 u16 qos = 0;
1367 bool qosframe = false, ampduframe = false;
1368 bool mcframe = false, eapolframe = false;
1369 bool amsduframe = false;
1370 __le16 fc;
1371
1372 txq = priv->txq + index;
1373 tx = txq->tx_desc_area + txq->tx_tail;
1374
1375 BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
1376
1377 /*
1378 * Append HW DMA header to start of packet. Drop packet if
1379 * there is not enough space or a failure to unshare/unclone
1380 * the skb.
1381 */
1382 skb = mwl8k_add_dma_header(skb);
1383
1384 if (skb == NULL) {
1385 printk(KERN_DEBUG "%s: failed to prepend HW DMA "
1386 "header, dropping TX frame.\n", priv->name);
1387 dev_kfree_skb(org_skb);
1388 return NETDEV_TX_OK;
1389 }
1390
1391 tx_info = IEEE80211_SKB_CB(skb);
1392 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1393 tr = (struct mwl8k_dma_data *)skb->data;
1394 wh = &tr->wh;
1395 fc = wh->frame_control;
1396 qosframe = ieee80211_is_data_qos(fc);
1397 mcframe = is_multicast_ether_addr(wh->addr1);
1398 ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
1399
1400 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1401 u16 seqno = mwl8k_vif->seqno;
1402 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1403 wh->seq_ctrl |= cpu_to_le16(seqno << 4);
1404 mwl8k_vif->seqno = seqno++ % 4096;
1405 }
1406
1407 if (qosframe)
1408 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1409
1410 dma = pci_map_single(priv->pdev, skb->data,
1411 skb->len, PCI_DMA_TODEVICE);
1412
1413 if (pci_dma_mapping_error(priv->pdev, dma)) {
1414 printk(KERN_DEBUG "%s: failed to dma map skb, "
1415 "dropping TX frame.\n", priv->name);
1416
1417 if (org_skb != NULL)
1418 dev_kfree_skb(org_skb);
1419 if (skb != NULL)
1420 dev_kfree_skb(skb);
1421 return NETDEV_TX_OK;
1422 }
1423
1424 /* Set desc header, cpu bit order. */
1425 tx->status = 0;
1426 tx->data_rate = 0;
1427 tx->tx_priority = index;
1428 tx->qos_control = 0;
1429 tx->rate_info = 0;
1430 tx->peer_id = mwl8k_vif->peer_id;
1431
1432 amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
1433
1434 /* Setup firmware control bit fields for each frame type. */
1435 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
1436 tx->data_rate = 0;
1437 qos = mwl8k_qos_setbit_eosp(qos);
1438 /* Set Queue size to unspecified */
1439 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1440 } else if (ieee80211_is_data(fc)) {
1441 tx->data_rate = 1;
1442 if (mcframe)
1443 tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
1444
1445 /*
1446 * Tell firmware to not send EAPOL pkts in an
1447 * aggregate. Verify against mac80211 tx path. If
1448 * stack turns off AMPDU for an EAPOL frame this
1449 * check will be removed.
1450 */
1451 if (eapolframe) {
1452 qos = mwl8k_qos_setbit_ack(qos,
1453 MWL8K_TXD_ACK_POLICY_NORMAL);
1454 } else {
1455 /* Send pkt in an aggregate if AMPDU frame. */
1456 if (ampduframe)
1457 qos = mwl8k_qos_setbit_ack(qos,
1458 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1459 else
1460 qos = mwl8k_qos_setbit_ack(qos,
1461 MWL8K_TXD_ACK_POLICY_NORMAL);
1462
1463 if (amsduframe)
1464 qos = mwl8k_qos_setbit_amsdu(qos);
1465 }
1466 }
1467
1468 /* Convert to little endian */
1469 tx->qos_control = cpu_to_le16(qos);
1470 tx->status = cpu_to_le32(tx->status);
1471 tx->pkt_phys_addr = cpu_to_le32(dma);
1472 tx->pkt_len = cpu_to_le16(skb->len);
1473
1474 txq->tx_skb[txq->tx_tail].skb = skb;
1475 txq->tx_skb[txq->tx_tail].clone =
1476 skb == org_skb ? NULL : org_skb;
1477
1478 spin_lock_bh(&priv->tx_lock);
1479
1480 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
1481 MWL8K_TXD_STATUS_FW_OWNED);
1482 wmb();
1483 txq->tx_stats.len++;
1484 priv->pending_tx_pkts++;
1485 txq->tx_stats.count++;
1486 txq->tx_tail++;
1487
1488 if (txq->tx_tail == MWL8K_TX_DESCS)
1489 txq->tx_tail = 0;
1490 if (txq->tx_head == txq->tx_tail)
1491 ieee80211_stop_queue(hw, index);
1492
1493 if (priv->inconfig) {
1494 /*
1495 * Silently queue packet when we are in the middle of
1496 * a config cycle. Notify firmware only if we are
1497 * waiting for TXQs to empty. If a packet is sent
1498 * before .config() is complete, perhaps it is better
1499 * to drop the packet, as the channel is being changed
1500 * and the packet will end up on the wrong channel.
1501 */
1502 printk(KERN_ERR "%s(): WARNING TX activity while "
1503 "in config\n", __func__);
1504
1505 if (priv->tx_wait != NULL)
1506 mwl8k_tx_start(priv);
1507 } else
1508 mwl8k_tx_start(priv);
1509
1510 spin_unlock_bh(&priv->tx_lock);
1511
1512 return NETDEV_TX_OK;
1513}
1514
1515
1516/*
1517 * Command processing.
1518 */
1519
1520/* Timeout firmware commands after 2000ms */
1521#define MWL8K_CMD_TIMEOUT_MS 2000
1522
1523static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1524{
1525 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1526 struct mwl8k_priv *priv = hw->priv;
1527 void __iomem *regs = priv->regs;
1528 dma_addr_t dma_addr;
1529 unsigned int dma_size;
1530 int rc;
1531 u16 __iomem *result;
1532 unsigned long timeout = 0;
1533 u8 buf[32];
1534
1535 cmd->result = 0xFFFF;
1536 dma_size = le16_to_cpu(cmd->length);
1537 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1538 PCI_DMA_BIDIRECTIONAL);
1539 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1540 return -ENOMEM;
1541
1542 if (priv->hostcmd_wait != NULL)
1543 printk(KERN_ERR "WARNING host command in progress\n");
1544
1545 spin_lock_irq(&priv->fw_lock);
1546 priv->hostcmd_wait = &cmd_wait;
1547 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1548 iowrite32(MWL8K_H2A_INT_DOORBELL,
1549 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1550 iowrite32(MWL8K_H2A_INT_DUMMY,
1551 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1552 spin_unlock_irq(&priv->fw_lock);
1553
1554 timeout = wait_for_completion_timeout(&cmd_wait,
1555 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1556
37055bd4
LB		 1557 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1558 PCI_DMA_BIDIRECTIONAL);
1559
a66098da
LB		 1560 result = &cmd->result;
1561 if (!timeout) {
1562 spin_lock_irq(&priv->fw_lock);
1563 priv->hostcmd_wait = NULL;
1564 spin_unlock_irq(&priv->fw_lock);
1565 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1566 priv->name,
1567 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1568 MWL8K_CMD_TIMEOUT_MS);
1569 rc = -ETIMEDOUT;
1570 } else {
1571 rc = *result ? -EINVAL : 0;
1572 if (rc)
1573 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1574 priv->name,
1575 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1576 *result);
1577 }
1578
a66098da
LB		 1579 return rc;
1580}
1581
1582/*
1583 * GET_HW_SPEC.
1584 */
1585struct mwl8k_cmd_get_hw_spec {
1586 struct mwl8k_cmd_pkt header;
1587 __u8 hw_rev;
1588 __u8 host_interface;
1589 __le16 num_mcaddrs;
1590 __u8 perm_addr[IEEE80211_ADDR_LEN];
1591 __le16 region_code;
1592 __le32 fw_rev;
1593 __le32 ps_cookie;
1594 __le32 caps;
1595 __u8 mcs_bitmap[16];
1596 __le32 rx_queue_ptr;
1597 __le32 num_tx_queues;
1598 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1599 __le32 caps2;
1600 __le32 num_tx_desc_per_queue;
1601 __le32 total_rx_desc;
1602} __attribute__((packed));
1603
1604static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1605{
1606 struct mwl8k_priv *priv = hw->priv;
1607 struct mwl8k_cmd_get_hw_spec *cmd;
1608 int rc;
1609 int i;
1610
1611 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1612 if (cmd == NULL)
1613 return -ENOMEM;
1614
1615 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1616 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1617
1618 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1619 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1620 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
4ff6432e 1621 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
a66098da
LB		 1622 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1623 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
4ff6432e
LB		 1624 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1625 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 1626
1627 rc = mwl8k_post_cmd(hw, &cmd->header);
1628
1629 if (!rc) {
1630 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1631 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 1632 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 1633 priv->hw_rev = cmd->hw_rev;
a66098da
LB		 1634 }
1635
1636 kfree(cmd);
1637 return rc;
1638}
1639
1640/*
1641 * CMD_MAC_MULTICAST_ADR.
1642 */
1643struct mwl8k_cmd_mac_multicast_adr {
1644 struct mwl8k_cmd_pkt header;
1645 __le16 action;
1646 __le16 numaddr;
1647 __u8 addr[1][IEEE80211_ADDR_LEN];
1648};
1649
1650#define MWL8K_ENABLE_RX_MULTICAST 0x000F
1651static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1652 int mc_count,
1653 struct dev_addr_list *mclist)
1654{
1655 struct mwl8k_cmd_mac_multicast_adr *cmd;
1656 int index = 0;
1657 int rc;
1658 int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
1659 cmd = kzalloc(size, GFP_KERNEL);
1660 if (cmd == NULL)
1661 return -ENOMEM;
1662
1663 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1664 cmd->header.length = cpu_to_le16(size);
1665 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1666 cmd->numaddr = cpu_to_le16(mc_count);
1667 while ((index < mc_count) && mclist) {
1668 if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
1669 rc = -EINVAL;
1670 goto mwl8k_cmd_mac_multicast_adr_exit;
1671 }
1672 memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
1673 index++;
1674 mclist = mclist->next;
1675 }
1676
1677 rc = mwl8k_post_cmd(hw, &cmd->header);
1678
1679mwl8k_cmd_mac_multicast_adr_exit:
1680 kfree(cmd);
1681 return rc;
1682}
1683
1684/*
1685 * CMD_802_11_GET_STAT.
1686 */
1687struct mwl8k_cmd_802_11_get_stat {
1688 struct mwl8k_cmd_pkt header;
1689 __le16 action;
1690 __le32 stats[64];
1691} __attribute__((packed));
1692
1693#define MWL8K_STAT_ACK_FAILURE 9
1694#define MWL8K_STAT_RTS_FAILURE 12
1695#define MWL8K_STAT_FCS_ERROR 24
1696#define MWL8K_STAT_RTS_SUCCESS 11
1697
1698static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1699 struct ieee80211_low_level_stats *stats)
1700{
1701 struct mwl8k_cmd_802_11_get_stat *cmd;
1702 int rc;
1703
1704 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1705 if (cmd == NULL)
1706 return -ENOMEM;
1707
1708 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1709 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1710 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1711
1712 rc = mwl8k_post_cmd(hw, &cmd->header);
1713 if (!rc) {
1714 stats->dot11ACKFailureCount =
1715 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
1716 stats->dot11RTSFailureCount =
1717 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
1718 stats->dot11FCSErrorCount =
1719 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
1720 stats->dot11RTSSuccessCount =
1721 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
1722 }
1723 kfree(cmd);
1724
1725 return rc;
1726}
1727
1728/*
1729 * CMD_802_11_RADIO_CONTROL.
1730 */
1731struct mwl8k_cmd_802_11_radio_control {
1732 struct mwl8k_cmd_pkt header;
1733 __le16 action;
1734 __le16 control;
1735 __le16 radio_on;
1736} __attribute__((packed));
1737
1738static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
1739{
1740 struct mwl8k_priv *priv = hw->priv;
1741 struct mwl8k_cmd_802_11_radio_control *cmd;
1742 int rc;
1743
1744 if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
1745 !(enable & MWL8K_RADIO_FORCE))
1746 return 0;
1747
1748 enable &= MWL8K_RADIO_ENABLE;
1749
1750 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1751 if (cmd == NULL)
1752 return -ENOMEM;
1753
1754 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
1755 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1756 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1757 cmd->control = cpu_to_le16(priv->radio_preamble);
1758 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
1759
1760 rc = mwl8k_post_cmd(hw, &cmd->header);
1761 kfree(cmd);
1762
1763 if (!rc)
1764 priv->radio_state = enable;
1765
1766 return rc;
1767}
1768
1769static int
1770mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1771{
1772 struct mwl8k_priv *priv;
1773
1774 if (hw == NULL || hw->priv == NULL)
1775 return -EINVAL;
1776 priv = hw->priv;
1777
1778 priv->radio_preamble = (short_preamble ?
1779 MWL8K_RADIO_SHORT_PREAMBLE :
1780 MWL8K_RADIO_LONG_PREAMBLE);
1781
1782 return mwl8k_cmd_802_11_radio_control(hw,
1783 MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
1784}
1785
1786/*
1787 * CMD_802_11_RF_TX_POWER.
1788 */
1789#define MWL8K_TX_POWER_LEVEL_TOTAL 8
1790
1791struct mwl8k_cmd_802_11_rf_tx_power {
1792 struct mwl8k_cmd_pkt header;
1793 __le16 action;
1794 __le16 support_level;
1795 __le16 current_level;
1796 __le16 reserved;
1797 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1798} __attribute__((packed));
1799
1800static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1801{
1802 struct mwl8k_cmd_802_11_rf_tx_power *cmd;
1803 int rc;
1804
1805 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1806 if (cmd == NULL)
1807 return -ENOMEM;
1808
1809 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
1810 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1811 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1812 cmd->support_level = cpu_to_le16(dBm);
1813
1814 rc = mwl8k_post_cmd(hw, &cmd->header);
1815 kfree(cmd);
1816
1817 return rc;
1818}
1819
1820/*
1821 * CMD_SET_PRE_SCAN.
1822 */
1823struct mwl8k_cmd_set_pre_scan {
1824 struct mwl8k_cmd_pkt header;
1825} __attribute__((packed));
1826
1827static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
1828{
1829 struct mwl8k_cmd_set_pre_scan *cmd;
1830 int rc;
1831
1832 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1833 if (cmd == NULL)
1834 return -ENOMEM;
1835
1836 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
1837 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1838
1839 rc = mwl8k_post_cmd(hw, &cmd->header);
1840 kfree(cmd);
1841
1842 return rc;
1843}
1844
1845/*
1846 * CMD_SET_POST_SCAN.
1847 */
1848struct mwl8k_cmd_set_post_scan {
1849 struct mwl8k_cmd_pkt header;
1850 __le32 isibss;
1851 __u8 bssid[IEEE80211_ADDR_LEN];
1852} __attribute__((packed));
1853
1854static int
1855mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
1856{
1857 struct mwl8k_cmd_set_post_scan *cmd;
1858 int rc;
1859
1860 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1861 if (cmd == NULL)
1862 return -ENOMEM;
1863
1864 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
1865 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1866 cmd->isibss = 0;
1867 memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
1868
1869 rc = mwl8k_post_cmd(hw, &cmd->header);
1870 kfree(cmd);
1871
1872 return rc;
1873}
1874
1875/*
1876 * CMD_SET_RF_CHANNEL.
1877 */
1878struct mwl8k_cmd_set_rf_channel {
1879 struct mwl8k_cmd_pkt header;
1880 __le16 action;
1881 __u8 current_channel;
1882 __le32 channel_flags;
1883} __attribute__((packed));
1884
1885static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1886 struct ieee80211_channel *channel)
1887{
1888 struct mwl8k_cmd_set_rf_channel *cmd;
1889 int rc;
1890
1891 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1892 if (cmd == NULL)
1893 return -ENOMEM;
1894
1895 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
1896 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1897 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1898 cmd->current_channel = channel->hw_value;
1899 if (channel->band == IEEE80211_BAND_2GHZ)
1900 cmd->channel_flags = cpu_to_le32(0x00000081);
1901 else
1902 cmd->channel_flags = cpu_to_le32(0x00000000);
1903
1904 rc = mwl8k_post_cmd(hw, &cmd->header);
1905 kfree(cmd);
1906
1907 return rc;
1908}
1909
1910/*
1911 * CMD_SET_SLOT.
1912 */
1913struct mwl8k_cmd_set_slot {
1914 struct mwl8k_cmd_pkt header;
1915 __le16 action;
1916 __u8 short_slot;
1917} __attribute__((packed));
1918
1919static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
1920{
1921 struct mwl8k_cmd_set_slot *cmd;
1922 int rc;
1923
1924 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1925 if (cmd == NULL)
1926 return -ENOMEM;
1927
1928 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1929 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1930 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1931 cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
1932
1933 rc = mwl8k_post_cmd(hw, &cmd->header);
1934 kfree(cmd);
1935
1936 return rc;
1937}
1938
1939/*
1940 * CMD_MIMO_CONFIG.
1941 */
1942struct mwl8k_cmd_mimo_config {
1943 struct mwl8k_cmd_pkt header;
1944 __le32 action;
1945 __u8 rx_antenna_map;
1946 __u8 tx_antenna_map;
1947} __attribute__((packed));
1948
1949static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1950{
1951 struct mwl8k_cmd_mimo_config *cmd;
1952 int rc;
1953
1954 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1955 if (cmd == NULL)
1956 return -ENOMEM;
1957
1958 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
1959 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1960 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
1961 cmd->rx_antenna_map = rx;
1962 cmd->tx_antenna_map = tx;
1963
1964 rc = mwl8k_post_cmd(hw, &cmd->header);
1965 kfree(cmd);
1966
1967 return rc;
1968}
1969
1970/*
1971 * CMD_ENABLE_SNIFFER.
1972 */
1973struct mwl8k_cmd_enable_sniffer {
1974 struct mwl8k_cmd_pkt header;
1975 __le32 action;
1976} __attribute__((packed));
1977
1978static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1979{
1980 struct mwl8k_cmd_enable_sniffer *cmd;
1981 int rc;
1982
1983 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1984 if (cmd == NULL)
1985 return -ENOMEM;
1986
1987 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
1988 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1989 cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
1990
1991 rc = mwl8k_post_cmd(hw, &cmd->header);
1992 kfree(cmd);
1993
1994 return rc;
1995}
1996
1997/*
1998 * CMD_SET_RATE_ADAPT_MODE.
1999 */
2000struct mwl8k_cmd_set_rate_adapt_mode {
2001 struct mwl8k_cmd_pkt header;
2002 __le16 action;
2003 __le16 mode;
2004} __attribute__((packed));
2005
2006static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
2007{
2008 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2009 int rc;
2010
2011 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2012 if (cmd == NULL)
2013 return -ENOMEM;
2014
2015 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2016 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2017 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2018 cmd->mode = cpu_to_le16(mode);
2019
2020 rc = mwl8k_post_cmd(hw, &cmd->header);
2021 kfree(cmd);
2022
2023 return rc;
2024}
2025
2026/*
2027 * CMD_SET_WMM_MODE.
2028 */
2029struct mwl8k_cmd_set_wmm {
2030 struct mwl8k_cmd_pkt header;
2031 __le16 action;
2032} __attribute__((packed));
2033
2034static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
2035{
2036 struct mwl8k_priv *priv = hw->priv;
2037 struct mwl8k_cmd_set_wmm *cmd;
2038 int rc;
2039
2040 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2041 if (cmd == NULL)
2042 return -ENOMEM;
2043
2044 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2045 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2046 cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
2047
2048 rc = mwl8k_post_cmd(hw, &cmd->header);
2049 kfree(cmd);
2050
2051 if (!rc)
2052 priv->wmm_mode = enable;
2053
2054 return rc;
2055}
2056
2057/*
2058 * CMD_SET_RTS_THRESHOLD.
2059 */
2060struct mwl8k_cmd_rts_threshold {
2061 struct mwl8k_cmd_pkt header;
2062 __le16 action;
2063 __le16 threshold;
2064} __attribute__((packed));
2065
2066static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
2067 u16 action, u16 *threshold)
2068{
2069 struct mwl8k_cmd_rts_threshold *cmd;
2070 int rc;
2071
2072 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2073 if (cmd == NULL)
2074 return -ENOMEM;
2075
2076 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2077 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2078 cmd->action = cpu_to_le16(action);
2079 cmd->threshold = cpu_to_le16(*threshold);
2080
2081 rc = mwl8k_post_cmd(hw, &cmd->header);
2082 kfree(cmd);
2083
2084 return rc;
2085}
2086
2087/*
2088 * CMD_SET_EDCA_PARAMS.
2089 */
2090struct mwl8k_cmd_set_edca_params {
2091 struct mwl8k_cmd_pkt header;
2092
2093 /* See MWL8K_SET_EDCA_XXX below */
2094 __le16 action;
2095
2096 /* TX opportunity in units of 32 us */
2097 __le16 txop;
2098
2099 /* Log exponent of max contention period: 0...15*/
2100 __u8 log_cw_max;
2101
2102 /* Log exponent of min contention period: 0...15 */
2103 __u8 log_cw_min;
2104
2105 /* Adaptive interframe spacing in units of 32us */
2106 __u8 aifs;
2107
2108 /* TX queue to configure */
2109 __u8 txq;
2110} __attribute__((packed));
2111
a66098da
LB		 2112#define MWL8K_SET_EDCA_CW 0x01
2113#define MWL8K_SET_EDCA_TXOP 0x02
2114#define MWL8K_SET_EDCA_AIFS 0x04
2115
2116#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2117 MWL8K_SET_EDCA_TXOP | \
2118 MWL8K_SET_EDCA_AIFS)
2119
2120static int
2121mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2122 __u16 cw_min, __u16 cw_max,
2123 __u8 aifs, __u16 txop)
2124{
2125 struct mwl8k_cmd_set_edca_params *cmd;
2126 u32 log_cw_min, log_cw_max;
2127 int rc;
2128
2129 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2130 if (cmd == NULL)
2131 return -ENOMEM;
2132
2133 log_cw_min = ilog2(cw_min+1);
2134 log_cw_max = ilog2(cw_max+1);
2135 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2136 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2137
2138 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2139 cmd->txop = cpu_to_le16(txop);
2140 cmd->log_cw_max = (u8)log_cw_max;
2141 cmd->log_cw_min = (u8)log_cw_min;
2142 cmd->aifs = aifs;
2143 cmd->txq = qnum;
2144
2145 rc = mwl8k_post_cmd(hw, &cmd->header);
2146 kfree(cmd);
2147
2148 return rc;
2149}
2150
2151/*
2152 * CMD_FINALIZE_JOIN.
2153 */
2154
2155/* FJ beacon buffer size is compiled into the firmware. */
2156#define MWL8K_FJ_BEACON_MAXLEN 128
2157
2158struct mwl8k_cmd_finalize_join {
2159 struct mwl8k_cmd_pkt header;
2160 __le32 sleep_interval; /* Number of beacon periods to sleep */
2161 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2162} __attribute__((packed));
2163
2164static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
2165 __u16 framelen, __u16 dtim)
2166{
2167 struct mwl8k_cmd_finalize_join *cmd;
2168 struct ieee80211_mgmt *payload = frame;
2169 u16 hdrlen;
2170 u32 payload_len;
2171 int rc;
2172
2173 if (frame == NULL)
2174 return -EINVAL;
2175
2176 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2177 if (cmd == NULL)
2178 return -ENOMEM;
2179
2180 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2181 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2182
2183 if (dtim)
2184 cmd->sleep_interval = cpu_to_le32(dtim);
2185 else
2186 cmd->sleep_interval = cpu_to_le32(1);
2187
2188 hdrlen = ieee80211_hdrlen(payload->frame_control);
2189
2190 payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
2191
2192 /* XXX TBD Might just have to abort and return an error */
2193 if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2194 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2195 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2196 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2197
2198 payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
2199 MWL8K_FJ_BEACON_MAXLEN : payload_len;
2200
2201 if (payload && payload_len)
2202 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2203
2204 rc = mwl8k_post_cmd(hw, &cmd->header);
2205 kfree(cmd);
2206 return rc;
2207}
2208
2209/*
2210 * CMD_UPDATE_STADB.
2211 */
2212struct mwl8k_cmd_update_sta_db {
2213 struct mwl8k_cmd_pkt header;
2214
2215 /* See STADB_ACTION_TYPE */
2216 __le32 action;
2217
2218 /* Peer MAC address */
2219 __u8 peer_addr[IEEE80211_ADDR_LEN];
2220
2221 __le32 reserved;
2222
2223 /* Peer info - valid during add/update. */
2224 struct peer_capability_info peer_info;
2225} __attribute__((packed));
2226
2227static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
2228 struct ieee80211_vif *vif, __u32 action)
2229{
2230 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2231 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2232 struct mwl8k_cmd_update_sta_db *cmd;
2233 struct peer_capability_info *peer_info;
2234 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
a66098da
LB		 2235 int rc;
2236 __u8 count, *rates;
2237
2238 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2239 if (cmd == NULL)
2240 return -ENOMEM;
2241
2242 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2243 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2244
2245 cmd->action = cpu_to_le32(action);
2246 peer_info = &cmd->peer_info;
2247 memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
2248
2249 switch (action) {
2250 case MWL8K_STA_DB_ADD_ENTRY:
2251 case MWL8K_STA_DB_MODIFY_ENTRY:
2252 /* Build peer_info block */
2253 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2254 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2255 peer_info->interop = 1;
2256 peer_info->amsdu_enabled = 0;
2257
2258 rates = peer_info->legacy_rates;
2259 for (count = 0 ; count < mv_vif->legacy_nrates; count++)
2260 rates[count] = bitrates[count].hw_value;
2261
2262 rc = mwl8k_post_cmd(hw, &cmd->header);
2263 if (rc == 0)
2264 mv_vif->peer_id = peer_info->station_id;
2265
2266 break;
2267
2268 case MWL8K_STA_DB_DEL_ENTRY:
2269 case MWL8K_STA_DB_FLUSH:
2270 default:
2271 rc = mwl8k_post_cmd(hw, &cmd->header);
2272 if (rc == 0)
2273 mv_vif->peer_id = 0;
2274 break;
2275 }
2276 kfree(cmd);
2277
2278 return rc;
2279}
2280
2281/*
2282 * CMD_SET_AID.
2283 */
a66098da
LB		 2284#define MWL8K_RATE_INDEX_MAX_ARRAY 14
2285
2286#define MWL8K_FRAME_PROT_DISABLED 0x00
2287#define MWL8K_FRAME_PROT_11G 0x07
2288#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2289#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da
LB		 2290
2291struct mwl8k_cmd_update_set_aid {
2292 struct mwl8k_cmd_pkt header;
2293 __le16 aid;
2294
2295 /* AP's MAC address (BSSID) */
2296 __u8 bssid[IEEE80211_ADDR_LEN];
2297 __le16 protection_mode;
2298 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2299} __attribute__((packed));
2300
2301static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2302 struct ieee80211_vif *vif)
2303{
2304 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2305 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2306 struct mwl8k_cmd_update_set_aid *cmd;
2307 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2308 int count;
2309 u16 prot_mode;
2310 int rc;
2311
2312 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2313 if (cmd == NULL)
2314 return -ENOMEM;
2315
2316 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2317 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2318 cmd->aid = cpu_to_le16(info->aid);
2319
2320 memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
2321
2322 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2323
2324 if (info->use_cts_prot) {
2325 prot_mode = MWL8K_FRAME_PROT_11G;
2326 } else {
9ed6bcce 2327 switch (info->ht_operation_mode &
a66098da
LB		 2328 IEEE80211_HT_OP_MODE_PROTECTION) {
2329 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2330 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2331 break;
2332 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2333 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2334 break;
2335 default:
2336 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2337 break;
2338 }
2339 }
2340
2341 cmd->protection_mode = cpu_to_le16(prot_mode);
2342
2343 for (count = 0; count < mv_vif->legacy_nrates; count++)
2344 cmd->supp_rates[count] = bitrates[count].hw_value;
2345
2346 rc = mwl8k_post_cmd(hw, &cmd->header);
2347 kfree(cmd);
2348
2349 return rc;
2350}
2351
2352/*
2353 * CMD_SET_RATE.
2354 */
2355struct mwl8k_cmd_update_rateset {
2356 struct mwl8k_cmd_pkt header;
2357 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
2358
2359 /* Bitmap for supported MCS codes. */
2360 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
2361 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
2362} __attribute__((packed));
2363
2364static int mwl8k_update_rateset(struct ieee80211_hw *hw,
2365 struct ieee80211_vif *vif)
2366{
2367 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
2368 struct mwl8k_cmd_update_rateset *cmd;
2369 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2370 int count;
2371 int rc;
2372
2373 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2374 if (cmd == NULL)
2375 return -ENOMEM;
2376
2377 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2378 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2379
2380 for (count = 0; count < mv_vif->legacy_nrates; count++)
2381 cmd->legacy_rates[count] = bitrates[count].hw_value;
2382
2383 rc = mwl8k_post_cmd(hw, &cmd->header);
2384 kfree(cmd);
2385
2386 return rc;
2387}
2388
2389/*
2390 * CMD_USE_FIXED_RATE.
2391 */
2392#define MWL8K_RATE_TABLE_SIZE 8
2393#define MWL8K_UCAST_RATE 0
a66098da
LB		 2394#define MWL8K_USE_AUTO_RATE 0x0002
2395
2396struct mwl8k_rate_entry {
2397 /* Set to 1 if HT rate, 0 if legacy. */
2398 __le32 is_ht_rate;
2399
2400 /* Set to 1 to use retry_count field. */
2401 __le32 enable_retry;
2402
2403 /* Specified legacy rate or MCS. */
2404 __le32 rate;
2405
2406 /* Number of allowed retries. */
2407 __le32 retry_count;
2408} __attribute__((packed));
2409
2410struct mwl8k_rate_table {
2411 /* 1 to allow specified rate and below */
2412 __le32 allow_rate_drop;
2413 __le32 num_rates;
2414 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
2415} __attribute__((packed));
2416
2417struct mwl8k_cmd_use_fixed_rate {
2418 struct mwl8k_cmd_pkt header;
2419 __le32 action;
2420 struct mwl8k_rate_table rate_table;
2421
2422 /* Unicast, Broadcast or Multicast */
2423 __le32 rate_type;
2424 __le32 reserved1;
2425 __le32 reserved2;
2426} __attribute__((packed));
2427
2428static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
2429 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
2430{
2431 struct mwl8k_cmd_use_fixed_rate *cmd;
2432 int count;
2433 int rc;
2434
2435 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2436 if (cmd == NULL)
2437 return -ENOMEM;
2438
2439 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2440 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2441
2442 cmd->action = cpu_to_le32(action);
2443 cmd->rate_type = cpu_to_le32(rate_type);
2444
2445 if (rate_table != NULL) {
2446 /* Copy over each field manually so
2447 * that bitflipping can be done
2448 */
2449 cmd->rate_table.allow_rate_drop =
2450 cpu_to_le32(rate_table->allow_rate_drop);
2451 cmd->rate_table.num_rates =
2452 cpu_to_le32(rate_table->num_rates);
2453
2454 for (count = 0; count < rate_table->num_rates; count++) {
2455 struct mwl8k_rate_entry *dst =
2456 &cmd->rate_table.rate_entry[count];
2457 struct mwl8k_rate_entry *src =
2458 &rate_table->rate_entry[count];
2459
2460 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
2461 dst->enable_retry = cpu_to_le32(src->enable_retry);
2462 dst->rate = cpu_to_le32(src->rate);
2463 dst->retry_count = cpu_to_le32(src->retry_count);
2464 }
2465 }
2466
2467 rc = mwl8k_post_cmd(hw, &cmd->header);
2468 kfree(cmd);
2469
2470 return rc;
2471}
2472
2473
2474/*
2475 * Interrupt handling.
2476 */
2477static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2478{
2479 struct ieee80211_hw *hw = dev_id;
2480 struct mwl8k_priv *priv = hw->priv;
2481 u32 status;
2482
2483 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2484 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2485
a66098da
LB		 2486 if (!status)
2487 return IRQ_NONE;
2488
2489 if (status & MWL8K_A2H_INT_TX_DONE)
2490 tasklet_schedule(&priv->tx_reclaim_task);
2491
2492 if (status & MWL8K_A2H_INT_RX_READY) {
2493 while (rxq_process(hw, 0, 1))
2494 rxq_refill(hw, 0, 1);
2495 }
2496
2497 if (status & MWL8K_A2H_INT_OPC_DONE) {
2498 if (priv->hostcmd_wait != NULL) {
2499 complete(priv->hostcmd_wait);
2500 priv->hostcmd_wait = NULL;
2501 }
2502 }
2503
2504 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2505 if (!priv->inconfig &&
2506 priv->radio_state &&
2507 mwl8k_txq_busy(priv))
2508 mwl8k_tx_start(priv);
2509 }
2510
2511 return IRQ_HANDLED;
2512}
2513
2514
2515/*
2516 * Core driver operations.
2517 */
2518static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2519{
2520 struct mwl8k_priv *priv = hw->priv;
2521 int index = skb_get_queue_mapping(skb);
2522 int rc;
2523
2524 if (priv->current_channel == NULL) {
2525 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2526 "disabled\n", priv->name);
2527 dev_kfree_skb(skb);
2528 return NETDEV_TX_OK;
2529 }
2530
2531 rc = mwl8k_txq_xmit(hw, index, skb);
2532
2533 return rc;
2534}
2535
2536struct mwl8k_work_struct {
2537 /* Initialized by mwl8k_queue_work(). */
2538 struct work_struct wt;
2539
2540 /* Required field passed in to mwl8k_queue_work(). */
2541 struct ieee80211_hw *hw;
2542
2543 /* Required field passed in to mwl8k_queue_work(). */
2544 int (*wfunc)(struct work_struct *w);
2545
2546 /* Initialized by mwl8k_queue_work(). */
2547 struct completion *cmd_wait;
2548
2549 /* Result code. */
2550 int rc;
2551
2552 /*
2553 * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
2554 * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
2555 */
2556 u32 options;
2557
2558 /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
2559 unsigned long timeout_ms;
2560
2561 /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
2562 u32 txwait_attempts;
2563
2564 /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
2565 u32 tx_timeout_ms;
2566 u32 step;
2567};
2568
2569/* Flags controlling behavior of config queue requests */
2570
2571/* Caller spins while waiting for completion. */
2572#define MWL8K_WQ_SPIN 0x00000001
2573
2574/* Wait for TX queues to empty before proceeding with configuration. */
2575#define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
2576
2577/* Queue request and return immediately. */
2578#define MWL8K_WQ_POST_REQUEST 0x00000004
2579
2580/*
2581 * Caller sleeps and waits for task complete notification.
2582 * Do not use in atomic context.
2583 */
2584#define MWL8K_WQ_SLEEP 0x00000008
2585
2586/* Free work struct when task is done. */
2587#define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
2588
2589/*
2590 * Config request is queued and returns to caller imediately. Use
2591 * this in atomic context. Work struct is freed by mwl8k_queue_work()
2592 * when this flag is set.
2593 */
2594#define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
2595 MWL8K_WQ_FREE_WORKSTRUCT)
2596
2597/* Default work queue behavior is to sleep and wait for tx completion. */
2598#define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
2599
2600/*
2601 * Default config request timeout. Add adjustments to make sure the
2602 * config thread waits long enough for both tx wait and cmd wait before
2603 * timing out.
2604 */
2605
2606/* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
2607#define MWL8K_TXWAIT_TIMEOUT_MS 1000
2608
2609/* Default number of TX wait attempts. */
2610#define MWL8K_WQ_TXWAIT_ATTEMPTS 4
2611
2612/* Total time to wait for TXQ to drain. */
2613#define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
2614 MWL8K_WQ_TXWAIT_ATTEMPTS)
2615
2616/* Scheduling slop. */
2617#define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
2618
2619#define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
2620 MWL8K_TXWAIT_MS + \
2621 MWL8K_OS_SCHEDULE_OVERHEAD_MS)
2622
2623static void mwl8k_config_thread(struct work_struct *wt)
2624{
2625 struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
2626 struct ieee80211_hw *hw = worker->hw;
2627 struct mwl8k_priv *priv = hw->priv;
2628 int rc = 0;
2629
2630 spin_lock_irq(&priv->tx_lock);
2631 priv->inconfig = true;
2632 spin_unlock_irq(&priv->tx_lock);
2633
2634 ieee80211_stop_queues(hw);
2635
2636 /*
2637 * Wait for host queues to drain before doing PHY
2638 * reconfiguration. This avoids interrupting any in-flight
2639 * DMA transfers to the hardware.
2640 */
2641 if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
2642 u32 timeout;
2643 u32 time_remaining;
2644 u32 iter;
2645 u32 tx_wait_attempts = worker->txwait_attempts;
2646
2647 time_remaining = worker->tx_timeout_ms;
2648 if (!tx_wait_attempts)
2649 tx_wait_attempts = 1;
2650
2651 timeout = worker->tx_timeout_ms/tx_wait_attempts;
2652 if (!timeout)
2653 timeout = 1;
2654
2655 iter = tx_wait_attempts;
2656 do {
2657 int wait_time;
2658
2659 if (time_remaining > timeout) {
2660 time_remaining -= timeout;
2661 wait_time = timeout;
2662 } else
2663 wait_time = time_remaining;
2664
2665 if (!wait_time)
2666 wait_time = 1;
2667
2668 rc = mwl8k_tx_wait_empty(hw, wait_time);
2669 if (rc)
2670 printk(KERN_ERR "%s() txwait timeout=%ums "
2671 "Retry:%u/%u\n", __func__, timeout,
2672 tx_wait_attempts - iter + 1,
2673 tx_wait_attempts);
2674
2675 } while (rc && --iter);
2676
2677 rc = iter ? 0 : -ETIMEDOUT;
2678 }
2679 if (!rc)
2680 rc = worker->wfunc(wt);
2681
2682 spin_lock_irq(&priv->tx_lock);
2683 priv->inconfig = false;
2684 if (priv->pending_tx_pkts && priv->radio_state)
2685 mwl8k_tx_start(priv);
2686 spin_unlock_irq(&priv->tx_lock);
2687 ieee80211_wake_queues(hw);
2688
2689 worker->rc = rc;
2690 if (worker->options & MWL8K_WQ_SLEEP)
2691 complete(worker->cmd_wait);
2692
2693 if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
2694 kfree(wt);
2695}
2696
2697static int mwl8k_queue_work(struct ieee80211_hw *hw,
2698 struct mwl8k_work_struct *worker,
2699 struct workqueue_struct *wqueue,
2700 int (*wfunc)(struct work_struct *w))
2701{
2702 unsigned long timeout = 0;
2703 int rc = 0;
2704
2705 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2706
2707 if (!worker->timeout_ms)
2708 worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
2709
2710 if (!worker->options)
2711 worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
2712
2713 if (!worker->txwait_attempts)
2714 worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
2715
2716 if (!worker->tx_timeout_ms)
2717 worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
2718
2719 worker->hw = hw;
2720 worker->cmd_wait = &cmd_wait;
2721 worker->rc = 1;
2722 worker->wfunc = wfunc;
2723
2724 INIT_WORK(&worker->wt, mwl8k_config_thread);
2725 queue_work(wqueue, &worker->wt);
2726
2727 if (worker->options & MWL8K_WQ_POST_REQUEST) {
2728 rc = 0;
2729 } else {
2730 if (worker->options & MWL8K_WQ_SPIN) {
2731 timeout = worker->timeout_ms;
2732 while (timeout && (worker->rc > 0)) {
2733 mdelay(1);
2734 timeout--;
2735 }
2736 } else if (worker->options & MWL8K_WQ_SLEEP)
2737 timeout = wait_for_completion_timeout(&cmd_wait,
2738 msecs_to_jiffies(worker->timeout_ms));
2739
2740 if (timeout)
2741 rc = worker->rc;
2742 else {
2743 cancel_work_sync(&worker->wt);
2744 rc = -ETIMEDOUT;
2745 }
2746 }
2747
2748 return rc;
2749}
2750
2751struct mwl8k_start_worker {
2752 struct mwl8k_work_struct header;
2753};
2754
2755static int mwl8k_start_wt(struct work_struct *wt)
2756{
2757 struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
2758 struct ieee80211_hw *hw = worker->header.hw;
2759 struct mwl8k_priv *priv = hw->priv;
2760 int rc = 0;
2761
2762 if (priv->vif != NULL) {
2763 rc = -EIO;
2764 goto mwl8k_start_exit;
2765 }
2766
2767 /* Turn on radio */
2768 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2769 rc = -EIO;
2770 goto mwl8k_start_exit;
2771 }
2772
2773 /* Purge TX/RX HW queues */
2774 if (mwl8k_cmd_set_pre_scan(hw)) {
2775 rc = -EIO;
2776 goto mwl8k_start_exit;
2777 }
2778
2779 if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
2780 rc = -EIO;
2781 goto mwl8k_start_exit;
2782 }
2783
2784 /* Enable firmware rate adaptation */
2785 if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
2786 rc = -EIO;
2787 goto mwl8k_start_exit;
2788 }
2789
2790 /* Disable WMM. WMM gets enabled when stack sends WMM parms */
2791 if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
2792 rc = -EIO;
2793 goto mwl8k_start_exit;
2794 }
2795
2796 /* Disable sniffer mode */
2797 if (mwl8k_enable_sniffer(hw, 0))
2798 rc = -EIO;
2799
2800mwl8k_start_exit:
2801 return rc;
2802}
2803
2804static int mwl8k_start(struct ieee80211_hw *hw)
2805{
2806 struct mwl8k_start_worker *worker;
2807 struct mwl8k_priv *priv = hw->priv;
2808 int rc;
2809
2810 /* Enable tx reclaim tasklet */
2811 tasklet_enable(&priv->tx_reclaim_task);
2812
2813 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
2814 IRQF_SHARED, MWL8K_NAME, hw);
2815 if (rc) {
2816 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2817 priv->name);
2818 rc = -EIO;
2819 goto mwl8k_start_disable_tasklet;
2820 }
2821
2822 /* Enable interrupts */
c23b5a69 2823 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 2824
2825 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2826 if (worker == NULL) {
2827 rc = -ENOMEM;
2828 goto mwl8k_start_disable_irq;
2829 }
2830
2831 rc = mwl8k_queue_work(hw, &worker->header,
2832 priv->config_wq, mwl8k_start_wt);
2833 kfree(worker);
2834 if (!rc)
2835 return rc;
2836
2837 if (rc == -ETIMEDOUT)
2838 printk(KERN_ERR "%s() timed out\n", __func__);
2839
2840 rc = -EIO;
2841
2842mwl8k_start_disable_irq:
2843 spin_lock_irq(&priv->tx_lock);
2844 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2845 spin_unlock_irq(&priv->tx_lock);
2846 free_irq(priv->pdev->irq, hw);
2847
2848mwl8k_start_disable_tasklet:
2849 tasklet_disable(&priv->tx_reclaim_task);
2850
2851 return rc;
2852}
2853
2854struct mwl8k_stop_worker {
2855 struct mwl8k_work_struct header;
2856};
2857
2858static int mwl8k_stop_wt(struct work_struct *wt)
2859{
2860 struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
2861 struct ieee80211_hw *hw = worker->header.hw;
2862 int rc;
2863
2864 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
2865
2866 return rc;
2867}
2868
2869static void mwl8k_stop(struct ieee80211_hw *hw)
2870{
2871 int rc;
2872 struct mwl8k_stop_worker *worker;
2873 struct mwl8k_priv *priv = hw->priv;
2874 int i;
2875
2876 if (priv->vif != NULL)
2877 return;
2878
2879 ieee80211_stop_queues(hw);
2880
2881 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
2882 if (worker == NULL)
2883 return;
2884
2885 rc = mwl8k_queue_work(hw, &worker->header,
2886 priv->config_wq, mwl8k_stop_wt);
2887 kfree(worker);
2888 if (rc == -ETIMEDOUT)
2889 printk(KERN_ERR "%s() timed out\n", __func__);
2890
2891 /* Disable interrupts */
2892 spin_lock_irq(&priv->tx_lock);
2893 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2894 spin_unlock_irq(&priv->tx_lock);
2895 free_irq(priv->pdev->irq, hw);
2896
2897 /* Stop finalize join worker */
2898 cancel_work_sync(&priv->finalize_join_worker);
2899 if (priv->beacon_skb != NULL)
2900 dev_kfree_skb(priv->beacon_skb);
2901
2902 /* Stop tx reclaim tasklet */
2903 tasklet_disable(&priv->tx_reclaim_task);
2904
2905 /* Stop config thread */
2906 flush_workqueue(priv->config_wq);
2907
2908 /* Return all skbs to mac80211 */
2909 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2910 mwl8k_txq_reclaim(hw, i, 1);
2911}
2912
2913static int mwl8k_add_interface(struct ieee80211_hw *hw,
2914 struct ieee80211_if_init_conf *conf)
2915{
2916 struct mwl8k_priv *priv = hw->priv;
2917 struct mwl8k_vif *mwl8k_vif;
2918
2919 /*
2920 * We only support one active interface at a time.
2921 */
2922 if (priv->vif != NULL)
2923 return -EBUSY;
2924
2925 /*
2926 * We only support managed interfaces for now.
2927 */
2928 if (conf->type != NL80211_IFTYPE_STATION &&
2929 conf->type != NL80211_IFTYPE_MONITOR)
2930 return -EINVAL;
2931
2932 /* Clean out driver private area */
2933 mwl8k_vif = MWL8K_VIF(conf->vif);
2934 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2935
2936 /* Save the mac address */
2937 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
2938
2939 /* Back pointer to parent config block */
2940 mwl8k_vif->priv = priv;
2941
2942 /* Setup initial PHY parameters */
2943 memcpy(mwl8k_vif->legacy_rates ,
2944 priv->rates, sizeof(mwl8k_vif->legacy_rates));
2945 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2946
2947 /* Set Initial sequence number to zero */
2948 mwl8k_vif->seqno = 0;
2949
2950 priv->vif = conf->vif;
2951 priv->current_channel = NULL;
2952
2953 return 0;
2954}
2955
2956static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2957 struct ieee80211_if_init_conf *conf)
2958{
2959 struct mwl8k_priv *priv = hw->priv;
2960
2961 if (priv->vif == NULL)
2962 return;
2963
2964 priv->vif = NULL;
2965}
2966
2967struct mwl8k_config_worker {
2968 struct mwl8k_work_struct header;
2969 u32 changed;
2970};
2971
2972static int mwl8k_config_wt(struct work_struct *wt)
2973{
2974 struct mwl8k_config_worker *worker =
2975 (struct mwl8k_config_worker *)wt;
2976 struct ieee80211_hw *hw = worker->header.hw;
2977 struct ieee80211_conf *conf = &hw->conf;
2978 struct mwl8k_priv *priv = hw->priv;
2979 int rc = 0;
2980
a66098da
LB		 2981 if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
2982 rc = -EINVAL;
2983 goto mwl8k_config_exit;
2984 }
2985
2986 priv->current_channel = conf->channel;
2987
2988 if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
2989 rc = -EINVAL;
2990 goto mwl8k_config_exit;
2991 }
2992
2993 if (conf->power_level > 18)
2994 conf->power_level = 18;
2995 if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
2996 rc = -EINVAL;
2997 goto mwl8k_config_exit;
2998 }
2999
3000 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
3001 rc = -EINVAL;
3002
3003mwl8k_config_exit:
3004 return rc;
3005}
3006
3007static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3008{
3009 int rc = 0;
3010 struct mwl8k_config_worker *worker;
3011 struct mwl8k_priv *priv = hw->priv;
3012
3013 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3014 if (worker == NULL)
3015 return -ENOMEM;
3016
3017 worker->changed = changed;
3018 rc = mwl8k_queue_work(hw, &worker->header,
3019 priv->config_wq, mwl8k_config_wt);
3020 if (rc == -ETIMEDOUT) {
3021 printk(KERN_ERR "%s() timed out.\n", __func__);
3022 rc = -EINVAL;
3023 }
3024
3025 kfree(worker);
3026
3027 /*
3028 * mac80211 will crash on anything other than -EINVAL on
3029 * error. Looks like wireless extensions which calls mac80211
3030 * may be the actual culprit...
3031 */
3032 return rc ? -EINVAL : 0;
3033}
3034
a66098da
LB		 3035struct mwl8k_bss_info_changed_worker {
3036 struct mwl8k_work_struct header;
3037 struct ieee80211_vif *vif;
3038 struct ieee80211_bss_conf *info;
3039 u32 changed;
3040};
3041
3042static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
3043{
3044 struct mwl8k_bss_info_changed_worker *worker =
3045 (struct mwl8k_bss_info_changed_worker *)wt;
3046 struct ieee80211_hw *hw = worker->header.hw;
3047 struct ieee80211_vif *vif = worker->vif;
3048 struct ieee80211_bss_conf *info = worker->info;
3049 u32 changed;
3050 int rc;
3051
3052 struct mwl8k_priv *priv = hw->priv;
3053 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3054
3055 changed = worker->changed;
3056 priv->capture_beacon = false;
3057
3058 if (info->assoc) {
3059 memcpy(&mwl8k_vif->bss_info, info,
3060 sizeof(struct ieee80211_bss_conf));
3061
3062 /* Install rates */
3063 if (mwl8k_update_rateset(hw, vif))
3064 goto mwl8k_bss_info_changed_exit;
3065
3066 /* Turn on rate adaptation */
3067 if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
3068 MWL8K_UCAST_RATE, NULL))
3069 goto mwl8k_bss_info_changed_exit;
3070
3071 /* Set radio preamble */
3072 if (mwl8k_set_radio_preamble(hw,
3073 info->use_short_preamble))
3074 goto mwl8k_bss_info_changed_exit;
3075
3076 /* Set slot time */
3077 if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
3078 MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
3079 goto mwl8k_bss_info_changed_exit;
3080
3081 /* Update peer rate info */
3082 if (mwl8k_cmd_update_sta_db(hw, vif,
3083 MWL8K_STA_DB_MODIFY_ENTRY))
3084 goto mwl8k_bss_info_changed_exit;
3085
3086 /* Set AID */
3087 if (mwl8k_cmd_set_aid(hw, vif))
3088 goto mwl8k_bss_info_changed_exit;
3089
3090 /*
3091 * Finalize the join. Tell rx handler to process
3092 * next beacon from our BSSID.
3093 */
3094 memcpy(priv->capture_bssid,
3095 mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
3096 priv->capture_beacon = true;
3097 } else {
3098 mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
3099 memset(&mwl8k_vif->bss_info, 0,
3100 sizeof(struct ieee80211_bss_conf));
3101 memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
3102 }
3103
3104mwl8k_bss_info_changed_exit:
3105 rc = 0;
3106 return rc;
3107}
3108
3109static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
3110 struct ieee80211_vif *vif,
3111 struct ieee80211_bss_conf *info,
3112 u32 changed)
3113{
3114 struct mwl8k_bss_info_changed_worker *worker;
3115 struct mwl8k_priv *priv = hw->priv;
2d0ddec5 3116 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
a66098da
LB		 3117 int rc;
3118
2d0ddec5
JB		 3119 if (changed & BSS_CHANGED_BSSID)
3120 memcpy(mv_vif->bssid, info->bssid, IEEE80211_ADDR_LEN);
3121
a66098da
LB		 3122 if ((changed & BSS_CHANGED_ASSOC) == 0)
3123 return;
3124
3125 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3126 if (worker == NULL)
3127 return;
3128
3129 worker->vif = vif;
3130 worker->info = info;
3131 worker->changed = changed;
3132 rc = mwl8k_queue_work(hw, &worker->header,
3133 priv->config_wq,
3134 mwl8k_bss_info_changed_wt);
3135 kfree(worker);
3136 if (rc == -ETIMEDOUT)
3137 printk(KERN_ERR "%s() timed out\n", __func__);
3138}
3139
3140struct mwl8k_configure_filter_worker {
3141 struct mwl8k_work_struct header;
3142 unsigned int changed_flags;
3143 unsigned int *total_flags;
3144 int mc_count;
3145 struct dev_addr_list *mclist;
3146};
3147
3148#define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
3149
3150static int mwl8k_configure_filter_wt(struct work_struct *wt)
3151{
3152 struct mwl8k_configure_filter_worker *worker =
3153 (struct mwl8k_configure_filter_worker *)wt;
3154
3155 struct ieee80211_hw *hw = worker->header.hw;
3156 unsigned int changed_flags = worker->changed_flags;
3157 unsigned int *total_flags = worker->total_flags;
3158 int mc_count = worker->mc_count;
3159 struct dev_addr_list *mclist = worker->mclist;
3160
3161 struct mwl8k_priv *priv = hw->priv;
a66098da
LB		 3162 int rc = 0;
3163
3164 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3165 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
3166 rc = mwl8k_cmd_set_pre_scan(hw);
3167 else {
a94cc97e
LB		 3168 u8 *bssid;
3169
3170 bssid = "\x00\x00\x00\x00\x00\x00";
3171 if (priv->vif != NULL)
3172 bssid = MWL8K_VIF(priv->vif)->bssid;
3173
3174 rc = mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 3175 }
3176 }
3177
3178 if (rc)
3179 goto mwl8k_configure_filter_exit;
3180 if (mc_count) {
3181 mc_count = mc_count < priv->num_mcaddrs ?
3182 mc_count : priv->num_mcaddrs;
3183 rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
3184 if (rc)
3185 printk(KERN_ERR
3186 "%s()Error setting multicast addresses\n",
3187 __func__);
3188 }
3189
3190mwl8k_configure_filter_exit:
3191 return rc;
3192}
3193
3ac64bee
JB		 3194static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3195 int mc_count, struct dev_addr_list *mclist)
3196{
3197 struct mwl8k_configure_filter_worker *worker;
3198
3199 worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
3200
3201 if (!worker)
3202 return 0;
3203
3204 /*
3205 * XXX: This is _HORRIBLY_ broken!!
3206 *
3207 * No locking, the mclist pointer might be invalid as soon as this
3208 * function returns, something in the list might be invalidated
3209 * once we get to the worker, etc...
3210 */
3211 worker->mc_count = mc_count;
3212 worker->mclist = mclist;
3213
3214 return (u64)worker;
3215}
3216
a66098da
LB		 3217static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3218 unsigned int changed_flags,
3219 unsigned int *total_flags,
3ac64bee 3220 u64 multicast)
a66098da
LB		 3221{
3222
3ac64bee 3223 struct mwl8k_configure_filter_worker *worker = (void *)multicast;
a66098da
LB		 3224 struct mwl8k_priv *priv = hw->priv;
3225
3226 /* Clear unsupported feature flags */
3227 *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
3228
3ac64bee 3229 if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
a66098da
LB		 3230 return;
3231
a66098da
LB		 3232 if (worker == NULL)
3233 return;
3234
3235 worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
3236 worker->changed_flags = changed_flags;
3237 worker->total_flags = total_flags;
a66098da
LB		 3238
3239 mwl8k_queue_work(hw, &worker->header, priv->config_wq,
3240 mwl8k_configure_filter_wt);
3241}
3242
3243struct mwl8k_set_rts_threshold_worker {
3244 struct mwl8k_work_struct header;
3245 u32 value;
3246};
3247
3248static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
3249{
3250 struct mwl8k_set_rts_threshold_worker *worker =
3251 (struct mwl8k_set_rts_threshold_worker *)wt;
3252
3253 struct ieee80211_hw *hw = worker->header.hw;
3254 u16 threshold = (u16)(worker->value);
3255 int rc;
3256
3257 rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
3258
3259 return rc;
3260}
3261
3262static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3263{
3264 int rc;
3265 struct mwl8k_set_rts_threshold_worker *worker;
3266 struct mwl8k_priv *priv = hw->priv;
3267
3268 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3269 if (worker == NULL)
3270 return -ENOMEM;
3271
3272 worker->value = value;
3273
3274 rc = mwl8k_queue_work(hw, &worker->header,
3275 priv->config_wq,
3276 mwl8k_set_rts_threshold_wt);
3277 kfree(worker);
3278
3279 if (rc == -ETIMEDOUT) {
3280 printk(KERN_ERR "%s() timed out\n", __func__);
3281 rc = -EINVAL;
3282 }
3283
3284 return rc;
3285}
3286
3287struct mwl8k_conf_tx_worker {
3288 struct mwl8k_work_struct header;
3289 u16 queue;
3290 const struct ieee80211_tx_queue_params *params;
3291};
3292
3293static int mwl8k_conf_tx_wt(struct work_struct *wt)
3294{
3295 struct mwl8k_conf_tx_worker *worker =
3296 (struct mwl8k_conf_tx_worker *)wt;
3297
3298 struct ieee80211_hw *hw = worker->header.hw;
3299 u16 queue = worker->queue;
3300 const struct ieee80211_tx_queue_params *params = worker->params;
3301
3302 struct mwl8k_priv *priv = hw->priv;
3303 int rc = 0;
3304
3305 if (priv->wmm_mode == MWL8K_WMM_DISABLE)
3306 if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
3307 rc = -EINVAL;
3308 goto mwl8k_conf_tx_exit;
3309 }
3310
3311 if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
3312 params->cw_max, params->aifs, params->txop))
3313 rc = -EINVAL;
3314mwl8k_conf_tx_exit:
3315 return rc;
3316}
3317
3318static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3319 const struct ieee80211_tx_queue_params *params)
3320{
3321 int rc;
3322 struct mwl8k_conf_tx_worker *worker;
3323 struct mwl8k_priv *priv = hw->priv;
3324
3325 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3326 if (worker == NULL)
3327 return -ENOMEM;
3328
3329 worker->queue = queue;
3330 worker->params = params;
3331 rc = mwl8k_queue_work(hw, &worker->header,
3332 priv->config_wq, mwl8k_conf_tx_wt);
3333 kfree(worker);
3334 if (rc == -ETIMEDOUT) {
3335 printk(KERN_ERR "%s() timed out\n", __func__);
3336 rc = -EINVAL;
3337 }
3338 return rc;
3339}
3340
3341static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
3342 struct ieee80211_tx_queue_stats *stats)
3343{
3344 struct mwl8k_priv *priv = hw->priv;
3345 struct mwl8k_tx_queue *txq;
3346 int index;
3347
3348 spin_lock_bh(&priv->tx_lock);
3349 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
3350 txq = priv->txq + index;
3351 memcpy(&stats[index], &txq->tx_stats,
3352 sizeof(struct ieee80211_tx_queue_stats));
3353 }
3354 spin_unlock_bh(&priv->tx_lock);
3355 return 0;
3356}
3357
3358struct mwl8k_get_stats_worker {
3359 struct mwl8k_work_struct header;
3360 struct ieee80211_low_level_stats *stats;
3361};
3362
3363static int mwl8k_get_stats_wt(struct work_struct *wt)
3364{
3365 struct mwl8k_get_stats_worker *worker =
3366 (struct mwl8k_get_stats_worker *)wt;
3367
3368 return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
3369}
3370
3371static int mwl8k_get_stats(struct ieee80211_hw *hw,
3372 struct ieee80211_low_level_stats *stats)
3373{
3374 int rc;
3375 struct mwl8k_get_stats_worker *worker;
3376 struct mwl8k_priv *priv = hw->priv;
3377
3378 worker = kzalloc(sizeof(*worker), GFP_KERNEL);
3379 if (worker == NULL)
3380 return -ENOMEM;
3381
3382 worker->stats = stats;
3383 rc = mwl8k_queue_work(hw, &worker->header,
3384 priv->config_wq, mwl8k_get_stats_wt);
3385
3386 kfree(worker);
3387 if (rc == -ETIMEDOUT) {
3388 printk(KERN_ERR "%s() timed out\n", __func__);
3389 rc = -EINVAL;
3390 }
3391
3392 return rc;
3393}
3394
3395static const struct ieee80211_ops mwl8k_ops = {
3396 .tx = mwl8k_tx,
3397 .start = mwl8k_start,
3398 .stop = mwl8k_stop,
3399 .add_interface = mwl8k_add_interface,
3400 .remove_interface = mwl8k_remove_interface,
3401 .config = mwl8k_config,
a66098da 3402 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 3403 .prepare_multicast = mwl8k_prepare_multicast,
a66098da
LB		 3404 .configure_filter = mwl8k_configure_filter,
3405 .set_rts_threshold = mwl8k_set_rts_threshold,
3406 .conf_tx = mwl8k_conf_tx,
3407 .get_tx_stats = mwl8k_get_tx_stats,
3408 .get_stats = mwl8k_get_stats,
3409};
3410
3411static void mwl8k_tx_reclaim_handler(unsigned long data)
3412{
3413 int i;
3414 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
3415 struct mwl8k_priv *priv = hw->priv;
3416
3417 spin_lock_bh(&priv->tx_lock);
3418 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3419 mwl8k_txq_reclaim(hw, i, 0);
3420
3421 if (priv->tx_wait != NULL) {
3422 int count = mwl8k_txq_busy(priv);
3423 if (count == 0) {
3424 complete(priv->tx_wait);
3425 priv->tx_wait = NULL;
3426 }
3427 }
3428 spin_unlock_bh(&priv->tx_lock);
3429}
3430
3431static void mwl8k_finalize_join_worker(struct work_struct *work)
3432{
3433 struct mwl8k_priv *priv =
3434 container_of(work, struct mwl8k_priv, finalize_join_worker);
3435 struct sk_buff *skb = priv->beacon_skb;
3436 u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
3437
3438 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
3439 dev_kfree_skb(skb);
3440
3441 priv->beacon_skb = NULL;
3442}
3443
3444static int __devinit mwl8k_probe(struct pci_dev *pdev,
3445 const struct pci_device_id *id)
3446{
3447 struct ieee80211_hw *hw;
3448 struct mwl8k_priv *priv;
a66098da
LB		 3449 int rc;
3450 int i;
3451 u8 *fw;
3452
3453 rc = pci_enable_device(pdev);
3454 if (rc) {
3455 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
3456 MWL8K_NAME);
3457 return rc;
3458 }
3459
3460 rc = pci_request_regions(pdev, MWL8K_NAME);
3461 if (rc) {
3462 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
3463 MWL8K_NAME);
3464 return rc;
3465 }
3466
3467 pci_set_master(pdev);
3468
3469 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
3470 if (hw == NULL) {
3471 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
3472 rc = -ENOMEM;
3473 goto err_free_reg;
3474 }
3475
3476 priv = hw->priv;
3477 priv->hw = hw;
3478 priv->pdev = pdev;
3479 priv->hostcmd_wait = NULL;
3480 priv->tx_wait = NULL;
3481 priv->inconfig = false;
a66098da
LB		 3482 priv->wmm_mode = false;
3483 priv->pending_tx_pkts = 0;
3484 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
3485
3486 spin_lock_init(&priv->fw_lock);
3487
3488 SET_IEEE80211_DEV(hw, &pdev->dev);
3489 pci_set_drvdata(pdev, hw);
3490
3491 priv->regs = pci_iomap(pdev, 1, 0x10000);
3492 if (priv->regs == NULL) {
3493 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
3494 goto err_iounmap;
3495 }
3496
3497 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
3498 priv->band.band = IEEE80211_BAND_2GHZ;
3499 priv->band.channels = priv->channels;
3500 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
3501 priv->band.bitrates = priv->rates;
3502 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
3503 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
3504
3505 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
3506 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
3507
3508 /*
3509 * Extra headroom is the size of the required DMA header
3510 * minus the size of the smallest 802.11 frame (CTS frame).
3511 */
3512 hw->extra_tx_headroom =
3513 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
3514
3515 hw->channel_change_time = 10;
3516
3517 hw->queues = MWL8K_TX_QUEUES;
3518
3519 hw->wiphy->interface_modes =
3520 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
3521
3522 /* Set rssi and noise values to dBm */
3523 hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
3524 hw->vif_data_size = sizeof(struct mwl8k_vif);
3525 priv->vif = NULL;
3526
3527 /* Set default radio state and preamble */
3528 priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
3529 priv->radio_state = MWL8K_RADIO_DISABLE;
3530
3531 /* Finalize join worker */
3532 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3533
3534 /* TX reclaim tasklet */
3535 tasklet_init(&priv->tx_reclaim_task,
3536 mwl8k_tx_reclaim_handler, (unsigned long)hw);
3537 tasklet_disable(&priv->tx_reclaim_task);
3538
3539 /* Config workthread */
3540 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
3541 if (priv->config_wq == NULL)
3542 goto err_iounmap;
3543
3544 /* Power management cookie */
3545 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
3546 if (priv->cookie == NULL)
3547 goto err_iounmap;
3548
3549 rc = mwl8k_rxq_init(hw, 0);
3550 if (rc)
3551 goto err_iounmap;
3552 rxq_refill(hw, 0, INT_MAX);
3553
3554 spin_lock_init(&priv->tx_lock);
3555
3556 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
3557 rc = mwl8k_txq_init(hw, i);
3558 if (rc)
3559 goto err_free_queues;
3560 }
3561
3562 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 3563 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 3564 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
3565 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3566
3567 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
3568 IRQF_SHARED, MWL8K_NAME, hw);
3569 if (rc) {
3570 printk(KERN_ERR "%s: failed to register IRQ handler\n",
3571 priv->name);
3572 goto err_free_queues;
3573 }
3574
3575 /* Reset firmware and hardware */
3576 mwl8k_hw_reset(priv);
3577
3578 /* Ask userland hotplug daemon for the device firmware */
3579 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
3580 if (rc) {
3581 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
3582 goto err_free_irq;
3583 }
3584
3585 /* Load firmware into hardware */
3586 rc = mwl8k_load_firmware(priv);
3587 if (rc) {
3588 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
3589 goto err_stop_firmware;
3590 }
3591
3592 /* Reclaim memory once firmware is successfully loaded */
3593 mwl8k_release_firmware(priv);
3594
3595 /*
3596 * Temporarily enable interrupts. Initial firmware host
3597 * commands use interrupts and avoids polling. Disable
3598 * interrupts when done.
3599 */
c23b5a69 3600 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 3601
3602 /* Get config data, mac addrs etc */
3603 rc = mwl8k_cmd_get_hw_spec(hw);
3604 if (rc) {
3605 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
3606 goto err_stop_firmware;
3607 }
3608
3609 /* Turn radio off */
3610 rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
3611 if (rc) {
3612 printk(KERN_ERR "%s: Cannot disable\n", priv->name);
3613 goto err_stop_firmware;
3614 }
3615
3616 /* Disable interrupts */
3617 spin_lock_irq(&priv->tx_lock);
3618 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3619 spin_unlock_irq(&priv->tx_lock);
3620 free_irq(priv->pdev->irq, hw);
3621
3622 rc = ieee80211_register_hw(hw);
3623 if (rc) {
3624 printk(KERN_ERR "%s: Cannot register device\n", priv->name);
3625 goto err_stop_firmware;
3626 }
3627
3628 fw = (u8 *)&priv->fw_rev;
3629 printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
3630 MWL8K_DESC);
3631 printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
3632 priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
e91d8334
JB		 3633 printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
3634 hw->wiphy->perm_addr);
a66098da
LB		 3635
3636 return 0;
3637
3638err_stop_firmware:
3639 mwl8k_hw_reset(priv);
3640 mwl8k_release_firmware(priv);
3641
3642err_free_irq:
3643 spin_lock_irq(&priv->tx_lock);
3644 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3645 spin_unlock_irq(&priv->tx_lock);
3646 free_irq(priv->pdev->irq, hw);
3647
3648err_free_queues:
3649 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3650 mwl8k_txq_deinit(hw, i);
3651 mwl8k_rxq_deinit(hw, 0);
3652
3653err_iounmap:
3654 if (priv->cookie != NULL)
3655 pci_free_consistent(priv->pdev, 4,
3656 priv->cookie, priv->cookie_dma);
3657
3658 if (priv->regs != NULL)
3659 pci_iounmap(pdev, priv->regs);
3660
3661 if (priv->config_wq != NULL)
3662 destroy_workqueue(priv->config_wq);
3663
3664 pci_set_drvdata(pdev, NULL);
3665 ieee80211_free_hw(hw);
3666
3667err_free_reg:
3668 pci_release_regions(pdev);
3669 pci_disable_device(pdev);
3670
3671 return rc;
3672}
3673
230f7af0 3674static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 3675{
3676 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
3677}
3678
230f7af0 3679static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 3680{
3681 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
3682 struct mwl8k_priv *priv;
3683 int i;
3684
3685 if (hw == NULL)
3686 return;
3687 priv = hw->priv;
3688
3689 ieee80211_stop_queues(hw);
3690
60aa569f
LB		 3691 ieee80211_unregister_hw(hw);
3692
a66098da
LB		 3693 /* Remove tx reclaim tasklet */
3694 tasklet_kill(&priv->tx_reclaim_task);
3695
3696 /* Stop config thread */
3697 destroy_workqueue(priv->config_wq);
3698
3699 /* Stop hardware */
3700 mwl8k_hw_reset(priv);
3701
3702 /* Return all skbs to mac80211 */
3703 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3704 mwl8k_txq_reclaim(hw, i, 1);
3705
a66098da
LB		 3706 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3707 mwl8k_txq_deinit(hw, i);
3708
3709 mwl8k_rxq_deinit(hw, 0);
3710
3711 pci_free_consistent(priv->pdev, 4,
3712 priv->cookie, priv->cookie_dma);
3713
3714 pci_iounmap(pdev, priv->regs);
3715 pci_set_drvdata(pdev, NULL);
3716 ieee80211_free_hw(hw);
3717 pci_release_regions(pdev);
3718 pci_disable_device(pdev);
3719}
3720
3721static struct pci_driver mwl8k_driver = {
3722 .name = MWL8K_NAME,
3723 .id_table = mwl8k_table,
3724 .probe = mwl8k_probe,
3725 .remove = __devexit_p(mwl8k_remove),
3726 .shutdown = __devexit_p(mwl8k_shutdown),
3727};
3728
3729static int __init mwl8k_init(void)
3730{
3731 return pci_register_driver(&mwl8k_driver);
3732}
3733
3734static void __exit mwl8k_exit(void)
3735{
3736 pci_unregister_driver(&mwl8k_driver);
3737}
3738
3739module_init(mwl8k_init);
3740module_exit(mwl8k_exit);
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