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mwl8k: Do not expire eapol frames
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / mwl8k.c
CommitLineData
a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
a6b7a407 13#include <linux/interrupt.h>
a66098da
LB		 14#include <linux/module.h>
15#include <linux/kernel.h>
3d76e82c 16#include <linux/sched.h>
a66098da
LB		 17#include <linux/spinlock.h>
18#include <linux/list.h>
19#include <linux/pci.h>
20#include <linux/delay.h>
21#include <linux/completion.h>
22#include <linux/etherdevice.h>
5a0e3ad6 23#include <linux/slab.h>
a66098da
LB		 24#include <net/mac80211.h>
25#include <linux/moduleparam.h>
26#include <linux/firmware.h>
27#include <linux/workqueue.h>
28
29#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
30#define MWL8K_NAME KBUILD_MODNAME
00e8e692 31#define MWL8K_VERSION "0.13"
a66098da 32
0863ade8 33/* Module parameters */
eb939922 34static bool ap_mode_default;
0863ade8
BC		 35module_param(ap_mode_default, bool, 0);
36MODULE_PARM_DESC(ap_mode_default,
37 "Set to 1 to make ap mode the default instead of sta mode");
38
a66098da
LB		 39/* Register definitions */
40#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 41#define MWL8K_MODE_STA 0x0000005a
42#define MWL8K_MODE_AP 0x000000a5
a66098da 43#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 44#define MWL8K_FWSTA_READY 0xf0f1f2f4
45#define MWL8K_FWAP_READY 0xf1f2f4a5
46#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 47#define MWL8K_HIU_SCRATCH 0x00000c40
48
49/* Host->device communications */
50#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
51#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
52#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
53#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
54#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 55#define MWL8K_H2A_INT_DUMMY (1 << 20)
56#define MWL8K_H2A_INT_RESET (1 << 15)
57#define MWL8K_H2A_INT_DOORBELL (1 << 1)
58#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 59
60/* Device->host communications */
61#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
62#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
63#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
64#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
65#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 66#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 67#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 68#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
69#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
70#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
71#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
72#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
73#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
74#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
75#define MWL8K_A2H_INT_RX_READY (1 << 1)
76#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da 77
566875db
PN		 78/* HW micro second timer register
79 * located at offset 0xA600. This
80 * will be used to timestamp tx
81 * packets.
82 */
83
84#define MWL8K_HW_TIMER_REGISTER 0x0000a600
85
a66098da
LB		 86#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
87 MWL8K_A2H_INT_CHNL_SWITCHED | \
88 MWL8K_A2H_INT_QUEUE_EMPTY | \
89 MWL8K_A2H_INT_RADAR_DETECT | \
90 MWL8K_A2H_INT_RADIO_ON | \
91 MWL8K_A2H_INT_RADIO_OFF | \
92 MWL8K_A2H_INT_MAC_EVENT | \
93 MWL8K_A2H_INT_OPC_DONE | \
94 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 95 MWL8K_A2H_INT_TX_DONE | \
96 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 97
a66098da 98#define MWL8K_RX_QUEUES 1
e600707b 99#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 100#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 101#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
102#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 103
54bc3a0d
LB		 104struct rxd_ops {
105 int rxd_size;
106 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
107 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 108 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 109 __le16 *qos, s8 *noise);
54bc3a0d
LB		 110};
111
45a390dd 112struct mwl8k_device_info {
a74b295e
LB		 113 char *part_name;
114 char *helper_image;
0863ade8
BC		 115 char *fw_image_sta;
116 char *fw_image_ap;
89a91f4f 117 struct rxd_ops *ap_rxd_ops;
952a0e96 118 u32 fw_api_ap;
45a390dd
LB		 119};
120
a66098da 121struct mwl8k_rx_queue {
45eb400d 122 int rxd_count;
a66098da
LB		 123
124 /* hw receives here */
45eb400d 125 int head;
a66098da
LB		 126
127 /* refill descs here */
45eb400d 128 int tail;
a66098da 129
54bc3a0d 130 void *rxd;
45eb400d 131 dma_addr_t rxd_dma;
788838eb
LB		 132 struct {
133 struct sk_buff *skb;
53b1b3e1 134 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 135 } *buf;
a66098da
LB		 136};
137
a66098da
LB		 138struct mwl8k_tx_queue {
139 /* hw transmits here */
45eb400d 140 int head;
a66098da
LB		 141
142 /* sw appends here */
45eb400d 143 int tail;
a66098da 144
8ccbc3b8 145 unsigned int len;
45eb400d
LB		 146 struct mwl8k_tx_desc *txd;
147 dma_addr_t txd_dma;
148 struct sk_buff **skb;
a66098da
LB		 149};
150
ac109fd0
BC		 151enum {
152 AMPDU_NO_STREAM,
153 AMPDU_STREAM_NEW,
154 AMPDU_STREAM_IN_PROGRESS,
155 AMPDU_STREAM_ACTIVE,
156};
157
5faa1aff
NS		 158struct mwl8k_ampdu_stream {
159 struct ieee80211_sta *sta;
160 u8 tid;
161 u8 state;
162 u8 idx;
163 u8 txq_idx; /* index of this stream in priv->txq */
164};
165
a66098da 166struct mwl8k_priv {
a66098da 167 struct ieee80211_hw *hw;
a66098da 168 struct pci_dev *pdev;
bf3ca7f7 169 int irq;
a66098da 170
45a390dd
LB		 171 struct mwl8k_device_info *device_info;
172
be695fc4
LB		 173 void __iomem *sram;
174 void __iomem *regs;
175
176 /* firmware */
d1f9e41d
BC		 177 const struct firmware *fw_helper;
178 const struct firmware *fw_ucode;
a66098da 179
be695fc4
LB		 180 /* hardware/firmware parameters */
181 bool ap_fw;
182 struct rxd_ops *rxd_ops;
777ad375
LB		 183 struct ieee80211_supported_band band_24;
184 struct ieee80211_channel channels_24[14];
185 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 186 struct ieee80211_supported_band band_50;
187 struct ieee80211_channel channels_50[4];
188 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 189 u32 ap_macids_supported;
190 u32 sta_macids_supported;
be695fc4 191
8a7a578c
BC		 192 /* Ampdu stream information */
193 u8 num_ampdu_queues;
ac109fd0
BC		 194 spinlock_t stream_lock;
195 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 196 struct work_struct watchdog_ba_handle;
8a7a578c 197
618952a7
LB		 198 /* firmware access */
199 struct mutex fw_mutex;
200 struct task_struct *fw_mutex_owner;
6b6accc3 201 struct task_struct *hw_restart_owner;
618952a7 202 int fw_mutex_depth;
618952a7
LB		 203 struct completion *hostcmd_wait;
204
a66098da
LB		 205 /* lock held over TX and TX reap */
206 spinlock_t tx_lock;
a66098da 207
88de754a
LB		 208 /* TX quiesce completion, protected by fw_mutex and tx_lock */
209 struct completion *tx_wait;
210
f5bb87cf 211 /* List of interfaces. */
ee0ddf18 212 u32 macids_used;
f5bb87cf 213 struct list_head vif_list;
a66098da 214
a66098da
LB		 215 /* power management status cookie from firmware */
216 u32 *cookie;
217 dma_addr_t cookie_dma;
218
219 u16 num_mcaddrs;
a66098da 220 u8 hw_rev;
2aa7b01f 221 u32 fw_rev;
a66098da
LB		 222
223 /*
224 * Running count of TX packets in flight, to avoid
225 * iterating over the transmit rings each time.
226 */
227 int pending_tx_pkts;
228
229 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 230 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
231 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 232
c46563b7 233 bool radio_on;
68ce3884 234 bool radio_short_preamble;
a43c49a8 235 bool sniffer_enabled;
0439b1f5 236 bool wmm_enabled;
a66098da 237
a66098da
LB		 238 /* XXX need to convert this to handle multiple interfaces */
239 bool capture_beacon;
d89173f2 240 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 241 struct sk_buff *beacon_skb;
242
243 /*
244 * This FJ worker has to be global as it is scheduled from the
245 * RX handler. At this point we don't know which interface it
246 * belongs to until the list of bssids waiting to complete join
247 * is checked.
248 */
249 struct work_struct finalize_join_worker;
250
1e9f9de3
LB		 251 /* Tasklet to perform TX reclaim. */
252 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 253
254 /* Tasklet to perform RX. */
255 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 256
257 /* Most recently reported noise in dBm */
258 s8 noise;
0863ade8
BC		 259
260 /*
261 * preserve the queue configurations so they can be restored if/when
262 * the firmware image is swapped.
263 */
e600707b 264 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471 265
6b6accc3
YAP		 266 /* To perform the task of reloading the firmware */
267 struct work_struct fw_reload;
268 bool hw_restart_in_progress;
269
99020471
BC		 270 /* async firmware loading state */
271 unsigned fw_state;
272 char *fw_pref;
273 char *fw_alt;
274 struct completion firmware_loading_complete;
a66098da
LB		 275};
276
e53d9b96
NS		 277#define MAX_WEP_KEY_LEN 13
278#define NUM_WEP_KEYS 4
279
a66098da
LB		 280/* Per interface specific private data */
281struct mwl8k_vif {
f5bb87cf
LB		 282 struct list_head list;
283 struct ieee80211_vif *vif;
284
f57ca9c1
LB		 285 /* Firmware macid for this vif. */
286 int macid;
287
c2c2b12a 288 /* Non AMPDU sequence number assigned by driver. */
a680400e 289 u16 seqno;
e53d9b96
NS		 290
291 /* Saved WEP keys */
292 struct {
293 u8 enabled;
294 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
295 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 296
297 /* BSSID */
298 u8 bssid[ETH_ALEN];
299
300 /* A flag to indicate is HW crypto is enabled for this bssid */
301 bool is_hw_crypto_enabled;
a66098da 302};
a94cc97e 303#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 304#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 305
d0805c1c
BC		 306struct tx_traffic_info {
307 u32 start_time;
308 u32 pkts;
309};
310
311#define MWL8K_MAX_TID 8
a680400e
LB		 312struct mwl8k_sta {
313 /* Index into station database. Returned by UPDATE_STADB. */
314 u8 peer_id;
17033543 315 u8 is_ampdu_allowed;
d0805c1c 316 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
a680400e
LB		 317};
318#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
319
777ad375 320static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 321 { .center_freq = 2412, .hw_value = 1, },
322 { .center_freq = 2417, .hw_value = 2, },
323 { .center_freq = 2422, .hw_value = 3, },
324 { .center_freq = 2427, .hw_value = 4, },
325 { .center_freq = 2432, .hw_value = 5, },
326 { .center_freq = 2437, .hw_value = 6, },
327 { .center_freq = 2442, .hw_value = 7, },
328 { .center_freq = 2447, .hw_value = 8, },
329 { .center_freq = 2452, .hw_value = 9, },
330 { .center_freq = 2457, .hw_value = 10, },
331 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 332 { .center_freq = 2467, .hw_value = 12, },
333 { .center_freq = 2472, .hw_value = 13, },
334 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 335};
336
777ad375 337static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 338 { .bitrate = 10, .hw_value = 2, },
339 { .bitrate = 20, .hw_value = 4, },
340 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 341 { .bitrate = 110, .hw_value = 22, },
342 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 343 { .bitrate = 60, .hw_value = 12, },
344 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 345 { .bitrate = 120, .hw_value = 24, },
346 { .bitrate = 180, .hw_value = 36, },
347 { .bitrate = 240, .hw_value = 48, },
348 { .bitrate = 360, .hw_value = 72, },
349 { .bitrate = 480, .hw_value = 96, },
350 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 351 { .bitrate = 720, .hw_value = 144, },
352};
353
4eae9edd
LB		 354static const struct ieee80211_channel mwl8k_channels_50[] = {
355 { .center_freq = 5180, .hw_value = 36, },
356 { .center_freq = 5200, .hw_value = 40, },
357 { .center_freq = 5220, .hw_value = 44, },
358 { .center_freq = 5240, .hw_value = 48, },
359};
360
361static const struct ieee80211_rate mwl8k_rates_50[] = {
362 { .bitrate = 60, .hw_value = 12, },
363 { .bitrate = 90, .hw_value = 18, },
364 { .bitrate = 120, .hw_value = 24, },
365 { .bitrate = 180, .hw_value = 36, },
366 { .bitrate = 240, .hw_value = 48, },
367 { .bitrate = 360, .hw_value = 72, },
368 { .bitrate = 480, .hw_value = 96, },
369 { .bitrate = 540, .hw_value = 108, },
370 { .bitrate = 720, .hw_value = 144, },
371};
372
a66098da 373/* Set or get info from Firmware */
a66098da 374#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 375#define MWL8K_CMD_SET 0x0001
376#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 377
378/* Firmware command codes */
379#define MWL8K_CMD_CODE_DNLD 0x0001
380#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 381#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 382#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
383#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 384#define MWL8K_CMD_RADIO_CONTROL 0x001c
385#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 386#define MWL8K_CMD_TX_POWER 0x001f
08b06347 387#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 388#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 389#define MWL8K_CMD_SET_PRE_SCAN 0x0107
390#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 391#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
392#define MWL8K_CMD_SET_AID 0x010d
393#define MWL8K_CMD_SET_RATE 0x0110
394#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
395#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 396#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 397#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
398#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 399#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 400#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 401#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 402#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 403#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 404#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
197a4e4e 405#define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
aa21d0f6
LB		 406#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
407#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 408#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 409#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 410#define MWL8K_CMD_BASTREAM 0x1125
a66098da 411
b603742f 412static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 413{
b603742f
JL		 414 u16 command = le16_to_cpu(cmd);
415
a66098da
LB		 416#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
417 snprintf(buf, bufsize, "%s", #x);\
418 return buf;\
419 } while (0)
b603742f 420 switch (command & ~0x8000) {
a66098da
LB		 421 MWL8K_CMDNAME(CODE_DNLD);
422 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 423 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 424 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
425 MWL8K_CMDNAME(GET_STAT);
426 MWL8K_CMDNAME(RADIO_CONTROL);
427 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 428 MWL8K_CMDNAME(TX_POWER);
08b06347 429 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 430 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 431 MWL8K_CMDNAME(SET_PRE_SCAN);
432 MWL8K_CMDNAME(SET_POST_SCAN);
433 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 434 MWL8K_CMDNAME(SET_AID);
435 MWL8K_CMDNAME(SET_RATE);
436 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
437 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 438 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 439 MWL8K_CMDNAME(SET_EDCA_PARAMS);
440 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 441 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 442 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 443 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 444 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 445 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 446 MWL8K_CMDNAME(BSS_START);
3f5610ff 447 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 448 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 449 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 450 MWL8K_CMDNAME(BASTREAM);
3aefc37e 451 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 452 default:
453 snprintf(buf, bufsize, "0x%x", cmd);
454 }
455#undef MWL8K_CMDNAME
456
457 return buf;
458}
459
460/* Hardware and firmware reset */
461static void mwl8k_hw_reset(struct mwl8k_priv *priv)
462{
463 iowrite32(MWL8K_H2A_INT_RESET,
464 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
465 iowrite32(MWL8K_H2A_INT_RESET,
466 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
467 msleep(20);
468}
469
470/* Release fw image */
d1f9e41d 471static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 472{
473 if (*fw == NULL)
474 return;
475 release_firmware(*fw);
476 *fw = NULL;
477}
478
479static void mwl8k_release_firmware(struct mwl8k_priv *priv)
480{
22be40d9
LB		 481 mwl8k_release_fw(&priv->fw_ucode);
482 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 483}
484
99020471
BC		 485/* states for asynchronous f/w loading */
486static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
487enum {
488 FW_STATE_INIT = 0,
489 FW_STATE_LOADING_PREF,
490 FW_STATE_LOADING_ALT,
491 FW_STATE_ERROR,
492};
493
a66098da
LB		 494/* Request fw image */
495static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 496 const char *fname, const struct firmware **fw,
99020471 497 bool nowait)
a66098da
LB		 498{
499 /* release current image */
500 if (*fw != NULL)
501 mwl8k_release_fw(fw);
502
99020471
BC		 503 if (nowait)
504 return request_firmware_nowait(THIS_MODULE, 1, fname,
505 &priv->pdev->dev, GFP_KERNEL,
506 priv, mwl8k_fw_state_machine);
507 else
d1f9e41d 508 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 509}
510
99020471
BC		 511static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
512 bool nowait)
a66098da 513{
a74b295e 514 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 515 int rc;
516
a74b295e 517 if (di->helper_image != NULL) {
99020471
BC		 518 if (nowait)
519 rc = mwl8k_request_fw(priv, di->helper_image,
520 &priv->fw_helper, true);
521 else
522 rc = mwl8k_request_fw(priv, di->helper_image,
523 &priv->fw_helper, false);
524 if (rc)
525 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
526 pci_name(priv->pdev), di->helper_image);
527
528 if (rc || nowait)
a74b295e 529 return rc;
a66098da
LB		 530 }
531
99020471
BC		 532 if (nowait) {
533 /*
534 * if we get here, no helper image is needed. Skip the
535 * FW_STATE_INIT state.
536 */
537 priv->fw_state = FW_STATE_LOADING_PREF;
538 rc = mwl8k_request_fw(priv, fw_image,
539 &priv->fw_ucode,
540 true);
541 } else
542 rc = mwl8k_request_fw(priv, fw_image,
543 &priv->fw_ucode, false);
a66098da 544 if (rc) {
c2c357ce 545 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 546 pci_name(priv->pdev), fw_image);
22be40d9 547 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 548 return rc;
549 }
550
551 return 0;
552}
553
554struct mwl8k_cmd_pkt {
555 __le16 code;
556 __le16 length;
f57ca9c1
LB		 557 __u8 seq_num;
558 __u8 macid;
a66098da
LB		 559 __le16 result;
560 char payload[0];
ba2d3587 561} __packed;
a66098da
LB		 562
563/*
564 * Firmware loading.
565 */
566static int
567mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
568{
569 void __iomem *regs = priv->regs;
570 dma_addr_t dma_addr;
a66098da
LB		 571 int loops;
572
573 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
574 if (pci_dma_mapping_error(priv->pdev, dma_addr))
575 return -ENOMEM;
576
577 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
578 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
579 iowrite32(MWL8K_H2A_INT_DOORBELL,
580 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
581 iowrite32(MWL8K_H2A_INT_DUMMY,
582 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
583
a66098da
LB		 584 loops = 1000;
585 do {
586 u32 int_code;
587
588 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
589 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
590 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 591 break;
592 }
593
3d76e82c 594 cond_resched();
a66098da
LB		 595 udelay(1);
596 } while (--loops);
597
598 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
599
d4b70570 600 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 601}
602
603static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
604 const u8 *data, size_t length)
605{
606 struct mwl8k_cmd_pkt *cmd;
607 int done;
608 int rc = 0;
609
610 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
611 if (cmd == NULL)
612 return -ENOMEM;
613
614 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
615 cmd->seq_num = 0;
f57ca9c1 616 cmd->macid = 0;
a66098da
LB		 617 cmd->result = 0;
618
619 done = 0;
620 while (length) {
621 int block_size = length > 256 ? 256 : length;
622
623 memcpy(cmd->payload, data + done, block_size);
624 cmd->length = cpu_to_le16(block_size);
625
626 rc = mwl8k_send_fw_load_cmd(priv, cmd,
627 sizeof(*cmd) + block_size);
628 if (rc)
629 break;
630
631 done += block_size;
632 length -= block_size;
633 }
634
635 if (!rc) {
636 cmd->length = 0;
637 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
638 }
639
640 kfree(cmd);
641
642 return rc;
643}
644
645static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
646 const u8 *data, size_t length)
647{
648 unsigned char *buffer;
649 int may_continue, rc = 0;
650 u32 done, prev_block_size;
651
652 buffer = kmalloc(1024, GFP_KERNEL);
653 if (buffer == NULL)
654 return -ENOMEM;
655
656 done = 0;
657 prev_block_size = 0;
658 may_continue = 1000;
659 while (may_continue > 0) {
660 u32 block_size;
661
662 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
663 if (block_size & 1) {
664 block_size &= ~1;
665 may_continue--;
666 } else {
667 done += prev_block_size;
668 length -= prev_block_size;
669 }
670
671 if (block_size > 1024 || block_size > length) {
672 rc = -EOVERFLOW;
673 break;
674 }
675
676 if (length == 0) {
677 rc = 0;
678 break;
679 }
680
681 if (block_size == 0) {
682 rc = -EPROTO;
683 may_continue--;
684 udelay(1);
685 continue;
686 }
687
688 prev_block_size = block_size;
689 memcpy(buffer, data + done, block_size);
690
691 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
692 if (rc)
693 break;
694 }
695
696 if (!rc && length != 0)
697 rc = -EREMOTEIO;
698
699 kfree(buffer);
700
701 return rc;
702}
703
c2c357ce 704static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 705{
c2c357ce 706 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 707 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 708 int rc;
709 int loops;
710
711 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 712 const struct firmware *helper = priv->fw_helper;
a66098da 713
c2c357ce
LB		 714 if (helper == NULL) {
715 printk(KERN_ERR "%s: helper image needed but none "
716 "given\n", pci_name(priv->pdev));
717 return -EINVAL;
718 }
a66098da 719
c2c357ce 720 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 721 if (rc) {
722 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 723 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 724 return rc;
725 }
ba30c4a5 726 msleep(20);
a66098da 727
c2c357ce 728 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 729 } else {
c2c357ce 730 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 731 }
732
733 if (rc) {
c2c357ce
LB		 734 printk(KERN_ERR "%s: unable to load firmware image\n",
735 pci_name(priv->pdev));
a66098da
LB		 736 return rc;
737 }
738
89a91f4f 739 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 740
89b872e2 741 loops = 500000;
a66098da 742 do {
eae74e65
LB		 743 u32 ready_code;
744
745 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
746 if (ready_code == MWL8K_FWAP_READY) {
3db1cd5c 747 priv->ap_fw = true;
eae74e65
LB		 748 break;
749 } else if (ready_code == MWL8K_FWSTA_READY) {
3db1cd5c 750 priv->ap_fw = false;
a66098da 751 break;
eae74e65
LB		 752 }
753
754 cond_resched();
a66098da
LB		 755 udelay(1);
756 } while (--loops);
757
758 return loops ? 0 : -ETIMEDOUT;
759}
760
761
a66098da
LB		 762/* DMA header used by firmware and hardware. */
763struct mwl8k_dma_data {
764 __le16 fwlen;
765 struct ieee80211_hdr wh;
20f09c3d 766 char data[0];
ba2d3587 767} __packed;
a66098da
LB		 768
769/* Routines to add/remove DMA header from skb. */
20f09c3d 770static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 771{
20f09c3d
LB		 772 struct mwl8k_dma_data *tr;
773 int hdrlen;
774
775 tr = (struct mwl8k_dma_data *)skb->data;
776 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
777
778 if (hdrlen != sizeof(tr->wh)) {
779 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
780 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
781 *((__le16 *)(tr->data - 2)) = qos;
782 } else {
783 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
784 }
a66098da 785 }
20f09c3d
LB		 786
787 if (hdrlen != sizeof(*tr))
788 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 789}
790
ff776cec
YAP		 791#define REDUCED_TX_HEADROOM 8
792
252486a1 793static void
e4eefec7
YAP		 794mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
795 int head_pad, int tail_pad)
a66098da
LB		 796{
797 struct ieee80211_hdr *wh;
ca009301 798 int hdrlen;
252486a1 799 int reqd_hdrlen;
a66098da
LB		 800 struct mwl8k_dma_data *tr;
801
ca009301
LB		 802 /*
803 * Add a firmware DMA header; the firmware requires that we
804 * present a 2-byte payload length followed by a 4-address
805 * header (without QoS field), followed (optionally) by any
806 * WEP/ExtIV header (but only filled in for CCMP).
807 */
a66098da 808 wh = (struct ieee80211_hdr *)skb->data;
ca009301 809
a66098da 810 hdrlen = ieee80211_hdrlen(wh->frame_control);
ff776cec
YAP		 811
812 /*
813 * Check if skb_resize is required because of
814 * tx_headroom adjustment.
815 */
816 if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
817 + REDUCED_TX_HEADROOM))) {
818 if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
819
820 wiphy_err(priv->hw->wiphy,
821 "Failed to reallocate TX buffer\n");
822 return;
823 }
824 skb->truesize += REDUCED_TX_HEADROOM;
825 }
826
e4eefec7 827 reqd_hdrlen = sizeof(*tr) + head_pad;
252486a1
NS		 828
829 if (hdrlen != reqd_hdrlen)
830 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 831
ca009301 832 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 833 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 834
835 tr = (struct mwl8k_dma_data *)skb->data;
836 if (wh != &tr->wh)
837 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 838 if (hdrlen != sizeof(tr->wh))
839 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 840
841 /*
842 * Firmware length is the length of the fully formed "802.11
843 * payload". That is, everything except for the 802.11 header.
844 * This includes all crypto material including the MIC.
845 */
252486a1 846 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 847}
848
ff776cec
YAP		 849static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
850 struct sk_buff *skb)
e53d9b96
NS		 851{
852 struct ieee80211_hdr *wh;
853 struct ieee80211_tx_info *tx_info;
854 struct ieee80211_key_conf *key_conf;
855 int data_pad;
e4eefec7 856 int head_pad = 0;
e53d9b96
NS		 857
858 wh = (struct ieee80211_hdr *)skb->data;
859
860 tx_info = IEEE80211_SKB_CB(skb);
861
862 key_conf = NULL;
863 if (ieee80211_is_data(wh->frame_control))
864 key_conf = tx_info->control.hw_key;
865
866 /*
867 * Make sure the packet header is in the DMA header format (4-address
e4eefec7 868 * without QoS), and add head & tail padding when HW crypto is enabled.
e53d9b96
NS		 869 *
870 * We have the following trailer padding requirements:
871 * - WEP: 4 trailer bytes (ICV)
872 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
873 * - CCMP: 8 trailer bytes (MIC)
874 */
875 data_pad = 0;
876 if (key_conf != NULL) {
e4eefec7 877 head_pad = key_conf->iv_len;
e53d9b96
NS		 878 switch (key_conf->cipher) {
879 case WLAN_CIPHER_SUITE_WEP40:
880 case WLAN_CIPHER_SUITE_WEP104:
881 data_pad = 4;
882 break;
883 case WLAN_CIPHER_SUITE_TKIP:
884 data_pad = 12;
885 break;
886 case WLAN_CIPHER_SUITE_CCMP:
887 data_pad = 8;
888 break;
889 }
890 }
e4eefec7 891 mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
e53d9b96 892}
a66098da
LB		 893
894/*
89a91f4f 895 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 896 */
89a91f4f 897struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 898 __le16 pkt_len;
899 __u8 sq2;
900 __u8 rate;
901 __le32 pkt_phys_addr;
902 __le32 next_rxd_phys_addr;
903 __le16 qos_control;
904 __le16 htsig2;
905 __le32 hw_rssi_info;
906 __le32 hw_noise_floor_info;
907 __u8 noise_floor;
908 __u8 pad0[3];
909 __u8 rssi;
910 __u8 rx_status;
911 __u8 channel;
912 __u8 rx_ctrl;
ba2d3587 913} __packed;
6f6d1e9a 914
89a91f4f
LB		 915#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
916#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
917#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 918
89a91f4f 919#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 920
d9a07d49
NS		 921/* 8366 AP rx_status bits */
922#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
923#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
924#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
925#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
926#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
927
89a91f4f 928static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 929{
89a91f4f 930 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 931
932 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 933 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 934}
935
89a91f4f 936static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 937{
89a91f4f 938 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 939
940 rxd->pkt_len = cpu_to_le16(len);
941 rxd->pkt_phys_addr = cpu_to_le32(addr);
942 wmb();
943 rxd->rx_ctrl = 0;
944}
945
946static int
89a91f4f 947mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 948 __le16 *qos, s8 *noise)
6f6d1e9a 949{
89a91f4f 950 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 951
89a91f4f 952 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 953 return -1;
954 rmb();
955
956 memset(status, 0, sizeof(*status));
957
958 status->signal = -rxd->rssi;
0d462bbb 959 *noise = -rxd->noise_floor;
6f6d1e9a 960
89a91f4f 961 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 962 status->flag |= RX_FLAG_HT;
89a91f4f 963 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 964 status->flag |= RX_FLAG_40MHZ;
89a91f4f 965 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 966 } else {
967 int i;
968
777ad375
LB		 969 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
970 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 971 status->rate_idx = i;
972 break;
973 }
974 }
975 }
976
85478344
LB		 977 if (rxd->channel > 14) {
978 status->band = IEEE80211_BAND_5GHZ;
979 if (!(status->flag & RX_FLAG_HT))
980 status->rate_idx -= 5;
981 } else {
982 status->band = IEEE80211_BAND_2GHZ;
983 }
59eb21a6
BR		 984 status->freq = ieee80211_channel_to_frequency(rxd->channel,
985 status->band);
6f6d1e9a 986
20f09c3d
LB		 987 *qos = rxd->qos_control;
988
d9a07d49
NS		 989 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
990 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
991 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
992 status->flag |= RX_FLAG_MMIC_ERROR;
993
6f6d1e9a
LB		 994 return le16_to_cpu(rxd->pkt_len);
995}
996
89a91f4f
LB		 997static struct rxd_ops rxd_8366_ap_ops = {
998 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
999 .rxd_init = mwl8k_rxd_8366_ap_init,
1000 .rxd_refill = mwl8k_rxd_8366_ap_refill,
1001 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 1002};
1003
1004/*
89a91f4f 1005 * Packet reception for STA firmware.
a66098da 1006 */
89a91f4f 1007struct mwl8k_rxd_sta {
a66098da
LB		 1008 __le16 pkt_len;
1009 __u8 link_quality;
1010 __u8 noise_level;
1011 __le32 pkt_phys_addr;
45eb400d 1012 __le32 next_rxd_phys_addr;
a66098da
LB		 1013 __le16 qos_control;
1014 __le16 rate_info;
1015 __le32 pad0[4];
1016 __u8 rssi;
1017 __u8 channel;
1018 __le16 pad1;
1019 __u8 rx_ctrl;
1020 __u8 rx_status;
1021 __u8 pad2[2];
ba2d3587 1022} __packed;
a66098da 1023
89a91f4f
LB		 1024#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
1025#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
1026#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
1027#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
1028#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
1029#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 1030
89a91f4f 1031#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 1032#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
1033/* ICV=0 or MIC=1 */
1034#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1035/* Key is uploaded only in failure case */
1036#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 1037
89a91f4f 1038static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 1039{
89a91f4f 1040 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1041
1042 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1043 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1044}
1045
89a91f4f 1046static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1047{
89a91f4f 1048 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1049
1050 rxd->pkt_len = cpu_to_le16(len);
1051 rxd->pkt_phys_addr = cpu_to_le32(addr);
1052 wmb();
1053 rxd->rx_ctrl = 0;
1054}
1055
1056static int
89a91f4f 1057mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1058 __le16 *qos, s8 *noise)
54bc3a0d 1059{
89a91f4f 1060 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1061 u16 rate_info;
1062
89a91f4f 1063 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1064 return -1;
1065 rmb();
1066
1067 rate_info = le16_to_cpu(rxd->rate_info);
1068
1069 memset(status, 0, sizeof(*status));
1070
1071 status->signal = -rxd->rssi;
0d462bbb 1072 *noise = -rxd->noise_level;
89a91f4f
LB		 1073 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1074 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1075
89a91f4f 1076 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1077 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1078 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1079 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1080 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1081 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1082 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1083 status->flag |= RX_FLAG_HT;
1084
85478344
LB		 1085 if (rxd->channel > 14) {
1086 status->band = IEEE80211_BAND_5GHZ;
1087 if (!(status->flag & RX_FLAG_HT))
1088 status->rate_idx -= 5;
1089 } else {
1090 status->band = IEEE80211_BAND_2GHZ;
1091 }
59eb21a6
BR		 1092 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1093 status->band);
54bc3a0d 1094
20f09c3d 1095 *qos = rxd->qos_control;
d9a07d49
NS		 1096 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1097 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1098 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1099
54bc3a0d
LB		 1100 return le16_to_cpu(rxd->pkt_len);
1101}
1102
89a91f4f
LB		 1103static struct rxd_ops rxd_sta_ops = {
1104 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1105 .rxd_init = mwl8k_rxd_sta_init,
1106 .rxd_refill = mwl8k_rxd_sta_refill,
1107 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1108};
1109
1110
a66098da
LB		 1111#define MWL8K_RX_DESCS 256
1112#define MWL8K_RX_MAXSZ 3800
1113
1114static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1115{
1116 struct mwl8k_priv *priv = hw->priv;
1117 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1118 int size;
1119 int i;
1120
45eb400d
LB		 1121 rxq->rxd_count = 0;
1122 rxq->head = 0;
1123 rxq->tail = 0;
a66098da 1124
54bc3a0d 1125 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1126
45eb400d
LB		 1127 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1128 if (rxq->rxd == NULL) {
5db55844 1129 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1130 return -ENOMEM;
1131 }
45eb400d 1132 memset(rxq->rxd, 0, size);
a66098da 1133
b9ede5f1 1134 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1135 if (rxq->buf == NULL) {
5db55844 1136 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1137 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1138 return -ENOMEM;
1139 }
a66098da
LB		 1140
1141 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1142 int desc_size;
1143 void *rxd;
a66098da 1144 int nexti;
54bc3a0d
LB		 1145 dma_addr_t next_dma_addr;
1146
1147 desc_size = priv->rxd_ops->rxd_size;
1148 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1149
54bc3a0d
LB		 1150 nexti = i + 1;
1151 if (nexti == MWL8K_RX_DESCS)
1152 nexti = 0;
1153 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1154
54bc3a0d 1155 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1156 }
1157
1158 return 0;
1159}
1160
1161static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1162{
1163 struct mwl8k_priv *priv = hw->priv;
1164 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1165 int refilled;
1166
1167 refilled = 0;
45eb400d 1168 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1169 struct sk_buff *skb;
788838eb 1170 dma_addr_t addr;
a66098da 1171 int rx;
54bc3a0d 1172 void *rxd;
a66098da
LB		 1173
1174 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1175 if (skb == NULL)
1176 break;
1177
788838eb
LB		 1178 addr = pci_map_single(priv->pdev, skb->data,
1179 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1180
54bc3a0d
LB		 1181 rxq->rxd_count++;
1182 rx = rxq->tail++;
1183 if (rxq->tail == MWL8K_RX_DESCS)
1184 rxq->tail = 0;
788838eb 1185 rxq->buf[rx].skb = skb;
53b1b3e1 1186 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1187
1188 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1189 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1190
1191 refilled++;
1192 }
1193
1194 return refilled;
1195}
1196
1197/* Must be called only when the card's reception is completely halted */
1198static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1199{
1200 struct mwl8k_priv *priv = hw->priv;
1201 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1202 int i;
1203
73b46320
BC		 1204 if (rxq->rxd == NULL)
1205 return;
1206
a66098da 1207 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1208 if (rxq->buf[i].skb != NULL) {
1209 pci_unmap_single(priv->pdev,
53b1b3e1 1210 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1211 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1212 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1213
1214 kfree_skb(rxq->buf[i].skb);
1215 rxq->buf[i].skb = NULL;
a66098da
LB		 1216 }
1217 }
1218
788838eb
LB		 1219 kfree(rxq->buf);
1220 rxq->buf = NULL;
a66098da
LB		 1221
1222 pci_free_consistent(priv->pdev,
54bc3a0d 1223 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1224 rxq->rxd, rxq->rxd_dma);
1225 rxq->rxd = NULL;
a66098da
LB		 1226}
1227
1228
1229/*
1230 * Scan a list of BSSIDs to process for finalize join.
1231 * Allows for extension to process multiple BSSIDs.
1232 */
1233static inline int
1234mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1235{
1236 return priv->capture_beacon &&
1237 ieee80211_is_beacon(wh->frame_control) &&
2e42e474 1238 ether_addr_equal(wh->addr3, priv->capture_bssid);
a66098da
LB		 1239}
1240
3779752d
LB		 1241static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1242 struct sk_buff *skb)
a66098da 1243{
3779752d
LB		 1244 struct mwl8k_priv *priv = hw->priv;
1245
a66098da 1246 priv->capture_beacon = false;
d89173f2 1247 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1248
1249 /*
1250 * Use GFP_ATOMIC as rxq_process is called from
1251 * the primary interrupt handler, memory allocation call
1252 * must not sleep.
1253 */
1254 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1255 if (priv->beacon_skb != NULL)
3779752d 1256 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1257}
1258
d9a07d49
NS		 1259static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1260 u8 *bssid)
1261{
1262 struct mwl8k_vif *mwl8k_vif;
1263
1264 list_for_each_entry(mwl8k_vif,
1265 vif_list, list) {
1266 if (memcmp(bssid, mwl8k_vif->bssid,
1267 ETH_ALEN) == 0)
1268 return mwl8k_vif;
1269 }
1270
1271 return NULL;
1272}
1273
a66098da
LB		 1274static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1275{
1276 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1277 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1278 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1279 int processed;
1280
1281 processed = 0;
45eb400d 1282 while (rxq->rxd_count && limit--) {
a66098da 1283 struct sk_buff *skb;
54bc3a0d
LB		 1284 void *rxd;
1285 int pkt_len;
a66098da 1286 struct ieee80211_rx_status status;
d9a07d49 1287 struct ieee80211_hdr *wh;
20f09c3d 1288 __le16 qos;
a66098da 1289
788838eb 1290 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1291 if (skb == NULL)
1292 break;
54bc3a0d
LB		 1293
1294 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1295
0d462bbb
JL		 1296 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1297 &priv->noise);
54bc3a0d
LB		 1298 if (pkt_len < 0)
1299 break;
1300
788838eb
LB		 1301 rxq->buf[rxq->head].skb = NULL;
1302
1303 pci_unmap_single(priv->pdev,
53b1b3e1 1304 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1305 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1306 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1307
54bc3a0d
LB		 1308 rxq->head++;
1309 if (rxq->head == MWL8K_RX_DESCS)
1310 rxq->head = 0;
1311
45eb400d 1312 rxq->rxd_count--;
a66098da 1313
d9a07d49 1314 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1315
a66098da 1316 /*
c2c357ce
LB		 1317 * Check for a pending join operation. Save a
1318 * copy of the beacon and schedule a tasklet to
1319 * send a FINALIZE_JOIN command to the firmware.
a66098da 1320 */
54bc3a0d 1321 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1322 mwl8k_save_beacon(hw, skb);
a66098da 1323
d9a07d49
NS		 1324 if (ieee80211_has_protected(wh->frame_control)) {
1325
1326 /* Check if hw crypto has been enabled for
1327 * this bss. If yes, set the status flags
1328 * accordingly
1329 */
1330 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1331 wh->addr1);
1332
1333 if (mwl8k_vif != NULL &&
23677ce3 1334 mwl8k_vif->is_hw_crypto_enabled) {
d9a07d49
NS		 1335 /*
1336 * When MMIC ERROR is encountered
1337 * by the firmware, payload is
1338 * dropped and only 32 bytes of
1339 * mwl8k Firmware header is sent
1340 * to the host.
1341 *
1342 * We need to add four bytes of
1343 * key information. In it
1344 * MAC80211 expects keyidx set to
1345 * 0 for triggering Counter
1346 * Measure of MMIC failure.
1347 */
1348 if (status.flag & RX_FLAG_MMIC_ERROR) {
1349 struct mwl8k_dma_data *tr;
1350 tr = (struct mwl8k_dma_data *)skb->data;
1351 memset((void *)&(tr->data), 0, 4);
1352 pkt_len += 4;
1353 }
1354
1355 if (!ieee80211_is_auth(wh->frame_control))
1356 status.flag |= RX_FLAG_IV_STRIPPED |
1357 RX_FLAG_DECRYPTED |
1358 RX_FLAG_MMIC_STRIPPED;
1359 }
1360 }
1361
1362 skb_put(skb, pkt_len);
1363 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1364 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1365 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1366
1367 processed++;
1368 }
1369
1370 return processed;
1371}
1372
1373
1374/*
1375 * Packet transmission.
1376 */
1377
a66098da
LB		 1378#define MWL8K_TXD_STATUS_OK 0x00000001
1379#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1380#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1381#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1382#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1383
e0493a8d
LB		 1384#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1385#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1386#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1387#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1388#define MWL8K_QOS_EOSP 0x0010
1389
a66098da
LB		 1390struct mwl8k_tx_desc {
1391 __le32 status;
1392 __u8 data_rate;
1393 __u8 tx_priority;
1394 __le16 qos_control;
1395 __le32 pkt_phys_addr;
1396 __le16 pkt_len;
d89173f2 1397 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1398 __le32 next_txd_phys_addr;
8a7a578c 1399 __le32 timestamp;
a66098da
LB		 1400 __le16 rate_info;
1401 __u8 peer_id;
a1fe24b0 1402 __u8 tx_frag_cnt;
ba2d3587 1403} __packed;
a66098da
LB		 1404
1405#define MWL8K_TX_DESCS 128
1406
1407static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1408{
1409 struct mwl8k_priv *priv = hw->priv;
1410 struct mwl8k_tx_queue *txq = priv->txq + index;
1411 int size;
1412 int i;
1413
8ccbc3b8 1414 txq->len = 0;
45eb400d
LB		 1415 txq->head = 0;
1416 txq->tail = 0;
a66098da
LB		 1417
1418 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1419
45eb400d
LB		 1420 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1421 if (txq->txd == NULL) {
5db55844 1422 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1423 return -ENOMEM;
1424 }
45eb400d 1425 memset(txq->txd, 0, size);
a66098da 1426
b9ede5f1 1427 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1428 if (txq->skb == NULL) {
5db55844 1429 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1430 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1431 return -ENOMEM;
1432 }
a66098da
LB		 1433
1434 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1435 struct mwl8k_tx_desc *tx_desc;
1436 int nexti;
1437
45eb400d 1438 tx_desc = txq->txd + i;
a66098da
LB		 1439 nexti = (i + 1) % MWL8K_TX_DESCS;
1440
1441 tx_desc->status = 0;
45eb400d
LB		 1442 tx_desc->next_txd_phys_addr =
1443 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1444 }
1445
1446 return 0;
1447}
1448
1449static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1450{
1451 iowrite32(MWL8K_H2A_INT_PPA_READY,
1452 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1453 iowrite32(MWL8K_H2A_INT_DUMMY,
1454 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1455 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1456}
1457
7e1112d3 1458static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1459{
7e1112d3
LB		 1460 struct mwl8k_priv *priv = hw->priv;
1461 int i;
1462
e600707b 1463 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1464 struct mwl8k_tx_queue *txq = priv->txq + i;
1465 int fw_owned = 0;
1466 int drv_owned = 0;
1467 int unused = 0;
1468 int desc;
1469
a66098da 1470 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1471 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1472 u32 status;
a66098da 1473
7e1112d3 1474 status = le32_to_cpu(tx_desc->status);
a66098da 1475 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1476 fw_owned++;
a66098da 1477 else
7e1112d3 1478 drv_owned++;
a66098da
LB		 1479
1480 if (tx_desc->pkt_len == 0)
7e1112d3 1481 unused++;
a66098da 1482 }
a66098da 1483
c96c31e4
JP		 1484 wiphy_err(hw->wiphy,
1485 "txq[%d] len=%d head=%d tail=%d "
1486 "fw_owned=%d drv_owned=%d unused=%d\n",
1487 i,
1488 txq->len, txq->head, txq->tail,
1489 fw_owned, drv_owned, unused);
7e1112d3 1490 }
a66098da
LB		 1491}
1492
618952a7 1493/*
88de754a 1494 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1495 */
62abd3cf 1496#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1497
950d5b01 1498static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1499{
a66098da 1500 struct mwl8k_priv *priv = hw->priv;
88de754a 1501 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1502 int retry;
1503 int rc;
a66098da
LB		 1504
1505 might_sleep();
1506
6b6accc3
YAP		 1507 /* Since fw restart is in progress, allow only the firmware
1508 * commands from the restart code and block the other
1509 * commands since they are going to fail in any case since
1510 * the firmware has crashed
1511 */
1512 if (priv->hw_restart_in_progress) {
1513 if (priv->hw_restart_owner == current)
1514 return 0;
1515 else
1516 return -EBUSY;
1517 }
1518
7e1112d3
LB		 1519 /*
1520 * The TX queues are stopped at this point, so this test
1521 * doesn't need to take ->tx_lock.
1522 */
1523 if (!priv->pending_tx_pkts)
1524 return 0;
1525
1526 retry = 0;
1527 rc = 0;
1528
a66098da 1529 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1530 priv->tx_wait = &tx_wait;
1531 while (!rc) {
1532 int oldcount;
1533 unsigned long timeout;
a66098da 1534
7e1112d3 1535 oldcount = priv->pending_tx_pkts;
a66098da 1536
7e1112d3 1537 spin_unlock_bh(&priv->tx_lock);
88de754a 1538 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1539 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1540 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1541
1542 if (timeout) {
1543 WARN_ON(priv->pending_tx_pkts);
ba30c4a5 1544 if (retry)
c96c31e4 1545 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1546 break;
1547 }
1548
1549 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1550 wiphy_notice(hw->wiphy,
1551 "waiting for tx rings to drain (%d -> %d pkts)\n",
1552 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1553 retry = 1;
1554 continue;
1555 }
1556
a66098da 1557 priv->tx_wait = NULL;
a66098da 1558
c96c31e4
JP		 1559 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1560 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3 1561 mwl8k_dump_tx_rings(hw);
6b6accc3
YAP		 1562 priv->hw_restart_in_progress = true;
1563 ieee80211_queue_work(hw, &priv->fw_reload);
7e1112d3
LB		 1564
1565 rc = -ETIMEDOUT;
a66098da 1566 }
7e1112d3 1567 spin_unlock_bh(&priv->tx_lock);
a66098da 1568
7e1112d3 1569 return rc;
a66098da
LB		 1570}
1571
c23b5a69
LB		 1572#define MWL8K_TXD_SUCCESS(status) \
1573 ((status) & (MWL8K_TXD_STATUS_OK | \
1574 MWL8K_TXD_STATUS_OK_RETRY | \
1575 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1576
a0e7c6cf
NS		 1577static int mwl8k_tid_queue_mapping(u8 tid)
1578{
1579 BUG_ON(tid > 7);
1580
1581 switch (tid) {
1582 case 0:
1583 case 3:
1584 return IEEE80211_AC_BE;
1585 break;
1586 case 1:
1587 case 2:
1588 return IEEE80211_AC_BK;
1589 break;
1590 case 4:
1591 case 5:
1592 return IEEE80211_AC_VI;
1593 break;
1594 case 6:
1595 case 7:
1596 return IEEE80211_AC_VO;
1597 break;
1598 default:
1599 return -1;
1600 break;
1601 }
1602}
1603
17033543
NS		 1604/* The firmware will fill in the rate information
1605 * for each packet that gets queued in the hardware
49adc5ce 1606 * and these macros will interpret that info.
17033543
NS		 1607 */
1608
49adc5ce
JL		 1609#define RI_FORMAT(a) (a & 0x0001)
1610#define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
17033543 1611
efb7c49a
LB		 1612static int
1613mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1614{
1615 struct mwl8k_priv *priv = hw->priv;
1616 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1617 int processed;
a66098da 1618
efb7c49a 1619 processed = 0;
8ccbc3b8 1620 while (txq->len > 0 && limit--) {
a66098da 1621 int tx;
a66098da
LB		 1622 struct mwl8k_tx_desc *tx_desc;
1623 unsigned long addr;
ce9e2e1b 1624 int size;
a66098da
LB		 1625 struct sk_buff *skb;
1626 struct ieee80211_tx_info *info;
1627 u32 status;
17033543
NS		 1628 struct ieee80211_sta *sta;
1629 struct mwl8k_sta *sta_info = NULL;
1630 u16 rate_info;
17033543 1631 struct ieee80211_hdr *wh;
a66098da 1632
45eb400d
LB		 1633 tx = txq->head;
1634 tx_desc = txq->txd + tx;
a66098da
LB		 1635
1636 status = le32_to_cpu(tx_desc->status);
1637
1638 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1639 if (!force)
1640 break;
1641 tx_desc->status &=
1642 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1643 }
1644
45eb400d 1645 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1646 BUG_ON(txq->len == 0);
1647 txq->len--;
a66098da
LB		 1648 priv->pending_tx_pkts--;
1649
1650 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1651 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1652 skb = txq->skb[tx];
1653 txq->skb[tx] = NULL;
a66098da
LB		 1654
1655 BUG_ON(skb == NULL);
1656 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1657
20f09c3d 1658 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1659
17033543
NS		 1660 wh = (struct ieee80211_hdr *) skb->data;
1661
a66098da
LB		 1662 /* Mark descriptor as unused */
1663 tx_desc->pkt_phys_addr = 0;
1664 tx_desc->pkt_len = 0;
1665
a66098da 1666 info = IEEE80211_SKB_CB(skb);
17033543 1667 if (ieee80211_is_data(wh->frame_control)) {
89e11801
TH		 1668 rcu_read_lock();
1669 sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
1670 wh->addr2);
17033543
NS		 1671 if (sta) {
1672 sta_info = MWL8K_STA(sta);
1673 BUG_ON(sta_info == NULL);
1674 rate_info = le16_to_cpu(tx_desc->rate_info);
17033543
NS		 1675 /* If rate is < 6.5 Mpbs for an ht station
1676 * do not form an ampdu. If the station is a
1677 * legacy station (format = 0), do not form an
1678 * ampdu
1679 */
49adc5ce
JL		 1680 if (RI_RATE_ID_MCS(rate_info) < 1 ||
1681 RI_FORMAT(rate_info) == 0) {
17033543
NS		 1682 sta_info->is_ampdu_allowed = false;
1683 } else {
1684 sta_info->is_ampdu_allowed = true;
1685 }
1686 }
89e11801 1687 rcu_read_unlock();
17033543
NS		 1688 }
1689
a66098da 1690 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1691
1692 /* Rate control is happening in the firmware.
1693 * Ensure no tx rate is being reported.
1694 */
ba30c4a5
YAP		 1695 info->status.rates[0].idx = -1;
1696 info->status.rates[0].count = 1;
0bf22c37 1697
ce9e2e1b 1698 if (MWL8K_TXD_SUCCESS(status))
a66098da 1699 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1700
1701 ieee80211_tx_status_irqsafe(hw, skb);
1702
efb7c49a 1703 processed++;
a66098da
LB		 1704 }
1705
efb7c49a 1706 return processed;
a66098da
LB		 1707}
1708
1709/* must be called only when the card's transmit is completely halted */
1710static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1711{
1712 struct mwl8k_priv *priv = hw->priv;
1713 struct mwl8k_tx_queue *txq = priv->txq + index;
1714
73b46320
BC		 1715 if (txq->txd == NULL)
1716 return;
1717
efb7c49a 1718 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1719
45eb400d
LB		 1720 kfree(txq->skb);
1721 txq->skb = NULL;
a66098da
LB		 1722
1723 pci_free_consistent(priv->pdev,
1724 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1725 txq->txd, txq->txd_dma);
1726 txq->txd = NULL;
a66098da
LB		 1727}
1728
ac109fd0 1729/* caller must hold priv->stream_lock when calling the stream functions */
ba30c4a5 1730static struct mwl8k_ampdu_stream *
ac109fd0
BC		 1731mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1732{
1733 struct mwl8k_ampdu_stream *stream;
1734 struct mwl8k_priv *priv = hw->priv;
1735 int i;
1736
1737 for (i = 0; i < priv->num_ampdu_queues; i++) {
1738 stream = &priv->ampdu[i];
1739 if (stream->state == AMPDU_NO_STREAM) {
1740 stream->sta = sta;
1741 stream->state = AMPDU_STREAM_NEW;
1742 stream->tid = tid;
1743 stream->idx = i;
1744 stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
1745 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1746 sta->addr, tid);
1747 return stream;
1748 }
1749 }
1750 return NULL;
1751}
1752
1753static int
1754mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1755{
1756 int ret;
1757
1758 /* if the stream has already been started, don't start it again */
1759 if (stream->state != AMPDU_STREAM_NEW)
1760 return 0;
1761 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1762 if (ret)
1763 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1764 "%d\n", stream->sta->addr, stream->tid, ret);
1765 else
1766 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1767 stream->sta->addr, stream->tid);
1768 return ret;
1769}
1770
1771static void
1772mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1773{
1774 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1775 stream->tid);
1776 memset(stream, 0, sizeof(*stream));
1777}
1778
1779static struct mwl8k_ampdu_stream *
1780mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1781{
1782 struct mwl8k_priv *priv = hw->priv;
1783 int i;
1784
1785 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1786 struct mwl8k_ampdu_stream *stream;
1787 stream = &priv->ampdu[i];
1788 if (stream->state == AMPDU_NO_STREAM)
1789 continue;
1790 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1791 stream->tid == tid)
1792 return stream;
1793 }
1794 return NULL;
1795}
1796
d0805c1c
BC		 1797#define MWL8K_AMPDU_PACKET_THRESHOLD 64
1798static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1799{
1800 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1801 struct tx_traffic_info *tx_stats;
1802
1803 BUG_ON(tid >= MWL8K_MAX_TID);
1804 tx_stats = &sta_info->tx_stats[tid];
1805
1806 return sta_info->is_ampdu_allowed &&
1807 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1808}
1809
1810static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1811{
1812 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1813 struct tx_traffic_info *tx_stats;
1814
1815 BUG_ON(tid >= MWL8K_MAX_TID);
1816 tx_stats = &sta_info->tx_stats[tid];
1817
1818 if (tx_stats->start_time == 0)
1819 tx_stats->start_time = jiffies;
1820
1821 /* reset the packet count after each second elapses. If the number of
1822 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1823 * an ampdu stream to be started.
1824 */
1825 if (jiffies - tx_stats->start_time > HZ) {
1826 tx_stats->pkts = 0;
1827 tx_stats->start_time = 0;
1828 } else
1829 tx_stats->pkts++;
1830}
1831
7bb45683 1832static void
36323f81
TH		 1833mwl8k_txq_xmit(struct ieee80211_hw *hw,
1834 int index,
1835 struct ieee80211_sta *sta,
1836 struct sk_buff *skb)
a66098da
LB		 1837{
1838 struct mwl8k_priv *priv = hw->priv;
1839 struct ieee80211_tx_info *tx_info;
23b33906 1840 struct mwl8k_vif *mwl8k_vif;
a66098da
LB		 1841 struct ieee80211_hdr *wh;
1842 struct mwl8k_tx_queue *txq;
1843 struct mwl8k_tx_desc *tx;
a66098da 1844 dma_addr_t dma;
23b33906
LB		 1845 u32 txstatus;
1846 u8 txdatarate;
1847 u16 qos;
65f3ddcd
NS		 1848 int txpriority;
1849 u8 tid = 0;
1850 struct mwl8k_ampdu_stream *stream = NULL;
1851 bool start_ba_session = false;
3a769888 1852 bool mgmtframe = false;
a0e7c6cf 1853 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
e1f4d69b 1854 bool eapol_frame = false;
a66098da 1855
23b33906
LB		 1856 wh = (struct ieee80211_hdr *)skb->data;
1857 if (ieee80211_is_data_qos(wh->frame_control))
1858 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1859 else
1860 qos = 0;
a66098da 1861
e1f4d69b
NS		 1862 if (skb->protocol == cpu_to_be16(ETH_P_PAE))
1863 eapol_frame = true;
1864
3a769888
NS		 1865 if (ieee80211_is_mgmt(wh->frame_control))
1866 mgmtframe = true;
1867
d9a07d49 1868 if (priv->ap_fw)
ff776cec 1869 mwl8k_encapsulate_tx_frame(priv, skb);
d9a07d49 1870 else
e4eefec7 1871 mwl8k_add_dma_header(priv, skb, 0, 0);
d9a07d49 1872
23b33906 1873 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1874
1875 tx_info = IEEE80211_SKB_CB(skb);
1876 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1877
1878 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1879 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1880 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1881 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1882 }
1883
23b33906
LB		 1884 /* Setup firmware control bit fields for each frame type. */
1885 txstatus = 0;
1886 txdatarate = 0;
1887 if (ieee80211_is_mgmt(wh->frame_control) ||
1888 ieee80211_is_ctl(wh->frame_control)) {
1889 txdatarate = 0;
e0493a8d 1890 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1891 } else if (ieee80211_is_data(wh->frame_control)) {
1892 txdatarate = 1;
1893 if (is_multicast_ether_addr(wh->addr1))
1894 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1895
e0493a8d 1896 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1897 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1898 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1899 else
e0493a8d 1900 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1901 }
a66098da 1902
a0e7c6cf
NS		 1903 /* Queue ADDBA request in the respective data queue. While setting up
1904 * the ampdu stream, mac80211 queues further packets for that
1905 * particular ra/tid pair. However, packets piled up in the hardware
1906 * for that ra/tid pair will still go out. ADDBA request and the
1907 * related data packets going out from different queues asynchronously
1908 * will cause a shift in the receiver window which might result in
1909 * ampdu packets getting dropped at the receiver after the stream has
1910 * been setup.
1911 */
1912 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1913 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1914 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1915 priv->ap_fw)) {
1916 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1917 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1918 index = mwl8k_tid_queue_mapping(tid);
1919 }
1920
65f3ddcd
NS		 1921 txpriority = index;
1922
e1f4d69b
NS		 1923 if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
1924 ieee80211_is_data_qos(wh->frame_control)) {
65f3ddcd 1925 tid = qos & 0xf;
d0805c1c 1926 mwl8k_tx_count_packet(sta, tid);
65f3ddcd
NS		 1927 spin_lock(&priv->stream_lock);
1928 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1929 if (stream != NULL) {
1930 if (stream->state == AMPDU_STREAM_ACTIVE) {
1931 txpriority = stream->txq_idx;
1932 index = stream->txq_idx;
1933 } else if (stream->state == AMPDU_STREAM_NEW) {
1934 /* We get here if the driver sends us packets
1935 * after we've initiated a stream, but before
1936 * our ampdu_action routine has been called
1937 * with IEEE80211_AMPDU_TX_START to get the SSN
1938 * for the ADDBA request. So this packet can
1939 * go out with no risk of sequence number
1940 * mismatch. No special handling is required.
1941 */
1942 } else {
1943 /* Drop packets that would go out after the
1944 * ADDBA request was sent but before the ADDBA
1945 * response is received. If we don't do this,
1946 * the recipient would probably receive it
1947 * after the ADDBA request with SSN 0. This
1948 * will cause the recipient's BA receive window
1949 * to shift, which would cause the subsequent
1950 * packets in the BA stream to be discarded.
1951 * mac80211 queues our packets for us in this
1952 * case, so this is really just a safety check.
1953 */
1954 wiphy_warn(hw->wiphy,
1955 "Cannot send packet while ADDBA "
1956 "dialog is underway.\n");
1957 spin_unlock(&priv->stream_lock);
1958 dev_kfree_skb(skb);
1959 return;
1960 }
1961 } else {
1962 /* Defer calling mwl8k_start_stream so that the current
1963 * skb can go out before the ADDBA request. This
1964 * prevents sequence number mismatch at the recepient
1965 * as described above.
1966 */
d0805c1c 1967 if (mwl8k_ampdu_allowed(sta, tid)) {
17033543
NS		 1968 stream = mwl8k_add_stream(hw, sta, tid);
1969 if (stream != NULL)
1970 start_ba_session = true;
1971 }
65f3ddcd
NS		 1972 }
1973 spin_unlock(&priv->stream_lock);
1974 }
1975
a66098da
LB		 1976 dma = pci_map_single(priv->pdev, skb->data,
1977 skb->len, PCI_DMA_TODEVICE);
1978
1979 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1980 wiphy_debug(hw->wiphy,
1981 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1982 if (start_ba_session) {
1983 spin_lock(&priv->stream_lock);
1984 mwl8k_remove_stream(hw, stream);
1985 spin_unlock(&priv->stream_lock);
1986 }
23b33906 1987 dev_kfree_skb(skb);
7bb45683 1988 return;
a66098da
LB		 1989 }
1990
23b33906 1991 spin_lock_bh(&priv->tx_lock);
a66098da 1992
23b33906 1993 txq = priv->txq + index;
a66098da 1994
3a769888
NS		 1995 /* Mgmt frames that go out frequently are probe
1996 * responses. Other mgmt frames got out relatively
1997 * infrequently. Hence reserve 2 buffers so that
1998 * other mgmt frames do not get dropped due to an
1999 * already queued probe response in one of the
2000 * reserved buffers.
2001 */
2002
2003 if (txq->len >= MWL8K_TX_DESCS - 2) {
23677ce3 2004 if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
3a769888
NS		 2005 if (start_ba_session) {
2006 spin_lock(&priv->stream_lock);
2007 mwl8k_remove_stream(hw, stream);
2008 spin_unlock(&priv->stream_lock);
2009 }
2010 spin_unlock_bh(&priv->tx_lock);
ff7aa96f
NS		 2011 pci_unmap_single(priv->pdev, dma, skb->len,
2012 PCI_DMA_TODEVICE);
3a769888
NS		 2013 dev_kfree_skb(skb);
2014 return;
3a7dbc3b 2015 }
65f3ddcd
NS		 2016 }
2017
45eb400d
LB		 2018 BUG_ON(txq->skb[txq->tail] != NULL);
2019 txq->skb[txq->tail] = skb;
a66098da 2020
45eb400d 2021 tx = txq->txd + txq->tail;
23b33906 2022 tx->data_rate = txdatarate;
65f3ddcd 2023 tx->tx_priority = txpriority;
a66098da 2024 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 2025 tx->pkt_phys_addr = cpu_to_le32(dma);
2026 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 2027 tx->rate_info = 0;
36323f81
TH		 2028 if (!priv->ap_fw && sta != NULL)
2029 tx->peer_id = MWL8K_STA(sta)->peer_id;
a680400e
LB		 2030 else
2031 tx->peer_id = 0;
566875db 2032
e1f4d69b 2033 if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
566875db
PN		 2034 tx->timestamp = cpu_to_le32(ioread32(priv->regs +
2035 MWL8K_HW_TIMER_REGISTER));
2036
a66098da 2037 wmb();
23b33906
LB		 2038 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
2039
8ccbc3b8 2040 txq->len++;
a66098da 2041 priv->pending_tx_pkts++;
a66098da 2042
45eb400d
LB		 2043 txq->tail++;
2044 if (txq->tail == MWL8K_TX_DESCS)
2045 txq->tail = 0;
23b33906 2046
23b33906 2047 mwl8k_tx_start(priv);
a66098da
LB		 2048
2049 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 2050
2051 /* Initiate the ampdu session here */
2052 if (start_ba_session) {
2053 spin_lock(&priv->stream_lock);
2054 if (mwl8k_start_stream(hw, stream))
2055 mwl8k_remove_stream(hw, stream);
2056 spin_unlock(&priv->stream_lock);
2057 }
a66098da
LB		 2058}
2059
2060
618952a7
LB		 2061/*
2062 * Firmware access.
2063 *
2064 * We have the following requirements for issuing firmware commands:
2065 * - Some commands require that the packet transmit path is idle when
2066 * the command is issued. (For simplicity, we'll just quiesce the
2067 * transmit path for every command.)
2068 * - There are certain sequences of commands that need to be issued to
2069 * the hardware sequentially, with no other intervening commands.
2070 *
2071 * This leads to an implementation of a "firmware lock" as a mutex that
2072 * can be taken recursively, and which is taken by both the low-level
2073 * command submission function (mwl8k_post_cmd) as well as any users of
2074 * that function that require issuing of an atomic sequence of commands,
2075 * and quiesces the transmit path whenever it's taken.
2076 */
2077static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2078{
2079 struct mwl8k_priv *priv = hw->priv;
2080
2081 if (priv->fw_mutex_owner != current) {
2082 int rc;
2083
2084 mutex_lock(&priv->fw_mutex);
2085 ieee80211_stop_queues(hw);
2086
2087 rc = mwl8k_tx_wait_empty(hw);
2088 if (rc) {
6b6accc3
YAP		 2089 if (!priv->hw_restart_in_progress)
2090 ieee80211_wake_queues(hw);
2091
618952a7
LB		 2092 mutex_unlock(&priv->fw_mutex);
2093
2094 return rc;
2095 }
2096
2097 priv->fw_mutex_owner = current;
2098 }
2099
2100 priv->fw_mutex_depth++;
2101
2102 return 0;
2103}
2104
2105static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2106{
2107 struct mwl8k_priv *priv = hw->priv;
2108
2109 if (!--priv->fw_mutex_depth) {
6b6accc3
YAP		 2110 if (!priv->hw_restart_in_progress)
2111 ieee80211_wake_queues(hw);
2112
618952a7
LB		 2113 priv->fw_mutex_owner = NULL;
2114 mutex_unlock(&priv->fw_mutex);
2115 }
2116}
2117
2118
a66098da
LB		 2119/*
2120 * Command processing.
2121 */
2122
0c9cc640
LB		 2123/* Timeout firmware commands after 10s */
2124#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2125
2126static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2127{
2128 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2129 struct mwl8k_priv *priv = hw->priv;
2130 void __iomem *regs = priv->regs;
2131 dma_addr_t dma_addr;
2132 unsigned int dma_size;
2133 int rc;
a66098da
LB		 2134 unsigned long timeout = 0;
2135 u8 buf[32];
2136
b603742f 2137 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2138 dma_size = le16_to_cpu(cmd->length);
2139 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2140 PCI_DMA_BIDIRECTIONAL);
2141 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2142 return -ENOMEM;
2143
618952a7 2144 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2145 if (rc) {
2146 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2147 PCI_DMA_BIDIRECTIONAL);
618952a7 2148 return rc;
39a1e42e 2149 }
a66098da 2150
a66098da
LB		 2151 priv->hostcmd_wait = &cmd_wait;
2152 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2153 iowrite32(MWL8K_H2A_INT_DOORBELL,
2154 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2155 iowrite32(MWL8K_H2A_INT_DUMMY,
2156 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2157
2158 timeout = wait_for_completion_timeout(&cmd_wait,
2159 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2160
618952a7
LB		 2161 priv->hostcmd_wait = NULL;
2162
2163 mwl8k_fw_unlock(hw);
2164
37055bd4
LB		 2165 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2166 PCI_DMA_BIDIRECTIONAL);
2167
a66098da 2168 if (!timeout) {
5db55844 2169 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2170 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2171 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2172 rc = -ETIMEDOUT;
2173 } else {
0c9cc640
LB		 2174 int ms;
2175
2176 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2177
ce9e2e1b 2178 rc = cmd->result ? -EINVAL : 0;
a66098da 2179 if (rc)
5db55844 2180 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2181 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2182 le16_to_cpu(cmd->result));
0c9cc640 2183 else if (ms > 2000)
5db55844 2184 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2185 mwl8k_cmd_name(cmd->code,
2186 buf, sizeof(buf)),
2187 ms);
a66098da
LB		 2188 }
2189
a66098da
LB		 2190 return rc;
2191}
2192
f57ca9c1
LB		 2193static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2194 struct ieee80211_vif *vif,
2195 struct mwl8k_cmd_pkt *cmd)
2196{
2197 if (vif != NULL)
2198 cmd->macid = MWL8K_VIF(vif)->macid;
2199 return mwl8k_post_cmd(hw, cmd);
2200}
2201
1349ad2f
LB		 2202/*
2203 * Setup code shared between STA and AP firmware images.
2204 */
2205static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2206{
2207 struct mwl8k_priv *priv = hw->priv;
2208
2209 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2210 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2211
2212 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2213 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2214
2215 priv->band_24.band = IEEE80211_BAND_2GHZ;
2216 priv->band_24.channels = priv->channels_24;
2217 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2218 priv->band_24.bitrates = priv->rates_24;
2219 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2220
2221 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2222}
2223
4eae9edd
LB		 2224static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2225{
2226 struct mwl8k_priv *priv = hw->priv;
2227
2228 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2229 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2230
2231 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2232 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2233
2234 priv->band_50.band = IEEE80211_BAND_5GHZ;
2235 priv->band_50.channels = priv->channels_50;
2236 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2237 priv->band_50.bitrates = priv->rates_50;
2238 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2239
2240 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2241}
2242
a66098da 2243/*
04b147b1 2244 * CMD_GET_HW_SPEC (STA version).
a66098da 2245 */
04b147b1 2246struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2247 struct mwl8k_cmd_pkt header;
2248 __u8 hw_rev;
2249 __u8 host_interface;
2250 __le16 num_mcaddrs;
d89173f2 2251 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2252 __le16 region_code;
2253 __le32 fw_rev;
2254 __le32 ps_cookie;
2255 __le32 caps;
2256 __u8 mcs_bitmap[16];
2257 __le32 rx_queue_ptr;
2258 __le32 num_tx_queues;
e600707b 2259 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2260 __le32 caps2;
2261 __le32 num_tx_desc_per_queue;
45eb400d 2262 __le32 total_rxd;
ba2d3587 2263} __packed;
a66098da 2264
341c9791
LB		 2265#define MWL8K_CAP_MAX_AMSDU 0x20000000
2266#define MWL8K_CAP_GREENFIELD 0x08000000
2267#define MWL8K_CAP_AMPDU 0x04000000
2268#define MWL8K_CAP_RX_STBC 0x01000000
2269#define MWL8K_CAP_TX_STBC 0x00800000
2270#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2271#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2272#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2273#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2274#define MWL8K_CAP_DELAY_BA 0x00003000
2275#define MWL8K_CAP_MIMO 0x00000200
2276#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2277#define MWL8K_CAP_BAND_MASK 0x00000007
2278#define MWL8K_CAP_5GHZ 0x00000004
2279#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2280
06953235
LB		 2281static void
2282mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2283 struct ieee80211_supported_band *band, u32 cap)
341c9791 2284{
341c9791
LB		 2285 int rx_streams;
2286 int tx_streams;
2287
777ad375 2288 band->ht_cap.ht_supported = 1;
341c9791
LB		 2289
2290 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2291 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2292 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2293 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2294 if (cap & MWL8K_CAP_AMPDU) {
2295 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2296 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2297 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2298 }
2299 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2300 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2301 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2302 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2303 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2304 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2305 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2306 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2307 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2308 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2309 if (cap & MWL8K_CAP_40MHZ)
777ad375 2310 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2311
2312 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2313 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2314
777ad375 2315 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2316 if (rx_streams >= 2)
777ad375 2317 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2318 if (rx_streams >= 3)
777ad375
LB		 2319 band->ht_cap.mcs.rx_mask[2] = 0xff;
2320 band->ht_cap.mcs.rx_mask[4] = 0x01;
2321 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2322
2323 if (rx_streams != tx_streams) {
777ad375
LB		 2324 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2325 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2326 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2327 }
2328}
2329
06953235
LB		 2330static void
2331mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2332{
2333 struct mwl8k_priv *priv = hw->priv;
2334
2335 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2336 mwl8k_setup_2ghz_band(hw);
2337 if (caps & MWL8K_CAP_MIMO)
2338 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2339 }
2340
2341 if (caps & MWL8K_CAP_5GHZ) {
2342 mwl8k_setup_5ghz_band(hw);
2343 if (caps & MWL8K_CAP_MIMO)
2344 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2345 }
2346}
2347
04b147b1 2348static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2349{
2350 struct mwl8k_priv *priv = hw->priv;
04b147b1 2351 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2352 int rc;
2353 int i;
2354
2355 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2356 if (cmd == NULL)
2357 return -ENOMEM;
2358
2359 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2360 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2361
2362 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2363 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2364 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2365 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2366 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2367 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2368 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2369 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2370
2371 rc = mwl8k_post_cmd(hw, &cmd->header);
2372
2373 if (!rc) {
2374 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2375 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2376 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2377 priv->hw_rev = cmd->hw_rev;
06953235 2378 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2379 priv->ap_macids_supported = 0x00000000;
2380 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2381 }
2382
2383 kfree(cmd);
2384 return rc;
2385}
2386
42fba21d
LB		 2387/*
2388 * CMD_GET_HW_SPEC (AP version).
2389 */
2390struct mwl8k_cmd_get_hw_spec_ap {
2391 struct mwl8k_cmd_pkt header;
2392 __u8 hw_rev;
2393 __u8 host_interface;
2394 __le16 num_wcb;
2395 __le16 num_mcaddrs;
2396 __u8 perm_addr[ETH_ALEN];
2397 __le16 region_code;
2398 __le16 num_antenna;
2399 __le32 fw_rev;
2400 __le32 wcbbase0;
2401 __le32 rxwrptr;
2402 __le32 rxrdptr;
2403 __le32 ps_cookie;
2404 __le32 wcbbase1;
2405 __le32 wcbbase2;
2406 __le32 wcbbase3;
952a0e96 2407 __le32 fw_api_version;
8a7a578c
BC		 2408 __le32 caps;
2409 __le32 num_of_ampdu_queues;
2410 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2411} __packed;
42fba21d
LB		 2412
2413static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2414{
2415 struct mwl8k_priv *priv = hw->priv;
2416 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2417 int rc, i;
952a0e96 2418 u32 api_version;
42fba21d
LB		 2419
2420 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2421 if (cmd == NULL)
2422 return -ENOMEM;
2423
2424 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2425 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2426
2427 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2428 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2429
2430 rc = mwl8k_post_cmd(hw, &cmd->header);
2431
2432 if (!rc) {
2433 int off;
2434
952a0e96
BC		 2435 api_version = le32_to_cpu(cmd->fw_api_version);
2436 if (priv->device_info->fw_api_ap != api_version) {
2437 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2438 " Expected %d got %d.\n", MWL8K_NAME,
2439 priv->device_info->part_name,
2440 priv->device_info->fw_api_ap,
2441 api_version);
2442 rc = -EINVAL;
2443 goto done;
2444 }
42fba21d
LB		 2445 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2446 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2447 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2448 priv->hw_rev = cmd->hw_rev;
8a7a578c 2449 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2450 priv->ap_macids_supported = 0x000000ff;
2451 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2452 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2453 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2454 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2455 " but we only support %d.\n",
2456 priv->num_ampdu_queues,
2457 MWL8K_MAX_AMPDU_QUEUES);
2458 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2459 }
42fba21d 2460 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2461 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2462
2463 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2464 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2465
73b46320
BC		 2466 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2467 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2468 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2469 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2470
2471 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2472 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2473 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2474 }
2475
952a0e96 2476done:
42fba21d
LB		 2477 kfree(cmd);
2478 return rc;
2479}
2480
2481/*
2482 * CMD_SET_HW_SPEC.
2483 */
2484struct mwl8k_cmd_set_hw_spec {
2485 struct mwl8k_cmd_pkt header;
2486 __u8 hw_rev;
2487 __u8 host_interface;
2488 __le16 num_mcaddrs;
2489 __u8 perm_addr[ETH_ALEN];
2490 __le16 region_code;
2491 __le32 fw_rev;
2492 __le32 ps_cookie;
2493 __le32 caps;
2494 __le32 rx_queue_ptr;
2495 __le32 num_tx_queues;
e600707b 2496 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2497 __le32 flags;
2498 __le32 num_tx_desc_per_queue;
2499 __le32 total_rxd;
ba2d3587 2500} __packed;
42fba21d 2501
8a7a578c
BC		 2502/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2503 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2504 * the packets that are queued for more than 500ms, will be dropped in the
2505 * hardware. This helps minimizing the issues caused due to head-of-line
2506 * blocking where a slow client can hog the bandwidth and affect traffic to a
2507 * faster client.
2508 */
2509#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
3373b28e 2510#define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
b64fe619
LB		 2511#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2512#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2513#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2514
2515static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2516{
2517 struct mwl8k_priv *priv = hw->priv;
2518 struct mwl8k_cmd_set_hw_spec *cmd;
2519 int rc;
2520 int i;
2521
2522 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2523 if (cmd == NULL)
2524 return -ENOMEM;
2525
2526 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2527 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2528
2529 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2530 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2531 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2532
2533 /*
2534 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2535 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2536 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2537 * priority is interpreted the right way in firmware.
2538 */
e600707b
BC		 2539 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2540 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2541 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2542 }
2543
b64fe619
LB		 2544 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2545 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
31d291a7 2546 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
3373b28e
NS		 2547 MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
2548 MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
42fba21d
LB		 2549 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2550 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2551
2552 rc = mwl8k_post_cmd(hw, &cmd->header);
2553 kfree(cmd);
2554
2555 return rc;
2556}
2557
a66098da
LB		 2558/*
2559 * CMD_MAC_MULTICAST_ADR.
2560 */
2561struct mwl8k_cmd_mac_multicast_adr {
2562 struct mwl8k_cmd_pkt header;
2563 __le16 action;
2564 __le16 numaddr;
ce9e2e1b 2565 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2566};
2567
d5e30845
LB		 2568#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2569#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2570#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2571#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2572
e81cd2d6 2573static struct mwl8k_cmd_pkt *
447ced07 2574__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2575 struct netdev_hw_addr_list *mc_list)
a66098da 2576{
e81cd2d6 2577 struct mwl8k_priv *priv = hw->priv;
a66098da 2578 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2579 int size;
22bedad3
JP		 2580 int mc_count = 0;
2581
2582 if (mc_list)
2583 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2584
447ced07 2585 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2586 allmulti = 1;
2587 mc_count = 0;
2588 }
e81cd2d6
LB		 2589
2590 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2591
e81cd2d6 2592 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2593 if (cmd == NULL)
e81cd2d6 2594 return NULL;
a66098da
LB		 2595
2596 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2597 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2598 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2599 MWL8K_ENABLE_RX_BROADCAST);
2600
2601 if (allmulti) {
2602 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2603 } else if (mc_count) {
22bedad3
JP		 2604 struct netdev_hw_addr *ha;
2605 int i = 0;
d5e30845
LB		 2606
2607 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2608 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2609 netdev_hw_addr_list_for_each(ha, mc_list) {
2610 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2611 }
a66098da
LB		 2612 }
2613
e81cd2d6 2614 return &cmd->header;
a66098da
LB		 2615}
2616
2617/*
55489b6e 2618 * CMD_GET_STAT.
a66098da 2619 */
55489b6e 2620struct mwl8k_cmd_get_stat {
a66098da 2621 struct mwl8k_cmd_pkt header;
a66098da 2622 __le32 stats[64];
ba2d3587 2623} __packed;
a66098da
LB		 2624
2625#define MWL8K_STAT_ACK_FAILURE 9
2626#define MWL8K_STAT_RTS_FAILURE 12
2627#define MWL8K_STAT_FCS_ERROR 24
2628#define MWL8K_STAT_RTS_SUCCESS 11
2629
55489b6e
LB		 2630static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2631 struct ieee80211_low_level_stats *stats)
a66098da 2632{
55489b6e 2633 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2634 int rc;
2635
2636 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2637 if (cmd == NULL)
2638 return -ENOMEM;
2639
2640 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2641 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2642
2643 rc = mwl8k_post_cmd(hw, &cmd->header);
2644 if (!rc) {
2645 stats->dot11ACKFailureCount =
2646 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2647 stats->dot11RTSFailureCount =
2648 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2649 stats->dot11FCSErrorCount =
2650 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2651 stats->dot11RTSSuccessCount =
2652 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2653 }
2654 kfree(cmd);
2655
2656 return rc;
2657}
2658
2659/*
55489b6e 2660 * CMD_RADIO_CONTROL.
a66098da 2661 */
55489b6e 2662struct mwl8k_cmd_radio_control {
a66098da
LB		 2663 struct mwl8k_cmd_pkt header;
2664 __le16 action;
2665 __le16 control;
2666 __le16 radio_on;
ba2d3587 2667} __packed;
a66098da 2668
c46563b7 2669static int
55489b6e 2670mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2671{
2672 struct mwl8k_priv *priv = hw->priv;
55489b6e 2673 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2674 int rc;
2675
c46563b7 2676 if (enable == priv->radio_on && !force)
a66098da
LB		 2677 return 0;
2678
a66098da
LB		 2679 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2680 if (cmd == NULL)
2681 return -ENOMEM;
2682
2683 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2684 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2685 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2686 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2687 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2688
2689 rc = mwl8k_post_cmd(hw, &cmd->header);
2690 kfree(cmd);
2691
2692 if (!rc)
c46563b7 2693 priv->radio_on = enable;
a66098da
LB		 2694
2695 return rc;
2696}
2697
55489b6e 2698static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2699{
55489b6e 2700 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2701}
2702
55489b6e 2703static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2704{
55489b6e 2705 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2706}
2707
a66098da
LB		 2708static int
2709mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2710{
99200a99 2711 struct mwl8k_priv *priv = hw->priv;
a66098da 2712
68ce3884 2713 priv->radio_short_preamble = short_preamble;
a66098da 2714
55489b6e 2715 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2716}
2717
2718/*
55489b6e 2719 * CMD_RF_TX_POWER.
a66098da 2720 */
41fdf097 2721#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2722
55489b6e 2723struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2724 struct mwl8k_cmd_pkt header;
2725 __le16 action;
2726 __le16 support_level;
2727 __le16 current_level;
2728 __le16 reserved;
41fdf097 2729 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2730} __packed;
a66098da 2731
55489b6e 2732static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2733{
55489b6e 2734 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2735 int rc;
2736
2737 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2738 if (cmd == NULL)
2739 return -ENOMEM;
2740
2741 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2742 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2743 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2744 cmd->support_level = cpu_to_le16(dBm);
2745
2746 rc = mwl8k_post_cmd(hw, &cmd->header);
2747 kfree(cmd);
2748
2749 return rc;
2750}
2751
41fdf097
NS		 2752/*
2753 * CMD_TX_POWER.
2754 */
2755#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2756
2757struct mwl8k_cmd_tx_power {
2758 struct mwl8k_cmd_pkt header;
2759 __le16 action;
2760 __le16 band;
2761 __le16 channel;
2762 __le16 bw;
2763 __le16 sub_ch;
2764 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
ba30c4a5 2765} __packed;
41fdf097
NS		 2766
2767static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2768 struct ieee80211_conf *conf,
2769 unsigned short pwr)
2770{
2771 struct ieee80211_channel *channel = conf->channel;
2772 struct mwl8k_cmd_tx_power *cmd;
2773 int rc;
2774 int i;
2775
2776 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2777 if (cmd == NULL)
2778 return -ENOMEM;
2779
2780 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2781 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2782 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2783
2784 if (channel->band == IEEE80211_BAND_2GHZ)
2785 cmd->band = cpu_to_le16(0x1);
2786 else if (channel->band == IEEE80211_BAND_5GHZ)
2787 cmd->band = cpu_to_le16(0x4);
2788
604c4ef1 2789 cmd->channel = cpu_to_le16(channel->hw_value);
41fdf097
NS		 2790
2791 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2792 conf->channel_type == NL80211_CHAN_HT20) {
2793 cmd->bw = cpu_to_le16(0x2);
2794 } else {
2795 cmd->bw = cpu_to_le16(0x4);
2796 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2797 cmd->sub_ch = cpu_to_le16(0x3);
2798 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2799 cmd->sub_ch = cpu_to_le16(0x1);
2800 }
2801
2802 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2803 cmd->power_level_list[i] = cpu_to_le16(pwr);
2804
2805 rc = mwl8k_post_cmd(hw, &cmd->header);
2806 kfree(cmd);
2807
2808 return rc;
2809}
2810
08b06347
LB		 2811/*
2812 * CMD_RF_ANTENNA.
2813 */
2814struct mwl8k_cmd_rf_antenna {
2815 struct mwl8k_cmd_pkt header;
2816 __le16 antenna;
2817 __le16 mode;
ba2d3587 2818} __packed;
08b06347
LB		 2819
2820#define MWL8K_RF_ANTENNA_RX 1
2821#define MWL8K_RF_ANTENNA_TX 2
2822
2823static int
2824mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2825{
2826 struct mwl8k_cmd_rf_antenna *cmd;
2827 int rc;
2828
2829 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2830 if (cmd == NULL)
2831 return -ENOMEM;
2832
2833 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2834 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2835 cmd->antenna = cpu_to_le16(antenna);
2836 cmd->mode = cpu_to_le16(mask);
2837
2838 rc = mwl8k_post_cmd(hw, &cmd->header);
2839 kfree(cmd);
2840
2841 return rc;
2842}
2843
b64fe619
LB		 2844/*
2845 * CMD_SET_BEACON.
2846 */
2847struct mwl8k_cmd_set_beacon {
2848 struct mwl8k_cmd_pkt header;
2849 __le16 beacon_len;
2850 __u8 beacon[0];
2851};
2852
aa21d0f6
LB		 2853static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2854 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2855{
2856 struct mwl8k_cmd_set_beacon *cmd;
2857 int rc;
2858
2859 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2860 if (cmd == NULL)
2861 return -ENOMEM;
2862
2863 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2864 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2865 cmd->beacon_len = cpu_to_le16(len);
2866 memcpy(cmd->beacon, beacon, len);
2867
aa21d0f6 2868 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2869 kfree(cmd);
2870
2871 return rc;
2872}
2873
a66098da
LB		 2874/*
2875 * CMD_SET_PRE_SCAN.
2876 */
2877struct mwl8k_cmd_set_pre_scan {
2878 struct mwl8k_cmd_pkt header;
ba2d3587 2879} __packed;
a66098da
LB		 2880
2881static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2882{
2883 struct mwl8k_cmd_set_pre_scan *cmd;
2884 int rc;
2885
2886 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2887 if (cmd == NULL)
2888 return -ENOMEM;
2889
2890 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2891 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2892
2893 rc = mwl8k_post_cmd(hw, &cmd->header);
2894 kfree(cmd);
2895
2896 return rc;
2897}
2898
2899/*
2900 * CMD_SET_POST_SCAN.
2901 */
2902struct mwl8k_cmd_set_post_scan {
2903 struct mwl8k_cmd_pkt header;
2904 __le32 isibss;
d89173f2 2905 __u8 bssid[ETH_ALEN];
ba2d3587 2906} __packed;
a66098da
LB		 2907
2908static int
0a11dfc3 2909mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2910{
2911 struct mwl8k_cmd_set_post_scan *cmd;
2912 int rc;
2913
2914 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2915 if (cmd == NULL)
2916 return -ENOMEM;
2917
2918 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2919 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2920 cmd->isibss = 0;
d89173f2 2921 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2922
2923 rc = mwl8k_post_cmd(hw, &cmd->header);
2924 kfree(cmd);
2925
2926 return rc;
2927}
2928
2929/*
2930 * CMD_SET_RF_CHANNEL.
2931 */
2932struct mwl8k_cmd_set_rf_channel {
2933 struct mwl8k_cmd_pkt header;
2934 __le16 action;
2935 __u8 current_channel;
2936 __le32 channel_flags;
ba2d3587 2937} __packed;
a66098da
LB		 2938
2939static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2940 struct ieee80211_conf *conf)
a66098da 2941{
610677d2 2942 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2943 struct mwl8k_cmd_set_rf_channel *cmd;
2944 int rc;
2945
2946 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2947 if (cmd == NULL)
2948 return -ENOMEM;
2949
2950 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2951 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2952 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2953 cmd->current_channel = channel->hw_value;
610677d2 2954
a66098da 2955 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2956 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2957 else if (channel->band == IEEE80211_BAND_5GHZ)
2958 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2959
2960 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2961 conf->channel_type == NL80211_CHAN_HT20)
2962 cmd->channel_flags |= cpu_to_le32(0x00000080);
2963 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2964 cmd->channel_flags |= cpu_to_le32(0x000001900);
2965 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2966 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2967
2968 rc = mwl8k_post_cmd(hw, &cmd->header);
2969 kfree(cmd);
2970
2971 return rc;
2972}
2973
2974/*
55489b6e 2975 * CMD_SET_AID.
a66098da 2976 */
55489b6e
LB		 2977#define MWL8K_FRAME_PROT_DISABLED 0x00
2978#define MWL8K_FRAME_PROT_11G 0x07
2979#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2980#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2981
55489b6e
LB		 2982struct mwl8k_cmd_update_set_aid {
2983 struct mwl8k_cmd_pkt header;
2984 __le16 aid;
a66098da 2985
55489b6e
LB		 2986 /* AP's MAC address (BSSID) */
2987 __u8 bssid[ETH_ALEN];
2988 __le16 protection_mode;
2989 __u8 supp_rates[14];
ba2d3587 2990} __packed;
a66098da 2991
c6e96010
LB		 2992static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2993{
2994 int i;
2995 int j;
2996
2997 /*
2998 * Clear nonstandard rates 4 and 13.
2999 */
3000 mask &= 0x1fef;
3001
3002 for (i = 0, j = 0; i < 14; i++) {
3003 if (mask & (1 << i))
777ad375 3004 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 3005 }
3006}
3007
55489b6e 3008static int
c6e96010
LB		 3009mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
3010 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 3011{
55489b6e
LB		 3012 struct mwl8k_cmd_update_set_aid *cmd;
3013 u16 prot_mode;
a66098da
LB		 3014 int rc;
3015
3016 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3017 if (cmd == NULL)
3018 return -ENOMEM;
3019
55489b6e 3020 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 3021 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 3022 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 3023 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 3024
7dc6a7a7 3025 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 3026 prot_mode = MWL8K_FRAME_PROT_11G;
3027 } else {
7dc6a7a7 3028 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 3029 IEEE80211_HT_OP_MODE_PROTECTION) {
3030 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
3031 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
3032 break;
3033 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
3034 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
3035 break;
3036 default:
3037 prot_mode = MWL8K_FRAME_PROT_DISABLED;
3038 break;
3039 }
3040 }
3041 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 3042
c6e96010 3043 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 3044
3045 rc = mwl8k_post_cmd(hw, &cmd->header);
3046 kfree(cmd);
3047
3048 return rc;
3049}
3050
32060e1b 3051/*
55489b6e 3052 * CMD_SET_RATE.
32060e1b 3053 */
55489b6e
LB		 3054struct mwl8k_cmd_set_rate {
3055 struct mwl8k_cmd_pkt header;
3056 __u8 legacy_rates[14];
3057
3058 /* Bitmap for supported MCS codes. */
3059 __u8 mcs_set[16];
3060 __u8 reserved[16];
ba2d3587 3061} __packed;
32060e1b 3062
55489b6e 3063static int
c6e96010 3064mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 3065 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 3066{
55489b6e 3067 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 3068 int rc;
3069
3070 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3071 if (cmd == NULL)
3072 return -ENOMEM;
3073
55489b6e 3074 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 3075 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 3076 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 3077 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 3078
3079 rc = mwl8k_post_cmd(hw, &cmd->header);
3080 kfree(cmd);
3081
3082 return rc;
3083}
3084
a66098da 3085/*
55489b6e 3086 * CMD_FINALIZE_JOIN.
a66098da 3087 */
55489b6e
LB		 3088#define MWL8K_FJ_BEACON_MAXLEN 128
3089
3090struct mwl8k_cmd_finalize_join {
a66098da 3091 struct mwl8k_cmd_pkt header;
55489b6e
LB		 3092 __le32 sleep_interval; /* Number of beacon periods to sleep */
3093 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 3094} __packed;
a66098da 3095
55489b6e
LB		 3096static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3097 int framelen, int dtim)
a66098da 3098{
55489b6e
LB		 3099 struct mwl8k_cmd_finalize_join *cmd;
3100 struct ieee80211_mgmt *payload = frame;
3101 int payload_len;
a66098da
LB		 3102 int rc;
3103
3104 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3105 if (cmd == NULL)
3106 return -ENOMEM;
3107
55489b6e 3108 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3109 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3110 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3111
3112 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3113 if (payload_len < 0)
3114 payload_len = 0;
3115 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3116 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3117
3118 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3119
3120 rc = mwl8k_post_cmd(hw, &cmd->header);
3121 kfree(cmd);
3122
3123 return rc;
3124}
3125
3126/*
55489b6e 3127 * CMD_SET_RTS_THRESHOLD.
a66098da 3128 */
55489b6e 3129struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3130 struct mwl8k_cmd_pkt header;
3131 __le16 action;
55489b6e 3132 __le16 threshold;
ba2d3587 3133} __packed;
a66098da 3134
c2c2b12a
LB		 3135static int
3136mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3137{
55489b6e 3138 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3139 int rc;
3140
3141 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3142 if (cmd == NULL)
3143 return -ENOMEM;
3144
55489b6e 3145 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3146 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3147 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3148 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3149
3150 rc = mwl8k_post_cmd(hw, &cmd->header);
3151 kfree(cmd);
3152
a66098da
LB		 3153 return rc;
3154}
3155
3156/*
55489b6e 3157 * CMD_SET_SLOT.
a66098da 3158 */
55489b6e 3159struct mwl8k_cmd_set_slot {
a66098da
LB		 3160 struct mwl8k_cmd_pkt header;
3161 __le16 action;
55489b6e 3162 __u8 short_slot;
ba2d3587 3163} __packed;
a66098da 3164
55489b6e 3165static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3166{
55489b6e 3167 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3168 int rc;
3169
3170 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3171 if (cmd == NULL)
3172 return -ENOMEM;
3173
55489b6e 3174 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3175 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3176 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3177 cmd->short_slot = short_slot_time;
a66098da
LB		 3178
3179 rc = mwl8k_post_cmd(hw, &cmd->header);
3180 kfree(cmd);
3181
3182 return rc;
3183}
3184
3185/*
3186 * CMD_SET_EDCA_PARAMS.
3187 */
3188struct mwl8k_cmd_set_edca_params {
3189 struct mwl8k_cmd_pkt header;
3190
3191 /* See MWL8K_SET_EDCA_XXX below */
3192 __le16 action;
3193
3194 /* TX opportunity in units of 32 us */
3195 __le16 txop;
3196
2e484c89
LB		 3197 union {
3198 struct {
3199 /* Log exponent of max contention period: 0...15 */
3200 __le32 log_cw_max;
3201
3202 /* Log exponent of min contention period: 0...15 */
3203 __le32 log_cw_min;
3204
3205 /* Adaptive interframe spacing in units of 32us */
3206 __u8 aifs;
3207
3208 /* TX queue to configure */
3209 __u8 txq;
3210 } ap;
3211 struct {
3212 /* Log exponent of max contention period: 0...15 */
3213 __u8 log_cw_max;
a66098da 3214
2e484c89
LB		 3215 /* Log exponent of min contention period: 0...15 */
3216 __u8 log_cw_min;
a66098da 3217
2e484c89
LB		 3218 /* Adaptive interframe spacing in units of 32us */
3219 __u8 aifs;
a66098da 3220
2e484c89
LB		 3221 /* TX queue to configure */
3222 __u8 txq;
3223 } sta;
3224 };
ba2d3587 3225} __packed;
a66098da 3226
a66098da
LB		 3227#define MWL8K_SET_EDCA_CW 0x01
3228#define MWL8K_SET_EDCA_TXOP 0x02
3229#define MWL8K_SET_EDCA_AIFS 0x04
3230
3231#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3232 MWL8K_SET_EDCA_TXOP | \
3233 MWL8K_SET_EDCA_AIFS)
3234
3235static int
55489b6e
LB		 3236mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3237 __u16 cw_min, __u16 cw_max,
3238 __u8 aifs, __u16 txop)
a66098da 3239{
2e484c89 3240 struct mwl8k_priv *priv = hw->priv;
a66098da 3241 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3242 int rc;
3243
3244 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3245 if (cmd == NULL)
3246 return -ENOMEM;
3247
a66098da
LB		 3248 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3249 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3250 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3251 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3252 if (priv->ap_fw) {
3253 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3254 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3255 cmd->ap.aifs = aifs;
3256 cmd->ap.txq = qnum;
3257 } else {
3258 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3259 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3260 cmd->sta.aifs = aifs;
3261 cmd->sta.txq = qnum;
3262 }
a66098da
LB		 3263
3264 rc = mwl8k_post_cmd(hw, &cmd->header);
3265 kfree(cmd);
3266
3267 return rc;
3268}
3269
3270/*
55489b6e 3271 * CMD_SET_WMM_MODE.
a66098da 3272 */
55489b6e 3273struct mwl8k_cmd_set_wmm_mode {
a66098da 3274 struct mwl8k_cmd_pkt header;
55489b6e 3275 __le16 action;
ba2d3587 3276} __packed;
a66098da 3277
55489b6e 3278static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3279{
55489b6e
LB		 3280 struct mwl8k_priv *priv = hw->priv;
3281 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3282 int rc;
3283
a66098da
LB		 3284 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3285 if (cmd == NULL)
3286 return -ENOMEM;
3287
55489b6e 3288 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3289 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3290 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3291
3292 rc = mwl8k_post_cmd(hw, &cmd->header);
3293 kfree(cmd);
16cec43d 3294
55489b6e
LB		 3295 if (!rc)
3296 priv->wmm_enabled = enable;
a66098da
LB		 3297
3298 return rc;
3299}
3300
3301/*
55489b6e 3302 * CMD_MIMO_CONFIG.
a66098da 3303 */
55489b6e
LB		 3304struct mwl8k_cmd_mimo_config {
3305 struct mwl8k_cmd_pkt header;
3306 __le32 action;
3307 __u8 rx_antenna_map;
3308 __u8 tx_antenna_map;
ba2d3587 3309} __packed;
a66098da 3310
55489b6e 3311static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3312{
55489b6e 3313 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3314 int rc;
3315
3316 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3317 if (cmd == NULL)
3318 return -ENOMEM;
3319
55489b6e 3320 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3321 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3322 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3323 cmd->rx_antenna_map = rx;
3324 cmd->tx_antenna_map = tx;
a66098da
LB		 3325
3326 rc = mwl8k_post_cmd(hw, &cmd->header);
3327 kfree(cmd);
3328
3329 return rc;
3330}
3331
3332/*
b71ed2c6 3333 * CMD_USE_FIXED_RATE (STA version).
a66098da 3334 */
b71ed2c6
LB		 3335struct mwl8k_cmd_use_fixed_rate_sta {
3336 struct mwl8k_cmd_pkt header;
3337 __le32 action;
3338 __le32 allow_rate_drop;
3339 __le32 num_rates;
3340 struct {
3341 __le32 is_ht_rate;
3342 __le32 enable_retry;
3343 __le32 rate;
3344 __le32 retry_count;
3345 } rate_entry[8];
3346 __le32 rate_type;
3347 __le32 reserved1;
3348 __le32 reserved2;
ba2d3587 3349} __packed;
a66098da 3350
b71ed2c6
LB		 3351#define MWL8K_USE_AUTO_RATE 0x0002
3352#define MWL8K_UCAST_RATE 0
a66098da 3353
b71ed2c6 3354static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3355{
b71ed2c6 3356 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3357 int rc;
3358
3359 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3360 if (cmd == NULL)
3361 return -ENOMEM;
3362
3363 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3364 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3365 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3366 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3367
3368 rc = mwl8k_post_cmd(hw, &cmd->header);
3369 kfree(cmd);
3370
3371 return rc;
3372}
3373
088aab8b
LB		 3374/*
3375 * CMD_USE_FIXED_RATE (AP version).
3376 */
3377struct mwl8k_cmd_use_fixed_rate_ap {
3378 struct mwl8k_cmd_pkt header;
3379 __le32 action;
3380 __le32 allow_rate_drop;
3381 __le32 num_rates;
3382 struct mwl8k_rate_entry_ap {
3383 __le32 is_ht_rate;
3384 __le32 enable_retry;
3385 __le32 rate;
3386 __le32 retry_count;
3387 } rate_entry[4];
3388 u8 multicast_rate;
3389 u8 multicast_rate_type;
3390 u8 management_rate;
ba2d3587 3391} __packed;
088aab8b
LB		 3392
3393static int
3394mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3395{
3396 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3397 int rc;
3398
3399 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3400 if (cmd == NULL)
3401 return -ENOMEM;
3402
3403 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3404 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3405 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3406 cmd->multicast_rate = mcast;
3407 cmd->management_rate = mgmt;
3408
3409 rc = mwl8k_post_cmd(hw, &cmd->header);
3410 kfree(cmd);
3411
3412 return rc;
3413}
3414
55489b6e
LB		 3415/*
3416 * CMD_ENABLE_SNIFFER.
3417 */
3418struct mwl8k_cmd_enable_sniffer {
3419 struct mwl8k_cmd_pkt header;
3420 __le32 action;
ba2d3587 3421} __packed;
55489b6e
LB		 3422
3423static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3424{
3425 struct mwl8k_cmd_enable_sniffer *cmd;
3426 int rc;
3427
3428 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3429 if (cmd == NULL)
3430 return -ENOMEM;
3431
3432 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3433 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3434 cmd->action = cpu_to_le32(!!enable);
3435
3436 rc = mwl8k_post_cmd(hw, &cmd->header);
3437 kfree(cmd);
3438
3439 return rc;
3440}
3441
197a4e4e 3442struct mwl8k_cmd_update_mac_addr {
55489b6e
LB		 3443 struct mwl8k_cmd_pkt header;
3444 union {
3445 struct {
3446 __le16 mac_type;
3447 __u8 mac_addr[ETH_ALEN];
3448 } mbss;
3449 __u8 mac_addr[ETH_ALEN];
3450 };
ba2d3587 3451} __packed;
55489b6e 3452
ee0ddf18
LB		 3453#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3454#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3455#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3456#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3457
197a4e4e
YAP		 3458static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
3459 struct ieee80211_vif *vif, u8 *mac, bool set)
55489b6e
LB		 3460{
3461 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3462 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
197a4e4e 3463 struct mwl8k_cmd_update_mac_addr *cmd;
ee0ddf18 3464 int mac_type;
55489b6e
LB		 3465 int rc;
3466
ee0ddf18
LB		 3467 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3468 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3469 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3470 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3471 else
3472 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3473 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3474 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3475 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3476 else
3477 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3478 }
3479
55489b6e
LB		 3480 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3481 if (cmd == NULL)
3482 return -ENOMEM;
3483
197a4e4e
YAP		 3484 if (set)
3485 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3486 else
3487 cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
3488
55489b6e
LB		 3489 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3490 if (priv->ap_fw) {
ee0ddf18 3491 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3492 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3493 } else {
3494 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3495 }
3496
aa21d0f6 3497 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3498 kfree(cmd);
3499
3500 return rc;
3501}
3502
197a4e4e
YAP		 3503/*
3504 * MWL8K_CMD_SET_MAC_ADDR.
3505 */
3506static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3507 struct ieee80211_vif *vif, u8 *mac)
3508{
3509 return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
3510}
3511
3512/*
3513 * MWL8K_CMD_DEL_MAC_ADDR.
3514 */
3515static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
3516 struct ieee80211_vif *vif, u8 *mac)
3517{
3518 return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
3519}
3520
55489b6e
LB		 3521/*
3522 * CMD_SET_RATEADAPT_MODE.
3523 */
3524struct mwl8k_cmd_set_rate_adapt_mode {
3525 struct mwl8k_cmd_pkt header;
3526 __le16 action;
3527 __le16 mode;
ba2d3587 3528} __packed;
55489b6e
LB		 3529
3530static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3531{
3532 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3533 int rc;
3534
3535 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3536 if (cmd == NULL)
3537 return -ENOMEM;
3538
3539 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3540 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3541 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3542 cmd->mode = cpu_to_le16(mode);
3543
3544 rc = mwl8k_post_cmd(hw, &cmd->header);
3545 kfree(cmd);
3546
3547 return rc;
3548}
3549
3aefc37e
NS		 3550/*
3551 * CMD_GET_WATCHDOG_BITMAP.
3552 */
3553struct mwl8k_cmd_get_watchdog_bitmap {
3554 struct mwl8k_cmd_pkt header;
3555 u8 bitmap;
3556} __packed;
3557
3558static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3559{
3560 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3561 int rc;
3562
3563 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3564 if (cmd == NULL)
3565 return -ENOMEM;
3566
3567 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3568 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3569
3570 rc = mwl8k_post_cmd(hw, &cmd->header);
3571 if (!rc)
3572 *bitmap = cmd->bitmap;
3573
3574 kfree(cmd);
3575
3576 return rc;
3577}
3578
3579#define INVALID_BA 0xAA
3580static void mwl8k_watchdog_ba_events(struct work_struct *work)
3581{
3582 int rc;
3583 u8 bitmap = 0, stream_index;
3584 struct mwl8k_ampdu_stream *streams;
3585 struct mwl8k_priv *priv =
3586 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3587
3588 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3589 if (rc)
3590 return;
3591
3592 if (bitmap == INVALID_BA)
3593 return;
3594
3595 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3596 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3597
3598 BUG_ON(stream_index >= priv->num_ampdu_queues);
3599
3600 streams = &priv->ampdu[stream_index];
3601
3602 if (streams->state == AMPDU_STREAM_ACTIVE)
3603 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3604
3605 return;
3606}
3607
3608
b64fe619
LB		 3609/*
3610 * CMD_BSS_START.
3611 */
3612struct mwl8k_cmd_bss_start {
3613 struct mwl8k_cmd_pkt header;
3614 __le32 enable;
ba2d3587 3615} __packed;
b64fe619 3616
aa21d0f6
LB		 3617static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3618 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3619{
3620 struct mwl8k_cmd_bss_start *cmd;
3621 int rc;
3622
3623 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3624 if (cmd == NULL)
3625 return -ENOMEM;
3626
3627 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3628 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3629 cmd->enable = cpu_to_le32(enable);
3630
aa21d0f6 3631 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3632 kfree(cmd);
3633
3634 return rc;
3635}
3636
5faa1aff
NS		 3637/*
3638 * CMD_BASTREAM.
3639 */
3640
3641/*
3642 * UPSTREAM is tx direction
3643 */
3644#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3645#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3646
ba30c4a5 3647enum ba_stream_action_type {
5faa1aff
NS		 3648 MWL8K_BA_CREATE,
3649 MWL8K_BA_UPDATE,
3650 MWL8K_BA_DESTROY,
3651 MWL8K_BA_FLUSH,
3652 MWL8K_BA_CHECK,
ba30c4a5 3653};
5faa1aff
NS		 3654
3655
3656struct mwl8k_create_ba_stream {
3657 __le32 flags;
3658 __le32 idle_thrs;
3659 __le32 bar_thrs;
3660 __le32 window_size;
3661 u8 peer_mac_addr[6];
3662 u8 dialog_token;
3663 u8 tid;
3664 u8 queue_id;
3665 u8 param_info;
3666 __le32 ba_context;
3667 u8 reset_seq_no_flag;
3668 __le16 curr_seq_no;
3669 u8 sta_src_mac_addr[6];
3670} __packed;
3671
3672struct mwl8k_destroy_ba_stream {
3673 __le32 flags;
3674 __le32 ba_context;
3675} __packed;
3676
3677struct mwl8k_cmd_bastream {
3678 struct mwl8k_cmd_pkt header;
3679 __le32 action;
3680 union {
3681 struct mwl8k_create_ba_stream create_params;
3682 struct mwl8k_destroy_ba_stream destroy_params;
3683 };
3684} __packed;
3685
3686static int
3687mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
3688{
3689 struct mwl8k_cmd_bastream *cmd;
3690 int rc;
3691
3692 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3693 if (cmd == NULL)
3694 return -ENOMEM;
3695
3696 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3697 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3698
3699 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3700
3701 cmd->create_params.queue_id = stream->idx;
3702 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3703 ETH_ALEN);
3704 cmd->create_params.tid = stream->tid;
3705
3706 cmd->create_params.flags =
3707 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3708 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3709
3710 rc = mwl8k_post_cmd(hw, &cmd->header);
3711
3712 kfree(cmd);
3713
3714 return rc;
3715}
3716
3717static int
3718mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3719 u8 buf_size)
3720{
3721 struct mwl8k_cmd_bastream *cmd;
3722 int rc;
3723
3724 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3725 if (cmd == NULL)
3726 return -ENOMEM;
3727
3728
3729 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3730 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3731
3732 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3733
3734 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3735 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3736 cmd->create_params.queue_id = stream->idx;
3737
3738 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3739 cmd->create_params.tid = stream->tid;
3740 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3741 cmd->create_params.reset_seq_no_flag = 1;
3742
3743 cmd->create_params.param_info =
3744 (stream->sta->ht_cap.ampdu_factor &
3745 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3746 ((stream->sta->ht_cap.ampdu_density << 2) &
3747 IEEE80211_HT_AMPDU_PARM_DENSITY);
3748
3749 cmd->create_params.flags =
3750 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3751 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3752
3753 rc = mwl8k_post_cmd(hw, &cmd->header);
3754
3755 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3756 stream->sta->addr, stream->tid);
3757 kfree(cmd);
3758
3759 return rc;
3760}
3761
3762static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3763 struct mwl8k_ampdu_stream *stream)
3764{
3765 struct mwl8k_cmd_bastream *cmd;
3766
3767 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3768 if (cmd == NULL)
3769 return;
3770
3771 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3772 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3773 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3774
3775 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3776 mwl8k_post_cmd(hw, &cmd->header);
3777
3778 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3779
3780 kfree(cmd);
3781}
3782
3f5610ff
LB		 3783/*
3784 * CMD_SET_NEW_STN.
3785 */
3786struct mwl8k_cmd_set_new_stn {
3787 struct mwl8k_cmd_pkt header;
3788 __le16 aid;
3789 __u8 mac_addr[6];
3790 __le16 stn_id;
3791 __le16 action;
3792 __le16 rsvd;
3793 __le32 legacy_rates;
3794 __u8 ht_rates[4];
3795 __le16 cap_info;
3796 __le16 ht_capabilities_info;
3797 __u8 mac_ht_param_info;
3798 __u8 rev;
3799 __u8 control_channel;
3800 __u8 add_channel;
3801 __le16 op_mode;
3802 __le16 stbc;
3803 __u8 add_qos_info;
3804 __u8 is_qos_sta;
3805 __le32 fw_sta_ptr;
ba2d3587 3806} __packed;
3f5610ff
LB		 3807
3808#define MWL8K_STA_ACTION_ADD 0
3809#define MWL8K_STA_ACTION_REMOVE 2
3810
3811static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3812 struct ieee80211_vif *vif,
3813 struct ieee80211_sta *sta)
3814{
3815 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3816 u32 rates;
3f5610ff
LB		 3817 int rc;
3818
3819 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3820 if (cmd == NULL)
3821 return -ENOMEM;
3822
3823 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3824 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3825 cmd->aid = cpu_to_le16(sta->aid);
3826 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3827 cmd->stn_id = cpu_to_le16(sta->aid);
3828 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3829 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3830 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3831 else
3832 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3833 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3834 if (sta->ht_cap.ht_supported) {
3835 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3836 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3837 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3838 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3839 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3840 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3841 ((sta->ht_cap.ampdu_density & 7) << 2);
3842 cmd->is_qos_sta = 1;
3843 }
3844
aa21d0f6 3845 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3846 kfree(cmd);
3847
3848 return rc;
3849}
3850
b64fe619
LB		 3851static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3852 struct ieee80211_vif *vif)
3853{
3854 struct mwl8k_cmd_set_new_stn *cmd;
3855 int rc;
3856
3857 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3858 if (cmd == NULL)
3859 return -ENOMEM;
3860
3861 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3862 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3863 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3864
aa21d0f6 3865 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3866 kfree(cmd);
3867
3868 return rc;
3869}
3870
3f5610ff
LB		 3871static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3872 struct ieee80211_vif *vif, u8 *addr)
3873{
3874 struct mwl8k_cmd_set_new_stn *cmd;
3875 int rc;
3876
3877 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3878 if (cmd == NULL)
3879 return -ENOMEM;
3880
3881 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3882 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3883 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3884 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3885
aa21d0f6 3886 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3887 kfree(cmd);
3888
3889 return rc;
3890}
3891
fcdc403c
NS		 3892/*
3893 * CMD_UPDATE_ENCRYPTION.
3894 */
3895
3896#define MAX_ENCR_KEY_LENGTH 16
3897#define MIC_KEY_LENGTH 8
3898
3899struct mwl8k_cmd_update_encryption {
3900 struct mwl8k_cmd_pkt header;
3901
3902 __le32 action;
3903 __le32 reserved;
3904 __u8 mac_addr[6];
3905 __u8 encr_type;
3906
ba30c4a5 3907} __packed;
fcdc403c
NS		 3908
3909struct mwl8k_cmd_set_key {
3910 struct mwl8k_cmd_pkt header;
3911
3912 __le32 action;
3913 __le32 reserved;
3914 __le16 length;
3915 __le16 key_type_id;
3916 __le32 key_info;
3917 __le32 key_id;
3918 __le16 key_len;
3919 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3920 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3921 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3922 __le16 tkip_rsc_low;
3923 __le32 tkip_rsc_high;
3924 __le16 tkip_tsc_low;
3925 __le32 tkip_tsc_high;
3926 __u8 mac_addr[6];
ba30c4a5 3927} __packed;
fcdc403c
NS		 3928
3929enum {
3930 MWL8K_ENCR_ENABLE,
3931 MWL8K_ENCR_SET_KEY,
3932 MWL8K_ENCR_REMOVE_KEY,
3933 MWL8K_ENCR_SET_GROUP_KEY,
3934};
3935
3936#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3937#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3938#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3939#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3940#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3941
3942enum {
3943 MWL8K_ALG_WEP,
3944 MWL8K_ALG_TKIP,
3945 MWL8K_ALG_CCMP,
3946};
3947
3948#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3949#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3950#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3951#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3952#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3953
3954static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3955 struct ieee80211_vif *vif,
3956 u8 *addr,
3957 u8 encr_type)
3958{
3959 struct mwl8k_cmd_update_encryption *cmd;
3960 int rc;
3961
3962 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3963 if (cmd == NULL)
3964 return -ENOMEM;
3965
3966 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3967 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3968 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3969 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3970 cmd->encr_type = encr_type;
3971
3972 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3973 kfree(cmd);
3974
3975 return rc;
3976}
3977
3978static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3979 u8 *addr,
3980 struct ieee80211_key_conf *key)
3981{
3982 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3983 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3984 cmd->length = cpu_to_le16(sizeof(*cmd) -
3985 offsetof(struct mwl8k_cmd_set_key, length));
3986 cmd->key_id = cpu_to_le32(key->keyidx);
3987 cmd->key_len = cpu_to_le16(key->keylen);
3988 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3989
3990 switch (key->cipher) {
3991 case WLAN_CIPHER_SUITE_WEP40:
3992 case WLAN_CIPHER_SUITE_WEP104:
3993 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3994 if (key->keyidx == 0)
3995 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3996
3997 break;
3998 case WLAN_CIPHER_SUITE_TKIP:
3999 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
4000 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4001 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4002 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4003 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
4004 | MWL8K_KEY_FLAG_TSC_VALID);
4005 break;
4006 case WLAN_CIPHER_SUITE_CCMP:
4007 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
4008 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4009 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4010 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4011 break;
4012 default:
4013 return -ENOTSUPP;
4014 }
4015
4016 return 0;
4017}
4018
4019static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
4020 struct ieee80211_vif *vif,
4021 u8 *addr,
4022 struct ieee80211_key_conf *key)
4023{
4024 struct mwl8k_cmd_set_key *cmd;
4025 int rc;
4026 int keymlen;
4027 u32 action;
4028 u8 idx;
4029 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4030
4031 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4032 if (cmd == NULL)
4033 return -ENOMEM;
4034
4035 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4036 if (rc < 0)
4037 goto done;
4038
4039 idx = key->keyidx;
4040
4041 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4042 action = MWL8K_ENCR_SET_KEY;
4043 else
4044 action = MWL8K_ENCR_SET_GROUP_KEY;
4045
4046 switch (key->cipher) {
4047 case WLAN_CIPHER_SUITE_WEP40:
4048 case WLAN_CIPHER_SUITE_WEP104:
4049 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
4050 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
4051 sizeof(*key) + key->keylen);
4052 mwl8k_vif->wep_key_conf[idx].enabled = 1;
4053 }
4054
9b571e24 4055 keymlen = key->keylen;
fcdc403c
NS		 4056 action = MWL8K_ENCR_SET_KEY;
4057 break;
4058 case WLAN_CIPHER_SUITE_TKIP:
4059 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
4060 break;
4061 case WLAN_CIPHER_SUITE_CCMP:
4062 keymlen = key->keylen;
4063 break;
4064 default:
4065 rc = -ENOTSUPP;
4066 goto done;
4067 }
4068
4069 memcpy(cmd->key_material, key->key, keymlen);
4070 cmd->action = cpu_to_le32(action);
4071
4072 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4073done:
4074 kfree(cmd);
4075
4076 return rc;
4077}
4078
4079static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
4080 struct ieee80211_vif *vif,
4081 u8 *addr,
4082 struct ieee80211_key_conf *key)
4083{
4084 struct mwl8k_cmd_set_key *cmd;
4085 int rc;
4086 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4087
4088 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4089 if (cmd == NULL)
4090 return -ENOMEM;
4091
4092 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4093 if (rc < 0)
4094 goto done;
4095
4096 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
d981e059 4097 key->cipher == WLAN_CIPHER_SUITE_WEP104)
fcdc403c
NS		 4098 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4099
4100 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4101
4102 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4103done:
4104 kfree(cmd);
4105
4106 return rc;
4107}
4108
4109static int mwl8k_set_key(struct ieee80211_hw *hw,
4110 enum set_key_cmd cmd_param,
4111 struct ieee80211_vif *vif,
4112 struct ieee80211_sta *sta,
4113 struct ieee80211_key_conf *key)
4114{
4115 int rc = 0;
4116 u8 encr_type;
4117 u8 *addr;
4118 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4119
4120 if (vif->type == NL80211_IFTYPE_STATION)
4121 return -EOPNOTSUPP;
4122
4123 if (sta == NULL)
ff7e9f99 4124 addr = vif->addr;
fcdc403c
NS		 4125 else
4126 addr = sta->addr;
4127
4128 if (cmd_param == SET_KEY) {
fcdc403c
NS		 4129 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4130 if (rc)
4131 goto out;
4132
4133 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4134 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4135 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4136 else
4137 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4138
4139 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4140 encr_type);
4141 if (rc)
4142 goto out;
4143
4144 mwl8k_vif->is_hw_crypto_enabled = true;
4145
4146 } else {
4147 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4148
4149 if (rc)
4150 goto out;
fcdc403c
NS		 4151 }
4152out:
4153 return rc;
4154}
4155
55489b6e
LB		 4156/*
4157 * CMD_UPDATE_STADB.
4158 */
25d81b1e
LB		 4159struct ewc_ht_info {
4160 __le16 control1;
4161 __le16 control2;
4162 __le16 control3;
ba2d3587 4163} __packed;
25d81b1e
LB		 4164
4165struct peer_capability_info {
4166 /* Peer type - AP vs. STA. */
4167 __u8 peer_type;
4168
4169 /* Basic 802.11 capabilities from assoc resp. */
4170 __le16 basic_caps;
4171
4172 /* Set if peer supports 802.11n high throughput (HT). */
4173 __u8 ht_support;
4174
4175 /* Valid if HT is supported. */
4176 __le16 ht_caps;
4177 __u8 extended_ht_caps;
4178 struct ewc_ht_info ewc_info;
4179
4180 /* Legacy rate table. Intersection of our rates and peer rates. */
4181 __u8 legacy_rates[12];
4182
4183 /* HT rate table. Intersection of our rates and peer rates. */
4184 __u8 ht_rates[16];
4185 __u8 pad[16];
4186
4187 /* If set, interoperability mode, no proprietary extensions. */
4188 __u8 interop;
4189 __u8 pad2;
4190 __u8 station_id;
4191 __le16 amsdu_enabled;
ba2d3587 4192} __packed;
25d81b1e 4193
55489b6e
LB		 4194struct mwl8k_cmd_update_stadb {
4195 struct mwl8k_cmd_pkt header;
4196
4197 /* See STADB_ACTION_TYPE */
4198 __le32 action;
4199
4200 /* Peer MAC address */
4201 __u8 peer_addr[ETH_ALEN];
4202
4203 __le32 reserved;
4204
4205 /* Peer info - valid during add/update. */
4206 struct peer_capability_info peer_info;
ba2d3587 4207} __packed;
55489b6e 4208
a680400e
LB		 4209#define MWL8K_STA_DB_MODIFY_ENTRY 1
4210#define MWL8K_STA_DB_DEL_ENTRY 2
4211
4212/* Peer Entry flags - used to define the type of the peer node */
4213#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4214
4215static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4216 struct ieee80211_vif *vif,
13935e2c 4217 struct ieee80211_sta *sta)
55489b6e 4218{
55489b6e 4219 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4220 struct peer_capability_info *p;
8707d026 4221 u32 rates;
55489b6e
LB		 4222 int rc;
4223
4224 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4225 if (cmd == NULL)
4226 return -ENOMEM;
4227
4228 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4229 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4230 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4231 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4232
a680400e
LB		 4233 p = &cmd->peer_info;
4234 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4235 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4236 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4237 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4238 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4239 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4240 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4241 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4242 else
4243 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4244 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4245 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4246 p->interop = 1;
4247 p->amsdu_enabled = 0;
4248
4249 rc = mwl8k_post_cmd(hw, &cmd->header);
4250 kfree(cmd);
4251
4252 return rc ? rc : p->station_id;
4253}
4254
4255static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4256 struct ieee80211_vif *vif, u8 *addr)
4257{
4258 struct mwl8k_cmd_update_stadb *cmd;
4259 int rc;
4260
4261 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4262 if (cmd == NULL)
4263 return -ENOMEM;
4264
4265 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4266 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4267 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4268 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4269
a680400e 4270 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4271 kfree(cmd);
4272
4273 return rc;
4274}
4275
a66098da
LB		 4276
4277/*
4278 * Interrupt handling.
4279 */
4280static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4281{
4282 struct ieee80211_hw *hw = dev_id;
4283 struct mwl8k_priv *priv = hw->priv;
4284 u32 status;
4285
4286 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4287 if (!status)
4288 return IRQ_NONE;
4289
1e9f9de3
LB		 4290 if (status & MWL8K_A2H_INT_TX_DONE) {
4291 status &= ~MWL8K_A2H_INT_TX_DONE;
4292 tasklet_schedule(&priv->poll_tx_task);
4293 }
4294
a66098da 4295 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4296 status &= ~MWL8K_A2H_INT_RX_READY;
4297 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4298 }
4299
3aefc37e
NS		 4300 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4301 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4302 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4303 }
4304
67e2eb27
LB		 4305 if (status)
4306 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4307
a66098da 4308 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4309 if (priv->hostcmd_wait != NULL)
a66098da 4310 complete(priv->hostcmd_wait);
a66098da
LB		 4311 }
4312
4313 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4314 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4315 priv->radio_on && priv->pending_tx_pkts)
618952a7 4316 mwl8k_tx_start(priv);
a66098da
LB		 4317 }
4318
4319 return IRQ_HANDLED;
4320}
4321
1e9f9de3
LB		 4322static void mwl8k_tx_poll(unsigned long data)
4323{
4324 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4325 struct mwl8k_priv *priv = hw->priv;
4326 int limit;
4327 int i;
4328
4329 limit = 32;
4330
4331 spin_lock_bh(&priv->tx_lock);
4332
e600707b 4333 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4334 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4335
4336 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4337 complete(priv->tx_wait);
4338 priv->tx_wait = NULL;
4339 }
4340
4341 spin_unlock_bh(&priv->tx_lock);
4342
4343 if (limit) {
4344 writel(~MWL8K_A2H_INT_TX_DONE,
4345 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4346 } else {
4347 tasklet_schedule(&priv->poll_tx_task);
4348 }
4349}
4350
67e2eb27
LB		 4351static void mwl8k_rx_poll(unsigned long data)
4352{
4353 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4354 struct mwl8k_priv *priv = hw->priv;
4355 int limit;
4356
4357 limit = 32;
4358 limit -= rxq_process(hw, 0, limit);
4359 limit -= rxq_refill(hw, 0, limit);
4360
4361 if (limit) {
4362 writel(~MWL8K_A2H_INT_RX_READY,
4363 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4364 } else {
4365 tasklet_schedule(&priv->poll_rx_task);
4366 }
4367}
4368
a66098da
LB		 4369
4370/*
4371 * Core driver operations.
4372 */
36323f81
TH		 4373static void mwl8k_tx(struct ieee80211_hw *hw,
4374 struct ieee80211_tx_control *control,
4375 struct sk_buff *skb)
a66098da
LB		 4376{
4377 struct mwl8k_priv *priv = hw->priv;
4378 int index = skb_get_queue_mapping(skb);
a66098da 4379
9189c100 4380 if (!priv->radio_on) {
c96c31e4
JP		 4381 wiphy_debug(hw->wiphy,
4382 "dropped TX frame since radio disabled\n");
a66098da 4383 dev_kfree_skb(skb);
7bb45683 4384 return;
a66098da
LB		 4385 }
4386
36323f81 4387 mwl8k_txq_xmit(hw, index, control->sta, skb);
a66098da
LB		 4388}
4389
a66098da
LB		 4390static int mwl8k_start(struct ieee80211_hw *hw)
4391{
a66098da
LB		 4392 struct mwl8k_priv *priv = hw->priv;
4393 int rc;
4394
a0607fd3 4395 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4396 IRQF_SHARED, MWL8K_NAME, hw);
4397 if (rc) {
bf3ca7f7 4398 priv->irq = -1;
5db55844 4399 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4400 return -EIO;
a66098da 4401 }
bf3ca7f7 4402 priv->irq = priv->pdev->irq;
a66098da 4403
67e2eb27 4404 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4405 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4406 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4407
a66098da 4408 /* Enable interrupts */
c23b5a69 4409 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
12488e01
NS		 4410 iowrite32(MWL8K_A2H_EVENTS,
4411 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 4412
2ec610cb
LB		 4413 rc = mwl8k_fw_lock(hw);
4414 if (!rc) {
55489b6e 4415 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4416
5e4cf166
LB		 4417 if (!priv->ap_fw) {
4418 if (!rc)
55489b6e 4419 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4420
5e4cf166
LB		 4421 if (!rc)
4422 rc = mwl8k_cmd_set_pre_scan(hw);
4423
4424 if (!rc)
4425 rc = mwl8k_cmd_set_post_scan(hw,
4426 "\x00\x00\x00\x00\x00\x00");
4427 }
2ec610cb
LB		 4428
4429 if (!rc)
55489b6e 4430 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4431
2ec610cb 4432 if (!rc)
55489b6e 4433 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4434
2ec610cb
LB		 4435 mwl8k_fw_unlock(hw);
4436 }
4437
4438 if (rc) {
4439 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4440 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4441 priv->irq = -1;
1e9f9de3 4442 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4443 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4444 }
a66098da
LB		 4445
4446 return rc;
4447}
4448
a66098da
LB		 4449static void mwl8k_stop(struct ieee80211_hw *hw)
4450{
a66098da
LB		 4451 struct mwl8k_priv *priv = hw->priv;
4452 int i;
4453
6b6accc3
YAP		 4454 if (!priv->hw_restart_in_progress)
4455 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4456
4457 ieee80211_stop_queues(hw);
4458
a66098da 4459 /* Disable interrupts */
a66098da 4460 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4461 if (priv->irq != -1) {
4462 free_irq(priv->pdev->irq, hw);
4463 priv->irq = -1;
4464 }
a66098da
LB		 4465
4466 /* Stop finalize join worker */
4467 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4468 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4469 if (priv->beacon_skb != NULL)
4470 dev_kfree_skb(priv->beacon_skb);
4471
67e2eb27 4472 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4473 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4474 tasklet_disable(&priv->poll_rx_task);
a66098da 4475
a66098da 4476 /* Return all skbs to mac80211 */
e600707b 4477 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4478 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4479}
4480
0863ade8
BC		 4481static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4482
a66098da 4483static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4484 struct ieee80211_vif *vif)
a66098da
LB		 4485{
4486 struct mwl8k_priv *priv = hw->priv;
4487 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4488 u32 macids_supported;
0863ade8
BC		 4489 int macid, rc;
4490 struct mwl8k_device_info *di;
a66098da 4491
a43c49a8
LB		 4492 /*
4493 * Reject interface creation if sniffer mode is active, as
4494 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4495 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4496 */
4497 if (priv->sniffer_enabled) {
c96c31e4
JP		 4498 wiphy_info(hw->wiphy,
4499 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4500 return -EINVAL;
4501 }
4502
0863ade8 4503 di = priv->device_info;
ee0ddf18
LB		 4504 switch (vif->type) {
4505 case NL80211_IFTYPE_AP:
0863ade8
BC		 4506 if (!priv->ap_fw && di->fw_image_ap) {
4507 /* we must load the ap fw to meet this request */
4508 if (!list_empty(&priv->vif_list))
4509 return -EBUSY;
4510 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4511 if (rc)
4512 return rc;
4513 }
ee0ddf18
LB		 4514 macids_supported = priv->ap_macids_supported;
4515 break;
4516 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4517 if (priv->ap_fw && di->fw_image_sta) {
4518 /* we must load the sta fw to meet this request */
4519 if (!list_empty(&priv->vif_list))
4520 return -EBUSY;
4521 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4522 if (rc)
4523 return rc;
4524 }
ee0ddf18
LB		 4525 macids_supported = priv->sta_macids_supported;
4526 break;
4527 default:
4528 return -EINVAL;
4529 }
4530
4531 macid = ffs(macids_supported & ~priv->macids_used);
4532 if (!macid--)
4533 return -EBUSY;
4534
f5bb87cf 4535 /* Setup driver private area. */
1ed32e4f 4536 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4537 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4538 mwl8k_vif->vif = vif;
ee0ddf18 4539 mwl8k_vif->macid = macid;
a66098da 4540 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4541 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4542 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4543
aa21d0f6
LB		 4544 /* Set the mac address. */
4545 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4546
4547 if (priv->ap_fw)
4548 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4549
ee0ddf18 4550 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4551 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4552
4553 return 0;
4554}
4555
6b6accc3
YAP		 4556static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
4557{
4558 /* Has ieee80211_restart_hw re-added the removed interfaces? */
4559 if (!priv->macids_used)
4560 return;
4561
4562 priv->macids_used &= ~(1 << vif->macid);
4563 list_del(&vif->list);
4564}
4565
a66098da 4566static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4567 struct ieee80211_vif *vif)
a66098da
LB		 4568{
4569 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4570 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4571
b64fe619
LB		 4572 if (priv->ap_fw)
4573 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4574
197a4e4e 4575 mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
32060e1b 4576
6b6accc3
YAP		 4577 mwl8k_remove_vif(priv, mwl8k_vif);
4578}
4579
4580static void mwl8k_hw_restart_work(struct work_struct *work)
4581{
4582 struct mwl8k_priv *priv =
4583 container_of(work, struct mwl8k_priv, fw_reload);
4584 struct ieee80211_hw *hw = priv->hw;
4585 struct mwl8k_device_info *di;
4586 int rc;
4587
4588 /* If some command is waiting for a response, clear it */
4589 if (priv->hostcmd_wait != NULL) {
4590 complete(priv->hostcmd_wait);
4591 priv->hostcmd_wait = NULL;
4592 }
4593
4594 priv->hw_restart_owner = current;
4595 di = priv->device_info;
4596 mwl8k_fw_lock(hw);
4597
4598 if (priv->ap_fw)
4599 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4600 else
4601 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4602
4603 if (rc)
4604 goto fail;
4605
4606 priv->hw_restart_owner = NULL;
4607 priv->hw_restart_in_progress = false;
4608
4609 /*
4610 * This unlock will wake up the queues and
4611 * also opens the command path for other
4612 * commands
4613 */
4614 mwl8k_fw_unlock(hw);
4615
4616 ieee80211_restart_hw(hw);
4617
4618 wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
4619
4620 return;
4621fail:
4622 mwl8k_fw_unlock(hw);
4623
4624 wiphy_err(hw->wiphy, "Firmware restart failed\n");
a66098da
LB		 4625}
4626
ee03a932 4627static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4628{
a66098da
LB		 4629 struct ieee80211_conf *conf = &hw->conf;
4630 struct mwl8k_priv *priv = hw->priv;
ee03a932 4631 int rc;
a66098da 4632
7595d67a 4633 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4634 mwl8k_cmd_radio_disable(hw);
ee03a932 4635 return 0;
7595d67a
LB		 4636 }
4637
ee03a932
LB		 4638 rc = mwl8k_fw_lock(hw);
4639 if (rc)
4640 return rc;
a66098da 4641
55489b6e 4642 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4643 if (rc)
4644 goto out;
a66098da 4645
610677d2 4646 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4647 if (rc)
4648 goto out;
4649
a66098da
LB		 4650 if (conf->power_level > 18)
4651 conf->power_level = 18;
a66098da 4652
08b06347 4653 if (priv->ap_fw) {
03217087
NS		 4654
4655 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4656 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4657 if (rc)
4658 goto out;
4659 }
41fdf097 4660
da62b761
NS		 4661 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4662 if (rc)
4663 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4664 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4665 if (rc)
4666 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4667
08b06347 4668 } else {
41fdf097
NS		 4669 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4670 if (rc)
4671 goto out;
08b06347
LB		 4672 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4673 }
a66098da 4674
ee03a932
LB		 4675out:
4676 mwl8k_fw_unlock(hw);
a66098da 4677
ee03a932 4678 return rc;
a66098da
LB		 4679}
4680
b64fe619
LB		 4681static void
4682mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4683 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4684{
a66098da 4685 struct mwl8k_priv *priv = hw->priv;
ba30c4a5 4686 u32 ap_legacy_rates = 0;
13935e2c 4687 u8 ap_mcs_rates[16];
3a980d0a
LB		 4688 int rc;
4689
c3cbbe8a 4690 if (mwl8k_fw_lock(hw))
3a980d0a 4691 return;
a66098da 4692
c3cbbe8a
LB		 4693 /*
4694 * No need to capture a beacon if we're no longer associated.
4695 */
4696 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4697 priv->capture_beacon = false;
3a980d0a 4698
c3cbbe8a 4699 /*
13935e2c 4700 * Get the AP's legacy and MCS rates.
c3cbbe8a 4701 */
7dc6a7a7 4702 if (vif->bss_conf.assoc) {
c6e96010 4703 struct ieee80211_sta *ap;
c97470dd 4704
c6e96010 4705 rcu_read_lock();
c6e96010 4706
c3cbbe8a
LB		 4707 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4708 if (ap == NULL) {
4709 rcu_read_unlock();
c6e96010 4710 goto out;
c3cbbe8a
LB		 4711 }
4712
8707d026
LB		 4713 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4714 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4715 } else {
4716 ap_legacy_rates =
4717 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4718 }
13935e2c 4719 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4720
4721 rcu_read_unlock();
4722 }
c6e96010 4723
c3cbbe8a 4724 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4725 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4726 if (rc)
4727 goto out;
a66098da 4728
b71ed2c6 4729 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4730 if (rc)
4731 goto out;
c3cbbe8a 4732 }
a66098da 4733
c3cbbe8a 4734 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4735 rc = mwl8k_set_radio_preamble(hw,
4736 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4737 if (rc)
4738 goto out;
c3cbbe8a 4739 }
a66098da 4740
c3cbbe8a 4741 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4742 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4743 if (rc)
4744 goto out;
c3cbbe8a 4745 }
a66098da 4746
c97470dd
LB		 4747 if (vif->bss_conf.assoc &&
4748 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4749 BSS_CHANGED_HT))) {
c3cbbe8a 4750 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4751 if (rc)
4752 goto out;
c3cbbe8a 4753 }
a66098da 4754
c3cbbe8a
LB		 4755 if (vif->bss_conf.assoc &&
4756 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4757 /*
4758 * Finalize the join. Tell rx handler to process
4759 * next beacon from our BSSID.
4760 */
0a11dfc3 4761 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4762 priv->capture_beacon = true;
a66098da
LB		 4763 }
4764
3a980d0a
LB		 4765out:
4766 mwl8k_fw_unlock(hw);
a66098da
LB		 4767}
4768
b64fe619
LB		 4769static void
4770mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4771 struct ieee80211_bss_conf *info, u32 changed)
4772{
4773 int rc;
4774
4775 if (mwl8k_fw_lock(hw))
4776 return;
4777
4778 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4779 rc = mwl8k_set_radio_preamble(hw,
4780 vif->bss_conf.use_short_preamble);
4781 if (rc)
4782 goto out;
4783 }
4784
4785 if (changed & BSS_CHANGED_BASIC_RATES) {
4786 int idx;
4787 int rate;
4788
4789 /*
4790 * Use lowest supported basic rate for multicasts
4791 * and management frames (such as probe responses --
4792 * beacons will always go out at 1 Mb/s).
4793 */
4794 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4795 if (idx)
4796 idx--;
4797
4798 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4799 rate = mwl8k_rates_24[idx].hw_value;
4800 else
4801 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4802
4803 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4804 }
4805
4806 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4807 struct sk_buff *skb;
4808
4809 skb = ieee80211_beacon_get(hw, vif);
4810 if (skb != NULL) {
aa21d0f6 4811 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4812 kfree_skb(skb);
4813 }
4814 }
4815
4816 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4817 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4818
4819out:
4820 mwl8k_fw_unlock(hw);
4821}
4822
4823static void
4824mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4825 struct ieee80211_bss_conf *info, u32 changed)
4826{
4827 struct mwl8k_priv *priv = hw->priv;
4828
4829 if (!priv->ap_fw)
4830 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4831 else
4832 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4833}
4834
e81cd2d6 4835static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4836 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4837{
4838 struct mwl8k_cmd_pkt *cmd;
4839
447ced07
LB		 4840 /*
4841 * Synthesize and return a command packet that programs the
4842 * hardware multicast address filter. At this point we don't
4843 * know whether FIF_ALLMULTI is being requested, but if it is,
4844 * we'll end up throwing this packet away and creating a new
4845 * one in mwl8k_configure_filter().
4846 */
22bedad3 4847 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4848
4849 return (unsigned long)cmd;
4850}
4851
a43c49a8
LB		 4852static int
4853mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4854 unsigned int changed_flags,
4855 unsigned int *total_flags)
4856{
4857 struct mwl8k_priv *priv = hw->priv;
4858
4859 /*
4860 * Hardware sniffer mode is mutually exclusive with STA
4861 * operation, so refuse to enable sniffer mode if a STA
4862 * interface is active.
4863 */
f5bb87cf 4864 if (!list_empty(&priv->vif_list)) {
a43c49a8 4865 if (net_ratelimit())
c96c31e4
JP		 4866 wiphy_info(hw->wiphy,
4867 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4868 return 0;
4869 }
4870
4871 if (!priv->sniffer_enabled) {
55489b6e 4872 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4873 return 0;
4874 priv->sniffer_enabled = true;
4875 }
4876
4877 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4878 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4879 FIF_OTHER_BSS;
4880
4881 return 1;
4882}
4883
f5bb87cf
LB		 4884static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4885{
4886 if (!list_empty(&priv->vif_list))
4887 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4888
4889 return NULL;
4890}
4891
e6935ea1
LB		 4892static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4893 unsigned int changed_flags,
4894 unsigned int *total_flags,
4895 u64 multicast)
4896{
4897 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4898 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4899
c0adae2c
LB		 4900 /*
4901 * AP firmware doesn't allow fine-grained control over
4902 * the receive filter.
4903 */
4904 if (priv->ap_fw) {
4905 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4906 kfree(cmd);
4907 return;
4908 }
4909
a43c49a8
LB		 4910 /*
4911 * Enable hardware sniffer mode if FIF_CONTROL or
4912 * FIF_OTHER_BSS is requested.
4913 */
4914 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4915 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4916 kfree(cmd);
4917 return;
4918 }
a66098da 4919
e6935ea1 4920 /* Clear unsupported feature flags */
447ced07 4921 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4922
90852f7a
LB		 4923 if (mwl8k_fw_lock(hw)) {
4924 kfree(cmd);
e6935ea1 4925 return;
90852f7a 4926 }
a66098da 4927
a43c49a8 4928 if (priv->sniffer_enabled) {
55489b6e 4929 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4930 priv->sniffer_enabled = false;
4931 }
4932
e6935ea1 4933 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4934 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4935 /*
4936 * Disable the BSS filter.
4937 */
e6935ea1 4938 mwl8k_cmd_set_pre_scan(hw);
77165d88 4939 } else {
f5bb87cf 4940 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4941 const u8 *bssid;
a94cc97e 4942
77165d88
LB		 4943 /*
4944 * Enable the BSS filter.
4945 *
4946 * If there is an active STA interface, use that
4947 * interface's BSSID, otherwise use a dummy one
4948 * (where the OUI part needs to be nonzero for
4949 * the BSSID to be accepted by POST_SCAN).
4950 */
f5bb87cf
LB		 4951 mwl8k_vif = mwl8k_first_vif(priv);
4952 if (mwl8k_vif != NULL)
4953 bssid = mwl8k_vif->vif->bss_conf.bssid;
4954 else
4955 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4956
e6935ea1 4957 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4958 }
4959 }
4960
447ced07
LB		 4961 /*
4962 * If FIF_ALLMULTI is being requested, throw away the command
4963 * packet that ->prepare_multicast() built and replace it with
4964 * a command packet that enables reception of all multicast
4965 * packets.
4966 */
4967 if (*total_flags & FIF_ALLMULTI) {
4968 kfree(cmd);
22bedad3 4969 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4970 }
4971
4972 if (cmd != NULL) {
4973 mwl8k_post_cmd(hw, cmd);
4974 kfree(cmd);
e6935ea1 4975 }
a66098da 4976
e6935ea1 4977 mwl8k_fw_unlock(hw);
a66098da
LB		 4978}
4979
a66098da
LB		 4980static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4981{
c2c2b12a 4982 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4983}
4984
4a6967b8
JB		 4985static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4986 struct ieee80211_vif *vif,
4987 struct ieee80211_sta *sta)
3f5610ff
LB		 4988{
4989 struct mwl8k_priv *priv = hw->priv;
4990
4a6967b8
JB		 4991 if (priv->ap_fw)
4992 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4993 else
4994 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4995}
4996
4a6967b8
JB		 4997static int mwl8k_sta_add(struct ieee80211_hw *hw,
4998 struct ieee80211_vif *vif,
4999 struct ieee80211_sta *sta)
bbfd9128
LB		 5000{
5001 struct mwl8k_priv *priv = hw->priv;
4a6967b8 5002 int ret;
fcdc403c
NS		 5003 int i;
5004 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
5005 struct ieee80211_key_conf *key;
bbfd9128 5006
4a6967b8
JB		 5007 if (!priv->ap_fw) {
5008 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
5009 if (ret >= 0) {
5010 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 5011 if (sta->ht_cap.ht_supported)
5012 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 5013 ret = 0;
4a6967b8 5014 }
bbfd9128 5015
d9a07d49
NS		 5016 } else {
5017 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 5018 }
4a6967b8 5019
d9a07d49
NS		 5020 for (i = 0; i < NUM_WEP_KEYS; i++) {
5021 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
5022 if (mwl8k_vif->wep_key_conf[i].enabled)
5023 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
5024 }
fcdc403c 5025 return ret;
bbfd9128
LB		 5026}
5027
8a3a3c85
EP		 5028static int mwl8k_conf_tx(struct ieee80211_hw *hw,
5029 struct ieee80211_vif *vif, u16 queue,
a66098da
LB		 5030 const struct ieee80211_tx_queue_params *params)
5031{
3e4f542c 5032 struct mwl8k_priv *priv = hw->priv;
a66098da 5033 int rc;
a66098da 5034
3e4f542c
LB		 5035 rc = mwl8k_fw_lock(hw);
5036 if (!rc) {
e600707b 5037 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 5038 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
5039
3e4f542c 5040 if (!priv->wmm_enabled)
55489b6e 5041 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 5042
85c9205c 5043 if (!rc) {
e600707b 5044 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 5045 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 5046 params->cw_min,
5047 params->cw_max,
5048 params->aifs,
5049 params->txop);
85c9205c 5050 }
3e4f542c
LB		 5051
5052 mwl8k_fw_unlock(hw);
a66098da 5053 }
3e4f542c 5054
a66098da
LB		 5055 return rc;
5056}
5057
a66098da
LB		 5058static int mwl8k_get_stats(struct ieee80211_hw *hw,
5059 struct ieee80211_low_level_stats *stats)
5060{
55489b6e 5061 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 5062}
5063
0d462bbb
JL		 5064static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
5065 struct survey_info *survey)
5066{
5067 struct mwl8k_priv *priv = hw->priv;
5068 struct ieee80211_conf *conf = &hw->conf;
5069
5070 if (idx != 0)
5071 return -ENOENT;
5072
5073 survey->channel = conf->channel;
5074 survey->filled = SURVEY_INFO_NOISE_DBM;
5075 survey->noise = priv->noise;
5076
5077 return 0;
5078}
5079
65f3ddcd
NS		 5080#define MAX_AMPDU_ATTEMPTS 5
5081
a2292d83
LB		 5082static int
5083mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5084 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 5085 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
5086 u8 buf_size)
a2292d83 5087{
65f3ddcd
NS		 5088
5089 int i, rc = 0;
5090 struct mwl8k_priv *priv = hw->priv;
5091 struct mwl8k_ampdu_stream *stream;
5092 u8 *addr = sta->addr;
fd712f5f 5093 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
65f3ddcd
NS		 5094
5095 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
5096 return -ENOTSUPP;
5097
5098 spin_lock(&priv->stream_lock);
5099 stream = mwl8k_lookup_stream(hw, addr, tid);
5100
a2292d83
LB		 5101 switch (action) {
5102 case IEEE80211_AMPDU_RX_START:
5103 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 5104 break;
5105 case IEEE80211_AMPDU_TX_START:
5106 /* By the time we get here the hw queues may contain outgoing
5107 * packets for this RA/TID that are not part of this BA
5108 * session. The hw will assign sequence numbers to these
5109 * packets as they go out. So if we query the hw for its next
5110 * sequence number and use that for the SSN here, it may end up
5111 * being wrong, which will lead to sequence number mismatch at
5112 * the recipient. To avoid this, we reset the sequence number
5113 * to O for the first MPDU in this BA stream.
5114 */
5115 *ssn = 0;
5116 if (stream == NULL) {
5117 /* This means that somebody outside this driver called
5118 * ieee80211_start_tx_ba_session. This is unexpected
5119 * because we do our own rate control. Just warn and
5120 * move on.
5121 */
5122 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
5123 "Proceeding anyway.\n", __func__);
5124 stream = mwl8k_add_stream(hw, sta, tid);
5125 }
5126 if (stream == NULL) {
5127 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
5128 rc = -EBUSY;
5129 break;
5130 }
5131 stream->state = AMPDU_STREAM_IN_PROGRESS;
5132
5133 /* Release the lock before we do the time consuming stuff */
5134 spin_unlock(&priv->stream_lock);
5135 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
fd712f5f
YAP		 5136
5137 /* Check if link is still valid */
5138 if (!sta_info->is_ampdu_allowed) {
5139 spin_lock(&priv->stream_lock);
5140 mwl8k_remove_stream(hw, stream);
5141 spin_unlock(&priv->stream_lock);
5142 return -EBUSY;
5143 }
5144
65f3ddcd
NS		 5145 rc = mwl8k_check_ba(hw, stream);
5146
6b6accc3
YAP		 5147 /* If HW restart is in progress mwl8k_post_cmd will
5148 * return -EBUSY. Avoid retrying mwl8k_check_ba in
5149 * such cases
5150 */
5151 if (!rc || rc == -EBUSY)
65f3ddcd
NS		 5152 break;
5153 /*
5154 * HW queues take time to be flushed, give them
5155 * sufficient time
5156 */
5157
5158 msleep(1000);
5159 }
5160 spin_lock(&priv->stream_lock);
5161 if (rc) {
5162 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5163 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5164 mwl8k_remove_stream(hw, stream);
5165 rc = -EBUSY;
5166 break;
5167 }
5168 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5169 break;
5170 case IEEE80211_AMPDU_TX_STOP:
eca107ff
YAP		 5171 if (stream) {
5172 if (stream->state == AMPDU_STREAM_ACTIVE) {
5173 spin_unlock(&priv->stream_lock);
5174 mwl8k_destroy_ba(hw, stream);
5175 spin_lock(&priv->stream_lock);
5176 }
5177 mwl8k_remove_stream(hw, stream);
65f3ddcd 5178 }
65f3ddcd
NS		 5179 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5180 break;
5181 case IEEE80211_AMPDU_TX_OPERATIONAL:
5182 BUG_ON(stream == NULL);
5183 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5184 spin_unlock(&priv->stream_lock);
5185 rc = mwl8k_create_ba(hw, stream, buf_size);
5186 spin_lock(&priv->stream_lock);
5187 if (!rc)
5188 stream->state = AMPDU_STREAM_ACTIVE;
5189 else {
5190 spin_unlock(&priv->stream_lock);
5191 mwl8k_destroy_ba(hw, stream);
5192 spin_lock(&priv->stream_lock);
5193 wiphy_debug(hw->wiphy,
5194 "Failed adding stream for sta %pM tid %d\n",
5195 addr, tid);
5196 mwl8k_remove_stream(hw, stream);
5197 }
5198 break;
5199
a2292d83 5200 default:
65f3ddcd 5201 rc = -ENOTSUPP;
a2292d83 5202 }
65f3ddcd
NS		 5203
5204 spin_unlock(&priv->stream_lock);
5205 return rc;
a2292d83
LB		 5206}
5207
a66098da
LB		 5208static const struct ieee80211_ops mwl8k_ops = {
5209 .tx = mwl8k_tx,
5210 .start = mwl8k_start,
5211 .stop = mwl8k_stop,
5212 .add_interface = mwl8k_add_interface,
5213 .remove_interface = mwl8k_remove_interface,
5214 .config = mwl8k_config,
a66098da 5215 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5216 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5217 .configure_filter = mwl8k_configure_filter,
fcdc403c 5218 .set_key = mwl8k_set_key,
a66098da 5219 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5220 .sta_add = mwl8k_sta_add,
5221 .sta_remove = mwl8k_sta_remove,
a66098da 5222 .conf_tx = mwl8k_conf_tx,
a66098da 5223 .get_stats = mwl8k_get_stats,
0d462bbb 5224 .get_survey = mwl8k_get_survey,
a2292d83 5225 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5226};
5227
a66098da
LB		 5228static void mwl8k_finalize_join_worker(struct work_struct *work)
5229{
5230 struct mwl8k_priv *priv =
5231 container_of(work, struct mwl8k_priv, finalize_join_worker);
5232 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5233 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5234 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5235 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5236 mgmt->u.beacon.variable, len);
5237 int dtim_period = 1;
5238
5239 if (tim && tim[1] >= 2)
5240 dtim_period = tim[3];
a66098da 5241
56007a02 5242 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5243
f5bb87cf 5244 dev_kfree_skb(skb);
a66098da
LB		 5245 priv->beacon_skb = NULL;
5246}
5247
bcb628d5 5248enum {
9e1b17ea
LB		 5249 MWL8363 = 0,
5250 MWL8687,
bcb628d5 5251 MWL8366,
6f6d1e9a
LB		 5252};
5253
8a7a578c 5254#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5255#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5256#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5257
bcb628d5 5258static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB		 5259 [MWL8363] = {
5260 .part_name = "88w8363",
5261 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5262 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5263 },
49eb691c 5264 [MWL8687] = {
bcb628d5
JL		 5265 .part_name = "88w8687",
5266 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5267 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5268 },
49eb691c 5269 [MWL8366] = {
bcb628d5
JL		 5270 .part_name = "88w8366",
5271 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5272 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5273 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5274 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5275 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5276 },
45a390dd
LB		 5277};
5278
c92d4ede
LB		 5279MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5280MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5281MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5282MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5283MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5284MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5285MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5286
45a390dd 5287static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5288 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5289 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5290 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5291 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5292 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5293 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5294 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5295 { },
45a390dd
LB		 5296};
5297MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5298
99020471
BC		 5299static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5300{
5301 int rc;
5302 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5303 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5304 priv->fw_pref, priv->fw_alt);
5305 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5306 if (rc) {
5307 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5308 pci_name(priv->pdev), priv->fw_alt);
5309 return rc;
5310 }
5311 return 0;
5312}
5313
5314static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5315static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5316{
5317 struct mwl8k_priv *priv = context;
5318 struct mwl8k_device_info *di = priv->device_info;
5319 int rc;
5320
5321 switch (priv->fw_state) {
5322 case FW_STATE_INIT:
5323 if (!fw) {
5324 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5325 pci_name(priv->pdev), di->helper_image);
5326 goto fail;
5327 }
5328 priv->fw_helper = fw;
5329 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5330 true);
5331 if (rc && priv->fw_alt) {
5332 rc = mwl8k_request_alt_fw(priv);
5333 if (rc)
5334 goto fail;
5335 priv->fw_state = FW_STATE_LOADING_ALT;
5336 } else if (rc)
5337 goto fail;
5338 else
5339 priv->fw_state = FW_STATE_LOADING_PREF;
5340 break;
5341
5342 case FW_STATE_LOADING_PREF:
5343 if (!fw) {
5344 if (priv->fw_alt) {
5345 rc = mwl8k_request_alt_fw(priv);
5346 if (rc)
5347 goto fail;
5348 priv->fw_state = FW_STATE_LOADING_ALT;
5349 } else
5350 goto fail;
5351 } else {
5352 priv->fw_ucode = fw;
5353 rc = mwl8k_firmware_load_success(priv);
5354 if (rc)
5355 goto fail;
5356 else
5357 complete(&priv->firmware_loading_complete);
5358 }
5359 break;
5360
5361 case FW_STATE_LOADING_ALT:
5362 if (!fw) {
5363 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5364 pci_name(priv->pdev), di->helper_image);
5365 goto fail;
5366 }
5367 priv->fw_ucode = fw;
5368 rc = mwl8k_firmware_load_success(priv);
5369 if (rc)
5370 goto fail;
5371 else
5372 complete(&priv->firmware_loading_complete);
5373 break;
5374
5375 default:
5376 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5377 MWL8K_NAME, priv->fw_state);
5378 BUG_ON(1);
5379 }
5380
5381 return;
5382
5383fail:
5384 priv->fw_state = FW_STATE_ERROR;
5385 complete(&priv->firmware_loading_complete);
5386 device_release_driver(&priv->pdev->dev);
5387 mwl8k_release_firmware(priv);
5388}
5389
6b6accc3 5390#define MAX_RESTART_ATTEMPTS 1
99020471
BC		 5391static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5392 bool nowait)
a66098da 5393{
3cc7772c 5394 struct mwl8k_priv *priv = hw->priv;
a66098da 5395 int rc;
6b6accc3 5396 int count = MAX_RESTART_ATTEMPTS;
be695fc4 5397
6b6accc3 5398retry:
be695fc4
LB		 5399 /* Reset firmware and hardware */
5400 mwl8k_hw_reset(priv);
5401
5402 /* Ask userland hotplug daemon for the device firmware */
99020471 5403 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5404 if (rc) {
5db55844 5405 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5406 return rc;
be695fc4
LB		 5407 }
5408
99020471
BC		 5409 if (nowait)
5410 return rc;
5411
be695fc4
LB		 5412 /* Load firmware into hardware */
5413 rc = mwl8k_load_firmware(hw);
3cc7772c 5414 if (rc)
5db55844 5415 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5416
5417 /* Reclaim memory once firmware is successfully loaded */
5418 mwl8k_release_firmware(priv);
5419
6b6accc3
YAP		 5420 if (rc && count) {
5421 /* FW did not start successfully;
5422 * lets try one more time
5423 */
5424 count--;
5425 wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
5426 msleep(20);
5427 goto retry;
5428 }
5429
3cc7772c
BC		 5430 return rc;
5431}
5432
73b46320
BC		 5433static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5434{
5435 struct mwl8k_priv *priv = hw->priv;
5436 int rc = 0;
5437 int i;
5438
e600707b 5439 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5440 rc = mwl8k_txq_init(hw, i);
5441 if (rc)
5442 break;
5443 if (priv->ap_fw)
5444 iowrite32(priv->txq[i].txd_dma,
5445 priv->sram + priv->txq_offset[i]);
5446 }
5447 return rc;
5448}
5449
3cc7772c
BC		 5450/* initialize hw after successfully loading a firmware image */
5451static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5452{
5453 struct mwl8k_priv *priv = hw->priv;
5454 int rc = 0;
5455 int i;
be695fc4 5456
91942230 5457 if (priv->ap_fw) {
89a91f4f 5458 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5459 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5460 wiphy_err(hw->wiphy,
5461 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5462 goto err_stop_firmware;
5463 }
5464 } else {
89a91f4f 5465 priv->rxd_ops = &rxd_sta_ops;
91942230 5466 }
be695fc4
LB		 5467
5468 priv->sniffer_enabled = false;
5469 priv->wmm_enabled = false;
5470 priv->pending_tx_pkts = 0;
5471
a66098da
LB		 5472 rc = mwl8k_rxq_init(hw, 0);
5473 if (rc)
3cc7772c 5474 goto err_stop_firmware;
a66098da
LB		 5475 rxq_refill(hw, 0, INT_MAX);
5476
73b46320
BC		 5477 /* For the sta firmware, we need to know the dma addresses of tx queues
5478 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5479 * prior to issuing this command. But for the AP case, we learn the
5480 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5481 * case we must initialize the tx queues after.
5482 */
8a7a578c 5483 priv->num_ampdu_queues = 0;
73b46320
BC		 5484 if (!priv->ap_fw) {
5485 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5486 if (rc)
5487 goto err_free_queues;
5488 }
5489
5490 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5491 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5492 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5493 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5494 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
12488e01
NS		 5495 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5496 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 5497
a0607fd3 5498 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5499 IRQF_SHARED, MWL8K_NAME, hw);
5500 if (rc) {
5db55844 5501 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5502 goto err_free_queues;
5503 }
5504
6b6accc3
YAP		 5505 /*
5506 * When hw restart is requested,
5507 * mac80211 will take care of clearing
5508 * the ampdu streams, so do not clear
5509 * the ampdu state here
5510 */
5511 if (!priv->hw_restart_in_progress)
5512 memset(priv->ampdu, 0, sizeof(priv->ampdu));
ac109fd0 5513
a66098da
LB		 5514 /*
5515 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5516 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5517 * interrupts when done.
5518 */
c23b5a69 5519 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5520
5521 /* Get config data, mac addrs etc */
42fba21d
LB		 5522 if (priv->ap_fw) {
5523 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5524 if (!rc)
5525 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5526 if (!rc)
5527 rc = mwl8k_cmd_set_hw_spec(hw);
5528 } else {
5529 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5530 }
a66098da 5531 if (rc) {
5db55844 5532 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5533 goto err_free_irq;
a66098da
LB		 5534 }
5535
5536 /* Turn radio off */
55489b6e 5537 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5538 if (rc) {
5db55844 5539 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5540 goto err_free_irq;
a66098da
LB		 5541 }
5542
32060e1b 5543 /* Clear MAC address */
aa21d0f6 5544 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5545 if (rc) {
5db55844 5546 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5547 goto err_free_irq;
32060e1b
LB		 5548 }
5549
a66098da 5550 /* Disable interrupts */
a66098da 5551 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5552 free_irq(priv->pdev->irq, hw);
5553
c96c31e4
JP		 5554 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5555 priv->device_info->part_name,
5556 priv->hw_rev, hw->wiphy->perm_addr,
5557 priv->ap_fw ? "AP" : "STA",
5558 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5559 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5560
5561 return 0;
5562
a66098da 5563err_free_irq:
a66098da 5564 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5565 free_irq(priv->pdev->irq, hw);
5566
5567err_free_queues:
e600707b 5568 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5569 mwl8k_txq_deinit(hw, i);
5570 mwl8k_rxq_deinit(hw, 0);
5571
3cc7772c
BC		 5572err_stop_firmware:
5573 mwl8k_hw_reset(priv);
5574
5575 return rc;
5576}
5577
5578/*
5579 * invoke mwl8k_reload_firmware to change the firmware image after the device
5580 * has already been registered
5581 */
5582static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5583{
5584 int i, rc = 0;
5585 struct mwl8k_priv *priv = hw->priv;
6b6accc3 5586 struct mwl8k_vif *vif, *tmp_vif;
3cc7772c
BC		 5587
5588 mwl8k_stop(hw);
5589 mwl8k_rxq_deinit(hw, 0);
5590
6b6accc3
YAP		 5591 /*
5592 * All the existing interfaces are re-added by the ieee80211_reconfig;
5593 * which means driver should remove existing interfaces before calling
5594 * ieee80211_restart_hw
5595 */
5596 if (priv->hw_restart_in_progress)
5597 list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
5598 mwl8k_remove_vif(priv, vif);
5599
e600707b 5600 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5601 mwl8k_txq_deinit(hw, i);
5602
99020471 5603 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5604 if (rc)
5605 goto fail;
5606
5607 rc = mwl8k_probe_hw(hw);
5608 if (rc)
5609 goto fail;
5610
6b6accc3
YAP		 5611 if (priv->hw_restart_in_progress)
5612 return rc;
5613
3cc7772c
BC		 5614 rc = mwl8k_start(hw);
5615 if (rc)
5616 goto fail;
5617
5618 rc = mwl8k_config(hw, ~0);
5619 if (rc)
5620 goto fail;
5621
e600707b 5622 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
8a3a3c85 5623 rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
3cc7772c
BC		 5624 if (rc)
5625 goto fail;
5626 }
5627
5628 return rc;
5629
5630fail:
5631 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5632 return rc;
5633}
5634
5d377fca
YAP		 5635static const struct ieee80211_iface_limit ap_if_limits[] = {
5636 { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
5637};
5638
5639static const struct ieee80211_iface_combination ap_if_comb = {
5640 .limits = ap_if_limits,
5641 .n_limits = ARRAY_SIZE(ap_if_limits),
5642 .max_interfaces = 8,
5643 .num_different_channels = 1,
5644};
5645
5646
3cc7772c
BC		 5647static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5648{
5649 struct ieee80211_hw *hw = priv->hw;
5650 int i, rc;
5651
99020471
BC		 5652 rc = mwl8k_load_firmware(hw);
5653 mwl8k_release_firmware(priv);
5654 if (rc) {
5655 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5656 return rc;
5657 }
5658
3cc7772c
BC		 5659 /*
5660 * Extra headroom is the size of the required DMA header
5661 * minus the size of the smallest 802.11 frame (CTS frame).
5662 */
5663 hw->extra_tx_headroom =
5664 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5665
ff776cec
YAP		 5666 hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
5667
3cc7772c
BC		 5668 hw->channel_change_time = 10;
5669
e600707b 5670 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5671
5672 /* Set rssi values to dBm */
0bf22c37 5673 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
2a36a0ec
YAP		 5674
5675 /*
5676 * Ask mac80211 to not to trigger PS mode
5677 * based on PM bit of incoming frames.
5678 */
5679 if (priv->ap_fw)
5680 hw->flags |= IEEE80211_HW_AP_LINK_PS;
5681
3cc7772c
BC		 5682 hw->vif_data_size = sizeof(struct mwl8k_vif);
5683 hw->sta_data_size = sizeof(struct mwl8k_sta);
5684
5685 priv->macids_used = 0;
5686 INIT_LIST_HEAD(&priv->vif_list);
5687
5688 /* Set default radio state and preamble */
3db1cd5c
RR		 5689 priv->radio_on = false;
5690 priv->radio_short_preamble = false;
3cc7772c
BC		 5691
5692 /* Finalize join worker */
5693 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5694 /* Handle watchdog ba events */
5695 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
6b6accc3
YAP		 5696 /* To reload the firmware if it crashes */
5697 INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
3cc7772c
BC		 5698
5699 /* TX reclaim and RX tasklets. */
5700 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5701 tasklet_disable(&priv->poll_tx_task);
5702 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5703 tasklet_disable(&priv->poll_rx_task);
5704
5705 /* Power management cookie */
5706 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5707 if (priv->cookie == NULL)
5708 return -ENOMEM;
5709
5710 mutex_init(&priv->fw_mutex);
5711 priv->fw_mutex_owner = NULL;
5712 priv->fw_mutex_depth = 0;
5713 priv->hostcmd_wait = NULL;
5714
5715 spin_lock_init(&priv->tx_lock);
5716
ac109fd0
BC		 5717 spin_lock_init(&priv->stream_lock);
5718
3cc7772c
BC		 5719 priv->tx_wait = NULL;
5720
5721 rc = mwl8k_probe_hw(hw);
5722 if (rc)
5723 goto err_free_cookie;
5724
5725 hw->wiphy->interface_modes = 0;
5d377fca
YAP		 5726
5727 if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
3cc7772c 5728 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5d377fca
YAP		 5729 hw->wiphy->iface_combinations = &ap_if_comb;
5730 hw->wiphy->n_iface_combinations = 1;
5731 }
5732
3cc7772c
BC		 5733 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5734 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5735
5736 rc = ieee80211_register_hw(hw);
5737 if (rc) {
5738 wiphy_err(hw->wiphy, "Cannot register device\n");
5739 goto err_unprobe_hw;
5740 }
5741
5742 return 0;
5743
5744err_unprobe_hw:
e600707b 5745 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5746 mwl8k_txq_deinit(hw, i);
5747 mwl8k_rxq_deinit(hw, 0);
5748
be695fc4 5749err_free_cookie:
a66098da
LB		 5750 if (priv->cookie != NULL)
5751 pci_free_consistent(priv->pdev, 4,
5752 priv->cookie, priv->cookie_dma);
5753
3cc7772c
BC		 5754 return rc;
5755}
5756static int __devinit mwl8k_probe(struct pci_dev *pdev,
5757 const struct pci_device_id *id)
5758{
5759 static int printed_version;
5760 struct ieee80211_hw *hw;
5761 struct mwl8k_priv *priv;
0863ade8 5762 struct mwl8k_device_info *di;
3cc7772c
BC		 5763 int rc;
5764
5765 if (!printed_version) {
5766 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5767 printed_version = 1;
5768 }
5769
5770
5771 rc = pci_enable_device(pdev);
5772 if (rc) {
5773 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5774 MWL8K_NAME);
5775 return rc;
5776 }
5777
5778 rc = pci_request_regions(pdev, MWL8K_NAME);
5779 if (rc) {
5780 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5781 MWL8K_NAME);
5782 goto err_disable_device;
5783 }
5784
5785 pci_set_master(pdev);
5786
5787
5788 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5789 if (hw == NULL) {
5790 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5791 rc = -ENOMEM;
5792 goto err_free_reg;
5793 }
5794
5795 SET_IEEE80211_DEV(hw, &pdev->dev);
5796 pci_set_drvdata(pdev, hw);
5797
5798 priv = hw->priv;
5799 priv->hw = hw;
5800 priv->pdev = pdev;
5801 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5802
5803
5804 priv->sram = pci_iomap(pdev, 0, 0x10000);
5805 if (priv->sram == NULL) {
5806 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5807 goto err_iounmap;
5808 }
5809
5810 /*
5811 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5812 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5813 */
5814 priv->regs = pci_iomap(pdev, 1, 0x10000);
5815 if (priv->regs == NULL) {
5816 priv->regs = pci_iomap(pdev, 2, 0x10000);
5817 if (priv->regs == NULL) {
5818 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5819 goto err_iounmap;
5820 }
5821 }
5822
0863ade8 5823 /*
99020471
BC		 5824 * Choose the initial fw image depending on user input. If a second
5825 * image is available, make it the alternative image that will be
5826 * loaded if the first one fails.
0863ade8 5827 */
99020471 5828 init_completion(&priv->firmware_loading_complete);
0863ade8 5829 di = priv->device_info;
99020471
BC		 5830 if (ap_mode_default && di->fw_image_ap) {
5831 priv->fw_pref = di->fw_image_ap;
5832 priv->fw_alt = di->fw_image_sta;
5833 } else if (!ap_mode_default && di->fw_image_sta) {
5834 priv->fw_pref = di->fw_image_sta;
5835 priv->fw_alt = di->fw_image_ap;
5836 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5837 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5838 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5839 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5840 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5841 priv->fw_pref = di->fw_image_ap;
5842 }
5843 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5844 if (rc)
5845 goto err_stop_firmware;
6b6accc3
YAP		 5846
5847 priv->hw_restart_in_progress = false;
5848
99020471 5849 return rc;
3cc7772c 5850
be695fc4
LB		 5851err_stop_firmware:
5852 mwl8k_hw_reset(priv);
be695fc4
LB		 5853
5854err_iounmap:
a66098da
LB		 5855 if (priv->regs != NULL)
5856 pci_iounmap(pdev, priv->regs);
5857
5b9482dd
LB		 5858 if (priv->sram != NULL)
5859 pci_iounmap(pdev, priv->sram);
5860
a66098da
LB		 5861 pci_set_drvdata(pdev, NULL);
5862 ieee80211_free_hw(hw);
5863
5864err_free_reg:
5865 pci_release_regions(pdev);
3db95e50
LB		 5866
5867err_disable_device:
a66098da
LB		 5868 pci_disable_device(pdev);
5869
5870 return rc;
5871}
5872
230f7af0 5873static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 5874{
5875 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
5876}
5877
230f7af0 5878static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5879{
5880 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5881 struct mwl8k_priv *priv;
5882 int i;
5883
5884 if (hw == NULL)
5885 return;
5886 priv = hw->priv;
5887
99020471
BC		 5888 wait_for_completion(&priv->firmware_loading_complete);
5889
5890 if (priv->fw_state == FW_STATE_ERROR) {
5891 mwl8k_hw_reset(priv);
5892 goto unmap;
5893 }
5894
a66098da
LB		 5895 ieee80211_stop_queues(hw);
5896
60aa569f
LB		 5897 ieee80211_unregister_hw(hw);
5898
67e2eb27 5899 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5900 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5901 tasklet_kill(&priv->poll_rx_task);
a66098da 5902
a66098da
LB		 5903 /* Stop hardware */
5904 mwl8k_hw_reset(priv);
5905
5906 /* Return all skbs to mac80211 */
e600707b 5907 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5908 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5909
e600707b 5910 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5911 mwl8k_txq_deinit(hw, i);
5912
5913 mwl8k_rxq_deinit(hw, 0);
5914
c2c357ce 5915 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5916
99020471 5917unmap:
a66098da 5918 pci_iounmap(pdev, priv->regs);
5b9482dd 5919 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5920 pci_set_drvdata(pdev, NULL);
5921 ieee80211_free_hw(hw);
5922 pci_release_regions(pdev);
5923 pci_disable_device(pdev);
5924}
5925
5926static struct pci_driver mwl8k_driver = {
5927 .name = MWL8K_NAME,
45a390dd 5928 .id_table = mwl8k_pci_id_table,
a66098da
LB		 5929 .probe = mwl8k_probe,
5930 .remove = __devexit_p(mwl8k_remove),
5931 .shutdown = __devexit_p(mwl8k_shutdown),
5932};
5933
5b0a3b7e 5934module_pci_driver(mwl8k_driver);
c2c357ce
LB		 5935
5936MODULE_DESCRIPTION(MWL8K_DESC);
5937MODULE_VERSION(MWL8K_VERSION);
5938MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5939MODULE_LICENSE("GPL");
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