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b43legacy: drop invalid IMCFGLO workaround
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / mwl8k.c
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a66098da 1/*
ce9e2e1b
LB		 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
a66098da 4 *
a5fb297d 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
a66098da
LB		 6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
3d76e82c 15#include <linux/sched.h>
a66098da
LB		 16#include <linux/spinlock.h>
17#include <linux/list.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/completion.h>
21#include <linux/etherdevice.h>
5a0e3ad6 22#include <linux/slab.h>
a66098da
LB		 23#include <net/mac80211.h>
24#include <linux/moduleparam.h>
25#include <linux/firmware.h>
26#include <linux/workqueue.h>
27
28#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29#define MWL8K_NAME KBUILD_MODNAME
a5fb297d 30#define MWL8K_VERSION "0.12"
a66098da 31
0863ade8
BC		 32/* Module parameters */
33static unsigned ap_mode_default;
34module_param(ap_mode_default, bool, 0);
35MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
37
a66098da
LB		 38/* Register definitions */
39#define MWL8K_HIU_GEN_PTR 0x00000c10
ce9e2e1b
LB		 40#define MWL8K_MODE_STA 0x0000005a
41#define MWL8K_MODE_AP 0x000000a5
a66098da 42#define MWL8K_HIU_INT_CODE 0x00000c14
ce9e2e1b
LB		 43#define MWL8K_FWSTA_READY 0xf0f1f2f4
44#define MWL8K_FWAP_READY 0xf1f2f4a5
45#define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
a66098da
LB		 46#define MWL8K_HIU_SCRATCH 0x00000c40
47
48/* Host->device communications */
49#define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50#define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51#define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52#define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53#define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
ce9e2e1b
LB		 54#define MWL8K_H2A_INT_DUMMY (1 << 20)
55#define MWL8K_H2A_INT_RESET (1 << 15)
56#define MWL8K_H2A_INT_DOORBELL (1 << 1)
57#define MWL8K_H2A_INT_PPA_READY (1 << 0)
a66098da
LB		 58
59/* Device->host communications */
60#define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61#define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62#define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63#define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64#define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
ce9e2e1b 65#define MWL8K_A2H_INT_DUMMY (1 << 20)
3aefc37e 66#define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
ce9e2e1b
LB		 67#define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
68#define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
69#define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
70#define MWL8K_A2H_INT_RADIO_ON (1 << 6)
71#define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
72#define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
73#define MWL8K_A2H_INT_OPC_DONE (1 << 2)
74#define MWL8K_A2H_INT_RX_READY (1 << 1)
75#define MWL8K_A2H_INT_TX_DONE (1 << 0)
a66098da 76
566875db
PN		 77/* HW micro second timer register
78 * located at offset 0xA600. This
79 * will be used to timestamp tx
80 * packets.
81 */
82
83#define MWL8K_HW_TIMER_REGISTER 0x0000a600
84
a66098da
LB		 85#define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
86 MWL8K_A2H_INT_CHNL_SWITCHED | \
87 MWL8K_A2H_INT_QUEUE_EMPTY | \
88 MWL8K_A2H_INT_RADAR_DETECT | \
89 MWL8K_A2H_INT_RADIO_ON | \
90 MWL8K_A2H_INT_RADIO_OFF | \
91 MWL8K_A2H_INT_MAC_EVENT | \
92 MWL8K_A2H_INT_OPC_DONE | \
93 MWL8K_A2H_INT_RX_READY | \
3aefc37e
NS		 94 MWL8K_A2H_INT_TX_DONE | \
95 MWL8K_A2H_INT_BA_WATCHDOG)
a66098da 96
a66098da 97#define MWL8K_RX_QUEUES 1
e600707b 98#define MWL8K_TX_WMM_QUEUES 4
8a7a578c 99#define MWL8K_MAX_AMPDU_QUEUES 8
e600707b
BC		 100#define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
101#define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
a66098da 102
54bc3a0d
LB		 103struct rxd_ops {
104 int rxd_size;
105 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
106 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
20f09c3d 107 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
0d462bbb 108 __le16 *qos, s8 *noise);
54bc3a0d
LB		 109};
110
45a390dd 111struct mwl8k_device_info {
a74b295e
LB		 112 char *part_name;
113 char *helper_image;
0863ade8
BC		 114 char *fw_image_sta;
115 char *fw_image_ap;
89a91f4f 116 struct rxd_ops *ap_rxd_ops;
952a0e96 117 u32 fw_api_ap;
45a390dd
LB		 118};
119
a66098da 120struct mwl8k_rx_queue {
45eb400d 121 int rxd_count;
a66098da
LB		 122
123 /* hw receives here */
45eb400d 124 int head;
a66098da
LB		 125
126 /* refill descs here */
45eb400d 127 int tail;
a66098da 128
54bc3a0d 129 void *rxd;
45eb400d 130 dma_addr_t rxd_dma;
788838eb
LB		 131 struct {
132 struct sk_buff *skb;
53b1b3e1 133 DEFINE_DMA_UNMAP_ADDR(dma);
788838eb 134 } *buf;
a66098da
LB		 135};
136
a66098da
LB		 137struct mwl8k_tx_queue {
138 /* hw transmits here */
45eb400d 139 int head;
a66098da
LB		 140
141 /* sw appends here */
45eb400d 142 int tail;
a66098da 143
8ccbc3b8 144 unsigned int len;
45eb400d
LB		 145 struct mwl8k_tx_desc *txd;
146 dma_addr_t txd_dma;
147 struct sk_buff **skb;
a66098da
LB		 148};
149
ac109fd0
BC		 150enum {
151 AMPDU_NO_STREAM,
152 AMPDU_STREAM_NEW,
153 AMPDU_STREAM_IN_PROGRESS,
154 AMPDU_STREAM_ACTIVE,
155};
156
5faa1aff
NS		 157struct mwl8k_ampdu_stream {
158 struct ieee80211_sta *sta;
159 u8 tid;
160 u8 state;
161 u8 idx;
162 u8 txq_idx; /* index of this stream in priv->txq */
163};
164
a66098da 165struct mwl8k_priv {
a66098da 166 struct ieee80211_hw *hw;
a66098da 167 struct pci_dev *pdev;
bf3ca7f7 168 int irq;
a66098da 169
45a390dd
LB		 170 struct mwl8k_device_info *device_info;
171
be695fc4
LB		 172 void __iomem *sram;
173 void __iomem *regs;
174
175 /* firmware */
d1f9e41d
BC		 176 const struct firmware *fw_helper;
177 const struct firmware *fw_ucode;
a66098da 178
be695fc4
LB		 179 /* hardware/firmware parameters */
180 bool ap_fw;
181 struct rxd_ops *rxd_ops;
777ad375
LB		 182 struct ieee80211_supported_band band_24;
183 struct ieee80211_channel channels_24[14];
184 struct ieee80211_rate rates_24[14];
4eae9edd
LB		 185 struct ieee80211_supported_band band_50;
186 struct ieee80211_channel channels_50[4];
187 struct ieee80211_rate rates_50[9];
ee0ddf18
LB		 188 u32 ap_macids_supported;
189 u32 sta_macids_supported;
be695fc4 190
8a7a578c
BC		 191 /* Ampdu stream information */
192 u8 num_ampdu_queues;
ac109fd0
BC		 193 spinlock_t stream_lock;
194 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
3aefc37e 195 struct work_struct watchdog_ba_handle;
8a7a578c 196
618952a7
LB		 197 /* firmware access */
198 struct mutex fw_mutex;
199 struct task_struct *fw_mutex_owner;
200 int fw_mutex_depth;
618952a7
LB		 201 struct completion *hostcmd_wait;
202
a66098da
LB		 203 /* lock held over TX and TX reap */
204 spinlock_t tx_lock;
a66098da 205
88de754a
LB		 206 /* TX quiesce completion, protected by fw_mutex and tx_lock */
207 struct completion *tx_wait;
208
f5bb87cf 209 /* List of interfaces. */
ee0ddf18 210 u32 macids_used;
f5bb87cf 211 struct list_head vif_list;
a66098da 212
a66098da
LB		 213 /* power management status cookie from firmware */
214 u32 *cookie;
215 dma_addr_t cookie_dma;
216
217 u16 num_mcaddrs;
a66098da 218 u8 hw_rev;
2aa7b01f 219 u32 fw_rev;
a66098da
LB		 220
221 /*
222 * Running count of TX packets in flight, to avoid
223 * iterating over the transmit rings each time.
224 */
225 int pending_tx_pkts;
226
227 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
e600707b
BC		 228 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
229 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
a66098da 230
c46563b7 231 bool radio_on;
68ce3884 232 bool radio_short_preamble;
a43c49a8 233 bool sniffer_enabled;
0439b1f5 234 bool wmm_enabled;
a66098da 235
a66098da
LB		 236 /* XXX need to convert this to handle multiple interfaces */
237 bool capture_beacon;
d89173f2 238 u8 capture_bssid[ETH_ALEN];
a66098da
LB		 239 struct sk_buff *beacon_skb;
240
241 /*
242 * This FJ worker has to be global as it is scheduled from the
243 * RX handler. At this point we don't know which interface it
244 * belongs to until the list of bssids waiting to complete join
245 * is checked.
246 */
247 struct work_struct finalize_join_worker;
248
1e9f9de3
LB		 249 /* Tasklet to perform TX reclaim. */
250 struct tasklet_struct poll_tx_task;
67e2eb27
LB		 251
252 /* Tasklet to perform RX. */
253 struct tasklet_struct poll_rx_task;
0d462bbb
JL		 254
255 /* Most recently reported noise in dBm */
256 s8 noise;
0863ade8
BC		 257
258 /*
259 * preserve the queue configurations so they can be restored if/when
260 * the firmware image is swapped.
261 */
e600707b 262 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
99020471
BC		 263
264 /* async firmware loading state */
265 unsigned fw_state;
266 char *fw_pref;
267 char *fw_alt;
268 struct completion firmware_loading_complete;
a66098da
LB		 269};
270
e53d9b96
NS		 271#define MAX_WEP_KEY_LEN 13
272#define NUM_WEP_KEYS 4
273
a66098da
LB		 274/* Per interface specific private data */
275struct mwl8k_vif {
f5bb87cf
LB		 276 struct list_head list;
277 struct ieee80211_vif *vif;
278
f57ca9c1
LB		 279 /* Firmware macid for this vif. */
280 int macid;
281
c2c2b12a 282 /* Non AMPDU sequence number assigned by driver. */
a680400e 283 u16 seqno;
e53d9b96
NS		 284
285 /* Saved WEP keys */
286 struct {
287 u8 enabled;
288 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
289 } wep_key_conf[NUM_WEP_KEYS];
d9a07d49
NS		 290
291 /* BSSID */
292 u8 bssid[ETH_ALEN];
293
294 /* A flag to indicate is HW crypto is enabled for this bssid */
295 bool is_hw_crypto_enabled;
a66098da 296};
a94cc97e 297#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
fcdc403c 298#define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
a66098da 299
d0805c1c
BC		 300struct tx_traffic_info {
301 u32 start_time;
302 u32 pkts;
303};
304
305#define MWL8K_MAX_TID 8
a680400e
LB		 306struct mwl8k_sta {
307 /* Index into station database. Returned by UPDATE_STADB. */
308 u8 peer_id;
17033543 309 u8 is_ampdu_allowed;
d0805c1c 310 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
a680400e
LB		 311};
312#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
313
777ad375 314static const struct ieee80211_channel mwl8k_channels_24[] = {
a66098da
LB		 315 { .center_freq = 2412, .hw_value = 1, },
316 { .center_freq = 2417, .hw_value = 2, },
317 { .center_freq = 2422, .hw_value = 3, },
318 { .center_freq = 2427, .hw_value = 4, },
319 { .center_freq = 2432, .hw_value = 5, },
320 { .center_freq = 2437, .hw_value = 6, },
321 { .center_freq = 2442, .hw_value = 7, },
322 { .center_freq = 2447, .hw_value = 8, },
323 { .center_freq = 2452, .hw_value = 9, },
324 { .center_freq = 2457, .hw_value = 10, },
325 { .center_freq = 2462, .hw_value = 11, },
647ca6b0
LB		 326 { .center_freq = 2467, .hw_value = 12, },
327 { .center_freq = 2472, .hw_value = 13, },
328 { .center_freq = 2484, .hw_value = 14, },
a66098da
LB		 329};
330
777ad375 331static const struct ieee80211_rate mwl8k_rates_24[] = {
a66098da
LB		 332 { .bitrate = 10, .hw_value = 2, },
333 { .bitrate = 20, .hw_value = 4, },
334 { .bitrate = 55, .hw_value = 11, },
5dfd3e2c
LB		 335 { .bitrate = 110, .hw_value = 22, },
336 { .bitrate = 220, .hw_value = 44, },
a66098da
LB		 337 { .bitrate = 60, .hw_value = 12, },
338 { .bitrate = 90, .hw_value = 18, },
a66098da
LB		 339 { .bitrate = 120, .hw_value = 24, },
340 { .bitrate = 180, .hw_value = 36, },
341 { .bitrate = 240, .hw_value = 48, },
342 { .bitrate = 360, .hw_value = 72, },
343 { .bitrate = 480, .hw_value = 96, },
344 { .bitrate = 540, .hw_value = 108, },
140eb5e2
LB		 345 { .bitrate = 720, .hw_value = 144, },
346};
347
4eae9edd
LB		 348static const struct ieee80211_channel mwl8k_channels_50[] = {
349 { .center_freq = 5180, .hw_value = 36, },
350 { .center_freq = 5200, .hw_value = 40, },
351 { .center_freq = 5220, .hw_value = 44, },
352 { .center_freq = 5240, .hw_value = 48, },
353};
354
355static const struct ieee80211_rate mwl8k_rates_50[] = {
356 { .bitrate = 60, .hw_value = 12, },
357 { .bitrate = 90, .hw_value = 18, },
358 { .bitrate = 120, .hw_value = 24, },
359 { .bitrate = 180, .hw_value = 36, },
360 { .bitrate = 240, .hw_value = 48, },
361 { .bitrate = 360, .hw_value = 72, },
362 { .bitrate = 480, .hw_value = 96, },
363 { .bitrate = 540, .hw_value = 108, },
364 { .bitrate = 720, .hw_value = 144, },
365};
366
a66098da 367/* Set or get info from Firmware */
a66098da 368#define MWL8K_CMD_GET 0x0000
41fdf097
NS		 369#define MWL8K_CMD_SET 0x0001
370#define MWL8K_CMD_SET_LIST 0x0002
a66098da
LB		 371
372/* Firmware command codes */
373#define MWL8K_CMD_CODE_DNLD 0x0001
374#define MWL8K_CMD_GET_HW_SPEC 0x0003
42fba21d 375#define MWL8K_CMD_SET_HW_SPEC 0x0004
a66098da
LB		 376#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
377#define MWL8K_CMD_GET_STAT 0x0014
ff45fc60
LB		 378#define MWL8K_CMD_RADIO_CONTROL 0x001c
379#define MWL8K_CMD_RF_TX_POWER 0x001e
41fdf097 380#define MWL8K_CMD_TX_POWER 0x001f
08b06347 381#define MWL8K_CMD_RF_ANTENNA 0x0020
aa21d0f6 382#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
a66098da
LB		 383#define MWL8K_CMD_SET_PRE_SCAN 0x0107
384#define MWL8K_CMD_SET_POST_SCAN 0x0108
ff45fc60
LB		 385#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
386#define MWL8K_CMD_SET_AID 0x010d
387#define MWL8K_CMD_SET_RATE 0x0110
388#define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
389#define MWL8K_CMD_RTS_THRESHOLD 0x0113
a66098da 390#define MWL8K_CMD_SET_SLOT 0x0114
ff45fc60
LB		 391#define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
392#define MWL8K_CMD_SET_WMM_MODE 0x0123
a66098da 393#define MWL8K_CMD_MIMO_CONFIG 0x0125
ff45fc60 394#define MWL8K_CMD_USE_FIXED_RATE 0x0126
a66098da 395#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
aa21d0f6 396#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
a66098da 397#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
3aefc37e 398#define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
aa21d0f6
LB		 399#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
400#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
fcdc403c 401#define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
ff45fc60 402#define MWL8K_CMD_UPDATE_STADB 0x1123
5faa1aff 403#define MWL8K_CMD_BASTREAM 0x1125
a66098da 404
b603742f 405static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
a66098da 406{
b603742f
JL		 407 u16 command = le16_to_cpu(cmd);
408
a66098da
LB		 409#define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
410 snprintf(buf, bufsize, "%s", #x);\
411 return buf;\
412 } while (0)
b603742f 413 switch (command & ~0x8000) {
a66098da
LB		 414 MWL8K_CMDNAME(CODE_DNLD);
415 MWL8K_CMDNAME(GET_HW_SPEC);
42fba21d 416 MWL8K_CMDNAME(SET_HW_SPEC);
a66098da
LB		 417 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
418 MWL8K_CMDNAME(GET_STAT);
419 MWL8K_CMDNAME(RADIO_CONTROL);
420 MWL8K_CMDNAME(RF_TX_POWER);
41fdf097 421 MWL8K_CMDNAME(TX_POWER);
08b06347 422 MWL8K_CMDNAME(RF_ANTENNA);
b64fe619 423 MWL8K_CMDNAME(SET_BEACON);
a66098da
LB		 424 MWL8K_CMDNAME(SET_PRE_SCAN);
425 MWL8K_CMDNAME(SET_POST_SCAN);
426 MWL8K_CMDNAME(SET_RF_CHANNEL);
ff45fc60
LB		 427 MWL8K_CMDNAME(SET_AID);
428 MWL8K_CMDNAME(SET_RATE);
429 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
430 MWL8K_CMDNAME(RTS_THRESHOLD);
a66098da 431 MWL8K_CMDNAME(SET_SLOT);
ff45fc60
LB		 432 MWL8K_CMDNAME(SET_EDCA_PARAMS);
433 MWL8K_CMDNAME(SET_WMM_MODE);
a66098da 434 MWL8K_CMDNAME(MIMO_CONFIG);
ff45fc60 435 MWL8K_CMDNAME(USE_FIXED_RATE);
a66098da 436 MWL8K_CMDNAME(ENABLE_SNIFFER);
32060e1b 437 MWL8K_CMDNAME(SET_MAC_ADDR);
a66098da 438 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
b64fe619 439 MWL8K_CMDNAME(BSS_START);
3f5610ff 440 MWL8K_CMDNAME(SET_NEW_STN);
fcdc403c 441 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
ff45fc60 442 MWL8K_CMDNAME(UPDATE_STADB);
5faa1aff 443 MWL8K_CMDNAME(BASTREAM);
3aefc37e 444 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
a66098da
LB		 445 default:
446 snprintf(buf, bufsize, "0x%x", cmd);
447 }
448#undef MWL8K_CMDNAME
449
450 return buf;
451}
452
453/* Hardware and firmware reset */
454static void mwl8k_hw_reset(struct mwl8k_priv *priv)
455{
456 iowrite32(MWL8K_H2A_INT_RESET,
457 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
458 iowrite32(MWL8K_H2A_INT_RESET,
459 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
460 msleep(20);
461}
462
463/* Release fw image */
d1f9e41d 464static void mwl8k_release_fw(const struct firmware **fw)
a66098da
LB		 465{
466 if (*fw == NULL)
467 return;
468 release_firmware(*fw);
469 *fw = NULL;
470}
471
472static void mwl8k_release_firmware(struct mwl8k_priv *priv)
473{
22be40d9
LB		 474 mwl8k_release_fw(&priv->fw_ucode);
475 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 476}
477
99020471
BC		 478/* states for asynchronous f/w loading */
479static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
480enum {
481 FW_STATE_INIT = 0,
482 FW_STATE_LOADING_PREF,
483 FW_STATE_LOADING_ALT,
484 FW_STATE_ERROR,
485};
486
a66098da
LB		 487/* Request fw image */
488static int mwl8k_request_fw(struct mwl8k_priv *priv,
d1f9e41d 489 const char *fname, const struct firmware **fw,
99020471 490 bool nowait)
a66098da
LB		 491{
492 /* release current image */
493 if (*fw != NULL)
494 mwl8k_release_fw(fw);
495
99020471
BC		 496 if (nowait)
497 return request_firmware_nowait(THIS_MODULE, 1, fname,
498 &priv->pdev->dev, GFP_KERNEL,
499 priv, mwl8k_fw_state_machine);
500 else
d1f9e41d 501 return request_firmware(fw, fname, &priv->pdev->dev);
a66098da
LB		 502}
503
99020471
BC		 504static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
505 bool nowait)
a66098da 506{
a74b295e 507 struct mwl8k_device_info *di = priv->device_info;
a66098da
LB		 508 int rc;
509
a74b295e 510 if (di->helper_image != NULL) {
99020471
BC		 511 if (nowait)
512 rc = mwl8k_request_fw(priv, di->helper_image,
513 &priv->fw_helper, true);
514 else
515 rc = mwl8k_request_fw(priv, di->helper_image,
516 &priv->fw_helper, false);
517 if (rc)
518 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
519 pci_name(priv->pdev), di->helper_image);
520
521 if (rc || nowait)
a74b295e 522 return rc;
a66098da
LB		 523 }
524
99020471
BC		 525 if (nowait) {
526 /*
527 * if we get here, no helper image is needed. Skip the
528 * FW_STATE_INIT state.
529 */
530 priv->fw_state = FW_STATE_LOADING_PREF;
531 rc = mwl8k_request_fw(priv, fw_image,
532 &priv->fw_ucode,
533 true);
534 } else
535 rc = mwl8k_request_fw(priv, fw_image,
536 &priv->fw_ucode, false);
a66098da 537 if (rc) {
c2c357ce 538 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
0863ade8 539 pci_name(priv->pdev), fw_image);
22be40d9 540 mwl8k_release_fw(&priv->fw_helper);
a66098da
LB		 541 return rc;
542 }
543
544 return 0;
545}
546
547struct mwl8k_cmd_pkt {
548 __le16 code;
549 __le16 length;
f57ca9c1
LB		 550 __u8 seq_num;
551 __u8 macid;
a66098da
LB		 552 __le16 result;
553 char payload[0];
ba2d3587 554} __packed;
a66098da
LB		 555
556/*
557 * Firmware loading.
558 */
559static int
560mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
561{
562 void __iomem *regs = priv->regs;
563 dma_addr_t dma_addr;
a66098da
LB		 564 int loops;
565
566 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
567 if (pci_dma_mapping_error(priv->pdev, dma_addr))
568 return -ENOMEM;
569
570 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
571 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
572 iowrite32(MWL8K_H2A_INT_DOORBELL,
573 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
574 iowrite32(MWL8K_H2A_INT_DUMMY,
575 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
576
a66098da
LB		 577 loops = 1000;
578 do {
579 u32 int_code;
580
581 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
582 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
583 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
a66098da
LB		 584 break;
585 }
586
3d76e82c 587 cond_resched();
a66098da
LB		 588 udelay(1);
589 } while (--loops);
590
591 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
592
d4b70570 593 return loops ? 0 : -ETIMEDOUT;
a66098da
LB		 594}
595
596static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
597 const u8 *data, size_t length)
598{
599 struct mwl8k_cmd_pkt *cmd;
600 int done;
601 int rc = 0;
602
603 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
604 if (cmd == NULL)
605 return -ENOMEM;
606
607 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
608 cmd->seq_num = 0;
f57ca9c1 609 cmd->macid = 0;
a66098da
LB		 610 cmd->result = 0;
611
612 done = 0;
613 while (length) {
614 int block_size = length > 256 ? 256 : length;
615
616 memcpy(cmd->payload, data + done, block_size);
617 cmd->length = cpu_to_le16(block_size);
618
619 rc = mwl8k_send_fw_load_cmd(priv, cmd,
620 sizeof(*cmd) + block_size);
621 if (rc)
622 break;
623
624 done += block_size;
625 length -= block_size;
626 }
627
628 if (!rc) {
629 cmd->length = 0;
630 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
631 }
632
633 kfree(cmd);
634
635 return rc;
636}
637
638static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
639 const u8 *data, size_t length)
640{
641 unsigned char *buffer;
642 int may_continue, rc = 0;
643 u32 done, prev_block_size;
644
645 buffer = kmalloc(1024, GFP_KERNEL);
646 if (buffer == NULL)
647 return -ENOMEM;
648
649 done = 0;
650 prev_block_size = 0;
651 may_continue = 1000;
652 while (may_continue > 0) {
653 u32 block_size;
654
655 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
656 if (block_size & 1) {
657 block_size &= ~1;
658 may_continue--;
659 } else {
660 done += prev_block_size;
661 length -= prev_block_size;
662 }
663
664 if (block_size > 1024 || block_size > length) {
665 rc = -EOVERFLOW;
666 break;
667 }
668
669 if (length == 0) {
670 rc = 0;
671 break;
672 }
673
674 if (block_size == 0) {
675 rc = -EPROTO;
676 may_continue--;
677 udelay(1);
678 continue;
679 }
680
681 prev_block_size = block_size;
682 memcpy(buffer, data + done, block_size);
683
684 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
685 if (rc)
686 break;
687 }
688
689 if (!rc && length != 0)
690 rc = -EREMOTEIO;
691
692 kfree(buffer);
693
694 return rc;
695}
696
c2c357ce 697static int mwl8k_load_firmware(struct ieee80211_hw *hw)
a66098da 698{
c2c357ce 699 struct mwl8k_priv *priv = hw->priv;
d1f9e41d 700 const struct firmware *fw = priv->fw_ucode;
c2c357ce
LB		 701 int rc;
702 int loops;
703
704 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
d1f9e41d 705 const struct firmware *helper = priv->fw_helper;
a66098da 706
c2c357ce
LB		 707 if (helper == NULL) {
708 printk(KERN_ERR "%s: helper image needed but none "
709 "given\n", pci_name(priv->pdev));
710 return -EINVAL;
711 }
a66098da 712
c2c357ce 713 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
a66098da
LB		 714 if (rc) {
715 printk(KERN_ERR "%s: unable to load firmware "
c2c357ce 716 "helper image\n", pci_name(priv->pdev));
a66098da
LB		 717 return rc;
718 }
ba30c4a5 719 msleep(20);
a66098da 720
c2c357ce 721 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
a66098da 722 } else {
c2c357ce 723 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
a66098da
LB		 724 }
725
726 if (rc) {
c2c357ce
LB		 727 printk(KERN_ERR "%s: unable to load firmware image\n",
728 pci_name(priv->pdev));
a66098da
LB		 729 return rc;
730 }
731
89a91f4f 732 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
a66098da 733
89b872e2 734 loops = 500000;
a66098da 735 do {
eae74e65
LB		 736 u32 ready_code;
737
738 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
739 if (ready_code == MWL8K_FWAP_READY) {
740 priv->ap_fw = 1;
741 break;
742 } else if (ready_code == MWL8K_FWSTA_READY) {
743 priv->ap_fw = 0;
a66098da 744 break;
eae74e65
LB		 745 }
746
747 cond_resched();
a66098da
LB		 748 udelay(1);
749 } while (--loops);
750
751 return loops ? 0 : -ETIMEDOUT;
752}
753
754
a66098da
LB		 755/* DMA header used by firmware and hardware. */
756struct mwl8k_dma_data {
757 __le16 fwlen;
758 struct ieee80211_hdr wh;
20f09c3d 759 char data[0];
ba2d3587 760} __packed;
a66098da
LB		 761
762/* Routines to add/remove DMA header from skb. */
20f09c3d 763static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
a66098da 764{
20f09c3d
LB		 765 struct mwl8k_dma_data *tr;
766 int hdrlen;
767
768 tr = (struct mwl8k_dma_data *)skb->data;
769 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
770
771 if (hdrlen != sizeof(tr->wh)) {
772 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
773 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
774 *((__le16 *)(tr->data - 2)) = qos;
775 } else {
776 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
777 }
a66098da 778 }
20f09c3d
LB		 779
780 if (hdrlen != sizeof(*tr))
781 skb_pull(skb, sizeof(*tr) - hdrlen);
a66098da
LB		 782}
783
ff776cec
YAP		 784#define REDUCED_TX_HEADROOM 8
785
252486a1 786static void
ff776cec 787mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb, int tail_pad)
a66098da
LB		 788{
789 struct ieee80211_hdr *wh;
ca009301 790 int hdrlen;
252486a1 791 int reqd_hdrlen;
a66098da
LB		 792 struct mwl8k_dma_data *tr;
793
ca009301
LB		 794 /*
795 * Add a firmware DMA header; the firmware requires that we
796 * present a 2-byte payload length followed by a 4-address
797 * header (without QoS field), followed (optionally) by any
798 * WEP/ExtIV header (but only filled in for CCMP).
799 */
a66098da 800 wh = (struct ieee80211_hdr *)skb->data;
ca009301 801
a66098da 802 hdrlen = ieee80211_hdrlen(wh->frame_control);
ff776cec
YAP		 803
804 /*
805 * Check if skb_resize is required because of
806 * tx_headroom adjustment.
807 */
808 if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
809 + REDUCED_TX_HEADROOM))) {
810 if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
811
812 wiphy_err(priv->hw->wiphy,
813 "Failed to reallocate TX buffer\n");
814 return;
815 }
816 skb->truesize += REDUCED_TX_HEADROOM;
817 }
818
252486a1
NS		 819 reqd_hdrlen = sizeof(*tr);
820
821 if (hdrlen != reqd_hdrlen)
822 skb_push(skb, reqd_hdrlen - hdrlen);
a66098da 823
ca009301 824 if (ieee80211_is_data_qos(wh->frame_control))
252486a1 825 hdrlen -= IEEE80211_QOS_CTL_LEN;
a66098da
LB		 826
827 tr = (struct mwl8k_dma_data *)skb->data;
828 if (wh != &tr->wh)
829 memmove(&tr->wh, wh, hdrlen);
ca009301
LB		 830 if (hdrlen != sizeof(tr->wh))
831 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
a66098da
LB		 832
833 /*
834 * Firmware length is the length of the fully formed "802.11
835 * payload". That is, everything except for the 802.11 header.
836 * This includes all crypto material including the MIC.
837 */
252486a1 838 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
a66098da
LB		 839}
840
ff776cec
YAP		 841static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
842 struct sk_buff *skb)
e53d9b96
NS		 843{
844 struct ieee80211_hdr *wh;
845 struct ieee80211_tx_info *tx_info;
846 struct ieee80211_key_conf *key_conf;
847 int data_pad;
848
849 wh = (struct ieee80211_hdr *)skb->data;
850
851 tx_info = IEEE80211_SKB_CB(skb);
852
853 key_conf = NULL;
854 if (ieee80211_is_data(wh->frame_control))
855 key_conf = tx_info->control.hw_key;
856
857 /*
858 * Make sure the packet header is in the DMA header format (4-address
859 * without QoS), the necessary crypto padding between the header and the
ba30c4a5
YAP		 860 * payload has already been provided by mac80211, but it doesn't add
861 * tail padding when HW crypto is enabled.
e53d9b96
NS		 862 *
863 * We have the following trailer padding requirements:
864 * - WEP: 4 trailer bytes (ICV)
865 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
866 * - CCMP: 8 trailer bytes (MIC)
867 */
868 data_pad = 0;
869 if (key_conf != NULL) {
870 switch (key_conf->cipher) {
871 case WLAN_CIPHER_SUITE_WEP40:
872 case WLAN_CIPHER_SUITE_WEP104:
873 data_pad = 4;
874 break;
875 case WLAN_CIPHER_SUITE_TKIP:
876 data_pad = 12;
877 break;
878 case WLAN_CIPHER_SUITE_CCMP:
879 data_pad = 8;
880 break;
881 }
882 }
ff776cec 883 mwl8k_add_dma_header(priv, skb, data_pad);
e53d9b96 884}
a66098da
LB		 885
886/*
89a91f4f 887 * Packet reception for 88w8366 AP firmware.
6f6d1e9a 888 */
89a91f4f 889struct mwl8k_rxd_8366_ap {
6f6d1e9a
LB		 890 __le16 pkt_len;
891 __u8 sq2;
892 __u8 rate;
893 __le32 pkt_phys_addr;
894 __le32 next_rxd_phys_addr;
895 __le16 qos_control;
896 __le16 htsig2;
897 __le32 hw_rssi_info;
898 __le32 hw_noise_floor_info;
899 __u8 noise_floor;
900 __u8 pad0[3];
901 __u8 rssi;
902 __u8 rx_status;
903 __u8 channel;
904 __u8 rx_ctrl;
ba2d3587 905} __packed;
6f6d1e9a 906
89a91f4f
LB		 907#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
908#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
909#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
8e9f33f0 910
89a91f4f 911#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
6f6d1e9a 912
d9a07d49
NS		 913/* 8366 AP rx_status bits */
914#define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
915#define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
916#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
917#define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
918#define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
919
89a91f4f 920static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
6f6d1e9a 921{
89a91f4f 922 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 923
924 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 925 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
6f6d1e9a
LB		 926}
927
89a91f4f 928static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
6f6d1e9a 929{
89a91f4f 930 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a
LB		 931
932 rxd->pkt_len = cpu_to_le16(len);
933 rxd->pkt_phys_addr = cpu_to_le32(addr);
934 wmb();
935 rxd->rx_ctrl = 0;
936}
937
938static int
89a91f4f 939mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 940 __le16 *qos, s8 *noise)
6f6d1e9a 941{
89a91f4f 942 struct mwl8k_rxd_8366_ap *rxd = _rxd;
6f6d1e9a 943
89a91f4f 944 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
6f6d1e9a
LB		 945 return -1;
946 rmb();
947
948 memset(status, 0, sizeof(*status));
949
950 status->signal = -rxd->rssi;
0d462bbb 951 *noise = -rxd->noise_floor;
6f6d1e9a 952
89a91f4f 953 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
6f6d1e9a 954 status->flag |= RX_FLAG_HT;
89a91f4f 955 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
8e9f33f0 956 status->flag |= RX_FLAG_40MHZ;
89a91f4f 957 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
6f6d1e9a
LB		 958 } else {
959 int i;
960
777ad375
LB		 961 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
962 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
6f6d1e9a
LB		 963 status->rate_idx = i;
964 break;
965 }
966 }
967 }
968
85478344
LB		 969 if (rxd->channel > 14) {
970 status->band = IEEE80211_BAND_5GHZ;
971 if (!(status->flag & RX_FLAG_HT))
972 status->rate_idx -= 5;
973 } else {
974 status->band = IEEE80211_BAND_2GHZ;
975 }
59eb21a6
BR		 976 status->freq = ieee80211_channel_to_frequency(rxd->channel,
977 status->band);
6f6d1e9a 978
20f09c3d
LB		 979 *qos = rxd->qos_control;
980
d9a07d49
NS		 981 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
982 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
983 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
984 status->flag |= RX_FLAG_MMIC_ERROR;
985
6f6d1e9a
LB		 986 return le16_to_cpu(rxd->pkt_len);
987}
988
89a91f4f
LB		 989static struct rxd_ops rxd_8366_ap_ops = {
990 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
991 .rxd_init = mwl8k_rxd_8366_ap_init,
992 .rxd_refill = mwl8k_rxd_8366_ap_refill,
993 .rxd_process = mwl8k_rxd_8366_ap_process,
6f6d1e9a
LB		 994};
995
996/*
89a91f4f 997 * Packet reception for STA firmware.
a66098da 998 */
89a91f4f 999struct mwl8k_rxd_sta {
a66098da
LB		 1000 __le16 pkt_len;
1001 __u8 link_quality;
1002 __u8 noise_level;
1003 __le32 pkt_phys_addr;
45eb400d 1004 __le32 next_rxd_phys_addr;
a66098da
LB		 1005 __le16 qos_control;
1006 __le16 rate_info;
1007 __le32 pad0[4];
1008 __u8 rssi;
1009 __u8 channel;
1010 __le16 pad1;
1011 __u8 rx_ctrl;
1012 __u8 rx_status;
1013 __u8 pad2[2];
ba2d3587 1014} __packed;
a66098da 1015
89a91f4f
LB		 1016#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
1017#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
1018#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
1019#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
1020#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
1021#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
54bc3a0d 1022
89a91f4f 1023#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
d9a07d49
NS		 1024#define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
1025/* ICV=0 or MIC=1 */
1026#define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1027/* Key is uploaded only in failure case */
1028#define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
54bc3a0d 1029
89a91f4f 1030static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
54bc3a0d 1031{
89a91f4f 1032 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1033
1034 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
89a91f4f 1035 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
54bc3a0d
LB		 1036}
1037
89a91f4f 1038static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
54bc3a0d 1039{
89a91f4f 1040 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1041
1042 rxd->pkt_len = cpu_to_le16(len);
1043 rxd->pkt_phys_addr = cpu_to_le32(addr);
1044 wmb();
1045 rxd->rx_ctrl = 0;
1046}
1047
1048static int
89a91f4f 1049mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
0d462bbb 1050 __le16 *qos, s8 *noise)
54bc3a0d 1051{
89a91f4f 1052 struct mwl8k_rxd_sta *rxd = _rxd;
54bc3a0d
LB		 1053 u16 rate_info;
1054
89a91f4f 1055 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
54bc3a0d
LB		 1056 return -1;
1057 rmb();
1058
1059 rate_info = le16_to_cpu(rxd->rate_info);
1060
1061 memset(status, 0, sizeof(*status));
1062
1063 status->signal = -rxd->rssi;
0d462bbb 1064 *noise = -rxd->noise_level;
89a91f4f
LB		 1065 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1066 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
54bc3a0d 1067
89a91f4f 1068 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
54bc3a0d 1069 status->flag |= RX_FLAG_SHORTPRE;
89a91f4f 1070 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
54bc3a0d 1071 status->flag |= RX_FLAG_40MHZ;
89a91f4f 1072 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
54bc3a0d 1073 status->flag |= RX_FLAG_SHORT_GI;
89a91f4f 1074 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
54bc3a0d
LB		 1075 status->flag |= RX_FLAG_HT;
1076
85478344
LB		 1077 if (rxd->channel > 14) {
1078 status->band = IEEE80211_BAND_5GHZ;
1079 if (!(status->flag & RX_FLAG_HT))
1080 status->rate_idx -= 5;
1081 } else {
1082 status->band = IEEE80211_BAND_2GHZ;
1083 }
59eb21a6
BR		 1084 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1085 status->band);
54bc3a0d 1086
20f09c3d 1087 *qos = rxd->qos_control;
d9a07d49
NS		 1088 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1089 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1090 status->flag |= RX_FLAG_MMIC_ERROR;
20f09c3d 1091
54bc3a0d
LB		 1092 return le16_to_cpu(rxd->pkt_len);
1093}
1094
89a91f4f
LB		 1095static struct rxd_ops rxd_sta_ops = {
1096 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1097 .rxd_init = mwl8k_rxd_sta_init,
1098 .rxd_refill = mwl8k_rxd_sta_refill,
1099 .rxd_process = mwl8k_rxd_sta_process,
54bc3a0d
LB		 1100};
1101
1102
a66098da
LB		 1103#define MWL8K_RX_DESCS 256
1104#define MWL8K_RX_MAXSZ 3800
1105
1106static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1107{
1108 struct mwl8k_priv *priv = hw->priv;
1109 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1110 int size;
1111 int i;
1112
45eb400d
LB		 1113 rxq->rxd_count = 0;
1114 rxq->head = 0;
1115 rxq->tail = 0;
a66098da 1116
54bc3a0d 1117 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
a66098da 1118
45eb400d
LB		 1119 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1120 if (rxq->rxd == NULL) {
5db55844 1121 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
a66098da
LB		 1122 return -ENOMEM;
1123 }
45eb400d 1124 memset(rxq->rxd, 0, size);
a66098da 1125
b9ede5f1 1126 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
788838eb 1127 if (rxq->buf == NULL) {
5db55844 1128 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
45eb400d 1129 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
a66098da
LB		 1130 return -ENOMEM;
1131 }
a66098da
LB		 1132
1133 for (i = 0; i < MWL8K_RX_DESCS; i++) {
54bc3a0d
LB		 1134 int desc_size;
1135 void *rxd;
a66098da 1136 int nexti;
54bc3a0d
LB		 1137 dma_addr_t next_dma_addr;
1138
1139 desc_size = priv->rxd_ops->rxd_size;
1140 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
a66098da 1141
54bc3a0d
LB		 1142 nexti = i + 1;
1143 if (nexti == MWL8K_RX_DESCS)
1144 nexti = 0;
1145 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
a66098da 1146
54bc3a0d 1147 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
a66098da
LB		 1148 }
1149
1150 return 0;
1151}
1152
1153static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1154{
1155 struct mwl8k_priv *priv = hw->priv;
1156 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1157 int refilled;
1158
1159 refilled = 0;
45eb400d 1160 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
a66098da 1161 struct sk_buff *skb;
788838eb 1162 dma_addr_t addr;
a66098da 1163 int rx;
54bc3a0d 1164 void *rxd;
a66098da
LB		 1165
1166 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1167 if (skb == NULL)
1168 break;
1169
788838eb
LB		 1170 addr = pci_map_single(priv->pdev, skb->data,
1171 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
a66098da 1172
54bc3a0d
LB		 1173 rxq->rxd_count++;
1174 rx = rxq->tail++;
1175 if (rxq->tail == MWL8K_RX_DESCS)
1176 rxq->tail = 0;
788838eb 1177 rxq->buf[rx].skb = skb;
53b1b3e1 1178 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
54bc3a0d
LB		 1179
1180 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1181 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
a66098da
LB		 1182
1183 refilled++;
1184 }
1185
1186 return refilled;
1187}
1188
1189/* Must be called only when the card's reception is completely halted */
1190static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1191{
1192 struct mwl8k_priv *priv = hw->priv;
1193 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1194 int i;
1195
73b46320
BC		 1196 if (rxq->rxd == NULL)
1197 return;
1198
a66098da 1199 for (i = 0; i < MWL8K_RX_DESCS; i++) {
788838eb
LB		 1200 if (rxq->buf[i].skb != NULL) {
1201 pci_unmap_single(priv->pdev,
53b1b3e1 1202 dma_unmap_addr(&rxq->buf[i], dma),
788838eb 1203 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1204 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
788838eb
LB		 1205
1206 kfree_skb(rxq->buf[i].skb);
1207 rxq->buf[i].skb = NULL;
a66098da
LB		 1208 }
1209 }
1210
788838eb
LB		 1211 kfree(rxq->buf);
1212 rxq->buf = NULL;
a66098da
LB		 1213
1214 pci_free_consistent(priv->pdev,
54bc3a0d 1215 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
45eb400d
LB		 1216 rxq->rxd, rxq->rxd_dma);
1217 rxq->rxd = NULL;
a66098da
LB		 1218}
1219
1220
1221/*
1222 * Scan a list of BSSIDs to process for finalize join.
1223 * Allows for extension to process multiple BSSIDs.
1224 */
1225static inline int
1226mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1227{
1228 return priv->capture_beacon &&
1229 ieee80211_is_beacon(wh->frame_control) &&
1230 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1231}
1232
3779752d
LB		 1233static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1234 struct sk_buff *skb)
a66098da 1235{
3779752d
LB		 1236 struct mwl8k_priv *priv = hw->priv;
1237
a66098da 1238 priv->capture_beacon = false;
d89173f2 1239 memset(priv->capture_bssid, 0, ETH_ALEN);
a66098da
LB		 1240
1241 /*
1242 * Use GFP_ATOMIC as rxq_process is called from
1243 * the primary interrupt handler, memory allocation call
1244 * must not sleep.
1245 */
1246 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1247 if (priv->beacon_skb != NULL)
3779752d 1248 ieee80211_queue_work(hw, &priv->finalize_join_worker);
a66098da
LB		 1249}
1250
d9a07d49
NS		 1251static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1252 u8 *bssid)
1253{
1254 struct mwl8k_vif *mwl8k_vif;
1255
1256 list_for_each_entry(mwl8k_vif,
1257 vif_list, list) {
1258 if (memcmp(bssid, mwl8k_vif->bssid,
1259 ETH_ALEN) == 0)
1260 return mwl8k_vif;
1261 }
1262
1263 return NULL;
1264}
1265
a66098da
LB		 1266static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1267{
1268 struct mwl8k_priv *priv = hw->priv;
d9a07d49 1269 struct mwl8k_vif *mwl8k_vif = NULL;
a66098da
LB		 1270 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1271 int processed;
1272
1273 processed = 0;
45eb400d 1274 while (rxq->rxd_count && limit--) {
a66098da 1275 struct sk_buff *skb;
54bc3a0d
LB		 1276 void *rxd;
1277 int pkt_len;
a66098da 1278 struct ieee80211_rx_status status;
d9a07d49 1279 struct ieee80211_hdr *wh;
20f09c3d 1280 __le16 qos;
a66098da 1281
788838eb 1282 skb = rxq->buf[rxq->head].skb;
d25f9f13
LB		 1283 if (skb == NULL)
1284 break;
54bc3a0d
LB		 1285
1286 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1287
0d462bbb
JL		 1288 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1289 &priv->noise);
54bc3a0d
LB		 1290 if (pkt_len < 0)
1291 break;
1292
788838eb
LB		 1293 rxq->buf[rxq->head].skb = NULL;
1294
1295 pci_unmap_single(priv->pdev,
53b1b3e1 1296 dma_unmap_addr(&rxq->buf[rxq->head], dma),
788838eb 1297 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
53b1b3e1 1298 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
a66098da 1299
54bc3a0d
LB		 1300 rxq->head++;
1301 if (rxq->head == MWL8K_RX_DESCS)
1302 rxq->head = 0;
1303
45eb400d 1304 rxq->rxd_count--;
a66098da 1305
d9a07d49 1306 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da 1307
a66098da 1308 /*
c2c357ce
LB		 1309 * Check for a pending join operation. Save a
1310 * copy of the beacon and schedule a tasklet to
1311 * send a FINALIZE_JOIN command to the firmware.
a66098da 1312 */
54bc3a0d 1313 if (mwl8k_capture_bssid(priv, (void *)skb->data))
3779752d 1314 mwl8k_save_beacon(hw, skb);
a66098da 1315
d9a07d49
NS		 1316 if (ieee80211_has_protected(wh->frame_control)) {
1317
1318 /* Check if hw crypto has been enabled for
1319 * this bss. If yes, set the status flags
1320 * accordingly
1321 */
1322 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1323 wh->addr1);
1324
1325 if (mwl8k_vif != NULL &&
1326 mwl8k_vif->is_hw_crypto_enabled == true) {
1327 /*
1328 * When MMIC ERROR is encountered
1329 * by the firmware, payload is
1330 * dropped and only 32 bytes of
1331 * mwl8k Firmware header is sent
1332 * to the host.
1333 *
1334 * We need to add four bytes of
1335 * key information. In it
1336 * MAC80211 expects keyidx set to
1337 * 0 for triggering Counter
1338 * Measure of MMIC failure.
1339 */
1340 if (status.flag & RX_FLAG_MMIC_ERROR) {
1341 struct mwl8k_dma_data *tr;
1342 tr = (struct mwl8k_dma_data *)skb->data;
1343 memset((void *)&(tr->data), 0, 4);
1344 pkt_len += 4;
1345 }
1346
1347 if (!ieee80211_is_auth(wh->frame_control))
1348 status.flag |= RX_FLAG_IV_STRIPPED |
1349 RX_FLAG_DECRYPTED |
1350 RX_FLAG_MMIC_STRIPPED;
1351 }
1352 }
1353
1354 skb_put(skb, pkt_len);
1355 mwl8k_remove_dma_header(skb, qos);
f1d58c25
JB		 1356 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1357 ieee80211_rx_irqsafe(hw, skb);
a66098da
LB		 1358
1359 processed++;
1360 }
1361
1362 return processed;
1363}
1364
1365
1366/*
1367 * Packet transmission.
1368 */
1369
a66098da
LB		 1370#define MWL8K_TXD_STATUS_OK 0x00000001
1371#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1372#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1373#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
a66098da 1374#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
a66098da 1375
e0493a8d
LB		 1376#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1377#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1378#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1379#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1380#define MWL8K_QOS_EOSP 0x0010
1381
a66098da
LB		 1382struct mwl8k_tx_desc {
1383 __le32 status;
1384 __u8 data_rate;
1385 __u8 tx_priority;
1386 __le16 qos_control;
1387 __le32 pkt_phys_addr;
1388 __le16 pkt_len;
d89173f2 1389 __u8 dest_MAC_addr[ETH_ALEN];
45eb400d 1390 __le32 next_txd_phys_addr;
8a7a578c 1391 __le32 timestamp;
a66098da
LB		 1392 __le16 rate_info;
1393 __u8 peer_id;
a1fe24b0 1394 __u8 tx_frag_cnt;
ba2d3587 1395} __packed;
a66098da
LB		 1396
1397#define MWL8K_TX_DESCS 128
1398
1399static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1400{
1401 struct mwl8k_priv *priv = hw->priv;
1402 struct mwl8k_tx_queue *txq = priv->txq + index;
1403 int size;
1404 int i;
1405
8ccbc3b8 1406 txq->len = 0;
45eb400d
LB		 1407 txq->head = 0;
1408 txq->tail = 0;
a66098da
LB		 1409
1410 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1411
45eb400d
LB		 1412 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1413 if (txq->txd == NULL) {
5db55844 1414 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
a66098da
LB		 1415 return -ENOMEM;
1416 }
45eb400d 1417 memset(txq->txd, 0, size);
a66098da 1418
b9ede5f1 1419 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
45eb400d 1420 if (txq->skb == NULL) {
5db55844 1421 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
45eb400d 1422 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
a66098da
LB		 1423 return -ENOMEM;
1424 }
a66098da
LB		 1425
1426 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1427 struct mwl8k_tx_desc *tx_desc;
1428 int nexti;
1429
45eb400d 1430 tx_desc = txq->txd + i;
a66098da
LB		 1431 nexti = (i + 1) % MWL8K_TX_DESCS;
1432
1433 tx_desc->status = 0;
45eb400d
LB		 1434 tx_desc->next_txd_phys_addr =
1435 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
a66098da
LB		 1436 }
1437
1438 return 0;
1439}
1440
1441static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1442{
1443 iowrite32(MWL8K_H2A_INT_PPA_READY,
1444 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1445 iowrite32(MWL8K_H2A_INT_DUMMY,
1446 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1447 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1448}
1449
7e1112d3 1450static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
a66098da 1451{
7e1112d3
LB		 1452 struct mwl8k_priv *priv = hw->priv;
1453 int i;
1454
e600707b 1455 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
7e1112d3
LB		 1456 struct mwl8k_tx_queue *txq = priv->txq + i;
1457 int fw_owned = 0;
1458 int drv_owned = 0;
1459 int unused = 0;
1460 int desc;
1461
a66098da 1462 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
7e1112d3
LB		 1463 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1464 u32 status;
a66098da 1465
7e1112d3 1466 status = le32_to_cpu(tx_desc->status);
a66098da 1467 if (status & MWL8K_TXD_STATUS_FW_OWNED)
7e1112d3 1468 fw_owned++;
a66098da 1469 else
7e1112d3 1470 drv_owned++;
a66098da
LB		 1471
1472 if (tx_desc->pkt_len == 0)
7e1112d3 1473 unused++;
a66098da 1474 }
a66098da 1475
c96c31e4
JP		 1476 wiphy_err(hw->wiphy,
1477 "txq[%d] len=%d head=%d tail=%d "
1478 "fw_owned=%d drv_owned=%d unused=%d\n",
1479 i,
1480 txq->len, txq->head, txq->tail,
1481 fw_owned, drv_owned, unused);
7e1112d3 1482 }
a66098da
LB		 1483}
1484
618952a7 1485/*
88de754a 1486 * Must be called with priv->fw_mutex held and tx queues stopped.
618952a7 1487 */
62abd3cf 1488#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
7e1112d3 1489
950d5b01 1490static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
a66098da 1491{
a66098da 1492 struct mwl8k_priv *priv = hw->priv;
88de754a 1493 DECLARE_COMPLETION_ONSTACK(tx_wait);
7e1112d3
LB		 1494 int retry;
1495 int rc;
a66098da
LB		 1496
1497 might_sleep();
1498
7e1112d3
LB		 1499 /*
1500 * The TX queues are stopped at this point, so this test
1501 * doesn't need to take ->tx_lock.
1502 */
1503 if (!priv->pending_tx_pkts)
1504 return 0;
1505
1506 retry = 0;
1507 rc = 0;
1508
a66098da 1509 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1510 priv->tx_wait = &tx_wait;
1511 while (!rc) {
1512 int oldcount;
1513 unsigned long timeout;
a66098da 1514
7e1112d3 1515 oldcount = priv->pending_tx_pkts;
a66098da 1516
7e1112d3 1517 spin_unlock_bh(&priv->tx_lock);
88de754a 1518 timeout = wait_for_completion_timeout(&tx_wait,
7e1112d3 1519 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
a66098da 1520 spin_lock_bh(&priv->tx_lock);
7e1112d3
LB		 1521
1522 if (timeout) {
1523 WARN_ON(priv->pending_tx_pkts);
ba30c4a5 1524 if (retry)
c96c31e4 1525 wiphy_notice(hw->wiphy, "tx rings drained\n");
7e1112d3
LB		 1526 break;
1527 }
1528
1529 if (priv->pending_tx_pkts < oldcount) {
c96c31e4
JP		 1530 wiphy_notice(hw->wiphy,
1531 "waiting for tx rings to drain (%d -> %d pkts)\n",
1532 oldcount, priv->pending_tx_pkts);
7e1112d3
LB		 1533 retry = 1;
1534 continue;
1535 }
1536
a66098da 1537 priv->tx_wait = NULL;
a66098da 1538
c96c31e4
JP		 1539 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1540 MWL8K_TX_WAIT_TIMEOUT_MS);
7e1112d3
LB		 1541 mwl8k_dump_tx_rings(hw);
1542
1543 rc = -ETIMEDOUT;
a66098da 1544 }
7e1112d3 1545 spin_unlock_bh(&priv->tx_lock);
a66098da 1546
7e1112d3 1547 return rc;
a66098da
LB		 1548}
1549
c23b5a69
LB		 1550#define MWL8K_TXD_SUCCESS(status) \
1551 ((status) & (MWL8K_TXD_STATUS_OK | \
1552 MWL8K_TXD_STATUS_OK_RETRY | \
1553 MWL8K_TXD_STATUS_OK_MORE_RETRY))
a66098da 1554
a0e7c6cf
NS		 1555static int mwl8k_tid_queue_mapping(u8 tid)
1556{
1557 BUG_ON(tid > 7);
1558
1559 switch (tid) {
1560 case 0:
1561 case 3:
1562 return IEEE80211_AC_BE;
1563 break;
1564 case 1:
1565 case 2:
1566 return IEEE80211_AC_BK;
1567 break;
1568 case 4:
1569 case 5:
1570 return IEEE80211_AC_VI;
1571 break;
1572 case 6:
1573 case 7:
1574 return IEEE80211_AC_VO;
1575 break;
1576 default:
1577 return -1;
1578 break;
1579 }
1580}
1581
17033543
NS		 1582/* The firmware will fill in the rate information
1583 * for each packet that gets queued in the hardware
49adc5ce 1584 * and these macros will interpret that info.
17033543
NS		 1585 */
1586
49adc5ce
JL		 1587#define RI_FORMAT(a) (a & 0x0001)
1588#define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
17033543 1589
efb7c49a
LB		 1590static int
1591mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
a66098da
LB		 1592{
1593 struct mwl8k_priv *priv = hw->priv;
1594 struct mwl8k_tx_queue *txq = priv->txq + index;
efb7c49a 1595 int processed;
a66098da 1596
efb7c49a 1597 processed = 0;
8ccbc3b8 1598 while (txq->len > 0 && limit--) {
a66098da 1599 int tx;
a66098da
LB		 1600 struct mwl8k_tx_desc *tx_desc;
1601 unsigned long addr;
ce9e2e1b 1602 int size;
a66098da
LB		 1603 struct sk_buff *skb;
1604 struct ieee80211_tx_info *info;
1605 u32 status;
17033543
NS		 1606 struct ieee80211_sta *sta;
1607 struct mwl8k_sta *sta_info = NULL;
1608 u16 rate_info;
17033543 1609 struct ieee80211_hdr *wh;
a66098da 1610
45eb400d
LB		 1611 tx = txq->head;
1612 tx_desc = txq->txd + tx;
a66098da
LB		 1613
1614 status = le32_to_cpu(tx_desc->status);
1615
1616 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1617 if (!force)
1618 break;
1619 tx_desc->status &=
1620 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1621 }
1622
45eb400d 1623 txq->head = (tx + 1) % MWL8K_TX_DESCS;
8ccbc3b8
KV		 1624 BUG_ON(txq->len == 0);
1625 txq->len--;
a66098da
LB		 1626 priv->pending_tx_pkts--;
1627
1628 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
ce9e2e1b 1629 size = le16_to_cpu(tx_desc->pkt_len);
45eb400d
LB		 1630 skb = txq->skb[tx];
1631 txq->skb[tx] = NULL;
a66098da
LB		 1632
1633 BUG_ON(skb == NULL);
1634 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1635
20f09c3d 1636 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
a66098da 1637
17033543
NS		 1638 wh = (struct ieee80211_hdr *) skb->data;
1639
a66098da
LB		 1640 /* Mark descriptor as unused */
1641 tx_desc->pkt_phys_addr = 0;
1642 tx_desc->pkt_len = 0;
1643
a66098da 1644 info = IEEE80211_SKB_CB(skb);
17033543
NS		 1645 if (ieee80211_is_data(wh->frame_control)) {
1646 sta = info->control.sta;
1647 if (sta) {
1648 sta_info = MWL8K_STA(sta);
1649 BUG_ON(sta_info == NULL);
1650 rate_info = le16_to_cpu(tx_desc->rate_info);
17033543
NS		 1651 /* If rate is < 6.5 Mpbs for an ht station
1652 * do not form an ampdu. If the station is a
1653 * legacy station (format = 0), do not form an
1654 * ampdu
1655 */
49adc5ce
JL		 1656 if (RI_RATE_ID_MCS(rate_info) < 1 ||
1657 RI_FORMAT(rate_info) == 0) {
17033543
NS		 1658 sta_info->is_ampdu_allowed = false;
1659 } else {
1660 sta_info->is_ampdu_allowed = true;
1661 }
1662 }
1663 }
1664
a66098da 1665 ieee80211_tx_info_clear_status(info);
0bf22c37
NS		 1666
1667 /* Rate control is happening in the firmware.
1668 * Ensure no tx rate is being reported.
1669 */
ba30c4a5
YAP		 1670 info->status.rates[0].idx = -1;
1671 info->status.rates[0].count = 1;
0bf22c37 1672
ce9e2e1b 1673 if (MWL8K_TXD_SUCCESS(status))
a66098da 1674 info->flags |= IEEE80211_TX_STAT_ACK;
a66098da
LB		 1675
1676 ieee80211_tx_status_irqsafe(hw, skb);
1677
efb7c49a 1678 processed++;
a66098da
LB		 1679 }
1680
efb7c49a 1681 return processed;
a66098da
LB		 1682}
1683
1684/* must be called only when the card's transmit is completely halted */
1685static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1686{
1687 struct mwl8k_priv *priv = hw->priv;
1688 struct mwl8k_tx_queue *txq = priv->txq + index;
1689
73b46320
BC		 1690 if (txq->txd == NULL)
1691 return;
1692
efb7c49a 1693 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
a66098da 1694
45eb400d
LB		 1695 kfree(txq->skb);
1696 txq->skb = NULL;
a66098da
LB		 1697
1698 pci_free_consistent(priv->pdev,
1699 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
45eb400d
LB		 1700 txq->txd, txq->txd_dma);
1701 txq->txd = NULL;
a66098da
LB		 1702}
1703
ac109fd0 1704/* caller must hold priv->stream_lock when calling the stream functions */
ba30c4a5 1705static struct mwl8k_ampdu_stream *
ac109fd0
BC		 1706mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1707{
1708 struct mwl8k_ampdu_stream *stream;
1709 struct mwl8k_priv *priv = hw->priv;
1710 int i;
1711
1712 for (i = 0; i < priv->num_ampdu_queues; i++) {
1713 stream = &priv->ampdu[i];
1714 if (stream->state == AMPDU_NO_STREAM) {
1715 stream->sta = sta;
1716 stream->state = AMPDU_STREAM_NEW;
1717 stream->tid = tid;
1718 stream->idx = i;
1719 stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
1720 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1721 sta->addr, tid);
1722 return stream;
1723 }
1724 }
1725 return NULL;
1726}
1727
1728static int
1729mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1730{
1731 int ret;
1732
1733 /* if the stream has already been started, don't start it again */
1734 if (stream->state != AMPDU_STREAM_NEW)
1735 return 0;
1736 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1737 if (ret)
1738 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1739 "%d\n", stream->sta->addr, stream->tid, ret);
1740 else
1741 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1742 stream->sta->addr, stream->tid);
1743 return ret;
1744}
1745
1746static void
1747mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1748{
1749 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1750 stream->tid);
1751 memset(stream, 0, sizeof(*stream));
1752}
1753
1754static struct mwl8k_ampdu_stream *
1755mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1756{
1757 struct mwl8k_priv *priv = hw->priv;
1758 int i;
1759
1760 for (i = 0 ; i < priv->num_ampdu_queues; i++) {
1761 struct mwl8k_ampdu_stream *stream;
1762 stream = &priv->ampdu[i];
1763 if (stream->state == AMPDU_NO_STREAM)
1764 continue;
1765 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1766 stream->tid == tid)
1767 return stream;
1768 }
1769 return NULL;
1770}
1771
d0805c1c
BC		 1772#define MWL8K_AMPDU_PACKET_THRESHOLD 64
1773static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1774{
1775 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1776 struct tx_traffic_info *tx_stats;
1777
1778 BUG_ON(tid >= MWL8K_MAX_TID);
1779 tx_stats = &sta_info->tx_stats[tid];
1780
1781 return sta_info->is_ampdu_allowed &&
1782 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1783}
1784
1785static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1786{
1787 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1788 struct tx_traffic_info *tx_stats;
1789
1790 BUG_ON(tid >= MWL8K_MAX_TID);
1791 tx_stats = &sta_info->tx_stats[tid];
1792
1793 if (tx_stats->start_time == 0)
1794 tx_stats->start_time = jiffies;
1795
1796 /* reset the packet count after each second elapses. If the number of
1797 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1798 * an ampdu stream to be started.
1799 */
1800 if (jiffies - tx_stats->start_time > HZ) {
1801 tx_stats->pkts = 0;
1802 tx_stats->start_time = 0;
1803 } else
1804 tx_stats->pkts++;
1805}
1806
7bb45683 1807static void
a66098da
LB		 1808mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1809{
1810 struct mwl8k_priv *priv = hw->priv;
1811 struct ieee80211_tx_info *tx_info;
23b33906 1812 struct mwl8k_vif *mwl8k_vif;
65f3ddcd 1813 struct ieee80211_sta *sta;
a66098da
LB		 1814 struct ieee80211_hdr *wh;
1815 struct mwl8k_tx_queue *txq;
1816 struct mwl8k_tx_desc *tx;
a66098da 1817 dma_addr_t dma;
23b33906
LB		 1818 u32 txstatus;
1819 u8 txdatarate;
1820 u16 qos;
65f3ddcd
NS		 1821 int txpriority;
1822 u8 tid = 0;
1823 struct mwl8k_ampdu_stream *stream = NULL;
1824 bool start_ba_session = false;
3a769888 1825 bool mgmtframe = false;
a0e7c6cf 1826 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
a66098da 1827
23b33906
LB		 1828 wh = (struct ieee80211_hdr *)skb->data;
1829 if (ieee80211_is_data_qos(wh->frame_control))
1830 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1831 else
1832 qos = 0;
a66098da 1833
3a769888
NS		 1834 if (ieee80211_is_mgmt(wh->frame_control))
1835 mgmtframe = true;
1836
d9a07d49 1837 if (priv->ap_fw)
ff776cec 1838 mwl8k_encapsulate_tx_frame(priv, skb);
d9a07d49 1839 else
ff776cec 1840 mwl8k_add_dma_header(priv, skb, 0);
d9a07d49 1841
23b33906 1842 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
a66098da
LB		 1843
1844 tx_info = IEEE80211_SKB_CB(skb);
65f3ddcd 1845 sta = tx_info->control.sta;
a66098da 1846 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
a66098da
LB		 1847
1848 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
a66098da 1849 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
657232b6
LB		 1850 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1851 mwl8k_vif->seqno += 0x10;
a66098da
LB		 1852 }
1853
23b33906
LB		 1854 /* Setup firmware control bit fields for each frame type. */
1855 txstatus = 0;
1856 txdatarate = 0;
1857 if (ieee80211_is_mgmt(wh->frame_control) ||
1858 ieee80211_is_ctl(wh->frame_control)) {
1859 txdatarate = 0;
e0493a8d 1860 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
23b33906
LB		 1861 } else if (ieee80211_is_data(wh->frame_control)) {
1862 txdatarate = 1;
1863 if (is_multicast_ether_addr(wh->addr1))
1864 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1865
e0493a8d 1866 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
23b33906 1867 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
e0493a8d 1868 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
23b33906 1869 else
e0493a8d 1870 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
23b33906 1871 }
a66098da 1872
a0e7c6cf
NS		 1873 /* Queue ADDBA request in the respective data queue. While setting up
1874 * the ampdu stream, mac80211 queues further packets for that
1875 * particular ra/tid pair. However, packets piled up in the hardware
1876 * for that ra/tid pair will still go out. ADDBA request and the
1877 * related data packets going out from different queues asynchronously
1878 * will cause a shift in the receiver window which might result in
1879 * ampdu packets getting dropped at the receiver after the stream has
1880 * been setup.
1881 */
1882 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1883 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1884 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1885 priv->ap_fw)) {
1886 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1887 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1888 index = mwl8k_tid_queue_mapping(tid);
1889 }
1890
65f3ddcd
NS		 1891 txpriority = index;
1892
1893 if (ieee80211_is_data_qos(wh->frame_control) &&
1894 skb->protocol != cpu_to_be16(ETH_P_PAE) &&
1895 sta->ht_cap.ht_supported && priv->ap_fw) {
1896 tid = qos & 0xf;
d0805c1c 1897 mwl8k_tx_count_packet(sta, tid);
65f3ddcd
NS		 1898 spin_lock(&priv->stream_lock);
1899 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1900 if (stream != NULL) {
1901 if (stream->state == AMPDU_STREAM_ACTIVE) {
1902 txpriority = stream->txq_idx;
1903 index = stream->txq_idx;
1904 } else if (stream->state == AMPDU_STREAM_NEW) {
1905 /* We get here if the driver sends us packets
1906 * after we've initiated a stream, but before
1907 * our ampdu_action routine has been called
1908 * with IEEE80211_AMPDU_TX_START to get the SSN
1909 * for the ADDBA request. So this packet can
1910 * go out with no risk of sequence number
1911 * mismatch. No special handling is required.
1912 */
1913 } else {
1914 /* Drop packets that would go out after the
1915 * ADDBA request was sent but before the ADDBA
1916 * response is received. If we don't do this,
1917 * the recipient would probably receive it
1918 * after the ADDBA request with SSN 0. This
1919 * will cause the recipient's BA receive window
1920 * to shift, which would cause the subsequent
1921 * packets in the BA stream to be discarded.
1922 * mac80211 queues our packets for us in this
1923 * case, so this is really just a safety check.
1924 */
1925 wiphy_warn(hw->wiphy,
1926 "Cannot send packet while ADDBA "
1927 "dialog is underway.\n");
1928 spin_unlock(&priv->stream_lock);
1929 dev_kfree_skb(skb);
1930 return;
1931 }
1932 } else {
1933 /* Defer calling mwl8k_start_stream so that the current
1934 * skb can go out before the ADDBA request. This
1935 * prevents sequence number mismatch at the recepient
1936 * as described above.
1937 */
d0805c1c 1938 if (mwl8k_ampdu_allowed(sta, tid)) {
17033543
NS		 1939 stream = mwl8k_add_stream(hw, sta, tid);
1940 if (stream != NULL)
1941 start_ba_session = true;
1942 }
65f3ddcd
NS		 1943 }
1944 spin_unlock(&priv->stream_lock);
1945 }
1946
a66098da
LB		 1947 dma = pci_map_single(priv->pdev, skb->data,
1948 skb->len, PCI_DMA_TODEVICE);
1949
1950 if (pci_dma_mapping_error(priv->pdev, dma)) {
c96c31e4
JP		 1951 wiphy_debug(hw->wiphy,
1952 "failed to dma map skb, dropping TX frame.\n");
65f3ddcd
NS		 1953 if (start_ba_session) {
1954 spin_lock(&priv->stream_lock);
1955 mwl8k_remove_stream(hw, stream);
1956 spin_unlock(&priv->stream_lock);
1957 }
23b33906 1958 dev_kfree_skb(skb);
7bb45683 1959 return;
a66098da
LB		 1960 }
1961
23b33906 1962 spin_lock_bh(&priv->tx_lock);
a66098da 1963
23b33906 1964 txq = priv->txq + index;
a66098da 1965
3a769888
NS		 1966 /* Mgmt frames that go out frequently are probe
1967 * responses. Other mgmt frames got out relatively
1968 * infrequently. Hence reserve 2 buffers so that
1969 * other mgmt frames do not get dropped due to an
1970 * already queued probe response in one of the
1971 * reserved buffers.
1972 */
1973
1974 if (txq->len >= MWL8K_TX_DESCS - 2) {
1975 if (mgmtframe == false ||
1976 txq->len == MWL8K_TX_DESCS) {
1977 if (start_ba_session) {
1978 spin_lock(&priv->stream_lock);
1979 mwl8k_remove_stream(hw, stream);
1980 spin_unlock(&priv->stream_lock);
1981 }
1982 spin_unlock_bh(&priv->tx_lock);
1983 dev_kfree_skb(skb);
1984 return;
3a7dbc3b 1985 }
65f3ddcd
NS		 1986 }
1987
45eb400d
LB		 1988 BUG_ON(txq->skb[txq->tail] != NULL);
1989 txq->skb[txq->tail] = skb;
a66098da 1990
45eb400d 1991 tx = txq->txd + txq->tail;
23b33906 1992 tx->data_rate = txdatarate;
65f3ddcd 1993 tx->tx_priority = txpriority;
a66098da 1994 tx->qos_control = cpu_to_le16(qos);
a66098da
LB		 1995 tx->pkt_phys_addr = cpu_to_le32(dma);
1996 tx->pkt_len = cpu_to_le16(skb->len);
23b33906 1997 tx->rate_info = 0;
a680400e
LB		 1998 if (!priv->ap_fw && tx_info->control.sta != NULL)
1999 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
2000 else
2001 tx->peer_id = 0;
566875db
PN		 2002
2003 if (priv->ap_fw)
2004 tx->timestamp = cpu_to_le32(ioread32(priv->regs +
2005 MWL8K_HW_TIMER_REGISTER));
2006
a66098da 2007 wmb();
23b33906
LB		 2008 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
2009
8ccbc3b8 2010 txq->len++;
a66098da 2011 priv->pending_tx_pkts++;
a66098da 2012
45eb400d
LB		 2013 txq->tail++;
2014 if (txq->tail == MWL8K_TX_DESCS)
2015 txq->tail = 0;
23b33906 2016
23b33906 2017 mwl8k_tx_start(priv);
a66098da
LB		 2018
2019 spin_unlock_bh(&priv->tx_lock);
65f3ddcd
NS		 2020
2021 /* Initiate the ampdu session here */
2022 if (start_ba_session) {
2023 spin_lock(&priv->stream_lock);
2024 if (mwl8k_start_stream(hw, stream))
2025 mwl8k_remove_stream(hw, stream);
2026 spin_unlock(&priv->stream_lock);
2027 }
a66098da
LB		 2028}
2029
2030
618952a7
LB		 2031/*
2032 * Firmware access.
2033 *
2034 * We have the following requirements for issuing firmware commands:
2035 * - Some commands require that the packet transmit path is idle when
2036 * the command is issued. (For simplicity, we'll just quiesce the
2037 * transmit path for every command.)
2038 * - There are certain sequences of commands that need to be issued to
2039 * the hardware sequentially, with no other intervening commands.
2040 *
2041 * This leads to an implementation of a "firmware lock" as a mutex that
2042 * can be taken recursively, and which is taken by both the low-level
2043 * command submission function (mwl8k_post_cmd) as well as any users of
2044 * that function that require issuing of an atomic sequence of commands,
2045 * and quiesces the transmit path whenever it's taken.
2046 */
2047static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2048{
2049 struct mwl8k_priv *priv = hw->priv;
2050
2051 if (priv->fw_mutex_owner != current) {
2052 int rc;
2053
2054 mutex_lock(&priv->fw_mutex);
2055 ieee80211_stop_queues(hw);
2056
2057 rc = mwl8k_tx_wait_empty(hw);
2058 if (rc) {
2059 ieee80211_wake_queues(hw);
2060 mutex_unlock(&priv->fw_mutex);
2061
2062 return rc;
2063 }
2064
2065 priv->fw_mutex_owner = current;
2066 }
2067
2068 priv->fw_mutex_depth++;
2069
2070 return 0;
2071}
2072
2073static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2074{
2075 struct mwl8k_priv *priv = hw->priv;
2076
2077 if (!--priv->fw_mutex_depth) {
2078 ieee80211_wake_queues(hw);
2079 priv->fw_mutex_owner = NULL;
2080 mutex_unlock(&priv->fw_mutex);
2081 }
2082}
2083
2084
a66098da
LB		 2085/*
2086 * Command processing.
2087 */
2088
0c9cc640
LB		 2089/* Timeout firmware commands after 10s */
2090#define MWL8K_CMD_TIMEOUT_MS 10000
a66098da
LB		 2091
2092static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2093{
2094 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2095 struct mwl8k_priv *priv = hw->priv;
2096 void __iomem *regs = priv->regs;
2097 dma_addr_t dma_addr;
2098 unsigned int dma_size;
2099 int rc;
a66098da
LB		 2100 unsigned long timeout = 0;
2101 u8 buf[32];
2102
b603742f 2103 cmd->result = (__force __le16) 0xffff;
a66098da
LB		 2104 dma_size = le16_to_cpu(cmd->length);
2105 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2106 PCI_DMA_BIDIRECTIONAL);
2107 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2108 return -ENOMEM;
2109
618952a7 2110 rc = mwl8k_fw_lock(hw);
39a1e42e
LB		 2111 if (rc) {
2112 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2113 PCI_DMA_BIDIRECTIONAL);
618952a7 2114 return rc;
39a1e42e 2115 }
a66098da 2116
a66098da
LB		 2117 priv->hostcmd_wait = &cmd_wait;
2118 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2119 iowrite32(MWL8K_H2A_INT_DOORBELL,
2120 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2121 iowrite32(MWL8K_H2A_INT_DUMMY,
2122 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
a66098da
LB		 2123
2124 timeout = wait_for_completion_timeout(&cmd_wait,
2125 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2126
618952a7
LB		 2127 priv->hostcmd_wait = NULL;
2128
2129 mwl8k_fw_unlock(hw);
2130
37055bd4
LB		 2131 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2132 PCI_DMA_BIDIRECTIONAL);
2133
a66098da 2134 if (!timeout) {
5db55844 2135 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
c96c31e4
JP		 2136 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2137 MWL8K_CMD_TIMEOUT_MS);
a66098da
LB		 2138 rc = -ETIMEDOUT;
2139 } else {
0c9cc640
LB		 2140 int ms;
2141
2142 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2143
ce9e2e1b 2144 rc = cmd->result ? -EINVAL : 0;
a66098da 2145 if (rc)
5db55844 2146 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
c96c31e4
JP		 2147 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2148 le16_to_cpu(cmd->result));
0c9cc640 2149 else if (ms > 2000)
5db55844 2150 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
c96c31e4
JP		 2151 mwl8k_cmd_name(cmd->code,
2152 buf, sizeof(buf)),
2153 ms);
a66098da
LB		 2154 }
2155
a66098da
LB		 2156 return rc;
2157}
2158
f57ca9c1
LB		 2159static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2160 struct ieee80211_vif *vif,
2161 struct mwl8k_cmd_pkt *cmd)
2162{
2163 if (vif != NULL)
2164 cmd->macid = MWL8K_VIF(vif)->macid;
2165 return mwl8k_post_cmd(hw, cmd);
2166}
2167
1349ad2f
LB		 2168/*
2169 * Setup code shared between STA and AP firmware images.
2170 */
2171static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2172{
2173 struct mwl8k_priv *priv = hw->priv;
2174
2175 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2176 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2177
2178 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2179 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2180
2181 priv->band_24.band = IEEE80211_BAND_2GHZ;
2182 priv->band_24.channels = priv->channels_24;
2183 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2184 priv->band_24.bitrates = priv->rates_24;
2185 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2186
2187 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2188}
2189
4eae9edd
LB		 2190static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2191{
2192 struct mwl8k_priv *priv = hw->priv;
2193
2194 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2195 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2196
2197 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2198 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2199
2200 priv->band_50.band = IEEE80211_BAND_5GHZ;
2201 priv->band_50.channels = priv->channels_50;
2202 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2203 priv->band_50.bitrates = priv->rates_50;
2204 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2205
2206 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2207}
2208
a66098da 2209/*
04b147b1 2210 * CMD_GET_HW_SPEC (STA version).
a66098da 2211 */
04b147b1 2212struct mwl8k_cmd_get_hw_spec_sta {
a66098da
LB		 2213 struct mwl8k_cmd_pkt header;
2214 __u8 hw_rev;
2215 __u8 host_interface;
2216 __le16 num_mcaddrs;
d89173f2 2217 __u8 perm_addr[ETH_ALEN];
a66098da
LB		 2218 __le16 region_code;
2219 __le32 fw_rev;
2220 __le32 ps_cookie;
2221 __le32 caps;
2222 __u8 mcs_bitmap[16];
2223 __le32 rx_queue_ptr;
2224 __le32 num_tx_queues;
e600707b 2225 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
a66098da
LB		 2226 __le32 caps2;
2227 __le32 num_tx_desc_per_queue;
45eb400d 2228 __le32 total_rxd;
ba2d3587 2229} __packed;
a66098da 2230
341c9791
LB		 2231#define MWL8K_CAP_MAX_AMSDU 0x20000000
2232#define MWL8K_CAP_GREENFIELD 0x08000000
2233#define MWL8K_CAP_AMPDU 0x04000000
2234#define MWL8K_CAP_RX_STBC 0x01000000
2235#define MWL8K_CAP_TX_STBC 0x00800000
2236#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2237#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2238#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2239#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2240#define MWL8K_CAP_DELAY_BA 0x00003000
2241#define MWL8K_CAP_MIMO 0x00000200
2242#define MWL8K_CAP_40MHZ 0x00000100
06953235
LB		 2243#define MWL8K_CAP_BAND_MASK 0x00000007
2244#define MWL8K_CAP_5GHZ 0x00000004
2245#define MWL8K_CAP_2GHZ4 0x00000001
341c9791 2246
06953235
LB		 2247static void
2248mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2249 struct ieee80211_supported_band *band, u32 cap)
341c9791 2250{
341c9791
LB		 2251 int rx_streams;
2252 int tx_streams;
2253
777ad375 2254 band->ht_cap.ht_supported = 1;
341c9791
LB		 2255
2256 if (cap & MWL8K_CAP_MAX_AMSDU)
777ad375 2257 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
341c9791 2258 if (cap & MWL8K_CAP_GREENFIELD)
777ad375 2259 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
341c9791
LB		 2260 if (cap & MWL8K_CAP_AMPDU) {
2261 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
777ad375
LB		 2262 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2263 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
341c9791
LB		 2264 }
2265 if (cap & MWL8K_CAP_RX_STBC)
777ad375 2266 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
341c9791 2267 if (cap & MWL8K_CAP_TX_STBC)
777ad375 2268 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
341c9791 2269 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
777ad375 2270 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
341c9791 2271 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
777ad375 2272 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
341c9791 2273 if (cap & MWL8K_CAP_DELAY_BA)
777ad375 2274 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
341c9791 2275 if (cap & MWL8K_CAP_40MHZ)
777ad375 2276 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
341c9791
LB		 2277
2278 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2279 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2280
777ad375 2281 band->ht_cap.mcs.rx_mask[0] = 0xff;
341c9791 2282 if (rx_streams >= 2)
777ad375 2283 band->ht_cap.mcs.rx_mask[1] = 0xff;
341c9791 2284 if (rx_streams >= 3)
777ad375
LB		 2285 band->ht_cap.mcs.rx_mask[2] = 0xff;
2286 band->ht_cap.mcs.rx_mask[4] = 0x01;
2287 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
341c9791
LB		 2288
2289 if (rx_streams != tx_streams) {
777ad375
LB		 2290 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2291 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
341c9791
LB		 2292 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2293 }
2294}
2295
06953235
LB		 2296static void
2297mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2298{
2299 struct mwl8k_priv *priv = hw->priv;
2300
2301 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2302 mwl8k_setup_2ghz_band(hw);
2303 if (caps & MWL8K_CAP_MIMO)
2304 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2305 }
2306
2307 if (caps & MWL8K_CAP_5GHZ) {
2308 mwl8k_setup_5ghz_band(hw);
2309 if (caps & MWL8K_CAP_MIMO)
2310 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2311 }
2312}
2313
04b147b1 2314static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
a66098da
LB		 2315{
2316 struct mwl8k_priv *priv = hw->priv;
04b147b1 2317 struct mwl8k_cmd_get_hw_spec_sta *cmd;
a66098da
LB		 2318 int rc;
2319 int i;
2320
2321 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2322 if (cmd == NULL)
2323 return -ENOMEM;
2324
2325 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2326 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2327
2328 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2329 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
45eb400d 2330 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b
BC		 2331 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2332 for (i = 0; i < mwl8k_tx_queues(priv); i++)
45eb400d 2333 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
4ff6432e 2334 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
45eb400d 2335 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
a66098da
LB		 2336
2337 rc = mwl8k_post_cmd(hw, &cmd->header);
2338
2339 if (!rc) {
2340 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2341 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
4ff6432e 2342 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
a66098da 2343 priv->hw_rev = cmd->hw_rev;
06953235 2344 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2345 priv->ap_macids_supported = 0x00000000;
2346 priv->sta_macids_supported = 0x00000001;
a66098da
LB		 2347 }
2348
2349 kfree(cmd);
2350 return rc;
2351}
2352
42fba21d
LB		 2353/*
2354 * CMD_GET_HW_SPEC (AP version).
2355 */
2356struct mwl8k_cmd_get_hw_spec_ap {
2357 struct mwl8k_cmd_pkt header;
2358 __u8 hw_rev;
2359 __u8 host_interface;
2360 __le16 num_wcb;
2361 __le16 num_mcaddrs;
2362 __u8 perm_addr[ETH_ALEN];
2363 __le16 region_code;
2364 __le16 num_antenna;
2365 __le32 fw_rev;
2366 __le32 wcbbase0;
2367 __le32 rxwrptr;
2368 __le32 rxrdptr;
2369 __le32 ps_cookie;
2370 __le32 wcbbase1;
2371 __le32 wcbbase2;
2372 __le32 wcbbase3;
952a0e96 2373 __le32 fw_api_version;
8a7a578c
BC		 2374 __le32 caps;
2375 __le32 num_of_ampdu_queues;
2376 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
ba2d3587 2377} __packed;
42fba21d
LB		 2378
2379static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2380{
2381 struct mwl8k_priv *priv = hw->priv;
2382 struct mwl8k_cmd_get_hw_spec_ap *cmd;
8a7a578c 2383 int rc, i;
952a0e96 2384 u32 api_version;
42fba21d
LB		 2385
2386 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2387 if (cmd == NULL)
2388 return -ENOMEM;
2389
2390 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2391 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2392
2393 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2394 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2395
2396 rc = mwl8k_post_cmd(hw, &cmd->header);
2397
2398 if (!rc) {
2399 int off;
2400
952a0e96
BC		 2401 api_version = le32_to_cpu(cmd->fw_api_version);
2402 if (priv->device_info->fw_api_ap != api_version) {
2403 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2404 " Expected %d got %d.\n", MWL8K_NAME,
2405 priv->device_info->part_name,
2406 priv->device_info->fw_api_ap,
2407 api_version);
2408 rc = -EINVAL;
2409 goto done;
2410 }
42fba21d
LB		 2411 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2412 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2413 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2414 priv->hw_rev = cmd->hw_rev;
8a7a578c 2415 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
ee0ddf18
LB		 2416 priv->ap_macids_supported = 0x000000ff;
2417 priv->sta_macids_supported = 0x00000000;
8a7a578c
BC		 2418 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2419 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2420 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2421 " but we only support %d.\n",
2422 priv->num_ampdu_queues,
2423 MWL8K_MAX_AMPDU_QUEUES);
2424 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2425 }
42fba21d 2426 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
b603742f 2427 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d
LB		 2428
2429 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
b603742f 2430 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
42fba21d 2431
73b46320
BC		 2432 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2433 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2434 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2435 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
8a7a578c
BC		 2436
2437 for (i = 0; i < priv->num_ampdu_queues; i++)
e600707b 2438 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
8a7a578c 2439 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
42fba21d
LB		 2440 }
2441
952a0e96 2442done:
42fba21d
LB		 2443 kfree(cmd);
2444 return rc;
2445}
2446
2447/*
2448 * CMD_SET_HW_SPEC.
2449 */
2450struct mwl8k_cmd_set_hw_spec {
2451 struct mwl8k_cmd_pkt header;
2452 __u8 hw_rev;
2453 __u8 host_interface;
2454 __le16 num_mcaddrs;
2455 __u8 perm_addr[ETH_ALEN];
2456 __le16 region_code;
2457 __le32 fw_rev;
2458 __le32 ps_cookie;
2459 __le32 caps;
2460 __le32 rx_queue_ptr;
2461 __le32 num_tx_queues;
e600707b 2462 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
42fba21d
LB		 2463 __le32 flags;
2464 __le32 num_tx_desc_per_queue;
2465 __le32 total_rxd;
ba2d3587 2466} __packed;
42fba21d 2467
8a7a578c
BC		 2468/* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2469 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2470 * the packets that are queued for more than 500ms, will be dropped in the
2471 * hardware. This helps minimizing the issues caused due to head-of-line
2472 * blocking where a slow client can hog the bandwidth and affect traffic to a
2473 * faster client.
2474 */
2475#define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
b64fe619
LB		 2476#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2477#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2478#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
42fba21d
LB		 2479
2480static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2481{
2482 struct mwl8k_priv *priv = hw->priv;
2483 struct mwl8k_cmd_set_hw_spec *cmd;
2484 int rc;
2485 int i;
2486
2487 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2488 if (cmd == NULL)
2489 return -ENOMEM;
2490
2491 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2492 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2493
2494 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2495 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
e600707b 2496 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
85c9205c
NS		 2497
2498 /*
2499 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2500 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2501 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2502 * priority is interpreted the right way in firmware.
2503 */
e600707b
BC		 2504 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2505 int j = mwl8k_tx_queues(priv) - 1 - i;
85c9205c
NS		 2506 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2507 }
2508
b64fe619
LB		 2509 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2510 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
31d291a7
NS		 2511 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
2512 MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY);
42fba21d
LB		 2513 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2514 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2515
2516 rc = mwl8k_post_cmd(hw, &cmd->header);
2517 kfree(cmd);
2518
2519 return rc;
2520}
2521
a66098da
LB		 2522/*
2523 * CMD_MAC_MULTICAST_ADR.
2524 */
2525struct mwl8k_cmd_mac_multicast_adr {
2526 struct mwl8k_cmd_pkt header;
2527 __le16 action;
2528 __le16 numaddr;
ce9e2e1b 2529 __u8 addr[0][ETH_ALEN];
a66098da
LB		 2530};
2531
d5e30845
LB		 2532#define MWL8K_ENABLE_RX_DIRECTED 0x0001
2533#define MWL8K_ENABLE_RX_MULTICAST 0x0002
2534#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2535#define MWL8K_ENABLE_RX_BROADCAST 0x0008
ce9e2e1b 2536
e81cd2d6 2537static struct mwl8k_cmd_pkt *
447ced07 2538__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
22bedad3 2539 struct netdev_hw_addr_list *mc_list)
a66098da 2540{
e81cd2d6 2541 struct mwl8k_priv *priv = hw->priv;
a66098da 2542 struct mwl8k_cmd_mac_multicast_adr *cmd;
e81cd2d6 2543 int size;
22bedad3
JP		 2544 int mc_count = 0;
2545
2546 if (mc_list)
2547 mc_count = netdev_hw_addr_list_count(mc_list);
e81cd2d6 2548
447ced07 2549 if (allmulti || mc_count > priv->num_mcaddrs) {
d5e30845
LB		 2550 allmulti = 1;
2551 mc_count = 0;
2552 }
e81cd2d6
LB		 2553
2554 size = sizeof(*cmd) + mc_count * ETH_ALEN;
ce9e2e1b 2555
e81cd2d6 2556 cmd = kzalloc(size, GFP_ATOMIC);
a66098da 2557 if (cmd == NULL)
e81cd2d6 2558 return NULL;
a66098da
LB		 2559
2560 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2561 cmd->header.length = cpu_to_le16(size);
d5e30845
LB		 2562 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2563 MWL8K_ENABLE_RX_BROADCAST);
2564
2565 if (allmulti) {
2566 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2567 } else if (mc_count) {
22bedad3
JP		 2568 struct netdev_hw_addr *ha;
2569 int i = 0;
d5e30845
LB		 2570
2571 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2572 cmd->numaddr = cpu_to_le16(mc_count);
22bedad3
JP		 2573 netdev_hw_addr_list_for_each(ha, mc_list) {
2574 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
a66098da 2575 }
a66098da
LB		 2576 }
2577
e81cd2d6 2578 return &cmd->header;
a66098da
LB		 2579}
2580
2581/*
55489b6e 2582 * CMD_GET_STAT.
a66098da 2583 */
55489b6e 2584struct mwl8k_cmd_get_stat {
a66098da 2585 struct mwl8k_cmd_pkt header;
a66098da 2586 __le32 stats[64];
ba2d3587 2587} __packed;
a66098da
LB		 2588
2589#define MWL8K_STAT_ACK_FAILURE 9
2590#define MWL8K_STAT_RTS_FAILURE 12
2591#define MWL8K_STAT_FCS_ERROR 24
2592#define MWL8K_STAT_RTS_SUCCESS 11
2593
55489b6e
LB		 2594static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2595 struct ieee80211_low_level_stats *stats)
a66098da 2596{
55489b6e 2597 struct mwl8k_cmd_get_stat *cmd;
a66098da
LB		 2598 int rc;
2599
2600 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2601 if (cmd == NULL)
2602 return -ENOMEM;
2603
2604 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2605 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 2606
2607 rc = mwl8k_post_cmd(hw, &cmd->header);
2608 if (!rc) {
2609 stats->dot11ACKFailureCount =
2610 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2611 stats->dot11RTSFailureCount =
2612 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2613 stats->dot11FCSErrorCount =
2614 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2615 stats->dot11RTSSuccessCount =
2616 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2617 }
2618 kfree(cmd);
2619
2620 return rc;
2621}
2622
2623/*
55489b6e 2624 * CMD_RADIO_CONTROL.
a66098da 2625 */
55489b6e 2626struct mwl8k_cmd_radio_control {
a66098da
LB		 2627 struct mwl8k_cmd_pkt header;
2628 __le16 action;
2629 __le16 control;
2630 __le16 radio_on;
ba2d3587 2631} __packed;
a66098da 2632
c46563b7 2633static int
55489b6e 2634mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
a66098da
LB		 2635{
2636 struct mwl8k_priv *priv = hw->priv;
55489b6e 2637 struct mwl8k_cmd_radio_control *cmd;
a66098da
LB		 2638 int rc;
2639
c46563b7 2640 if (enable == priv->radio_on && !force)
a66098da
LB		 2641 return 0;
2642
a66098da
LB		 2643 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2644 if (cmd == NULL)
2645 return -ENOMEM;
2646
2647 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2648 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2649 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
68ce3884 2650 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
a66098da
LB		 2651 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2652
2653 rc = mwl8k_post_cmd(hw, &cmd->header);
2654 kfree(cmd);
2655
2656 if (!rc)
c46563b7 2657 priv->radio_on = enable;
a66098da
LB		 2658
2659 return rc;
2660}
2661
55489b6e 2662static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
c46563b7 2663{
55489b6e 2664 return mwl8k_cmd_radio_control(hw, 0, 0);
c46563b7
LB		 2665}
2666
55489b6e 2667static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
c46563b7 2668{
55489b6e 2669 return mwl8k_cmd_radio_control(hw, 1, 0);
c46563b7
LB		 2670}
2671
a66098da
LB		 2672static int
2673mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2674{
99200a99 2675 struct mwl8k_priv *priv = hw->priv;
a66098da 2676
68ce3884 2677 priv->radio_short_preamble = short_preamble;
a66098da 2678
55489b6e 2679 return mwl8k_cmd_radio_control(hw, 1, 1);
a66098da
LB		 2680}
2681
2682/*
55489b6e 2683 * CMD_RF_TX_POWER.
a66098da 2684 */
41fdf097 2685#define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
a66098da 2686
55489b6e 2687struct mwl8k_cmd_rf_tx_power {
a66098da
LB		 2688 struct mwl8k_cmd_pkt header;
2689 __le16 action;
2690 __le16 support_level;
2691 __le16 current_level;
2692 __le16 reserved;
41fdf097 2693 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
ba2d3587 2694} __packed;
a66098da 2695
55489b6e 2696static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
a66098da 2697{
55489b6e 2698 struct mwl8k_cmd_rf_tx_power *cmd;
a66098da
LB		 2699 int rc;
2700
2701 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2702 if (cmd == NULL)
2703 return -ENOMEM;
2704
2705 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2706 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2707 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2708 cmd->support_level = cpu_to_le16(dBm);
2709
2710 rc = mwl8k_post_cmd(hw, &cmd->header);
2711 kfree(cmd);
2712
2713 return rc;
2714}
2715
41fdf097
NS		 2716/*
2717 * CMD_TX_POWER.
2718 */
2719#define MWL8K_TX_POWER_LEVEL_TOTAL 12
2720
2721struct mwl8k_cmd_tx_power {
2722 struct mwl8k_cmd_pkt header;
2723 __le16 action;
2724 __le16 band;
2725 __le16 channel;
2726 __le16 bw;
2727 __le16 sub_ch;
2728 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
ba30c4a5 2729} __packed;
41fdf097
NS		 2730
2731static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2732 struct ieee80211_conf *conf,
2733 unsigned short pwr)
2734{
2735 struct ieee80211_channel *channel = conf->channel;
2736 struct mwl8k_cmd_tx_power *cmd;
2737 int rc;
2738 int i;
2739
2740 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2741 if (cmd == NULL)
2742 return -ENOMEM;
2743
2744 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2745 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2746 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2747
2748 if (channel->band == IEEE80211_BAND_2GHZ)
2749 cmd->band = cpu_to_le16(0x1);
2750 else if (channel->band == IEEE80211_BAND_5GHZ)
2751 cmd->band = cpu_to_le16(0x4);
2752
2753 cmd->channel = channel->hw_value;
2754
2755 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2756 conf->channel_type == NL80211_CHAN_HT20) {
2757 cmd->bw = cpu_to_le16(0x2);
2758 } else {
2759 cmd->bw = cpu_to_le16(0x4);
2760 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2761 cmd->sub_ch = cpu_to_le16(0x3);
2762 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2763 cmd->sub_ch = cpu_to_le16(0x1);
2764 }
2765
2766 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2767 cmd->power_level_list[i] = cpu_to_le16(pwr);
2768
2769 rc = mwl8k_post_cmd(hw, &cmd->header);
2770 kfree(cmd);
2771
2772 return rc;
2773}
2774
08b06347
LB		 2775/*
2776 * CMD_RF_ANTENNA.
2777 */
2778struct mwl8k_cmd_rf_antenna {
2779 struct mwl8k_cmd_pkt header;
2780 __le16 antenna;
2781 __le16 mode;
ba2d3587 2782} __packed;
08b06347
LB		 2783
2784#define MWL8K_RF_ANTENNA_RX 1
2785#define MWL8K_RF_ANTENNA_TX 2
2786
2787static int
2788mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2789{
2790 struct mwl8k_cmd_rf_antenna *cmd;
2791 int rc;
2792
2793 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2794 if (cmd == NULL)
2795 return -ENOMEM;
2796
2797 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2798 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2799 cmd->antenna = cpu_to_le16(antenna);
2800 cmd->mode = cpu_to_le16(mask);
2801
2802 rc = mwl8k_post_cmd(hw, &cmd->header);
2803 kfree(cmd);
2804
2805 return rc;
2806}
2807
b64fe619
LB		 2808/*
2809 * CMD_SET_BEACON.
2810 */
2811struct mwl8k_cmd_set_beacon {
2812 struct mwl8k_cmd_pkt header;
2813 __le16 beacon_len;
2814 __u8 beacon[0];
2815};
2816
aa21d0f6
LB		 2817static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2818 struct ieee80211_vif *vif, u8 *beacon, int len)
b64fe619
LB		 2819{
2820 struct mwl8k_cmd_set_beacon *cmd;
2821 int rc;
2822
2823 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2824 if (cmd == NULL)
2825 return -ENOMEM;
2826
2827 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2828 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2829 cmd->beacon_len = cpu_to_le16(len);
2830 memcpy(cmd->beacon, beacon, len);
2831
aa21d0f6 2832 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 2833 kfree(cmd);
2834
2835 return rc;
2836}
2837
a66098da
LB		 2838/*
2839 * CMD_SET_PRE_SCAN.
2840 */
2841struct mwl8k_cmd_set_pre_scan {
2842 struct mwl8k_cmd_pkt header;
ba2d3587 2843} __packed;
a66098da
LB		 2844
2845static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2846{
2847 struct mwl8k_cmd_set_pre_scan *cmd;
2848 int rc;
2849
2850 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2851 if (cmd == NULL)
2852 return -ENOMEM;
2853
2854 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2855 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2856
2857 rc = mwl8k_post_cmd(hw, &cmd->header);
2858 kfree(cmd);
2859
2860 return rc;
2861}
2862
2863/*
2864 * CMD_SET_POST_SCAN.
2865 */
2866struct mwl8k_cmd_set_post_scan {
2867 struct mwl8k_cmd_pkt header;
2868 __le32 isibss;
d89173f2 2869 __u8 bssid[ETH_ALEN];
ba2d3587 2870} __packed;
a66098da
LB		 2871
2872static int
0a11dfc3 2873mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
a66098da
LB		 2874{
2875 struct mwl8k_cmd_set_post_scan *cmd;
2876 int rc;
2877
2878 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2879 if (cmd == NULL)
2880 return -ENOMEM;
2881
2882 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2883 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2884 cmd->isibss = 0;
d89173f2 2885 memcpy(cmd->bssid, mac, ETH_ALEN);
a66098da
LB		 2886
2887 rc = mwl8k_post_cmd(hw, &cmd->header);
2888 kfree(cmd);
2889
2890 return rc;
2891}
2892
2893/*
2894 * CMD_SET_RF_CHANNEL.
2895 */
2896struct mwl8k_cmd_set_rf_channel {
2897 struct mwl8k_cmd_pkt header;
2898 __le16 action;
2899 __u8 current_channel;
2900 __le32 channel_flags;
ba2d3587 2901} __packed;
a66098da
LB		 2902
2903static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
610677d2 2904 struct ieee80211_conf *conf)
a66098da 2905{
610677d2 2906 struct ieee80211_channel *channel = conf->channel;
a66098da
LB		 2907 struct mwl8k_cmd_set_rf_channel *cmd;
2908 int rc;
2909
2910 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2911 if (cmd == NULL)
2912 return -ENOMEM;
2913
2914 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2915 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2916 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2917 cmd->current_channel = channel->hw_value;
610677d2 2918
a66098da 2919 if (channel->band == IEEE80211_BAND_2GHZ)
610677d2 2920 cmd->channel_flags |= cpu_to_le32(0x00000001);
42574ea2
LB		 2921 else if (channel->band == IEEE80211_BAND_5GHZ)
2922 cmd->channel_flags |= cpu_to_le32(0x00000004);
610677d2
LB		 2923
2924 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2925 conf->channel_type == NL80211_CHAN_HT20)
2926 cmd->channel_flags |= cpu_to_le32(0x00000080);
2927 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2928 cmd->channel_flags |= cpu_to_le32(0x000001900);
2929 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2930 cmd->channel_flags |= cpu_to_le32(0x000000900);
a66098da
LB		 2931
2932 rc = mwl8k_post_cmd(hw, &cmd->header);
2933 kfree(cmd);
2934
2935 return rc;
2936}
2937
2938/*
55489b6e 2939 * CMD_SET_AID.
a66098da 2940 */
55489b6e
LB		 2941#define MWL8K_FRAME_PROT_DISABLED 0x00
2942#define MWL8K_FRAME_PROT_11G 0x07
2943#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2944#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
a66098da 2945
55489b6e
LB		 2946struct mwl8k_cmd_update_set_aid {
2947 struct mwl8k_cmd_pkt header;
2948 __le16 aid;
a66098da 2949
55489b6e
LB		 2950 /* AP's MAC address (BSSID) */
2951 __u8 bssid[ETH_ALEN];
2952 __le16 protection_mode;
2953 __u8 supp_rates[14];
ba2d3587 2954} __packed;
a66098da 2955
c6e96010
LB		 2956static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2957{
2958 int i;
2959 int j;
2960
2961 /*
2962 * Clear nonstandard rates 4 and 13.
2963 */
2964 mask &= 0x1fef;
2965
2966 for (i = 0, j = 0; i < 14; i++) {
2967 if (mask & (1 << i))
777ad375 2968 rates[j++] = mwl8k_rates_24[i].hw_value;
c6e96010
LB		 2969 }
2970}
2971
55489b6e 2972static int
c6e96010
LB		 2973mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2974 struct ieee80211_vif *vif, u32 legacy_rate_mask)
a66098da 2975{
55489b6e
LB		 2976 struct mwl8k_cmd_update_set_aid *cmd;
2977 u16 prot_mode;
a66098da
LB		 2978 int rc;
2979
2980 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2981 if (cmd == NULL)
2982 return -ENOMEM;
2983
55489b6e 2984 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
a66098da 2985 cmd->header.length = cpu_to_le16(sizeof(*cmd));
7dc6a7a7 2986 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
0a11dfc3 2987 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 2988
7dc6a7a7 2989 if (vif->bss_conf.use_cts_prot) {
55489b6e
LB		 2990 prot_mode = MWL8K_FRAME_PROT_11G;
2991 } else {
7dc6a7a7 2992 switch (vif->bss_conf.ht_operation_mode &
55489b6e
LB		 2993 IEEE80211_HT_OP_MODE_PROTECTION) {
2994 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2995 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2996 break;
2997 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2998 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2999 break;
3000 default:
3001 prot_mode = MWL8K_FRAME_PROT_DISABLED;
3002 break;
3003 }
3004 }
3005 cmd->protection_mode = cpu_to_le16(prot_mode);
a66098da 3006
c6e96010 3007 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
a66098da
LB		 3008
3009 rc = mwl8k_post_cmd(hw, &cmd->header);
3010 kfree(cmd);
3011
3012 return rc;
3013}
3014
32060e1b 3015/*
55489b6e 3016 * CMD_SET_RATE.
32060e1b 3017 */
55489b6e
LB		 3018struct mwl8k_cmd_set_rate {
3019 struct mwl8k_cmd_pkt header;
3020 __u8 legacy_rates[14];
3021
3022 /* Bitmap for supported MCS codes. */
3023 __u8 mcs_set[16];
3024 __u8 reserved[16];
ba2d3587 3025} __packed;
32060e1b 3026
55489b6e 3027static int
c6e96010 3028mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
13935e2c 3029 u32 legacy_rate_mask, u8 *mcs_rates)
32060e1b 3030{
55489b6e 3031 struct mwl8k_cmd_set_rate *cmd;
32060e1b
LB		 3032 int rc;
3033
3034 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3035 if (cmd == NULL)
3036 return -ENOMEM;
3037
55489b6e 3038 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
32060e1b 3039 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c6e96010 3040 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
13935e2c 3041 memcpy(cmd->mcs_set, mcs_rates, 16);
32060e1b
LB		 3042
3043 rc = mwl8k_post_cmd(hw, &cmd->header);
3044 kfree(cmd);
3045
3046 return rc;
3047}
3048
a66098da 3049/*
55489b6e 3050 * CMD_FINALIZE_JOIN.
a66098da 3051 */
55489b6e
LB		 3052#define MWL8K_FJ_BEACON_MAXLEN 128
3053
3054struct mwl8k_cmd_finalize_join {
a66098da 3055 struct mwl8k_cmd_pkt header;
55489b6e
LB		 3056 __le32 sleep_interval; /* Number of beacon periods to sleep */
3057 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
ba2d3587 3058} __packed;
a66098da 3059
55489b6e
LB		 3060static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3061 int framelen, int dtim)
a66098da 3062{
55489b6e
LB		 3063 struct mwl8k_cmd_finalize_join *cmd;
3064 struct ieee80211_mgmt *payload = frame;
3065 int payload_len;
a66098da
LB		 3066 int rc;
3067
3068 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3069 if (cmd == NULL)
3070 return -ENOMEM;
3071
55489b6e 3072 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
a66098da 3073 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3074 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3075
3076 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3077 if (payload_len < 0)
3078 payload_len = 0;
3079 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3080 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3081
3082 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
a66098da
LB		 3083
3084 rc = mwl8k_post_cmd(hw, &cmd->header);
3085 kfree(cmd);
3086
3087 return rc;
3088}
3089
3090/*
55489b6e 3091 * CMD_SET_RTS_THRESHOLD.
a66098da 3092 */
55489b6e 3093struct mwl8k_cmd_set_rts_threshold {
a66098da
LB		 3094 struct mwl8k_cmd_pkt header;
3095 __le16 action;
55489b6e 3096 __le16 threshold;
ba2d3587 3097} __packed;
a66098da 3098
c2c2b12a
LB		 3099static int
3100mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
a66098da 3101{
55489b6e 3102 struct mwl8k_cmd_set_rts_threshold *cmd;
a66098da
LB		 3103 int rc;
3104
3105 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3106 if (cmd == NULL)
3107 return -ENOMEM;
3108
55489b6e 3109 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
a66098da 3110 cmd->header.length = cpu_to_le16(sizeof(*cmd));
c2c2b12a
LB		 3111 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3112 cmd->threshold = cpu_to_le16(rts_thresh);
a66098da
LB		 3113
3114 rc = mwl8k_post_cmd(hw, &cmd->header);
3115 kfree(cmd);
3116
a66098da
LB		 3117 return rc;
3118}
3119
3120/*
55489b6e 3121 * CMD_SET_SLOT.
a66098da 3122 */
55489b6e 3123struct mwl8k_cmd_set_slot {
a66098da
LB		 3124 struct mwl8k_cmd_pkt header;
3125 __le16 action;
55489b6e 3126 __u8 short_slot;
ba2d3587 3127} __packed;
a66098da 3128
55489b6e 3129static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
a66098da 3130{
55489b6e 3131 struct mwl8k_cmd_set_slot *cmd;
a66098da
LB		 3132 int rc;
3133
3134 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3135 if (cmd == NULL)
3136 return -ENOMEM;
3137
55489b6e 3138 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
a66098da 3139 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3140 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3141 cmd->short_slot = short_slot_time;
a66098da
LB		 3142
3143 rc = mwl8k_post_cmd(hw, &cmd->header);
3144 kfree(cmd);
3145
3146 return rc;
3147}
3148
3149/*
3150 * CMD_SET_EDCA_PARAMS.
3151 */
3152struct mwl8k_cmd_set_edca_params {
3153 struct mwl8k_cmd_pkt header;
3154
3155 /* See MWL8K_SET_EDCA_XXX below */
3156 __le16 action;
3157
3158 /* TX opportunity in units of 32 us */
3159 __le16 txop;
3160
2e484c89
LB		 3161 union {
3162 struct {
3163 /* Log exponent of max contention period: 0...15 */
3164 __le32 log_cw_max;
3165
3166 /* Log exponent of min contention period: 0...15 */
3167 __le32 log_cw_min;
3168
3169 /* Adaptive interframe spacing in units of 32us */
3170 __u8 aifs;
3171
3172 /* TX queue to configure */
3173 __u8 txq;
3174 } ap;
3175 struct {
3176 /* Log exponent of max contention period: 0...15 */
3177 __u8 log_cw_max;
a66098da 3178
2e484c89
LB		 3179 /* Log exponent of min contention period: 0...15 */
3180 __u8 log_cw_min;
a66098da 3181
2e484c89
LB		 3182 /* Adaptive interframe spacing in units of 32us */
3183 __u8 aifs;
a66098da 3184
2e484c89
LB		 3185 /* TX queue to configure */
3186 __u8 txq;
3187 } sta;
3188 };
ba2d3587 3189} __packed;
a66098da 3190
a66098da
LB		 3191#define MWL8K_SET_EDCA_CW 0x01
3192#define MWL8K_SET_EDCA_TXOP 0x02
3193#define MWL8K_SET_EDCA_AIFS 0x04
3194
3195#define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3196 MWL8K_SET_EDCA_TXOP | \
3197 MWL8K_SET_EDCA_AIFS)
3198
3199static int
55489b6e
LB		 3200mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3201 __u16 cw_min, __u16 cw_max,
3202 __u8 aifs, __u16 txop)
a66098da 3203{
2e484c89 3204 struct mwl8k_priv *priv = hw->priv;
a66098da 3205 struct mwl8k_cmd_set_edca_params *cmd;
a66098da
LB		 3206 int rc;
3207
3208 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3209 if (cmd == NULL)
3210 return -ENOMEM;
3211
a66098da
LB		 3212 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3213 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a66098da
LB		 3214 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3215 cmd->txop = cpu_to_le16(txop);
2e484c89
LB		 3216 if (priv->ap_fw) {
3217 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3218 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3219 cmd->ap.aifs = aifs;
3220 cmd->ap.txq = qnum;
3221 } else {
3222 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3223 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3224 cmd->sta.aifs = aifs;
3225 cmd->sta.txq = qnum;
3226 }
a66098da
LB		 3227
3228 rc = mwl8k_post_cmd(hw, &cmd->header);
3229 kfree(cmd);
3230
3231 return rc;
3232}
3233
3234/*
55489b6e 3235 * CMD_SET_WMM_MODE.
a66098da 3236 */
55489b6e 3237struct mwl8k_cmd_set_wmm_mode {
a66098da 3238 struct mwl8k_cmd_pkt header;
55489b6e 3239 __le16 action;
ba2d3587 3240} __packed;
a66098da 3241
55489b6e 3242static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
a66098da 3243{
55489b6e
LB		 3244 struct mwl8k_priv *priv = hw->priv;
3245 struct mwl8k_cmd_set_wmm_mode *cmd;
a66098da
LB		 3246 int rc;
3247
a66098da
LB		 3248 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3249 if (cmd == NULL)
3250 return -ENOMEM;
3251
55489b6e 3252 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
a66098da 3253 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e 3254 cmd->action = cpu_to_le16(!!enable);
a66098da
LB		 3255
3256 rc = mwl8k_post_cmd(hw, &cmd->header);
3257 kfree(cmd);
16cec43d 3258
55489b6e
LB		 3259 if (!rc)
3260 priv->wmm_enabled = enable;
a66098da
LB		 3261
3262 return rc;
3263}
3264
3265/*
55489b6e 3266 * CMD_MIMO_CONFIG.
a66098da 3267 */
55489b6e
LB		 3268struct mwl8k_cmd_mimo_config {
3269 struct mwl8k_cmd_pkt header;
3270 __le32 action;
3271 __u8 rx_antenna_map;
3272 __u8 tx_antenna_map;
ba2d3587 3273} __packed;
a66098da 3274
55489b6e 3275static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
a66098da 3276{
55489b6e 3277 struct mwl8k_cmd_mimo_config *cmd;
a66098da
LB		 3278 int rc;
3279
3280 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3281 if (cmd == NULL)
3282 return -ENOMEM;
3283
55489b6e 3284 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
a66098da 3285 cmd->header.length = cpu_to_le16(sizeof(*cmd));
55489b6e
LB		 3286 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3287 cmd->rx_antenna_map = rx;
3288 cmd->tx_antenna_map = tx;
a66098da
LB		 3289
3290 rc = mwl8k_post_cmd(hw, &cmd->header);
3291 kfree(cmd);
3292
3293 return rc;
3294}
3295
3296/*
b71ed2c6 3297 * CMD_USE_FIXED_RATE (STA version).
a66098da 3298 */
b71ed2c6
LB		 3299struct mwl8k_cmd_use_fixed_rate_sta {
3300 struct mwl8k_cmd_pkt header;
3301 __le32 action;
3302 __le32 allow_rate_drop;
3303 __le32 num_rates;
3304 struct {
3305 __le32 is_ht_rate;
3306 __le32 enable_retry;
3307 __le32 rate;
3308 __le32 retry_count;
3309 } rate_entry[8];
3310 __le32 rate_type;
3311 __le32 reserved1;
3312 __le32 reserved2;
ba2d3587 3313} __packed;
a66098da 3314
b71ed2c6
LB		 3315#define MWL8K_USE_AUTO_RATE 0x0002
3316#define MWL8K_UCAST_RATE 0
a66098da 3317
b71ed2c6 3318static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
a66098da 3319{
b71ed2c6 3320 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
a66098da
LB		 3321 int rc;
3322
3323 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3324 if (cmd == NULL)
3325 return -ENOMEM;
3326
3327 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3328 cmd->header.length = cpu_to_le16(sizeof(*cmd));
b71ed2c6
LB		 3329 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3330 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
a66098da
LB		 3331
3332 rc = mwl8k_post_cmd(hw, &cmd->header);
3333 kfree(cmd);
3334
3335 return rc;
3336}
3337
088aab8b
LB		 3338/*
3339 * CMD_USE_FIXED_RATE (AP version).
3340 */
3341struct mwl8k_cmd_use_fixed_rate_ap {
3342 struct mwl8k_cmd_pkt header;
3343 __le32 action;
3344 __le32 allow_rate_drop;
3345 __le32 num_rates;
3346 struct mwl8k_rate_entry_ap {
3347 __le32 is_ht_rate;
3348 __le32 enable_retry;
3349 __le32 rate;
3350 __le32 retry_count;
3351 } rate_entry[4];
3352 u8 multicast_rate;
3353 u8 multicast_rate_type;
3354 u8 management_rate;
ba2d3587 3355} __packed;
088aab8b
LB		 3356
3357static int
3358mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3359{
3360 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3361 int rc;
3362
3363 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3364 if (cmd == NULL)
3365 return -ENOMEM;
3366
3367 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3368 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3369 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3370 cmd->multicast_rate = mcast;
3371 cmd->management_rate = mgmt;
3372
3373 rc = mwl8k_post_cmd(hw, &cmd->header);
3374 kfree(cmd);
3375
3376 return rc;
3377}
3378
55489b6e
LB		 3379/*
3380 * CMD_ENABLE_SNIFFER.
3381 */
3382struct mwl8k_cmd_enable_sniffer {
3383 struct mwl8k_cmd_pkt header;
3384 __le32 action;
ba2d3587 3385} __packed;
55489b6e
LB		 3386
3387static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3388{
3389 struct mwl8k_cmd_enable_sniffer *cmd;
3390 int rc;
3391
3392 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3393 if (cmd == NULL)
3394 return -ENOMEM;
3395
3396 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3397 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3398 cmd->action = cpu_to_le32(!!enable);
3399
3400 rc = mwl8k_post_cmd(hw, &cmd->header);
3401 kfree(cmd);
3402
3403 return rc;
3404}
3405
3406/*
3407 * CMD_SET_MAC_ADDR.
3408 */
3409struct mwl8k_cmd_set_mac_addr {
3410 struct mwl8k_cmd_pkt header;
3411 union {
3412 struct {
3413 __le16 mac_type;
3414 __u8 mac_addr[ETH_ALEN];
3415 } mbss;
3416 __u8 mac_addr[ETH_ALEN];
3417 };
ba2d3587 3418} __packed;
55489b6e 3419
ee0ddf18
LB		 3420#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3421#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3422#define MWL8K_MAC_TYPE_PRIMARY_AP 2
3423#define MWL8K_MAC_TYPE_SECONDARY_AP 3
a9e00b15 3424
aa21d0f6
LB		 3425static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3426 struct ieee80211_vif *vif, u8 *mac)
55489b6e
LB		 3427{
3428 struct mwl8k_priv *priv = hw->priv;
ee0ddf18 3429 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
55489b6e 3430 struct mwl8k_cmd_set_mac_addr *cmd;
ee0ddf18 3431 int mac_type;
55489b6e
LB		 3432 int rc;
3433
ee0ddf18
LB		 3434 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3435 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3436 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3437 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3438 else
3439 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3440 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3441 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3442 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3443 else
3444 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3445 }
3446
55489b6e
LB		 3447 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3448 if (cmd == NULL)
3449 return -ENOMEM;
3450
3451 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3452 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3453 if (priv->ap_fw) {
ee0ddf18 3454 cmd->mbss.mac_type = cpu_to_le16(mac_type);
55489b6e
LB		 3455 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3456 } else {
3457 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3458 }
3459
aa21d0f6 3460 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
55489b6e
LB		 3461 kfree(cmd);
3462
3463 return rc;
3464}
3465
3466/*
3467 * CMD_SET_RATEADAPT_MODE.
3468 */
3469struct mwl8k_cmd_set_rate_adapt_mode {
3470 struct mwl8k_cmd_pkt header;
3471 __le16 action;
3472 __le16 mode;
ba2d3587 3473} __packed;
55489b6e
LB		 3474
3475static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3476{
3477 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3478 int rc;
3479
3480 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3481 if (cmd == NULL)
3482 return -ENOMEM;
3483
3484 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3485 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3486 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3487 cmd->mode = cpu_to_le16(mode);
3488
3489 rc = mwl8k_post_cmd(hw, &cmd->header);
3490 kfree(cmd);
3491
3492 return rc;
3493}
3494
3aefc37e
NS		 3495/*
3496 * CMD_GET_WATCHDOG_BITMAP.
3497 */
3498struct mwl8k_cmd_get_watchdog_bitmap {
3499 struct mwl8k_cmd_pkt header;
3500 u8 bitmap;
3501} __packed;
3502
3503static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3504{
3505 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3506 int rc;
3507
3508 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3509 if (cmd == NULL)
3510 return -ENOMEM;
3511
3512 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3513 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3514
3515 rc = mwl8k_post_cmd(hw, &cmd->header);
3516 if (!rc)
3517 *bitmap = cmd->bitmap;
3518
3519 kfree(cmd);
3520
3521 return rc;
3522}
3523
3524#define INVALID_BA 0xAA
3525static void mwl8k_watchdog_ba_events(struct work_struct *work)
3526{
3527 int rc;
3528 u8 bitmap = 0, stream_index;
3529 struct mwl8k_ampdu_stream *streams;
3530 struct mwl8k_priv *priv =
3531 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3532
3533 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3534 if (rc)
3535 return;
3536
3537 if (bitmap == INVALID_BA)
3538 return;
3539
3540 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3541 stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
3542
3543 BUG_ON(stream_index >= priv->num_ampdu_queues);
3544
3545 streams = &priv->ampdu[stream_index];
3546
3547 if (streams->state == AMPDU_STREAM_ACTIVE)
3548 ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
3549
3550 return;
3551}
3552
3553
b64fe619
LB		 3554/*
3555 * CMD_BSS_START.
3556 */
3557struct mwl8k_cmd_bss_start {
3558 struct mwl8k_cmd_pkt header;
3559 __le32 enable;
ba2d3587 3560} __packed;
b64fe619 3561
aa21d0f6
LB		 3562static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3563 struct ieee80211_vif *vif, int enable)
b64fe619
LB		 3564{
3565 struct mwl8k_cmd_bss_start *cmd;
3566 int rc;
3567
3568 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3569 if (cmd == NULL)
3570 return -ENOMEM;
3571
3572 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3573 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3574 cmd->enable = cpu_to_le32(enable);
3575
aa21d0f6 3576 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3577 kfree(cmd);
3578
3579 return rc;
3580}
3581
5faa1aff
NS		 3582/*
3583 * CMD_BASTREAM.
3584 */
3585
3586/*
3587 * UPSTREAM is tx direction
3588 */
3589#define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3590#define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3591
ba30c4a5 3592enum ba_stream_action_type {
5faa1aff
NS		 3593 MWL8K_BA_CREATE,
3594 MWL8K_BA_UPDATE,
3595 MWL8K_BA_DESTROY,
3596 MWL8K_BA_FLUSH,
3597 MWL8K_BA_CHECK,
ba30c4a5 3598};
5faa1aff
NS		 3599
3600
3601struct mwl8k_create_ba_stream {
3602 __le32 flags;
3603 __le32 idle_thrs;
3604 __le32 bar_thrs;
3605 __le32 window_size;
3606 u8 peer_mac_addr[6];
3607 u8 dialog_token;
3608 u8 tid;
3609 u8 queue_id;
3610 u8 param_info;
3611 __le32 ba_context;
3612 u8 reset_seq_no_flag;
3613 __le16 curr_seq_no;
3614 u8 sta_src_mac_addr[6];
3615} __packed;
3616
3617struct mwl8k_destroy_ba_stream {
3618 __le32 flags;
3619 __le32 ba_context;
3620} __packed;
3621
3622struct mwl8k_cmd_bastream {
3623 struct mwl8k_cmd_pkt header;
3624 __le32 action;
3625 union {
3626 struct mwl8k_create_ba_stream create_params;
3627 struct mwl8k_destroy_ba_stream destroy_params;
3628 };
3629} __packed;
3630
3631static int
3632mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
3633{
3634 struct mwl8k_cmd_bastream *cmd;
3635 int rc;
3636
3637 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3638 if (cmd == NULL)
3639 return -ENOMEM;
3640
3641 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3642 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3643
3644 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3645
3646 cmd->create_params.queue_id = stream->idx;
3647 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3648 ETH_ALEN);
3649 cmd->create_params.tid = stream->tid;
3650
3651 cmd->create_params.flags =
3652 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3653 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3654
3655 rc = mwl8k_post_cmd(hw, &cmd->header);
3656
3657 kfree(cmd);
3658
3659 return rc;
3660}
3661
3662static int
3663mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3664 u8 buf_size)
3665{
3666 struct mwl8k_cmd_bastream *cmd;
3667 int rc;
3668
3669 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3670 if (cmd == NULL)
3671 return -ENOMEM;
3672
3673
3674 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3675 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3676
3677 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3678
3679 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3680 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3681 cmd->create_params.queue_id = stream->idx;
3682
3683 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3684 cmd->create_params.tid = stream->tid;
3685 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3686 cmd->create_params.reset_seq_no_flag = 1;
3687
3688 cmd->create_params.param_info =
3689 (stream->sta->ht_cap.ampdu_factor &
3690 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3691 ((stream->sta->ht_cap.ampdu_density << 2) &
3692 IEEE80211_HT_AMPDU_PARM_DENSITY);
3693
3694 cmd->create_params.flags =
3695 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3696 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3697
3698 rc = mwl8k_post_cmd(hw, &cmd->header);
3699
3700 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3701 stream->sta->addr, stream->tid);
3702 kfree(cmd);
3703
3704 return rc;
3705}
3706
3707static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3708 struct mwl8k_ampdu_stream *stream)
3709{
3710 struct mwl8k_cmd_bastream *cmd;
3711
3712 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3713 if (cmd == NULL)
3714 return;
3715
3716 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3717 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3718 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3719
3720 cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
3721 mwl8k_post_cmd(hw, &cmd->header);
3722
3723 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
3724
3725 kfree(cmd);
3726}
3727
3f5610ff
LB		 3728/*
3729 * CMD_SET_NEW_STN.
3730 */
3731struct mwl8k_cmd_set_new_stn {
3732 struct mwl8k_cmd_pkt header;
3733 __le16 aid;
3734 __u8 mac_addr[6];
3735 __le16 stn_id;
3736 __le16 action;
3737 __le16 rsvd;
3738 __le32 legacy_rates;
3739 __u8 ht_rates[4];
3740 __le16 cap_info;
3741 __le16 ht_capabilities_info;
3742 __u8 mac_ht_param_info;
3743 __u8 rev;
3744 __u8 control_channel;
3745 __u8 add_channel;
3746 __le16 op_mode;
3747 __le16 stbc;
3748 __u8 add_qos_info;
3749 __u8 is_qos_sta;
3750 __le32 fw_sta_ptr;
ba2d3587 3751} __packed;
3f5610ff
LB		 3752
3753#define MWL8K_STA_ACTION_ADD 0
3754#define MWL8K_STA_ACTION_REMOVE 2
3755
3756static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3757 struct ieee80211_vif *vif,
3758 struct ieee80211_sta *sta)
3759{
3760 struct mwl8k_cmd_set_new_stn *cmd;
8707d026 3761 u32 rates;
3f5610ff
LB		 3762 int rc;
3763
3764 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3765 if (cmd == NULL)
3766 return -ENOMEM;
3767
3768 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3769 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3770 cmd->aid = cpu_to_le16(sta->aid);
3771 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3772 cmd->stn_id = cpu_to_le16(sta->aid);
3773 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
8707d026
LB		 3774 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3775 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3776 else
3777 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3778 cmd->legacy_rates = cpu_to_le32(rates);
3f5610ff
LB		 3779 if (sta->ht_cap.ht_supported) {
3780 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3781 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3782 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3783 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3784 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3785 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3786 ((sta->ht_cap.ampdu_density & 7) << 2);
3787 cmd->is_qos_sta = 1;
3788 }
3789
aa21d0f6 3790 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3791 kfree(cmd);
3792
3793 return rc;
3794}
3795
b64fe619
LB		 3796static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3797 struct ieee80211_vif *vif)
3798{
3799 struct mwl8k_cmd_set_new_stn *cmd;
3800 int rc;
3801
3802 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3803 if (cmd == NULL)
3804 return -ENOMEM;
3805
3806 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3807 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3808 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3809
aa21d0f6 3810 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
b64fe619
LB		 3811 kfree(cmd);
3812
3813 return rc;
3814}
3815
3f5610ff
LB		 3816static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3817 struct ieee80211_vif *vif, u8 *addr)
3818{
3819 struct mwl8k_cmd_set_new_stn *cmd;
3820 int rc;
3821
3822 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3823 if (cmd == NULL)
3824 return -ENOMEM;
3825
3826 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3827 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3828 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3829 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3830
aa21d0f6 3831 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3f5610ff
LB		 3832 kfree(cmd);
3833
3834 return rc;
3835}
3836
fcdc403c
NS		 3837/*
3838 * CMD_UPDATE_ENCRYPTION.
3839 */
3840
3841#define MAX_ENCR_KEY_LENGTH 16
3842#define MIC_KEY_LENGTH 8
3843
3844struct mwl8k_cmd_update_encryption {
3845 struct mwl8k_cmd_pkt header;
3846
3847 __le32 action;
3848 __le32 reserved;
3849 __u8 mac_addr[6];
3850 __u8 encr_type;
3851
ba30c4a5 3852} __packed;
fcdc403c
NS		 3853
3854struct mwl8k_cmd_set_key {
3855 struct mwl8k_cmd_pkt header;
3856
3857 __le32 action;
3858 __le32 reserved;
3859 __le16 length;
3860 __le16 key_type_id;
3861 __le32 key_info;
3862 __le32 key_id;
3863 __le16 key_len;
3864 __u8 key_material[MAX_ENCR_KEY_LENGTH];
3865 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
3866 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
3867 __le16 tkip_rsc_low;
3868 __le32 tkip_rsc_high;
3869 __le16 tkip_tsc_low;
3870 __le32 tkip_tsc_high;
3871 __u8 mac_addr[6];
ba30c4a5 3872} __packed;
fcdc403c
NS		 3873
3874enum {
3875 MWL8K_ENCR_ENABLE,
3876 MWL8K_ENCR_SET_KEY,
3877 MWL8K_ENCR_REMOVE_KEY,
3878 MWL8K_ENCR_SET_GROUP_KEY,
3879};
3880
3881#define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
3882#define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
3883#define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
3884#define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
3885#define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
3886
3887enum {
3888 MWL8K_ALG_WEP,
3889 MWL8K_ALG_TKIP,
3890 MWL8K_ALG_CCMP,
3891};
3892
3893#define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
3894#define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
3895#define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
3896#define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
3897#define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
3898
3899static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
3900 struct ieee80211_vif *vif,
3901 u8 *addr,
3902 u8 encr_type)
3903{
3904 struct mwl8k_cmd_update_encryption *cmd;
3905 int rc;
3906
3907 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3908 if (cmd == NULL)
3909 return -ENOMEM;
3910
3911 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3912 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3913 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
3914 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3915 cmd->encr_type = encr_type;
3916
3917 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3918 kfree(cmd);
3919
3920 return rc;
3921}
3922
3923static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
3924 u8 *addr,
3925 struct ieee80211_key_conf *key)
3926{
3927 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
3928 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3929 cmd->length = cpu_to_le16(sizeof(*cmd) -
3930 offsetof(struct mwl8k_cmd_set_key, length));
3931 cmd->key_id = cpu_to_le32(key->keyidx);
3932 cmd->key_len = cpu_to_le16(key->keylen);
3933 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3934
3935 switch (key->cipher) {
3936 case WLAN_CIPHER_SUITE_WEP40:
3937 case WLAN_CIPHER_SUITE_WEP104:
3938 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
3939 if (key->keyidx == 0)
3940 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
3941
3942 break;
3943 case WLAN_CIPHER_SUITE_TKIP:
3944 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
3945 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3946 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3947 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3948 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
3949 | MWL8K_KEY_FLAG_TSC_VALID);
3950 break;
3951 case WLAN_CIPHER_SUITE_CCMP:
3952 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
3953 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3954 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
3955 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
3956 break;
3957 default:
3958 return -ENOTSUPP;
3959 }
3960
3961 return 0;
3962}
3963
3964static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
3965 struct ieee80211_vif *vif,
3966 u8 *addr,
3967 struct ieee80211_key_conf *key)
3968{
3969 struct mwl8k_cmd_set_key *cmd;
3970 int rc;
3971 int keymlen;
3972 u32 action;
3973 u8 idx;
3974 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3975
3976 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3977 if (cmd == NULL)
3978 return -ENOMEM;
3979
3980 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
3981 if (rc < 0)
3982 goto done;
3983
3984 idx = key->keyidx;
3985
3986 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
3987 action = MWL8K_ENCR_SET_KEY;
3988 else
3989 action = MWL8K_ENCR_SET_GROUP_KEY;
3990
3991 switch (key->cipher) {
3992 case WLAN_CIPHER_SUITE_WEP40:
3993 case WLAN_CIPHER_SUITE_WEP104:
3994 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
3995 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
3996 sizeof(*key) + key->keylen);
3997 mwl8k_vif->wep_key_conf[idx].enabled = 1;
3998 }
3999
9b571e24 4000 keymlen = key->keylen;
fcdc403c
NS		 4001 action = MWL8K_ENCR_SET_KEY;
4002 break;
4003 case WLAN_CIPHER_SUITE_TKIP:
4004 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
4005 break;
4006 case WLAN_CIPHER_SUITE_CCMP:
4007 keymlen = key->keylen;
4008 break;
4009 default:
4010 rc = -ENOTSUPP;
4011 goto done;
4012 }
4013
4014 memcpy(cmd->key_material, key->key, keymlen);
4015 cmd->action = cpu_to_le32(action);
4016
4017 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4018done:
4019 kfree(cmd);
4020
4021 return rc;
4022}
4023
4024static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
4025 struct ieee80211_vif *vif,
4026 u8 *addr,
4027 struct ieee80211_key_conf *key)
4028{
4029 struct mwl8k_cmd_set_key *cmd;
4030 int rc;
4031 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4032
4033 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4034 if (cmd == NULL)
4035 return -ENOMEM;
4036
4037 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4038 if (rc < 0)
4039 goto done;
4040
4041 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
4042 WLAN_CIPHER_SUITE_WEP104)
4043 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4044
4045 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4046
4047 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4048done:
4049 kfree(cmd);
4050
4051 return rc;
4052}
4053
4054static int mwl8k_set_key(struct ieee80211_hw *hw,
4055 enum set_key_cmd cmd_param,
4056 struct ieee80211_vif *vif,
4057 struct ieee80211_sta *sta,
4058 struct ieee80211_key_conf *key)
4059{
4060 int rc = 0;
4061 u8 encr_type;
4062 u8 *addr;
4063 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4064
4065 if (vif->type == NL80211_IFTYPE_STATION)
4066 return -EOPNOTSUPP;
4067
4068 if (sta == NULL)
4069 addr = hw->wiphy->perm_addr;
4070 else
4071 addr = sta->addr;
4072
4073 if (cmd_param == SET_KEY) {
4074 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
4075 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4076 if (rc)
4077 goto out;
4078
4079 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4080 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4081 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4082 else
4083 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4084
4085 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4086 encr_type);
4087 if (rc)
4088 goto out;
4089
4090 mwl8k_vif->is_hw_crypto_enabled = true;
4091
4092 } else {
4093 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4094
4095 if (rc)
4096 goto out;
4097
4098 mwl8k_vif->is_hw_crypto_enabled = false;
4099
4100 }
4101out:
4102 return rc;
4103}
4104
55489b6e
LB		 4105/*
4106 * CMD_UPDATE_STADB.
4107 */
25d81b1e
LB		 4108struct ewc_ht_info {
4109 __le16 control1;
4110 __le16 control2;
4111 __le16 control3;
ba2d3587 4112} __packed;
25d81b1e
LB		 4113
4114struct peer_capability_info {
4115 /* Peer type - AP vs. STA. */
4116 __u8 peer_type;
4117
4118 /* Basic 802.11 capabilities from assoc resp. */
4119 __le16 basic_caps;
4120
4121 /* Set if peer supports 802.11n high throughput (HT). */
4122 __u8 ht_support;
4123
4124 /* Valid if HT is supported. */
4125 __le16 ht_caps;
4126 __u8 extended_ht_caps;
4127 struct ewc_ht_info ewc_info;
4128
4129 /* Legacy rate table. Intersection of our rates and peer rates. */
4130 __u8 legacy_rates[12];
4131
4132 /* HT rate table. Intersection of our rates and peer rates. */
4133 __u8 ht_rates[16];
4134 __u8 pad[16];
4135
4136 /* If set, interoperability mode, no proprietary extensions. */
4137 __u8 interop;
4138 __u8 pad2;
4139 __u8 station_id;
4140 __le16 amsdu_enabled;
ba2d3587 4141} __packed;
25d81b1e 4142
55489b6e
LB		 4143struct mwl8k_cmd_update_stadb {
4144 struct mwl8k_cmd_pkt header;
4145
4146 /* See STADB_ACTION_TYPE */
4147 __le32 action;
4148
4149 /* Peer MAC address */
4150 __u8 peer_addr[ETH_ALEN];
4151
4152 __le32 reserved;
4153
4154 /* Peer info - valid during add/update. */
4155 struct peer_capability_info peer_info;
ba2d3587 4156} __packed;
55489b6e 4157
a680400e
LB		 4158#define MWL8K_STA_DB_MODIFY_ENTRY 1
4159#define MWL8K_STA_DB_DEL_ENTRY 2
4160
4161/* Peer Entry flags - used to define the type of the peer node */
4162#define MWL8K_PEER_TYPE_ACCESSPOINT 2
4163
4164static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
c6e96010 4165 struct ieee80211_vif *vif,
13935e2c 4166 struct ieee80211_sta *sta)
55489b6e 4167{
55489b6e 4168 struct mwl8k_cmd_update_stadb *cmd;
a680400e 4169 struct peer_capability_info *p;
8707d026 4170 u32 rates;
55489b6e
LB		 4171 int rc;
4172
4173 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4174 if (cmd == NULL)
4175 return -ENOMEM;
4176
4177 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4178 cmd->header.length = cpu_to_le16(sizeof(*cmd));
a680400e 4179 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
13935e2c 4180 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
55489b6e 4181
a680400e
LB		 4182 p = &cmd->peer_info;
4183 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4184 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
13935e2c 4185 p->ht_support = sta->ht_cap.ht_supported;
b603742f 4186 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
13935e2c
LB		 4187 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4188 ((sta->ht_cap.ampdu_density & 7) << 2);
8707d026
LB		 4189 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4190 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4191 else
4192 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4193 legacy_rate_mask_to_array(p->legacy_rates, rates);
13935e2c 4194 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
a680400e
LB		 4195 p->interop = 1;
4196 p->amsdu_enabled = 0;
4197
4198 rc = mwl8k_post_cmd(hw, &cmd->header);
4199 kfree(cmd);
4200
4201 return rc ? rc : p->station_id;
4202}
4203
4204static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4205 struct ieee80211_vif *vif, u8 *addr)
4206{
4207 struct mwl8k_cmd_update_stadb *cmd;
4208 int rc;
4209
4210 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4211 if (cmd == NULL)
4212 return -ENOMEM;
4213
4214 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4215 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4216 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
bbfd9128 4217 memcpy(cmd->peer_addr, addr, ETH_ALEN);
55489b6e 4218
a680400e 4219 rc = mwl8k_post_cmd(hw, &cmd->header);
55489b6e
LB		 4220 kfree(cmd);
4221
4222 return rc;
4223}
4224
a66098da
LB		 4225
4226/*
4227 * Interrupt handling.
4228 */
4229static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4230{
4231 struct ieee80211_hw *hw = dev_id;
4232 struct mwl8k_priv *priv = hw->priv;
4233 u32 status;
4234
4235 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
a66098da
LB		 4236 if (!status)
4237 return IRQ_NONE;
4238
1e9f9de3
LB		 4239 if (status & MWL8K_A2H_INT_TX_DONE) {
4240 status &= ~MWL8K_A2H_INT_TX_DONE;
4241 tasklet_schedule(&priv->poll_tx_task);
4242 }
4243
a66098da 4244 if (status & MWL8K_A2H_INT_RX_READY) {
67e2eb27
LB		 4245 status &= ~MWL8K_A2H_INT_RX_READY;
4246 tasklet_schedule(&priv->poll_rx_task);
a66098da
LB		 4247 }
4248
3aefc37e
NS		 4249 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4250 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4251 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4252 }
4253
67e2eb27
LB		 4254 if (status)
4255 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4256
a66098da 4257 if (status & MWL8K_A2H_INT_OPC_DONE) {
618952a7 4258 if (priv->hostcmd_wait != NULL)
a66098da 4259 complete(priv->hostcmd_wait);
a66098da
LB		 4260 }
4261
4262 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
618952a7 4263 if (!mutex_is_locked(&priv->fw_mutex) &&
88de754a 4264 priv->radio_on && priv->pending_tx_pkts)
618952a7 4265 mwl8k_tx_start(priv);
a66098da
LB		 4266 }
4267
4268 return IRQ_HANDLED;
4269}
4270
1e9f9de3
LB		 4271static void mwl8k_tx_poll(unsigned long data)
4272{
4273 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4274 struct mwl8k_priv *priv = hw->priv;
4275 int limit;
4276 int i;
4277
4278 limit = 32;
4279
4280 spin_lock_bh(&priv->tx_lock);
4281
e600707b 4282 for (i = 0; i < mwl8k_tx_queues(priv); i++)
1e9f9de3
LB		 4283 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4284
4285 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4286 complete(priv->tx_wait);
4287 priv->tx_wait = NULL;
4288 }
4289
4290 spin_unlock_bh(&priv->tx_lock);
4291
4292 if (limit) {
4293 writel(~MWL8K_A2H_INT_TX_DONE,
4294 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4295 } else {
4296 tasklet_schedule(&priv->poll_tx_task);
4297 }
4298}
4299
67e2eb27
LB		 4300static void mwl8k_rx_poll(unsigned long data)
4301{
4302 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4303 struct mwl8k_priv *priv = hw->priv;
4304 int limit;
4305
4306 limit = 32;
4307 limit -= rxq_process(hw, 0, limit);
4308 limit -= rxq_refill(hw, 0, limit);
4309
4310 if (limit) {
4311 writel(~MWL8K_A2H_INT_RX_READY,
4312 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4313 } else {
4314 tasklet_schedule(&priv->poll_rx_task);
4315 }
4316}
4317
a66098da
LB		 4318
4319/*
4320 * Core driver operations.
4321 */
7bb45683 4322static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
a66098da
LB		 4323{
4324 struct mwl8k_priv *priv = hw->priv;
4325 int index = skb_get_queue_mapping(skb);
a66098da 4326
9189c100 4327 if (!priv->radio_on) {
c96c31e4
JP		 4328 wiphy_debug(hw->wiphy,
4329 "dropped TX frame since radio disabled\n");
a66098da 4330 dev_kfree_skb(skb);
7bb45683 4331 return;
a66098da
LB		 4332 }
4333
7bb45683 4334 mwl8k_txq_xmit(hw, index, skb);
a66098da
LB		 4335}
4336
a66098da
LB		 4337static int mwl8k_start(struct ieee80211_hw *hw)
4338{
a66098da
LB		 4339 struct mwl8k_priv *priv = hw->priv;
4340 int rc;
4341
a0607fd3 4342 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 4343 IRQF_SHARED, MWL8K_NAME, hw);
4344 if (rc) {
bf3ca7f7 4345 priv->irq = -1;
5db55844 4346 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
2ec610cb 4347 return -EIO;
a66098da 4348 }
bf3ca7f7 4349 priv->irq = priv->pdev->irq;
a66098da 4350
67e2eb27 4351 /* Enable TX reclaim and RX tasklets. */
1e9f9de3 4352 tasklet_enable(&priv->poll_tx_task);
67e2eb27 4353 tasklet_enable(&priv->poll_rx_task);
2ec610cb 4354
a66098da 4355 /* Enable interrupts */
c23b5a69 4356 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
12488e01
NS		 4357 iowrite32(MWL8K_A2H_EVENTS,
4358 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 4359
2ec610cb
LB		 4360 rc = mwl8k_fw_lock(hw);
4361 if (!rc) {
55489b6e 4362 rc = mwl8k_cmd_radio_enable(hw);
a66098da 4363
5e4cf166
LB		 4364 if (!priv->ap_fw) {
4365 if (!rc)
55489b6e 4366 rc = mwl8k_cmd_enable_sniffer(hw, 0);
a66098da 4367
5e4cf166
LB		 4368 if (!rc)
4369 rc = mwl8k_cmd_set_pre_scan(hw);
4370
4371 if (!rc)
4372 rc = mwl8k_cmd_set_post_scan(hw,
4373 "\x00\x00\x00\x00\x00\x00");
4374 }
2ec610cb
LB		 4375
4376 if (!rc)
55489b6e 4377 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
a66098da 4378
2ec610cb 4379 if (!rc)
55489b6e 4380 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
a66098da 4381
2ec610cb
LB		 4382 mwl8k_fw_unlock(hw);
4383 }
4384
4385 if (rc) {
4386 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4387 free_irq(priv->pdev->irq, hw);
bf3ca7f7 4388 priv->irq = -1;
1e9f9de3 4389 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4390 tasklet_disable(&priv->poll_rx_task);
2ec610cb 4391 }
a66098da
LB		 4392
4393 return rc;
4394}
4395
a66098da
LB		 4396static void mwl8k_stop(struct ieee80211_hw *hw)
4397{
a66098da
LB		 4398 struct mwl8k_priv *priv = hw->priv;
4399 int i;
4400
55489b6e 4401 mwl8k_cmd_radio_disable(hw);
a66098da
LB		 4402
4403 ieee80211_stop_queues(hw);
4404
a66098da 4405 /* Disable interrupts */
a66098da 4406 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
bf3ca7f7
BC		 4407 if (priv->irq != -1) {
4408 free_irq(priv->pdev->irq, hw);
4409 priv->irq = -1;
4410 }
a66098da
LB		 4411
4412 /* Stop finalize join worker */
4413 cancel_work_sync(&priv->finalize_join_worker);
3aefc37e 4414 cancel_work_sync(&priv->watchdog_ba_handle);
a66098da
LB		 4415 if (priv->beacon_skb != NULL)
4416 dev_kfree_skb(priv->beacon_skb);
4417
67e2eb27 4418 /* Stop TX reclaim and RX tasklets. */
1e9f9de3 4419 tasklet_disable(&priv->poll_tx_task);
67e2eb27 4420 tasklet_disable(&priv->poll_rx_task);
a66098da 4421
a66098da 4422 /* Return all skbs to mac80211 */
e600707b 4423 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 4424 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da
LB		 4425}
4426
0863ade8
BC		 4427static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4428
a66098da 4429static int mwl8k_add_interface(struct ieee80211_hw *hw,
f5bb87cf 4430 struct ieee80211_vif *vif)
a66098da
LB		 4431{
4432 struct mwl8k_priv *priv = hw->priv;
4433 struct mwl8k_vif *mwl8k_vif;
ee0ddf18 4434 u32 macids_supported;
0863ade8
BC		 4435 int macid, rc;
4436 struct mwl8k_device_info *di;
a66098da 4437
a43c49a8
LB		 4438 /*
4439 * Reject interface creation if sniffer mode is active, as
4440 * STA operation is mutually exclusive with hardware sniffer
b64fe619 4441 * mode. (Sniffer mode is only used on STA firmware.)
a43c49a8
LB		 4442 */
4443 if (priv->sniffer_enabled) {
c96c31e4
JP		 4444 wiphy_info(hw->wiphy,
4445 "unable to create STA interface because sniffer mode is enabled\n");
a43c49a8
LB		 4446 return -EINVAL;
4447 }
4448
0863ade8 4449 di = priv->device_info;
ee0ddf18
LB		 4450 switch (vif->type) {
4451 case NL80211_IFTYPE_AP:
0863ade8
BC		 4452 if (!priv->ap_fw && di->fw_image_ap) {
4453 /* we must load the ap fw to meet this request */
4454 if (!list_empty(&priv->vif_list))
4455 return -EBUSY;
4456 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4457 if (rc)
4458 return rc;
4459 }
ee0ddf18
LB		 4460 macids_supported = priv->ap_macids_supported;
4461 break;
4462 case NL80211_IFTYPE_STATION:
0863ade8
BC		 4463 if (priv->ap_fw && di->fw_image_sta) {
4464 /* we must load the sta fw to meet this request */
4465 if (!list_empty(&priv->vif_list))
4466 return -EBUSY;
4467 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4468 if (rc)
4469 return rc;
4470 }
ee0ddf18
LB		 4471 macids_supported = priv->sta_macids_supported;
4472 break;
4473 default:
4474 return -EINVAL;
4475 }
4476
4477 macid = ffs(macids_supported & ~priv->macids_used);
4478 if (!macid--)
4479 return -EBUSY;
4480
f5bb87cf 4481 /* Setup driver private area. */
1ed32e4f 4482 mwl8k_vif = MWL8K_VIF(vif);
a66098da 4483 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
f5bb87cf 4484 mwl8k_vif->vif = vif;
ee0ddf18 4485 mwl8k_vif->macid = macid;
a66098da 4486 mwl8k_vif->seqno = 0;
d9a07d49
NS		 4487 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4488 mwl8k_vif->is_hw_crypto_enabled = false;
a66098da 4489
aa21d0f6
LB		 4490 /* Set the mac address. */
4491 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4492
4493 if (priv->ap_fw)
4494 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4495
ee0ddf18 4496 priv->macids_used |= 1 << mwl8k_vif->macid;
f5bb87cf 4497 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
a66098da
LB		 4498
4499 return 0;
4500}
4501
4502static void mwl8k_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 4503 struct ieee80211_vif *vif)
a66098da
LB		 4504{
4505 struct mwl8k_priv *priv = hw->priv;
f5bb87cf 4506 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
a66098da 4507
b64fe619
LB		 4508 if (priv->ap_fw)
4509 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4510
aa21d0f6 4511 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
32060e1b 4512
ee0ddf18 4513 priv->macids_used &= ~(1 << mwl8k_vif->macid);
f5bb87cf 4514 list_del(&mwl8k_vif->list);
a66098da
LB		 4515}
4516
ee03a932 4517static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
a66098da 4518{
a66098da
LB		 4519 struct ieee80211_conf *conf = &hw->conf;
4520 struct mwl8k_priv *priv = hw->priv;
ee03a932 4521 int rc;
a66098da 4522
7595d67a 4523 if (conf->flags & IEEE80211_CONF_IDLE) {
55489b6e 4524 mwl8k_cmd_radio_disable(hw);
ee03a932 4525 return 0;
7595d67a
LB		 4526 }
4527
ee03a932
LB		 4528 rc = mwl8k_fw_lock(hw);
4529 if (rc)
4530 return rc;
a66098da 4531
55489b6e 4532 rc = mwl8k_cmd_radio_enable(hw);
ee03a932
LB		 4533 if (rc)
4534 goto out;
a66098da 4535
610677d2 4536 rc = mwl8k_cmd_set_rf_channel(hw, conf);
ee03a932
LB		 4537 if (rc)
4538 goto out;
4539
a66098da
LB		 4540 if (conf->power_level > 18)
4541 conf->power_level = 18;
a66098da 4542
08b06347 4543 if (priv->ap_fw) {
03217087
NS		 4544
4545 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4546 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4547 if (rc)
4548 goto out;
4549 }
41fdf097 4550
da62b761
NS		 4551 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4552 if (rc)
4553 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4554 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4555 if (rc)
4556 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4557
08b06347 4558 } else {
41fdf097
NS		 4559 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4560 if (rc)
4561 goto out;
08b06347
LB		 4562 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4563 }
a66098da 4564
ee03a932
LB		 4565out:
4566 mwl8k_fw_unlock(hw);
a66098da 4567
ee03a932 4568 return rc;
a66098da
LB		 4569}
4570
b64fe619
LB		 4571static void
4572mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4573 struct ieee80211_bss_conf *info, u32 changed)
a66098da 4574{
a66098da 4575 struct mwl8k_priv *priv = hw->priv;
ba30c4a5 4576 u32 ap_legacy_rates = 0;
13935e2c 4577 u8 ap_mcs_rates[16];
3a980d0a
LB		 4578 int rc;
4579
c3cbbe8a 4580 if (mwl8k_fw_lock(hw))
3a980d0a 4581 return;
a66098da 4582
c3cbbe8a
LB		 4583 /*
4584 * No need to capture a beacon if we're no longer associated.
4585 */
4586 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4587 priv->capture_beacon = false;
3a980d0a 4588
c3cbbe8a 4589 /*
13935e2c 4590 * Get the AP's legacy and MCS rates.
c3cbbe8a 4591 */
7dc6a7a7 4592 if (vif->bss_conf.assoc) {
c6e96010 4593 struct ieee80211_sta *ap;
c97470dd 4594
c6e96010 4595 rcu_read_lock();
c6e96010 4596
c3cbbe8a
LB		 4597 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4598 if (ap == NULL) {
4599 rcu_read_unlock();
c6e96010 4600 goto out;
c3cbbe8a
LB		 4601 }
4602
8707d026
LB		 4603 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4604 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4605 } else {
4606 ap_legacy_rates =
4607 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4608 }
13935e2c 4609 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
c3cbbe8a
LB		 4610
4611 rcu_read_unlock();
4612 }
c6e96010 4613
c3cbbe8a 4614 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
13935e2c 4615 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3a980d0a
LB		 4616 if (rc)
4617 goto out;
a66098da 4618
b71ed2c6 4619 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3a980d0a
LB		 4620 if (rc)
4621 goto out;
c3cbbe8a 4622 }
a66098da 4623
c3cbbe8a 4624 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
7dc6a7a7
LB		 4625 rc = mwl8k_set_radio_preamble(hw,
4626 vif->bss_conf.use_short_preamble);
3a980d0a
LB		 4627 if (rc)
4628 goto out;
c3cbbe8a 4629 }
a66098da 4630
c3cbbe8a 4631 if (changed & BSS_CHANGED_ERP_SLOT) {
7dc6a7a7 4632 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3a980d0a
LB		 4633 if (rc)
4634 goto out;
c3cbbe8a 4635 }
a66098da 4636
c97470dd
LB		 4637 if (vif->bss_conf.assoc &&
4638 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4639 BSS_CHANGED_HT))) {
c3cbbe8a 4640 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3a980d0a
LB		 4641 if (rc)
4642 goto out;
c3cbbe8a 4643 }
a66098da 4644
c3cbbe8a
LB		 4645 if (vif->bss_conf.assoc &&
4646 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
a66098da
LB		 4647 /*
4648 * Finalize the join. Tell rx handler to process
4649 * next beacon from our BSSID.
4650 */
0a11dfc3 4651 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
a66098da 4652 priv->capture_beacon = true;
a66098da
LB		 4653 }
4654
3a980d0a
LB		 4655out:
4656 mwl8k_fw_unlock(hw);
a66098da
LB		 4657}
4658
b64fe619
LB		 4659static void
4660mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4661 struct ieee80211_bss_conf *info, u32 changed)
4662{
4663 int rc;
4664
4665 if (mwl8k_fw_lock(hw))
4666 return;
4667
4668 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4669 rc = mwl8k_set_radio_preamble(hw,
4670 vif->bss_conf.use_short_preamble);
4671 if (rc)
4672 goto out;
4673 }
4674
4675 if (changed & BSS_CHANGED_BASIC_RATES) {
4676 int idx;
4677 int rate;
4678
4679 /*
4680 * Use lowest supported basic rate for multicasts
4681 * and management frames (such as probe responses --
4682 * beacons will always go out at 1 Mb/s).
4683 */
4684 idx = ffs(vif->bss_conf.basic_rates);
8707d026
LB		 4685 if (idx)
4686 idx--;
4687
4688 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4689 rate = mwl8k_rates_24[idx].hw_value;
4690 else
4691 rate = mwl8k_rates_50[idx].hw_value;
b64fe619
LB		 4692
4693 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4694 }
4695
4696 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4697 struct sk_buff *skb;
4698
4699 skb = ieee80211_beacon_get(hw, vif);
4700 if (skb != NULL) {
aa21d0f6 4701 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
b64fe619
LB		 4702 kfree_skb(skb);
4703 }
4704 }
4705
4706 if (changed & BSS_CHANGED_BEACON_ENABLED)
aa21d0f6 4707 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
b64fe619
LB		 4708
4709out:
4710 mwl8k_fw_unlock(hw);
4711}
4712
4713static void
4714mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4715 struct ieee80211_bss_conf *info, u32 changed)
4716{
4717 struct mwl8k_priv *priv = hw->priv;
4718
4719 if (!priv->ap_fw)
4720 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4721 else
4722 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4723}
4724
e81cd2d6 4725static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 4726 struct netdev_hw_addr_list *mc_list)
e81cd2d6
LB		 4727{
4728 struct mwl8k_cmd_pkt *cmd;
4729
447ced07
LB		 4730 /*
4731 * Synthesize and return a command packet that programs the
4732 * hardware multicast address filter. At this point we don't
4733 * know whether FIF_ALLMULTI is being requested, but if it is,
4734 * we'll end up throwing this packet away and creating a new
4735 * one in mwl8k_configure_filter().
4736 */
22bedad3 4737 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
e81cd2d6
LB		 4738
4739 return (unsigned long)cmd;
4740}
4741
a43c49a8
LB		 4742static int
4743mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4744 unsigned int changed_flags,
4745 unsigned int *total_flags)
4746{
4747 struct mwl8k_priv *priv = hw->priv;
4748
4749 /*
4750 * Hardware sniffer mode is mutually exclusive with STA
4751 * operation, so refuse to enable sniffer mode if a STA
4752 * interface is active.
4753 */
f5bb87cf 4754 if (!list_empty(&priv->vif_list)) {
a43c49a8 4755 if (net_ratelimit())
c96c31e4
JP		 4756 wiphy_info(hw->wiphy,
4757 "not enabling sniffer mode because STA interface is active\n");
a43c49a8
LB		 4758 return 0;
4759 }
4760
4761 if (!priv->sniffer_enabled) {
55489b6e 4762 if (mwl8k_cmd_enable_sniffer(hw, 1))
a43c49a8
LB		 4763 return 0;
4764 priv->sniffer_enabled = true;
4765 }
4766
4767 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4768 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4769 FIF_OTHER_BSS;
4770
4771 return 1;
4772}
4773
f5bb87cf
LB		 4774static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4775{
4776 if (!list_empty(&priv->vif_list))
4777 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4778
4779 return NULL;
4780}
4781
e6935ea1
LB		 4782static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4783 unsigned int changed_flags,
4784 unsigned int *total_flags,
4785 u64 multicast)
4786{
4787 struct mwl8k_priv *priv = hw->priv;
a43c49a8
LB		 4788 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4789
c0adae2c
LB		 4790 /*
4791 * AP firmware doesn't allow fine-grained control over
4792 * the receive filter.
4793 */
4794 if (priv->ap_fw) {
4795 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4796 kfree(cmd);
4797 return;
4798 }
4799
a43c49a8
LB		 4800 /*
4801 * Enable hardware sniffer mode if FIF_CONTROL or
4802 * FIF_OTHER_BSS is requested.
4803 */
4804 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
4805 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
4806 kfree(cmd);
4807 return;
4808 }
a66098da 4809
e6935ea1 4810 /* Clear unsupported feature flags */
447ced07 4811 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
a66098da 4812
90852f7a
LB		 4813 if (mwl8k_fw_lock(hw)) {
4814 kfree(cmd);
e6935ea1 4815 return;
90852f7a 4816 }
a66098da 4817
a43c49a8 4818 if (priv->sniffer_enabled) {
55489b6e 4819 mwl8k_cmd_enable_sniffer(hw, 0);
a43c49a8
LB		 4820 priv->sniffer_enabled = false;
4821 }
4822
e6935ea1 4823 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
77165d88
LB		 4824 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
4825 /*
4826 * Disable the BSS filter.
4827 */
e6935ea1 4828 mwl8k_cmd_set_pre_scan(hw);
77165d88 4829 } else {
f5bb87cf 4830 struct mwl8k_vif *mwl8k_vif;
0a11dfc3 4831 const u8 *bssid;
a94cc97e 4832
77165d88
LB		 4833 /*
4834 * Enable the BSS filter.
4835 *
4836 * If there is an active STA interface, use that
4837 * interface's BSSID, otherwise use a dummy one
4838 * (where the OUI part needs to be nonzero for
4839 * the BSSID to be accepted by POST_SCAN).
4840 */
f5bb87cf
LB		 4841 mwl8k_vif = mwl8k_first_vif(priv);
4842 if (mwl8k_vif != NULL)
4843 bssid = mwl8k_vif->vif->bss_conf.bssid;
4844 else
4845 bssid = "\x01\x00\x00\x00\x00\x00";
a94cc97e 4846
e6935ea1 4847 mwl8k_cmd_set_post_scan(hw, bssid);
a66098da
LB		 4848 }
4849 }
4850
447ced07
LB		 4851 /*
4852 * If FIF_ALLMULTI is being requested, throw away the command
4853 * packet that ->prepare_multicast() built and replace it with
4854 * a command packet that enables reception of all multicast
4855 * packets.
4856 */
4857 if (*total_flags & FIF_ALLMULTI) {
4858 kfree(cmd);
22bedad3 4859 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
447ced07
LB		 4860 }
4861
4862 if (cmd != NULL) {
4863 mwl8k_post_cmd(hw, cmd);
4864 kfree(cmd);
e6935ea1 4865 }
a66098da 4866
e6935ea1 4867 mwl8k_fw_unlock(hw);
a66098da
LB		 4868}
4869
a66098da
LB		 4870static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
4871{
c2c2b12a 4872 return mwl8k_cmd_set_rts_threshold(hw, value);
a66098da
LB		 4873}
4874
4a6967b8
JB		 4875static int mwl8k_sta_remove(struct ieee80211_hw *hw,
4876 struct ieee80211_vif *vif,
4877 struct ieee80211_sta *sta)
3f5610ff
LB		 4878{
4879 struct mwl8k_priv *priv = hw->priv;
4880
4a6967b8
JB		 4881 if (priv->ap_fw)
4882 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
4883 else
4884 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
bbfd9128
LB		 4885}
4886
4a6967b8
JB		 4887static int mwl8k_sta_add(struct ieee80211_hw *hw,
4888 struct ieee80211_vif *vif,
4889 struct ieee80211_sta *sta)
bbfd9128
LB		 4890{
4891 struct mwl8k_priv *priv = hw->priv;
4a6967b8 4892 int ret;
fcdc403c
NS		 4893 int i;
4894 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4895 struct ieee80211_key_conf *key;
bbfd9128 4896
4a6967b8
JB		 4897 if (!priv->ap_fw) {
4898 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
4899 if (ret >= 0) {
4900 MWL8K_STA(sta)->peer_id = ret;
17033543
NS		 4901 if (sta->ht_cap.ht_supported)
4902 MWL8K_STA(sta)->is_ampdu_allowed = true;
fcdc403c 4903 ret = 0;
4a6967b8 4904 }
bbfd9128 4905
d9a07d49
NS		 4906 } else {
4907 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
bbfd9128 4908 }
4a6967b8 4909
d9a07d49
NS		 4910 for (i = 0; i < NUM_WEP_KEYS; i++) {
4911 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
4912 if (mwl8k_vif->wep_key_conf[i].enabled)
4913 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
4914 }
fcdc403c 4915 return ret;
bbfd9128
LB		 4916}
4917
a66098da
LB		 4918static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
4919 const struct ieee80211_tx_queue_params *params)
4920{
3e4f542c 4921 struct mwl8k_priv *priv = hw->priv;
a66098da 4922 int rc;
a66098da 4923
3e4f542c
LB		 4924 rc = mwl8k_fw_lock(hw);
4925 if (!rc) {
e600707b 4926 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
0863ade8
BC		 4927 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
4928
3e4f542c 4929 if (!priv->wmm_enabled)
55489b6e 4930 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
a66098da 4931
85c9205c 4932 if (!rc) {
e600707b 4933 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
85c9205c 4934 rc = mwl8k_cmd_set_edca_params(hw, q,
55489b6e
LB		 4935 params->cw_min,
4936 params->cw_max,
4937 params->aifs,
4938 params->txop);
85c9205c 4939 }
3e4f542c
LB		 4940
4941 mwl8k_fw_unlock(hw);
a66098da 4942 }
3e4f542c 4943
a66098da
LB		 4944 return rc;
4945}
4946
a66098da
LB		 4947static int mwl8k_get_stats(struct ieee80211_hw *hw,
4948 struct ieee80211_low_level_stats *stats)
4949{
55489b6e 4950 return mwl8k_cmd_get_stat(hw, stats);
a66098da
LB		 4951}
4952
0d462bbb
JL		 4953static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
4954 struct survey_info *survey)
4955{
4956 struct mwl8k_priv *priv = hw->priv;
4957 struct ieee80211_conf *conf = &hw->conf;
4958
4959 if (idx != 0)
4960 return -ENOENT;
4961
4962 survey->channel = conf->channel;
4963 survey->filled = SURVEY_INFO_NOISE_DBM;
4964 survey->noise = priv->noise;
4965
4966 return 0;
4967}
4968
65f3ddcd
NS		 4969#define MAX_AMPDU_ATTEMPTS 5
4970
a2292d83
LB		 4971static int
4972mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4973 enum ieee80211_ampdu_mlme_action action,
0b01f030
JB		 4974 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
4975 u8 buf_size)
a2292d83 4976{
65f3ddcd
NS		 4977
4978 int i, rc = 0;
4979 struct mwl8k_priv *priv = hw->priv;
4980 struct mwl8k_ampdu_stream *stream;
4981 u8 *addr = sta->addr;
4982
4983 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
4984 return -ENOTSUPP;
4985
4986 spin_lock(&priv->stream_lock);
4987 stream = mwl8k_lookup_stream(hw, addr, tid);
4988
a2292d83
LB		 4989 switch (action) {
4990 case IEEE80211_AMPDU_RX_START:
4991 case IEEE80211_AMPDU_RX_STOP:
65f3ddcd
NS		 4992 break;
4993 case IEEE80211_AMPDU_TX_START:
4994 /* By the time we get here the hw queues may contain outgoing
4995 * packets for this RA/TID that are not part of this BA
4996 * session. The hw will assign sequence numbers to these
4997 * packets as they go out. So if we query the hw for its next
4998 * sequence number and use that for the SSN here, it may end up
4999 * being wrong, which will lead to sequence number mismatch at
5000 * the recipient. To avoid this, we reset the sequence number
5001 * to O for the first MPDU in this BA stream.
5002 */
5003 *ssn = 0;
5004 if (stream == NULL) {
5005 /* This means that somebody outside this driver called
5006 * ieee80211_start_tx_ba_session. This is unexpected
5007 * because we do our own rate control. Just warn and
5008 * move on.
5009 */
5010 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
5011 "Proceeding anyway.\n", __func__);
5012 stream = mwl8k_add_stream(hw, sta, tid);
5013 }
5014 if (stream == NULL) {
5015 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
5016 rc = -EBUSY;
5017 break;
5018 }
5019 stream->state = AMPDU_STREAM_IN_PROGRESS;
5020
5021 /* Release the lock before we do the time consuming stuff */
5022 spin_unlock(&priv->stream_lock);
5023 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
5024 rc = mwl8k_check_ba(hw, stream);
5025
5026 if (!rc)
5027 break;
5028 /*
5029 * HW queues take time to be flushed, give them
5030 * sufficient time
5031 */
5032
5033 msleep(1000);
5034 }
5035 spin_lock(&priv->stream_lock);
5036 if (rc) {
5037 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5038 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5039 mwl8k_remove_stream(hw, stream);
5040 rc = -EBUSY;
5041 break;
5042 }
5043 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5044 break;
5045 case IEEE80211_AMPDU_TX_STOP:
5046 if (stream == NULL)
5047 break;
5048 if (stream->state == AMPDU_STREAM_ACTIVE) {
5049 spin_unlock(&priv->stream_lock);
5050 mwl8k_destroy_ba(hw, stream);
5051 spin_lock(&priv->stream_lock);
5052 }
5053 mwl8k_remove_stream(hw, stream);
5054 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5055 break;
5056 case IEEE80211_AMPDU_TX_OPERATIONAL:
5057 BUG_ON(stream == NULL);
5058 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5059 spin_unlock(&priv->stream_lock);
5060 rc = mwl8k_create_ba(hw, stream, buf_size);
5061 spin_lock(&priv->stream_lock);
5062 if (!rc)
5063 stream->state = AMPDU_STREAM_ACTIVE;
5064 else {
5065 spin_unlock(&priv->stream_lock);
5066 mwl8k_destroy_ba(hw, stream);
5067 spin_lock(&priv->stream_lock);
5068 wiphy_debug(hw->wiphy,
5069 "Failed adding stream for sta %pM tid %d\n",
5070 addr, tid);
5071 mwl8k_remove_stream(hw, stream);
5072 }
5073 break;
5074
a2292d83 5075 default:
65f3ddcd 5076 rc = -ENOTSUPP;
a2292d83 5077 }
65f3ddcd
NS		 5078
5079 spin_unlock(&priv->stream_lock);
5080 return rc;
a2292d83
LB		 5081}
5082
a66098da
LB		 5083static const struct ieee80211_ops mwl8k_ops = {
5084 .tx = mwl8k_tx,
5085 .start = mwl8k_start,
5086 .stop = mwl8k_stop,
5087 .add_interface = mwl8k_add_interface,
5088 .remove_interface = mwl8k_remove_interface,
5089 .config = mwl8k_config,
a66098da 5090 .bss_info_changed = mwl8k_bss_info_changed,
3ac64bee 5091 .prepare_multicast = mwl8k_prepare_multicast,
a66098da 5092 .configure_filter = mwl8k_configure_filter,
fcdc403c 5093 .set_key = mwl8k_set_key,
a66098da 5094 .set_rts_threshold = mwl8k_set_rts_threshold,
4a6967b8
JB		 5095 .sta_add = mwl8k_sta_add,
5096 .sta_remove = mwl8k_sta_remove,
a66098da 5097 .conf_tx = mwl8k_conf_tx,
a66098da 5098 .get_stats = mwl8k_get_stats,
0d462bbb 5099 .get_survey = mwl8k_get_survey,
a2292d83 5100 .ampdu_action = mwl8k_ampdu_action,
a66098da
LB		 5101};
5102
a66098da
LB		 5103static void mwl8k_finalize_join_worker(struct work_struct *work)
5104{
5105 struct mwl8k_priv *priv =
5106 container_of(work, struct mwl8k_priv, finalize_join_worker);
5107 struct sk_buff *skb = priv->beacon_skb;
56007a02
JB		 5108 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5109 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5110 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5111 mgmt->u.beacon.variable, len);
5112 int dtim_period = 1;
5113
5114 if (tim && tim[1] >= 2)
5115 dtim_period = tim[3];
a66098da 5116
56007a02 5117 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
a66098da 5118
f5bb87cf 5119 dev_kfree_skb(skb);
a66098da
LB		 5120 priv->beacon_skb = NULL;
5121}
5122
bcb628d5 5123enum {
9e1b17ea
LB		 5124 MWL8363 = 0,
5125 MWL8687,
bcb628d5 5126 MWL8366,
6f6d1e9a
LB		 5127};
5128
8a7a578c 5129#define MWL8K_8366_AP_FW_API 2
952a0e96
BC		 5130#define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5131#define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5132
bcb628d5 5133static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
9e1b17ea
LB		 5134 [MWL8363] = {
5135 .part_name = "88w8363",
5136 .helper_image = "mwl8k/helper_8363.fw",
0863ade8 5137 .fw_image_sta = "mwl8k/fmimage_8363.fw",
9e1b17ea 5138 },
49eb691c 5139 [MWL8687] = {
bcb628d5
JL		 5140 .part_name = "88w8687",
5141 .helper_image = "mwl8k/helper_8687.fw",
0863ade8 5142 .fw_image_sta = "mwl8k/fmimage_8687.fw",
bcb628d5 5143 },
49eb691c 5144 [MWL8366] = {
bcb628d5
JL		 5145 .part_name = "88w8366",
5146 .helper_image = "mwl8k/helper_8366.fw",
0863ade8 5147 .fw_image_sta = "mwl8k/fmimage_8366.fw",
952a0e96
BC		 5148 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5149 .fw_api_ap = MWL8K_8366_AP_FW_API,
89a91f4f 5150 .ap_rxd_ops = &rxd_8366_ap_ops,
bcb628d5 5151 },
45a390dd
LB		 5152};
5153
c92d4ede
LB		 5154MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5155MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5156MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5157MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5158MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5159MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
952a0e96 5160MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
c92d4ede 5161
45a390dd 5162static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
e5868ba1 5163 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
9e1b17ea
LB		 5164 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5165 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
bcb628d5
JL		 5166 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5167 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5168 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
ca66527c 5169 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
bcb628d5 5170 { },
45a390dd
LB		 5171};
5172MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5173
99020471
BC		 5174static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5175{
5176 int rc;
5177 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5178 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5179 priv->fw_pref, priv->fw_alt);
5180 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5181 if (rc) {
5182 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5183 pci_name(priv->pdev), priv->fw_alt);
5184 return rc;
5185 }
5186 return 0;
5187}
5188
5189static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5190static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5191{
5192 struct mwl8k_priv *priv = context;
5193 struct mwl8k_device_info *di = priv->device_info;
5194 int rc;
5195
5196 switch (priv->fw_state) {
5197 case FW_STATE_INIT:
5198 if (!fw) {
5199 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5200 pci_name(priv->pdev), di->helper_image);
5201 goto fail;
5202 }
5203 priv->fw_helper = fw;
5204 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5205 true);
5206 if (rc && priv->fw_alt) {
5207 rc = mwl8k_request_alt_fw(priv);
5208 if (rc)
5209 goto fail;
5210 priv->fw_state = FW_STATE_LOADING_ALT;
5211 } else if (rc)
5212 goto fail;
5213 else
5214 priv->fw_state = FW_STATE_LOADING_PREF;
5215 break;
5216
5217 case FW_STATE_LOADING_PREF:
5218 if (!fw) {
5219 if (priv->fw_alt) {
5220 rc = mwl8k_request_alt_fw(priv);
5221 if (rc)
5222 goto fail;
5223 priv->fw_state = FW_STATE_LOADING_ALT;
5224 } else
5225 goto fail;
5226 } else {
5227 priv->fw_ucode = fw;
5228 rc = mwl8k_firmware_load_success(priv);
5229 if (rc)
5230 goto fail;
5231 else
5232 complete(&priv->firmware_loading_complete);
5233 }
5234 break;
5235
5236 case FW_STATE_LOADING_ALT:
5237 if (!fw) {
5238 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5239 pci_name(priv->pdev), di->helper_image);
5240 goto fail;
5241 }
5242 priv->fw_ucode = fw;
5243 rc = mwl8k_firmware_load_success(priv);
5244 if (rc)
5245 goto fail;
5246 else
5247 complete(&priv->firmware_loading_complete);
5248 break;
5249
5250 default:
5251 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5252 MWL8K_NAME, priv->fw_state);
5253 BUG_ON(1);
5254 }
5255
5256 return;
5257
5258fail:
5259 priv->fw_state = FW_STATE_ERROR;
5260 complete(&priv->firmware_loading_complete);
5261 device_release_driver(&priv->pdev->dev);
5262 mwl8k_release_firmware(priv);
5263}
5264
5265static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5266 bool nowait)
a66098da 5267{
3cc7772c 5268 struct mwl8k_priv *priv = hw->priv;
a66098da 5269 int rc;
be695fc4
LB		 5270
5271 /* Reset firmware and hardware */
5272 mwl8k_hw_reset(priv);
5273
5274 /* Ask userland hotplug daemon for the device firmware */
99020471 5275 rc = mwl8k_request_firmware(priv, fw_image, nowait);
be695fc4 5276 if (rc) {
5db55844 5277 wiphy_err(hw->wiphy, "Firmware files not found\n");
3cc7772c 5278 return rc;
be695fc4
LB		 5279 }
5280
99020471
BC		 5281 if (nowait)
5282 return rc;
5283
be695fc4
LB		 5284 /* Load firmware into hardware */
5285 rc = mwl8k_load_firmware(hw);
3cc7772c 5286 if (rc)
5db55844 5287 wiphy_err(hw->wiphy, "Cannot start firmware\n");
be695fc4
LB		 5288
5289 /* Reclaim memory once firmware is successfully loaded */
5290 mwl8k_release_firmware(priv);
5291
3cc7772c
BC		 5292 return rc;
5293}
5294
73b46320
BC		 5295static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5296{
5297 struct mwl8k_priv *priv = hw->priv;
5298 int rc = 0;
5299 int i;
5300
e600707b 5301 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
73b46320
BC		 5302 rc = mwl8k_txq_init(hw, i);
5303 if (rc)
5304 break;
5305 if (priv->ap_fw)
5306 iowrite32(priv->txq[i].txd_dma,
5307 priv->sram + priv->txq_offset[i]);
5308 }
5309 return rc;
5310}
5311
3cc7772c
BC		 5312/* initialize hw after successfully loading a firmware image */
5313static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5314{
5315 struct mwl8k_priv *priv = hw->priv;
5316 int rc = 0;
5317 int i;
be695fc4 5318
91942230 5319 if (priv->ap_fw) {
89a91f4f 5320 priv->rxd_ops = priv->device_info->ap_rxd_ops;
91942230 5321 if (priv->rxd_ops == NULL) {
c96c31e4
JP		 5322 wiphy_err(hw->wiphy,
5323 "Driver does not have AP firmware image support for this hardware\n");
91942230
LB		 5324 goto err_stop_firmware;
5325 }
5326 } else {
89a91f4f 5327 priv->rxd_ops = &rxd_sta_ops;
91942230 5328 }
be695fc4
LB		 5329
5330 priv->sniffer_enabled = false;
5331 priv->wmm_enabled = false;
5332 priv->pending_tx_pkts = 0;
5333
a66098da
LB		 5334 rc = mwl8k_rxq_init(hw, 0);
5335 if (rc)
3cc7772c 5336 goto err_stop_firmware;
a66098da
LB		 5337 rxq_refill(hw, 0, INT_MAX);
5338
73b46320
BC		 5339 /* For the sta firmware, we need to know the dma addresses of tx queues
5340 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5341 * prior to issuing this command. But for the AP case, we learn the
5342 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5343 * case we must initialize the tx queues after.
5344 */
8a7a578c 5345 priv->num_ampdu_queues = 0;
73b46320
BC		 5346 if (!priv->ap_fw) {
5347 rc = mwl8k_init_txqs(hw);
a66098da
LB		 5348 if (rc)
5349 goto err_free_queues;
5350 }
5351
5352 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
c23b5a69 5353 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3aefc37e
NS		 5354 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5355 MWL8K_A2H_INT_BA_WATCHDOG,
1e9f9de3 5356 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
12488e01
NS		 5357 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5358 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
a66098da 5359
a0607fd3 5360 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
a66098da
LB		 5361 IRQF_SHARED, MWL8K_NAME, hw);
5362 if (rc) {
5db55844 5363 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
a66098da
LB		 5364 goto err_free_queues;
5365 }
5366
ac109fd0
BC		 5367 memset(priv->ampdu, 0, sizeof(priv->ampdu));
5368
a66098da
LB		 5369 /*
5370 * Temporarily enable interrupts. Initial firmware host
c2c2b12a 5371 * commands use interrupts and avoid polling. Disable
a66098da
LB		 5372 * interrupts when done.
5373 */
c23b5a69 5374 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5375
5376 /* Get config data, mac addrs etc */
42fba21d
LB		 5377 if (priv->ap_fw) {
5378 rc = mwl8k_cmd_get_hw_spec_ap(hw);
73b46320
BC		 5379 if (!rc)
5380 rc = mwl8k_init_txqs(hw);
42fba21d
LB		 5381 if (!rc)
5382 rc = mwl8k_cmd_set_hw_spec(hw);
5383 } else {
5384 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5385 }
a66098da 5386 if (rc) {
5db55844 5387 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
be695fc4 5388 goto err_free_irq;
a66098da
LB		 5389 }
5390
5391 /* Turn radio off */
55489b6e 5392 rc = mwl8k_cmd_radio_disable(hw);
a66098da 5393 if (rc) {
5db55844 5394 wiphy_err(hw->wiphy, "Cannot disable\n");
be695fc4 5395 goto err_free_irq;
a66098da
LB		 5396 }
5397
32060e1b 5398 /* Clear MAC address */
aa21d0f6 5399 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
32060e1b 5400 if (rc) {
5db55844 5401 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
be695fc4 5402 goto err_free_irq;
32060e1b
LB		 5403 }
5404
a66098da 5405 /* Disable interrupts */
a66098da 5406 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5407 free_irq(priv->pdev->irq, hw);
5408
c96c31e4
JP		 5409 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5410 priv->device_info->part_name,
5411 priv->hw_rev, hw->wiphy->perm_addr,
5412 priv->ap_fw ? "AP" : "STA",
5413 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5414 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
a66098da
LB		 5415
5416 return 0;
5417
a66098da 5418err_free_irq:
a66098da 5419 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
a66098da
LB		 5420 free_irq(priv->pdev->irq, hw);
5421
5422err_free_queues:
e600707b 5423 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5424 mwl8k_txq_deinit(hw, i);
5425 mwl8k_rxq_deinit(hw, 0);
5426
3cc7772c
BC		 5427err_stop_firmware:
5428 mwl8k_hw_reset(priv);
5429
5430 return rc;
5431}
5432
5433/*
5434 * invoke mwl8k_reload_firmware to change the firmware image after the device
5435 * has already been registered
5436 */
5437static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5438{
5439 int i, rc = 0;
5440 struct mwl8k_priv *priv = hw->priv;
5441
5442 mwl8k_stop(hw);
5443 mwl8k_rxq_deinit(hw, 0);
5444
e600707b 5445 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5446 mwl8k_txq_deinit(hw, i);
5447
99020471 5448 rc = mwl8k_init_firmware(hw, fw_image, false);
3cc7772c
BC		 5449 if (rc)
5450 goto fail;
5451
5452 rc = mwl8k_probe_hw(hw);
5453 if (rc)
5454 goto fail;
5455
5456 rc = mwl8k_start(hw);
5457 if (rc)
5458 goto fail;
5459
5460 rc = mwl8k_config(hw, ~0);
5461 if (rc)
5462 goto fail;
5463
e600707b 5464 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
3cc7772c
BC		 5465 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
5466 if (rc)
5467 goto fail;
5468 }
5469
5470 return rc;
5471
5472fail:
5473 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5474 return rc;
5475}
5476
5477static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5478{
5479 struct ieee80211_hw *hw = priv->hw;
5480 int i, rc;
5481
99020471
BC		 5482 rc = mwl8k_load_firmware(hw);
5483 mwl8k_release_firmware(priv);
5484 if (rc) {
5485 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5486 return rc;
5487 }
5488
3cc7772c
BC		 5489 /*
5490 * Extra headroom is the size of the required DMA header
5491 * minus the size of the smallest 802.11 frame (CTS frame).
5492 */
5493 hw->extra_tx_headroom =
5494 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5495
ff776cec
YAP		 5496 hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
5497
3cc7772c
BC		 5498 hw->channel_change_time = 10;
5499
e600707b 5500 hw->queues = MWL8K_TX_WMM_QUEUES;
3cc7772c
BC		 5501
5502 /* Set rssi values to dBm */
0bf22c37 5503 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
3cc7772c
BC		 5504 hw->vif_data_size = sizeof(struct mwl8k_vif);
5505 hw->sta_data_size = sizeof(struct mwl8k_sta);
5506
5507 priv->macids_used = 0;
5508 INIT_LIST_HEAD(&priv->vif_list);
5509
5510 /* Set default radio state and preamble */
5511 priv->radio_on = 0;
5512 priv->radio_short_preamble = 0;
5513
5514 /* Finalize join worker */
5515 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
3aefc37e
NS		 5516 /* Handle watchdog ba events */
5517 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
3cc7772c
BC		 5518
5519 /* TX reclaim and RX tasklets. */
5520 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5521 tasklet_disable(&priv->poll_tx_task);
5522 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5523 tasklet_disable(&priv->poll_rx_task);
5524
5525 /* Power management cookie */
5526 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5527 if (priv->cookie == NULL)
5528 return -ENOMEM;
5529
5530 mutex_init(&priv->fw_mutex);
5531 priv->fw_mutex_owner = NULL;
5532 priv->fw_mutex_depth = 0;
5533 priv->hostcmd_wait = NULL;
5534
5535 spin_lock_init(&priv->tx_lock);
5536
ac109fd0
BC		 5537 spin_lock_init(&priv->stream_lock);
5538
3cc7772c
BC		 5539 priv->tx_wait = NULL;
5540
5541 rc = mwl8k_probe_hw(hw);
5542 if (rc)
5543 goto err_free_cookie;
5544
5545 hw->wiphy->interface_modes = 0;
5546 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
5547 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5548 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5549 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5550
5551 rc = ieee80211_register_hw(hw);
5552 if (rc) {
5553 wiphy_err(hw->wiphy, "Cannot register device\n");
5554 goto err_unprobe_hw;
5555 }
5556
5557 return 0;
5558
5559err_unprobe_hw:
e600707b 5560 for (i = 0; i < mwl8k_tx_queues(priv); i++)
3cc7772c
BC		 5561 mwl8k_txq_deinit(hw, i);
5562 mwl8k_rxq_deinit(hw, 0);
5563
be695fc4 5564err_free_cookie:
a66098da
LB		 5565 if (priv->cookie != NULL)
5566 pci_free_consistent(priv->pdev, 4,
5567 priv->cookie, priv->cookie_dma);
5568
3cc7772c
BC		 5569 return rc;
5570}
5571static int __devinit mwl8k_probe(struct pci_dev *pdev,
5572 const struct pci_device_id *id)
5573{
5574 static int printed_version;
5575 struct ieee80211_hw *hw;
5576 struct mwl8k_priv *priv;
0863ade8 5577 struct mwl8k_device_info *di;
3cc7772c
BC		 5578 int rc;
5579
5580 if (!printed_version) {
5581 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5582 printed_version = 1;
5583 }
5584
5585
5586 rc = pci_enable_device(pdev);
5587 if (rc) {
5588 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5589 MWL8K_NAME);
5590 return rc;
5591 }
5592
5593 rc = pci_request_regions(pdev, MWL8K_NAME);
5594 if (rc) {
5595 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5596 MWL8K_NAME);
5597 goto err_disable_device;
5598 }
5599
5600 pci_set_master(pdev);
5601
5602
5603 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5604 if (hw == NULL) {
5605 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5606 rc = -ENOMEM;
5607 goto err_free_reg;
5608 }
5609
5610 SET_IEEE80211_DEV(hw, &pdev->dev);
5611 pci_set_drvdata(pdev, hw);
5612
5613 priv = hw->priv;
5614 priv->hw = hw;
5615 priv->pdev = pdev;
5616 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5617
5618
5619 priv->sram = pci_iomap(pdev, 0, 0x10000);
5620 if (priv->sram == NULL) {
5621 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5622 goto err_iounmap;
5623 }
5624
5625 /*
5626 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5627 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5628 */
5629 priv->regs = pci_iomap(pdev, 1, 0x10000);
5630 if (priv->regs == NULL) {
5631 priv->regs = pci_iomap(pdev, 2, 0x10000);
5632 if (priv->regs == NULL) {
5633 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5634 goto err_iounmap;
5635 }
5636 }
5637
0863ade8 5638 /*
99020471
BC		 5639 * Choose the initial fw image depending on user input. If a second
5640 * image is available, make it the alternative image that will be
5641 * loaded if the first one fails.
0863ade8 5642 */
99020471 5643 init_completion(&priv->firmware_loading_complete);
0863ade8 5644 di = priv->device_info;
99020471
BC		 5645 if (ap_mode_default && di->fw_image_ap) {
5646 priv->fw_pref = di->fw_image_ap;
5647 priv->fw_alt = di->fw_image_sta;
5648 } else if (!ap_mode_default && di->fw_image_sta) {
5649 priv->fw_pref = di->fw_image_sta;
5650 priv->fw_alt = di->fw_image_ap;
5651 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
0863ade8 5652 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
99020471 5653 priv->fw_pref = di->fw_image_sta;
0863ade8
BC		 5654 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5655 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
99020471
BC		 5656 priv->fw_pref = di->fw_image_ap;
5657 }
5658 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
3cc7772c
BC		 5659 if (rc)
5660 goto err_stop_firmware;
99020471 5661 return rc;
3cc7772c 5662
be695fc4
LB		 5663err_stop_firmware:
5664 mwl8k_hw_reset(priv);
be695fc4
LB		 5665
5666err_iounmap:
a66098da
LB		 5667 if (priv->regs != NULL)
5668 pci_iounmap(pdev, priv->regs);
5669
5b9482dd
LB		 5670 if (priv->sram != NULL)
5671 pci_iounmap(pdev, priv->sram);
5672
a66098da
LB		 5673 pci_set_drvdata(pdev, NULL);
5674 ieee80211_free_hw(hw);
5675
5676err_free_reg:
5677 pci_release_regions(pdev);
3db95e50
LB		 5678
5679err_disable_device:
a66098da
LB		 5680 pci_disable_device(pdev);
5681
5682 return rc;
5683}
5684
230f7af0 5685static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
a66098da
LB		 5686{
5687 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
5688}
5689
230f7af0 5690static void __devexit mwl8k_remove(struct pci_dev *pdev)
a66098da
LB		 5691{
5692 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5693 struct mwl8k_priv *priv;
5694 int i;
5695
5696 if (hw == NULL)
5697 return;
5698 priv = hw->priv;
5699
99020471
BC		 5700 wait_for_completion(&priv->firmware_loading_complete);
5701
5702 if (priv->fw_state == FW_STATE_ERROR) {
5703 mwl8k_hw_reset(priv);
5704 goto unmap;
5705 }
5706
a66098da
LB		 5707 ieee80211_stop_queues(hw);
5708
60aa569f
LB		 5709 ieee80211_unregister_hw(hw);
5710
67e2eb27 5711 /* Remove TX reclaim and RX tasklets. */
1e9f9de3 5712 tasklet_kill(&priv->poll_tx_task);
67e2eb27 5713 tasklet_kill(&priv->poll_rx_task);
a66098da 5714
a66098da
LB		 5715 /* Stop hardware */
5716 mwl8k_hw_reset(priv);
5717
5718 /* Return all skbs to mac80211 */
e600707b 5719 for (i = 0; i < mwl8k_tx_queues(priv); i++)
efb7c49a 5720 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
a66098da 5721
e600707b 5722 for (i = 0; i < mwl8k_tx_queues(priv); i++)
a66098da
LB		 5723 mwl8k_txq_deinit(hw, i);
5724
5725 mwl8k_rxq_deinit(hw, 0);
5726
c2c357ce 5727 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
a66098da 5728
99020471 5729unmap:
a66098da 5730 pci_iounmap(pdev, priv->regs);
5b9482dd 5731 pci_iounmap(pdev, priv->sram);
a66098da
LB		 5732 pci_set_drvdata(pdev, NULL);
5733 ieee80211_free_hw(hw);
5734 pci_release_regions(pdev);
5735 pci_disable_device(pdev);
5736}
5737
5738static struct pci_driver mwl8k_driver = {
5739 .name = MWL8K_NAME,
45a390dd 5740 .id_table = mwl8k_pci_id_table,
a66098da
LB		 5741 .probe = mwl8k_probe,
5742 .remove = __devexit_p(mwl8k_remove),
5743 .shutdown = __devexit_p(mwl8k_shutdown),
5744};
5745
5746static int __init mwl8k_init(void)
5747{
5748 return pci_register_driver(&mwl8k_driver);
5749}
5750
5751static void __exit mwl8k_exit(void)
5752{
5753 pci_unregister_driver(&mwl8k_driver);
5754}
5755
5756module_init(mwl8k_init);
5757module_exit(mwl8k_exit);
c2c357ce
LB		 5758
5759MODULE_DESCRIPTION(MWL8K_DESC);
5760MODULE_VERSION(MWL8K_VERSION);
5761MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
5762MODULE_LICENSE("GPL");
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