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eff1a59c MW |
1 | /* |
2 | * Shared defines for all mac80211 Prism54 code | |
3 | * | |
4 | * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> | |
5 | * | |
6 | * Based on the islsm (softmac prism54) driver, which is: | |
7 | * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
d8c92107 CL |
14 | #ifndef P54_H |
15 | #define P54_H | |
16 | ||
54082819 | 17 | #ifdef CONFIG_P54_LEDS |
d0b45aef | 18 | #include <linux/leds.h> |
54082819 | 19 | #endif /* CONFIG_P54_LEDS */ |
d0b45aef | 20 | |
d8c92107 CL |
21 | #define ISL38XX_DEV_FIRMWARE_ADDR 0x20000 |
22 | ||
23 | #define BR_CODE_MIN 0x80000000 | |
24 | #define BR_CODE_COMPONENT_ID 0x80000001 | |
25 | #define BR_CODE_COMPONENT_VERSION 0x80000002 | |
26 | #define BR_CODE_DEPENDENT_IF 0x80000003 | |
27 | #define BR_CODE_EXPOSED_IF 0x80000004 | |
28 | #define BR_CODE_DESCR 0x80000101 | |
29 | #define BR_CODE_MAX 0x8FFFFFFF | |
30 | #define BR_CODE_END_OF_BRA 0xFF0000FF | |
31 | #define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF | |
32 | ||
33 | struct bootrec { | |
34 | __le32 code; | |
35 | __le32 len; | |
36 | u32 data[10]; | |
37 | } __packed; | |
38 | ||
39 | /* Interface role definitions */ | |
40 | #define BR_INTERFACE_ROLE_SERVER 0x0000 | |
41 | #define BR_INTERFACE_ROLE_CLIENT 0x8000 | |
42 | ||
43 | #define BR_DESC_PRIV_CAP_WEP BIT(0) | |
44 | #define BR_DESC_PRIV_CAP_TKIP BIT(1) | |
45 | #define BR_DESC_PRIV_CAP_MICHAEL BIT(2) | |
46 | #define BR_DESC_PRIV_CAP_CCX_CP BIT(3) | |
47 | #define BR_DESC_PRIV_CAP_CCX_MIC BIT(4) | |
48 | #define BR_DESC_PRIV_CAP_AESCCMP BIT(5) | |
49 | ||
50 | struct bootrec_desc { | |
51 | __le16 modes; | |
52 | __le16 flags; | |
53 | __le32 rx_start; | |
54 | __le32 rx_end; | |
55 | u8 headroom; | |
56 | u8 tailroom; | |
57 | u8 tx_queues; | |
58 | u8 tx_depth; | |
59 | u8 privacy_caps; | |
60 | u8 rx_keycache_size; | |
61 | u8 time_size; | |
62 | u8 padding; | |
63 | u8 rates[16]; | |
64 | u8 padding2[4]; | |
65 | __le16 rx_mtu; | |
66 | } __packed; | |
67 | ||
68 | #define FW_FMAC 0x464d4143 | |
69 | #define FW_LM86 0x4c4d3836 | |
70 | #define FW_LM87 0x4c4d3837 | |
71 | #define FW_LM20 0x4c4d3230 | |
72 | ||
73 | struct bootrec_comp_id { | |
74 | __le32 fw_variant; | |
75 | } __packed; | |
76 | ||
77 | struct bootrec_comp_ver { | |
78 | char fw_version[24]; | |
79 | } __packed; | |
80 | ||
81 | struct bootrec_end { | |
82 | __le16 crc; | |
83 | u8 padding[2]; | |
84 | u8 md5[16]; | |
85 | } __packed; | |
eff1a59c | 86 | |
3cd08b38 CL |
87 | /* provide 16 bytes for the transport back-end */ |
88 | #define P54_TX_INFO_DATA_SIZE 16 | |
89 | ||
90 | /* stored in ieee80211_tx_info's rate_driver_data */ | |
91 | struct p54_tx_info { | |
92 | u32 start_addr; | |
93 | u32 end_addr; | |
d8c92107 CL |
94 | union { |
95 | void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)]; | |
96 | struct { | |
97 | u32 extra_len; | |
98 | }; | |
99 | }; | |
3cd08b38 CL |
100 | }; |
101 | ||
63f2dc9f CL |
102 | #define P54_MAX_CTRL_FRAME_LEN 0x1000 |
103 | ||
d8c92107 CL |
104 | #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \ |
105 | do { \ | |
106 | queue.aifs = cpu_to_le16(ai_fs); \ | |
107 | queue.cwmin = cpu_to_le16(cw_min); \ | |
108 | queue.cwmax = cpu_to_le16(cw_max); \ | |
109 | queue.txop = cpu_to_le16(_txop); \ | |
110 | } while (0) | |
0a5ec96a | 111 | |
0fdd7c5d CL |
112 | struct p54_edcf_queue_param { |
113 | __le16 aifs; | |
114 | __le16 cwmin; | |
115 | __le16 cwmax; | |
116 | __le16 txop; | |
d8c92107 | 117 | } __packed; |
0fdd7c5d | 118 | |
7a047f4f CL |
119 | struct p54_rssi_db_entry { |
120 | u16 freq; | |
69ba3e5d CL |
121 | s16 mul; |
122 | s16 add; | |
123 | s16 longbow_unkn; | |
124 | s16 longbow_unk2; | |
125 | }; | |
126 | ||
83cf1b6e CL |
127 | struct p54_cal_database { |
128 | size_t entries; | |
129 | size_t entry_size; | |
130 | size_t offset; | |
131 | size_t len; | |
132 | u8 data[0]; | |
133 | }; | |
134 | ||
7cb77072 | 135 | #define EEPROM_READBACK_LEN 0x3fc |
eff1a59c | 136 | |
cd8d3d32 CL |
137 | enum fw_state { |
138 | FW_STATE_OFF, | |
139 | FW_STATE_BOOTING, | |
140 | FW_STATE_READY, | |
141 | FW_STATE_RESET, | |
142 | FW_STATE_RESETTING, | |
143 | }; | |
144 | ||
54082819 | 145 | #ifdef CONFIG_P54_LEDS |
d0b45aef CL |
146 | |
147 | #define P54_LED_MAX_NAME_LEN 31 | |
148 | ||
149 | struct p54_led_dev { | |
150 | struct ieee80211_hw *hw_dev; | |
151 | struct led_classdev led_dev; | |
152 | char name[P54_LED_MAX_NAME_LEN + 1]; | |
153 | ||
dce07258 | 154 | unsigned int toggled; |
d0b45aef CL |
155 | unsigned int index; |
156 | unsigned int registered; | |
157 | }; | |
158 | ||
54082819 | 159 | #endif /* CONFIG_P54_LEDS */ |
d0b45aef | 160 | |
97e93fcd KV |
161 | struct p54_tx_queue_stats { |
162 | unsigned int len; | |
163 | unsigned int limit; | |
164 | unsigned int count; | |
165 | }; | |
166 | ||
eff1a59c | 167 | struct p54_common { |
54fdb040 | 168 | struct ieee80211_hw *hw; |
f13027af | 169 | struct ieee80211_vif *vif; |
0a5ec96a | 170 | void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb); |
eff1a59c MW |
171 | int (*open)(struct ieee80211_hw *dev); |
172 | void (*stop)(struct ieee80211_hw *dev); | |
d8c92107 | 173 | struct sk_buff_head tx_pending; |
cf3a9579 CL |
174 | struct sk_buff_head tx_queue; |
175 | struct mutex conf_mutex; | |
176 | ||
177 | /* memory management (as seen by the firmware) */ | |
178 | u32 rx_start; | |
179 | u32 rx_end; | |
4e416a6f CL |
180 | u16 rx_mtu; |
181 | u8 headroom; | |
182 | u8 tailroom; | |
cf3a9579 CL |
183 | |
184 | /* firmware/hardware info */ | |
185 | unsigned int tx_hdr_len; | |
186 | unsigned int fw_var; | |
187 | unsigned int fw_interface; | |
188 | u8 version; | |
189 | ||
190 | /* (e)DCF / QOS state */ | |
191 | bool use_short_slot; | |
d8c92107 | 192 | spinlock_t tx_stats_lock; |
97e93fcd | 193 | struct p54_tx_queue_stats tx_stats[8]; |
cf3a9579 CL |
194 | struct p54_edcf_queue_param qos_params[8]; |
195 | ||
196 | /* Radio data */ | |
197 | u16 rxhw; | |
78eb7484 CL |
198 | u8 rx_diversity_mask; |
199 | u8 tx_diversity_mask; | |
cf3a9579 | 200 | unsigned int output_power; |
7a047f4f | 201 | struct p54_rssi_db_entry *cur_rssi; |
0d78156e CL |
202 | struct ieee80211_channel *curchan; |
203 | struct survey_info *survey; | |
204 | unsigned int chan_num; | |
205 | struct completion stat_comp; | |
206 | bool update_stats; | |
207 | struct { | |
208 | unsigned int timestamp; | |
209 | unsigned int cached_cca; | |
210 | unsigned int cached_tx; | |
211 | unsigned int cached_rssi; | |
212 | u64 active; | |
213 | u64 cca; | |
214 | u64 tx; | |
215 | u64 rssi; | |
216 | } survey_raw; | |
217 | ||
cf3a9579 CL |
218 | int noise; |
219 | /* calibration, output power limit and rssi<->dBm conversation data */ | |
eff1a59c MW |
220 | struct pda_iq_autocal_entry *iq_autocal; |
221 | unsigned int iq_autocal_len; | |
83cf1b6e | 222 | struct p54_cal_database *curve_data; |
cf3a9579 | 223 | struct p54_cal_database *output_limit; |
7a047f4f | 224 | struct p54_cal_database *rssi_db; |
1a9b6679 | 225 | struct ieee80211_supported_band *band_table[IEEE80211_NUM_BANDS]; |
cf3a9579 CL |
226 | |
227 | /* BBP/MAC state */ | |
228 | u8 mac_addr[ETH_ALEN]; | |
229 | u8 bssid[ETH_ALEN]; | |
be8d98ea | 230 | u8 mc_maclist[4][ETH_ALEN]; |
cf3a9579 | 231 | u16 wakeup_timer; |
78d57eb2 | 232 | unsigned int filter_flags; |
be8d98ea | 233 | int mc_maclist_num; |
cf3a9579 CL |
234 | int mode; |
235 | u32 tsf_low32, tsf_high32; | |
881d948c | 236 | u32 basic_rate_mask; |
ced09574 | 237 | u16 aid; |
3083e83c | 238 | u8 coverage_class; |
0d78156e CL |
239 | bool phy_idle; |
240 | bool phy_ps; | |
e0f114e8 | 241 | bool powersave_override; |
d8c92107 | 242 | __le32 beacon_req_id; |
46df10ae | 243 | struct completion beacon_comp; |
cf3a9579 CL |
244 | |
245 | /* cryptographic engine information */ | |
25900ef0 CL |
246 | u8 privacy_caps; |
247 | u8 rx_keycache_size; | |
6dfe9a88 | 248 | unsigned long *used_rxkeys; |
cf3a9579 | 249 | |
d0b45aef | 250 | /* LED management */ |
83f8b478 | 251 | #ifdef CONFIG_P54_LEDS |
dce07258 CL |
252 | struct p54_led_dev leds[4]; |
253 | struct delayed_work led_work; | |
83f8b478 | 254 | #endif /* CONFIG_P54_LEDS */ |
d0b45aef | 255 | u16 softled_state; /* bit field of glowing LEDs */ |
cf3a9579 CL |
256 | |
257 | /* statistics */ | |
258 | struct ieee80211_low_level_stats stats; | |
259 | struct delayed_work work; | |
260 | ||
261 | /* eeprom handling */ | |
262 | void *eeprom; | |
263 | struct completion eeprom_comp; | |
d8c92107 | 264 | struct mutex eeprom_mutex; |
eff1a59c MW |
265 | }; |
266 | ||
d8c92107 | 267 | /* interfaces for the drivers */ |
eff1a59c | 268 | int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb); |
b92f30d6 | 269 | void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb); |
4e416a6f | 270 | int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw); |
cd8d3d32 | 271 | int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len); |
7cb77072 | 272 | int p54_read_eeprom(struct ieee80211_hw *dev); |
d8c92107 | 273 | |
eff1a59c | 274 | struct ieee80211_hw *p54_init_common(size_t priv_data_len); |
2ac71072 | 275 | int p54_register_common(struct ieee80211_hw *dev, struct device *pdev); |
eff1a59c MW |
276 | void p54_free_common(struct ieee80211_hw *dev); |
277 | ||
d8c92107 CL |
278 | void p54_unregister_common(struct ieee80211_hw *dev); |
279 | ||
32ddf071 | 280 | #endif /* P54_H */ |