[mirror_ubuntu-zesty-kernel.git] / drivers / net / wireless / p54 / p54.h

/*
 * Shared defines for all mac80211 Prism54 code
 *
 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
 *
 * Based on the islsm (softmac prism54) driver, which is:
 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef P54_H
#define P54_H

#ifdef CONFIG_P54_LEDS
#include <linux/leds.h>
#endif /* CONFIG_P54_LEDS */

#define ISL38XX_DEV_FIRMWARE_ADDR 0x20000

#define BR_CODE_MIN			0x80000000
#define BR_CODE_COMPONENT_ID		0x80000001
#define BR_CODE_COMPONENT_VERSION	0x80000002
#define BR_CODE_DEPENDENT_IF		0x80000003
#define BR_CODE_EXPOSED_IF		0x80000004
#define BR_CODE_DESCR			0x80000101
#define BR_CODE_MAX			0x8FFFFFFF
#define BR_CODE_END_OF_BRA		0xFF0000FF
#define LEGACY_BR_CODE_END_OF_BRA	0xFFFFFFFF

struct bootrec {
	__le32 code;
	__le32 len;
	u32 data[10];
} __packed;

/* Interface role definitions */
#define BR_INTERFACE_ROLE_SERVER	0x0000
#define BR_INTERFACE_ROLE_CLIENT	0x8000

#define BR_DESC_PRIV_CAP_WEP		BIT(0)
#define BR_DESC_PRIV_CAP_TKIP		BIT(1)
#define BR_DESC_PRIV_CAP_MICHAEL	BIT(2)
#define BR_DESC_PRIV_CAP_CCX_CP		BIT(3)
#define BR_DESC_PRIV_CAP_CCX_MIC	BIT(4)
#define BR_DESC_PRIV_CAP_AESCCMP	BIT(5)

struct bootrec_desc {
	__le16 modes;
	__le16 flags;
	__le32 rx_start;
	__le32 rx_end;
	u8 headroom;
	u8 tailroom;
	u8 tx_queues;
	u8 tx_depth;
	u8 privacy_caps;
	u8 rx_keycache_size;
	u8 time_size;
	u8 padding;
	u8 rates[16];
	u8 padding2[4];
	__le16 rx_mtu;
} __packed;

#define FW_FMAC 0x464d4143
#define FW_LM86 0x4c4d3836
#define FW_LM87 0x4c4d3837
#define FW_LM20 0x4c4d3230

struct bootrec_comp_id {
	__le32 fw_variant;
} __packed;

struct bootrec_comp_ver {
	char fw_version[24];
} __packed;

struct bootrec_end {
	__le16 crc;
	u8 padding[2];
	u8 md5[16];
} __packed;

/* provide 16 bytes for the transport back-end */
#define P54_TX_INFO_DATA_SIZE		16

/* stored in ieee80211_tx_info's rate_driver_data */
struct p54_tx_info {
	u32 start_addr;
	u32 end_addr;
	union {
		void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)];
		struct {
			u32 extra_len;
		};
	};
};

#define P54_MAX_CTRL_FRAME_LEN		0x1000

#define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop)	\
do {								\
	queue.aifs = cpu_to_le16(ai_fs);			\
	queue.cwmin = cpu_to_le16(cw_min);			\
	queue.cwmax = cpu_to_le16(cw_max);			\
	queue.txop = cpu_to_le16(_txop);			\
} while (0)

struct p54_edcf_queue_param {
	__le16 aifs;
	__le16 cwmin;
	__le16 cwmax;
	__le16 txop;
} __packed;

struct p54_rssi_db_entry {
	u16 freq;
	s16 mul;
	s16 add;
	s16 longbow_unkn;
	s16 longbow_unk2;
};

struct p54_cal_database {
	size_t entries;
	size_t entry_size;
	size_t offset;
	size_t len;
	u8 data[0];
};

#define EEPROM_READBACK_LEN 0x3fc

enum fw_state {
	FW_STATE_OFF,
	FW_STATE_BOOTING,
	FW_STATE_READY,
	FW_STATE_RESET,
	FW_STATE_RESETTING,
};

#ifdef CONFIG_P54_LEDS

#define P54_LED_MAX_NAME_LEN 31

struct p54_led_dev {
	struct ieee80211_hw *hw_dev;
	struct led_classdev led_dev;
	char name[P54_LED_MAX_NAME_LEN + 1];

	unsigned int toggled;
	unsigned int index;
	unsigned int registered;
};

#endif /* CONFIG_P54_LEDS */

struct p54_tx_queue_stats {
	unsigned int len;
	unsigned int limit;
	unsigned int count;
};

struct p54_common {
	struct ieee80211_hw *hw;
	struct ieee80211_vif *vif;
	void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb);
	int (*open)(struct ieee80211_hw *dev);
	void (*stop)(struct ieee80211_hw *dev);
	struct sk_buff_head tx_pending;
	struct sk_buff_head tx_queue;
	struct mutex conf_mutex;
	bool registered;

	/* memory management (as seen by the firmware) */
	u32 rx_start;
	u32 rx_end;
	u16 rx_mtu;
	u8 headroom;
	u8 tailroom;

	/* firmware/hardware info */
	unsigned int tx_hdr_len;
	unsigned int fw_var;
	unsigned int fw_interface;
	u8 version;

	/* (e)DCF / QOS state */
	bool use_short_slot;
	spinlock_t tx_stats_lock;
	struct p54_tx_queue_stats tx_stats[8];
	struct p54_edcf_queue_param qos_params[8];

	/* Radio data */
	u16 rxhw;
	u8 rx_diversity_mask;
	u8 tx_diversity_mask;
	unsigned int output_power;
	struct p54_rssi_db_entry *cur_rssi;
	struct ieee80211_channel *curchan;
	struct survey_info *survey;
	unsigned int chan_num;
	struct completion stat_comp;
	bool update_stats;
	struct {
		unsigned int timestamp;
		unsigned int cached_cca;
		unsigned int cached_tx;
		unsigned int cached_rssi;
		u64 active;
		u64 cca;
		u64 tx;
		u64 rssi;
	} survey_raw;

	int noise;
	/* calibration, output power limit and rssi<->dBm conversation data */
	struct pda_iq_autocal_entry *iq_autocal;
	unsigned int iq_autocal_len;
	struct p54_cal_database *curve_data;
	struct p54_cal_database *output_limit;
	struct p54_cal_database *rssi_db;
	struct ieee80211_supported_band *band_table[IEEE80211_NUM_BANDS];

	/* BBP/MAC state */
	u8 mac_addr[ETH_ALEN];
	u8 bssid[ETH_ALEN];
	u8 mc_maclist[4][ETH_ALEN];
	u16 wakeup_timer;
	unsigned int filter_flags;
	int mc_maclist_num;
	int mode;
	u32 tsf_low32, tsf_high32;
	u32 basic_rate_mask;
	u16 aid;
	u8 coverage_class;
	bool phy_idle;
	bool phy_ps;
	bool powersave_override;
	__le32 beacon_req_id;
	struct completion beacon_comp;

	/* cryptographic engine information */
	u8 privacy_caps;
	u8 rx_keycache_size;
	unsigned long *used_rxkeys;

	/* LED management */
#ifdef CONFIG_P54_LEDS
	struct p54_led_dev leds[4];
	struct delayed_work led_work;
#endif /* CONFIG_P54_LEDS */
	u16 softled_state;		/* bit field of glowing LEDs */

	/* statistics */
	struct ieee80211_low_level_stats stats;
	struct delayed_work work;

	/* eeprom handling */
	void *eeprom;
	struct completion eeprom_comp;
	struct mutex eeprom_mutex;
};

/* interfaces for the drivers */
int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb);
void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb);
int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw);
int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len);
int p54_read_eeprom(struct ieee80211_hw *dev);

struct ieee80211_hw *p54_init_common(size_t priv_data_len);
int p54_register_common(struct ieee80211_hw *dev, struct device *pdev);
void p54_free_common(struct ieee80211_hw *dev);

void p54_unregister_common(struct ieee80211_hw *dev);

#endif /* P54_H */
Commit	Line	Data
eff1a59c MW	1	/*
	2	* Shared defines for all mac80211 Prism54 code
	3	*
	4	* Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
	5	*
	6	* Based on the islsm (softmac prism54) driver, which is:
	7	* Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
d8c92107 CL	14	#ifndef P54_H
	15	#define P54_H
	16
54082819	17	#ifdef CONFIG_P54_LEDS
d0b45aef	18	#include <linux/leds.h>
54082819	19	#endif /* CONFIG_P54_LEDS */
d0b45aef	20
d8c92107 CL	21	#define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
	22
	23	#define BR_CODE_MIN 0x80000000
	24	#define BR_CODE_COMPONENT_ID 0x80000001
	25	#define BR_CODE_COMPONENT_VERSION 0x80000002
	26	#define BR_CODE_DEPENDENT_IF 0x80000003
	27	#define BR_CODE_EXPOSED_IF 0x80000004
	28	#define BR_CODE_DESCR 0x80000101
	29	#define BR_CODE_MAX 0x8FFFFFFF
	30	#define BR_CODE_END_OF_BRA 0xFF0000FF
	31	#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
	32
	33	struct bootrec {
	34	__le32 code;
	35	__le32 len;
	36	u32 data[10];
	37	} __packed;
	38
	39	/* Interface role definitions */
	40	#define BR_INTERFACE_ROLE_SERVER 0x0000
	41	#define BR_INTERFACE_ROLE_CLIENT 0x8000
	42
	43	#define BR_DESC_PRIV_CAP_WEP BIT(0)
	44	#define BR_DESC_PRIV_CAP_TKIP BIT(1)
	45	#define BR_DESC_PRIV_CAP_MICHAEL BIT(2)
	46	#define BR_DESC_PRIV_CAP_CCX_CP BIT(3)
	47	#define BR_DESC_PRIV_CAP_CCX_MIC BIT(4)
	48	#define BR_DESC_PRIV_CAP_AESCCMP BIT(5)
	49
	50	struct bootrec_desc {
	51	__le16 modes;
	52	__le16 flags;
	53	__le32 rx_start;
	54	__le32 rx_end;
	55	u8 headroom;
	56	u8 tailroom;
	57	u8 tx_queues;
	58	u8 tx_depth;
	59	u8 privacy_caps;
	60	u8 rx_keycache_size;
	61	u8 time_size;
	62	u8 padding;
	63	u8 rates[16];
	64	u8 padding2[4];
	65	__le16 rx_mtu;
	66	} __packed;
	67
	68	#define FW_FMAC 0x464d4143
	69	#define FW_LM86 0x4c4d3836
	70	#define FW_LM87 0x4c4d3837
	71	#define FW_LM20 0x4c4d3230
	72
	73	struct bootrec_comp_id {
	74	__le32 fw_variant;
	75	} __packed;
	76
	77	struct bootrec_comp_ver {
	78	char fw_version[24];
	79	} __packed;
	80
	81	struct bootrec_end {
	82	__le16 crc;
	83	u8 padding[2];
	84	u8 md5[16];
85	} __packed;
eff1a59c	86
3cd08b38 CL	87	/* provide 16 bytes for the transport back-end */
	88	#define P54_TX_INFO_DATA_SIZE 16
	89
	90	/* stored in ieee80211_tx_info's rate_driver_data */
	91	struct p54_tx_info {
	92	u32 start_addr;
	93	u32 end_addr;
d8c92107 CL	94	union {
	95	void data[P54_TX_INFO_DATA_SIZE / sizeof(void )];
	96	struct {
	97	u32 extra_len;
	98	};
	99	};
3cd08b38 CL	100	};
3cd08b38 CL	101
63f2dc9f CL	102	#define P54_MAX_CTRL_FRAME_LEN 0x1000
63f2dc9f CL	103
d8c92107 CL	104	#define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \
	105	do { \
	106	queue.aifs = cpu_to_le16(ai_fs); \
	107	queue.cwmin = cpu_to_le16(cw_min); \
	108	queue.cwmax = cpu_to_le16(cw_max); \
	109	queue.txop = cpu_to_le16(_txop); \
	110	} while (0)
0a5ec96a	111
0fdd7c5d CL	112	struct p54_edcf_queue_param {
	113	__le16 aifs;
	114	__le16 cwmin;
	115	__le16 cwmax;
	116	__le16 txop;
d8c92107	117	} __packed;
0fdd7c5d	118
7a047f4f CL	119	struct p54_rssi_db_entry {
7a047f4f CL	120	u16 freq;
69ba3e5d CL	121	s16 mul;
	122	s16 add;
	123	s16 longbow_unkn;
	124	s16 longbow_unk2;
	125	};
	126
83cf1b6e CL	127	struct p54_cal_database {
	128	size_t entries;
	129	size_t entry_size;
	130	size_t offset;
	131	size_t len;
	132	u8 data[0];
	133	};
	134
7cb77072	135	#define EEPROM_READBACK_LEN 0x3fc
eff1a59c	136
cd8d3d32 CL	137	enum fw_state {
	138	FW_STATE_OFF,
	139	FW_STATE_BOOTING,
	140	FW_STATE_READY,
	141	FW_STATE_RESET,
	142	FW_STATE_RESETTING,
	143	};
	144
54082819	145	#ifdef CONFIG_P54_LEDS
d0b45aef CL	146
	147	#define P54_LED_MAX_NAME_LEN 31
	148
	149	struct p54_led_dev {
	150	struct ieee80211_hw *hw_dev;
	151	struct led_classdev led_dev;
	152	char name[P54_LED_MAX_NAME_LEN + 1];
	153
dce07258	154	unsigned int toggled;
d0b45aef CL	155	unsigned int index;
	156	unsigned int registered;
	157	};
	158
54082819	159	#endif /* CONFIG_P54_LEDS */
d0b45aef	160
97e93fcd KV	161	struct p54_tx_queue_stats {
	162	unsigned int len;
	163	unsigned int limit;
	164	unsigned int count;
	165	};
	166
eff1a59c	167	struct p54_common {
54fdb040	168	struct ieee80211_hw *hw;
f13027af	169	struct ieee80211_vif *vif;
0a5ec96a	170	void (tx)(struct ieee80211_hw dev, struct sk_buff *skb);
eff1a59c MW	171	int (open)(struct ieee80211_hw dev);
eff1a59c MW	172	void (stop)(struct ieee80211_hw dev);
d8c92107	173	struct sk_buff_head tx_pending;
cf3a9579 CL	174	struct sk_buff_head tx_queue;
cf3a9579 CL	175	struct mutex conf_mutex;
a9b9361d	176	bool registered;
cf3a9579 CL	177
	178	/* memory management (as seen by the firmware) */
	179	u32 rx_start;
	180	u32 rx_end;
4e416a6f CL	181	u16 rx_mtu;
	182	u8 headroom;
	183	u8 tailroom;
cf3a9579 CL	184
	185	/* firmware/hardware info */
	186	unsigned int tx_hdr_len;
	187	unsigned int fw_var;
	188	unsigned int fw_interface;
	189	u8 version;
	190
	191	/* (e)DCF / QOS state */
	192	bool use_short_slot;
d8c92107	193	spinlock_t tx_stats_lock;
97e93fcd	194	struct p54_tx_queue_stats tx_stats[8];
cf3a9579 CL	195	struct p54_edcf_queue_param qos_params[8];
	196
	197	/* Radio data */
	198	u16 rxhw;
78eb7484 CL	199	u8 rx_diversity_mask;
78eb7484 CL	200	u8 tx_diversity_mask;
cf3a9579	201	unsigned int output_power;
7a047f4f	202	struct p54_rssi_db_entry *cur_rssi;
0d78156e CL	203	struct ieee80211_channel *curchan;
	204	struct survey_info *survey;
	205	unsigned int chan_num;
	206	struct completion stat_comp;
	207	bool update_stats;
	208	struct {
	209	unsigned int timestamp;
	210	unsigned int cached_cca;
	211	unsigned int cached_tx;
	212	unsigned int cached_rssi;
	213	u64 active;
	214	u64 cca;
	215	u64 tx;
	216	u64 rssi;
	217	} survey_raw;
	218
cf3a9579 CL	219	int noise;
cf3a9579 CL	220	/* calibration, output power limit and rssi<->dBm conversation data */
eff1a59c MW	221	struct pda_iq_autocal_entry *iq_autocal;
eff1a59c MW	222	unsigned int iq_autocal_len;
83cf1b6e	223	struct p54_cal_database *curve_data;
cf3a9579	224	struct p54_cal_database *output_limit;
7a047f4f	225	struct p54_cal_database *rssi_db;
1a9b6679	226	struct ieee80211_supported_band *band_table[IEEE80211_NUM_BANDS];
cf3a9579 CL	227
	228	/* BBP/MAC state */
	229	u8 mac_addr[ETH_ALEN];
	230	u8 bssid[ETH_ALEN];
be8d98ea	231	u8 mc_maclist[4][ETH_ALEN];
cf3a9579	232	u16 wakeup_timer;
78d57eb2	233	unsigned int filter_flags;
be8d98ea	234	int mc_maclist_num;
cf3a9579 CL	235	int mode;
cf3a9579 CL	236	u32 tsf_low32, tsf_high32;
881d948c	237	u32 basic_rate_mask;
ced09574	238	u16 aid;
3083e83c	239	u8 coverage_class;
0d78156e CL	240	bool phy_idle;
0d78156e CL	241	bool phy_ps;
e0f114e8	242	bool powersave_override;
d8c92107	243	__le32 beacon_req_id;
46df10ae	244	struct completion beacon_comp;
cf3a9579 CL	245
cf3a9579 CL	246	/* cryptographic engine information */
25900ef0 CL	247	u8 privacy_caps;
25900ef0 CL	248	u8 rx_keycache_size;
6dfe9a88	249	unsigned long *used_rxkeys;
cf3a9579	250
d0b45aef	251	/* LED management */
83f8b478	252	#ifdef CONFIG_P54_LEDS
dce07258 CL	253	struct p54_led_dev leds[4];
dce07258 CL	254	struct delayed_work led_work;
83f8b478	255	#endif /* CONFIG_P54_LEDS */
d0b45aef	256	u16 softled_state; /* bit field of glowing LEDs */
cf3a9579 CL	257
	258	/* statistics */
	259	struct ieee80211_low_level_stats stats;
	260	struct delayed_work work;
	261
	262	/* eeprom handling */
	263	void *eeprom;
	264	struct completion eeprom_comp;
d8c92107	265	struct mutex eeprom_mutex;
eff1a59c MW	266	};
eff1a59c MW	267
d8c92107	268	/* interfaces for the drivers */
eff1a59c	269	int p54_rx(struct ieee80211_hw dev, struct sk_buff skb);
b92f30d6	270	void p54_free_skb(struct ieee80211_hw dev, struct sk_buff skb);
4e416a6f	271	int p54_parse_firmware(struct ieee80211_hw dev, const struct firmware fw);
cd8d3d32	272	int p54_parse_eeprom(struct ieee80211_hw dev, void eeprom, int len);
7cb77072	273	int p54_read_eeprom(struct ieee80211_hw *dev);
d8c92107	274
eff1a59c	275	struct ieee80211_hw *p54_init_common(size_t priv_data_len);
2ac71072	276	int p54_register_common(struct ieee80211_hw dev, struct device pdev);
eff1a59c MW	277	void p54_free_common(struct ieee80211_hw *dev);
eff1a59c MW	278
d8c92107 CL	279	void p54_unregister_common(struct ieee80211_hw *dev);
d8c92107 CL	280
32ddf071	281	#endif /* P54_H */