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Commit | Line | Data |
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eff1a59c MW |
1 | |
2 | /* | |
3 | * Common code for mac80211 Prism54 drivers | |
4 | * | |
5 | * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net> | |
6 | * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de> | |
7 | * | |
8 | * Based on the islsm (softmac prism54) driver, which is: | |
9 | * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
16 | #include <linux/init.h> | |
17 | #include <linux/firmware.h> | |
18 | #include <linux/etherdevice.h> | |
19 | ||
20 | #include <net/mac80211.h> | |
21 | ||
22 | #include "p54.h" | |
23 | #include "p54common.h" | |
24 | ||
25 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); | |
26 | MODULE_DESCRIPTION("Softmac Prism54 common code"); | |
27 | MODULE_LICENSE("GPL"); | |
28 | MODULE_ALIAS("prism54common"); | |
29 | ||
8318d78a JB |
30 | static struct ieee80211_rate p54_rates[] = { |
31 | { .bitrate = 10, .hw_value = 0, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | |
32 | { .bitrate = 20, .hw_value = 1, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | |
33 | { .bitrate = 55, .hw_value = 2, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | |
34 | { .bitrate = 110, .hw_value = 3, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | |
35 | { .bitrate = 60, .hw_value = 4, }, | |
36 | { .bitrate = 90, .hw_value = 5, }, | |
37 | { .bitrate = 120, .hw_value = 6, }, | |
38 | { .bitrate = 180, .hw_value = 7, }, | |
39 | { .bitrate = 240, .hw_value = 8, }, | |
40 | { .bitrate = 360, .hw_value = 9, }, | |
41 | { .bitrate = 480, .hw_value = 10, }, | |
42 | { .bitrate = 540, .hw_value = 11, }, | |
43 | }; | |
44 | ||
45 | static struct ieee80211_channel p54_channels[] = { | |
46 | { .center_freq = 2412, .hw_value = 1, }, | |
47 | { .center_freq = 2417, .hw_value = 2, }, | |
48 | { .center_freq = 2422, .hw_value = 3, }, | |
49 | { .center_freq = 2427, .hw_value = 4, }, | |
50 | { .center_freq = 2432, .hw_value = 5, }, | |
51 | { .center_freq = 2437, .hw_value = 6, }, | |
52 | { .center_freq = 2442, .hw_value = 7, }, | |
53 | { .center_freq = 2447, .hw_value = 8, }, | |
54 | { .center_freq = 2452, .hw_value = 9, }, | |
55 | { .center_freq = 2457, .hw_value = 10, }, | |
56 | { .center_freq = 2462, .hw_value = 11, }, | |
57 | { .center_freq = 2467, .hw_value = 12, }, | |
58 | { .center_freq = 2472, .hw_value = 13, }, | |
59 | { .center_freq = 2484, .hw_value = 14, }, | |
60 | }; | |
61 | ||
c2976ab0 | 62 | static struct ieee80211_supported_band band_2GHz = { |
8318d78a JB |
63 | .channels = p54_channels, |
64 | .n_channels = ARRAY_SIZE(p54_channels), | |
65 | .bitrates = p54_rates, | |
66 | .n_bitrates = ARRAY_SIZE(p54_rates), | |
67 | }; | |
68 | ||
69 | ||
eff1a59c MW |
70 | void p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw) |
71 | { | |
72 | struct p54_common *priv = dev->priv; | |
73 | struct bootrec_exp_if *exp_if; | |
74 | struct bootrec *bootrec; | |
75 | u32 *data = (u32 *)fw->data; | |
76 | u32 *end_data = (u32 *)fw->data + (fw->size >> 2); | |
77 | u8 *fw_version = NULL; | |
78 | size_t len; | |
79 | int i; | |
80 | ||
81 | if (priv->rx_start) | |
82 | return; | |
83 | ||
84 | while (data < end_data && *data) | |
85 | data++; | |
86 | ||
87 | while (data < end_data && !*data) | |
88 | data++; | |
89 | ||
90 | bootrec = (struct bootrec *) data; | |
91 | ||
92 | while (bootrec->data <= end_data && | |
93 | (bootrec->data + (len = le32_to_cpu(bootrec->len))) <= end_data) { | |
94 | u32 code = le32_to_cpu(bootrec->code); | |
95 | switch (code) { | |
96 | case BR_CODE_COMPONENT_ID: | |
dc73c623 | 97 | switch (be32_to_cpu(*(__be32 *)bootrec->data)) { |
eff1a59c MW |
98 | case FW_FMAC: |
99 | printk(KERN_INFO "p54: FreeMAC firmware\n"); | |
100 | break; | |
101 | case FW_LM20: | |
102 | printk(KERN_INFO "p54: LM20 firmware\n"); | |
103 | break; | |
104 | case FW_LM86: | |
105 | printk(KERN_INFO "p54: LM86 firmware\n"); | |
106 | break; | |
107 | case FW_LM87: | |
108 | printk(KERN_INFO "p54: LM87 firmware - not supported yet!\n"); | |
109 | break; | |
110 | default: | |
111 | printk(KERN_INFO "p54: unknown firmware\n"); | |
112 | break; | |
113 | } | |
114 | break; | |
115 | case BR_CODE_COMPONENT_VERSION: | |
116 | /* 24 bytes should be enough for all firmwares */ | |
117 | if (strnlen((unsigned char*)bootrec->data, 24) < 24) | |
118 | fw_version = (unsigned char*)bootrec->data; | |
119 | break; | |
120 | case BR_CODE_DESCR: | |
dc73c623 | 121 | priv->rx_start = le32_to_cpu(((__le32 *)bootrec->data)[1]); |
eff1a59c | 122 | /* FIXME add sanity checking */ |
dc73c623 | 123 | priv->rx_end = le32_to_cpu(((__le32 *)bootrec->data)[2]) - 0x3500; |
eff1a59c MW |
124 | break; |
125 | case BR_CODE_EXPOSED_IF: | |
126 | exp_if = (struct bootrec_exp_if *) bootrec->data; | |
127 | for (i = 0; i < (len * sizeof(*exp_if) / 4); i++) | |
dc73c623 | 128 | if (exp_if[i].if_id == cpu_to_le16(0x1a)) |
eff1a59c MW |
129 | priv->fw_var = le16_to_cpu(exp_if[i].variant); |
130 | break; | |
131 | case BR_CODE_DEPENDENT_IF: | |
132 | break; | |
133 | case BR_CODE_END_OF_BRA: | |
134 | case LEGACY_BR_CODE_END_OF_BRA: | |
135 | end_data = NULL; | |
136 | break; | |
137 | default: | |
138 | break; | |
139 | } | |
140 | bootrec = (struct bootrec *)&bootrec->data[len]; | |
141 | } | |
142 | ||
143 | if (fw_version) | |
144 | printk(KERN_INFO "p54: FW rev %s - Softmac protocol %x.%x\n", | |
145 | fw_version, priv->fw_var >> 8, priv->fw_var & 0xff); | |
146 | ||
147 | if (priv->fw_var >= 0x300) { | |
148 | /* Firmware supports QoS, use it! */ | |
84df3ed3 C |
149 | priv->tx_stats[4].limit = 3; |
150 | priv->tx_stats[5].limit = 4; | |
151 | priv->tx_stats[6].limit = 3; | |
152 | priv->tx_stats[7].limit = 1; | |
eff1a59c MW |
153 | dev->queues = 4; |
154 | } | |
155 | } | |
156 | EXPORT_SYMBOL_GPL(p54_parse_firmware); | |
157 | ||
154e3af1 CL |
158 | static int p54_convert_rev0(struct ieee80211_hw *dev, |
159 | struct pda_pa_curve_data *curve_data) | |
eff1a59c MW |
160 | { |
161 | struct p54_common *priv = dev->priv; | |
154e3af1 CL |
162 | struct p54_pa_curve_data_sample *dst; |
163 | struct pda_pa_curve_data_sample_rev0 *src; | |
eff1a59c | 164 | size_t cd_len = sizeof(*curve_data) + |
154e3af1 | 165 | (curve_data->points_per_channel*sizeof(*dst) + 2) * |
eff1a59c MW |
166 | curve_data->channels; |
167 | unsigned int i, j; | |
168 | void *source, *target; | |
169 | ||
170 | priv->curve_data = kmalloc(cd_len, GFP_KERNEL); | |
171 | if (!priv->curve_data) | |
172 | return -ENOMEM; | |
173 | ||
174 | memcpy(priv->curve_data, curve_data, sizeof(*curve_data)); | |
175 | source = curve_data->data; | |
176 | target = priv->curve_data->data; | |
177 | for (i = 0; i < curve_data->channels; i++) { | |
178 | __le16 *freq = source; | |
179 | source += sizeof(__le16); | |
180 | *((__le16 *)target) = *freq; | |
181 | target += sizeof(__le16); | |
182 | for (j = 0; j < curve_data->points_per_channel; j++) { | |
154e3af1 CL |
183 | dst = target; |
184 | src = source; | |
eff1a59c | 185 | |
154e3af1 CL |
186 | dst->rf_power = src->rf_power; |
187 | dst->pa_detector = src->pa_detector; | |
188 | dst->data_64qam = src->pcv; | |
eff1a59c MW |
189 | /* "invent" the points for the other modulations */ |
190 | #define SUB(x,y) (u8)((x) - (y)) > (x) ? 0 : (x) - (y) | |
154e3af1 CL |
191 | dst->data_16qam = SUB(src->pcv, 12); |
192 | dst->data_qpsk = SUB(dst->data_16qam, 12); | |
193 | dst->data_bpsk = SUB(dst->data_qpsk, 12); | |
194 | dst->data_barker = SUB(dst->data_bpsk, 14); | |
eff1a59c | 195 | #undef SUB |
154e3af1 CL |
196 | target += sizeof(*dst); |
197 | source += sizeof(*src); | |
eff1a59c MW |
198 | } |
199 | } | |
200 | ||
201 | return 0; | |
202 | } | |
203 | ||
154e3af1 CL |
204 | static int p54_convert_rev1(struct ieee80211_hw *dev, |
205 | struct pda_pa_curve_data *curve_data) | |
206 | { | |
207 | struct p54_common *priv = dev->priv; | |
208 | struct p54_pa_curve_data_sample *dst; | |
209 | struct pda_pa_curve_data_sample_rev1 *src; | |
210 | size_t cd_len = sizeof(*curve_data) + | |
211 | (curve_data->points_per_channel*sizeof(*dst) + 2) * | |
212 | curve_data->channels; | |
213 | unsigned int i, j; | |
214 | void *source, *target; | |
215 | ||
216 | priv->curve_data = kmalloc(cd_len, GFP_KERNEL); | |
217 | if (!priv->curve_data) | |
218 | return -ENOMEM; | |
219 | ||
220 | memcpy(priv->curve_data, curve_data, sizeof(*curve_data)); | |
221 | source = curve_data->data; | |
222 | target = priv->curve_data->data; | |
223 | for (i = 0; i < curve_data->channels; i++) { | |
224 | __le16 *freq = source; | |
225 | source += sizeof(__le16); | |
226 | *((__le16 *)target) = *freq; | |
227 | target += sizeof(__le16); | |
228 | for (j = 0; j < curve_data->points_per_channel; j++) { | |
229 | memcpy(target, source, sizeof(*src)); | |
230 | ||
231 | target += sizeof(*dst); | |
232 | source += sizeof(*src); | |
233 | } | |
234 | source++; | |
235 | } | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
eff1a59c MW |
240 | int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len) |
241 | { | |
242 | struct p54_common *priv = dev->priv; | |
243 | struct eeprom_pda_wrap *wrap = NULL; | |
244 | struct pda_entry *entry; | |
eff1a59c MW |
245 | unsigned int data_len, entry_len; |
246 | void *tmp; | |
247 | int err; | |
c2f2d3a0 | 248 | u8 *end = (u8 *)eeprom + len; |
eff1a59c MW |
249 | |
250 | wrap = (struct eeprom_pda_wrap *) eeprom; | |
8c28293f | 251 | entry = (void *)wrap->data + le16_to_cpu(wrap->len); |
c2f2d3a0 JB |
252 | |
253 | /* verify that at least the entry length/code fits */ | |
254 | while ((u8 *)entry <= end - sizeof(*entry)) { | |
eff1a59c MW |
255 | entry_len = le16_to_cpu(entry->len); |
256 | data_len = ((entry_len - 1) << 1); | |
c2f2d3a0 JB |
257 | |
258 | /* abort if entry exceeds whole structure */ | |
259 | if ((u8 *)entry + sizeof(*entry) + data_len > end) | |
260 | break; | |
261 | ||
eff1a59c MW |
262 | switch (le16_to_cpu(entry->code)) { |
263 | case PDR_MAC_ADDRESS: | |
264 | SET_IEEE80211_PERM_ADDR(dev, entry->data); | |
265 | break; | |
266 | case PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS: | |
267 | if (data_len < 2) { | |
268 | err = -EINVAL; | |
269 | goto err; | |
270 | } | |
271 | ||
272 | if (2 + entry->data[1]*sizeof(*priv->output_limit) > data_len) { | |
273 | err = -EINVAL; | |
274 | goto err; | |
275 | } | |
276 | ||
277 | priv->output_limit = kmalloc(entry->data[1] * | |
278 | sizeof(*priv->output_limit), GFP_KERNEL); | |
279 | ||
280 | if (!priv->output_limit) { | |
281 | err = -ENOMEM; | |
282 | goto err; | |
283 | } | |
284 | ||
285 | memcpy(priv->output_limit, &entry->data[2], | |
286 | entry->data[1]*sizeof(*priv->output_limit)); | |
287 | priv->output_limit_len = entry->data[1]; | |
288 | break; | |
154e3af1 CL |
289 | case PDR_PRISM_PA_CAL_CURVE_DATA: { |
290 | struct pda_pa_curve_data *curve_data = | |
291 | (struct pda_pa_curve_data *)entry->data; | |
292 | if (data_len < sizeof(*curve_data)) { | |
eff1a59c MW |
293 | err = -EINVAL; |
294 | goto err; | |
295 | } | |
296 | ||
154e3af1 CL |
297 | switch (curve_data->cal_method_rev) { |
298 | case 0: | |
299 | err = p54_convert_rev0(dev, curve_data); | |
300 | break; | |
301 | case 1: | |
302 | err = p54_convert_rev1(dev, curve_data); | |
303 | break; | |
304 | default: | |
305 | printk(KERN_ERR "p54: unknown curve data " | |
306 | "revision %d\n", | |
307 | curve_data->cal_method_rev); | |
308 | err = -ENODEV; | |
309 | break; | |
eff1a59c | 310 | } |
154e3af1 CL |
311 | if (err) |
312 | goto err; | |
eff1a59c | 313 | |
154e3af1 | 314 | } |
eff1a59c MW |
315 | case PDR_PRISM_ZIF_TX_IQ_CALIBRATION: |
316 | priv->iq_autocal = kmalloc(data_len, GFP_KERNEL); | |
317 | if (!priv->iq_autocal) { | |
318 | err = -ENOMEM; | |
319 | goto err; | |
320 | } | |
321 | ||
322 | memcpy(priv->iq_autocal, entry->data, data_len); | |
323 | priv->iq_autocal_len = data_len / sizeof(struct pda_iq_autocal_entry); | |
324 | break; | |
325 | case PDR_INTERFACE_LIST: | |
326 | tmp = entry->data; | |
327 | while ((u8 *)tmp < entry->data + data_len) { | |
328 | struct bootrec_exp_if *exp_if = tmp; | |
329 | if (le16_to_cpu(exp_if->if_id) == 0xF) | |
330 | priv->rxhw = exp_if->variant & cpu_to_le16(0x07); | |
331 | tmp += sizeof(struct bootrec_exp_if); | |
332 | } | |
333 | break; | |
334 | case PDR_HARDWARE_PLATFORM_COMPONENT_ID: | |
335 | priv->version = *(u8 *)(entry->data + 1); | |
336 | break; | |
337 | case PDR_END: | |
c2f2d3a0 JB |
338 | /* make it overrun */ |
339 | entry_len = len; | |
eff1a59c | 340 | break; |
58e30739 FF |
341 | default: |
342 | printk(KERN_INFO "p54: unknown eeprom code : 0x%x\n", | |
343 | le16_to_cpu(entry->code)); | |
344 | break; | |
eff1a59c MW |
345 | } |
346 | ||
347 | entry = (void *)entry + (entry_len + 1)*2; | |
eff1a59c MW |
348 | } |
349 | ||
350 | if (!priv->iq_autocal || !priv->output_limit || !priv->curve_data) { | |
351 | printk(KERN_ERR "p54: not all required entries found in eeprom!\n"); | |
352 | err = -EINVAL; | |
353 | goto err; | |
354 | } | |
355 | ||
356 | return 0; | |
357 | ||
358 | err: | |
359 | if (priv->iq_autocal) { | |
360 | kfree(priv->iq_autocal); | |
361 | priv->iq_autocal = NULL; | |
362 | } | |
363 | ||
364 | if (priv->output_limit) { | |
365 | kfree(priv->output_limit); | |
366 | priv->output_limit = NULL; | |
367 | } | |
368 | ||
369 | if (priv->curve_data) { | |
370 | kfree(priv->curve_data); | |
371 | priv->curve_data = NULL; | |
372 | } | |
373 | ||
374 | printk(KERN_ERR "p54: eeprom parse failed!\n"); | |
375 | return err; | |
376 | } | |
377 | EXPORT_SYMBOL_GPL(p54_parse_eeprom); | |
378 | ||
379 | void p54_fill_eeprom_readback(struct p54_control_hdr *hdr) | |
380 | { | |
381 | struct p54_eeprom_lm86 *eeprom_hdr; | |
382 | ||
383 | hdr->magic1 = cpu_to_le16(0x8000); | |
384 | hdr->len = cpu_to_le16(sizeof(*eeprom_hdr) + 0x2000); | |
385 | hdr->type = cpu_to_le16(P54_CONTROL_TYPE_EEPROM_READBACK); | |
386 | hdr->retry1 = hdr->retry2 = 0; | |
387 | eeprom_hdr = (struct p54_eeprom_lm86 *) hdr->data; | |
388 | eeprom_hdr->offset = 0x0; | |
389 | eeprom_hdr->len = cpu_to_le16(0x2000); | |
390 | } | |
391 | EXPORT_SYMBOL_GPL(p54_fill_eeprom_readback); | |
392 | ||
393 | static void p54_rx_data(struct ieee80211_hw *dev, struct sk_buff *skb) | |
394 | { | |
395 | struct p54_rx_hdr *hdr = (struct p54_rx_hdr *) skb->data; | |
396 | struct ieee80211_rx_status rx_status = {0}; | |
397 | u16 freq = le16_to_cpu(hdr->freq); | |
398 | ||
566bfe5a | 399 | rx_status.signal = hdr->rssi; |
8318d78a | 400 | /* XX correct? */ |
18d72605 | 401 | rx_status.qual = (100 * hdr->rssi) / 127; |
8318d78a | 402 | rx_status.rate_idx = hdr->rate & 0xf; |
eff1a59c | 403 | rx_status.freq = freq; |
8318d78a | 404 | rx_status.band = IEEE80211_BAND_2GHZ; |
eff1a59c MW |
405 | rx_status.antenna = hdr->antenna; |
406 | rx_status.mactime = le64_to_cpu(hdr->timestamp); | |
03bffc13 | 407 | rx_status.flag |= RX_FLAG_TSFT; |
eff1a59c MW |
408 | |
409 | skb_pull(skb, sizeof(*hdr)); | |
410 | skb_trim(skb, le16_to_cpu(hdr->len)); | |
411 | ||
412 | ieee80211_rx_irqsafe(dev, skb, &rx_status); | |
413 | } | |
414 | ||
415 | static void inline p54_wake_free_queues(struct ieee80211_hw *dev) | |
416 | { | |
417 | struct p54_common *priv = dev->priv; | |
418 | int i; | |
419 | ||
eff1a59c | 420 | for (i = 0; i < dev->queues; i++) |
84df3ed3 | 421 | if (priv->tx_stats[i + 4].len < priv->tx_stats[i + 4].limit) |
eff1a59c MW |
422 | ieee80211_wake_queue(dev, i); |
423 | } | |
424 | ||
425 | static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb) | |
426 | { | |
427 | struct p54_common *priv = dev->priv; | |
428 | struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data; | |
429 | struct p54_frame_sent_hdr *payload = (struct p54_frame_sent_hdr *) hdr->data; | |
430 | struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next; | |
431 | u32 addr = le32_to_cpu(hdr->req_id) - 0x70; | |
432 | struct memrecord *range = NULL; | |
433 | u32 freed = 0; | |
434 | u32 last_addr = priv->rx_start; | |
031d10ee | 435 | unsigned long flags; |
eff1a59c | 436 | |
031d10ee | 437 | spin_lock_irqsave(&priv->tx_queue.lock, flags); |
eff1a59c | 438 | while (entry != (struct sk_buff *)&priv->tx_queue) { |
552fe53f JB |
439 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry); |
440 | range = (void *)info->driver_data; | |
eff1a59c | 441 | if (range->start_addr == addr) { |
eff1a59c MW |
442 | struct p54_control_hdr *entry_hdr; |
443 | struct p54_tx_control_allocdata *entry_data; | |
444 | int pad = 0; | |
445 | ||
552fe53f JB |
446 | if (entry->next != (struct sk_buff *)&priv->tx_queue) { |
447 | struct ieee80211_tx_info *ni; | |
448 | struct memrecord *mr; | |
449 | ||
450 | ni = IEEE80211_SKB_CB(entry->next); | |
451 | mr = (struct memrecord *)ni->driver_data; | |
452 | freed = mr->start_addr - last_addr; | |
453 | } else | |
eff1a59c MW |
454 | freed = priv->rx_end - last_addr; |
455 | ||
456 | last_addr = range->end_addr; | |
457 | __skb_unlink(entry, &priv->tx_queue); | |
031d10ee C |
458 | spin_unlock_irqrestore(&priv->tx_queue.lock, flags); |
459 | ||
e039fa4a | 460 | memset(&info->status, 0, sizeof(info->status)); |
eff1a59c MW |
461 | entry_hdr = (struct p54_control_hdr *) entry->data; |
462 | entry_data = (struct p54_tx_control_allocdata *) entry_hdr->data; | |
463 | if ((entry_hdr->magic1 & cpu_to_le16(0x4000)) != 0) | |
464 | pad = entry_data->align[0]; | |
465 | ||
84df3ed3 | 466 | priv->tx_stats[entry_data->hw_queue].len--; |
e039fa4a | 467 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { |
eff1a59c | 468 | if (!(payload->status & 0x01)) |
e039fa4a | 469 | info->flags |= IEEE80211_TX_STAT_ACK; |
eff1a59c | 470 | else |
e039fa4a | 471 | info->status.excessive_retries = 1; |
eff1a59c | 472 | } |
e039fa4a JB |
473 | info->status.retry_count = payload->retries - 1; |
474 | info->status.ack_signal = le16_to_cpu(payload->ack_rssi); | |
eff1a59c | 475 | skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data)); |
e039fa4a | 476 | ieee80211_tx_status_irqsafe(dev, entry); |
031d10ee | 477 | goto out; |
eff1a59c MW |
478 | } else |
479 | last_addr = range->end_addr; | |
480 | entry = entry->next; | |
481 | } | |
031d10ee | 482 | spin_unlock_irqrestore(&priv->tx_queue.lock, flags); |
eff1a59c | 483 | |
031d10ee | 484 | out: |
eff1a59c MW |
485 | if (freed >= IEEE80211_MAX_RTS_THRESHOLD + 0x170 + |
486 | sizeof(struct p54_control_hdr)) | |
487 | p54_wake_free_queues(dev); | |
488 | } | |
489 | ||
490 | static void p54_rx_control(struct ieee80211_hw *dev, struct sk_buff *skb) | |
491 | { | |
492 | struct p54_control_hdr *hdr = (struct p54_control_hdr *) skb->data; | |
493 | ||
494 | switch (le16_to_cpu(hdr->type)) { | |
495 | case P54_CONTROL_TYPE_TXDONE: | |
496 | p54_rx_frame_sent(dev, skb); | |
497 | break; | |
498 | case P54_CONTROL_TYPE_BBP: | |
499 | break; | |
500 | default: | |
501 | printk(KERN_DEBUG "%s: not handling 0x%02x type control frame\n", | |
502 | wiphy_name(dev->wiphy), le16_to_cpu(hdr->type)); | |
503 | break; | |
504 | } | |
505 | } | |
506 | ||
507 | /* returns zero if skb can be reused */ | |
508 | int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb) | |
509 | { | |
510 | u8 type = le16_to_cpu(*((__le16 *)skb->data)) >> 8; | |
511 | switch (type) { | |
512 | case 0x00: | |
513 | case 0x01: | |
514 | p54_rx_data(dev, skb); | |
515 | return -1; | |
516 | case 0x4d: | |
517 | /* TODO: do something better... but then again, I've never seen this happen */ | |
518 | printk(KERN_ERR "%s: Received fault. Probably need to restart hardware now..\n", | |
519 | wiphy_name(dev->wiphy)); | |
520 | break; | |
521 | case 0x80: | |
522 | p54_rx_control(dev, skb); | |
523 | break; | |
524 | default: | |
525 | printk(KERN_ERR "%s: unknown frame RXed (0x%02x)\n", | |
526 | wiphy_name(dev->wiphy), type); | |
527 | break; | |
528 | } | |
529 | return 0; | |
530 | } | |
531 | EXPORT_SYMBOL_GPL(p54_rx); | |
532 | ||
533 | /* | |
534 | * So, the firmware is somewhat stupid and doesn't know what places in its | |
535 | * memory incoming data should go to. By poking around in the firmware, we | |
536 | * can find some unused memory to upload our packets to. However, data that we | |
537 | * want the card to TX needs to stay intact until the card has told us that | |
538 | * it is done with it. This function finds empty places we can upload to and | |
539 | * marks allocated areas as reserved if necessary. p54_rx_frame_sent frees | |
540 | * allocated areas. | |
541 | */ | |
542 | static void p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb, | |
e039fa4a | 543 | struct p54_control_hdr *data, u32 len) |
eff1a59c MW |
544 | { |
545 | struct p54_common *priv = dev->priv; | |
546 | struct sk_buff *entry = priv->tx_queue.next; | |
547 | struct sk_buff *target_skb = NULL; | |
eff1a59c MW |
548 | u32 last_addr = priv->rx_start; |
549 | u32 largest_hole = 0; | |
550 | u32 target_addr = priv->rx_start; | |
551 | unsigned long flags; | |
552 | unsigned int left; | |
553 | len = (len + 0x170 + 3) & ~0x3; /* 0x70 headroom, 0x100 tailroom */ | |
554 | ||
555 | spin_lock_irqsave(&priv->tx_queue.lock, flags); | |
556 | left = skb_queue_len(&priv->tx_queue); | |
557 | while (left--) { | |
558 | u32 hole_size; | |
e039fa4a JB |
559 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry); |
560 | struct memrecord *range = (void *)info->driver_data; | |
eff1a59c MW |
561 | hole_size = range->start_addr - last_addr; |
562 | if (!target_skb && hole_size >= len) { | |
563 | target_skb = entry->prev; | |
564 | hole_size -= len; | |
565 | target_addr = last_addr; | |
566 | } | |
567 | largest_hole = max(largest_hole, hole_size); | |
568 | last_addr = range->end_addr; | |
569 | entry = entry->next; | |
570 | } | |
571 | if (!target_skb && priv->rx_end - last_addr >= len) { | |
572 | target_skb = priv->tx_queue.prev; | |
573 | largest_hole = max(largest_hole, priv->rx_end - last_addr - len); | |
574 | if (!skb_queue_empty(&priv->tx_queue)) { | |
e039fa4a JB |
575 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(target_skb); |
576 | struct memrecord *range = (void *)info->driver_data; | |
eff1a59c MW |
577 | target_addr = range->end_addr; |
578 | } | |
579 | } else | |
580 | largest_hole = max(largest_hole, priv->rx_end - last_addr); | |
581 | ||
582 | if (skb) { | |
e039fa4a JB |
583 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
584 | struct memrecord *range = (void *)info->driver_data; | |
eff1a59c MW |
585 | range->start_addr = target_addr; |
586 | range->end_addr = target_addr + len; | |
eff1a59c MW |
587 | __skb_queue_after(&priv->tx_queue, target_skb, skb); |
588 | if (largest_hole < IEEE80211_MAX_RTS_THRESHOLD + 0x170 + | |
589 | sizeof(struct p54_control_hdr)) | |
590 | ieee80211_stop_queues(dev); | |
591 | } | |
592 | spin_unlock_irqrestore(&priv->tx_queue.lock, flags); | |
593 | ||
594 | data->req_id = cpu_to_le32(target_addr + 0x70); | |
595 | } | |
596 | ||
e039fa4a | 597 | static int p54_tx(struct ieee80211_hw *dev, struct sk_buff *skb) |
eff1a59c | 598 | { |
e039fa4a | 599 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
57ffc589 | 600 | struct ieee80211_tx_queue_stats *current_queue; |
eff1a59c MW |
601 | struct p54_common *priv = dev->priv; |
602 | struct p54_control_hdr *hdr; | |
eda0c003 | 603 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; |
eff1a59c | 604 | struct p54_tx_control_allocdata *txhdr; |
eff1a59c MW |
605 | size_t padding, len; |
606 | u8 rate; | |
aaa15535 | 607 | u8 cts_rate = 0x20; |
eff1a59c | 608 | |
84df3ed3 | 609 | current_queue = &priv->tx_stats[skb_get_queue_mapping(skb) + 4]; |
eff1a59c MW |
610 | if (unlikely(current_queue->len > current_queue->limit)) |
611 | return NETDEV_TX_BUSY; | |
612 | current_queue->len++; | |
613 | current_queue->count++; | |
614 | if (current_queue->len == current_queue->limit) | |
e2530083 | 615 | ieee80211_stop_queue(dev, skb_get_queue_mapping(skb)); |
eff1a59c MW |
616 | |
617 | padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3; | |
618 | len = skb->len; | |
619 | ||
eff1a59c MW |
620 | txhdr = (struct p54_tx_control_allocdata *) |
621 | skb_push(skb, sizeof(*txhdr) + padding); | |
622 | hdr = (struct p54_control_hdr *) skb_push(skb, sizeof(*hdr)); | |
623 | ||
624 | if (padding) | |
625 | hdr->magic1 = cpu_to_le16(0x4010); | |
626 | else | |
627 | hdr->magic1 = cpu_to_le16(0x0010); | |
628 | hdr->len = cpu_to_le16(len); | |
e039fa4a JB |
629 | hdr->type = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? 0 : cpu_to_le16(1); |
630 | hdr->retry1 = hdr->retry2 = info->control.retry_limit; | |
eff1a59c | 631 | |
eff1a59c | 632 | /* TODO: add support for alternate retry TX rates */ |
e039fa4a | 633 | rate = ieee80211_get_tx_rate(dev, info)->hw_value; |
aaa15535 | 634 | if (info->flags & IEEE80211_TX_CTL_SHORT_PREAMBLE) { |
8318d78a | 635 | rate |= 0x10; |
aaa15535 CL |
636 | cts_rate |= 0x10; |
637 | } | |
638 | if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) { | |
eff1a59c | 639 | rate |= 0x40; |
aaa15535 CL |
640 | cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value; |
641 | } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) { | |
eff1a59c | 642 | rate |= 0x20; |
aaa15535 CL |
643 | cts_rate |= ieee80211_get_rts_cts_rate(dev, info)->hw_value; |
644 | } | |
eff1a59c | 645 | memset(txhdr->rateset, rate, 8); |
aaa15535 CL |
646 | txhdr->key_type = 0; |
647 | txhdr->key_len = 0; | |
648 | txhdr->hw_queue = skb_get_queue_mapping(skb) + 4; | |
649 | txhdr->tx_antenna = (info->antenna_sel_tx == 0) ? | |
e039fa4a | 650 | 2 : info->antenna_sel_tx - 1; |
eff1a59c | 651 | txhdr->output_power = 0x7f; // HW Maximum |
aaa15535 CL |
652 | txhdr->cts_rate = (info->flags & IEEE80211_TX_CTL_NO_ACK) ? |
653 | 0 : cts_rate; | |
eff1a59c MW |
654 | if (padding) |
655 | txhdr->align[0] = padding; | |
656 | ||
eda0c003 LF |
657 | /* FIXME: The sequence that follows is needed for this driver to |
658 | * work with mac80211 since "mac80211: fix TX sequence numbers". | |
659 | * As with the temporary code in rt2x00, changes will be needed | |
660 | * to get proper sequence numbers on beacons. In addition, this | |
661 | * patch places the sequence number in the hardware state, which | |
662 | * limits us to a single virtual state. | |
663 | */ | |
664 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
665 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) | |
666 | priv->seqno += 0x10; | |
667 | ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | |
668 | ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno); | |
669 | } | |
e039fa4a JB |
670 | /* modifies skb->cb and with it info, so must be last! */ |
671 | p54_assign_address(dev, skb, hdr, skb->len); | |
672 | ||
eff1a59c MW |
673 | priv->tx(dev, hdr, skb->len, 0); |
674 | return 0; | |
675 | } | |
676 | ||
677 | static int p54_set_filter(struct ieee80211_hw *dev, u16 filter_type, | |
678 | const u8 *dst, const u8 *src, u8 antenna, | |
679 | u32 magic3, u32 magic8, u32 magic9) | |
680 | { | |
681 | struct p54_common *priv = dev->priv; | |
682 | struct p54_control_hdr *hdr; | |
683 | struct p54_tx_control_filter *filter; | |
684 | ||
685 | hdr = kzalloc(sizeof(*hdr) + sizeof(*filter) + | |
ba8007ce | 686 | priv->tx_hdr_len, GFP_ATOMIC); |
eff1a59c MW |
687 | if (!hdr) |
688 | return -ENOMEM; | |
689 | ||
690 | hdr = (void *)hdr + priv->tx_hdr_len; | |
691 | ||
692 | filter = (struct p54_tx_control_filter *) hdr->data; | |
693 | hdr->magic1 = cpu_to_le16(0x8001); | |
694 | hdr->len = cpu_to_le16(sizeof(*filter)); | |
e039fa4a | 695 | p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*filter)); |
eff1a59c MW |
696 | hdr->type = cpu_to_le16(P54_CONTROL_TYPE_FILTER_SET); |
697 | ||
698 | filter->filter_type = cpu_to_le16(filter_type); | |
699 | memcpy(filter->dst, dst, ETH_ALEN); | |
700 | if (!src) | |
701 | memset(filter->src, ~0, ETH_ALEN); | |
702 | else | |
703 | memcpy(filter->src, src, ETH_ALEN); | |
704 | filter->antenna = antenna; | |
705 | filter->magic3 = cpu_to_le32(magic3); | |
706 | filter->rx_addr = cpu_to_le32(priv->rx_end); | |
707 | filter->max_rx = cpu_to_le16(0x0620); /* FIXME: for usb ver 1.. maybe */ | |
708 | filter->rxhw = priv->rxhw; | |
709 | filter->magic8 = cpu_to_le16(magic8); | |
710 | filter->magic9 = cpu_to_le16(magic9); | |
711 | ||
712 | priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*filter), 1); | |
713 | return 0; | |
714 | } | |
715 | ||
716 | static int p54_set_freq(struct ieee80211_hw *dev, __le16 freq) | |
717 | { | |
718 | struct p54_common *priv = dev->priv; | |
719 | struct p54_control_hdr *hdr; | |
720 | struct p54_tx_control_channel *chan; | |
721 | unsigned int i; | |
eff1a59c MW |
722 | void *entry; |
723 | ||
154e3af1 | 724 | hdr = kzalloc(sizeof(*hdr) + sizeof(*chan) + |
eff1a59c MW |
725 | priv->tx_hdr_len, GFP_KERNEL); |
726 | if (!hdr) | |
727 | return -ENOMEM; | |
728 | ||
729 | hdr = (void *)hdr + priv->tx_hdr_len; | |
730 | ||
731 | chan = (struct p54_tx_control_channel *) hdr->data; | |
732 | ||
733 | hdr->magic1 = cpu_to_le16(0x8001); | |
734 | hdr->len = cpu_to_le16(sizeof(*chan)); | |
735 | hdr->type = cpu_to_le16(P54_CONTROL_TYPE_CHANNEL_CHANGE); | |
154e3af1 | 736 | p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*chan)); |
eff1a59c | 737 | |
154e3af1 CL |
738 | chan->flags = cpu_to_le16(0x1); |
739 | chan->dwell = cpu_to_le16(0x0); | |
eff1a59c MW |
740 | |
741 | for (i = 0; i < priv->iq_autocal_len; i++) { | |
742 | if (priv->iq_autocal[i].freq != freq) | |
743 | continue; | |
744 | ||
745 | memcpy(&chan->iq_autocal, &priv->iq_autocal[i], | |
746 | sizeof(*priv->iq_autocal)); | |
747 | break; | |
748 | } | |
749 | if (i == priv->iq_autocal_len) | |
750 | goto err; | |
751 | ||
752 | for (i = 0; i < priv->output_limit_len; i++) { | |
753 | if (priv->output_limit[i].freq != freq) | |
754 | continue; | |
755 | ||
756 | chan->val_barker = 0x38; | |
154e3af1 CL |
757 | chan->val_bpsk = chan->dup_bpsk = |
758 | priv->output_limit[i].val_bpsk; | |
759 | chan->val_qpsk = chan->dup_qpsk = | |
760 | priv->output_limit[i].val_qpsk; | |
761 | chan->val_16qam = chan->dup_16qam = | |
762 | priv->output_limit[i].val_16qam; | |
763 | chan->val_64qam = chan->dup_64qam = | |
764 | priv->output_limit[i].val_64qam; | |
eff1a59c MW |
765 | break; |
766 | } | |
767 | if (i == priv->output_limit_len) | |
768 | goto err; | |
769 | ||
eff1a59c MW |
770 | entry = priv->curve_data->data; |
771 | for (i = 0; i < priv->curve_data->channels; i++) { | |
772 | if (*((__le16 *)entry) != freq) { | |
773 | entry += sizeof(__le16); | |
154e3af1 CL |
774 | entry += sizeof(struct p54_pa_curve_data_sample) * |
775 | priv->curve_data->points_per_channel; | |
eff1a59c MW |
776 | continue; |
777 | } | |
778 | ||
779 | entry += sizeof(__le16); | |
154e3af1 CL |
780 | chan->pa_points_per_curve = |
781 | min(priv->curve_data->points_per_channel, (u8) 8); | |
782 | ||
eff1a59c MW |
783 | memcpy(chan->curve_data, entry, sizeof(*chan->curve_data) * |
784 | chan->pa_points_per_curve); | |
785 | break; | |
786 | } | |
787 | ||
154e3af1 CL |
788 | chan->rssical_mul = cpu_to_le16(130); |
789 | chan->rssical_add = cpu_to_le16(0xfe70); /* -400 */ | |
eff1a59c | 790 | |
154e3af1 | 791 | priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*chan), 1); |
eff1a59c MW |
792 | return 0; |
793 | ||
794 | err: | |
795 | printk(KERN_ERR "%s: frequency change failed\n", wiphy_name(dev->wiphy)); | |
796 | kfree(hdr); | |
797 | return -EINVAL; | |
798 | } | |
799 | ||
800 | static int p54_set_leds(struct ieee80211_hw *dev, int mode, int link, int act) | |
801 | { | |
802 | struct p54_common *priv = dev->priv; | |
803 | struct p54_control_hdr *hdr; | |
804 | struct p54_tx_control_led *led; | |
805 | ||
806 | hdr = kzalloc(sizeof(*hdr) + sizeof(*led) + | |
807 | priv->tx_hdr_len, GFP_KERNEL); | |
808 | if (!hdr) | |
809 | return -ENOMEM; | |
810 | ||
811 | hdr = (void *)hdr + priv->tx_hdr_len; | |
812 | hdr->magic1 = cpu_to_le16(0x8001); | |
813 | hdr->len = cpu_to_le16(sizeof(*led)); | |
814 | hdr->type = cpu_to_le16(P54_CONTROL_TYPE_LED); | |
e039fa4a | 815 | p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*led)); |
eff1a59c MW |
816 | |
817 | led = (struct p54_tx_control_led *) hdr->data; | |
818 | led->mode = cpu_to_le16(mode); | |
819 | led->led_permanent = cpu_to_le16(link); | |
820 | led->led_temporary = cpu_to_le16(act); | |
821 | led->duration = cpu_to_le16(1000); | |
822 | ||
823 | priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*led), 1); | |
824 | ||
825 | return 0; | |
826 | } | |
827 | ||
3330d7be | 828 | #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \ |
eff1a59c MW |
829 | do { \ |
830 | queue.aifs = cpu_to_le16(ai_fs); \ | |
831 | queue.cwmin = cpu_to_le16(cw_min); \ | |
832 | queue.cwmax = cpu_to_le16(cw_max); \ | |
3330d7be | 833 | queue.txop = cpu_to_le16(_txop); \ |
eff1a59c MW |
834 | } while(0) |
835 | ||
836 | static void p54_init_vdcf(struct ieee80211_hw *dev) | |
837 | { | |
838 | struct p54_common *priv = dev->priv; | |
839 | struct p54_control_hdr *hdr; | |
840 | struct p54_tx_control_vdcf *vdcf; | |
841 | ||
842 | /* all USB V1 adapters need a extra headroom */ | |
843 | hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len; | |
844 | hdr->magic1 = cpu_to_le16(0x8001); | |
845 | hdr->len = cpu_to_le16(sizeof(*vdcf)); | |
846 | hdr->type = cpu_to_le16(P54_CONTROL_TYPE_DCFINIT); | |
847 | hdr->req_id = cpu_to_le32(priv->rx_start); | |
848 | ||
849 | vdcf = (struct p54_tx_control_vdcf *) hdr->data; | |
850 | ||
3330d7be JB |
851 | P54_SET_QUEUE(vdcf->queue[0], 0x0002, 0x0003, 0x0007, 47); |
852 | P54_SET_QUEUE(vdcf->queue[1], 0x0002, 0x0007, 0x000f, 94); | |
5200e8cd | 853 | P54_SET_QUEUE(vdcf->queue[2], 0x0003, 0x000f, 0x03ff, 0); |
3330d7be | 854 | P54_SET_QUEUE(vdcf->queue[3], 0x0007, 0x000f, 0x03ff, 0); |
eff1a59c MW |
855 | } |
856 | ||
857 | static void p54_set_vdcf(struct ieee80211_hw *dev) | |
858 | { | |
859 | struct p54_common *priv = dev->priv; | |
860 | struct p54_control_hdr *hdr; | |
861 | struct p54_tx_control_vdcf *vdcf; | |
862 | ||
863 | hdr = (void *)priv->cached_vdcf + priv->tx_hdr_len; | |
864 | ||
e039fa4a | 865 | p54_assign_address(dev, NULL, hdr, sizeof(*hdr) + sizeof(*vdcf)); |
eff1a59c MW |
866 | |
867 | vdcf = (struct p54_tx_control_vdcf *) hdr->data; | |
868 | ||
869 | if (dev->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) { | |
870 | vdcf->slottime = 9; | |
5423b2ed CL |
871 | vdcf->magic1 = 0x10; |
872 | vdcf->magic2 = 0x00; | |
eff1a59c MW |
873 | } else { |
874 | vdcf->slottime = 20; | |
875 | vdcf->magic1 = 0x0a; | |
876 | vdcf->magic2 = 0x06; | |
877 | } | |
878 | ||
879 | /* (see prism54/isl_oid.h for further details) */ | |
880 | vdcf->frameburst = cpu_to_le16(0); | |
881 | ||
882 | priv->tx(dev, hdr, sizeof(*hdr) + sizeof(*vdcf), 0); | |
883 | } | |
884 | ||
4150c572 JB |
885 | static int p54_start(struct ieee80211_hw *dev) |
886 | { | |
887 | struct p54_common *priv = dev->priv; | |
888 | int err; | |
889 | ||
69bbc7dc CL |
890 | if (!priv->cached_vdcf) { |
891 | priv->cached_vdcf = kzalloc(sizeof(struct p54_tx_control_vdcf)+ | |
892 | priv->tx_hdr_len + sizeof(struct p54_control_hdr), | |
893 | GFP_KERNEL); | |
894 | ||
895 | if (!priv->cached_vdcf) | |
896 | return -ENOMEM; | |
897 | } | |
898 | ||
4150c572 JB |
899 | err = priv->open(dev); |
900 | if (!err) | |
901 | priv->mode = IEEE80211_IF_TYPE_MNTR; | |
902 | ||
69bbc7dc CL |
903 | p54_init_vdcf(dev); |
904 | ||
4150c572 JB |
905 | return err; |
906 | } | |
907 | ||
908 | static void p54_stop(struct ieee80211_hw *dev) | |
909 | { | |
910 | struct p54_common *priv = dev->priv; | |
911 | struct sk_buff *skb; | |
e039fa4a | 912 | while ((skb = skb_dequeue(&priv->tx_queue))) |
4150c572 | 913 | kfree_skb(skb); |
4150c572 | 914 | priv->stop(dev); |
a2897552 | 915 | priv->mode = IEEE80211_IF_TYPE_INVALID; |
4150c572 JB |
916 | } |
917 | ||
eff1a59c MW |
918 | static int p54_add_interface(struct ieee80211_hw *dev, |
919 | struct ieee80211_if_init_conf *conf) | |
920 | { | |
921 | struct p54_common *priv = dev->priv; | |
eff1a59c | 922 | |
4150c572 JB |
923 | if (priv->mode != IEEE80211_IF_TYPE_MNTR) |
924 | return -EOPNOTSUPP; | |
eff1a59c MW |
925 | |
926 | switch (conf->type) { | |
927 | case IEEE80211_IF_TYPE_STA: | |
928 | priv->mode = conf->type; | |
929 | break; | |
930 | default: | |
931 | return -EOPNOTSUPP; | |
932 | } | |
933 | ||
4150c572 | 934 | memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); |
eff1a59c MW |
935 | |
936 | p54_set_filter(dev, 0, priv->mac_addr, NULL, 0, 1, 0, 0xF642); | |
937 | p54_set_filter(dev, 0, priv->mac_addr, NULL, 1, 0, 0, 0xF642); | |
eff1a59c MW |
938 | |
939 | switch (conf->type) { | |
940 | case IEEE80211_IF_TYPE_STA: | |
941 | p54_set_filter(dev, 1, priv->mac_addr, NULL, 0, 0x15F, 0x1F4, 0); | |
942 | break; | |
4150c572 JB |
943 | default: |
944 | BUG(); /* impossible */ | |
945 | break; | |
eff1a59c MW |
946 | } |
947 | ||
948 | p54_set_leds(dev, 1, 0, 0); | |
949 | ||
950 | return 0; | |
951 | } | |
952 | ||
953 | static void p54_remove_interface(struct ieee80211_hw *dev, | |
954 | struct ieee80211_if_init_conf *conf) | |
955 | { | |
956 | struct p54_common *priv = dev->priv; | |
4150c572 JB |
957 | priv->mode = IEEE80211_IF_TYPE_MNTR; |
958 | memset(priv->mac_addr, 0, ETH_ALEN); | |
959 | p54_set_filter(dev, 0, priv->mac_addr, NULL, 2, 0, 0, 0); | |
eff1a59c MW |
960 | } |
961 | ||
962 | static int p54_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | |
963 | { | |
964 | int ret; | |
6041e2a0 | 965 | struct p54_common *priv = dev->priv; |
eff1a59c | 966 | |
6041e2a0 | 967 | mutex_lock(&priv->conf_mutex); |
8318d78a | 968 | ret = p54_set_freq(dev, cpu_to_le16(conf->channel->center_freq)); |
eff1a59c | 969 | p54_set_vdcf(dev); |
6041e2a0 | 970 | mutex_unlock(&priv->conf_mutex); |
eff1a59c MW |
971 | return ret; |
972 | } | |
973 | ||
32bfd35d JB |
974 | static int p54_config_interface(struct ieee80211_hw *dev, |
975 | struct ieee80211_vif *vif, | |
eff1a59c MW |
976 | struct ieee80211_if_conf *conf) |
977 | { | |
978 | struct p54_common *priv = dev->priv; | |
979 | ||
6041e2a0 | 980 | mutex_lock(&priv->conf_mutex); |
eff1a59c MW |
981 | p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 0, 1, 0, 0xF642); |
982 | p54_set_filter(dev, 0, priv->mac_addr, conf->bssid, 2, 0, 0, 0); | |
983 | p54_set_leds(dev, 1, !is_multicast_ether_addr(conf->bssid), 0); | |
4150c572 | 984 | memcpy(priv->bssid, conf->bssid, ETH_ALEN); |
6041e2a0 | 985 | mutex_unlock(&priv->conf_mutex); |
eff1a59c MW |
986 | return 0; |
987 | } | |
988 | ||
4150c572 JB |
989 | static void p54_configure_filter(struct ieee80211_hw *dev, |
990 | unsigned int changed_flags, | |
991 | unsigned int *total_flags, | |
992 | int mc_count, struct dev_mc_list *mclist) | |
993 | { | |
994 | struct p54_common *priv = dev->priv; | |
995 | ||
996 | *total_flags &= FIF_BCN_PRBRESP_PROMISC; | |
997 | ||
998 | if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { | |
999 | if (*total_flags & FIF_BCN_PRBRESP_PROMISC) | |
1000 | p54_set_filter(dev, 0, priv->mac_addr, | |
1001 | NULL, 2, 0, 0, 0); | |
1002 | else | |
1003 | p54_set_filter(dev, 0, priv->mac_addr, | |
1004 | priv->bssid, 2, 0, 0, 0); | |
1005 | } | |
1006 | } | |
1007 | ||
e100bb64 | 1008 | static int p54_conf_tx(struct ieee80211_hw *dev, u16 queue, |
eff1a59c MW |
1009 | const struct ieee80211_tx_queue_params *params) |
1010 | { | |
1011 | struct p54_common *priv = dev->priv; | |
1012 | struct p54_tx_control_vdcf *vdcf; | |
1013 | ||
1014 | vdcf = (struct p54_tx_control_vdcf *)(((struct p54_control_hdr *) | |
1015 | ((void *)priv->cached_vdcf + priv->tx_hdr_len))->data); | |
1016 | ||
3df5ee60 | 1017 | if ((params) && !(queue > 4)) { |
eff1a59c | 1018 | P54_SET_QUEUE(vdcf->queue[queue], params->aifs, |
3330d7be | 1019 | params->cw_min, params->cw_max, params->txop); |
eff1a59c MW |
1020 | } else |
1021 | return -EINVAL; | |
1022 | ||
1023 | p54_set_vdcf(dev); | |
1024 | ||
1025 | return 0; | |
1026 | } | |
1027 | ||
1028 | static int p54_get_stats(struct ieee80211_hw *dev, | |
1029 | struct ieee80211_low_level_stats *stats) | |
1030 | { | |
1031 | /* TODO */ | |
1032 | return 0; | |
1033 | } | |
1034 | ||
1035 | static int p54_get_tx_stats(struct ieee80211_hw *dev, | |
1036 | struct ieee80211_tx_queue_stats *stats) | |
1037 | { | |
1038 | struct p54_common *priv = dev->priv; | |
eff1a59c | 1039 | |
84df3ed3 | 1040 | memcpy(stats, &priv->tx_stats[4], sizeof(stats[0]) * dev->queues); |
eff1a59c MW |
1041 | |
1042 | return 0; | |
1043 | } | |
1044 | ||
1045 | static const struct ieee80211_ops p54_ops = { | |
1046 | .tx = p54_tx, | |
4150c572 JB |
1047 | .start = p54_start, |
1048 | .stop = p54_stop, | |
eff1a59c MW |
1049 | .add_interface = p54_add_interface, |
1050 | .remove_interface = p54_remove_interface, | |
1051 | .config = p54_config, | |
1052 | .config_interface = p54_config_interface, | |
4150c572 | 1053 | .configure_filter = p54_configure_filter, |
eff1a59c MW |
1054 | .conf_tx = p54_conf_tx, |
1055 | .get_stats = p54_get_stats, | |
1056 | .get_tx_stats = p54_get_tx_stats | |
1057 | }; | |
1058 | ||
1059 | struct ieee80211_hw *p54_init_common(size_t priv_data_len) | |
1060 | { | |
1061 | struct ieee80211_hw *dev; | |
1062 | struct p54_common *priv; | |
eff1a59c MW |
1063 | |
1064 | dev = ieee80211_alloc_hw(priv_data_len, &p54_ops); | |
1065 | if (!dev) | |
1066 | return NULL; | |
1067 | ||
1068 | priv = dev->priv; | |
a2897552 | 1069 | priv->mode = IEEE80211_IF_TYPE_INVALID; |
eff1a59c | 1070 | skb_queue_head_init(&priv->tx_queue); |
8318d78a | 1071 | dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &band_2GHz; |
eff1a59c | 1072 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | /* not sure */ |
566bfe5a BR |
1073 | IEEE80211_HW_RX_INCLUDES_FCS | |
1074 | IEEE80211_HW_SIGNAL_UNSPEC; | |
f59ac048 LR |
1075 | |
1076 | dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); | |
1077 | ||
eff1a59c | 1078 | dev->channel_change_time = 1000; /* TODO: find actual value */ |
566bfe5a | 1079 | dev->max_signal = 127; |
eff1a59c | 1080 | |
84df3ed3 C |
1081 | priv->tx_stats[0].limit = 1; |
1082 | priv->tx_stats[1].limit = 1; | |
1083 | priv->tx_stats[2].limit = 1; | |
1084 | priv->tx_stats[3].limit = 1; | |
1085 | priv->tx_stats[4].limit = 5; | |
eff1a59c MW |
1086 | dev->queues = 1; |
1087 | ||
1088 | dev->extra_tx_headroom = sizeof(struct p54_control_hdr) + 4 + | |
1089 | sizeof(struct p54_tx_control_allocdata); | |
1090 | ||
6041e2a0 | 1091 | mutex_init(&priv->conf_mutex); |
eff1a59c | 1092 | |
eff1a59c MW |
1093 | return dev; |
1094 | } | |
1095 | EXPORT_SYMBOL_GPL(p54_init_common); | |
1096 | ||
1097 | void p54_free_common(struct ieee80211_hw *dev) | |
1098 | { | |
1099 | struct p54_common *priv = dev->priv; | |
1100 | kfree(priv->iq_autocal); | |
1101 | kfree(priv->output_limit); | |
1102 | kfree(priv->curve_data); | |
1103 | kfree(priv->cached_vdcf); | |
1104 | } | |
1105 | EXPORT_SYMBOL_GPL(p54_free_common); | |
1106 | ||
1107 | static int __init p54_init(void) | |
1108 | { | |
1109 | return 0; | |
1110 | } | |
1111 | ||
1112 | static void __exit p54_exit(void) | |
1113 | { | |
1114 | } | |
1115 | ||
1116 | module_init(p54_init); | |
1117 | module_exit(p54_exit); |