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1ccea77e | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
e5553f08 GJ |
2 | /* Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com> |
3 | * Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com> | |
4 | * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org> | |
5 | * Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com> | |
6 | * Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de> | |
7 | * Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com> | |
8 | * Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com> | |
9 | * Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com> | |
10 | * <http://rt2x00.serialmonkey.com> | |
e5553f08 GJ |
11 | */ |
12 | ||
13 | /* Module: rt2800mmio | |
14 | * Abstract: forward declarations for the rt2800mmio module. | |
15 | */ | |
16 | ||
17 | #ifndef RT2800MMIO_H | |
18 | #define RT2800MMIO_H | |
19 | ||
d5580ade GJ |
20 | /* |
21 | * Queue register offset macros | |
22 | */ | |
23 | #define TX_QUEUE_REG_OFFSET 0x10 | |
24 | #define TX_BASE_PTR(__x) (TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
25 | #define TX_MAX_CNT(__x) (TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
26 | #define TX_CTX_IDX(__x) (TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
27 | #define TX_DTX_IDX(__x) (TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)) | |
28 | ||
0bc202b3 GJ |
29 | /* |
30 | * DMA descriptor defines. | |
31 | */ | |
32 | #define TXD_DESC_SIZE (4 * sizeof(__le32)) | |
9732497d | 33 | #define RXD_DESC_SIZE (4 * sizeof(__le32)) |
0bc202b3 GJ |
34 | |
35 | /* | |
36 | * TX descriptor format for TX, PRIO and Beacon Ring. | |
37 | */ | |
38 | ||
39 | /* | |
40 | * Word0 | |
41 | */ | |
42 | #define TXD_W0_SD_PTR0 FIELD32(0xffffffff) | |
43 | ||
44 | /* | |
45 | * Word1 | |
46 | */ | |
47 | #define TXD_W1_SD_LEN1 FIELD32(0x00003fff) | |
48 | #define TXD_W1_LAST_SEC1 FIELD32(0x00004000) | |
49 | #define TXD_W1_BURST FIELD32(0x00008000) | |
50 | #define TXD_W1_SD_LEN0 FIELD32(0x3fff0000) | |
51 | #define TXD_W1_LAST_SEC0 FIELD32(0x40000000) | |
52 | #define TXD_W1_DMA_DONE FIELD32(0x80000000) | |
53 | ||
54 | /* | |
55 | * Word2 | |
56 | */ | |
57 | #define TXD_W2_SD_PTR1 FIELD32(0xffffffff) | |
58 | ||
59 | /* | |
60 | * Word3 | |
61 | * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI | |
62 | * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler. | |
63 | * 0:MGMT, 1:HCCA 2:EDCA | |
64 | */ | |
65 | #define TXD_W3_WIV FIELD32(0x01000000) | |
66 | #define TXD_W3_QSEL FIELD32(0x06000000) | |
67 | #define TXD_W3_TCO FIELD32(0x20000000) | |
68 | #define TXD_W3_UCO FIELD32(0x40000000) | |
69 | #define TXD_W3_ICO FIELD32(0x80000000) | |
70 | ||
9732497d GJ |
71 | /* |
72 | * RX descriptor format for RX Ring. | |
73 | */ | |
74 | ||
75 | /* | |
76 | * Word0 | |
77 | */ | |
78 | #define RXD_W0_SDP0 FIELD32(0xffffffff) | |
79 | ||
80 | /* | |
81 | * Word1 | |
82 | */ | |
83 | #define RXD_W1_SDL1 FIELD32(0x00003fff) | |
84 | #define RXD_W1_SDL0 FIELD32(0x3fff0000) | |
85 | #define RXD_W1_LS0 FIELD32(0x40000000) | |
86 | #define RXD_W1_DMA_DONE FIELD32(0x80000000) | |
87 | ||
88 | /* | |
89 | * Word2 | |
90 | */ | |
91 | #define RXD_W2_SDP1 FIELD32(0xffffffff) | |
92 | ||
93 | /* | |
94 | * Word3 | |
95 | * AMSDU: RX with 802.3 header, not 802.11 header. | |
96 | * DECRYPTED: This frame is being decrypted. | |
97 | */ | |
98 | #define RXD_W3_BA FIELD32(0x00000001) | |
99 | #define RXD_W3_DATA FIELD32(0x00000002) | |
100 | #define RXD_W3_NULLDATA FIELD32(0x00000004) | |
101 | #define RXD_W3_FRAG FIELD32(0x00000008) | |
102 | #define RXD_W3_UNICAST_TO_ME FIELD32(0x00000010) | |
103 | #define RXD_W3_MULTICAST FIELD32(0x00000020) | |
104 | #define RXD_W3_BROADCAST FIELD32(0x00000040) | |
105 | #define RXD_W3_MY_BSS FIELD32(0x00000080) | |
106 | #define RXD_W3_CRC_ERROR FIELD32(0x00000100) | |
107 | #define RXD_W3_CIPHER_ERROR FIELD32(0x00000600) | |
108 | #define RXD_W3_AMSDU FIELD32(0x00000800) | |
109 | #define RXD_W3_HTC FIELD32(0x00001000) | |
110 | #define RXD_W3_RSSI FIELD32(0x00002000) | |
111 | #define RXD_W3_L2PAD FIELD32(0x00004000) | |
112 | #define RXD_W3_AMPDU FIELD32(0x00008000) | |
113 | #define RXD_W3_DECRYPTED FIELD32(0x00010000) | |
114 | #define RXD_W3_PLCP_SIGNAL FIELD32(0x00020000) | |
115 | #define RXD_W3_PLCP_RSSI FIELD32(0x00040000) | |
0bc202b3 GJ |
116 | |
117 | /* TX descriptor initialization */ | |
118 | __le32 *rt2800mmio_get_txwi(struct queue_entry *entry); | |
119 | void rt2800mmio_write_tx_desc(struct queue_entry *entry, | |
120 | struct txentry_desc *txdesc); | |
121 | ||
9732497d GJ |
122 | /* RX control handlers */ |
123 | void rt2800mmio_fill_rxdone(struct queue_entry *entry, | |
124 | struct rxdone_entry_desc *rxdesc); | |
125 | ||
8d03e772 GJ |
126 | /* Interrupt functions */ |
127 | void rt2800mmio_txstatus_tasklet(unsigned long data); | |
128 | void rt2800mmio_pretbtt_tasklet(unsigned long data); | |
129 | void rt2800mmio_tbtt_tasklet(unsigned long data); | |
130 | void rt2800mmio_rxdone_tasklet(unsigned long data); | |
131 | void rt2800mmio_autowake_tasklet(unsigned long data); | |
132 | irqreturn_t rt2800mmio_interrupt(int irq, void *dev_instance); | |
133 | void rt2800mmio_toggle_irq(struct rt2x00_dev *rt2x00dev, | |
134 | enum dev_state state); | |
9732497d | 135 | |
d5580ade GJ |
136 | /* Queue handlers */ |
137 | void rt2800mmio_start_queue(struct data_queue *queue); | |
138 | void rt2800mmio_kick_queue(struct data_queue *queue); | |
02405644 | 139 | void rt2800mmio_flush_queue(struct data_queue *queue, bool drop); |
d5580ade GJ |
140 | void rt2800mmio_stop_queue(struct data_queue *queue); |
141 | void rt2800mmio_queue_init(struct data_queue *queue); | |
142 | ||
1052e3a6 | 143 | /* Initialization functions */ |
e5ceab9d | 144 | int rt2800mmio_probe_hw(struct rt2x00_dev *rt2x00dev); |
1052e3a6 GJ |
145 | bool rt2800mmio_get_entry_state(struct queue_entry *entry); |
146 | void rt2800mmio_clear_entry(struct queue_entry *entry); | |
147 | int rt2800mmio_init_queues(struct rt2x00_dev *rt2x00dev); | |
148 | int rt2800mmio_init_registers(struct rt2x00_dev *rt2x00dev); | |
149 | ||
3ccdcd51 GJ |
150 | /* Device state switch handlers. */ |
151 | int rt2800mmio_enable_radio(struct rt2x00_dev *rt2x00dev); | |
152 | ||
e5553f08 | 153 | #endif /* RT2800MMIO_H */ |