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5b497af4 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
181725dd JS |
2 | /* |
3 | * RTL8XXXU mac80211 USB driver - 8188c/8188r/8192c specific subdriver | |
4 | * | |
1ee83789 | 5 | * Copyright (c) 2014 - 2017 Jes Sorensen <Jes.Sorensen@gmail.com> |
181725dd JS |
6 | * |
7 | * Portions, notably calibration code: | |
8 | * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. | |
9 | * | |
10 | * This driver was written as a replacement for the vendor provided | |
11 | * rtl8723au driver. As the Realtek 8xxx chips are very similar in | |
12 | * their programming interface, I have started adding support for | |
13 | * additional 8xxx chips like the 8192cu, 8188cus, etc. | |
181725dd JS |
14 | */ |
15 | ||
16 | #include <linux/init.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/errno.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/spinlock.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/usb.h> | |
25 | #include <linux/netdevice.h> | |
26 | #include <linux/etherdevice.h> | |
27 | #include <linux/ethtool.h> | |
28 | #include <linux/wireless.h> | |
29 | #include <linux/firmware.h> | |
30 | #include <linux/moduleparam.h> | |
31 | #include <net/mac80211.h> | |
32 | #include "rtl8xxxu.h" | |
33 | #include "rtl8xxxu_regs.h" | |
34 | ||
35 | #ifdef CONFIG_RTL8XXXU_UNTESTED | |
36 | static struct rtl8xxxu_power_base rtl8192c_power_base = { | |
37 | .reg_0e00 = 0x07090c0c, | |
38 | .reg_0e04 = 0x01020405, | |
39 | .reg_0e08 = 0x00000000, | |
40 | .reg_086c = 0x00000000, | |
41 | ||
42 | .reg_0e10 = 0x0b0c0c0e, | |
43 | .reg_0e14 = 0x01030506, | |
44 | .reg_0e18 = 0x0b0c0d0e, | |
45 | .reg_0e1c = 0x01030509, | |
46 | ||
47 | .reg_0830 = 0x07090c0c, | |
48 | .reg_0834 = 0x01020405, | |
49 | .reg_0838 = 0x00000000, | |
50 | .reg_086c_2 = 0x00000000, | |
51 | ||
52 | .reg_083c = 0x0b0c0d0e, | |
53 | .reg_0848 = 0x01030509, | |
54 | .reg_084c = 0x0b0c0d0e, | |
55 | .reg_0868 = 0x01030509, | |
56 | }; | |
57 | ||
58 | static struct rtl8xxxu_power_base rtl8188r_power_base = { | |
59 | .reg_0e00 = 0x06080808, | |
60 | .reg_0e04 = 0x00040406, | |
61 | .reg_0e08 = 0x00000000, | |
62 | .reg_086c = 0x00000000, | |
63 | ||
64 | .reg_0e10 = 0x04060608, | |
65 | .reg_0e14 = 0x00020204, | |
66 | .reg_0e18 = 0x04060608, | |
67 | .reg_0e1c = 0x00020204, | |
68 | ||
69 | .reg_0830 = 0x06080808, | |
70 | .reg_0834 = 0x00040406, | |
71 | .reg_0838 = 0x00000000, | |
72 | .reg_086c_2 = 0x00000000, | |
73 | ||
74 | .reg_083c = 0x04060608, | |
75 | .reg_0848 = 0x00020204, | |
76 | .reg_084c = 0x04060608, | |
77 | .reg_0868 = 0x00020204, | |
78 | }; | |
79 | ||
80 | static struct rtl8xxxu_rfregval rtl8192cu_radioa_2t_init_table[] = { | |
81 | {0x00, 0x00030159}, {0x01, 0x00031284}, | |
82 | {0x02, 0x00098000}, {0x03, 0x00018c63}, | |
83 | {0x04, 0x000210e7}, {0x09, 0x0002044f}, | |
84 | {0x0a, 0x0001adb1}, {0x0b, 0x00054867}, | |
85 | {0x0c, 0x0008992e}, {0x0d, 0x0000e52c}, | |
86 | {0x0e, 0x00039ce7}, {0x0f, 0x00000451}, | |
87 | {0x19, 0x00000000}, {0x1a, 0x00010255}, | |
88 | {0x1b, 0x00060a00}, {0x1c, 0x000fc378}, | |
89 | {0x1d, 0x000a1250}, {0x1e, 0x0004445f}, | |
90 | {0x1f, 0x00080001}, {0x20, 0x0000b614}, | |
91 | {0x21, 0x0006c000}, {0x22, 0x00000000}, | |
92 | {0x23, 0x00001558}, {0x24, 0x00000060}, | |
93 | {0x25, 0x00000483}, {0x26, 0x0004f000}, | |
94 | {0x27, 0x000ec7d9}, {0x28, 0x000577c0}, | |
95 | {0x29, 0x00004783}, {0x2a, 0x00000001}, | |
96 | {0x2b, 0x00021334}, {0x2a, 0x00000000}, | |
97 | {0x2b, 0x00000054}, {0x2a, 0x00000001}, | |
98 | {0x2b, 0x00000808}, {0x2b, 0x00053333}, | |
99 | {0x2c, 0x0000000c}, {0x2a, 0x00000002}, | |
100 | {0x2b, 0x00000808}, {0x2b, 0x0005b333}, | |
101 | {0x2c, 0x0000000d}, {0x2a, 0x00000003}, | |
102 | {0x2b, 0x00000808}, {0x2b, 0x00063333}, | |
103 | {0x2c, 0x0000000d}, {0x2a, 0x00000004}, | |
104 | {0x2b, 0x00000808}, {0x2b, 0x0006b333}, | |
105 | {0x2c, 0x0000000d}, {0x2a, 0x00000005}, | |
106 | {0x2b, 0x00000808}, {0x2b, 0x00073333}, | |
107 | {0x2c, 0x0000000d}, {0x2a, 0x00000006}, | |
108 | {0x2b, 0x00000709}, {0x2b, 0x0005b333}, | |
109 | {0x2c, 0x0000000d}, {0x2a, 0x00000007}, | |
110 | {0x2b, 0x00000709}, {0x2b, 0x00063333}, | |
111 | {0x2c, 0x0000000d}, {0x2a, 0x00000008}, | |
112 | {0x2b, 0x0000060a}, {0x2b, 0x0004b333}, | |
113 | {0x2c, 0x0000000d}, {0x2a, 0x00000009}, | |
114 | {0x2b, 0x0000060a}, {0x2b, 0x00053333}, | |
115 | {0x2c, 0x0000000d}, {0x2a, 0x0000000a}, | |
116 | {0x2b, 0x0000060a}, {0x2b, 0x0005b333}, | |
117 | {0x2c, 0x0000000d}, {0x2a, 0x0000000b}, | |
118 | {0x2b, 0x0000060a}, {0x2b, 0x00063333}, | |
119 | {0x2c, 0x0000000d}, {0x2a, 0x0000000c}, | |
120 | {0x2b, 0x0000060a}, {0x2b, 0x0006b333}, | |
121 | {0x2c, 0x0000000d}, {0x2a, 0x0000000d}, | |
122 | {0x2b, 0x0000060a}, {0x2b, 0x00073333}, | |
123 | {0x2c, 0x0000000d}, {0x2a, 0x0000000e}, | |
124 | {0x2b, 0x0000050b}, {0x2b, 0x00066666}, | |
125 | {0x2c, 0x0000001a}, {0x2a, 0x000e0000}, | |
126 | {0x10, 0x0004000f}, {0x11, 0x000e31fc}, | |
127 | {0x10, 0x0006000f}, {0x11, 0x000ff9f8}, | |
128 | {0x10, 0x0002000f}, {0x11, 0x000203f9}, | |
129 | {0x10, 0x0003000f}, {0x11, 0x000ff500}, | |
130 | {0x10, 0x00000000}, {0x11, 0x00000000}, | |
131 | {0x10, 0x0008000f}, {0x11, 0x0003f100}, | |
132 | {0x10, 0x0009000f}, {0x11, 0x00023100}, | |
133 | {0x12, 0x00032000}, {0x12, 0x00071000}, | |
134 | {0x12, 0x000b0000}, {0x12, 0x000fc000}, | |
135 | {0x13, 0x000287b3}, {0x13, 0x000244b7}, | |
136 | {0x13, 0x000204ab}, {0x13, 0x0001c49f}, | |
137 | {0x13, 0x00018493}, {0x13, 0x0001429b}, | |
138 | {0x13, 0x00010299}, {0x13, 0x0000c29c}, | |
139 | {0x13, 0x000081a0}, {0x13, 0x000040ac}, | |
140 | {0x13, 0x00000020}, {0x14, 0x0001944c}, | |
141 | {0x14, 0x00059444}, {0x14, 0x0009944c}, | |
142 | {0x14, 0x000d9444}, {0x15, 0x0000f424}, | |
143 | {0x15, 0x0004f424}, {0x15, 0x0008f424}, | |
144 | {0x15, 0x000cf424}, {0x16, 0x000e0330}, | |
145 | {0x16, 0x000a0330}, {0x16, 0x00060330}, | |
146 | {0x16, 0x00020330}, {0x00, 0x00010159}, | |
147 | {0x18, 0x0000f401}, {0xfe, 0x00000000}, | |
148 | {0xfe, 0x00000000}, {0x1f, 0x00080003}, | |
149 | {0xfe, 0x00000000}, {0xfe, 0x00000000}, | |
150 | {0x1e, 0x00044457}, {0x1f, 0x00080000}, | |
151 | {0x00, 0x00030159}, | |
152 | {0xff, 0xffffffff} | |
153 | }; | |
154 | ||
155 | static struct rtl8xxxu_rfregval rtl8192cu_radiob_2t_init_table[] = { | |
156 | {0x00, 0x00030159}, {0x01, 0x00031284}, | |
157 | {0x02, 0x00098000}, {0x03, 0x00018c63}, | |
158 | {0x04, 0x000210e7}, {0x09, 0x0002044f}, | |
159 | {0x0a, 0x0001adb1}, {0x0b, 0x00054867}, | |
160 | {0x0c, 0x0008992e}, {0x0d, 0x0000e52c}, | |
161 | {0x0e, 0x00039ce7}, {0x0f, 0x00000451}, | |
162 | {0x12, 0x00032000}, {0x12, 0x00071000}, | |
163 | {0x12, 0x000b0000}, {0x12, 0x000fc000}, | |
164 | {0x13, 0x000287af}, {0x13, 0x000244b7}, | |
165 | {0x13, 0x000204ab}, {0x13, 0x0001c49f}, | |
166 | {0x13, 0x00018493}, {0x13, 0x00014297}, | |
167 | {0x13, 0x00010295}, {0x13, 0x0000c298}, | |
168 | {0x13, 0x0000819c}, {0x13, 0x000040a8}, | |
169 | {0x13, 0x0000001c}, {0x14, 0x0001944c}, | |
170 | {0x14, 0x00059444}, {0x14, 0x0009944c}, | |
171 | {0x14, 0x000d9444}, {0x15, 0x0000f424}, | |
172 | {0x15, 0x0004f424}, {0x15, 0x0008f424}, | |
173 | {0x15, 0x000cf424}, {0x16, 0x000e0330}, | |
174 | {0x16, 0x000a0330}, {0x16, 0x00060330}, | |
175 | {0x16, 0x00020330}, | |
176 | {0xff, 0xffffffff} | |
177 | }; | |
178 | ||
179 | static struct rtl8xxxu_rfregval rtl8192cu_radioa_1t_init_table[] = { | |
180 | {0x00, 0x00030159}, {0x01, 0x00031284}, | |
181 | {0x02, 0x00098000}, {0x03, 0x00018c63}, | |
182 | {0x04, 0x000210e7}, {0x09, 0x0002044f}, | |
183 | {0x0a, 0x0001adb1}, {0x0b, 0x00054867}, | |
184 | {0x0c, 0x0008992e}, {0x0d, 0x0000e52c}, | |
185 | {0x0e, 0x00039ce7}, {0x0f, 0x00000451}, | |
186 | {0x19, 0x00000000}, {0x1a, 0x00010255}, | |
187 | {0x1b, 0x00060a00}, {0x1c, 0x000fc378}, | |
188 | {0x1d, 0x000a1250}, {0x1e, 0x0004445f}, | |
189 | {0x1f, 0x00080001}, {0x20, 0x0000b614}, | |
190 | {0x21, 0x0006c000}, {0x22, 0x00000000}, | |
191 | {0x23, 0x00001558}, {0x24, 0x00000060}, | |
192 | {0x25, 0x00000483}, {0x26, 0x0004f000}, | |
193 | {0x27, 0x000ec7d9}, {0x28, 0x000577c0}, | |
194 | {0x29, 0x00004783}, {0x2a, 0x00000001}, | |
195 | {0x2b, 0x00021334}, {0x2a, 0x00000000}, | |
196 | {0x2b, 0x00000054}, {0x2a, 0x00000001}, | |
197 | {0x2b, 0x00000808}, {0x2b, 0x00053333}, | |
198 | {0x2c, 0x0000000c}, {0x2a, 0x00000002}, | |
199 | {0x2b, 0x00000808}, {0x2b, 0x0005b333}, | |
200 | {0x2c, 0x0000000d}, {0x2a, 0x00000003}, | |
201 | {0x2b, 0x00000808}, {0x2b, 0x00063333}, | |
202 | {0x2c, 0x0000000d}, {0x2a, 0x00000004}, | |
203 | {0x2b, 0x00000808}, {0x2b, 0x0006b333}, | |
204 | {0x2c, 0x0000000d}, {0x2a, 0x00000005}, | |
205 | {0x2b, 0x00000808}, {0x2b, 0x00073333}, | |
206 | {0x2c, 0x0000000d}, {0x2a, 0x00000006}, | |
207 | {0x2b, 0x00000709}, {0x2b, 0x0005b333}, | |
208 | {0x2c, 0x0000000d}, {0x2a, 0x00000007}, | |
209 | {0x2b, 0x00000709}, {0x2b, 0x00063333}, | |
210 | {0x2c, 0x0000000d}, {0x2a, 0x00000008}, | |
211 | {0x2b, 0x0000060a}, {0x2b, 0x0004b333}, | |
212 | {0x2c, 0x0000000d}, {0x2a, 0x00000009}, | |
213 | {0x2b, 0x0000060a}, {0x2b, 0x00053333}, | |
214 | {0x2c, 0x0000000d}, {0x2a, 0x0000000a}, | |
215 | {0x2b, 0x0000060a}, {0x2b, 0x0005b333}, | |
216 | {0x2c, 0x0000000d}, {0x2a, 0x0000000b}, | |
217 | {0x2b, 0x0000060a}, {0x2b, 0x00063333}, | |
218 | {0x2c, 0x0000000d}, {0x2a, 0x0000000c}, | |
219 | {0x2b, 0x0000060a}, {0x2b, 0x0006b333}, | |
220 | {0x2c, 0x0000000d}, {0x2a, 0x0000000d}, | |
221 | {0x2b, 0x0000060a}, {0x2b, 0x00073333}, | |
222 | {0x2c, 0x0000000d}, {0x2a, 0x0000000e}, | |
223 | {0x2b, 0x0000050b}, {0x2b, 0x00066666}, | |
224 | {0x2c, 0x0000001a}, {0x2a, 0x000e0000}, | |
225 | {0x10, 0x0004000f}, {0x11, 0x000e31fc}, | |
226 | {0x10, 0x0006000f}, {0x11, 0x000ff9f8}, | |
227 | {0x10, 0x0002000f}, {0x11, 0x000203f9}, | |
228 | {0x10, 0x0003000f}, {0x11, 0x000ff500}, | |
229 | {0x10, 0x00000000}, {0x11, 0x00000000}, | |
230 | {0x10, 0x0008000f}, {0x11, 0x0003f100}, | |
231 | {0x10, 0x0009000f}, {0x11, 0x00023100}, | |
232 | {0x12, 0x00032000}, {0x12, 0x00071000}, | |
233 | {0x12, 0x000b0000}, {0x12, 0x000fc000}, | |
234 | {0x13, 0x000287b3}, {0x13, 0x000244b7}, | |
235 | {0x13, 0x000204ab}, {0x13, 0x0001c49f}, | |
236 | {0x13, 0x00018493}, {0x13, 0x0001429b}, | |
237 | {0x13, 0x00010299}, {0x13, 0x0000c29c}, | |
238 | {0x13, 0x000081a0}, {0x13, 0x000040ac}, | |
239 | {0x13, 0x00000020}, {0x14, 0x0001944c}, | |
240 | {0x14, 0x00059444}, {0x14, 0x0009944c}, | |
241 | {0x14, 0x000d9444}, {0x15, 0x0000f405}, | |
242 | {0x15, 0x0004f405}, {0x15, 0x0008f405}, | |
243 | {0x15, 0x000cf405}, {0x16, 0x000e0330}, | |
244 | {0x16, 0x000a0330}, {0x16, 0x00060330}, | |
245 | {0x16, 0x00020330}, {0x00, 0x00010159}, | |
246 | {0x18, 0x0000f401}, {0xfe, 0x00000000}, | |
247 | {0xfe, 0x00000000}, {0x1f, 0x00080003}, | |
248 | {0xfe, 0x00000000}, {0xfe, 0x00000000}, | |
249 | {0x1e, 0x00044457}, {0x1f, 0x00080000}, | |
250 | {0x00, 0x00030159}, | |
251 | {0xff, 0xffffffff} | |
252 | }; | |
253 | ||
254 | static struct rtl8xxxu_rfregval rtl8188ru_radioa_1t_highpa_table[] = { | |
255 | {0x00, 0x00030159}, {0x01, 0x00031284}, | |
256 | {0x02, 0x00098000}, {0x03, 0x00018c63}, | |
257 | {0x04, 0x000210e7}, {0x09, 0x0002044f}, | |
258 | {0x0a, 0x0001adb0}, {0x0b, 0x00054867}, | |
259 | {0x0c, 0x0008992e}, {0x0d, 0x0000e529}, | |
260 | {0x0e, 0x00039ce7}, {0x0f, 0x00000451}, | |
261 | {0x19, 0x00000000}, {0x1a, 0x00000255}, | |
262 | {0x1b, 0x00060a00}, {0x1c, 0x000fc378}, | |
263 | {0x1d, 0x000a1250}, {0x1e, 0x0004445f}, | |
264 | {0x1f, 0x00080001}, {0x20, 0x0000b614}, | |
265 | {0x21, 0x0006c000}, {0x22, 0x0000083c}, | |
266 | {0x23, 0x00001558}, {0x24, 0x00000060}, | |
267 | {0x25, 0x00000483}, {0x26, 0x0004f000}, | |
268 | {0x27, 0x000ec7d9}, {0x28, 0x000977c0}, | |
269 | {0x29, 0x00004783}, {0x2a, 0x00000001}, | |
270 | {0x2b, 0x00021334}, {0x2a, 0x00000000}, | |
271 | {0x2b, 0x00000054}, {0x2a, 0x00000001}, | |
272 | {0x2b, 0x00000808}, {0x2b, 0x00053333}, | |
273 | {0x2c, 0x0000000c}, {0x2a, 0x00000002}, | |
274 | {0x2b, 0x00000808}, {0x2b, 0x0005b333}, | |
275 | {0x2c, 0x0000000d}, {0x2a, 0x00000003}, | |
276 | {0x2b, 0x00000808}, {0x2b, 0x00063333}, | |
277 | {0x2c, 0x0000000d}, {0x2a, 0x00000004}, | |
278 | {0x2b, 0x00000808}, {0x2b, 0x0006b333}, | |
279 | {0x2c, 0x0000000d}, {0x2a, 0x00000005}, | |
280 | {0x2b, 0x00000808}, {0x2b, 0x00073333}, | |
281 | {0x2c, 0x0000000d}, {0x2a, 0x00000006}, | |
282 | {0x2b, 0x00000709}, {0x2b, 0x0005b333}, | |
283 | {0x2c, 0x0000000d}, {0x2a, 0x00000007}, | |
284 | {0x2b, 0x00000709}, {0x2b, 0x00063333}, | |
285 | {0x2c, 0x0000000d}, {0x2a, 0x00000008}, | |
286 | {0x2b, 0x0000060a}, {0x2b, 0x0004b333}, | |
287 | {0x2c, 0x0000000d}, {0x2a, 0x00000009}, | |
288 | {0x2b, 0x0000060a}, {0x2b, 0x00053333}, | |
289 | {0x2c, 0x0000000d}, {0x2a, 0x0000000a}, | |
290 | {0x2b, 0x0000060a}, {0x2b, 0x0005b333}, | |
291 | {0x2c, 0x0000000d}, {0x2a, 0x0000000b}, | |
292 | {0x2b, 0x0000060a}, {0x2b, 0x00063333}, | |
293 | {0x2c, 0x0000000d}, {0x2a, 0x0000000c}, | |
294 | {0x2b, 0x0000060a}, {0x2b, 0x0006b333}, | |
295 | {0x2c, 0x0000000d}, {0x2a, 0x0000000d}, | |
296 | {0x2b, 0x0000060a}, {0x2b, 0x00073333}, | |
297 | {0x2c, 0x0000000d}, {0x2a, 0x0000000e}, | |
298 | {0x2b, 0x0000050b}, {0x2b, 0x00066666}, | |
299 | {0x2c, 0x0000001a}, {0x2a, 0x000e0000}, | |
300 | {0x10, 0x0004000f}, {0x11, 0x000e31fc}, | |
301 | {0x10, 0x0006000f}, {0x11, 0x000ff9f8}, | |
302 | {0x10, 0x0002000f}, {0x11, 0x000203f9}, | |
303 | {0x10, 0x0003000f}, {0x11, 0x000ff500}, | |
304 | {0x10, 0x00000000}, {0x11, 0x00000000}, | |
305 | {0x10, 0x0008000f}, {0x11, 0x0003f100}, | |
306 | {0x10, 0x0009000f}, {0x11, 0x00023100}, | |
307 | {0x12, 0x000d8000}, {0x12, 0x00090000}, | |
308 | {0x12, 0x00051000}, {0x12, 0x00012000}, | |
309 | {0x13, 0x00028fb4}, {0x13, 0x00024fa8}, | |
310 | {0x13, 0x000207a4}, {0x13, 0x0001c3b0}, | |
311 | {0x13, 0x000183a4}, {0x13, 0x00014398}, | |
312 | {0x13, 0x000101a4}, {0x13, 0x0000c198}, | |
313 | {0x13, 0x000080a4}, {0x13, 0x00004098}, | |
314 | {0x13, 0x00000000}, {0x14, 0x0001944c}, | |
315 | {0x14, 0x00059444}, {0x14, 0x0009944c}, | |
316 | {0x14, 0x000d9444}, {0x15, 0x0000f405}, | |
317 | {0x15, 0x0004f405}, {0x15, 0x0008f405}, | |
318 | {0x15, 0x000cf405}, {0x16, 0x000e0330}, | |
319 | {0x16, 0x000a0330}, {0x16, 0x00060330}, | |
320 | {0x16, 0x00020330}, {0x00, 0x00010159}, | |
321 | {0x18, 0x0000f401}, {0xfe, 0x00000000}, | |
322 | {0xfe, 0x00000000}, {0x1f, 0x00080003}, | |
323 | {0xfe, 0x00000000}, {0xfe, 0x00000000}, | |
324 | {0x1e, 0x00044457}, {0x1f, 0x00080000}, | |
325 | {0x00, 0x00030159}, | |
326 | {0xff, 0xffffffff} | |
327 | }; | |
328 | ||
329 | static int rtl8192cu_load_firmware(struct rtl8xxxu_priv *priv) | |
330 | { | |
331 | char *fw_name; | |
332 | int ret; | |
333 | ||
334 | if (!priv->vendor_umc) | |
335 | fw_name = "rtlwifi/rtl8192cufw_TMSC.bin"; | |
336 | else if (priv->chip_cut || priv->rtl_chip == RTL8192C) | |
337 | fw_name = "rtlwifi/rtl8192cufw_B.bin"; | |
338 | else | |
339 | fw_name = "rtlwifi/rtl8192cufw_A.bin"; | |
340 | ||
341 | ret = rtl8xxxu_load_firmware(priv, fw_name); | |
342 | ||
343 | return ret; | |
344 | } | |
345 | ||
346 | static int rtl8192cu_parse_efuse(struct rtl8xxxu_priv *priv) | |
347 | { | |
348 | struct rtl8192cu_efuse *efuse = &priv->efuse_wifi.efuse8192; | |
349 | int i; | |
350 | ||
351 | if (efuse->rtl_id != cpu_to_le16(0x8129)) | |
352 | return -EINVAL; | |
353 | ||
354 | ether_addr_copy(priv->mac_addr, efuse->mac_addr); | |
355 | ||
356 | memcpy(priv->cck_tx_power_index_A, | |
357 | efuse->cck_tx_power_index_A, | |
358 | sizeof(efuse->cck_tx_power_index_A)); | |
359 | memcpy(priv->cck_tx_power_index_B, | |
360 | efuse->cck_tx_power_index_B, | |
361 | sizeof(efuse->cck_tx_power_index_B)); | |
362 | ||
363 | memcpy(priv->ht40_1s_tx_power_index_A, | |
364 | efuse->ht40_1s_tx_power_index_A, | |
365 | sizeof(efuse->ht40_1s_tx_power_index_A)); | |
366 | memcpy(priv->ht40_1s_tx_power_index_B, | |
367 | efuse->ht40_1s_tx_power_index_B, | |
368 | sizeof(efuse->ht40_1s_tx_power_index_B)); | |
369 | memcpy(priv->ht40_2s_tx_power_index_diff, | |
370 | efuse->ht40_2s_tx_power_index_diff, | |
371 | sizeof(efuse->ht40_2s_tx_power_index_diff)); | |
372 | ||
373 | memcpy(priv->ht20_tx_power_index_diff, | |
374 | efuse->ht20_tx_power_index_diff, | |
375 | sizeof(efuse->ht20_tx_power_index_diff)); | |
376 | memcpy(priv->ofdm_tx_power_index_diff, | |
377 | efuse->ofdm_tx_power_index_diff, | |
378 | sizeof(efuse->ofdm_tx_power_index_diff)); | |
379 | ||
380 | memcpy(priv->ht40_max_power_offset, | |
381 | efuse->ht40_max_power_offset, | |
382 | sizeof(efuse->ht40_max_power_offset)); | |
383 | memcpy(priv->ht20_max_power_offset, | |
384 | efuse->ht20_max_power_offset, | |
385 | sizeof(efuse->ht20_max_power_offset)); | |
386 | ||
387 | dev_info(&priv->udev->dev, "Vendor: %.7s\n", | |
388 | efuse->vendor_name); | |
389 | dev_info(&priv->udev->dev, "Product: %.20s\n", | |
390 | efuse->device_name); | |
391 | ||
392 | priv->power_base = &rtl8192c_power_base; | |
393 | ||
394 | if (efuse->rf_regulatory & 0x20) { | |
395 | sprintf(priv->chip_name, "8188RU"); | |
396 | priv->rtl_chip = RTL8188R; | |
397 | priv->hi_pa = 1; | |
398 | priv->no_pape = 1; | |
399 | priv->power_base = &rtl8188r_power_base; | |
400 | } | |
401 | ||
402 | if (rtl8xxxu_debug & RTL8XXXU_DEBUG_EFUSE) { | |
403 | unsigned char *raw = priv->efuse_wifi.raw; | |
404 | ||
405 | dev_info(&priv->udev->dev, | |
406 | "%s: dumping efuse (0x%02zx bytes):\n", | |
407 | __func__, sizeof(struct rtl8192cu_efuse)); | |
2b9c9f52 AS |
408 | for (i = 0; i < sizeof(struct rtl8192cu_efuse); i += 8) |
409 | dev_info(&priv->udev->dev, "%02x: %8ph\n", i, &raw[i]); | |
181725dd JS |
410 | } |
411 | return 0; | |
412 | } | |
413 | ||
414 | static int rtl8192cu_init_phy_rf(struct rtl8xxxu_priv *priv) | |
415 | { | |
416 | struct rtl8xxxu_rfregval *rftable; | |
417 | int ret; | |
418 | ||
419 | if (priv->rtl_chip == RTL8188R) { | |
420 | rftable = rtl8188ru_radioa_1t_highpa_table; | |
421 | ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A); | |
422 | } else if (priv->rf_paths == 1) { | |
423 | rftable = rtl8192cu_radioa_1t_init_table; | |
424 | ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A); | |
425 | } else { | |
426 | rftable = rtl8192cu_radioa_2t_init_table; | |
427 | ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_A); | |
428 | if (ret) | |
429 | goto exit; | |
430 | rftable = rtl8192cu_radiob_2t_init_table; | |
431 | ret = rtl8xxxu_init_phy_rf(priv, rftable, RF_B); | |
432 | } | |
433 | ||
434 | exit: | |
435 | return ret; | |
436 | } | |
437 | ||
438 | static int rtl8192cu_power_on(struct rtl8xxxu_priv *priv) | |
439 | { | |
440 | u8 val8; | |
441 | u16 val16; | |
442 | u32 val32; | |
443 | int i; | |
444 | ||
445 | for (i = 100; i; i--) { | |
446 | val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO); | |
447 | if (val8 & APS_FSMCO_PFM_ALDN) | |
448 | break; | |
449 | } | |
450 | ||
451 | if (!i) { | |
452 | pr_info("%s: Poll failed\n", __func__); | |
453 | return -ENODEV; | |
454 | } | |
455 | ||
456 | /* | |
457 | * RSV_CTRL 0x001C[7:0] = 0x00, unlock ISO/CLK/Power control register | |
458 | */ | |
459 | rtl8xxxu_write8(priv, REG_RSV_CTRL, 0x0); | |
460 | rtl8xxxu_write8(priv, REG_SPS0_CTRL, 0x2b); | |
461 | udelay(100); | |
462 | ||
463 | val8 = rtl8xxxu_read8(priv, REG_LDOV12D_CTRL); | |
464 | if (!(val8 & LDOV12D_ENABLE)) { | |
465 | pr_info("%s: Enabling LDOV12D (%02x)\n", __func__, val8); | |
466 | val8 |= LDOV12D_ENABLE; | |
467 | rtl8xxxu_write8(priv, REG_LDOV12D_CTRL, val8); | |
468 | ||
469 | udelay(100); | |
470 | ||
471 | val8 = rtl8xxxu_read8(priv, REG_SYS_ISO_CTRL); | |
472 | val8 &= ~SYS_ISO_MD2PP; | |
473 | rtl8xxxu_write8(priv, REG_SYS_ISO_CTRL, val8); | |
474 | } | |
475 | ||
476 | /* | |
477 | * Auto enable WLAN | |
478 | */ | |
479 | val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO); | |
480 | val16 |= APS_FSMCO_MAC_ENABLE; | |
481 | rtl8xxxu_write16(priv, REG_APS_FSMCO, val16); | |
482 | ||
483 | for (i = 1000; i; i--) { | |
484 | val16 = rtl8xxxu_read16(priv, REG_APS_FSMCO); | |
485 | if (!(val16 & APS_FSMCO_MAC_ENABLE)) | |
486 | break; | |
487 | } | |
488 | if (!i) { | |
489 | pr_info("%s: FSMCO_MAC_ENABLE poll failed\n", __func__); | |
490 | return -EBUSY; | |
491 | } | |
492 | ||
493 | /* | |
494 | * Enable radio, GPIO, LED | |
495 | */ | |
496 | val16 = APS_FSMCO_HW_SUSPEND | APS_FSMCO_ENABLE_POWERDOWN | | |
497 | APS_FSMCO_PFM_ALDN; | |
498 | rtl8xxxu_write16(priv, REG_APS_FSMCO, val16); | |
499 | ||
500 | /* | |
501 | * Release RF digital isolation | |
502 | */ | |
503 | val16 = rtl8xxxu_read16(priv, REG_SYS_ISO_CTRL); | |
504 | val16 &= ~SYS_ISO_DIOR; | |
505 | rtl8xxxu_write16(priv, REG_SYS_ISO_CTRL, val16); | |
506 | ||
507 | val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL); | |
508 | val8 &= ~APSD_CTRL_OFF; | |
509 | rtl8xxxu_write8(priv, REG_APSD_CTRL, val8); | |
510 | for (i = 200; i; i--) { | |
511 | val8 = rtl8xxxu_read8(priv, REG_APSD_CTRL); | |
512 | if (!(val8 & APSD_CTRL_OFF_STATUS)) | |
513 | break; | |
514 | } | |
515 | ||
516 | if (!i) { | |
517 | pr_info("%s: APSD_CTRL poll failed\n", __func__); | |
518 | return -EBUSY; | |
519 | } | |
520 | ||
521 | /* | |
522 | * Enable MAC DMA/WMAC/SCHEDULE/SEC block | |
523 | */ | |
524 | val16 = rtl8xxxu_read16(priv, REG_CR); | |
525 | val16 |= CR_HCI_TXDMA_ENABLE | CR_HCI_RXDMA_ENABLE | | |
526 | CR_TXDMA_ENABLE | CR_RXDMA_ENABLE | CR_PROTOCOL_ENABLE | | |
527 | CR_SCHEDULE_ENABLE | CR_MAC_TX_ENABLE | CR_MAC_RX_ENABLE; | |
528 | rtl8xxxu_write16(priv, REG_CR, val16); | |
529 | ||
530 | rtl8xxxu_write8(priv, 0xfe10, 0x19); | |
531 | ||
532 | /* | |
533 | * Workaround for 8188RU LNA power leakage problem. | |
534 | */ | |
535 | if (priv->rtl_chip == RTL8188R) { | |
536 | val32 = rtl8xxxu_read32(priv, REG_FPGA0_XCD_RF_PARM); | |
537 | val32 &= ~BIT(1); | |
538 | rtl8xxxu_write32(priv, REG_FPGA0_XCD_RF_PARM, val32); | |
539 | } | |
540 | return 0; | |
541 | } | |
542 | ||
543 | struct rtl8xxxu_fileops rtl8192cu_fops = { | |
544 | .parse_efuse = rtl8192cu_parse_efuse, | |
545 | .load_firmware = rtl8192cu_load_firmware, | |
546 | .power_on = rtl8192cu_power_on, | |
547 | .power_off = rtl8xxxu_power_off, | |
548 | .reset_8051 = rtl8xxxu_reset_8051, | |
549 | .llt_init = rtl8xxxu_init_llt_table, | |
550 | .init_phy_bb = rtl8xxxu_gen1_init_phy_bb, | |
551 | .init_phy_rf = rtl8192cu_init_phy_rf, | |
552 | .phy_iq_calibrate = rtl8xxxu_gen1_phy_iq_calibrate, | |
553 | .config_channel = rtl8xxxu_gen1_config_channel, | |
554 | .parse_rx_desc = rtl8xxxu_parse_rxdesc16, | |
0a20ed8b | 555 | .init_aggregation = rtl8xxxu_gen1_init_aggregation, |
181725dd JS |
556 | .enable_rf = rtl8xxxu_gen1_enable_rf, |
557 | .disable_rf = rtl8xxxu_gen1_disable_rf, | |
558 | .usb_quirks = rtl8xxxu_gen1_usb_quirks, | |
559 | .set_tx_power = rtl8xxxu_gen1_set_tx_power, | |
560 | .update_rate_mask = rtl8xxxu_update_rate_mask, | |
561 | .report_connect = rtl8xxxu_gen1_report_connect, | |
b59415c2 | 562 | .fill_txdesc = rtl8xxxu_fill_txdesc_v1, |
181725dd | 563 | .writeN_block_size = 128, |
0a20ed8b | 564 | .rx_agg_buf_size = 16000, |
181725dd JS |
565 | .tx_desc_size = sizeof(struct rtl8xxxu_txdesc32), |
566 | .rx_desc_size = sizeof(struct rtl8xxxu_rxdesc16), | |
567 | .adda_1t_init = 0x0b1b25a0, | |
568 | .adda_1t_path_on = 0x0bdb25a0, | |
569 | .adda_2t_path_on_a = 0x04db25a4, | |
570 | .adda_2t_path_on_b = 0x0b1b25a4, | |
571 | .trxff_boundary = 0x27ff, | |
572 | .pbp_rx = PBP_PAGE_SIZE_128, | |
573 | .pbp_tx = PBP_PAGE_SIZE_128, | |
574 | .mactable = rtl8xxxu_gen1_mac_init_table, | |
b492940d JS |
575 | .total_page_num = TX_TOTAL_PAGE_NUM, |
576 | .page_num_hi = TX_PAGE_NUM_HI_PQ, | |
577 | .page_num_lo = TX_PAGE_NUM_LO_PQ, | |
578 | .page_num_norm = TX_PAGE_NUM_NORM_PQ, | |
181725dd JS |
579 | }; |
580 | #endif |