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95ea3627 | 1 | /* |
811aa9ca | 2 | Copyright (C) 2004 - 2008 rt2x00 SourceForge Project |
95ea3627 ID |
3 | <http://rt2x00.serialmonkey.com> |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the | |
17 | Free Software Foundation, Inc., | |
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | */ | |
20 | ||
21 | /* | |
22 | Module: rt2500usb | |
23 | Abstract: rt2500usb device specific routines. | |
24 | Supported chipsets: RT2570. | |
25 | */ | |
26 | ||
95ea3627 ID |
27 | #include <linux/delay.h> |
28 | #include <linux/etherdevice.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/kernel.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/usb.h> | |
33 | ||
34 | #include "rt2x00.h" | |
35 | #include "rt2x00usb.h" | |
36 | #include "rt2500usb.h" | |
37 | ||
38 | /* | |
39 | * Register access. | |
40 | * All access to the CSR registers will go through the methods | |
41 | * rt2500usb_register_read and rt2500usb_register_write. | |
42 | * BBP and RF register require indirect register access, | |
43 | * and use the CSR registers BBPCSR and RFCSR to achieve this. | |
44 | * These indirect registers work with busy bits, | |
45 | * and we will try maximal REGISTER_BUSY_COUNT times to access | |
46 | * the register while taking a REGISTER_BUSY_DELAY us delay | |
47 | * between each attampt. When the busy bit is still set at that time, | |
48 | * the access attempt is considered to have failed, | |
49 | * and we will print an error. | |
8ff48a8b | 50 | * If the csr_mutex is already held then the _lock variants must |
3d82346c | 51 | * be used instead. |
95ea3627 | 52 | */ |
0e14f6d3 | 53 | static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
54 | const unsigned int offset, |
55 | u16 *value) | |
56 | { | |
57 | __le16 reg; | |
58 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, | |
59 | USB_VENDOR_REQUEST_IN, offset, | |
c9c3b1a5 | 60 | ®, sizeof(reg), REGISTER_TIMEOUT); |
95ea3627 ID |
61 | *value = le16_to_cpu(reg); |
62 | } | |
63 | ||
3d82346c AB |
64 | static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev, |
65 | const unsigned int offset, | |
66 | u16 *value) | |
67 | { | |
68 | __le16 reg; | |
69 | rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ, | |
70 | USB_VENDOR_REQUEST_IN, offset, | |
c9c3b1a5 | 71 | ®, sizeof(reg), REGISTER_TIMEOUT); |
3d82346c AB |
72 | *value = le16_to_cpu(reg); |
73 | } | |
74 | ||
0e14f6d3 | 75 | static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
76 | const unsigned int offset, |
77 | void *value, const u16 length) | |
78 | { | |
95ea3627 ID |
79 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
80 | USB_VENDOR_REQUEST_IN, offset, | |
bd394a74 ID |
81 | value, length, |
82 | REGISTER_TIMEOUT16(length)); | |
95ea3627 ID |
83 | } |
84 | ||
0e14f6d3 | 85 | static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
86 | const unsigned int offset, |
87 | u16 value) | |
88 | { | |
89 | __le16 reg = cpu_to_le16(value); | |
90 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, | |
91 | USB_VENDOR_REQUEST_OUT, offset, | |
c9c3b1a5 | 92 | ®, sizeof(reg), REGISTER_TIMEOUT); |
95ea3627 ID |
93 | } |
94 | ||
3d82346c AB |
95 | static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev, |
96 | const unsigned int offset, | |
97 | u16 value) | |
98 | { | |
99 | __le16 reg = cpu_to_le16(value); | |
100 | rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE, | |
101 | USB_VENDOR_REQUEST_OUT, offset, | |
c9c3b1a5 | 102 | ®, sizeof(reg), REGISTER_TIMEOUT); |
3d82346c AB |
103 | } |
104 | ||
0e14f6d3 | 105 | static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
106 | const unsigned int offset, |
107 | void *value, const u16 length) | |
108 | { | |
95ea3627 ID |
109 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
110 | USB_VENDOR_REQUEST_OUT, offset, | |
bd394a74 ID |
111 | value, length, |
112 | REGISTER_TIMEOUT16(length)); | |
95ea3627 ID |
113 | } |
114 | ||
c9c3b1a5 ID |
115 | static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev, |
116 | const unsigned int offset, | |
117 | struct rt2x00_field16 field, | |
118 | u16 *reg) | |
95ea3627 | 119 | { |
95ea3627 ID |
120 | unsigned int i; |
121 | ||
122 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | |
c9c3b1a5 ID |
123 | rt2500usb_register_read_lock(rt2x00dev, offset, reg); |
124 | if (!rt2x00_get_field16(*reg, field)) | |
125 | return 1; | |
95ea3627 ID |
126 | udelay(REGISTER_BUSY_DELAY); |
127 | } | |
128 | ||
c9c3b1a5 ID |
129 | ERROR(rt2x00dev, "Indirect register access failed: " |
130 | "offset=0x%.08x, value=0x%.08x\n", offset, *reg); | |
131 | *reg = ~0; | |
132 | ||
133 | return 0; | |
95ea3627 ID |
134 | } |
135 | ||
c9c3b1a5 ID |
136 | #define WAIT_FOR_BBP(__dev, __reg) \ |
137 | rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg)) | |
138 | #define WAIT_FOR_RF(__dev, __reg) \ | |
139 | rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg)) | |
140 | ||
0e14f6d3 | 141 | static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
142 | const unsigned int word, const u8 value) |
143 | { | |
144 | u16 reg; | |
145 | ||
8ff48a8b | 146 | mutex_lock(&rt2x00dev->csr_mutex); |
3d82346c | 147 | |
95ea3627 | 148 | /* |
c9c3b1a5 ID |
149 | * Wait until the BBP becomes available, afterwards we |
150 | * can safely write the new data into the register. | |
95ea3627 | 151 | */ |
c9c3b1a5 ID |
152 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { |
153 | reg = 0; | |
154 | rt2x00_set_field16(®, PHY_CSR7_DATA, value); | |
155 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); | |
156 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); | |
3d82346c | 157 | |
c9c3b1a5 ID |
158 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); |
159 | } | |
99ade259 | 160 | |
8ff48a8b | 161 | mutex_unlock(&rt2x00dev->csr_mutex); |
95ea3627 ID |
162 | } |
163 | ||
0e14f6d3 | 164 | static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
165 | const unsigned int word, u8 *value) |
166 | { | |
167 | u16 reg; | |
168 | ||
8ff48a8b | 169 | mutex_lock(&rt2x00dev->csr_mutex); |
3d82346c | 170 | |
95ea3627 | 171 | /* |
c9c3b1a5 ID |
172 | * Wait until the BBP becomes available, afterwards we |
173 | * can safely write the read request into the register. | |
174 | * After the data has been written, we wait until hardware | |
175 | * returns the correct value, if at any time the register | |
176 | * doesn't become available in time, reg will be 0xffffffff | |
177 | * which means we return 0xff to the caller. | |
95ea3627 | 178 | */ |
c9c3b1a5 ID |
179 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { |
180 | reg = 0; | |
181 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); | |
182 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); | |
95ea3627 | 183 | |
c9c3b1a5 | 184 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); |
95ea3627 | 185 | |
c9c3b1a5 ID |
186 | if (WAIT_FOR_BBP(rt2x00dev, ®)) |
187 | rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); | |
188 | } | |
95ea3627 | 189 | |
95ea3627 | 190 | *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); |
3d82346c | 191 | |
8ff48a8b | 192 | mutex_unlock(&rt2x00dev->csr_mutex); |
95ea3627 ID |
193 | } |
194 | ||
0e14f6d3 | 195 | static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
196 | const unsigned int word, const u32 value) |
197 | { | |
198 | u16 reg; | |
95ea3627 ID |
199 | |
200 | if (!word) | |
201 | return; | |
202 | ||
8ff48a8b | 203 | mutex_lock(&rt2x00dev->csr_mutex); |
3d82346c | 204 | |
c9c3b1a5 ID |
205 | /* |
206 | * Wait until the RF becomes available, afterwards we | |
207 | * can safely write the new data into the register. | |
208 | */ | |
209 | if (WAIT_FOR_RF(rt2x00dev, ®)) { | |
210 | reg = 0; | |
211 | rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); | |
212 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg); | |
213 | ||
214 | reg = 0; | |
215 | rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); | |
216 | rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); | |
217 | rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); | |
218 | rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); | |
219 | ||
220 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg); | |
221 | rt2x00_rf_write(rt2x00dev, word, value); | |
95ea3627 ID |
222 | } |
223 | ||
8ff48a8b | 224 | mutex_unlock(&rt2x00dev->csr_mutex); |
95ea3627 ID |
225 | } |
226 | ||
227 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
743b97ca ID |
228 | static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, |
229 | const unsigned int offset, | |
230 | u32 *value) | |
95ea3627 | 231 | { |
743b97ca | 232 | rt2500usb_register_read(rt2x00dev, offset, (u16 *)value); |
95ea3627 ID |
233 | } |
234 | ||
743b97ca ID |
235 | static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, |
236 | const unsigned int offset, | |
237 | u32 value) | |
95ea3627 | 238 | { |
743b97ca | 239 | rt2500usb_register_write(rt2x00dev, offset, value); |
95ea3627 ID |
240 | } |
241 | ||
242 | static const struct rt2x00debug rt2500usb_rt2x00debug = { | |
243 | .owner = THIS_MODULE, | |
244 | .csr = { | |
743b97ca ID |
245 | .read = _rt2500usb_register_read, |
246 | .write = _rt2500usb_register_write, | |
247 | .flags = RT2X00DEBUGFS_OFFSET, | |
248 | .word_base = CSR_REG_BASE, | |
95ea3627 ID |
249 | .word_size = sizeof(u16), |
250 | .word_count = CSR_REG_SIZE / sizeof(u16), | |
251 | }, | |
252 | .eeprom = { | |
253 | .read = rt2x00_eeprom_read, | |
254 | .write = rt2x00_eeprom_write, | |
743b97ca | 255 | .word_base = EEPROM_BASE, |
95ea3627 ID |
256 | .word_size = sizeof(u16), |
257 | .word_count = EEPROM_SIZE / sizeof(u16), | |
258 | }, | |
259 | .bbp = { | |
260 | .read = rt2500usb_bbp_read, | |
261 | .write = rt2500usb_bbp_write, | |
743b97ca | 262 | .word_base = BBP_BASE, |
95ea3627 ID |
263 | .word_size = sizeof(u8), |
264 | .word_count = BBP_SIZE / sizeof(u8), | |
265 | }, | |
266 | .rf = { | |
267 | .read = rt2x00_rf_read, | |
268 | .write = rt2500usb_rf_write, | |
743b97ca | 269 | .word_base = RF_BASE, |
95ea3627 ID |
270 | .word_size = sizeof(u32), |
271 | .word_count = RF_SIZE / sizeof(u32), | |
272 | }, | |
273 | }; | |
274 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
275 | ||
771fd565 | 276 | #ifdef CONFIG_RT2X00_LIB_LEDS |
a2e1d52a | 277 | static void rt2500usb_brightness_set(struct led_classdev *led_cdev, |
a9450b70 ID |
278 | enum led_brightness brightness) |
279 | { | |
280 | struct rt2x00_led *led = | |
281 | container_of(led_cdev, struct rt2x00_led, led_dev); | |
282 | unsigned int enabled = brightness != LED_OFF; | |
a2e1d52a | 283 | u16 reg; |
a9450b70 | 284 | |
a2e1d52a | 285 | rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®); |
47b10cd1 | 286 | |
a2e1d52a ID |
287 | if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) |
288 | rt2x00_set_field16(®, MAC_CSR20_LINK, enabled); | |
289 | else if (led->type == LED_TYPE_ACTIVITY) | |
290 | rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled); | |
291 | ||
292 | rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg); | |
293 | } | |
294 | ||
295 | static int rt2500usb_blink_set(struct led_classdev *led_cdev, | |
296 | unsigned long *delay_on, | |
297 | unsigned long *delay_off) | |
298 | { | |
299 | struct rt2x00_led *led = | |
300 | container_of(led_cdev, struct rt2x00_led, led_dev); | |
301 | u16 reg; | |
302 | ||
303 | rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®); | |
304 | rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on); | |
305 | rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off); | |
306 | rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg); | |
a9450b70 | 307 | |
a2e1d52a | 308 | return 0; |
a9450b70 | 309 | } |
475433be ID |
310 | |
311 | static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, | |
312 | struct rt2x00_led *led, | |
313 | enum led_type type) | |
314 | { | |
315 | led->rt2x00dev = rt2x00dev; | |
316 | led->type = type; | |
317 | led->led_dev.brightness_set = rt2500usb_brightness_set; | |
318 | led->led_dev.blink_set = rt2500usb_blink_set; | |
319 | led->flags = LED_INITIALIZED; | |
320 | } | |
771fd565 | 321 | #endif /* CONFIG_RT2X00_LIB_LEDS */ |
a9450b70 | 322 | |
95ea3627 ID |
323 | /* |
324 | * Configuration handlers. | |
325 | */ | |
3a643d24 ID |
326 | static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev, |
327 | const unsigned int filter_flags) | |
328 | { | |
329 | u16 reg; | |
330 | ||
331 | /* | |
332 | * Start configuration steps. | |
333 | * Note that the version error will always be dropped | |
334 | * and broadcast frames will always be accepted since | |
335 | * there is no filter for it at this time. | |
336 | */ | |
337 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); | |
338 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, | |
339 | !(filter_flags & FIF_FCSFAIL)); | |
340 | rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, | |
341 | !(filter_flags & FIF_PLCPFAIL)); | |
342 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, | |
343 | !(filter_flags & FIF_CONTROL)); | |
344 | rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, | |
345 | !(filter_flags & FIF_PROMISC_IN_BSS)); | |
346 | rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, | |
e0b005fa ID |
347 | !(filter_flags & FIF_PROMISC_IN_BSS) && |
348 | !rt2x00dev->intf_ap_count); | |
3a643d24 ID |
349 | rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); |
350 | rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, | |
351 | !(filter_flags & FIF_ALLMULTI)); | |
352 | rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0); | |
353 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); | |
354 | } | |
355 | ||
6bb40dd1 ID |
356 | static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev, |
357 | struct rt2x00_intf *intf, | |
358 | struct rt2x00intf_conf *conf, | |
359 | const unsigned int flags) | |
95ea3627 | 360 | { |
6bb40dd1 | 361 | unsigned int bcn_preload; |
95ea3627 ID |
362 | u16 reg; |
363 | ||
6bb40dd1 | 364 | if (flags & CONFIG_UPDATE_TYPE) { |
6bb40dd1 ID |
365 | /* |
366 | * Enable beacon config | |
367 | */ | |
bad13639 | 368 | bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20); |
6bb40dd1 ID |
369 | rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); |
370 | rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6); | |
371 | rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, | |
05c914fe | 372 | 2 * (conf->type != NL80211_IFTYPE_STATION)); |
6bb40dd1 | 373 | rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); |
95ea3627 | 374 | |
6bb40dd1 ID |
375 | /* |
376 | * Enable synchronisation. | |
377 | */ | |
378 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); | |
379 | rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); | |
380 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); | |
381 | ||
382 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | |
fd3c91c5 | 383 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); |
6bb40dd1 | 384 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync); |
fd3c91c5 | 385 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); |
6bb40dd1 ID |
386 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
387 | } | |
95ea3627 | 388 | |
6bb40dd1 ID |
389 | if (flags & CONFIG_UPDATE_MAC) |
390 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac, | |
391 | (3 * sizeof(__le16))); | |
392 | ||
393 | if (flags & CONFIG_UPDATE_BSSID) | |
394 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid, | |
395 | (3 * sizeof(__le16))); | |
95ea3627 ID |
396 | } |
397 | ||
3a643d24 ID |
398 | static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, |
399 | struct rt2x00lib_erp *erp) | |
95ea3627 | 400 | { |
95ea3627 | 401 | u16 reg; |
95ea3627 | 402 | |
95ea3627 | 403 | rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); |
72810379 | 404 | rt2x00_set_field16(®, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout); |
95ea3627 ID |
405 | rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); |
406 | ||
407 | rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); | |
4f5af6eb | 408 | rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, |
72810379 | 409 | !!erp->short_preamble); |
95ea3627 | 410 | rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); |
95ea3627 | 411 | |
e4ea1c40 | 412 | rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates); |
95ea3627 | 413 | |
e4ea1c40 ID |
414 | rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); |
415 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); | |
416 | rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); | |
95ea3627 ID |
417 | } |
418 | ||
e4ea1c40 ID |
419 | static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, |
420 | struct antenna_setup *ant) | |
95ea3627 ID |
421 | { |
422 | u8 r2; | |
423 | u8 r14; | |
424 | u16 csr5; | |
425 | u16 csr6; | |
426 | ||
a4fe07d9 ID |
427 | /* |
428 | * We should never come here because rt2x00lib is supposed | |
429 | * to catch this and send us the correct antenna explicitely. | |
430 | */ | |
431 | BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || | |
432 | ant->tx == ANTENNA_SW_DIVERSITY); | |
433 | ||
95ea3627 ID |
434 | rt2500usb_bbp_read(rt2x00dev, 2, &r2); |
435 | rt2500usb_bbp_read(rt2x00dev, 14, &r14); | |
436 | rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); | |
437 | rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); | |
438 | ||
439 | /* | |
440 | * Configure the TX antenna. | |
441 | */ | |
addc81bd | 442 | switch (ant->tx) { |
95ea3627 ID |
443 | case ANTENNA_HW_DIVERSITY: |
444 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); | |
445 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); | |
446 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); | |
447 | break; | |
448 | case ANTENNA_A: | |
449 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); | |
450 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); | |
451 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); | |
452 | break; | |
453 | case ANTENNA_B: | |
a4fe07d9 | 454 | default: |
95ea3627 ID |
455 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); |
456 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); | |
457 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); | |
458 | break; | |
459 | } | |
460 | ||
461 | /* | |
462 | * Configure the RX antenna. | |
463 | */ | |
addc81bd | 464 | switch (ant->rx) { |
95ea3627 ID |
465 | case ANTENNA_HW_DIVERSITY: |
466 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); | |
467 | break; | |
468 | case ANTENNA_A: | |
469 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); | |
470 | break; | |
471 | case ANTENNA_B: | |
a4fe07d9 | 472 | default: |
95ea3627 ID |
473 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); |
474 | break; | |
475 | } | |
476 | ||
477 | /* | |
478 | * RT2525E and RT5222 need to flip TX I/Q | |
479 | */ | |
480 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E) || | |
481 | rt2x00_rf(&rt2x00dev->chip, RF5222)) { | |
482 | rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); | |
483 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); | |
484 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); | |
485 | ||
486 | /* | |
487 | * RT2525E does not need RX I/Q Flip. | |
488 | */ | |
489 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) | |
490 | rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); | |
491 | } else { | |
492 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); | |
493 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); | |
494 | } | |
495 | ||
496 | rt2500usb_bbp_write(rt2x00dev, 2, r2); | |
497 | rt2500usb_bbp_write(rt2x00dev, 14, r14); | |
498 | rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); | |
499 | rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); | |
500 | } | |
501 | ||
e4ea1c40 ID |
502 | static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, |
503 | struct rf_channel *rf, const int txpower) | |
504 | { | |
505 | /* | |
506 | * Set TXpower. | |
507 | */ | |
508 | rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); | |
509 | ||
510 | /* | |
511 | * For RT2525E we should first set the channel to half band higher. | |
512 | */ | |
513 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { | |
514 | static const u32 vals[] = { | |
515 | 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, | |
516 | 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, | |
517 | 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, | |
518 | 0x00000902, 0x00000906 | |
519 | }; | |
520 | ||
521 | rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); | |
522 | if (rf->rf4) | |
523 | rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); | |
524 | } | |
525 | ||
526 | rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); | |
527 | rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); | |
528 | rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); | |
529 | if (rf->rf4) | |
530 | rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); | |
531 | } | |
532 | ||
533 | static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, | |
534 | const int txpower) | |
535 | { | |
536 | u32 rf3; | |
537 | ||
538 | rt2x00_rf_read(rt2x00dev, 3, &rf3); | |
539 | rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); | |
540 | rt2500usb_rf_write(rt2x00dev, 3, rf3); | |
541 | } | |
542 | ||
95ea3627 | 543 | static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev, |
5c58ee51 | 544 | struct rt2x00lib_conf *libconf) |
95ea3627 ID |
545 | { |
546 | u16 reg; | |
547 | ||
95ea3627 | 548 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); |
5c58ee51 ID |
549 | rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, |
550 | libconf->conf->beacon_int * 4); | |
95ea3627 ID |
551 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); |
552 | } | |
553 | ||
554 | static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, | |
6bb40dd1 ID |
555 | struct rt2x00lib_conf *libconf, |
556 | const unsigned int flags) | |
95ea3627 | 557 | { |
e4ea1c40 | 558 | if (flags & IEEE80211_CONF_CHANGE_CHANNEL) |
5c58ee51 ID |
559 | rt2500usb_config_channel(rt2x00dev, &libconf->rf, |
560 | libconf->conf->power_level); | |
e4ea1c40 ID |
561 | if ((flags & IEEE80211_CONF_CHANGE_POWER) && |
562 | !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) | |
5c58ee51 ID |
563 | rt2500usb_config_txpower(rt2x00dev, |
564 | libconf->conf->power_level); | |
e4ea1c40 | 565 | if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL) |
5c58ee51 | 566 | rt2500usb_config_duration(rt2x00dev, libconf); |
95ea3627 ID |
567 | } |
568 | ||
95ea3627 ID |
569 | /* |
570 | * Link tuning | |
571 | */ | |
ebcf26da ID |
572 | static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev, |
573 | struct link_qual *qual) | |
95ea3627 ID |
574 | { |
575 | u16 reg; | |
576 | ||
577 | /* | |
578 | * Update FCS error count from register. | |
579 | */ | |
580 | rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); | |
ebcf26da | 581 | qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); |
95ea3627 ID |
582 | |
583 | /* | |
584 | * Update False CCA count from register. | |
585 | */ | |
586 | rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); | |
ebcf26da | 587 | qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); |
95ea3627 ID |
588 | } |
589 | ||
590 | static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev) | |
591 | { | |
592 | u16 eeprom; | |
593 | u16 value; | |
594 | ||
595 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); | |
596 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); | |
597 | rt2500usb_bbp_write(rt2x00dev, 24, value); | |
598 | ||
599 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); | |
600 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); | |
601 | rt2500usb_bbp_write(rt2x00dev, 25, value); | |
602 | ||
603 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); | |
604 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); | |
605 | rt2500usb_bbp_write(rt2x00dev, 61, value); | |
606 | ||
607 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); | |
608 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); | |
609 | rt2500usb_bbp_write(rt2x00dev, 17, value); | |
610 | ||
611 | rt2x00dev->link.vgc_level = value; | |
612 | } | |
613 | ||
d06193f3 ID |
614 | /* |
615 | * NOTE: This function is directly ported from legacy driver, but | |
616 | * despite it being declared it was never called. Although link tuning | |
617 | * sounds like a good idea, and usually works well for the other drivers, | |
618 | * it does _not_ work with rt2500usb. Enabling this function will result | |
619 | * in TX capabilities only until association kicks in. Immediately | |
620 | * after the successful association all TX frames will be kept in the | |
621 | * hardware queue and never transmitted. | |
622 | */ | |
623 | #if 0 | |
95ea3627 ID |
624 | static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev) |
625 | { | |
626 | int rssi = rt2x00_get_link_rssi(&rt2x00dev->link); | |
627 | u16 bbp_thresh; | |
628 | u16 vgc_bound; | |
629 | u16 sens; | |
630 | u16 r24; | |
631 | u16 r25; | |
632 | u16 r61; | |
633 | u16 r17_sens; | |
634 | u8 r17; | |
635 | u8 up_bound; | |
636 | u8 low_bound; | |
637 | ||
6bb40dd1 ID |
638 | /* |
639 | * Read current r17 value, as well as the sensitivity values | |
640 | * for the r17 register. | |
641 | */ | |
642 | rt2500usb_bbp_read(rt2x00dev, 17, &r17); | |
643 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens); | |
644 | ||
645 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound); | |
646 | up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER); | |
647 | low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER); | |
648 | ||
649 | /* | |
650 | * If we are not associated, we should go straight to the | |
651 | * dynamic CCA tuning. | |
652 | */ | |
653 | if (!rt2x00dev->intf_associated) | |
654 | goto dynamic_cca_tune; | |
655 | ||
95ea3627 ID |
656 | /* |
657 | * Determine the BBP tuning threshold and correctly | |
658 | * set BBP 24, 25 and 61. | |
659 | */ | |
660 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh); | |
661 | bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD); | |
662 | ||
663 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24); | |
664 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25); | |
665 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61); | |
666 | ||
667 | if ((rssi + bbp_thresh) > 0) { | |
668 | r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH); | |
669 | r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH); | |
670 | r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH); | |
671 | } else { | |
672 | r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW); | |
673 | r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW); | |
674 | r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW); | |
675 | } | |
676 | ||
677 | rt2500usb_bbp_write(rt2x00dev, 24, r24); | |
678 | rt2500usb_bbp_write(rt2x00dev, 25, r25); | |
679 | rt2500usb_bbp_write(rt2x00dev, 61, r61); | |
680 | ||
95ea3627 ID |
681 | /* |
682 | * A too low RSSI will cause too much false CCA which will | |
683 | * then corrupt the R17 tuning. To remidy this the tuning should | |
684 | * be stopped (While making sure the R17 value will not exceed limits) | |
685 | */ | |
686 | if (rssi >= -40) { | |
687 | if (r17 != 0x60) | |
688 | rt2500usb_bbp_write(rt2x00dev, 17, 0x60); | |
689 | return; | |
690 | } | |
691 | ||
692 | /* | |
693 | * Special big-R17 for short distance | |
694 | */ | |
695 | if (rssi >= -58) { | |
696 | sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW); | |
697 | if (r17 != sens) | |
698 | rt2500usb_bbp_write(rt2x00dev, 17, sens); | |
699 | return; | |
700 | } | |
701 | ||
702 | /* | |
703 | * Special mid-R17 for middle distance | |
704 | */ | |
705 | if (rssi >= -74) { | |
706 | sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH); | |
707 | if (r17 != sens) | |
708 | rt2500usb_bbp_write(rt2x00dev, 17, sens); | |
709 | return; | |
710 | } | |
711 | ||
712 | /* | |
713 | * Leave short or middle distance condition, restore r17 | |
714 | * to the dynamic tuning range. | |
715 | */ | |
95ea3627 | 716 | low_bound = 0x32; |
6bb40dd1 ID |
717 | if (rssi < -77) |
718 | up_bound -= (-77 - rssi); | |
95ea3627 ID |
719 | |
720 | if (up_bound < low_bound) | |
721 | up_bound = low_bound; | |
722 | ||
723 | if (r17 > up_bound) { | |
724 | rt2500usb_bbp_write(rt2x00dev, 17, up_bound); | |
725 | rt2x00dev->link.vgc_level = up_bound; | |
6bb40dd1 ID |
726 | return; |
727 | } | |
728 | ||
729 | dynamic_cca_tune: | |
730 | ||
731 | /* | |
732 | * R17 is inside the dynamic tuning range, | |
733 | * start tuning the link based on the false cca counter. | |
734 | */ | |
735 | if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) { | |
95ea3627 ID |
736 | rt2500usb_bbp_write(rt2x00dev, 17, ++r17); |
737 | rt2x00dev->link.vgc_level = r17; | |
ebcf26da | 738 | } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) { |
95ea3627 ID |
739 | rt2500usb_bbp_write(rt2x00dev, 17, --r17); |
740 | rt2x00dev->link.vgc_level = r17; | |
741 | } | |
742 | } | |
d06193f3 ID |
743 | #else |
744 | #define rt2500usb_link_tuner NULL | |
745 | #endif | |
95ea3627 ID |
746 | |
747 | /* | |
748 | * Initialization functions. | |
749 | */ | |
750 | static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) | |
751 | { | |
752 | u16 reg; | |
753 | ||
754 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, | |
755 | USB_MODE_TEST, REGISTER_TIMEOUT); | |
756 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, | |
757 | 0x00f0, REGISTER_TIMEOUT); | |
758 | ||
759 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); | |
760 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); | |
761 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); | |
762 | ||
763 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); | |
764 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); | |
765 | ||
766 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); | |
767 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); | |
768 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); | |
769 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); | |
770 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); | |
771 | ||
772 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); | |
773 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); | |
774 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); | |
775 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); | |
776 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); | |
777 | ||
778 | rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); | |
779 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); | |
780 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); | |
781 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); | |
782 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); | |
783 | rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); | |
784 | ||
785 | rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); | |
786 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); | |
787 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); | |
788 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); | |
789 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); | |
790 | rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); | |
791 | ||
792 | rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); | |
793 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); | |
794 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); | |
795 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); | |
796 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); | |
797 | rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); | |
798 | ||
799 | rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); | |
800 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); | |
801 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); | |
802 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); | |
803 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); | |
804 | rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); | |
805 | ||
1f909162 ID |
806 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
807 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); | |
808 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); | |
809 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); | |
810 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); | |
811 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
812 | ||
95ea3627 ID |
813 | rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); |
814 | rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); | |
815 | ||
816 | if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) | |
817 | return -EBUSY; | |
818 | ||
819 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); | |
820 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); | |
821 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); | |
822 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); | |
823 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); | |
824 | ||
755a957d | 825 | if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) { |
95ea3627 | 826 | rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); |
ddc827f9 | 827 | rt2x00_set_field16(®, PHY_CSR2_LNA, 0); |
95ea3627 | 828 | } else { |
ddc827f9 ID |
829 | reg = 0; |
830 | rt2x00_set_field16(®, PHY_CSR2_LNA, 1); | |
831 | rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3); | |
95ea3627 ID |
832 | } |
833 | rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); | |
834 | ||
835 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); | |
836 | rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); | |
837 | rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); | |
838 | rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); | |
839 | ||
840 | rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); | |
841 | rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, | |
842 | rt2x00dev->rx->data_size); | |
843 | rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); | |
844 | ||
845 | rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); | |
846 | rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); | |
847 | rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0xff); | |
848 | rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); | |
849 | ||
850 | rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); | |
851 | rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); | |
852 | rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); | |
853 | ||
854 | rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); | |
855 | rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); | |
856 | rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); | |
857 | ||
858 | rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); | |
859 | rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); | |
860 | rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); | |
861 | ||
862 | return 0; | |
863 | } | |
864 | ||
2b08da3f | 865 | static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
95ea3627 ID |
866 | { |
867 | unsigned int i; | |
95ea3627 | 868 | u8 value; |
95ea3627 ID |
869 | |
870 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | |
871 | rt2500usb_bbp_read(rt2x00dev, 0, &value); | |
872 | if ((value != 0xff) && (value != 0x00)) | |
2b08da3f | 873 | return 0; |
95ea3627 ID |
874 | udelay(REGISTER_BUSY_DELAY); |
875 | } | |
876 | ||
877 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); | |
878 | return -EACCES; | |
2b08da3f ID |
879 | } |
880 | ||
881 | static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) | |
882 | { | |
883 | unsigned int i; | |
884 | u16 eeprom; | |
885 | u8 value; | |
886 | u8 reg_id; | |
887 | ||
888 | if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) | |
889 | return -EACCES; | |
95ea3627 | 890 | |
95ea3627 ID |
891 | rt2500usb_bbp_write(rt2x00dev, 3, 0x02); |
892 | rt2500usb_bbp_write(rt2x00dev, 4, 0x19); | |
893 | rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); | |
894 | rt2500usb_bbp_write(rt2x00dev, 15, 0x30); | |
895 | rt2500usb_bbp_write(rt2x00dev, 16, 0xac); | |
896 | rt2500usb_bbp_write(rt2x00dev, 18, 0x18); | |
897 | rt2500usb_bbp_write(rt2x00dev, 19, 0xff); | |
898 | rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); | |
899 | rt2500usb_bbp_write(rt2x00dev, 21, 0x08); | |
900 | rt2500usb_bbp_write(rt2x00dev, 22, 0x08); | |
901 | rt2500usb_bbp_write(rt2x00dev, 23, 0x08); | |
902 | rt2500usb_bbp_write(rt2x00dev, 24, 0x80); | |
903 | rt2500usb_bbp_write(rt2x00dev, 25, 0x50); | |
904 | rt2500usb_bbp_write(rt2x00dev, 26, 0x08); | |
905 | rt2500usb_bbp_write(rt2x00dev, 27, 0x23); | |
906 | rt2500usb_bbp_write(rt2x00dev, 30, 0x10); | |
907 | rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); | |
908 | rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); | |
909 | rt2500usb_bbp_write(rt2x00dev, 34, 0x12); | |
910 | rt2500usb_bbp_write(rt2x00dev, 35, 0x50); | |
911 | rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); | |
912 | rt2500usb_bbp_write(rt2x00dev, 40, 0x02); | |
913 | rt2500usb_bbp_write(rt2x00dev, 41, 0x60); | |
914 | rt2500usb_bbp_write(rt2x00dev, 53, 0x10); | |
915 | rt2500usb_bbp_write(rt2x00dev, 54, 0x18); | |
916 | rt2500usb_bbp_write(rt2x00dev, 56, 0x08); | |
917 | rt2500usb_bbp_write(rt2x00dev, 57, 0x10); | |
918 | rt2500usb_bbp_write(rt2x00dev, 58, 0x08); | |
919 | rt2500usb_bbp_write(rt2x00dev, 61, 0x60); | |
920 | rt2500usb_bbp_write(rt2x00dev, 62, 0x10); | |
921 | rt2500usb_bbp_write(rt2x00dev, 75, 0xff); | |
922 | ||
95ea3627 ID |
923 | for (i = 0; i < EEPROM_BBP_SIZE; i++) { |
924 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); | |
925 | ||
926 | if (eeprom != 0xffff && eeprom != 0x0000) { | |
927 | reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); | |
928 | value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); | |
95ea3627 ID |
929 | rt2500usb_bbp_write(rt2x00dev, reg_id, value); |
930 | } | |
931 | } | |
95ea3627 ID |
932 | |
933 | return 0; | |
934 | } | |
935 | ||
936 | /* | |
937 | * Device state switch handlers. | |
938 | */ | |
939 | static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev, | |
940 | enum dev_state state) | |
941 | { | |
942 | u16 reg; | |
943 | ||
944 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); | |
945 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, | |
2b08da3f ID |
946 | (state == STATE_RADIO_RX_OFF) || |
947 | (state == STATE_RADIO_RX_OFF_LINK)); | |
95ea3627 ID |
948 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
949 | } | |
950 | ||
951 | static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) | |
952 | { | |
953 | /* | |
954 | * Initialize all registers. | |
955 | */ | |
2b08da3f ID |
956 | if (unlikely(rt2500usb_init_registers(rt2x00dev) || |
957 | rt2500usb_init_bbp(rt2x00dev))) | |
95ea3627 | 958 | return -EIO; |
95ea3627 | 959 | |
95ea3627 ID |
960 | return 0; |
961 | } | |
962 | ||
963 | static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) | |
964 | { | |
95ea3627 ID |
965 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); |
966 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); | |
967 | ||
968 | /* | |
969 | * Disable synchronisation. | |
970 | */ | |
971 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); | |
972 | ||
973 | rt2x00usb_disable_radio(rt2x00dev); | |
974 | } | |
975 | ||
976 | static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, | |
977 | enum dev_state state) | |
978 | { | |
979 | u16 reg; | |
980 | u16 reg2; | |
981 | unsigned int i; | |
982 | char put_to_sleep; | |
983 | char bbp_state; | |
984 | char rf_state; | |
985 | ||
986 | put_to_sleep = (state != STATE_AWAKE); | |
987 | ||
988 | reg = 0; | |
989 | rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); | |
990 | rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); | |
991 | rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); | |
992 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); | |
993 | rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); | |
994 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); | |
995 | ||
996 | /* | |
997 | * Device is not guaranteed to be in the requested state yet. | |
998 | * We must wait until the register indicates that the | |
999 | * device has entered the correct state. | |
1000 | */ | |
1001 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | |
1002 | rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); | |
1003 | bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); | |
1004 | rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); | |
1005 | if (bbp_state == state && rf_state == state) | |
1006 | return 0; | |
1007 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); | |
1008 | msleep(30); | |
1009 | } | |
1010 | ||
95ea3627 ID |
1011 | return -EBUSY; |
1012 | } | |
1013 | ||
1014 | static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |
1015 | enum dev_state state) | |
1016 | { | |
1017 | int retval = 0; | |
1018 | ||
1019 | switch (state) { | |
1020 | case STATE_RADIO_ON: | |
1021 | retval = rt2500usb_enable_radio(rt2x00dev); | |
1022 | break; | |
1023 | case STATE_RADIO_OFF: | |
1024 | rt2500usb_disable_radio(rt2x00dev); | |
1025 | break; | |
1026 | case STATE_RADIO_RX_ON: | |
61667d8d | 1027 | case STATE_RADIO_RX_ON_LINK: |
95ea3627 | 1028 | case STATE_RADIO_RX_OFF: |
61667d8d | 1029 | case STATE_RADIO_RX_OFF_LINK: |
2b08da3f ID |
1030 | rt2500usb_toggle_rx(rt2x00dev, state); |
1031 | break; | |
1032 | case STATE_RADIO_IRQ_ON: | |
1033 | case STATE_RADIO_IRQ_OFF: | |
1034 | /* No support, but no error either */ | |
95ea3627 ID |
1035 | break; |
1036 | case STATE_DEEP_SLEEP: | |
1037 | case STATE_SLEEP: | |
1038 | case STATE_STANDBY: | |
1039 | case STATE_AWAKE: | |
1040 | retval = rt2500usb_set_state(rt2x00dev, state); | |
1041 | break; | |
1042 | default: | |
1043 | retval = -ENOTSUPP; | |
1044 | break; | |
1045 | } | |
1046 | ||
2b08da3f ID |
1047 | if (unlikely(retval)) |
1048 | ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", | |
1049 | state, retval); | |
1050 | ||
95ea3627 ID |
1051 | return retval; |
1052 | } | |
1053 | ||
1054 | /* | |
1055 | * TX descriptor initialization | |
1056 | */ | |
1057 | static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |
dd3193e1 | 1058 | struct sk_buff *skb, |
61486e0f | 1059 | struct txentry_desc *txdesc) |
95ea3627 | 1060 | { |
181d6902 | 1061 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
dd3193e1 | 1062 | __le32 *txd = skbdesc->desc; |
95ea3627 ID |
1063 | u32 word; |
1064 | ||
1065 | /* | |
1066 | * Start writing the descriptor words. | |
1067 | */ | |
1068 | rt2x00_desc_read(txd, 1, &word); | |
1069 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | |
181d6902 ID |
1070 | rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs); |
1071 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); | |
1072 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); | |
95ea3627 ID |
1073 | rt2x00_desc_write(txd, 1, word); |
1074 | ||
1075 | rt2x00_desc_read(txd, 2, &word); | |
181d6902 ID |
1076 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal); |
1077 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service); | |
1078 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low); | |
1079 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high); | |
95ea3627 ID |
1080 | rt2x00_desc_write(txd, 2, word); |
1081 | ||
1082 | rt2x00_desc_read(txd, 0, &word); | |
61486e0f | 1083 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); |
95ea3627 | 1084 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
181d6902 | 1085 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
95ea3627 | 1086 | rt2x00_set_field32(&word, TXD_W0_ACK, |
181d6902 | 1087 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
95ea3627 | 1088 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
181d6902 | 1089 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
95ea3627 | 1090 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
181d6902 | 1091 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
95ea3627 | 1092 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, |
61486e0f | 1093 | test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); |
181d6902 | 1094 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1abc3656 | 1095 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len); |
95ea3627 ID |
1096 | rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE); |
1097 | rt2x00_desc_write(txd, 0, word); | |
1098 | } | |
1099 | ||
bd88a781 ID |
1100 | /* |
1101 | * TX data initialization | |
1102 | */ | |
1103 | static void rt2500usb_beacondone(struct urb *urb); | |
1104 | ||
1105 | static void rt2500usb_write_beacon(struct queue_entry *entry) | |
1106 | { | |
1107 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | |
1108 | struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); | |
1109 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; | |
1110 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | |
f1ca2167 | 1111 | int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint); |
bd88a781 ID |
1112 | int length; |
1113 | u16 reg; | |
1114 | ||
1115 | /* | |
1116 | * Add the descriptor in front of the skb. | |
1117 | */ | |
1118 | skb_push(entry->skb, entry->queue->desc_size); | |
1119 | memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len); | |
1120 | skbdesc->desc = entry->skb->data; | |
1121 | ||
1122 | /* | |
1123 | * Disable beaconing while we are reloading the beacon data, | |
1124 | * otherwise we might be sending out invalid data. | |
1125 | */ | |
1126 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | |
1127 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); | |
1128 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); | |
1129 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); | |
1130 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1131 | ||
1132 | /* | |
1133 | * USB devices cannot blindly pass the skb->len as the | |
1134 | * length of the data to usb_fill_bulk_urb. Pass the skb | |
1135 | * to the driver to determine what the length should be. | |
1136 | */ | |
f1ca2167 | 1137 | length = rt2x00dev->ops->lib->get_tx_data_len(entry); |
bd88a781 ID |
1138 | |
1139 | usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, | |
1140 | entry->skb->data, length, rt2500usb_beacondone, | |
1141 | entry); | |
1142 | ||
1143 | /* | |
1144 | * Second we need to create the guardian byte. | |
1145 | * We only need a single byte, so lets recycle | |
1146 | * the 'flags' field we are not using for beacons. | |
1147 | */ | |
1148 | bcn_priv->guardian_data = 0; | |
1149 | usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, | |
1150 | &bcn_priv->guardian_data, 1, rt2500usb_beacondone, | |
1151 | entry); | |
1152 | ||
1153 | /* | |
1154 | * Send out the guardian byte. | |
1155 | */ | |
1156 | usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); | |
1157 | } | |
1158 | ||
f1ca2167 | 1159 | static int rt2500usb_get_tx_data_len(struct queue_entry *entry) |
dd9fa2d2 ID |
1160 | { |
1161 | int length; | |
1162 | ||
1163 | /* | |
1164 | * The length _must_ be a multiple of 2, | |
1165 | * but it must _not_ be a multiple of the USB packet size. | |
1166 | */ | |
f1ca2167 ID |
1167 | length = roundup(entry->skb->len, 2); |
1168 | length += (2 * !(length % entry->queue->usb_maxpacket)); | |
dd9fa2d2 ID |
1169 | |
1170 | return length; | |
1171 | } | |
1172 | ||
95ea3627 | 1173 | static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
e58c6aca | 1174 | const enum data_queue_qid queue) |
95ea3627 ID |
1175 | { |
1176 | u16 reg; | |
1177 | ||
f019d514 ID |
1178 | if (queue != QID_BEACON) { |
1179 | rt2x00usb_kick_tx_queue(rt2x00dev, queue); | |
95ea3627 | 1180 | return; |
f019d514 | 1181 | } |
95ea3627 ID |
1182 | |
1183 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | |
1184 | if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) { | |
8af244cc ID |
1185 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); |
1186 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); | |
95ea3627 ID |
1187 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); |
1188 | /* | |
1189 | * Beacon generation will fail initially. | |
1190 | * To prevent this we need to register the TXRX_CSR19 | |
1191 | * register several times. | |
1192 | */ | |
1193 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1194 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); | |
1195 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1196 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); | |
1197 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1198 | } | |
1199 | } | |
1200 | ||
1201 | /* | |
1202 | * RX control handlers | |
1203 | */ | |
181d6902 ID |
1204 | static void rt2500usb_fill_rxdone(struct queue_entry *entry, |
1205 | struct rxdone_entry_desc *rxdesc) | |
95ea3627 | 1206 | { |
b8be63ff | 1207 | struct queue_entry_priv_usb *entry_priv = entry->priv_data; |
181d6902 ID |
1208 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
1209 | __le32 *rxd = | |
1210 | (__le32 *)(entry->skb->data + | |
b8be63ff ID |
1211 | (entry_priv->urb->actual_length - |
1212 | entry->queue->desc_size)); | |
95ea3627 ID |
1213 | u32 word0; |
1214 | u32 word1; | |
1215 | ||
f855c10b | 1216 | /* |
a26cbc65 GW |
1217 | * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of |
1218 | * frame data in rt2x00usb. | |
f855c10b | 1219 | */ |
a26cbc65 | 1220 | memcpy(skbdesc->desc, rxd, skbdesc->desc_len); |
70a96109 | 1221 | rxd = (__le32 *)skbdesc->desc; |
f855c10b ID |
1222 | |
1223 | /* | |
70a96109 | 1224 | * It is now safe to read the descriptor on all architectures. |
f855c10b | 1225 | */ |
95ea3627 ID |
1226 | rt2x00_desc_read(rxd, 0, &word0); |
1227 | rt2x00_desc_read(rxd, 1, &word1); | |
1228 | ||
4150c572 | 1229 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
181d6902 | 1230 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
4150c572 | 1231 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
181d6902 | 1232 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; |
95ea3627 ID |
1233 | |
1234 | /* | |
1235 | * Obtain the status about this packet. | |
89993890 ID |
1236 | * When frame was received with an OFDM bitrate, |
1237 | * the signal is the PLCP value. If it was received with | |
1238 | * a CCK bitrate the signal is the rate in 100kbit/s. | |
95ea3627 | 1239 | */ |
181d6902 ID |
1240 | rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); |
1241 | rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) - | |
1242 | entry->queue->rt2x00dev->rssi_offset; | |
181d6902 | 1243 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
19d30e02 | 1244 | |
19d30e02 ID |
1245 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) |
1246 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; | |
6c6aa3c0 ID |
1247 | else |
1248 | rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE; | |
19d30e02 ID |
1249 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
1250 | rxdesc->dev_flags |= RXDONE_MY_BSS; | |
7d1de806 | 1251 | |
2ae23854 MN |
1252 | /* |
1253 | * Adjust the skb memory window to the frame boundaries. | |
1254 | */ | |
2ae23854 | 1255 | skb_trim(entry->skb, rxdesc->size); |
95ea3627 ID |
1256 | } |
1257 | ||
1258 | /* | |
1259 | * Interrupt functions. | |
1260 | */ | |
1261 | static void rt2500usb_beacondone(struct urb *urb) | |
1262 | { | |
181d6902 | 1263 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
b8be63ff | 1264 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; |
95ea3627 | 1265 | |
0262ab0d | 1266 | if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) |
95ea3627 ID |
1267 | return; |
1268 | ||
1269 | /* | |
1270 | * Check if this was the guardian beacon, | |
1271 | * if that was the case we need to send the real beacon now. | |
1272 | * Otherwise we should free the sk_buffer, the device | |
1273 | * should be doing the rest of the work now. | |
1274 | */ | |
b8be63ff ID |
1275 | if (bcn_priv->guardian_urb == urb) { |
1276 | usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); | |
1277 | } else if (bcn_priv->urb == urb) { | |
181d6902 ID |
1278 | dev_kfree_skb(entry->skb); |
1279 | entry->skb = NULL; | |
95ea3627 ID |
1280 | } |
1281 | } | |
1282 | ||
1283 | /* | |
1284 | * Device probe functions. | |
1285 | */ | |
1286 | static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |
1287 | { | |
1288 | u16 word; | |
1289 | u8 *mac; | |
6bb40dd1 | 1290 | u8 bbp; |
95ea3627 ID |
1291 | |
1292 | rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); | |
1293 | ||
1294 | /* | |
1295 | * Start validation of the data that has been read. | |
1296 | */ | |
1297 | mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); | |
1298 | if (!is_valid_ether_addr(mac)) { | |
1299 | random_ether_addr(mac); | |
e174961c | 1300 | EEPROM(rt2x00dev, "MAC: %pM\n", mac); |
95ea3627 ID |
1301 | } |
1302 | ||
1303 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); | |
1304 | if (word == 0xffff) { | |
1305 | rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); | |
362f3b6b ID |
1306 | rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, |
1307 | ANTENNA_SW_DIVERSITY); | |
1308 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, | |
1309 | ANTENNA_SW_DIVERSITY); | |
1310 | rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, | |
1311 | LED_MODE_DEFAULT); | |
95ea3627 ID |
1312 | rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); |
1313 | rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); | |
1314 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); | |
1315 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); | |
1316 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); | |
1317 | } | |
1318 | ||
1319 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); | |
1320 | if (word == 0xffff) { | |
1321 | rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); | |
1322 | rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); | |
1323 | rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); | |
1324 | rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); | |
1325 | EEPROM(rt2x00dev, "NIC: 0x%04x\n", word); | |
1326 | } | |
1327 | ||
1328 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); | |
1329 | if (word == 0xffff) { | |
1330 | rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, | |
1331 | DEFAULT_RSSI_OFFSET); | |
1332 | rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); | |
1333 | EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word); | |
1334 | } | |
1335 | ||
1336 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); | |
1337 | if (word == 0xffff) { | |
1338 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); | |
1339 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); | |
1340 | EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word); | |
1341 | } | |
1342 | ||
6bb40dd1 ID |
1343 | /* |
1344 | * Switch lower vgc bound to current BBP R17 value, | |
1345 | * lower the value a bit for better quality. | |
1346 | */ | |
1347 | rt2500usb_bbp_read(rt2x00dev, 17, &bbp); | |
1348 | bbp -= 6; | |
1349 | ||
95ea3627 ID |
1350 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); |
1351 | if (word == 0xffff) { | |
1352 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); | |
6bb40dd1 | 1353 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); |
95ea3627 ID |
1354 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); |
1355 | EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); | |
8d8acd46 ID |
1356 | } else { |
1357 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); | |
1358 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); | |
95ea3627 ID |
1359 | } |
1360 | ||
1361 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); | |
1362 | if (word == 0xffff) { | |
1363 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); | |
1364 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); | |
1365 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); | |
1366 | EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word); | |
1367 | } | |
1368 | ||
1369 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); | |
1370 | if (word == 0xffff) { | |
1371 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); | |
1372 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); | |
1373 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); | |
1374 | EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word); | |
1375 | } | |
1376 | ||
1377 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); | |
1378 | if (word == 0xffff) { | |
1379 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); | |
1380 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); | |
1381 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); | |
1382 | EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word); | |
1383 | } | |
1384 | ||
1385 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); | |
1386 | if (word == 0xffff) { | |
1387 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); | |
1388 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); | |
1389 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); | |
1390 | EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word); | |
1391 | } | |
1392 | ||
1393 | return 0; | |
1394 | } | |
1395 | ||
1396 | static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) | |
1397 | { | |
1398 | u16 reg; | |
1399 | u16 value; | |
1400 | u16 eeprom; | |
1401 | ||
1402 | /* | |
1403 | * Read EEPROM word for configuration. | |
1404 | */ | |
1405 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); | |
1406 | ||
1407 | /* | |
1408 | * Identify RF chipset. | |
1409 | */ | |
1410 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); | |
1411 | rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); | |
1412 | rt2x00_set_chip(rt2x00dev, RT2570, value, reg); | |
1413 | ||
755a957d | 1414 | if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) { |
95ea3627 ID |
1415 | ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); |
1416 | return -ENODEV; | |
1417 | } | |
1418 | ||
1419 | if (!rt2x00_rf(&rt2x00dev->chip, RF2522) && | |
1420 | !rt2x00_rf(&rt2x00dev->chip, RF2523) && | |
1421 | !rt2x00_rf(&rt2x00dev->chip, RF2524) && | |
1422 | !rt2x00_rf(&rt2x00dev->chip, RF2525) && | |
1423 | !rt2x00_rf(&rt2x00dev->chip, RF2525E) && | |
1424 | !rt2x00_rf(&rt2x00dev->chip, RF5222)) { | |
1425 | ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); | |
1426 | return -ENODEV; | |
1427 | } | |
1428 | ||
1429 | /* | |
1430 | * Identify default antenna configuration. | |
1431 | */ | |
addc81bd | 1432 | rt2x00dev->default_ant.tx = |
95ea3627 | 1433 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); |
addc81bd | 1434 | rt2x00dev->default_ant.rx = |
95ea3627 ID |
1435 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); |
1436 | ||
addc81bd ID |
1437 | /* |
1438 | * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead. | |
1439 | * I am not 100% sure about this, but the legacy drivers do not | |
1440 | * indicate antenna swapping in software is required when | |
1441 | * diversity is enabled. | |
1442 | */ | |
1443 | if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY) | |
1444 | rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY; | |
1445 | if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY) | |
1446 | rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY; | |
1447 | ||
95ea3627 ID |
1448 | /* |
1449 | * Store led mode, for correct led behaviour. | |
1450 | */ | |
771fd565 | 1451 | #ifdef CONFIG_RT2X00_LIB_LEDS |
a9450b70 ID |
1452 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); |
1453 | ||
475433be ID |
1454 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
1455 | if (value == LED_MODE_TXRX_ACTIVITY) | |
1456 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, | |
1457 | LED_TYPE_ACTIVITY); | |
771fd565 | 1458 | #endif /* CONFIG_RT2X00_LIB_LEDS */ |
95ea3627 ID |
1459 | |
1460 | /* | |
1461 | * Check if the BBP tuning should be disabled. | |
1462 | */ | |
1463 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); | |
1464 | if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE)) | |
1465 | __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags); | |
1466 | ||
1467 | /* | |
1468 | * Read the RSSI <-> dBm offset information. | |
1469 | */ | |
1470 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); | |
1471 | rt2x00dev->rssi_offset = | |
1472 | rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); | |
1473 | ||
1474 | return 0; | |
1475 | } | |
1476 | ||
1477 | /* | |
1478 | * RF value list for RF2522 | |
1479 | * Supports: 2.4 GHz | |
1480 | */ | |
1481 | static const struct rf_channel rf_vals_bg_2522[] = { | |
1482 | { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, | |
1483 | { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, | |
1484 | { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, | |
1485 | { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, | |
1486 | { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, | |
1487 | { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, | |
1488 | { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, | |
1489 | { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, | |
1490 | { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, | |
1491 | { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, | |
1492 | { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, | |
1493 | { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, | |
1494 | { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, | |
1495 | { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, | |
1496 | }; | |
1497 | ||
1498 | /* | |
1499 | * RF value list for RF2523 | |
1500 | * Supports: 2.4 GHz | |
1501 | */ | |
1502 | static const struct rf_channel rf_vals_bg_2523[] = { | |
1503 | { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, | |
1504 | { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, | |
1505 | { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, | |
1506 | { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, | |
1507 | { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, | |
1508 | { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, | |
1509 | { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, | |
1510 | { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, | |
1511 | { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, | |
1512 | { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, | |
1513 | { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, | |
1514 | { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, | |
1515 | { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, | |
1516 | { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, | |
1517 | }; | |
1518 | ||
1519 | /* | |
1520 | * RF value list for RF2524 | |
1521 | * Supports: 2.4 GHz | |
1522 | */ | |
1523 | static const struct rf_channel rf_vals_bg_2524[] = { | |
1524 | { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, | |
1525 | { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, | |
1526 | { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, | |
1527 | { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, | |
1528 | { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, | |
1529 | { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, | |
1530 | { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, | |
1531 | { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, | |
1532 | { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, | |
1533 | { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, | |
1534 | { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, | |
1535 | { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, | |
1536 | { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, | |
1537 | { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, | |
1538 | }; | |
1539 | ||
1540 | /* | |
1541 | * RF value list for RF2525 | |
1542 | * Supports: 2.4 GHz | |
1543 | */ | |
1544 | static const struct rf_channel rf_vals_bg_2525[] = { | |
1545 | { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, | |
1546 | { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, | |
1547 | { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, | |
1548 | { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, | |
1549 | { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, | |
1550 | { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, | |
1551 | { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, | |
1552 | { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, | |
1553 | { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, | |
1554 | { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, | |
1555 | { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, | |
1556 | { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, | |
1557 | { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, | |
1558 | { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, | |
1559 | }; | |
1560 | ||
1561 | /* | |
1562 | * RF value list for RF2525e | |
1563 | * Supports: 2.4 GHz | |
1564 | */ | |
1565 | static const struct rf_channel rf_vals_bg_2525e[] = { | |
1566 | { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, | |
1567 | { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, | |
1568 | { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, | |
1569 | { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, | |
1570 | { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, | |
1571 | { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, | |
1572 | { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, | |
1573 | { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, | |
1574 | { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, | |
1575 | { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, | |
1576 | { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, | |
1577 | { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, | |
1578 | { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, | |
1579 | { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, | |
1580 | }; | |
1581 | ||
1582 | /* | |
1583 | * RF value list for RF5222 | |
1584 | * Supports: 2.4 GHz & 5.2 GHz | |
1585 | */ | |
1586 | static const struct rf_channel rf_vals_5222[] = { | |
1587 | { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, | |
1588 | { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, | |
1589 | { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, | |
1590 | { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, | |
1591 | { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, | |
1592 | { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, | |
1593 | { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, | |
1594 | { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, | |
1595 | { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, | |
1596 | { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, | |
1597 | { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, | |
1598 | { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, | |
1599 | { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, | |
1600 | { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, | |
1601 | ||
1602 | /* 802.11 UNI / HyperLan 2 */ | |
1603 | { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, | |
1604 | { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, | |
1605 | { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, | |
1606 | { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, | |
1607 | { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, | |
1608 | { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, | |
1609 | { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, | |
1610 | { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, | |
1611 | ||
1612 | /* 802.11 HyperLan 2 */ | |
1613 | { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, | |
1614 | { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, | |
1615 | { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, | |
1616 | { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, | |
1617 | { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, | |
1618 | { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, | |
1619 | { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, | |
1620 | { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, | |
1621 | { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, | |
1622 | { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, | |
1623 | ||
1624 | /* 802.11 UNII */ | |
1625 | { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, | |
1626 | { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, | |
1627 | { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, | |
1628 | { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, | |
1629 | { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, | |
1630 | }; | |
1631 | ||
8c5e7a5f | 1632 | static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) |
95ea3627 ID |
1633 | { |
1634 | struct hw_mode_spec *spec = &rt2x00dev->spec; | |
8c5e7a5f ID |
1635 | struct channel_info *info; |
1636 | char *tx_power; | |
95ea3627 ID |
1637 | unsigned int i; |
1638 | ||
1639 | /* | |
1640 | * Initialize all hw fields. | |
1641 | */ | |
1642 | rt2x00dev->hw->flags = | |
95ea3627 | 1643 | IEEE80211_HW_RX_INCLUDES_FCS | |
566bfe5a BR |
1644 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1645 | IEEE80211_HW_SIGNAL_DBM; | |
1646 | ||
95ea3627 | 1647 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; |
95ea3627 | 1648 | |
14a3bf89 | 1649 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
95ea3627 ID |
1650 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
1651 | rt2x00_eeprom_addr(rt2x00dev, | |
1652 | EEPROM_MAC_ADDR_0)); | |
1653 | ||
95ea3627 ID |
1654 | /* |
1655 | * Initialize hw_mode information. | |
1656 | */ | |
31562e80 ID |
1657 | spec->supported_bands = SUPPORT_BAND_2GHZ; |
1658 | spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; | |
95ea3627 ID |
1659 | |
1660 | if (rt2x00_rf(&rt2x00dev->chip, RF2522)) { | |
1661 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); | |
1662 | spec->channels = rf_vals_bg_2522; | |
1663 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) { | |
1664 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); | |
1665 | spec->channels = rf_vals_bg_2523; | |
1666 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) { | |
1667 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); | |
1668 | spec->channels = rf_vals_bg_2524; | |
1669 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) { | |
1670 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); | |
1671 | spec->channels = rf_vals_bg_2525; | |
1672 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { | |
1673 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); | |
1674 | spec->channels = rf_vals_bg_2525e; | |
1675 | } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) { | |
31562e80 | 1676 | spec->supported_bands |= SUPPORT_BAND_5GHZ; |
95ea3627 ID |
1677 | spec->num_channels = ARRAY_SIZE(rf_vals_5222); |
1678 | spec->channels = rf_vals_5222; | |
95ea3627 | 1679 | } |
8c5e7a5f ID |
1680 | |
1681 | /* | |
1682 | * Create channel information array | |
1683 | */ | |
1684 | info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL); | |
1685 | if (!info) | |
1686 | return -ENOMEM; | |
1687 | ||
1688 | spec->channels_info = info; | |
1689 | ||
1690 | tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); | |
1691 | for (i = 0; i < 14; i++) | |
1692 | info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]); | |
1693 | ||
1694 | if (spec->num_channels > 14) { | |
1695 | for (i = 14; i < spec->num_channels; i++) | |
1696 | info[i].tx_power1 = DEFAULT_TXPOWER; | |
1697 | } | |
1698 | ||
1699 | return 0; | |
95ea3627 ID |
1700 | } |
1701 | ||
1702 | static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) | |
1703 | { | |
1704 | int retval; | |
1705 | ||
1706 | /* | |
1707 | * Allocate eeprom data. | |
1708 | */ | |
1709 | retval = rt2500usb_validate_eeprom(rt2x00dev); | |
1710 | if (retval) | |
1711 | return retval; | |
1712 | ||
1713 | retval = rt2500usb_init_eeprom(rt2x00dev); | |
1714 | if (retval) | |
1715 | return retval; | |
1716 | ||
1717 | /* | |
1718 | * Initialize hw specifications. | |
1719 | */ | |
8c5e7a5f ID |
1720 | retval = rt2500usb_probe_hw_mode(rt2x00dev); |
1721 | if (retval) | |
1722 | return retval; | |
95ea3627 ID |
1723 | |
1724 | /* | |
181d6902 | 1725 | * This device requires the atim queue |
95ea3627 | 1726 | */ |
181d6902 ID |
1727 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1728 | __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | |
3a643d24 | 1729 | __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags); |
d06193f3 | 1730 | __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags); |
95ea3627 ID |
1731 | |
1732 | /* | |
1733 | * Set the rssi offset. | |
1734 | */ | |
1735 | rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; | |
1736 | ||
1737 | return 0; | |
1738 | } | |
1739 | ||
95ea3627 ID |
1740 | static const struct ieee80211_ops rt2500usb_mac80211_ops = { |
1741 | .tx = rt2x00mac_tx, | |
4150c572 JB |
1742 | .start = rt2x00mac_start, |
1743 | .stop = rt2x00mac_stop, | |
95ea3627 ID |
1744 | .add_interface = rt2x00mac_add_interface, |
1745 | .remove_interface = rt2x00mac_remove_interface, | |
1746 | .config = rt2x00mac_config, | |
1747 | .config_interface = rt2x00mac_config_interface, | |
3a643d24 | 1748 | .configure_filter = rt2x00mac_configure_filter, |
95ea3627 | 1749 | .get_stats = rt2x00mac_get_stats, |
471b3efd | 1750 | .bss_info_changed = rt2x00mac_bss_info_changed, |
95ea3627 ID |
1751 | .conf_tx = rt2x00mac_conf_tx, |
1752 | .get_tx_stats = rt2x00mac_get_tx_stats, | |
95ea3627 ID |
1753 | }; |
1754 | ||
1755 | static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { | |
1756 | .probe_hw = rt2500usb_probe_hw, | |
1757 | .initialize = rt2x00usb_initialize, | |
1758 | .uninitialize = rt2x00usb_uninitialize, | |
798b7adb | 1759 | .clear_entry = rt2x00usb_clear_entry, |
95ea3627 ID |
1760 | .set_device_state = rt2500usb_set_device_state, |
1761 | .link_stats = rt2500usb_link_stats, | |
1762 | .reset_tuner = rt2500usb_reset_tuner, | |
1763 | .link_tuner = rt2500usb_link_tuner, | |
1764 | .write_tx_desc = rt2500usb_write_tx_desc, | |
1765 | .write_tx_data = rt2x00usb_write_tx_data, | |
bd88a781 | 1766 | .write_beacon = rt2500usb_write_beacon, |
dd9fa2d2 | 1767 | .get_tx_data_len = rt2500usb_get_tx_data_len, |
95ea3627 ID |
1768 | .kick_tx_queue = rt2500usb_kick_tx_queue, |
1769 | .fill_rxdone = rt2500usb_fill_rxdone, | |
3a643d24 | 1770 | .config_filter = rt2500usb_config_filter, |
6bb40dd1 | 1771 | .config_intf = rt2500usb_config_intf, |
72810379 | 1772 | .config_erp = rt2500usb_config_erp, |
e4ea1c40 | 1773 | .config_ant = rt2500usb_config_ant, |
95ea3627 ID |
1774 | .config = rt2500usb_config, |
1775 | }; | |
1776 | ||
181d6902 ID |
1777 | static const struct data_queue_desc rt2500usb_queue_rx = { |
1778 | .entry_num = RX_ENTRIES, | |
1779 | .data_size = DATA_FRAME_SIZE, | |
1780 | .desc_size = RXD_DESC_SIZE, | |
b8be63ff | 1781 | .priv_size = sizeof(struct queue_entry_priv_usb), |
181d6902 ID |
1782 | }; |
1783 | ||
1784 | static const struct data_queue_desc rt2500usb_queue_tx = { | |
1785 | .entry_num = TX_ENTRIES, | |
1786 | .data_size = DATA_FRAME_SIZE, | |
1787 | .desc_size = TXD_DESC_SIZE, | |
b8be63ff | 1788 | .priv_size = sizeof(struct queue_entry_priv_usb), |
181d6902 ID |
1789 | }; |
1790 | ||
1791 | static const struct data_queue_desc rt2500usb_queue_bcn = { | |
1792 | .entry_num = BEACON_ENTRIES, | |
1793 | .data_size = MGMT_FRAME_SIZE, | |
1794 | .desc_size = TXD_DESC_SIZE, | |
1795 | .priv_size = sizeof(struct queue_entry_priv_usb_bcn), | |
1796 | }; | |
1797 | ||
1798 | static const struct data_queue_desc rt2500usb_queue_atim = { | |
1799 | .entry_num = ATIM_ENTRIES, | |
1800 | .data_size = DATA_FRAME_SIZE, | |
1801 | .desc_size = TXD_DESC_SIZE, | |
b8be63ff | 1802 | .priv_size = sizeof(struct queue_entry_priv_usb), |
181d6902 ID |
1803 | }; |
1804 | ||
95ea3627 | 1805 | static const struct rt2x00_ops rt2500usb_ops = { |
2360157c | 1806 | .name = KBUILD_MODNAME, |
6bb40dd1 ID |
1807 | .max_sta_intf = 1, |
1808 | .max_ap_intf = 1, | |
95ea3627 ID |
1809 | .eeprom_size = EEPROM_SIZE, |
1810 | .rf_size = RF_SIZE, | |
61448f88 | 1811 | .tx_queues = NUM_TX_QUEUES, |
181d6902 ID |
1812 | .rx = &rt2500usb_queue_rx, |
1813 | .tx = &rt2500usb_queue_tx, | |
1814 | .bcn = &rt2500usb_queue_bcn, | |
1815 | .atim = &rt2500usb_queue_atim, | |
95ea3627 ID |
1816 | .lib = &rt2500usb_rt2x00_ops, |
1817 | .hw = &rt2500usb_mac80211_ops, | |
1818 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
1819 | .debugfs = &rt2500usb_rt2x00debug, | |
1820 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
1821 | }; | |
1822 | ||
1823 | /* | |
1824 | * rt2500usb module information. | |
1825 | */ | |
1826 | static struct usb_device_id rt2500usb_device_table[] = { | |
1827 | /* ASUS */ | |
1828 | { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1829 | { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1830 | /* Belkin */ | |
1831 | { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1832 | { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1833 | { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1834 | /* Cisco Systems */ | |
1835 | { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1836 | { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1837 | { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1838 | /* Conceptronic */ | |
1839 | { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1840 | /* D-LINK */ | |
1841 | { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1842 | /* Gigabyte */ | |
1843 | { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1844 | { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1845 | /* Hercules */ | |
1846 | { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1847 | /* Melco */ | |
db433feb | 1848 | { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) }, |
95ea3627 ID |
1849 | { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) }, |
1850 | { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1851 | { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1852 | { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
95ea3627 ID |
1853 | /* MSI */ |
1854 | { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1855 | { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1856 | { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1857 | /* Ralink */ | |
1858 | { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1859 | { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1860 | { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1861 | { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1862 | /* Siemens */ | |
1863 | { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1864 | /* SMC */ | |
1865 | { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1866 | /* Spairon */ | |
1867 | { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1868 | /* Trust */ | |
1869 | { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1870 | /* Zinwell */ | |
1871 | { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1872 | { 0, } | |
1873 | }; | |
1874 | ||
1875 | MODULE_AUTHOR(DRV_PROJECT); | |
1876 | MODULE_VERSION(DRV_VERSION); | |
1877 | MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); | |
1878 | MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); | |
1879 | MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); | |
1880 | MODULE_LICENSE("GPL"); | |
1881 | ||
1882 | static struct usb_driver rt2500usb_driver = { | |
2360157c | 1883 | .name = KBUILD_MODNAME, |
95ea3627 ID |
1884 | .id_table = rt2500usb_device_table, |
1885 | .probe = rt2x00usb_probe, | |
1886 | .disconnect = rt2x00usb_disconnect, | |
1887 | .suspend = rt2x00usb_suspend, | |
1888 | .resume = rt2x00usb_resume, | |
1889 | }; | |
1890 | ||
1891 | static int __init rt2500usb_init(void) | |
1892 | { | |
1893 | return usb_register(&rt2500usb_driver); | |
1894 | } | |
1895 | ||
1896 | static void __exit rt2500usb_exit(void) | |
1897 | { | |
1898 | usb_deregister(&rt2500usb_driver); | |
1899 | } | |
1900 | ||
1901 | module_init(rt2500usb_init); | |
1902 | module_exit(rt2500usb_exit); |