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rt2x00: Remove async vendor request calls from rt2x00usb
[mirror_ubuntu-zesty-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
38/*
39 * Register access.
40 * All access to the CSR registers will go through the methods
41 * rt2500usb_register_read and rt2500usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
3d82346c
AB		 50 * If the usb_cache_mutex is already held then the _lock variants must
51 * be used instead.
95ea3627 52 */
0e14f6d3 53static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 54 const unsigned int offset,
55 u16 *value)
56{
57 __le16 reg;
58 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
59 USB_VENDOR_REQUEST_IN, offset,
60 &reg, sizeof(u16), REGISTER_TIMEOUT);
61 *value = le16_to_cpu(reg);
62}
63
3d82346c
AB		 64static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
65 const unsigned int offset,
66 u16 *value)
67{
68 __le16 reg;
69 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
70 USB_VENDOR_REQUEST_IN, offset,
71 &reg, sizeof(u16), REGISTER_TIMEOUT);
72 *value = le16_to_cpu(reg);
73}
74
0e14f6d3 75static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 76 const unsigned int offset,
77 void *value, const u16 length)
78{
79 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
80 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
81 USB_VENDOR_REQUEST_IN, offset,
82 value, length, timeout);
83}
84
0e14f6d3 85static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 86 const unsigned int offset,
87 u16 value)
88{
89 __le16 reg = cpu_to_le16(value);
90 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
91 USB_VENDOR_REQUEST_OUT, offset,
92 &reg, sizeof(u16), REGISTER_TIMEOUT);
93}
94
3d82346c
AB		 95static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
96 const unsigned int offset,
97 u16 value)
98{
99 __le16 reg = cpu_to_le16(value);
100 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
101 USB_VENDOR_REQUEST_OUT, offset,
102 &reg, sizeof(u16), REGISTER_TIMEOUT);
103}
104
0e14f6d3 105static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 106 const unsigned int offset,
107 void *value, const u16 length)
108{
109 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
110 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
111 USB_VENDOR_REQUEST_OUT, offset,
112 value, length, timeout);
113}
114
0e14f6d3 115static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 116{
117 u16 reg;
118 unsigned int i;
119
120 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 121 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
95ea3627
ID		 122 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
123 break;
124 udelay(REGISTER_BUSY_DELAY);
125 }
126
127 return reg;
128}
129
0e14f6d3 130static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 131 const unsigned int word, const u8 value)
132{
133 u16 reg;
134
3d82346c
AB		 135 mutex_lock(&rt2x00dev->usb_cache_mutex);
136
95ea3627
ID		 137 /*
138 * Wait until the BBP becomes ready.
139 */
140 reg = rt2500usb_bbp_check(rt2x00dev);
141 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
142 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
3d82346c 143 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 144 return;
145 }
146
147 /*
148 * Write the data into the BBP.
149 */
150 reg = 0;
151 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
152 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
153 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
154
3d82346c
AB		 155 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
156
157 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 158}
159
0e14f6d3 160static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 161 const unsigned int word, u8 *value)
162{
163 u16 reg;
164
3d82346c
AB		 165 mutex_lock(&rt2x00dev->usb_cache_mutex);
166
95ea3627
ID		 167 /*
168 * Wait until the BBP becomes ready.
169 */
170 reg = rt2500usb_bbp_check(rt2x00dev);
171 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
172 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
173 return;
174 }
175
176 /*
177 * Write the request into the BBP.
178 */
179 reg = 0;
180 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
181 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
182
3d82346c 183 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627
ID		 184
185 /*
186 * Wait until the BBP becomes ready.
187 */
188 reg = rt2500usb_bbp_check(rt2x00dev);
189 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
190 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
191 *value = 0xff;
3d82346c 192 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 193 return;
194 }
195
3d82346c 196 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c
AB		 198
199 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
206 unsigned int i;
207
208 if (!word)
209 return;
210
3d82346c
AB		 211 mutex_lock(&rt2x00dev->usb_cache_mutex);
212
95ea3627 213 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 214 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
95ea3627
ID		 215 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
216 goto rf_write;
217 udelay(REGISTER_BUSY_DELAY);
218 }
219
3d82346c 220 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 221 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
222 return;
223
224rf_write:
225 reg = 0;
226 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
3d82346c 227 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
95ea3627
ID		 228
229 reg = 0;
230 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
231 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
232 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
233 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
234
3d82346c 235 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
95ea3627 236 rt2x00_rf_write(rt2x00dev, word, value);
3d82346c
AB		 237
238 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 239}
240
241#ifdef CONFIG_RT2X00_LIB_DEBUGFS
242#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
243
0e14f6d3 244static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 245 const unsigned int word, u32 *data)
246{
247 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
248}
249
0e14f6d3 250static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 251 const unsigned int word, u32 data)
252{
253 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
254}
255
256static const struct rt2x00debug rt2500usb_rt2x00debug = {
257 .owner = THIS_MODULE,
258 .csr = {
259 .read = rt2500usb_read_csr,
260 .write = rt2500usb_write_csr,
261 .word_size = sizeof(u16),
262 .word_count = CSR_REG_SIZE / sizeof(u16),
263 },
264 .eeprom = {
265 .read = rt2x00_eeprom_read,
266 .write = rt2x00_eeprom_write,
267 .word_size = sizeof(u16),
268 .word_count = EEPROM_SIZE / sizeof(u16),
269 },
270 .bbp = {
271 .read = rt2500usb_bbp_read,
272 .write = rt2500usb_bbp_write,
273 .word_size = sizeof(u8),
274 .word_count = BBP_SIZE / sizeof(u8),
275 },
276 .rf = {
277 .read = rt2x00_rf_read,
278 .write = rt2500usb_rf_write,
279 .word_size = sizeof(u32),
280 .word_count = RF_SIZE / sizeof(u32),
281 },
282};
283#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
284
a9450b70
ID		 285#ifdef CONFIG_RT2500USB_LEDS
286static void rt2500usb_led_brightness(struct led_classdev *led_cdev,
287 enum led_brightness brightness)
288{
289 struct rt2x00_led *led =
290 container_of(led_cdev, struct rt2x00_led, led_dev);
291 unsigned int enabled = brightness != LED_OFF;
292 unsigned int activity =
293 led->rt2x00dev->led_flags & LED_SUPPORT_ACTIVITY;
a9450b70 294
47b10cd1
ID		 295 if (in_atomic()) {
296 NOTICE(led->rt2x00dev,
297 "Ignoring LED brightness command for led %d", led->type);
298 return;
299 }
300
a9450b70 301 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) {
3b640f21
ID		 302 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
303 MAC_CSR20_LINK, enabled);
304 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
305 MAC_CSR20_ACTIVITY, enabled && activity);
a9450b70
ID		 306 }
307
47b10cd1
ID		 308 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20,
309 led->rt2x00dev->led_mcu_reg);
a9450b70
ID		 310}
311#else
312#define rt2500usb_led_brightness NULL
313#endif /* CONFIG_RT2500USB_LEDS */
314
95ea3627
ID		 315/*
316 * Configuration handlers.
317 */
6bb40dd1
ID		 318static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
319 struct rt2x00_intf *intf,
320 struct rt2x00intf_conf *conf,
321 const unsigned int flags)
95ea3627 322{
6bb40dd1 323 unsigned int bcn_preload;
95ea3627
ID		 324 u16 reg;
325
6bb40dd1
ID		 326 if (flags & CONFIG_UPDATE_TYPE) {
327 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
95ea3627 328
6bb40dd1
ID		 329 /*
330 * Enable beacon config
331 */
332 bcn_preload = PREAMBLE + get_duration(IEEE80211_HEADER, 20);
333 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
334 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
335 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
336 2 * (conf->type != IEEE80211_IF_TYPE_STA));
337 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 338
6bb40dd1
ID		 339 /*
340 * Enable synchronisation.
341 */
342 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
343 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
344 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
345
346 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
347 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
348 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN,
349 (conf->sync == TSF_SYNC_BEACON));
350 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
351 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
352 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
353 }
95ea3627 354
6bb40dd1
ID		 355 if (flags & CONFIG_UPDATE_MAC)
356 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
357 (3 * sizeof(__le16)));
358
359 if (flags & CONFIG_UPDATE_BSSID)
360 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
361 (3 * sizeof(__le16)));
95ea3627
ID		 362}
363
6bb40dd1
ID		 364static int rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
365 const int short_preamble,
366 const int ack_timeout,
367 const int ack_consume_time)
95ea3627 368{
95ea3627 369 u16 reg;
95ea3627 370
5c58ee51 371 /*
6bb40dd1
ID		 372 * When in atomic context, we should let rt2x00lib
373 * try this configuration again later.
5c58ee51 374 */
6bb40dd1
ID		 375 if (in_atomic())
376 return -EAGAIN;
95ea3627
ID		 377
378 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
5c58ee51 379 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
95ea3627
ID		 380 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
381
382 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 383 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
5c58ee51 384 !!short_preamble);
95ea3627 385 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
6bb40dd1
ID		 386
387 return 0;
95ea3627
ID		 388}
389
390static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51 391 const int basic_rate_mask)
95ea3627 392{
5c58ee51 393 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627
ID		 394}
395
396static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 397 struct rf_channel *rf, const int txpower)
95ea3627 398{
95ea3627
ID		 399 /*
400 * Set TXpower.
401 */
5c58ee51 402 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID		 403
404 /*
405 * For RT2525E we should first set the channel to half band higher.
406 */
407 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
408 static const u32 vals[] = {
409 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
410 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
411 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
412 0x00000902, 0x00000906
413 };
414
5c58ee51
ID		 415 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
416 if (rf->rf4)
417 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 418 }
419
5c58ee51
ID		 420 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
421 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
422 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
423 if (rf->rf4)
424 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 425}
426
427static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
428 const int txpower)
429{
430 u32 rf3;
431
432 rt2x00_rf_read(rt2x00dev, 3, &rf3);
433 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
434 rt2500usb_rf_write(rt2x00dev, 3, rf3);
435}
436
437static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 438 struct antenna_setup *ant)
95ea3627
ID		 439{
440 u8 r2;
441 u8 r14;
442 u16 csr5;
443 u16 csr6;
444
445 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
446 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
447 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
448 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
449
450 /*
451 * Configure the TX antenna.
452 */
addc81bd 453 switch (ant->tx) {
95ea3627
ID		 454 case ANTENNA_HW_DIVERSITY:
455 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
456 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
457 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
458 break;
459 case ANTENNA_A:
460 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
461 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
462 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
463 break;
39e75857
ID		 464 case ANTENNA_SW_DIVERSITY:
465 /*
466 * NOTE: We should never come here because rt2x00lib is
467 * supposed to catch this and send us the correct antenna
468 * explicitely. However we are nog going to bug about this.
469 * Instead, just default to antenna B.
470 */
95ea3627
ID		 471 case ANTENNA_B:
472 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
473 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
474 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
475 break;
476 }
477
478 /*
479 * Configure the RX antenna.
480 */
addc81bd 481 switch (ant->rx) {
95ea3627
ID		 482 case ANTENNA_HW_DIVERSITY:
483 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
484 break;
485 case ANTENNA_A:
486 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
487 break;
39e75857
ID		 488 case ANTENNA_SW_DIVERSITY:
489 /*
490 * NOTE: We should never come here because rt2x00lib is
491 * supposed to catch this and send us the correct antenna
492 * explicitely. However we are nog going to bug about this.
493 * Instead, just default to antenna B.
494 */
95ea3627
ID		 495 case ANTENNA_B:
496 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
497 break;
498 }
499
500 /*
501 * RT2525E and RT5222 need to flip TX I/Q
502 */
503 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
504 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
505 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
506 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
507 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
508
509 /*
510 * RT2525E does not need RX I/Q Flip.
511 */
512 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
513 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
514 } else {
515 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
516 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
517 }
518
519 rt2500usb_bbp_write(rt2x00dev, 2, r2);
520 rt2500usb_bbp_write(rt2x00dev, 14, r14);
521 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
522 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
523}
524
525static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 526 struct rt2x00lib_conf *libconf)
95ea3627
ID		 527{
528 u16 reg;
529
5c58ee51 530 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
f5507ce9
ID		 531 rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
532 rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
95ea3627
ID		 533
534 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 535 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
536 libconf->conf->beacon_int * 4);
95ea3627
ID		 537 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
538}
539
540static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 541 struct rt2x00lib_conf *libconf,
542 const unsigned int flags)
95ea3627 543{
95ea3627 544 if (flags & CONFIG_UPDATE_PHYMODE)
f5507ce9 545 rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
95ea3627 546 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID		 547 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
548 libconf->conf->power_level);
95ea3627 549 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID		 550 rt2500usb_config_txpower(rt2x00dev,
551 libconf->conf->power_level);
95ea3627 552 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 553 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 554 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 555 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 556}
557
95ea3627
ID		 558/*
559 * Link tuning
560 */
ebcf26da
ID		 561static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
562 struct link_qual *qual)
95ea3627
ID		 563{
564 u16 reg;
565
566 /*
567 * Update FCS error count from register.
568 */
569 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 570 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 571
572 /*
573 * Update False CCA count from register.
574 */
575 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 576 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 577}
578
579static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
580{
581 u16 eeprom;
582 u16 value;
583
584 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
585 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
586 rt2500usb_bbp_write(rt2x00dev, 24, value);
587
588 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
589 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
590 rt2500usb_bbp_write(rt2x00dev, 25, value);
591
592 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
593 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
594 rt2500usb_bbp_write(rt2x00dev, 61, value);
595
596 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
597 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
598 rt2500usb_bbp_write(rt2x00dev, 17, value);
599
600 rt2x00dev->link.vgc_level = value;
601}
602
603static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
604{
605 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
606 u16 bbp_thresh;
607 u16 vgc_bound;
608 u16 sens;
609 u16 r24;
610 u16 r25;
611 u16 r61;
612 u16 r17_sens;
613 u8 r17;
614 u8 up_bound;
615 u8 low_bound;
616
6bb40dd1
ID		 617 /*
618 * Read current r17 value, as well as the sensitivity values
619 * for the r17 register.
620 */
621 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
622 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
623
624 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
625 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
626 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
627
628 /*
629 * If we are not associated, we should go straight to the
630 * dynamic CCA tuning.
631 */
632 if (!rt2x00dev->intf_associated)
633 goto dynamic_cca_tune;
634
95ea3627
ID		 635 /*
636 * Determine the BBP tuning threshold and correctly
637 * set BBP 24, 25 and 61.
638 */
639 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
640 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
641
642 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
643 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
644 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
645
646 if ((rssi + bbp_thresh) > 0) {
647 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
648 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
649 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
650 } else {
651 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
652 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
653 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
654 }
655
656 rt2500usb_bbp_write(rt2x00dev, 24, r24);
657 rt2500usb_bbp_write(rt2x00dev, 25, r25);
658 rt2500usb_bbp_write(rt2x00dev, 61, r61);
659
95ea3627
ID		 660 /*
661 * A too low RSSI will cause too much false CCA which will
662 * then corrupt the R17 tuning. To remidy this the tuning should
663 * be stopped (While making sure the R17 value will not exceed limits)
664 */
665 if (rssi >= -40) {
666 if (r17 != 0x60)
667 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
668 return;
669 }
670
671 /*
672 * Special big-R17 for short distance
673 */
674 if (rssi >= -58) {
675 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
676 if (r17 != sens)
677 rt2500usb_bbp_write(rt2x00dev, 17, sens);
678 return;
679 }
680
681 /*
682 * Special mid-R17 for middle distance
683 */
684 if (rssi >= -74) {
685 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
686 if (r17 != sens)
687 rt2500usb_bbp_write(rt2x00dev, 17, sens);
688 return;
689 }
690
691 /*
692 * Leave short or middle distance condition, restore r17
693 * to the dynamic tuning range.
694 */
95ea3627 695 low_bound = 0x32;
6bb40dd1
ID		 696 if (rssi < -77)
697 up_bound -= (-77 - rssi);
95ea3627
ID		 698
699 if (up_bound < low_bound)
700 up_bound = low_bound;
701
702 if (r17 > up_bound) {
703 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
704 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 705 return;
706 }
707
708dynamic_cca_tune:
709
710 /*
711 * R17 is inside the dynamic tuning range,
712 * start tuning the link based on the false cca counter.
713 */
714 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 715 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
716 rt2x00dev->link.vgc_level = r17;
ebcf26da 717 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 718 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
719 rt2x00dev->link.vgc_level = r17;
720 }
721}
722
723/*
724 * Initialization functions.
725 */
726static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
727{
728 u16 reg;
729
730 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
731 USB_MODE_TEST, REGISTER_TIMEOUT);
732 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
733 0x00f0, REGISTER_TIMEOUT);
734
735 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
736 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
737 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
738
739 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
740 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
741
742 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
743 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
744 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
745 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
746 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
747
748 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
749 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
750 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
751 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
752 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
753
a9450b70
ID		 754 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
755 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
756 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
757 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
758
95ea3627
ID		 759 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
760 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
761 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
762 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
763 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
764 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
765
766 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
767 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
768 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
769 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
770 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
771 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
772
773 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
774 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
775 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
776 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
777 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
778 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
779
780 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
781 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
782 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
783 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
784 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
785 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
786
787 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
788 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
789
790 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
791 return -EBUSY;
792
793 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
794 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
795 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
796 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
797 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
798
755a957d 799 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 800 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 801 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 802 } else {
ddc827f9
ID		 803 reg = 0;
804 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
805 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 806 }
807 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
808
809 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
810 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
811 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
812 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
813
814 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
815 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
816 rt2x00dev->rx->data_size);
817 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
818
819 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
820 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
821 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
822 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
823
824 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
825 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
826 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
827
828 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
829 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
830 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
831
832 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
833 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
834 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
835
836 return 0;
837}
838
839static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
840{
841 unsigned int i;
842 u16 eeprom;
843 u8 value;
844 u8 reg_id;
845
846 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
847 rt2500usb_bbp_read(rt2x00dev, 0, &value);
848 if ((value != 0xff) && (value != 0x00))
849 goto continue_csr_init;
850 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
851 udelay(REGISTER_BUSY_DELAY);
852 }
853
854 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
855 return -EACCES;
856
857continue_csr_init:
858 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
859 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
860 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
861 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
862 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
863 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
864 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
865 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
866 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
867 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
868 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
869 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
870 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
871 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
872 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
873 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
874 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
875 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
876 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
877 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
878 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
879 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
880 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
881 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
882 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
883 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
884 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
885 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
886 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
887 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
888 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
889
95ea3627
ID		 890 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
891 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
892
893 if (eeprom != 0xffff && eeprom != 0x0000) {
894 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
895 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 896 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
897 }
898 }
95ea3627
ID		 899
900 return 0;
901}
902
903/*
904 * Device state switch handlers.
905 */
906static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
907 enum dev_state state)
908{
909 u16 reg;
910
911 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
912 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
913 state == STATE_RADIO_RX_OFF);
914 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
915}
916
917static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
918{
919 /*
920 * Initialize all registers.
921 */
922 if (rt2500usb_init_registers(rt2x00dev) ||
923 rt2500usb_init_bbp(rt2x00dev)) {
924 ERROR(rt2x00dev, "Register initialization failed.\n");
925 return -EIO;
926 }
927
95ea3627
ID		 928 return 0;
929}
930
931static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
932{
95ea3627
ID		 933 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
934 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
935
936 /*
937 * Disable synchronisation.
938 */
939 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
940
941 rt2x00usb_disable_radio(rt2x00dev);
942}
943
944static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
945 enum dev_state state)
946{
947 u16 reg;
948 u16 reg2;
949 unsigned int i;
950 char put_to_sleep;
951 char bbp_state;
952 char rf_state;
953
954 put_to_sleep = (state != STATE_AWAKE);
955
956 reg = 0;
957 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
958 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
959 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
960 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
961 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
962 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
963
964 /*
965 * Device is not guaranteed to be in the requested state yet.
966 * We must wait until the register indicates that the
967 * device has entered the correct state.
968 */
969 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
970 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
971 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
972 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
973 if (bbp_state == state && rf_state == state)
974 return 0;
975 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
976 msleep(30);
977 }
978
979 NOTICE(rt2x00dev, "Device failed to enter state %d, "
980 "current device state: bbp %d and rf %d.\n",
981 state, bbp_state, rf_state);
982
983 return -EBUSY;
984}
985
986static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
987 enum dev_state state)
988{
989 int retval = 0;
990
991 switch (state) {
992 case STATE_RADIO_ON:
993 retval = rt2500usb_enable_radio(rt2x00dev);
994 break;
995 case STATE_RADIO_OFF:
996 rt2500usb_disable_radio(rt2x00dev);
997 break;
998 case STATE_RADIO_RX_ON:
61667d8d
ID		 999 case STATE_RADIO_RX_ON_LINK:
1000 rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
1001 break;
95ea3627 1002 case STATE_RADIO_RX_OFF:
61667d8d
ID		 1003 case STATE_RADIO_RX_OFF_LINK:
1004 rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
95ea3627
ID		 1005 break;
1006 case STATE_DEEP_SLEEP:
1007 case STATE_SLEEP:
1008 case STATE_STANDBY:
1009 case STATE_AWAKE:
1010 retval = rt2500usb_set_state(rt2x00dev, state);
1011 break;
1012 default:
1013 retval = -ENOTSUPP;
1014 break;
1015 }
1016
1017 return retval;
1018}
1019
1020/*
1021 * TX descriptor initialization
1022 */
1023static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1024 struct sk_buff *skb,
181d6902 1025 struct txentry_desc *txdesc,
95ea3627
ID		 1026 struct ieee80211_tx_control *control)
1027{
181d6902 1028 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1029 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1030 u32 word;
1031
1032 /*
1033 * Start writing the descriptor words.
1034 */
1035 rt2x00_desc_read(txd, 1, &word);
1036 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
181d6902
ID		 1037 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1038 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1039 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1040 rt2x00_desc_write(txd, 1, word);
1041
1042 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1043 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1044 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1045 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1046 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1047 rt2x00_desc_write(txd, 2, word);
1048
1049 rt2x00_desc_read(txd, 0, &word);
1050 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1051 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1052 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1053 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1054 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1055 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1056 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1057 rt2x00_set_field32(&word, TXD_W0_OFDM,
181d6902 1058 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
95ea3627
ID		 1059 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1060 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
181d6902 1061 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
dd3193e1 1062 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
95ea3627
ID		 1063 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1064 rt2x00_desc_write(txd, 0, word);
1065}
1066
dd9fa2d2 1067static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1068 struct sk_buff *skb)
dd9fa2d2
ID		 1069{
1070 int length;
1071
1072 /*
1073 * The length _must_ be a multiple of 2,
1074 * but it must _not_ be a multiple of the USB packet size.
1075 */
1076 length = roundup(skb->len, 2);
b242e891 1077 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID		 1078
1079 return length;
1080}
1081
95ea3627
ID		 1082/*
1083 * TX data initialization
1084 */
1085static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
5957da4c 1086 const unsigned int queue)
95ea3627
ID		 1087{
1088 u16 reg;
1089
5957da4c 1090 if (queue != RT2X00_BCN_QUEUE_BEACON)
95ea3627
ID		 1091 return;
1092
1093 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1094 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1095 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1096 /*
1097 * Beacon generation will fail initially.
1098 * To prevent this we need to register the TXRX_CSR19
1099 * register several times.
1100 */
1101 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1102 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1103 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1104 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1105 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1106 }
1107}
1108
1109/*
1110 * RX control handlers
1111 */
181d6902
ID		 1112static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1113 struct rxdone_entry_desc *rxdesc)
95ea3627 1114{
181d6902
ID		 1115 struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data;
1116 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1117 __le32 *rxd =
1118 (__le32 *)(entry->skb->data +
1119 (priv_rx->urb->actual_length - entry->queue->desc_size));
1120 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
1121 int header_size = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
95ea3627
ID		 1122 u32 word0;
1123 u32 word1;
1124
1125 rt2x00_desc_read(rxd, 0, &word0);
1126 rt2x00_desc_read(rxd, 1, &word1);
1127
181d6902 1128 rxdesc->flags = 0;
4150c572 1129 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1130 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1131 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1132 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1133
1134 /*
1135 * Obtain the status about this packet.
1136 */
181d6902
ID		 1137 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1138 rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
1139 entry->queue->rt2x00dev->rssi_offset;
1140 rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1141 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1142 rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS);
7d1de806 1143
7d1de806 1144 /*
181d6902
ID		 1145 * The data behind the ieee80211 header must be
1146 * aligned on a 4 byte boundary.
1147 */
1148 if (header_size % 4 == 0) {
1149 skb_push(entry->skb, 2);
1150 memmove(entry->skb->data, entry->skb->data + 2,
1151 entry->skb->len - 2);
1152 }
1153
1154 /*
1155 * Set descriptor pointer.
7d1de806 1156 */
7d1de806 1157 skbdesc->data = entry->skb->data;
647d0ca9 1158 skbdesc->data_len = rxdesc->size;
181d6902
ID		 1159 skbdesc->desc = entry->skb->data + rxdesc->size;
1160 skbdesc->desc_len = entry->queue->desc_size;
1161
1162 /*
1163 * Remove descriptor from skb buffer and trim the whole thing
1164 * down to only contain data.
1165 */
1166 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1167}
1168
1169/*
1170 * Interrupt functions.
1171 */
1172static void rt2500usb_beacondone(struct urb *urb)
1173{
181d6902
ID		 1174 struct queue_entry *entry = (struct queue_entry *)urb->context;
1175 struct queue_entry_priv_usb_bcn *priv_bcn = entry->priv_data;
95ea3627 1176
181d6902 1177 if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1178 return;
1179
1180 /*
1181 * Check if this was the guardian beacon,
1182 * if that was the case we need to send the real beacon now.
1183 * Otherwise we should free the sk_buffer, the device
1184 * should be doing the rest of the work now.
1185 */
181d6902
ID		 1186 if (priv_bcn->guardian_urb == urb) {
1187 usb_submit_urb(priv_bcn->urb, GFP_ATOMIC);
1188 } else if (priv_bcn->urb == urb) {
1189 dev_kfree_skb(entry->skb);
1190 entry->skb = NULL;
95ea3627
ID		 1191 }
1192}
1193
1194/*
1195 * Device probe functions.
1196 */
1197static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1198{
1199 u16 word;
1200 u8 *mac;
6bb40dd1 1201 u8 bbp;
95ea3627
ID		 1202
1203 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1204
1205 /*
1206 * Start validation of the data that has been read.
1207 */
1208 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1209 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1210 DECLARE_MAC_BUF(macbuf);
1211
95ea3627 1212 random_ether_addr(mac);
0795af57 1213 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1214 }
1215
1216 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1217 if (word == 0xffff) {
1218 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1219 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1220 ANTENNA_SW_DIVERSITY);
1221 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1222 ANTENNA_SW_DIVERSITY);
1223 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1224 LED_MODE_DEFAULT);
95ea3627
ID		 1225 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1226 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1227 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1228 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1229 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1230 }
1231
1232 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1233 if (word == 0xffff) {
1234 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1235 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1236 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1237 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1238 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1239 }
1240
1241 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1242 if (word == 0xffff) {
1243 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1244 DEFAULT_RSSI_OFFSET);
1245 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1246 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1247 }
1248
1249 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1250 if (word == 0xffff) {
1251 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1252 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1253 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1254 }
1255
6bb40dd1
ID		 1256 /*
1257 * Switch lower vgc bound to current BBP R17 value,
1258 * lower the value a bit for better quality.
1259 */
1260 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1261 bbp -= 6;
1262
95ea3627
ID		 1263 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1264 if (word == 0xffff) {
1265 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1266 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1267 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1268 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1269 }
1270
1271 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1272 if (word == 0xffff) {
1273 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1274 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1275 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1276 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
6bb40dd1
ID		 1277 } else {
1278 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1279 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1280 }
1281
1282 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1283 if (word == 0xffff) {
1284 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1285 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1286 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1287 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1288 }
1289
1290 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1291 if (word == 0xffff) {
1292 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1293 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1294 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1295 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1296 }
1297
1298 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1299 if (word == 0xffff) {
1300 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1301 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1302 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1303 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1304 }
1305
1306 return 0;
1307}
1308
1309static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1310{
1311 u16 reg;
1312 u16 value;
1313 u16 eeprom;
1314
1315 /*
1316 * Read EEPROM word for configuration.
1317 */
1318 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1319
1320 /*
1321 * Identify RF chipset.
1322 */
1323 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1324 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1325 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1326
755a957d 1327 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1328 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1329 return -ENODEV;
1330 }
1331
1332 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1333 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1334 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1335 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1336 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1337 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1338 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1339 return -ENODEV;
1340 }
1341
1342 /*
1343 * Identify default antenna configuration.
1344 */
addc81bd 1345 rt2x00dev->default_ant.tx =
95ea3627 1346 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1347 rt2x00dev->default_ant.rx =
95ea3627
ID		 1348 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1349
addc81bd
ID		 1350 /*
1351 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1352 * I am not 100% sure about this, but the legacy drivers do not
1353 * indicate antenna swapping in software is required when
1354 * diversity is enabled.
1355 */
1356 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1357 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1358 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1359 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1360
95ea3627
ID		 1361 /*
1362 * Store led mode, for correct led behaviour.
1363 */
a9450b70
ID		 1364#ifdef CONFIG_RT2500USB_LEDS
1365 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1366
1367 switch (value) {
1368 case LED_MODE_ASUS:
1369 case LED_MODE_ALPHA:
1370 case LED_MODE_DEFAULT:
1371 rt2x00dev->led_flags = LED_SUPPORT_RADIO;
1372 break;
1373 case LED_MODE_TXRX_ACTIVITY:
1374 rt2x00dev->led_flags =
1375 LED_SUPPORT_RADIO | LED_SUPPORT_ACTIVITY;
1376 break;
1377 case LED_MODE_SIGNAL_STRENGTH:
1378 rt2x00dev->led_flags = LED_SUPPORT_RADIO;
1379 break;
1380 }
3b640f21
ID		 1381
1382 /*
1383 * Store the current led register value, we need it later
1384 * in set_brightness but that is called in irq context which
1385 * means we can't use rt2500usb_register_read() at that time.
1386 */
1387 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &rt2x00dev->led_mcu_reg);
a9450b70 1388#endif /* CONFIG_RT2500USB_LEDS */
95ea3627
ID		 1389
1390 /*
1391 * Check if the BBP tuning should be disabled.
1392 */
1393 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1394 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1395 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1396
1397 /*
1398 * Read the RSSI <-> dBm offset information.
1399 */
1400 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1401 rt2x00dev->rssi_offset =
1402 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1403
1404 return 0;
1405}
1406
1407/*
1408 * RF value list for RF2522
1409 * Supports: 2.4 GHz
1410 */
1411static const struct rf_channel rf_vals_bg_2522[] = {
1412 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1413 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1414 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1415 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1416 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1417 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1418 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1419 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1420 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1421 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1422 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1423 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1424 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1425 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1426};
1427
1428/*
1429 * RF value list for RF2523
1430 * Supports: 2.4 GHz
1431 */
1432static const struct rf_channel rf_vals_bg_2523[] = {
1433 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1434 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1435 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1436 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1437 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1438 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1439 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1440 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1441 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1442 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1443 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1444 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1445 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1446 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1447};
1448
1449/*
1450 * RF value list for RF2524
1451 * Supports: 2.4 GHz
1452 */
1453static const struct rf_channel rf_vals_bg_2524[] = {
1454 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1455 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1456 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1457 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1458 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1459 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1460 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1461 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1462 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1463 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1464 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1465 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1466 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1467 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1468};
1469
1470/*
1471 * RF value list for RF2525
1472 * Supports: 2.4 GHz
1473 */
1474static const struct rf_channel rf_vals_bg_2525[] = {
1475 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1476 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1477 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1478 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1479 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1480 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1481 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1482 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1483 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1484 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1485 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1486 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1487 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1488 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1489};
1490
1491/*
1492 * RF value list for RF2525e
1493 * Supports: 2.4 GHz
1494 */
1495static const struct rf_channel rf_vals_bg_2525e[] = {
1496 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1497 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1498 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1499 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1500 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1501 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1502 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1503 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1504 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1505 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1506 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1507 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1508 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1509 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1510};
1511
1512/*
1513 * RF value list for RF5222
1514 * Supports: 2.4 GHz & 5.2 GHz
1515 */
1516static const struct rf_channel rf_vals_5222[] = {
1517 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1518 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1519 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1520 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1521 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1522 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1523 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1524 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1525 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1526 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1527 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1528 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1529 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1530 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1531
1532 /* 802.11 UNI / HyperLan 2 */
1533 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1534 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1535 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1536 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1537 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1538 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1539 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1540 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1541
1542 /* 802.11 HyperLan 2 */
1543 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1544 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1545 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1546 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1547 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1548 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1549 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1550 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1551 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1552 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1553
1554 /* 802.11 UNII */
1555 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1556 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1557 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1558 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1559 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1560};
1561
1562static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1563{
1564 struct hw_mode_spec *spec = &rt2x00dev->spec;
1565 u8 *txpower;
1566 unsigned int i;
1567
1568 /*
1569 * Initialize all hw fields.
1570 */
1571 rt2x00dev->hw->flags =
1572 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1573 IEEE80211_HW_RX_INCLUDES_FCS |
4150c572 1574 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
95ea3627
ID		 1575 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1576 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1577 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1578 rt2x00dev->hw->queues = 2;
1579
1580 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1581 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1582 rt2x00_eeprom_addr(rt2x00dev,
1583 EEPROM_MAC_ADDR_0));
1584
1585 /*
1586 * Convert tx_power array in eeprom.
1587 */
1588 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1589 for (i = 0; i < 14; i++)
1590 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1591
1592 /*
1593 * Initialize hw_mode information.
1594 */
31562e80
ID		 1595 spec->supported_bands = SUPPORT_BAND_2GHZ;
1596 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1597 spec->tx_power_a = NULL;
1598 spec->tx_power_bg = txpower;
1599 spec->tx_power_default = DEFAULT_TXPOWER;
1600
1601 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1602 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1603 spec->channels = rf_vals_bg_2522;
1604 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1605 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1606 spec->channels = rf_vals_bg_2523;
1607 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1608 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1609 spec->channels = rf_vals_bg_2524;
1610 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1611 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1612 spec->channels = rf_vals_bg_2525;
1613 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1614 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1615 spec->channels = rf_vals_bg_2525e;
1616 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1617 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1618 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1619 spec->channels = rf_vals_5222;
95ea3627
ID		 1620 }
1621}
1622
1623static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1624{
1625 int retval;
1626
1627 /*
1628 * Allocate eeprom data.
1629 */
1630 retval = rt2500usb_validate_eeprom(rt2x00dev);
1631 if (retval)
1632 return retval;
1633
1634 retval = rt2500usb_init_eeprom(rt2x00dev);
1635 if (retval)
1636 return retval;
1637
1638 /*
1639 * Initialize hw specifications.
1640 */
1641 rt2500usb_probe_hw_mode(rt2x00dev);
1642
1643 /*
181d6902 1644 * This device requires the atim queue
95ea3627 1645 */
181d6902
ID		 1646 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1647 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
95ea3627
ID		 1648
1649 /*
1650 * Set the rssi offset.
1651 */
1652 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1653
1654 return 0;
1655}
1656
1657/*
1658 * IEEE80211 stack callback functions.
1659 */
4150c572
JB		 1660static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1661 unsigned int changed_flags,
1662 unsigned int *total_flags,
1663 int mc_count,
1664 struct dev_addr_list *mc_list)
1665{
1666 struct rt2x00_dev *rt2x00dev = hw->priv;
4150c572
JB		 1667 u16 reg;
1668
1669 /*
1670 * Mask off any flags we are going to ignore from
1671 * the total_flags field.
1672 */
1673 *total_flags &=
1674 FIF_ALLMULTI |
1675 FIF_FCSFAIL |
1676 FIF_PLCPFAIL |
1677 FIF_CONTROL |
1678 FIF_OTHER_BSS |
1679 FIF_PROMISC_IN_BSS;
1680
1681 /*
1682 * Apply some rules to the filters:
1683 * - Some filters imply different filters to be set.
1684 * - Some things we can't filter out at all.
4150c572
JB		 1685 */
1686 if (mc_count)
1687 *total_flags |= FIF_ALLMULTI;
5886d0db
ID		 1688 if (*total_flags & FIF_OTHER_BSS ||
1689 *total_flags & FIF_PROMISC_IN_BSS)
4150c572 1690 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
4150c572
JB		 1691
1692 /*
1693 * Check if there is any work left for us.
1694 */
3c4f2085 1695 if (rt2x00dev->packet_filter == *total_flags)
4150c572 1696 return;
3c4f2085 1697 rt2x00dev->packet_filter = *total_flags;
4150c572
JB		 1698
1699 /*
1700 * When in atomic context, reschedule and let rt2x00lib
1701 * call this function again.
1702 */
1703 if (in_atomic()) {
1704 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1705 return;
1706 }
1707
1708 /*
1709 * Start configuration steps.
1710 * Note that the version error will always be dropped
1711 * and broadcast frames will always be accepted since
1712 * there is no filter for it at this time.
1713 */
1714 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1715 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1716 !(*total_flags & FIF_FCSFAIL));
1717 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1718 !(*total_flags & FIF_PLCPFAIL));
1719 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1720 !(*total_flags & FIF_CONTROL));
1721 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1722 !(*total_flags & FIF_PROMISC_IN_BSS));
1723 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1724 !(*total_flags & FIF_PROMISC_IN_BSS));
1725 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1726 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1727 !(*total_flags & FIF_ALLMULTI));
1728 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1729 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1730}
1731
95ea3627
ID		 1732static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1733 struct sk_buff *skb,
1734 struct ieee80211_tx_control *control)
1735{
1736 struct rt2x00_dev *rt2x00dev = hw->priv;
181d6902 1737 struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev);
6bb40dd1 1738 struct rt2x00_intf *intf = vif_to_intf(control->vif);
181d6902
ID		 1739 struct queue_entry_priv_usb_bcn *priv_bcn;
1740 struct skb_frame_desc *skbdesc;
dd9fa2d2 1741 int pipe = usb_sndbulkpipe(usb_dev, 1);
95ea3627
ID		 1742 int length;
1743
6bb40dd1
ID		 1744 if (unlikely(!intf->beacon))
1745 return -ENOBUFS;
1746
1747 priv_bcn = intf->beacon->priv_data;
95ea3627
ID		 1748
1749 /*
08992f7f 1750 * Add the descriptor in front of the skb.
95ea3627 1751 */
6bb40dd1
ID		 1752 skb_push(skb, intf->beacon->queue->desc_size);
1753 memset(skb->data, 0, intf->beacon->queue->desc_size);
c22eb87b 1754
08992f7f
ID		 1755 /*
1756 * Fill in skb descriptor
1757 */
181d6902
ID		 1758 skbdesc = get_skb_frame_desc(skb);
1759 memset(skbdesc, 0, sizeof(*skbdesc));
baf26a7e 1760 skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
6bb40dd1
ID		 1761 skbdesc->data = skb->data + intf->beacon->queue->desc_size;
1762 skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
181d6902 1763 skbdesc->desc = skb->data;
6bb40dd1
ID		 1764 skbdesc->desc_len = intf->beacon->queue->desc_size;
1765 skbdesc->entry = intf->beacon;
08992f7f 1766
6bb40dd1 1767 /*
5957da4c
ID		 1768 * mac80211 doesn't provide the control->queue variable
1769 * for beacons. Set our own queue identification so
1770 * it can be used during descriptor initialization.
6bb40dd1 1771 */
5957da4c 1772 control->queue = RT2X00_BCN_QUEUE_BEACON;
08992f7f 1773 rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
95ea3627 1774
08992f7f
ID		 1775 /*
1776 * USB devices cannot blindly pass the skb->len as the
1777 * length of the data to usb_fill_bulk_urb. Pass the skb
1778 * to the driver to determine what the length should be.
1779 */
b242e891 1780 length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
95ea3627 1781
181d6902 1782 usb_fill_bulk_urb(priv_bcn->urb, usb_dev, pipe,
6bb40dd1
ID		 1783 skb->data, length, rt2500usb_beacondone,
1784 intf->beacon);
95ea3627 1785
95ea3627
ID		 1786 /*
1787 * Second we need to create the guardian byte.
1788 * We only need a single byte, so lets recycle
1789 * the 'flags' field we are not using for beacons.
1790 */
181d6902
ID		 1791 priv_bcn->guardian_data = 0;
1792 usb_fill_bulk_urb(priv_bcn->guardian_urb, usb_dev, pipe,
1793 &priv_bcn->guardian_data, 1, rt2500usb_beacondone,
6bb40dd1 1794 intf->beacon);
95ea3627
ID		 1795
1796 /*
1797 * Send out the guardian byte.
1798 */
181d6902 1799 usb_submit_urb(priv_bcn->guardian_urb, GFP_ATOMIC);
95ea3627
ID		 1800
1801 /*
1802 * Enable beacon generation.
1803 */
6bb40dd1 1804 rt2500usb_kick_tx_queue(rt2x00dev, control->queue);
95ea3627
ID		 1805
1806 return 0;
1807}
1808
1809static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1810 .tx = rt2x00mac_tx,
4150c572
JB		 1811 .start = rt2x00mac_start,
1812 .stop = rt2x00mac_stop,
95ea3627
ID		 1813 .add_interface = rt2x00mac_add_interface,
1814 .remove_interface = rt2x00mac_remove_interface,
1815 .config = rt2x00mac_config,
1816 .config_interface = rt2x00mac_config_interface,
4150c572 1817 .configure_filter = rt2500usb_configure_filter,
95ea3627 1818 .get_stats = rt2x00mac_get_stats,
471b3efd 1819 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1820 .conf_tx = rt2x00mac_conf_tx,
1821 .get_tx_stats = rt2x00mac_get_tx_stats,
1822 .beacon_update = rt2500usb_beacon_update,
1823};
1824
1825static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1826 .probe_hw = rt2500usb_probe_hw,
1827 .initialize = rt2x00usb_initialize,
1828 .uninitialize = rt2x00usb_uninitialize,
837e7f24
ID		 1829 .init_rxentry = rt2x00usb_init_rxentry,
1830 .init_txentry = rt2x00usb_init_txentry,
95ea3627
ID		 1831 .set_device_state = rt2500usb_set_device_state,
1832 .link_stats = rt2500usb_link_stats,
1833 .reset_tuner = rt2500usb_reset_tuner,
1834 .link_tuner = rt2500usb_link_tuner,
a9450b70 1835 .led_brightness = rt2500usb_led_brightness,
95ea3627
ID		 1836 .write_tx_desc = rt2500usb_write_tx_desc,
1837 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1838 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1839 .kick_tx_queue = rt2500usb_kick_tx_queue,
1840 .fill_rxdone = rt2500usb_fill_rxdone,
6bb40dd1 1841 .config_intf = rt2500usb_config_intf,
5c58ee51 1842 .config_preamble = rt2500usb_config_preamble,
95ea3627
ID		 1843 .config = rt2500usb_config,
1844};
1845
181d6902
ID		 1846static const struct data_queue_desc rt2500usb_queue_rx = {
1847 .entry_num = RX_ENTRIES,
1848 .data_size = DATA_FRAME_SIZE,
1849 .desc_size = RXD_DESC_SIZE,
1850 .priv_size = sizeof(struct queue_entry_priv_usb_rx),
1851};
1852
1853static const struct data_queue_desc rt2500usb_queue_tx = {
1854 .entry_num = TX_ENTRIES,
1855 .data_size = DATA_FRAME_SIZE,
1856 .desc_size = TXD_DESC_SIZE,
1857 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
1858};
1859
1860static const struct data_queue_desc rt2500usb_queue_bcn = {
1861 .entry_num = BEACON_ENTRIES,
1862 .data_size = MGMT_FRAME_SIZE,
1863 .desc_size = TXD_DESC_SIZE,
1864 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1865};
1866
1867static const struct data_queue_desc rt2500usb_queue_atim = {
1868 .entry_num = ATIM_ENTRIES,
1869 .data_size = DATA_FRAME_SIZE,
1870 .desc_size = TXD_DESC_SIZE,
1871 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
1872};
1873
95ea3627 1874static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1875 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1876 .max_sta_intf = 1,
1877 .max_ap_intf = 1,
95ea3627
ID		 1878 .eeprom_size = EEPROM_SIZE,
1879 .rf_size = RF_SIZE,
181d6902
ID		 1880 .rx = &rt2500usb_queue_rx,
1881 .tx = &rt2500usb_queue_tx,
1882 .bcn = &rt2500usb_queue_bcn,
1883 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1884 .lib = &rt2500usb_rt2x00_ops,
1885 .hw = &rt2500usb_mac80211_ops,
1886#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1887 .debugfs = &rt2500usb_rt2x00debug,
1888#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1889};
1890
1891/*
1892 * rt2500usb module information.
1893 */
1894static struct usb_device_id rt2500usb_device_table[] = {
1895 /* ASUS */
1896 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1897 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1898 /* Belkin */
1899 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1900 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1901 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1902 /* Cisco Systems */
1903 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1904 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1905 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1906 /* Conceptronic */
1907 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1908 /* D-LINK */
1909 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1910 /* Gigabyte */
1911 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1912 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1913 /* Hercules */
1914 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1915 /* Melco */
db433feb 1916 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1917 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1918 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1919 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1920 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1921 /* MSI */
1922 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1923 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1924 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1925 /* Ralink */
1926 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1927 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1928 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1929 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1930 /* Siemens */
1931 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1932 /* SMC */
1933 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1934 /* Spairon */
1935 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1936 /* Trust */
1937 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1938 /* Zinwell */
1939 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1940 { 0, }
1941};
1942
1943MODULE_AUTHOR(DRV_PROJECT);
1944MODULE_VERSION(DRV_VERSION);
1945MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1946MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1947MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1948MODULE_LICENSE("GPL");
1949
1950static struct usb_driver rt2500usb_driver = {
2360157c 1951 .name = KBUILD_MODNAME,
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ID		 1952 .id_table = rt2500usb_device_table,
1953 .probe = rt2x00usb_probe,
1954 .disconnect = rt2x00usb_disconnect,
1955 .suspend = rt2x00usb_suspend,
1956 .resume = rt2x00usb_resume,
1957};
1958
1959static int __init rt2500usb_init(void)
1960{
1961 return usb_register(&rt2500usb_driver);
1962}
1963
1964static void __exit rt2500usb_exit(void)
1965{
1966 usb_deregister(&rt2500usb_driver);
1967}
1968
1969module_init(rt2500usb_init);
1970module_exit(rt2500usb_exit);
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