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[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
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95ea3627 1/*
4e54c711 2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
dddfb478
ID		 38/*
39 * Allow hardware encryption to be disabled.
40 */
f1dd2b23 41static int modparam_nohwcrypt = 0;
dddfb478
ID		 42module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
43MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
44
95ea3627
ID		 45/*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
8ff48a8b 57 * If the csr_mutex is already held then the _lock variants must
3d82346c 58 * be used instead.
95ea3627 59 */
0e14f6d3 60static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 61 const unsigned int offset,
62 u16 *value)
63{
64 __le16 reg;
65 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
66 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 67 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 68 *value = le16_to_cpu(reg);
69}
70
3d82346c
AB		 71static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
72 const unsigned int offset,
73 u16 *value)
74{
75 __le16 reg;
76 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
77 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 78 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 79 *value = le16_to_cpu(reg);
80}
81
0e14f6d3 82static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 83 const unsigned int offset,
84 void *value, const u16 length)
85{
95ea3627
ID		 86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
87 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID		 88 value, length,
89 REGISTER_TIMEOUT16(length));
95ea3627
ID		 90}
91
0e14f6d3 92static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 93 const unsigned int offset,
94 u16 value)
95{
96 __le16 reg = cpu_to_le16(value);
97 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
98 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 99 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 100}
101
3d82346c
AB		 102static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
103 const unsigned int offset,
104 u16 value)
105{
106 __le16 reg = cpu_to_le16(value);
107 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
108 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 109 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 110}
111
0e14f6d3 112static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 113 const unsigned int offset,
114 void *value, const u16 length)
115{
95ea3627
ID		 116 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
117 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID		 118 value, length,
119 REGISTER_TIMEOUT16(length));
95ea3627
ID		 120}
121
c9c3b1a5
ID		 122static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
123 const unsigned int offset,
124 struct rt2x00_field16 field,
125 u16 *reg)
95ea3627 126{
95ea3627
ID		 127 unsigned int i;
128
129 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
c9c3b1a5
ID		 130 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
131 if (!rt2x00_get_field16(*reg, field))
132 return 1;
95ea3627
ID		 133 udelay(REGISTER_BUSY_DELAY);
134 }
135
c9c3b1a5
ID		 136 ERROR(rt2x00dev, "Indirect register access failed: "
137 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
138 *reg = ~0;
139
140 return 0;
95ea3627
ID		 141}
142
c9c3b1a5
ID		 143#define WAIT_FOR_BBP(__dev, __reg) \
144 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
145#define WAIT_FOR_RF(__dev, __reg) \
146 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
147
0e14f6d3 148static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 149 const unsigned int word, const u8 value)
150{
151 u16 reg;
152
8ff48a8b 153 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 154
95ea3627 155 /*
c9c3b1a5
ID		 156 * Wait until the BBP becomes available, afterwards we
157 * can safely write the new data into the register.
95ea3627 158 */
c9c3b1a5
ID		 159 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
160 reg = 0;
161 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
162 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
163 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
3d82346c 164
c9c3b1a5
ID		 165 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
166 }
99ade259 167
8ff48a8b 168 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 169}
170
0e14f6d3 171static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 172 const unsigned int word, u8 *value)
173{
174 u16 reg;
175
8ff48a8b 176 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 177
95ea3627 178 /*
c9c3b1a5
ID		 179 * Wait until the BBP becomes available, afterwards we
180 * can safely write the read request into the register.
181 * After the data has been written, we wait until hardware
182 * returns the correct value, if at any time the register
183 * doesn't become available in time, reg will be 0xffffffff
184 * which means we return 0xff to the caller.
95ea3627 185 */
c9c3b1a5
ID		 186 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
187 reg = 0;
188 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
189 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
95ea3627 190
c9c3b1a5 191 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627 192
c9c3b1a5
ID		 193 if (WAIT_FOR_BBP(rt2x00dev, &reg))
194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
195 }
95ea3627 196
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c 198
8ff48a8b 199 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
95ea3627 206
8ff48a8b 207 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 208
c9c3b1a5
ID		 209 /*
210 * Wait until the RF becomes available, afterwards we
211 * can safely write the new data into the register.
212 */
213 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
214 reg = 0;
215 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
216 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
217
218 reg = 0;
219 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
220 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
221 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
223
224 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
225 rt2x00_rf_write(rt2x00dev, word, value);
95ea3627
ID		 226 }
227
8ff48a8b 228 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 229}
230
231#ifdef CONFIG_RT2X00_LIB_DEBUGFS
743b97ca
ID		 232static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
233 const unsigned int offset,
234 u32 *value)
95ea3627 235{
743b97ca 236 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
95ea3627
ID		 237}
238
743b97ca
ID		 239static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
240 const unsigned int offset,
241 u32 value)
95ea3627 242{
743b97ca 243 rt2500usb_register_write(rt2x00dev, offset, value);
95ea3627
ID		 244}
245
246static const struct rt2x00debug rt2500usb_rt2x00debug = {
247 .owner = THIS_MODULE,
248 .csr = {
743b97ca
ID		 249 .read = _rt2500usb_register_read,
250 .write = _rt2500usb_register_write,
251 .flags = RT2X00DEBUGFS_OFFSET,
252 .word_base = CSR_REG_BASE,
95ea3627
ID		 253 .word_size = sizeof(u16),
254 .word_count = CSR_REG_SIZE / sizeof(u16),
255 },
256 .eeprom = {
257 .read = rt2x00_eeprom_read,
258 .write = rt2x00_eeprom_write,
743b97ca 259 .word_base = EEPROM_BASE,
95ea3627
ID		 260 .word_size = sizeof(u16),
261 .word_count = EEPROM_SIZE / sizeof(u16),
262 },
263 .bbp = {
264 .read = rt2500usb_bbp_read,
265 .write = rt2500usb_bbp_write,
743b97ca 266 .word_base = BBP_BASE,
95ea3627
ID		 267 .word_size = sizeof(u8),
268 .word_count = BBP_SIZE / sizeof(u8),
269 },
270 .rf = {
271 .read = rt2x00_rf_read,
272 .write = rt2500usb_rf_write,
743b97ca 273 .word_base = RF_BASE,
95ea3627
ID		 274 .word_size = sizeof(u32),
275 .word_count = RF_SIZE / sizeof(u32),
276 },
277};
278#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
279
7396faf4
ID		 280static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
281{
282 u16 reg;
283
284 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
285 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
286}
7396faf4 287
771fd565 288#ifdef CONFIG_RT2X00_LIB_LEDS
a2e1d52a 289static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 290 enum led_brightness brightness)
291{
292 struct rt2x00_led *led =
293 container_of(led_cdev, struct rt2x00_led, led_dev);
294 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 295 u16 reg;
a9450b70 296
a2e1d52a 297 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 298
a2e1d52a
ID		 299 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
300 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
301 else if (led->type == LED_TYPE_ACTIVITY)
302 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
303
304 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
305}
306
307static int rt2500usb_blink_set(struct led_classdev *led_cdev,
308 unsigned long *delay_on,
309 unsigned long *delay_off)
310{
311 struct rt2x00_led *led =
312 container_of(led_cdev, struct rt2x00_led, led_dev);
313 u16 reg;
314
315 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
316 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
317 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
318 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 319
a2e1d52a 320 return 0;
a9450b70 321}
475433be
ID		 322
323static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
324 struct rt2x00_led *led,
325 enum led_type type)
326{
327 led->rt2x00dev = rt2x00dev;
328 led->type = type;
329 led->led_dev.brightness_set = rt2500usb_brightness_set;
330 led->led_dev.blink_set = rt2500usb_blink_set;
331 led->flags = LED_INITIALIZED;
332}
771fd565 333#endif /* CONFIG_RT2X00_LIB_LEDS */
a9450b70 334
95ea3627
ID		 335/*
336 * Configuration handlers.
337 */
dddfb478
ID		 338
339/*
340 * rt2500usb does not differentiate between shared and pairwise
341 * keys, so we should use the same function for both key types.
342 */
343static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
344 struct rt2x00lib_crypto *crypto,
345 struct ieee80211_key_conf *key)
346{
347 int timeout;
348 u32 mask;
349 u16 reg;
350
351 if (crypto->cmd == SET_KEY) {
352 /*
353 * Pairwise key will always be entry 0, but this
354 * could collide with a shared key on the same
355 * position...
356 */
357 mask = TXRX_CSR0_KEY_ID.bit_mask;
358
359 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
360 reg &= mask;
361
362 if (reg && reg == mask)
363 return -ENOSPC;
364
365 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
366
367 key->hw_key_idx += reg ? ffz(reg) : 0;
368
369 /*
370 * The encryption key doesn't fit within the CSR cache,
371 * this means we should allocate it seperately and use
372 * rt2x00usb_vendor_request() to send the key to the hardware.
373 */
374 reg = KEY_ENTRY(key->hw_key_idx);
375 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
376 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
377 USB_VENDOR_REQUEST_OUT, reg,
378 crypto->key,
379 sizeof(crypto->key),
380 timeout);
381
382 /*
383 * The driver does not support the IV/EIV generation
f3d340c1
ID		 384 * in hardware. However it demands the data to be provided
385 * both seperately as well as inside the frame.
386 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
387 * to ensure rt2x00lib will not strip the data from the
388 * frame after the copy, now we must tell mac80211
dddfb478
ID		 389 * to generate the IV/EIV data.
390 */
391 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
392 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
393 }
394
395 /*
396 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
397 * a particular key is valid.
398 */
399 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
400 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
401 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
402
403 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
404 if (crypto->cmd == SET_KEY)
405 mask |= 1 << key->hw_key_idx;
406 else if (crypto->cmd == DISABLE_KEY)
407 mask &= ~(1 << key->hw_key_idx);
408 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
409 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
410
411 return 0;
412}
413
3a643d24
ID		 414static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
415 const unsigned int filter_flags)
416{
417 u16 reg;
418
419 /*
420 * Start configuration steps.
421 * Note that the version error will always be dropped
422 * and broadcast frames will always be accepted since
423 * there is no filter for it at this time.
424 */
425 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
426 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
427 !(filter_flags & FIF_FCSFAIL));
428 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
429 !(filter_flags & FIF_PLCPFAIL));
430 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
431 !(filter_flags & FIF_CONTROL));
432 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
433 !(filter_flags & FIF_PROMISC_IN_BSS));
434 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 435 !(filter_flags & FIF_PROMISC_IN_BSS) &&
436 !rt2x00dev->intf_ap_count);
3a643d24
ID		 437 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
438 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
439 !(filter_flags & FIF_ALLMULTI));
440 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
441 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
442}
443
6bb40dd1
ID		 444static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
445 struct rt2x00_intf *intf,
446 struct rt2x00intf_conf *conf,
447 const unsigned int flags)
95ea3627 448{
6bb40dd1 449 unsigned int bcn_preload;
95ea3627
ID		 450 u16 reg;
451
6bb40dd1 452 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 453 /*
454 * Enable beacon config
455 */
bad13639 456 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
6bb40dd1
ID		 457 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
458 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
459 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
05c914fe 460 2 * (conf->type != NL80211_IFTYPE_STATION));
6bb40dd1 461 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 462
6bb40dd1
ID		 463 /*
464 * Enable synchronisation.
465 */
466 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
467 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
468 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
469
470 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 471 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 472 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 473 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 474 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
475 }
95ea3627 476
6bb40dd1
ID		 477 if (flags & CONFIG_UPDATE_MAC)
478 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
479 (3 * sizeof(__le16)));
480
481 if (flags & CONFIG_UPDATE_BSSID)
482 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
483 (3 * sizeof(__le16)));
95ea3627
ID		 484}
485
3a643d24
ID		 486static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
487 struct rt2x00lib_erp *erp)
95ea3627 488{
95ea3627 489 u16 reg;
95ea3627 490
95ea3627 491 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
72810379 492 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
95ea3627
ID		 493 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
494
495 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 496 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 497 !!erp->short_preamble);
95ea3627 498 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
95ea3627 499
e4ea1c40 500 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
95ea3627 501
8a566afe
ID		 502 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
503 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, erp->beacon_int * 4);
504 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
505
e4ea1c40
ID		 506 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
507 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
508 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
95ea3627
ID		 509}
510
e4ea1c40
ID		 511static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
512 struct antenna_setup *ant)
95ea3627
ID		 513{
514 u8 r2;
515 u8 r14;
516 u16 csr5;
517 u16 csr6;
518
a4fe07d9
ID		 519 /*
520 * We should never come here because rt2x00lib is supposed
521 * to catch this and send us the correct antenna explicitely.
522 */
523 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
524 ant->tx == ANTENNA_SW_DIVERSITY);
525
95ea3627
ID		 526 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
527 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
528 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
529 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
530
531 /*
532 * Configure the TX antenna.
533 */
addc81bd 534 switch (ant->tx) {
95ea3627
ID		 535 case ANTENNA_HW_DIVERSITY:
536 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
537 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
538 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
539 break;
540 case ANTENNA_A:
541 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
542 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
543 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
544 break;
545 case ANTENNA_B:
a4fe07d9 546 default:
95ea3627
ID		 547 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
548 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
549 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
550 break;
551 }
552
553 /*
554 * Configure the RX antenna.
555 */
addc81bd 556 switch (ant->rx) {
95ea3627
ID		 557 case ANTENNA_HW_DIVERSITY:
558 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
559 break;
560 case ANTENNA_A:
561 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
562 break;
563 case ANTENNA_B:
a4fe07d9 564 default:
95ea3627
ID		 565 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
566 break;
567 }
568
569 /*
570 * RT2525E and RT5222 need to flip TX I/Q
571 */
572 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
573 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
574 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
575 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
576 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
577
578 /*
579 * RT2525E does not need RX I/Q Flip.
580 */
581 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
582 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
583 } else {
584 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
585 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
586 }
587
588 rt2500usb_bbp_write(rt2x00dev, 2, r2);
589 rt2500usb_bbp_write(rt2x00dev, 14, r14);
590 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
591 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
592}
593
e4ea1c40
ID		 594static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
595 struct rf_channel *rf, const int txpower)
596{
597 /*
598 * Set TXpower.
599 */
600 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
601
602 /*
603 * For RT2525E we should first set the channel to half band higher.
604 */
605 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
606 static const u32 vals[] = {
607 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
608 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
609 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
610 0x00000902, 0x00000906
611 };
612
613 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
614 if (rf->rf4)
615 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
616 }
617
618 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
619 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
620 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
621 if (rf->rf4)
622 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
623}
624
625static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
626 const int txpower)
627{
628 u32 rf3;
629
630 rt2x00_rf_read(rt2x00dev, 3, &rf3);
631 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
632 rt2500usb_rf_write(rt2x00dev, 3, rf3);
633}
634
7d7f19cc
ID		 635static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
636 struct rt2x00lib_conf *libconf)
637{
638 enum dev_state state =
639 (libconf->conf->flags & IEEE80211_CONF_PS) ?
640 STATE_SLEEP : STATE_AWAKE;
641 u16 reg;
642
643 if (state == STATE_SLEEP) {
644 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
645 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
6b347bff 646 rt2x00dev->beacon_int - 20);
7d7f19cc
ID		 647 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
648 libconf->conf->listen_interval - 1);
649
650 /* We must first disable autowake before it can be enabled */
651 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
652 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
653
654 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
655 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
656 }
657
658 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
659}
660
95ea3627 661static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 662 struct rt2x00lib_conf *libconf,
663 const unsigned int flags)
95ea3627 664{
e4ea1c40 665 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
5c58ee51
ID		 666 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
667 libconf->conf->power_level);
e4ea1c40
ID		 668 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
669 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
5c58ee51
ID		 670 rt2500usb_config_txpower(rt2x00dev,
671 libconf->conf->power_level);
7d7f19cc
ID		 672 if (flags & IEEE80211_CONF_CHANGE_PS)
673 rt2500usb_config_ps(rt2x00dev, libconf);
95ea3627
ID		 674}
675
95ea3627
ID		 676/*
677 * Link tuning
678 */
ebcf26da
ID		 679static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
680 struct link_qual *qual)
95ea3627
ID		 681{
682 u16 reg;
683
684 /*
685 * Update FCS error count from register.
686 */
687 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 688 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 689
690 /*
691 * Update False CCA count from register.
692 */
693 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 694 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 695}
696
5352ff65
ID		 697static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
698 struct link_qual *qual)
95ea3627
ID		 699{
700 u16 eeprom;
701 u16 value;
702
703 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
704 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
705 rt2500usb_bbp_write(rt2x00dev, 24, value);
706
707 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
708 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
709 rt2500usb_bbp_write(rt2x00dev, 25, value);
710
711 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
712 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
713 rt2500usb_bbp_write(rt2x00dev, 61, value);
714
715 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
716 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
717 rt2500usb_bbp_write(rt2x00dev, 17, value);
718
5352ff65 719 qual->vgc_level = value;
95ea3627
ID		 720}
721
d06193f3
ID		 722/*
723 * NOTE: This function is directly ported from legacy driver, but
724 * despite it being declared it was never called. Although link tuning
725 * sounds like a good idea, and usually works well for the other drivers,
726 * it does _not_ work with rt2500usb. Enabling this function will result
727 * in TX capabilities only until association kicks in. Immediately
728 * after the successful association all TX frames will be kept in the
729 * hardware queue and never transmitted.
730 */
731#if 0
95ea3627
ID		 732static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
733{
734 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
735 u16 bbp_thresh;
736 u16 vgc_bound;
737 u16 sens;
738 u16 r24;
739 u16 r25;
740 u16 r61;
741 u16 r17_sens;
742 u8 r17;
743 u8 up_bound;
744 u8 low_bound;
745
6bb40dd1
ID		 746 /*
747 * Read current r17 value, as well as the sensitivity values
748 * for the r17 register.
749 */
750 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
751 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
752
753 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
754 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
755 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
756
757 /*
758 * If we are not associated, we should go straight to the
759 * dynamic CCA tuning.
760 */
761 if (!rt2x00dev->intf_associated)
762 goto dynamic_cca_tune;
763
95ea3627
ID		 764 /*
765 * Determine the BBP tuning threshold and correctly
766 * set BBP 24, 25 and 61.
767 */
768 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
769 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
770
771 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
772 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
773 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
774
775 if ((rssi + bbp_thresh) > 0) {
776 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
777 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
778 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
779 } else {
780 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
781 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
782 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
783 }
784
785 rt2500usb_bbp_write(rt2x00dev, 24, r24);
786 rt2500usb_bbp_write(rt2x00dev, 25, r25);
787 rt2500usb_bbp_write(rt2x00dev, 61, r61);
788
95ea3627
ID		 789 /*
790 * A too low RSSI will cause too much false CCA which will
791 * then corrupt the R17 tuning. To remidy this the tuning should
792 * be stopped (While making sure the R17 value will not exceed limits)
793 */
794 if (rssi >= -40) {
795 if (r17 != 0x60)
796 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
797 return;
798 }
799
800 /*
801 * Special big-R17 for short distance
802 */
803 if (rssi >= -58) {
804 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
805 if (r17 != sens)
806 rt2500usb_bbp_write(rt2x00dev, 17, sens);
807 return;
808 }
809
810 /*
811 * Special mid-R17 for middle distance
812 */
813 if (rssi >= -74) {
814 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
815 if (r17 != sens)
816 rt2500usb_bbp_write(rt2x00dev, 17, sens);
817 return;
818 }
819
820 /*
821 * Leave short or middle distance condition, restore r17
822 * to the dynamic tuning range.
823 */
95ea3627 824 low_bound = 0x32;
6bb40dd1
ID		 825 if (rssi < -77)
826 up_bound -= (-77 - rssi);
95ea3627
ID		 827
828 if (up_bound < low_bound)
829 up_bound = low_bound;
830
831 if (r17 > up_bound) {
832 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
833 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 834 return;
835 }
836
837dynamic_cca_tune:
838
839 /*
840 * R17 is inside the dynamic tuning range,
841 * start tuning the link based on the false cca counter.
842 */
843 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 844 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
845 rt2x00dev->link.vgc_level = r17;
ebcf26da 846 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 847 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
848 rt2x00dev->link.vgc_level = r17;
849 }
850}
d06193f3
ID		 851#else
852#define rt2500usb_link_tuner NULL
853#endif
95ea3627
ID		 854
855/*
856 * Initialization functions.
857 */
858static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
859{
860 u16 reg;
861
862 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
863 USB_MODE_TEST, REGISTER_TIMEOUT);
864 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
865 0x00f0, REGISTER_TIMEOUT);
866
867 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
868 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
869 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
870
871 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
872 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
873
874 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
875 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
876 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
877 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
878 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
879
880 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
881 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
882 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
883 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
884 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
885
886 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
887 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
888 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
889 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
890 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
891 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
892
893 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
894 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
895 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
896 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
897 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
898 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
899
900 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
901 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
902 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
903 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
904 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
905 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
906
907 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
908 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
909 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
910 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
911 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
912 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
913
1f909162
ID		 914 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
915 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
916 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
917 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
918 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
919 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
920
95ea3627
ID		 921 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
922 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
923
924 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
925 return -EBUSY;
926
927 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
928 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
929 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
930 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
931 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
932
755a957d 933 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 934 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 935 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 936 } else {
ddc827f9
ID		 937 reg = 0;
938 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
939 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 940 }
941 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
942
943 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
944 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
945 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
946 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
947
948 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
949 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
950 rt2x00dev->rx->data_size);
951 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
952
953 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
954 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
dddfb478 955 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
95ea3627
ID		 956 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
957
958 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
959 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
960 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
961
962 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
963 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
964 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
965
966 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
967 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
968 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
969
970 return 0;
971}
972
2b08da3f 973static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 974{
975 unsigned int i;
95ea3627 976 u8 value;
95ea3627
ID		 977
978 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
979 rt2500usb_bbp_read(rt2x00dev, 0, &value);
980 if ((value != 0xff) && (value != 0x00))
2b08da3f 981 return 0;
95ea3627
ID		 982 udelay(REGISTER_BUSY_DELAY);
983 }
984
985 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
986 return -EACCES;
2b08da3f
ID		 987}
988
989static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
990{
991 unsigned int i;
992 u16 eeprom;
993 u8 value;
994 u8 reg_id;
995
996 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
997 return -EACCES;
95ea3627 998
95ea3627
ID		 999 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
1000 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
1001 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
1002 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
1003 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
1004 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
1005 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
1006 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
1007 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
1008 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
1009 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
1010 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
1011 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
1012 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
1013 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
1014 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
1015 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
1016 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
1017 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
1018 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
1019 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
1020 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
1021 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
1022 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
1023 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
1024 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
1025 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
1026 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
1027 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
1028 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
1029 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
1030
95ea3627
ID		 1031 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1032 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1033
1034 if (eeprom != 0xffff && eeprom != 0x0000) {
1035 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1036 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 1037 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
1038 }
1039 }
95ea3627
ID		 1040
1041 return 0;
1042}
1043
1044/*
1045 * Device state switch handlers.
1046 */
1047static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1048 enum dev_state state)
1049{
1050 u16 reg;
1051
1052 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1053 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
2b08da3f
ID		 1054 (state == STATE_RADIO_RX_OFF) ||
1055 (state == STATE_RADIO_RX_OFF_LINK));
95ea3627
ID		 1056 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1057}
1058
1059static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1060{
1061 /*
1062 * Initialize all registers.
1063 */
2b08da3f
ID		 1064 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
1065 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 1066 return -EIO;
95ea3627 1067
95ea3627
ID		 1068 return 0;
1069}
1070
1071static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1072{
95ea3627
ID		 1073 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
1074 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
1075
1076 /*
1077 * Disable synchronisation.
1078 */
1079 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1080
1081 rt2x00usb_disable_radio(rt2x00dev);
1082}
1083
1084static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1085 enum dev_state state)
1086{
1087 u16 reg;
1088 u16 reg2;
1089 unsigned int i;
1090 char put_to_sleep;
1091 char bbp_state;
1092 char rf_state;
1093
1094 put_to_sleep = (state != STATE_AWAKE);
1095
1096 reg = 0;
1097 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1098 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1099 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1100 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1101 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1102 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1103
1104 /*
1105 * Device is not guaranteed to be in the requested state yet.
1106 * We must wait until the register indicates that the
1107 * device has entered the correct state.
1108 */
1109 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1110 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1111 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1112 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1113 if (bbp_state == state && rf_state == state)
1114 return 0;
1115 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1116 msleep(30);
1117 }
1118
95ea3627
ID		 1119 return -EBUSY;
1120}
1121
1122static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1123 enum dev_state state)
1124{
1125 int retval = 0;
1126
1127 switch (state) {
1128 case STATE_RADIO_ON:
1129 retval = rt2500usb_enable_radio(rt2x00dev);
1130 break;
1131 case STATE_RADIO_OFF:
1132 rt2500usb_disable_radio(rt2x00dev);
1133 break;
1134 case STATE_RADIO_RX_ON:
61667d8d 1135 case STATE_RADIO_RX_ON_LINK:
95ea3627 1136 case STATE_RADIO_RX_OFF:
61667d8d 1137 case STATE_RADIO_RX_OFF_LINK:
2b08da3f
ID		 1138 rt2500usb_toggle_rx(rt2x00dev, state);
1139 break;
1140 case STATE_RADIO_IRQ_ON:
1141 case STATE_RADIO_IRQ_OFF:
1142 /* No support, but no error either */
95ea3627
ID		 1143 break;
1144 case STATE_DEEP_SLEEP:
1145 case STATE_SLEEP:
1146 case STATE_STANDBY:
1147 case STATE_AWAKE:
1148 retval = rt2500usb_set_state(rt2x00dev, state);
1149 break;
1150 default:
1151 retval = -ENOTSUPP;
1152 break;
1153 }
1154
2b08da3f
ID		 1155 if (unlikely(retval))
1156 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1157 state, retval);
1158
95ea3627
ID		 1159 return retval;
1160}
1161
1162/*
1163 * TX descriptor initialization
1164 */
1165static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1166 struct sk_buff *skb,
61486e0f 1167 struct txentry_desc *txdesc)
95ea3627 1168{
181d6902 1169 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1170 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1171 u32 word;
1172
1173 /*
1174 * Start writing the descriptor words.
1175 */
1176 rt2x00_desc_read(txd, 1, &word);
dddfb478 1177 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
181d6902
ID		 1178 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1179 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1180 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1181 rt2x00_desc_write(txd, 1, word);
1182
1183 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1184 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1185 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1186 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1187 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1188 rt2x00_desc_write(txd, 2, word);
1189
dddfb478
ID		 1190 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1191 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1192 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1193 }
1194
95ea3627 1195 rt2x00_desc_read(txd, 0, &word);
61486e0f 1196 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
95ea3627 1197 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1198 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1199 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1200 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1201 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1202 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1203 rt2x00_set_field32(&word, TXD_W0_OFDM,
076f9582 1204 (txdesc->rate_mode == RATE_MODE_OFDM));
95ea3627 1205 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
61486e0f 1206 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
181d6902 1207 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1abc3656 1208 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
f1dd2b23 1209 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
dddfb478 1210 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
95ea3627
ID		 1211 rt2x00_desc_write(txd, 0, word);
1212}
1213
bd88a781
ID		 1214/*
1215 * TX data initialization
1216 */
1217static void rt2500usb_beacondone(struct urb *urb);
1218
1219static void rt2500usb_write_beacon(struct queue_entry *entry)
1220{
1221 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1222 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1223 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1224 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
f1ca2167 1225 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
bd88a781
ID		 1226 int length;
1227 u16 reg;
1228
1229 /*
1230 * Add the descriptor in front of the skb.
1231 */
1232 skb_push(entry->skb, entry->queue->desc_size);
1233 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1234 skbdesc->desc = entry->skb->data;
1235
1236 /*
1237 * Disable beaconing while we are reloading the beacon data,
1238 * otherwise we might be sending out invalid data.
1239 */
1240 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1241 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1242 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1243 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1244 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1245
1246 /*
1247 * USB devices cannot blindly pass the skb->len as the
1248 * length of the data to usb_fill_bulk_urb. Pass the skb
1249 * to the driver to determine what the length should be.
1250 */
f1ca2167 1251 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
bd88a781
ID		 1252
1253 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1254 entry->skb->data, length, rt2500usb_beacondone,
1255 entry);
1256
1257 /*
1258 * Second we need to create the guardian byte.
1259 * We only need a single byte, so lets recycle
1260 * the 'flags' field we are not using for beacons.
1261 */
1262 bcn_priv->guardian_data = 0;
1263 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1264 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1265 entry);
1266
1267 /*
1268 * Send out the guardian byte.
1269 */
1270 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1271}
1272
f1ca2167 1273static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
dd9fa2d2
ID		 1274{
1275 int length;
1276
1277 /*
1278 * The length _must_ be a multiple of 2,
1279 * but it must _not_ be a multiple of the USB packet size.
1280 */
f1ca2167
ID		 1281 length = roundup(entry->skb->len, 2);
1282 length += (2 * !(length % entry->queue->usb_maxpacket));
dd9fa2d2
ID		 1283
1284 return length;
1285}
1286
95ea3627 1287static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1288 const enum data_queue_qid queue)
95ea3627
ID		 1289{
1290 u16 reg;
1291
f019d514
ID		 1292 if (queue != QID_BEACON) {
1293 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
95ea3627 1294 return;
f019d514 1295 }
95ea3627
ID		 1296
1297 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1298 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1299 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1300 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID		 1301 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1302 /*
1303 * Beacon generation will fail initially.
1304 * To prevent this we need to register the TXRX_CSR19
1305 * register several times.
1306 */
1307 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1308 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1309 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1310 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1311 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1312 }
1313}
1314
1315/*
1316 * RX control handlers
1317 */
181d6902
ID		 1318static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1319 struct rxdone_entry_desc *rxdesc)
95ea3627 1320{
dddfb478 1321 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
b8be63ff 1322 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID		 1323 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1324 __le32 *rxd =
1325 (__le32 *)(entry->skb->data +
b8be63ff
ID		 1326 (entry_priv->urb->actual_length -
1327 entry->queue->desc_size));
95ea3627
ID		 1328 u32 word0;
1329 u32 word1;
1330
f855c10b 1331 /*
a26cbc65
GW		 1332 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1333 * frame data in rt2x00usb.
f855c10b 1334 */
a26cbc65 1335 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
70a96109 1336 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID		 1337
1338 /*
70a96109 1339 * It is now safe to read the descriptor on all architectures.
f855c10b 1340 */
95ea3627
ID		 1341 rt2x00_desc_read(rxd, 0, &word0);
1342 rt2x00_desc_read(rxd, 1, &word1);
1343
4150c572 1344 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1345 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1346 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1347 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627 1348
dddfb478
ID		 1349 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
1350 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1351 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1352 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1353 }
1354
1355 if (rxdesc->cipher != CIPHER_NONE) {
1356 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1357 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
74415edb
ID		 1358 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1359
dddfb478
ID		 1360 /* ICV is located at the end of frame */
1361
f3d340c1 1362 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
dddfb478
ID		 1363 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1364 rxdesc->flags |= RX_FLAG_DECRYPTED;
1365 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1366 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1367 }
1368
95ea3627
ID		 1369 /*
1370 * Obtain the status about this packet.
89993890
ID		 1371 * When frame was received with an OFDM bitrate,
1372 * the signal is the PLCP value. If it was received with
1373 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1374 */
181d6902 1375 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
dddfb478
ID		 1376 rxdesc->rssi =
1377 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
181d6902 1378 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1379
19d30e02
ID		 1380 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1381 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
6c6aa3c0
ID		 1382 else
1383 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
19d30e02
ID		 1384 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1385 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1386
2ae23854
MN		 1387 /*
1388 * Adjust the skb memory window to the frame boundaries.
1389 */
2ae23854 1390 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1391}
1392
1393/*
1394 * Interrupt functions.
1395 */
1396static void rt2500usb_beacondone(struct urb *urb)
1397{
181d6902 1398 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1399 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1400
0262ab0d 1401 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1402 return;
1403
1404 /*
1405 * Check if this was the guardian beacon,
1406 * if that was the case we need to send the real beacon now.
1407 * Otherwise we should free the sk_buffer, the device
1408 * should be doing the rest of the work now.
1409 */
b8be63ff
ID		 1410 if (bcn_priv->guardian_urb == urb) {
1411 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1412 } else if (bcn_priv->urb == urb) {
181d6902
ID		 1413 dev_kfree_skb(entry->skb);
1414 entry->skb = NULL;
95ea3627
ID		 1415 }
1416}
1417
1418/*
1419 * Device probe functions.
1420 */
1421static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1422{
1423 u16 word;
1424 u8 *mac;
6bb40dd1 1425 u8 bbp;
95ea3627
ID		 1426
1427 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1428
1429 /*
1430 * Start validation of the data that has been read.
1431 */
1432 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1433 if (!is_valid_ether_addr(mac)) {
1434 random_ether_addr(mac);
e174961c 1435 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
95ea3627
ID		 1436 }
1437
1438 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1439 if (word == 0xffff) {
1440 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1441 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1442 ANTENNA_SW_DIVERSITY);
1443 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1444 ANTENNA_SW_DIVERSITY);
1445 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1446 LED_MODE_DEFAULT);
95ea3627
ID		 1447 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1448 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1449 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1450 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1451 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1452 }
1453
1454 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1455 if (word == 0xffff) {
1456 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1457 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1458 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1459 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1460 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1461 }
1462
1463 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1464 if (word == 0xffff) {
1465 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1466 DEFAULT_RSSI_OFFSET);
1467 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1468 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1469 }
1470
1471 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1472 if (word == 0xffff) {
1473 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1474 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1475 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1476 }
1477
6bb40dd1
ID		 1478 /*
1479 * Switch lower vgc bound to current BBP R17 value,
1480 * lower the value a bit for better quality.
1481 */
1482 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1483 bbp -= 6;
1484
95ea3627
ID		 1485 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1486 if (word == 0xffff) {
1487 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1488 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1489 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1490 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
8d8acd46
ID		 1491 } else {
1492 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1493 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1494 }
1495
1496 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1497 if (word == 0xffff) {
1498 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1499 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1500 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1501 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1502 }
1503
1504 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1505 if (word == 0xffff) {
1506 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1507 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1508 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1509 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1510 }
1511
1512 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1513 if (word == 0xffff) {
1514 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1515 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1516 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1517 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1518 }
1519
1520 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1521 if (word == 0xffff) {
1522 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1523 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1524 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1525 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1526 }
1527
1528 return 0;
1529}
1530
1531static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1532{
1533 u16 reg;
1534 u16 value;
1535 u16 eeprom;
1536
1537 /*
1538 * Read EEPROM word for configuration.
1539 */
1540 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1541
1542 /*
1543 * Identify RF chipset.
1544 */
1545 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1546 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1547 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1548
7adfd5c7
AW		 1549 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0) ||
1550 rt2x00_check_rev(&rt2x00dev->chip, 0x0000000f, 0)) {
1551
95ea3627
ID		 1552 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1553 return -ENODEV;
1554 }
1555
1556 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1557 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1558 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1559 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1560 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1561 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1562 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1563 return -ENODEV;
1564 }
1565
1566 /*
1567 * Identify default antenna configuration.
1568 */
addc81bd 1569 rt2x00dev->default_ant.tx =
95ea3627 1570 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1571 rt2x00dev->default_ant.rx =
95ea3627
ID		 1572 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1573
addc81bd
ID		 1574 /*
1575 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1576 * I am not 100% sure about this, but the legacy drivers do not
1577 * indicate antenna swapping in software is required when
1578 * diversity is enabled.
1579 */
1580 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1581 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1582 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1583 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1584
95ea3627
ID		 1585 /*
1586 * Store led mode, for correct led behaviour.
1587 */
771fd565 1588#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID		 1589 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1590
475433be 1591 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
3d3e451f
ID		 1592 if (value == LED_MODE_TXRX_ACTIVITY ||
1593 value == LED_MODE_DEFAULT ||
1594 value == LED_MODE_ASUS)
475433be
ID		 1595 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1596 LED_TYPE_ACTIVITY);
771fd565 1597#endif /* CONFIG_RT2X00_LIB_LEDS */
95ea3627 1598
7396faf4
ID		 1599 /*
1600 * Detect if this device has an hardware controlled radio.
1601 */
7396faf4
ID		 1602 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1603 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
7396faf4 1604
95ea3627
ID		 1605 /*
1606 * Check if the BBP tuning should be disabled.
1607 */
1608 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1609 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1610 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1611
1612 /*
1613 * Read the RSSI <-> dBm offset information.
1614 */
1615 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1616 rt2x00dev->rssi_offset =
1617 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1618
1619 return 0;
1620}
1621
1622/*
1623 * RF value list for RF2522
1624 * Supports: 2.4 GHz
1625 */
1626static const struct rf_channel rf_vals_bg_2522[] = {
1627 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1628 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1629 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1630 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1631 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1632 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1633 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1634 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1635 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1636 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1637 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1638 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1639 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1640 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1641};
1642
1643/*
1644 * RF value list for RF2523
1645 * Supports: 2.4 GHz
1646 */
1647static const struct rf_channel rf_vals_bg_2523[] = {
1648 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1649 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1650 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1651 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1652 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1653 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1654 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1655 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1656 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1657 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1658 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1659 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1660 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1661 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1662};
1663
1664/*
1665 * RF value list for RF2524
1666 * Supports: 2.4 GHz
1667 */
1668static const struct rf_channel rf_vals_bg_2524[] = {
1669 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1670 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1671 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1672 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1673 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1674 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1675 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1676 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1677 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1678 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1679 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1680 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1681 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1682 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1683};
1684
1685/*
1686 * RF value list for RF2525
1687 * Supports: 2.4 GHz
1688 */
1689static const struct rf_channel rf_vals_bg_2525[] = {
1690 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1691 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1692 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1693 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1694 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1695 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1696 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1697 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1698 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1699 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1700 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1701 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1702 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1703 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1704};
1705
1706/*
1707 * RF value list for RF2525e
1708 * Supports: 2.4 GHz
1709 */
1710static const struct rf_channel rf_vals_bg_2525e[] = {
1711 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1712 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1713 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1714 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1715 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1716 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1717 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1718 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1719 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1720 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1721 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1722 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1723 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1724 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1725};
1726
1727/*
1728 * RF value list for RF5222
1729 * Supports: 2.4 GHz & 5.2 GHz
1730 */
1731static const struct rf_channel rf_vals_5222[] = {
1732 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1733 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1734 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1735 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1736 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1737 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1738 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1739 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1740 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1741 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1742 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1743 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1744 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1745 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1746
1747 /* 802.11 UNI / HyperLan 2 */
1748 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1749 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1750 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1751 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1752 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1753 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1754 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1755 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1756
1757 /* 802.11 HyperLan 2 */
1758 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1759 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1760 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1761 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1762 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1763 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1764 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1765 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1766 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1767 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1768
1769 /* 802.11 UNII */
1770 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1771 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1772 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1773 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1774 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1775};
1776
8c5e7a5f 1777static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 1778{
1779 struct hw_mode_spec *spec = &rt2x00dev->spec;
8c5e7a5f
ID		 1780 struct channel_info *info;
1781 char *tx_power;
95ea3627
ID		 1782 unsigned int i;
1783
1784 /*
1785 * Initialize all hw fields.
1786 */
1787 rt2x00dev->hw->flags =
95ea3627 1788 IEEE80211_HW_RX_INCLUDES_FCS |
566bfe5a 1789 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
4be8c387
JB		 1790 IEEE80211_HW_SIGNAL_DBM |
1791 IEEE80211_HW_SUPPORTS_PS |
1792 IEEE80211_HW_PS_NULLFUNC_STACK;
566bfe5a 1793
95ea3627 1794 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
95ea3627 1795
14a3bf89 1796 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
95ea3627
ID		 1797 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1798 rt2x00_eeprom_addr(rt2x00dev,
1799 EEPROM_MAC_ADDR_0));
1800
95ea3627
ID		 1801 /*
1802 * Initialize hw_mode information.
1803 */
31562e80
ID		 1804 spec->supported_bands = SUPPORT_BAND_2GHZ;
1805 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1806
1807 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1808 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1809 spec->channels = rf_vals_bg_2522;
1810 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1811 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1812 spec->channels = rf_vals_bg_2523;
1813 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1814 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1815 spec->channels = rf_vals_bg_2524;
1816 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1817 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1818 spec->channels = rf_vals_bg_2525;
1819 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1820 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1821 spec->channels = rf_vals_bg_2525e;
1822 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1823 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1824 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1825 spec->channels = rf_vals_5222;
95ea3627 1826 }
8c5e7a5f
ID		 1827
1828 /*
1829 * Create channel information array
1830 */
1831 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1832 if (!info)
1833 return -ENOMEM;
1834
1835 spec->channels_info = info;
1836
1837 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1838 for (i = 0; i < 14; i++)
1839 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1840
1841 if (spec->num_channels > 14) {
1842 for (i = 14; i < spec->num_channels; i++)
1843 info[i].tx_power1 = DEFAULT_TXPOWER;
1844 }
1845
1846 return 0;
95ea3627
ID		 1847}
1848
1849static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1850{
1851 int retval;
1852
1853 /*
1854 * Allocate eeprom data.
1855 */
1856 retval = rt2500usb_validate_eeprom(rt2x00dev);
1857 if (retval)
1858 return retval;
1859
1860 retval = rt2500usb_init_eeprom(rt2x00dev);
1861 if (retval)
1862 return retval;
1863
1864 /*
1865 * Initialize hw specifications.
1866 */
8c5e7a5f
ID		 1867 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1868 if (retval)
1869 return retval;
95ea3627
ID		 1870
1871 /*
181d6902 1872 * This device requires the atim queue
95ea3627 1873 */
181d6902
ID		 1874 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1875 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
3a643d24 1876 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
dddfb478
ID		 1877 if (!modparam_nohwcrypt) {
1878 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
3f787bd6 1879 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
dddfb478 1880 }
d06193f3 1881 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
95ea3627
ID		 1882
1883 /*
1884 * Set the rssi offset.
1885 */
1886 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1887
1888 return 0;
1889}
1890
95ea3627
ID		 1891static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1892 .tx = rt2x00mac_tx,
4150c572
JB		 1893 .start = rt2x00mac_start,
1894 .stop = rt2x00mac_stop,
95ea3627
ID		 1895 .add_interface = rt2x00mac_add_interface,
1896 .remove_interface = rt2x00mac_remove_interface,
1897 .config = rt2x00mac_config,
3a643d24 1898 .configure_filter = rt2x00mac_configure_filter,
dddfb478 1899 .set_key = rt2x00mac_set_key,
95ea3627 1900 .get_stats = rt2x00mac_get_stats,
471b3efd 1901 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1902 .conf_tx = rt2x00mac_conf_tx,
1903 .get_tx_stats = rt2x00mac_get_tx_stats,
e47a5cdd 1904 .rfkill_poll = rt2x00mac_rfkill_poll,
95ea3627
ID		 1905};
1906
1907static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1908 .probe_hw = rt2500usb_probe_hw,
1909 .initialize = rt2x00usb_initialize,
1910 .uninitialize = rt2x00usb_uninitialize,
798b7adb 1911 .clear_entry = rt2x00usb_clear_entry,
95ea3627 1912 .set_device_state = rt2500usb_set_device_state,
7396faf4 1913 .rfkill_poll = rt2500usb_rfkill_poll,
95ea3627
ID		 1914 .link_stats = rt2500usb_link_stats,
1915 .reset_tuner = rt2500usb_reset_tuner,
1916 .link_tuner = rt2500usb_link_tuner,
1917 .write_tx_desc = rt2500usb_write_tx_desc,
1918 .write_tx_data = rt2x00usb_write_tx_data,
bd88a781 1919 .write_beacon = rt2500usb_write_beacon,
dd9fa2d2 1920 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627 1921 .kick_tx_queue = rt2500usb_kick_tx_queue,
a2c9b652 1922 .kill_tx_queue = rt2x00usb_kill_tx_queue,
95ea3627 1923 .fill_rxdone = rt2500usb_fill_rxdone,
dddfb478
ID		 1924 .config_shared_key = rt2500usb_config_key,
1925 .config_pairwise_key = rt2500usb_config_key,
3a643d24 1926 .config_filter = rt2500usb_config_filter,
6bb40dd1 1927 .config_intf = rt2500usb_config_intf,
72810379 1928 .config_erp = rt2500usb_config_erp,
e4ea1c40 1929 .config_ant = rt2500usb_config_ant,
95ea3627
ID		 1930 .config = rt2500usb_config,
1931};
1932
181d6902
ID		 1933static const struct data_queue_desc rt2500usb_queue_rx = {
1934 .entry_num = RX_ENTRIES,
1935 .data_size = DATA_FRAME_SIZE,
1936 .desc_size = RXD_DESC_SIZE,
b8be63ff 1937 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1938};
1939
1940static const struct data_queue_desc rt2500usb_queue_tx = {
1941 .entry_num = TX_ENTRIES,
1942 .data_size = DATA_FRAME_SIZE,
1943 .desc_size = TXD_DESC_SIZE,
b8be63ff 1944 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1945};
1946
1947static const struct data_queue_desc rt2500usb_queue_bcn = {
1948 .entry_num = BEACON_ENTRIES,
1949 .data_size = MGMT_FRAME_SIZE,
1950 .desc_size = TXD_DESC_SIZE,
1951 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1952};
1953
1954static const struct data_queue_desc rt2500usb_queue_atim = {
1955 .entry_num = ATIM_ENTRIES,
1956 .data_size = DATA_FRAME_SIZE,
1957 .desc_size = TXD_DESC_SIZE,
b8be63ff 1958 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1959};
1960
95ea3627 1961static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1962 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1963 .max_sta_intf = 1,
1964 .max_ap_intf = 1,
95ea3627
ID		 1965 .eeprom_size = EEPROM_SIZE,
1966 .rf_size = RF_SIZE,
61448f88 1967 .tx_queues = NUM_TX_QUEUES,
181d6902
ID		 1968 .rx = &rt2500usb_queue_rx,
1969 .tx = &rt2500usb_queue_tx,
1970 .bcn = &rt2500usb_queue_bcn,
1971 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1972 .lib = &rt2500usb_rt2x00_ops,
1973 .hw = &rt2500usb_mac80211_ops,
1974#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1975 .debugfs = &rt2500usb_rt2x00debug,
1976#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1977};
1978
1979/*
1980 * rt2500usb module information.
1981 */
1982static struct usb_device_id rt2500usb_device_table[] = {
1983 /* ASUS */
1984 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1985 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1986 /* Belkin */
1987 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1988 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1989 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1990 /* Cisco Systems */
1991 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1992 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1993 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 1994 /* CNet */
1995 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1996 /* Conceptronic */
1997 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1998 /* D-LINK */
1999 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
2000 /* Gigabyte */
2001 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
2002 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
2003 /* Hercules */
2004 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
2005 /* Melco */
db433feb 2006 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2007 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
2008 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
2009 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
2010 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2011 /* MSI */
2012 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
2013 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
2014 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
2015 /* Ralink */
2016 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
2017 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
2018 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
2019 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 2020 /* Sagem */
2021 { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2022 /* Siemens */
2023 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
2024 /* SMC */
2025 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
2026 /* Spairon */
2027 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 2028 /* SURECOM */
2029 { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2030 /* Trust */
2031 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
9eb77ab0
XVP		 2032 /* VTech */
2033 { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2034 /* Zinwell */
2035 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
2036 { 0, }
2037};
2038
2039MODULE_AUTHOR(DRV_PROJECT);
2040MODULE_VERSION(DRV_VERSION);
2041MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
2042MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
2043MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
2044MODULE_LICENSE("GPL");
2045
2046static struct usb_driver rt2500usb_driver = {
2360157c 2047 .name = KBUILD_MODNAME,
95ea3627
ID		 2048 .id_table = rt2500usb_device_table,
2049 .probe = rt2x00usb_probe,
2050 .disconnect = rt2x00usb_disconnect,
2051 .suspend = rt2x00usb_suspend,
2052 .resume = rt2x00usb_resume,
2053};
2054
2055static int __init rt2500usb_init(void)
2056{
2057 return usb_register(&rt2500usb_driver);
2058}
2059
2060static void __exit rt2500usb_exit(void)
2061{
2062 usb_deregister(&rt2500usb_driver);
2063}
2064
2065module_init(rt2500usb_init);
2066module_exit(rt2500usb_exit);
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