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Move orinoco Kconfig entries into drivers/net/wireless/orinoco/Kconfig
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
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95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
dddfb478
ID		 38/*
39 * Allow hardware encryption to be disabled.
40 */
f1dd2b23 41static int modparam_nohwcrypt = 0;
dddfb478
ID		 42module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
43MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
44
95ea3627
ID		 45/*
46 * Register access.
47 * All access to the CSR registers will go through the methods
48 * rt2500usb_register_read and rt2500usb_register_write.
49 * BBP and RF register require indirect register access,
50 * and use the CSR registers BBPCSR and RFCSR to achieve this.
51 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed,
56 * and we will print an error.
8ff48a8b 57 * If the csr_mutex is already held then the _lock variants must
3d82346c 58 * be used instead.
95ea3627 59 */
0e14f6d3 60static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 61 const unsigned int offset,
62 u16 *value)
63{
64 __le16 reg;
65 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
66 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 67 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 68 *value = le16_to_cpu(reg);
69}
70
3d82346c
AB		 71static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
72 const unsigned int offset,
73 u16 *value)
74{
75 __le16 reg;
76 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
77 USB_VENDOR_REQUEST_IN, offset,
c9c3b1a5 78 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 79 *value = le16_to_cpu(reg);
80}
81
0e14f6d3 82static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 83 const unsigned int offset,
84 void *value, const u16 length)
85{
95ea3627
ID		 86 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
87 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID		 88 value, length,
89 REGISTER_TIMEOUT16(length));
95ea3627
ID		 90}
91
0e14f6d3 92static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 93 const unsigned int offset,
94 u16 value)
95{
96 __le16 reg = cpu_to_le16(value);
97 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
98 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 99 &reg, sizeof(reg), REGISTER_TIMEOUT);
95ea3627
ID		 100}
101
3d82346c
AB		 102static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
103 const unsigned int offset,
104 u16 value)
105{
106 __le16 reg = cpu_to_le16(value);
107 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
108 USB_VENDOR_REQUEST_OUT, offset,
c9c3b1a5 109 &reg, sizeof(reg), REGISTER_TIMEOUT);
3d82346c
AB		 110}
111
0e14f6d3 112static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 113 const unsigned int offset,
114 void *value, const u16 length)
115{
95ea3627
ID		 116 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
117 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID		 118 value, length,
119 REGISTER_TIMEOUT16(length));
95ea3627
ID		 120}
121
c9c3b1a5
ID		 122static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
123 const unsigned int offset,
124 struct rt2x00_field16 field,
125 u16 *reg)
95ea3627 126{
95ea3627
ID		 127 unsigned int i;
128
129 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
c9c3b1a5
ID		 130 rt2500usb_register_read_lock(rt2x00dev, offset, reg);
131 if (!rt2x00_get_field16(*reg, field))
132 return 1;
95ea3627
ID		 133 udelay(REGISTER_BUSY_DELAY);
134 }
135
c9c3b1a5
ID		 136 ERROR(rt2x00dev, "Indirect register access failed: "
137 "offset=0x%.08x, value=0x%.08x\n", offset, *reg);
138 *reg = ~0;
139
140 return 0;
95ea3627
ID		 141}
142
c9c3b1a5
ID		 143#define WAIT_FOR_BBP(__dev, __reg) \
144 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
145#define WAIT_FOR_RF(__dev, __reg) \
146 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
147
0e14f6d3 148static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 149 const unsigned int word, const u8 value)
150{
151 u16 reg;
152
8ff48a8b 153 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 154
95ea3627 155 /*
c9c3b1a5
ID		 156 * Wait until the BBP becomes available, afterwards we
157 * can safely write the new data into the register.
95ea3627 158 */
c9c3b1a5
ID		 159 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
160 reg = 0;
161 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
162 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
163 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
3d82346c 164
c9c3b1a5
ID		 165 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
166 }
99ade259 167
8ff48a8b 168 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 169}
170
0e14f6d3 171static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 172 const unsigned int word, u8 *value)
173{
174 u16 reg;
175
8ff48a8b 176 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 177
95ea3627 178 /*
c9c3b1a5
ID		 179 * Wait until the BBP becomes available, afterwards we
180 * can safely write the read request into the register.
181 * After the data has been written, we wait until hardware
182 * returns the correct value, if at any time the register
183 * doesn't become available in time, reg will be 0xffffffff
184 * which means we return 0xff to the caller.
95ea3627 185 */
c9c3b1a5
ID		 186 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
187 reg = 0;
188 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
189 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
95ea3627 190
c9c3b1a5 191 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627 192
c9c3b1a5
ID		 193 if (WAIT_FOR_BBP(rt2x00dev, &reg))
194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
195 }
95ea3627 196
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c 198
8ff48a8b 199 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
95ea3627
ID		 206
207 if (!word)
208 return;
209
8ff48a8b 210 mutex_lock(&rt2x00dev->csr_mutex);
3d82346c 211
c9c3b1a5
ID		 212 /*
213 * Wait until the RF becomes available, afterwards we
214 * can safely write the new data into the register.
215 */
216 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
217 reg = 0;
218 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
219 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
220
221 reg = 0;
222 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
223 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
224 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
225 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
226
227 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
228 rt2x00_rf_write(rt2x00dev, word, value);
95ea3627
ID		 229 }
230
8ff48a8b 231 mutex_unlock(&rt2x00dev->csr_mutex);
95ea3627
ID		 232}
233
234#ifdef CONFIG_RT2X00_LIB_DEBUGFS
743b97ca
ID		 235static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
236 const unsigned int offset,
237 u32 *value)
95ea3627 238{
743b97ca 239 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
95ea3627
ID		 240}
241
743b97ca
ID		 242static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
243 const unsigned int offset,
244 u32 value)
95ea3627 245{
743b97ca 246 rt2500usb_register_write(rt2x00dev, offset, value);
95ea3627
ID		 247}
248
249static const struct rt2x00debug rt2500usb_rt2x00debug = {
250 .owner = THIS_MODULE,
251 .csr = {
743b97ca
ID		 252 .read = _rt2500usb_register_read,
253 .write = _rt2500usb_register_write,
254 .flags = RT2X00DEBUGFS_OFFSET,
255 .word_base = CSR_REG_BASE,
95ea3627
ID		 256 .word_size = sizeof(u16),
257 .word_count = CSR_REG_SIZE / sizeof(u16),
258 },
259 .eeprom = {
260 .read = rt2x00_eeprom_read,
261 .write = rt2x00_eeprom_write,
743b97ca 262 .word_base = EEPROM_BASE,
95ea3627
ID		 263 .word_size = sizeof(u16),
264 .word_count = EEPROM_SIZE / sizeof(u16),
265 },
266 .bbp = {
267 .read = rt2500usb_bbp_read,
268 .write = rt2500usb_bbp_write,
743b97ca 269 .word_base = BBP_BASE,
95ea3627
ID		 270 .word_size = sizeof(u8),
271 .word_count = BBP_SIZE / sizeof(u8),
272 },
273 .rf = {
274 .read = rt2x00_rf_read,
275 .write = rt2500usb_rf_write,
743b97ca 276 .word_base = RF_BASE,
95ea3627
ID		 277 .word_size = sizeof(u32),
278 .word_count = RF_SIZE / sizeof(u32),
279 },
280};
281#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
282
7396faf4
ID		 283#ifdef CONFIG_RT2X00_LIB_RFKILL
284static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
285{
286 u16 reg;
287
288 rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
289 return rt2x00_get_field32(reg, MAC_CSR19_BIT7);
290}
291#else
292#define rt2500usb_rfkill_poll NULL
293#endif /* CONFIG_RT2X00_LIB_RFKILL */
294
771fd565 295#ifdef CONFIG_RT2X00_LIB_LEDS
a2e1d52a 296static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 297 enum led_brightness brightness)
298{
299 struct rt2x00_led *led =
300 container_of(led_cdev, struct rt2x00_led, led_dev);
301 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 302 u16 reg;
a9450b70 303
a2e1d52a 304 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 305
a2e1d52a
ID		 306 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
307 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
308 else if (led->type == LED_TYPE_ACTIVITY)
309 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
310
311 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
312}
313
314static int rt2500usb_blink_set(struct led_classdev *led_cdev,
315 unsigned long *delay_on,
316 unsigned long *delay_off)
317{
318 struct rt2x00_led *led =
319 container_of(led_cdev, struct rt2x00_led, led_dev);
320 u16 reg;
321
322 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
323 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
324 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
325 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 326
a2e1d52a 327 return 0;
a9450b70 328}
475433be
ID		 329
330static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
331 struct rt2x00_led *led,
332 enum led_type type)
333{
334 led->rt2x00dev = rt2x00dev;
335 led->type = type;
336 led->led_dev.brightness_set = rt2500usb_brightness_set;
337 led->led_dev.blink_set = rt2500usb_blink_set;
338 led->flags = LED_INITIALIZED;
339}
771fd565 340#endif /* CONFIG_RT2X00_LIB_LEDS */
a9450b70 341
95ea3627
ID		 342/*
343 * Configuration handlers.
344 */
dddfb478
ID		 345
346/*
347 * rt2500usb does not differentiate between shared and pairwise
348 * keys, so we should use the same function for both key types.
349 */
350static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
351 struct rt2x00lib_crypto *crypto,
352 struct ieee80211_key_conf *key)
353{
354 int timeout;
355 u32 mask;
356 u16 reg;
357
358 if (crypto->cmd == SET_KEY) {
359 /*
360 * Pairwise key will always be entry 0, but this
361 * could collide with a shared key on the same
362 * position...
363 */
364 mask = TXRX_CSR0_KEY_ID.bit_mask;
365
366 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
367 reg &= mask;
368
369 if (reg && reg == mask)
370 return -ENOSPC;
371
372 reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
373
374 key->hw_key_idx += reg ? ffz(reg) : 0;
375
376 /*
377 * The encryption key doesn't fit within the CSR cache,
378 * this means we should allocate it seperately and use
379 * rt2x00usb_vendor_request() to send the key to the hardware.
380 */
381 reg = KEY_ENTRY(key->hw_key_idx);
382 timeout = REGISTER_TIMEOUT32(sizeof(crypto->key));
383 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
384 USB_VENDOR_REQUEST_OUT, reg,
385 crypto->key,
386 sizeof(crypto->key),
387 timeout);
388
389 /*
390 * The driver does not support the IV/EIV generation
f3d340c1
ID		 391 * in hardware. However it demands the data to be provided
392 * both seperately as well as inside the frame.
393 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
394 * to ensure rt2x00lib will not strip the data from the
395 * frame after the copy, now we must tell mac80211
dddfb478
ID		 396 * to generate the IV/EIV data.
397 */
398 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
399 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
400 }
401
402 /*
403 * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
404 * a particular key is valid.
405 */
406 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
407 rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
408 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
409
410 mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
411 if (crypto->cmd == SET_KEY)
412 mask |= 1 << key->hw_key_idx;
413 else if (crypto->cmd == DISABLE_KEY)
414 mask &= ~(1 << key->hw_key_idx);
415 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
416 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
417
418 return 0;
419}
420
3a643d24
ID		 421static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
422 const unsigned int filter_flags)
423{
424 u16 reg;
425
426 /*
427 * Start configuration steps.
428 * Note that the version error will always be dropped
429 * and broadcast frames will always be accepted since
430 * there is no filter for it at this time.
431 */
432 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
433 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
434 !(filter_flags & FIF_FCSFAIL));
435 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
436 !(filter_flags & FIF_PLCPFAIL));
437 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
438 !(filter_flags & FIF_CONTROL));
439 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
440 !(filter_flags & FIF_PROMISC_IN_BSS));
441 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 442 !(filter_flags & FIF_PROMISC_IN_BSS) &&
443 !rt2x00dev->intf_ap_count);
3a643d24
ID		 444 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
445 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
446 !(filter_flags & FIF_ALLMULTI));
447 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
448 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
449}
450
6bb40dd1
ID		 451static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
452 struct rt2x00_intf *intf,
453 struct rt2x00intf_conf *conf,
454 const unsigned int flags)
95ea3627 455{
6bb40dd1 456 unsigned int bcn_preload;
95ea3627
ID		 457 u16 reg;
458
6bb40dd1 459 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 460 /*
461 * Enable beacon config
462 */
bad13639 463 bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
6bb40dd1
ID		 464 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
465 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
466 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
05c914fe 467 2 * (conf->type != NL80211_IFTYPE_STATION));
6bb40dd1 468 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 469
6bb40dd1
ID		 470 /*
471 * Enable synchronisation.
472 */
473 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
474 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
475 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
476
477 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 478 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 479 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 480 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 481 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
482 }
95ea3627 483
6bb40dd1
ID		 484 if (flags & CONFIG_UPDATE_MAC)
485 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
486 (3 * sizeof(__le16)));
487
488 if (flags & CONFIG_UPDATE_BSSID)
489 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
490 (3 * sizeof(__le16)));
95ea3627
ID		 491}
492
3a643d24
ID		 493static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
494 struct rt2x00lib_erp *erp)
95ea3627 495{
95ea3627 496 u16 reg;
95ea3627 497
95ea3627 498 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
72810379 499 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
95ea3627
ID		 500 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
501
502 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 503 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 504 !!erp->short_preamble);
95ea3627 505 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
95ea3627 506
e4ea1c40 507 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
95ea3627 508
e4ea1c40
ID		 509 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
510 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
511 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
95ea3627
ID		 512}
513
e4ea1c40
ID		 514static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
515 struct antenna_setup *ant)
95ea3627
ID		 516{
517 u8 r2;
518 u8 r14;
519 u16 csr5;
520 u16 csr6;
521
a4fe07d9
ID		 522 /*
523 * We should never come here because rt2x00lib is supposed
524 * to catch this and send us the correct antenna explicitely.
525 */
526 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
527 ant->tx == ANTENNA_SW_DIVERSITY);
528
95ea3627
ID		 529 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
530 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
531 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
532 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
533
534 /*
535 * Configure the TX antenna.
536 */
addc81bd 537 switch (ant->tx) {
95ea3627
ID		 538 case ANTENNA_HW_DIVERSITY:
539 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
540 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
541 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
542 break;
543 case ANTENNA_A:
544 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
545 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
546 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
547 break;
548 case ANTENNA_B:
a4fe07d9 549 default:
95ea3627
ID		 550 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
551 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
552 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
553 break;
554 }
555
556 /*
557 * Configure the RX antenna.
558 */
addc81bd 559 switch (ant->rx) {
95ea3627
ID		 560 case ANTENNA_HW_DIVERSITY:
561 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
562 break;
563 case ANTENNA_A:
564 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
565 break;
566 case ANTENNA_B:
a4fe07d9 567 default:
95ea3627
ID		 568 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
569 break;
570 }
571
572 /*
573 * RT2525E and RT5222 need to flip TX I/Q
574 */
575 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
576 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
577 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
578 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
579 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
580
581 /*
582 * RT2525E does not need RX I/Q Flip.
583 */
584 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
585 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
586 } else {
587 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
588 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
589 }
590
591 rt2500usb_bbp_write(rt2x00dev, 2, r2);
592 rt2500usb_bbp_write(rt2x00dev, 14, r14);
593 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
594 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
595}
596
e4ea1c40
ID		 597static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
598 struct rf_channel *rf, const int txpower)
599{
600 /*
601 * Set TXpower.
602 */
603 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
604
605 /*
606 * For RT2525E we should first set the channel to half band higher.
607 */
608 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
609 static const u32 vals[] = {
610 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
611 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
612 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
613 0x00000902, 0x00000906
614 };
615
616 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
617 if (rf->rf4)
618 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
619 }
620
621 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
622 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
623 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
624 if (rf->rf4)
625 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
626}
627
628static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
629 const int txpower)
630{
631 u32 rf3;
632
633 rt2x00_rf_read(rt2x00dev, 3, &rf3);
634 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
635 rt2500usb_rf_write(rt2x00dev, 3, rf3);
636}
637
95ea3627 638static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 639 struct rt2x00lib_conf *libconf)
95ea3627
ID		 640{
641 u16 reg;
642
95ea3627 643 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 644 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
645 libconf->conf->beacon_int * 4);
95ea3627
ID		 646 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
647}
648
7d7f19cc
ID		 649static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
650 struct rt2x00lib_conf *libconf)
651{
652 enum dev_state state =
653 (libconf->conf->flags & IEEE80211_CONF_PS) ?
654 STATE_SLEEP : STATE_AWAKE;
655 u16 reg;
656
657 if (state == STATE_SLEEP) {
658 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
659 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
660 libconf->conf->beacon_int - 20);
661 rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
662 libconf->conf->listen_interval - 1);
663
664 /* We must first disable autowake before it can be enabled */
665 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
666 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
667
668 rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
669 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
670 }
671
672 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
673}
674
95ea3627 675static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 676 struct rt2x00lib_conf *libconf,
677 const unsigned int flags)
95ea3627 678{
e4ea1c40 679 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
5c58ee51
ID		 680 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
681 libconf->conf->power_level);
e4ea1c40
ID		 682 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
683 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
5c58ee51
ID		 684 rt2500usb_config_txpower(rt2x00dev,
685 libconf->conf->power_level);
e4ea1c40 686 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
5c58ee51 687 rt2500usb_config_duration(rt2x00dev, libconf);
7d7f19cc
ID		 688 if (flags & IEEE80211_CONF_CHANGE_PS)
689 rt2500usb_config_ps(rt2x00dev, libconf);
95ea3627
ID		 690}
691
95ea3627
ID		 692/*
693 * Link tuning
694 */
ebcf26da
ID		 695static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
696 struct link_qual *qual)
95ea3627
ID		 697{
698 u16 reg;
699
700 /*
701 * Update FCS error count from register.
702 */
703 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 704 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 705
706 /*
707 * Update False CCA count from register.
708 */
709 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 710 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 711}
712
5352ff65
ID		 713static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
714 struct link_qual *qual)
95ea3627
ID		 715{
716 u16 eeprom;
717 u16 value;
718
719 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
720 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
721 rt2500usb_bbp_write(rt2x00dev, 24, value);
722
723 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
724 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
725 rt2500usb_bbp_write(rt2x00dev, 25, value);
726
727 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
728 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
729 rt2500usb_bbp_write(rt2x00dev, 61, value);
730
731 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
732 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
733 rt2500usb_bbp_write(rt2x00dev, 17, value);
734
5352ff65 735 qual->vgc_level = value;
95ea3627
ID		 736}
737
d06193f3
ID		 738/*
739 * NOTE: This function is directly ported from legacy driver, but
740 * despite it being declared it was never called. Although link tuning
741 * sounds like a good idea, and usually works well for the other drivers,
742 * it does _not_ work with rt2500usb. Enabling this function will result
743 * in TX capabilities only until association kicks in. Immediately
744 * after the successful association all TX frames will be kept in the
745 * hardware queue and never transmitted.
746 */
747#if 0
95ea3627
ID		 748static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
749{
750 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
751 u16 bbp_thresh;
752 u16 vgc_bound;
753 u16 sens;
754 u16 r24;
755 u16 r25;
756 u16 r61;
757 u16 r17_sens;
758 u8 r17;
759 u8 up_bound;
760 u8 low_bound;
761
6bb40dd1
ID		 762 /*
763 * Read current r17 value, as well as the sensitivity values
764 * for the r17 register.
765 */
766 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
767 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
768
769 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
770 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
771 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
772
773 /*
774 * If we are not associated, we should go straight to the
775 * dynamic CCA tuning.
776 */
777 if (!rt2x00dev->intf_associated)
778 goto dynamic_cca_tune;
779
95ea3627
ID		 780 /*
781 * Determine the BBP tuning threshold and correctly
782 * set BBP 24, 25 and 61.
783 */
784 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
785 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
786
787 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
788 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
789 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
790
791 if ((rssi + bbp_thresh) > 0) {
792 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
793 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
794 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
795 } else {
796 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
797 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
798 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
799 }
800
801 rt2500usb_bbp_write(rt2x00dev, 24, r24);
802 rt2500usb_bbp_write(rt2x00dev, 25, r25);
803 rt2500usb_bbp_write(rt2x00dev, 61, r61);
804
95ea3627
ID		 805 /*
806 * A too low RSSI will cause too much false CCA which will
807 * then corrupt the R17 tuning. To remidy this the tuning should
808 * be stopped (While making sure the R17 value will not exceed limits)
809 */
810 if (rssi >= -40) {
811 if (r17 != 0x60)
812 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
813 return;
814 }
815
816 /*
817 * Special big-R17 for short distance
818 */
819 if (rssi >= -58) {
820 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
821 if (r17 != sens)
822 rt2500usb_bbp_write(rt2x00dev, 17, sens);
823 return;
824 }
825
826 /*
827 * Special mid-R17 for middle distance
828 */
829 if (rssi >= -74) {
830 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
831 if (r17 != sens)
832 rt2500usb_bbp_write(rt2x00dev, 17, sens);
833 return;
834 }
835
836 /*
837 * Leave short or middle distance condition, restore r17
838 * to the dynamic tuning range.
839 */
95ea3627 840 low_bound = 0x32;
6bb40dd1
ID		 841 if (rssi < -77)
842 up_bound -= (-77 - rssi);
95ea3627
ID		 843
844 if (up_bound < low_bound)
845 up_bound = low_bound;
846
847 if (r17 > up_bound) {
848 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
849 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 850 return;
851 }
852
853dynamic_cca_tune:
854
855 /*
856 * R17 is inside the dynamic tuning range,
857 * start tuning the link based on the false cca counter.
858 */
859 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 860 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
861 rt2x00dev->link.vgc_level = r17;
ebcf26da 862 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 863 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
864 rt2x00dev->link.vgc_level = r17;
865 }
866}
d06193f3
ID		 867#else
868#define rt2500usb_link_tuner NULL
869#endif
95ea3627
ID		 870
871/*
872 * Initialization functions.
873 */
874static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
875{
876 u16 reg;
877
878 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
879 USB_MODE_TEST, REGISTER_TIMEOUT);
880 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
881 0x00f0, REGISTER_TIMEOUT);
882
883 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
884 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
885 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
886
887 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
888 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
889
890 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
891 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
892 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
893 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
894 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
895
896 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
897 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
898 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
899 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
900 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
901
902 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
903 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
904 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
905 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
906 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
907 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
908
909 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
910 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
911 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
912 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
913 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
914 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
915
916 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
917 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
918 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
919 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
920 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
921 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
922
923 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
924 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
925 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
926 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
927 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
928 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
929
1f909162
ID		 930 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
931 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
932 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
933 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
934 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
935 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
936
95ea3627
ID		 937 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
938 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
939
940 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
941 return -EBUSY;
942
943 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
944 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
945 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
946 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
947 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
948
755a957d 949 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 950 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 951 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 952 } else {
ddc827f9
ID		 953 reg = 0;
954 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
955 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 956 }
957 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
958
959 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
960 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
961 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
962 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
963
964 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
965 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
966 rt2x00dev->rx->data_size);
967 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
968
969 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
970 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
dddfb478 971 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
95ea3627
ID		 972 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
973
974 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
975 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
976 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
977
978 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
979 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
980 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
981
982 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
983 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
984 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
985
986 return 0;
987}
988
2b08da3f 989static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 990{
991 unsigned int i;
95ea3627 992 u8 value;
95ea3627
ID		 993
994 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
995 rt2500usb_bbp_read(rt2x00dev, 0, &value);
996 if ((value != 0xff) && (value != 0x00))
2b08da3f 997 return 0;
95ea3627
ID		 998 udelay(REGISTER_BUSY_DELAY);
999 }
1000
1001 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1002 return -EACCES;
2b08da3f
ID		 1003}
1004
1005static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1006{
1007 unsigned int i;
1008 u16 eeprom;
1009 u8 value;
1010 u8 reg_id;
1011
1012 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
1013 return -EACCES;
95ea3627 1014
95ea3627
ID		 1015 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
1016 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
1017 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
1018 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
1019 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
1020 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
1021 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
1022 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
1023 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
1024 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
1025 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
1026 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
1027 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
1028 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
1029 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
1030 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
1031 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
1032 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
1033 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
1034 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
1035 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
1036 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
1037 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
1038 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
1039 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
1040 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
1041 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
1042 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
1043 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
1044 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
1045 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
1046
95ea3627
ID		 1047 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1048 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1049
1050 if (eeprom != 0xffff && eeprom != 0x0000) {
1051 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1052 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 1053 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
1054 }
1055 }
95ea3627
ID		 1056
1057 return 0;
1058}
1059
1060/*
1061 * Device state switch handlers.
1062 */
1063static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1064 enum dev_state state)
1065{
1066 u16 reg;
1067
1068 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1069 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
2b08da3f
ID		 1070 (state == STATE_RADIO_RX_OFF) ||
1071 (state == STATE_RADIO_RX_OFF_LINK));
95ea3627
ID		 1072 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1073}
1074
1075static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1076{
1077 /*
1078 * Initialize all registers.
1079 */
2b08da3f
ID		 1080 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
1081 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 1082 return -EIO;
95ea3627 1083
95ea3627
ID		 1084 return 0;
1085}
1086
1087static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1088{
95ea3627
ID		 1089 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
1090 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
1091
1092 /*
1093 * Disable synchronisation.
1094 */
1095 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1096
1097 rt2x00usb_disable_radio(rt2x00dev);
1098}
1099
1100static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
1101 enum dev_state state)
1102{
1103 u16 reg;
1104 u16 reg2;
1105 unsigned int i;
1106 char put_to_sleep;
1107 char bbp_state;
1108 char rf_state;
1109
1110 put_to_sleep = (state != STATE_AWAKE);
1111
1112 reg = 0;
1113 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1114 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1115 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1116 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1117 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1118 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1119
1120 /*
1121 * Device is not guaranteed to be in the requested state yet.
1122 * We must wait until the register indicates that the
1123 * device has entered the correct state.
1124 */
1125 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1126 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1127 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1128 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1129 if (bbp_state == state && rf_state == state)
1130 return 0;
1131 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1132 msleep(30);
1133 }
1134
95ea3627
ID		 1135 return -EBUSY;
1136}
1137
1138static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1139 enum dev_state state)
1140{
1141 int retval = 0;
1142
1143 switch (state) {
1144 case STATE_RADIO_ON:
1145 retval = rt2500usb_enable_radio(rt2x00dev);
1146 break;
1147 case STATE_RADIO_OFF:
1148 rt2500usb_disable_radio(rt2x00dev);
1149 break;
1150 case STATE_RADIO_RX_ON:
61667d8d 1151 case STATE_RADIO_RX_ON_LINK:
95ea3627 1152 case STATE_RADIO_RX_OFF:
61667d8d 1153 case STATE_RADIO_RX_OFF_LINK:
2b08da3f
ID		 1154 rt2500usb_toggle_rx(rt2x00dev, state);
1155 break;
1156 case STATE_RADIO_IRQ_ON:
1157 case STATE_RADIO_IRQ_OFF:
1158 /* No support, but no error either */
95ea3627
ID		 1159 break;
1160 case STATE_DEEP_SLEEP:
1161 case STATE_SLEEP:
1162 case STATE_STANDBY:
1163 case STATE_AWAKE:
1164 retval = rt2500usb_set_state(rt2x00dev, state);
1165 break;
1166 default:
1167 retval = -ENOTSUPP;
1168 break;
1169 }
1170
2b08da3f
ID		 1171 if (unlikely(retval))
1172 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1173 state, retval);
1174
95ea3627
ID		 1175 return retval;
1176}
1177
1178/*
1179 * TX descriptor initialization
1180 */
1181static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1182 struct sk_buff *skb,
61486e0f 1183 struct txentry_desc *txdesc)
95ea3627 1184{
181d6902 1185 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1186 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1187 u32 word;
1188
1189 /*
1190 * Start writing the descriptor words.
1191 */
1192 rt2x00_desc_read(txd, 1, &word);
dddfb478 1193 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
181d6902
ID		 1194 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1195 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1196 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1197 rt2x00_desc_write(txd, 1, word);
1198
1199 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1200 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1201 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1202 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1203 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1204 rt2x00_desc_write(txd, 2, word);
1205
dddfb478
ID		 1206 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
1207 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1208 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
1209 }
1210
95ea3627 1211 rt2x00_desc_read(txd, 0, &word);
61486e0f 1212 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
95ea3627 1213 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1214 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1215 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1216 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1217 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1218 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1219 rt2x00_set_field32(&word, TXD_W0_OFDM,
076f9582 1220 (txdesc->rate_mode == RATE_MODE_OFDM));
95ea3627 1221 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
61486e0f 1222 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
181d6902 1223 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1abc3656 1224 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
f1dd2b23 1225 rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
dddfb478 1226 rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
95ea3627
ID		 1227 rt2x00_desc_write(txd, 0, word);
1228}
1229
bd88a781
ID		 1230/*
1231 * TX data initialization
1232 */
1233static void rt2500usb_beacondone(struct urb *urb);
1234
1235static void rt2500usb_write_beacon(struct queue_entry *entry)
1236{
1237 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1238 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1239 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1240 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
f1ca2167 1241 int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
bd88a781
ID		 1242 int length;
1243 u16 reg;
1244
1245 /*
1246 * Add the descriptor in front of the skb.
1247 */
1248 skb_push(entry->skb, entry->queue->desc_size);
1249 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1250 skbdesc->desc = entry->skb->data;
1251
1252 /*
1253 * Disable beaconing while we are reloading the beacon data,
1254 * otherwise we might be sending out invalid data.
1255 */
1256 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1257 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1258 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1259 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1260 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1261
1262 /*
1263 * USB devices cannot blindly pass the skb->len as the
1264 * length of the data to usb_fill_bulk_urb. Pass the skb
1265 * to the driver to determine what the length should be.
1266 */
f1ca2167 1267 length = rt2x00dev->ops->lib->get_tx_data_len(entry);
bd88a781
ID		 1268
1269 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1270 entry->skb->data, length, rt2500usb_beacondone,
1271 entry);
1272
1273 /*
1274 * Second we need to create the guardian byte.
1275 * We only need a single byte, so lets recycle
1276 * the 'flags' field we are not using for beacons.
1277 */
1278 bcn_priv->guardian_data = 0;
1279 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1280 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1281 entry);
1282
1283 /*
1284 * Send out the guardian byte.
1285 */
1286 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1287}
1288
f1ca2167 1289static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
dd9fa2d2
ID		 1290{
1291 int length;
1292
1293 /*
1294 * The length _must_ be a multiple of 2,
1295 * but it must _not_ be a multiple of the USB packet size.
1296 */
f1ca2167
ID		 1297 length = roundup(entry->skb->len, 2);
1298 length += (2 * !(length % entry->queue->usb_maxpacket));
dd9fa2d2
ID		 1299
1300 return length;
1301}
1302
95ea3627 1303static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1304 const enum data_queue_qid queue)
95ea3627
ID		 1305{
1306 u16 reg;
1307
f019d514
ID		 1308 if (queue != QID_BEACON) {
1309 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
95ea3627 1310 return;
f019d514 1311 }
95ea3627
ID		 1312
1313 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1314 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1315 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1316 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID		 1317 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1318 /*
1319 * Beacon generation will fail initially.
1320 * To prevent this we need to register the TXRX_CSR19
1321 * register several times.
1322 */
1323 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1324 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1325 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1326 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1327 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1328 }
1329}
1330
1331/*
1332 * RX control handlers
1333 */
181d6902
ID		 1334static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1335 struct rxdone_entry_desc *rxdesc)
95ea3627 1336{
dddfb478 1337 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
b8be63ff 1338 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID		 1339 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1340 __le32 *rxd =
1341 (__le32 *)(entry->skb->data +
b8be63ff
ID		 1342 (entry_priv->urb->actual_length -
1343 entry->queue->desc_size));
95ea3627
ID		 1344 u32 word0;
1345 u32 word1;
1346
f855c10b 1347 /*
a26cbc65
GW		 1348 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1349 * frame data in rt2x00usb.
f855c10b 1350 */
a26cbc65 1351 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
70a96109 1352 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID		 1353
1354 /*
70a96109 1355 * It is now safe to read the descriptor on all architectures.
f855c10b 1356 */
95ea3627
ID		 1357 rt2x00_desc_read(rxd, 0, &word0);
1358 rt2x00_desc_read(rxd, 1, &word1);
1359
4150c572 1360 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1361 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1362 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1363 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627 1364
dddfb478
ID		 1365 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
1366 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
1367 if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1368 rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
1369 }
1370
1371 if (rxdesc->cipher != CIPHER_NONE) {
1372 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1373 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
74415edb
ID		 1374 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1375
dddfb478
ID		 1376 /* ICV is located at the end of frame */
1377
f3d340c1 1378 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
dddfb478
ID		 1379 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1380 rxdesc->flags |= RX_FLAG_DECRYPTED;
1381 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1382 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1383 }
1384
95ea3627
ID		 1385 /*
1386 * Obtain the status about this packet.
89993890
ID		 1387 * When frame was received with an OFDM bitrate,
1388 * the signal is the PLCP value. If it was received with
1389 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1390 */
181d6902 1391 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
dddfb478
ID		 1392 rxdesc->rssi =
1393 rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
181d6902 1394 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1395
19d30e02
ID		 1396 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1397 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
6c6aa3c0
ID		 1398 else
1399 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
19d30e02
ID		 1400 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1401 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1402
2ae23854
MN		 1403 /*
1404 * Adjust the skb memory window to the frame boundaries.
1405 */
2ae23854 1406 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1407}
1408
1409/*
1410 * Interrupt functions.
1411 */
1412static void rt2500usb_beacondone(struct urb *urb)
1413{
181d6902 1414 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1415 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1416
0262ab0d 1417 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1418 return;
1419
1420 /*
1421 * Check if this was the guardian beacon,
1422 * if that was the case we need to send the real beacon now.
1423 * Otherwise we should free the sk_buffer, the device
1424 * should be doing the rest of the work now.
1425 */
b8be63ff
ID		 1426 if (bcn_priv->guardian_urb == urb) {
1427 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1428 } else if (bcn_priv->urb == urb) {
181d6902
ID		 1429 dev_kfree_skb(entry->skb);
1430 entry->skb = NULL;
95ea3627
ID		 1431 }
1432}
1433
1434/*
1435 * Device probe functions.
1436 */
1437static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1438{
1439 u16 word;
1440 u8 *mac;
6bb40dd1 1441 u8 bbp;
95ea3627
ID		 1442
1443 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1444
1445 /*
1446 * Start validation of the data that has been read.
1447 */
1448 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1449 if (!is_valid_ether_addr(mac)) {
1450 random_ether_addr(mac);
e174961c 1451 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
95ea3627
ID		 1452 }
1453
1454 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1455 if (word == 0xffff) {
1456 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1457 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1458 ANTENNA_SW_DIVERSITY);
1459 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1460 ANTENNA_SW_DIVERSITY);
1461 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1462 LED_MODE_DEFAULT);
95ea3627
ID		 1463 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1464 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1465 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1466 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1467 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1468 }
1469
1470 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1471 if (word == 0xffff) {
1472 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1473 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1474 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1475 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1476 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1477 }
1478
1479 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1480 if (word == 0xffff) {
1481 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1482 DEFAULT_RSSI_OFFSET);
1483 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1484 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1485 }
1486
1487 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1488 if (word == 0xffff) {
1489 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1490 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1491 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1492 }
1493
6bb40dd1
ID		 1494 /*
1495 * Switch lower vgc bound to current BBP R17 value,
1496 * lower the value a bit for better quality.
1497 */
1498 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1499 bbp -= 6;
1500
95ea3627
ID		 1501 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1502 if (word == 0xffff) {
1503 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1504 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1505 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1506 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
8d8acd46
ID		 1507 } else {
1508 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1509 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1510 }
1511
1512 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1513 if (word == 0xffff) {
1514 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1515 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1516 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1517 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1518 }
1519
1520 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1521 if (word == 0xffff) {
1522 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1523 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1524 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1525 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1526 }
1527
1528 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1529 if (word == 0xffff) {
1530 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1531 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1532 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1533 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1534 }
1535
1536 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1537 if (word == 0xffff) {
1538 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1539 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1540 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1541 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1542 }
1543
1544 return 0;
1545}
1546
1547static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1548{
1549 u16 reg;
1550 u16 value;
1551 u16 eeprom;
1552
1553 /*
1554 * Read EEPROM word for configuration.
1555 */
1556 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1557
1558 /*
1559 * Identify RF chipset.
1560 */
1561 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1562 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1563 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1564
755a957d 1565 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1566 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1567 return -ENODEV;
1568 }
1569
1570 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1571 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1572 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1573 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1574 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1575 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1576 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1577 return -ENODEV;
1578 }
1579
1580 /*
1581 * Identify default antenna configuration.
1582 */
addc81bd 1583 rt2x00dev->default_ant.tx =
95ea3627 1584 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1585 rt2x00dev->default_ant.rx =
95ea3627
ID		 1586 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1587
addc81bd
ID		 1588 /*
1589 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1590 * I am not 100% sure about this, but the legacy drivers do not
1591 * indicate antenna swapping in software is required when
1592 * diversity is enabled.
1593 */
1594 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1595 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1596 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1597 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1598
95ea3627
ID		 1599 /*
1600 * Store led mode, for correct led behaviour.
1601 */
771fd565 1602#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID		 1603 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1604
475433be 1605 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
217875a3 1606 if (value == LED_MODE_TXRX_ACTIVITY || value == LED_MODE_DEFAULT)
475433be
ID		 1607 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1608 LED_TYPE_ACTIVITY);
771fd565 1609#endif /* CONFIG_RT2X00_LIB_LEDS */
95ea3627 1610
7396faf4
ID		 1611 /*
1612 * Detect if this device has an hardware controlled radio.
1613 */
1614#ifdef CONFIG_RT2X00_LIB_RFKILL
1615 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1616 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1617#endif /* CONFIG_RT2X00_LIB_RFKILL */
1618
95ea3627
ID		 1619 /*
1620 * Check if the BBP tuning should be disabled.
1621 */
1622 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1623 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1624 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1625
1626 /*
1627 * Read the RSSI <-> dBm offset information.
1628 */
1629 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1630 rt2x00dev->rssi_offset =
1631 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1632
1633 return 0;
1634}
1635
1636/*
1637 * RF value list for RF2522
1638 * Supports: 2.4 GHz
1639 */
1640static const struct rf_channel rf_vals_bg_2522[] = {
1641 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1642 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1643 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1644 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1645 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1646 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1647 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1648 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1649 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1650 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1651 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1652 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1653 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1654 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1655};
1656
1657/*
1658 * RF value list for RF2523
1659 * Supports: 2.4 GHz
1660 */
1661static const struct rf_channel rf_vals_bg_2523[] = {
1662 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1663 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1664 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1665 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1666 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1667 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1668 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1669 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1670 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1671 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1672 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1673 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1674 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1675 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1676};
1677
1678/*
1679 * RF value list for RF2524
1680 * Supports: 2.4 GHz
1681 */
1682static const struct rf_channel rf_vals_bg_2524[] = {
1683 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1684 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1685 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1686 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1687 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1688 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1689 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1690 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1691 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1692 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1693 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1694 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1695 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1696 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1697};
1698
1699/*
1700 * RF value list for RF2525
1701 * Supports: 2.4 GHz
1702 */
1703static const struct rf_channel rf_vals_bg_2525[] = {
1704 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1705 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1706 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1707 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1708 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1709 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1710 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1711 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1712 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1713 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1714 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1715 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1716 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1717 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1718};
1719
1720/*
1721 * RF value list for RF2525e
1722 * Supports: 2.4 GHz
1723 */
1724static const struct rf_channel rf_vals_bg_2525e[] = {
1725 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1726 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1727 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1728 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1729 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1730 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1731 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1732 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1733 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1734 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1735 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1736 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1737 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1738 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1739};
1740
1741/*
1742 * RF value list for RF5222
1743 * Supports: 2.4 GHz & 5.2 GHz
1744 */
1745static const struct rf_channel rf_vals_5222[] = {
1746 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1747 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1748 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1749 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1750 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1751 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1752 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1753 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1754 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1755 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1756 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1757 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1758 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1759 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1760
1761 /* 802.11 UNI / HyperLan 2 */
1762 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1763 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1764 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1765 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1766 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1767 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1768 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1769 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1770
1771 /* 802.11 HyperLan 2 */
1772 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1773 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1774 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1775 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1776 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1777 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1778 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1779 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1780 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1781 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1782
1783 /* 802.11 UNII */
1784 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1785 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1786 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1787 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1788 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1789};
1790
8c5e7a5f 1791static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 1792{
1793 struct hw_mode_spec *spec = &rt2x00dev->spec;
8c5e7a5f
ID		 1794 struct channel_info *info;
1795 char *tx_power;
95ea3627
ID		 1796 unsigned int i;
1797
1798 /*
1799 * Initialize all hw fields.
1800 */
1801 rt2x00dev->hw->flags =
95ea3627 1802 IEEE80211_HW_RX_INCLUDES_FCS |
566bfe5a 1803 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
4be8c387
JB		 1804 IEEE80211_HW_SIGNAL_DBM |
1805 IEEE80211_HW_SUPPORTS_PS |
1806 IEEE80211_HW_PS_NULLFUNC_STACK;
566bfe5a 1807
95ea3627 1808 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
95ea3627 1809
14a3bf89 1810 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
95ea3627
ID		 1811 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1812 rt2x00_eeprom_addr(rt2x00dev,
1813 EEPROM_MAC_ADDR_0));
1814
95ea3627
ID		 1815 /*
1816 * Initialize hw_mode information.
1817 */
31562e80
ID		 1818 spec->supported_bands = SUPPORT_BAND_2GHZ;
1819 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1820
1821 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1822 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1823 spec->channels = rf_vals_bg_2522;
1824 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1825 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1826 spec->channels = rf_vals_bg_2523;
1827 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1828 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1829 spec->channels = rf_vals_bg_2524;
1830 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1831 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1832 spec->channels = rf_vals_bg_2525;
1833 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1834 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1835 spec->channels = rf_vals_bg_2525e;
1836 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1837 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1838 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1839 spec->channels = rf_vals_5222;
95ea3627 1840 }
8c5e7a5f
ID		 1841
1842 /*
1843 * Create channel information array
1844 */
1845 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1846 if (!info)
1847 return -ENOMEM;
1848
1849 spec->channels_info = info;
1850
1851 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1852 for (i = 0; i < 14; i++)
1853 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1854
1855 if (spec->num_channels > 14) {
1856 for (i = 14; i < spec->num_channels; i++)
1857 info[i].tx_power1 = DEFAULT_TXPOWER;
1858 }
1859
1860 return 0;
95ea3627
ID		 1861}
1862
1863static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1864{
1865 int retval;
1866
1867 /*
1868 * Allocate eeprom data.
1869 */
1870 retval = rt2500usb_validate_eeprom(rt2x00dev);
1871 if (retval)
1872 return retval;
1873
1874 retval = rt2500usb_init_eeprom(rt2x00dev);
1875 if (retval)
1876 return retval;
1877
1878 /*
1879 * Initialize hw specifications.
1880 */
8c5e7a5f
ID		 1881 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1882 if (retval)
1883 return retval;
95ea3627
ID		 1884
1885 /*
181d6902 1886 * This device requires the atim queue
95ea3627 1887 */
181d6902
ID		 1888 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1889 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
3a643d24 1890 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
dddfb478
ID		 1891 if (!modparam_nohwcrypt) {
1892 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
3f787bd6 1893 __set_bit(DRIVER_REQUIRE_COPY_IV, &rt2x00dev->flags);
dddfb478 1894 }
d06193f3 1895 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
95ea3627
ID		 1896
1897 /*
1898 * Set the rssi offset.
1899 */
1900 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1901
1902 return 0;
1903}
1904
95ea3627
ID		 1905static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1906 .tx = rt2x00mac_tx,
4150c572
JB		 1907 .start = rt2x00mac_start,
1908 .stop = rt2x00mac_stop,
95ea3627
ID		 1909 .add_interface = rt2x00mac_add_interface,
1910 .remove_interface = rt2x00mac_remove_interface,
1911 .config = rt2x00mac_config,
1912 .config_interface = rt2x00mac_config_interface,
3a643d24 1913 .configure_filter = rt2x00mac_configure_filter,
dddfb478 1914 .set_key = rt2x00mac_set_key,
95ea3627 1915 .get_stats = rt2x00mac_get_stats,
471b3efd 1916 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1917 .conf_tx = rt2x00mac_conf_tx,
1918 .get_tx_stats = rt2x00mac_get_tx_stats,
95ea3627
ID		 1919};
1920
1921static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1922 .probe_hw = rt2500usb_probe_hw,
1923 .initialize = rt2x00usb_initialize,
1924 .uninitialize = rt2x00usb_uninitialize,
798b7adb 1925 .clear_entry = rt2x00usb_clear_entry,
95ea3627 1926 .set_device_state = rt2500usb_set_device_state,
7396faf4 1927 .rfkill_poll = rt2500usb_rfkill_poll,
95ea3627
ID		 1928 .link_stats = rt2500usb_link_stats,
1929 .reset_tuner = rt2500usb_reset_tuner,
1930 .link_tuner = rt2500usb_link_tuner,
1931 .write_tx_desc = rt2500usb_write_tx_desc,
1932 .write_tx_data = rt2x00usb_write_tx_data,
bd88a781 1933 .write_beacon = rt2500usb_write_beacon,
dd9fa2d2 1934 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1935 .kick_tx_queue = rt2500usb_kick_tx_queue,
1936 .fill_rxdone = rt2500usb_fill_rxdone,
dddfb478
ID		 1937 .config_shared_key = rt2500usb_config_key,
1938 .config_pairwise_key = rt2500usb_config_key,
3a643d24 1939 .config_filter = rt2500usb_config_filter,
6bb40dd1 1940 .config_intf = rt2500usb_config_intf,
72810379 1941 .config_erp = rt2500usb_config_erp,
e4ea1c40 1942 .config_ant = rt2500usb_config_ant,
95ea3627
ID		 1943 .config = rt2500usb_config,
1944};
1945
181d6902
ID		 1946static const struct data_queue_desc rt2500usb_queue_rx = {
1947 .entry_num = RX_ENTRIES,
1948 .data_size = DATA_FRAME_SIZE,
1949 .desc_size = RXD_DESC_SIZE,
b8be63ff 1950 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1951};
1952
1953static const struct data_queue_desc rt2500usb_queue_tx = {
1954 .entry_num = TX_ENTRIES,
1955 .data_size = DATA_FRAME_SIZE,
1956 .desc_size = TXD_DESC_SIZE,
b8be63ff 1957 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1958};
1959
1960static const struct data_queue_desc rt2500usb_queue_bcn = {
1961 .entry_num = BEACON_ENTRIES,
1962 .data_size = MGMT_FRAME_SIZE,
1963 .desc_size = TXD_DESC_SIZE,
1964 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1965};
1966
1967static const struct data_queue_desc rt2500usb_queue_atim = {
1968 .entry_num = ATIM_ENTRIES,
1969 .data_size = DATA_FRAME_SIZE,
1970 .desc_size = TXD_DESC_SIZE,
b8be63ff 1971 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1972};
1973
95ea3627 1974static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1975 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1976 .max_sta_intf = 1,
1977 .max_ap_intf = 1,
95ea3627
ID		 1978 .eeprom_size = EEPROM_SIZE,
1979 .rf_size = RF_SIZE,
61448f88 1980 .tx_queues = NUM_TX_QUEUES,
181d6902
ID		 1981 .rx = &rt2500usb_queue_rx,
1982 .tx = &rt2500usb_queue_tx,
1983 .bcn = &rt2500usb_queue_bcn,
1984 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1985 .lib = &rt2500usb_rt2x00_ops,
1986 .hw = &rt2500usb_mac80211_ops,
1987#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1988 .debugfs = &rt2500usb_rt2x00debug,
1989#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1990};
1991
1992/*
1993 * rt2500usb module information.
1994 */
1995static struct usb_device_id rt2500usb_device_table[] = {
1996 /* ASUS */
1997 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1998 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1999 /* Belkin */
2000 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
2001 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
2002 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
2003 /* Cisco Systems */
2004 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
2005 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
2006 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
2007 /* Conceptronic */
2008 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
2009 /* D-LINK */
2010 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
2011 /* Gigabyte */
2012 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
2013 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
2014 /* Hercules */
2015 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
2016 /* Melco */
db433feb 2017 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2018 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
2019 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
2020 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
2021 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 2022 /* MSI */
2023 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
2024 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
2025 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
2026 /* Ralink */
2027 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
2028 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
2029 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
2030 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
2031 /* Siemens */
2032 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
2033 /* SMC */
2034 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
2035 /* Spairon */
2036 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
2037 /* Trust */
2038 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
2039 /* Zinwell */
2040 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
2041 { 0, }
2042};
2043
2044MODULE_AUTHOR(DRV_PROJECT);
2045MODULE_VERSION(DRV_VERSION);
2046MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
2047MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
2048MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
2049MODULE_LICENSE("GPL");
2050
2051static struct usb_driver rt2500usb_driver = {
2360157c 2052 .name = KBUILD_MODNAME,
95ea3627
ID		 2053 .id_table = rt2500usb_device_table,
2054 .probe = rt2x00usb_probe,
2055 .disconnect = rt2x00usb_disconnect,
2056 .suspend = rt2x00usb_suspend,
2057 .resume = rt2x00usb_resume,
2058};
2059
2060static int __init rt2500usb_init(void)
2061{
2062 return usb_register(&rt2500usb_driver);
2063}
2064
2065static void __exit rt2500usb_exit(void)
2066{
2067 usb_deregister(&rt2500usb_driver);
2068}
2069
2070module_init(rt2500usb_init);
2071module_exit(rt2500usb_exit);
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