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rt2x00: Remove data_desc structure
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627
ID		 1/*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27/*
28 * Set enviroment defines for rt2x00.h
29 */
30#define DRV_NAME "rt2500usb"
31
32#include <linux/delay.h>
33#include <linux/etherdevice.h>
34#include <linux/init.h>
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/usb.h>
38
39#include "rt2x00.h"
40#include "rt2x00usb.h"
41#include "rt2500usb.h"
42
43/*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 */
0e14f6d3 56static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 57 const unsigned int offset,
58 u16 *value)
59{
60 __le16 reg;
61 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
62 USB_VENDOR_REQUEST_IN, offset,
63 &reg, sizeof(u16), REGISTER_TIMEOUT);
64 *value = le16_to_cpu(reg);
65}
66
0e14f6d3 67static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 68 const unsigned int offset,
69 void *value, const u16 length)
70{
71 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
72 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
73 USB_VENDOR_REQUEST_IN, offset,
74 value, length, timeout);
75}
76
0e14f6d3 77static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 78 const unsigned int offset,
79 u16 value)
80{
81 __le16 reg = cpu_to_le16(value);
82 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
83 USB_VENDOR_REQUEST_OUT, offset,
84 &reg, sizeof(u16), REGISTER_TIMEOUT);
85}
86
0e14f6d3 87static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 88 const unsigned int offset,
89 void *value, const u16 length)
90{
91 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
92 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
93 USB_VENDOR_REQUEST_OUT, offset,
94 value, length, timeout);
95}
96
0e14f6d3 97static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 98{
99 u16 reg;
100 unsigned int i;
101
102 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
103 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
104 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
105 break;
106 udelay(REGISTER_BUSY_DELAY);
107 }
108
109 return reg;
110}
111
0e14f6d3 112static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 113 const unsigned int word, const u8 value)
114{
115 u16 reg;
116
117 /*
118 * Wait until the BBP becomes ready.
119 */
120 reg = rt2500usb_bbp_check(rt2x00dev);
121 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
122 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
123 return;
124 }
125
126 /*
127 * Write the data into the BBP.
128 */
129 reg = 0;
130 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
131 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
132 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
133
134 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
135}
136
0e14f6d3 137static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 138 const unsigned int word, u8 *value)
139{
140 u16 reg;
141
142 /*
143 * Wait until the BBP becomes ready.
144 */
145 reg = rt2500usb_bbp_check(rt2x00dev);
146 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
147 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
148 return;
149 }
150
151 /*
152 * Write the request into the BBP.
153 */
154 reg = 0;
155 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
156 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
157
158 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
159
160 /*
161 * Wait until the BBP becomes ready.
162 */
163 reg = rt2500usb_bbp_check(rt2x00dev);
164 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
165 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
166 *value = 0xff;
167 return;
168 }
169
170 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
171 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
172}
173
0e14f6d3 174static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 175 const unsigned int word, const u32 value)
176{
177 u16 reg;
178 unsigned int i;
179
180 if (!word)
181 return;
182
183 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
184 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
185 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
186 goto rf_write;
187 udelay(REGISTER_BUSY_DELAY);
188 }
189
190 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
191 return;
192
193rf_write:
194 reg = 0;
195 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
196 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
197
198 reg = 0;
199 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
200 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
201 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
202 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
203
204 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
205 rt2x00_rf_write(rt2x00dev, word, value);
206}
207
208#ifdef CONFIG_RT2X00_LIB_DEBUGFS
209#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
210
0e14f6d3 211static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 212 const unsigned int word, u32 *data)
213{
214 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
215}
216
0e14f6d3 217static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 218 const unsigned int word, u32 data)
219{
220 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
221}
222
223static const struct rt2x00debug rt2500usb_rt2x00debug = {
224 .owner = THIS_MODULE,
225 .csr = {
226 .read = rt2500usb_read_csr,
227 .write = rt2500usb_write_csr,
228 .word_size = sizeof(u16),
229 .word_count = CSR_REG_SIZE / sizeof(u16),
230 },
231 .eeprom = {
232 .read = rt2x00_eeprom_read,
233 .write = rt2x00_eeprom_write,
234 .word_size = sizeof(u16),
235 .word_count = EEPROM_SIZE / sizeof(u16),
236 },
237 .bbp = {
238 .read = rt2500usb_bbp_read,
239 .write = rt2500usb_bbp_write,
240 .word_size = sizeof(u8),
241 .word_count = BBP_SIZE / sizeof(u8),
242 },
243 .rf = {
244 .read = rt2x00_rf_read,
245 .write = rt2500usb_rf_write,
246 .word_size = sizeof(u32),
247 .word_count = RF_SIZE / sizeof(u32),
248 },
249};
250#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
251
252/*
253 * Configuration handlers.
254 */
4abee4bb
ID		 255static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev,
256 __le32 *mac)
95ea3627 257{
dd87145d 258 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
4abee4bb 259 (3 * sizeof(__le16)));
95ea3627
ID		 260}
261
4abee4bb
ID		 262static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev,
263 __le32 *bssid)
95ea3627 264{
4abee4bb
ID		 265 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, bssid,
266 (3 * sizeof(__le16)));
95ea3627
ID		 267}
268
feb24691
ID		 269static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
270 const int tsf_sync)
95ea3627
ID		 271{
272 u16 reg;
273
274 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
275
95ea3627
ID		 276 /*
277 * Enable beacon config
278 */
279 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
280 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
a137e202 281 (PREAMBLE + get_duration(IEEE80211_HEADER, 20)) >> 6);
feb24691 282 if (type == IEEE80211_IF_TYPE_STA)
95ea3627
ID		 283 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
284 else
285 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
286 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
287
288 /*
289 * Enable synchronisation.
290 */
291 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
292 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
293 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
294
295 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
4150c572
JB		 296 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
297 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627 298 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
feb24691 299 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, tsf_sync);
95ea3627
ID		 300 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
301}
302
5c58ee51
ID		 303static void rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
304 const int short_preamble,
305 const int ack_timeout,
306 const int ack_consume_time)
95ea3627 307{
95ea3627 308 u16 reg;
95ea3627 309
5c58ee51
ID		 310 /*
311 * When in atomic context, reschedule and let rt2x00lib
312 * call this function again.
313 */
314 if (in_atomic()) {
315 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
316 return;
317 }
95ea3627
ID		 318
319 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
5c58ee51 320 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
95ea3627
ID		 321 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
322
323 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 324 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
5c58ee51 325 !!short_preamble);
95ea3627
ID		 326 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
327}
328
329static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51
ID		 330 const int phymode,
331 const int basic_rate_mask)
95ea3627 332{
5c58ee51 333 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627 334
5c58ee51 335 if (phymode == HWMODE_B) {
95ea3627
ID		 336 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
337 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
338 } else {
339 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
340 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
341 }
342}
343
344static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 345 struct rf_channel *rf, const int txpower)
95ea3627 346{
95ea3627
ID		 347 /*
348 * Set TXpower.
349 */
5c58ee51 350 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID		 351
352 /*
353 * For RT2525E we should first set the channel to half band higher.
354 */
355 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
356 static const u32 vals[] = {
357 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
358 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
359 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
360 0x00000902, 0x00000906
361 };
362
5c58ee51
ID		 363 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
364 if (rf->rf4)
365 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 366 }
367
5c58ee51
ID		 368 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
369 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
370 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
371 if (rf->rf4)
372 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 373}
374
375static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
376 const int txpower)
377{
378 u32 rf3;
379
380 rt2x00_rf_read(rt2x00dev, 3, &rf3);
381 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
382 rt2500usb_rf_write(rt2x00dev, 3, rf3);
383}
384
385static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 386 struct antenna_setup *ant)
95ea3627
ID		 387{
388 u8 r2;
389 u8 r14;
390 u16 csr5;
391 u16 csr6;
392
393 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
394 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
395 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
396 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
397
398 /*
399 * Configure the TX antenna.
400 */
addc81bd 401 switch (ant->tx) {
95ea3627
ID		 402 case ANTENNA_HW_DIVERSITY:
403 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
404 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
405 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
406 break;
407 case ANTENNA_A:
408 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
409 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
410 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
411 break;
39e75857
ID		 412 case ANTENNA_SW_DIVERSITY:
413 /*
414 * NOTE: We should never come here because rt2x00lib is
415 * supposed to catch this and send us the correct antenna
416 * explicitely. However we are nog going to bug about this.
417 * Instead, just default to antenna B.
418 */
95ea3627
ID		 419 case ANTENNA_B:
420 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
421 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
422 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
423 break;
424 }
425
426 /*
427 * Configure the RX antenna.
428 */
addc81bd 429 switch (ant->rx) {
95ea3627
ID		 430 case ANTENNA_HW_DIVERSITY:
431 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
432 break;
433 case ANTENNA_A:
434 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
435 break;
39e75857
ID		 436 case ANTENNA_SW_DIVERSITY:
437 /*
438 * NOTE: We should never come here because rt2x00lib is
439 * supposed to catch this and send us the correct antenna
440 * explicitely. However we are nog going to bug about this.
441 * Instead, just default to antenna B.
442 */
95ea3627
ID		 443 case ANTENNA_B:
444 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
445 break;
446 }
447
448 /*
449 * RT2525E and RT5222 need to flip TX I/Q
450 */
451 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
452 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
453 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
454 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
455 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
456
457 /*
458 * RT2525E does not need RX I/Q Flip.
459 */
460 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
461 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
462 } else {
463 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
464 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
465 }
466
467 rt2500usb_bbp_write(rt2x00dev, 2, r2);
468 rt2500usb_bbp_write(rt2x00dev, 14, r14);
469 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
470 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
471}
472
473static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 474 struct rt2x00lib_conf *libconf)
95ea3627
ID		 475{
476 u16 reg;
477
5c58ee51 478 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
95ea3627
ID		 479
480 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 481 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
482 libconf->conf->beacon_int * 4);
95ea3627
ID		 483 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
484}
485
486static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
487 const unsigned int flags,
5c58ee51 488 struct rt2x00lib_conf *libconf)
95ea3627 489{
95ea3627 490 if (flags & CONFIG_UPDATE_PHYMODE)
5c58ee51
ID		 491 rt2500usb_config_phymode(rt2x00dev, libconf->phymode,
492 libconf->basic_rates);
95ea3627 493 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID		 494 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
495 libconf->conf->power_level);
95ea3627 496 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID		 497 rt2500usb_config_txpower(rt2x00dev,
498 libconf->conf->power_level);
95ea3627 499 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 500 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 501 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 502 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 503}
504
505/*
506 * LED functions.
507 */
508static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
509{
510 u16 reg;
511
512 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
513 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
514 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
515 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
516
517 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
ddc827f9
ID		 518 rt2x00_set_field16(&reg, MAC_CSR20_LINK,
519 (rt2x00dev->led_mode != LED_MODE_ASUS));
520 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY,
521 (rt2x00dev->led_mode != LED_MODE_TXRX_ACTIVITY));
95ea3627
ID		 522 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
523}
524
525static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
526{
527 u16 reg;
528
529 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
530 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
531 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
532 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
533}
534
535/*
536 * Link tuning
537 */
ebcf26da
ID		 538static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
539 struct link_qual *qual)
95ea3627
ID		 540{
541 u16 reg;
542
543 /*
544 * Update FCS error count from register.
545 */
546 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 547 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 548
549 /*
550 * Update False CCA count from register.
551 */
552 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 553 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 554}
555
556static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
557{
558 u16 eeprom;
559 u16 value;
560
561 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
562 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
563 rt2500usb_bbp_write(rt2x00dev, 24, value);
564
565 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
566 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
567 rt2500usb_bbp_write(rt2x00dev, 25, value);
568
569 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
570 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
571 rt2500usb_bbp_write(rt2x00dev, 61, value);
572
573 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
574 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
575 rt2500usb_bbp_write(rt2x00dev, 17, value);
576
577 rt2x00dev->link.vgc_level = value;
578}
579
580static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
581{
582 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
583 u16 bbp_thresh;
584 u16 vgc_bound;
585 u16 sens;
586 u16 r24;
587 u16 r25;
588 u16 r61;
589 u16 r17_sens;
590 u8 r17;
591 u8 up_bound;
592 u8 low_bound;
593
594 /*
595 * Determine the BBP tuning threshold and correctly
596 * set BBP 24, 25 and 61.
597 */
598 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
599 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
600
601 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
602 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
603 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
604
605 if ((rssi + bbp_thresh) > 0) {
606 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
607 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
608 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
609 } else {
610 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
611 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
612 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
613 }
614
615 rt2500usb_bbp_write(rt2x00dev, 24, r24);
616 rt2500usb_bbp_write(rt2x00dev, 25, r25);
617 rt2500usb_bbp_write(rt2x00dev, 61, r61);
618
619 /*
620 * Read current r17 value, as well as the sensitivity values
621 * for the r17 register.
622 */
623 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
624 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
625
626 /*
627 * A too low RSSI will cause too much false CCA which will
628 * then corrupt the R17 tuning. To remidy this the tuning should
629 * be stopped (While making sure the R17 value will not exceed limits)
630 */
631 if (rssi >= -40) {
632 if (r17 != 0x60)
633 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
634 return;
635 }
636
637 /*
638 * Special big-R17 for short distance
639 */
640 if (rssi >= -58) {
641 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
642 if (r17 != sens)
643 rt2500usb_bbp_write(rt2x00dev, 17, sens);
644 return;
645 }
646
647 /*
648 * Special mid-R17 for middle distance
649 */
650 if (rssi >= -74) {
651 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
652 if (r17 != sens)
653 rt2500usb_bbp_write(rt2x00dev, 17, sens);
654 return;
655 }
656
657 /*
658 * Leave short or middle distance condition, restore r17
659 * to the dynamic tuning range.
660 */
661 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
662 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
663
664 low_bound = 0x32;
665 if (rssi >= -77)
666 up_bound = vgc_bound;
667 else
668 up_bound = vgc_bound - (-77 - rssi);
669
670 if (up_bound < low_bound)
671 up_bound = low_bound;
672
673 if (r17 > up_bound) {
674 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
675 rt2x00dev->link.vgc_level = up_bound;
ebcf26da 676 } else if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 677 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
678 rt2x00dev->link.vgc_level = r17;
ebcf26da 679 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 680 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
681 rt2x00dev->link.vgc_level = r17;
682 }
683}
684
685/*
686 * Initialization functions.
687 */
688static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
689{
690 u16 reg;
691
692 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
693 USB_MODE_TEST, REGISTER_TIMEOUT);
694 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
695 0x00f0, REGISTER_TIMEOUT);
696
697 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
698 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
699 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
700
701 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
702 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
703
704 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
705 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
706 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
707 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
708 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
709
710 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
711 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
712 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
713 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
714 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
715
716 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
717 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
718 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
719 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
720 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
721 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
722
723 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
724 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
725 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
726 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
727 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
728 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
729
730 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
731 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
732 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
733 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
734 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
735 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
736
737 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
738 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
739 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
740 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
741 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
742 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
743
744 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
745 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
746
747 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
748 return -EBUSY;
749
750 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
751 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
752 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
753 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
754 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
755
755a957d 756 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 757 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 758 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 759 } else {
ddc827f9
ID		 760 reg = 0;
761 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
762 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 763 }
764 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
765
766 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
767 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
768 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
769 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
770
771 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
772 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
773 rt2x00dev->rx->data_size);
774 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
775
776 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
777 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
778 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
779 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
780
781 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
782 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
783 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
784
785 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
786 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
787 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
788
789 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
790 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
791 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
792
793 return 0;
794}
795
796static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
797{
798 unsigned int i;
799 u16 eeprom;
800 u8 value;
801 u8 reg_id;
802
803 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
804 rt2500usb_bbp_read(rt2x00dev, 0, &value);
805 if ((value != 0xff) && (value != 0x00))
806 goto continue_csr_init;
807 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
808 udelay(REGISTER_BUSY_DELAY);
809 }
810
811 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
812 return -EACCES;
813
814continue_csr_init:
815 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
816 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
817 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
818 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
819 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
820 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
821 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
822 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
823 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
824 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
825 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
826 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
827 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
828 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
829 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
830 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
831 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
832 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
833 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
834 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
835 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
836 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
837 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
838 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
839 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
840 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
841 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
842 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
843 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
844 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
845 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
846
847 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
848 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
849 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
850
851 if (eeprom != 0xffff && eeprom != 0x0000) {
852 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
853 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
854 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
855 reg_id, value);
856 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
857 }
858 }
859 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
860
861 return 0;
862}
863
864/*
865 * Device state switch handlers.
866 */
867static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
868 enum dev_state state)
869{
870 u16 reg;
871
872 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
873 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
874 state == STATE_RADIO_RX_OFF);
875 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
876}
877
878static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
879{
880 /*
881 * Initialize all registers.
882 */
883 if (rt2500usb_init_registers(rt2x00dev) ||
884 rt2500usb_init_bbp(rt2x00dev)) {
885 ERROR(rt2x00dev, "Register initialization failed.\n");
886 return -EIO;
887 }
888
889 rt2x00usb_enable_radio(rt2x00dev);
890
891 /*
892 * Enable LED
893 */
894 rt2500usb_enable_led(rt2x00dev);
895
896 return 0;
897}
898
899static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
900{
901 /*
902 * Disable LED
903 */
904 rt2500usb_disable_led(rt2x00dev);
905
906 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
907 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
908
909 /*
910 * Disable synchronisation.
911 */
912 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
913
914 rt2x00usb_disable_radio(rt2x00dev);
915}
916
917static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
918 enum dev_state state)
919{
920 u16 reg;
921 u16 reg2;
922 unsigned int i;
923 char put_to_sleep;
924 char bbp_state;
925 char rf_state;
926
927 put_to_sleep = (state != STATE_AWAKE);
928
929 reg = 0;
930 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
931 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
932 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
933 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
934 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
935 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
936
937 /*
938 * Device is not guaranteed to be in the requested state yet.
939 * We must wait until the register indicates that the
940 * device has entered the correct state.
941 */
942 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
943 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
944 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
945 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
946 if (bbp_state == state && rf_state == state)
947 return 0;
948 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
949 msleep(30);
950 }
951
952 NOTICE(rt2x00dev, "Device failed to enter state %d, "
953 "current device state: bbp %d and rf %d.\n",
954 state, bbp_state, rf_state);
955
956 return -EBUSY;
957}
958
959static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
960 enum dev_state state)
961{
962 int retval = 0;
963
964 switch (state) {
965 case STATE_RADIO_ON:
966 retval = rt2500usb_enable_radio(rt2x00dev);
967 break;
968 case STATE_RADIO_OFF:
969 rt2500usb_disable_radio(rt2x00dev);
970 break;
971 case STATE_RADIO_RX_ON:
972 case STATE_RADIO_RX_OFF:
973 rt2500usb_toggle_rx(rt2x00dev, state);
974 break;
975 case STATE_DEEP_SLEEP:
976 case STATE_SLEEP:
977 case STATE_STANDBY:
978 case STATE_AWAKE:
979 retval = rt2500usb_set_state(rt2x00dev, state);
980 break;
981 default:
982 retval = -ENOTSUPP;
983 break;
984 }
985
986 return retval;
987}
988
989/*
990 * TX descriptor initialization
991 */
992static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
4bd7c452 993 __le32 *txd,
4150c572 994 struct txdata_entry_desc *desc,
95ea3627
ID		 995 struct ieee80211_hdr *ieee80211hdr,
996 unsigned int length,
997 struct ieee80211_tx_control *control)
998{
999 u32 word;
1000
1001 /*
1002 * Start writing the descriptor words.
1003 */
1004 rt2x00_desc_read(txd, 1, &word);
1005 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1006 rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
1007 rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1008 rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1009 rt2x00_desc_write(txd, 1, word);
1010
1011 rt2x00_desc_read(txd, 2, &word);
1012 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1013 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1014 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1015 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1016 rt2x00_desc_write(txd, 2, word);
1017
1018 rt2x00_desc_read(txd, 0, &word);
1019 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1020 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1021 test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1022 rt2x00_set_field32(&word, TXD_W0_ACK,
1023 !(control->flags & IEEE80211_TXCTL_NO_ACK));
1024 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1025 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1026 rt2x00_set_field32(&word, TXD_W0_OFDM,
1027 test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1028 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1029 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
1030 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1031 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1032 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1033 rt2x00_desc_write(txd, 0, word);
1034}
1035
dd9fa2d2 1036static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1037 struct sk_buff *skb)
dd9fa2d2
ID		 1038{
1039 int length;
1040
1041 /*
1042 * The length _must_ be a multiple of 2,
1043 * but it must _not_ be a multiple of the USB packet size.
1044 */
1045 length = roundup(skb->len, 2);
b242e891 1046 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID		 1047
1048 return length;
1049}
1050
95ea3627
ID		 1051/*
1052 * TX data initialization
1053 */
1054static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1055 unsigned int queue)
1056{
1057 u16 reg;
1058
1059 if (queue != IEEE80211_TX_QUEUE_BEACON)
1060 return;
1061
1062 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1063 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1064 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1065 /*
1066 * Beacon generation will fail initially.
1067 * To prevent this we need to register the TXRX_CSR19
1068 * register several times.
1069 */
1070 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1071 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1072 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1073 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1074 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1075 }
1076}
1077
1078/*
1079 * RX control handlers
1080 */
4150c572
JB		 1081static void rt2500usb_fill_rxdone(struct data_entry *entry,
1082 struct rxdata_entry_desc *desc)
95ea3627
ID		 1083{
1084 struct urb *urb = entry->priv;
4bd7c452
ID		 1085 __le32 *rxd = (__le32 *)(entry->skb->data +
1086 (urb->actual_length - entry->ring->desc_size));
95ea3627
ID		 1087 u32 word0;
1088 u32 word1;
1089
1090 rt2x00_desc_read(rxd, 0, &word0);
1091 rt2x00_desc_read(rxd, 1, &word1);
1092
4150c572
JB		 1093 desc->flags = 0;
1094 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1095 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1096 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1097 desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1098
1099 /*
1100 * Obtain the status about this packet.
1101 */
4150c572
JB		 1102 desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1103 desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
95ea3627 1104 entry->ring->rt2x00dev->rssi_offset;
4150c572
JB		 1105 desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1106 desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
95ea3627 1107
4150c572 1108 return;
95ea3627
ID		 1109}
1110
1111/*
1112 * Interrupt functions.
1113 */
1114static void rt2500usb_beacondone(struct urb *urb)
1115{
1116 struct data_entry *entry = (struct data_entry *)urb->context;
1117 struct data_ring *ring = entry->ring;
1118
1119 if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
1120 return;
1121
1122 /*
1123 * Check if this was the guardian beacon,
1124 * if that was the case we need to send the real beacon now.
1125 * Otherwise we should free the sk_buffer, the device
1126 * should be doing the rest of the work now.
1127 */
1128 if (ring->index == 1) {
1129 rt2x00_ring_index_done_inc(ring);
1130 entry = rt2x00_get_data_entry(ring);
1131 usb_submit_urb(entry->priv, GFP_ATOMIC);
1132 rt2x00_ring_index_inc(ring);
1133 } else if (ring->index_done == 1) {
1134 entry = rt2x00_get_data_entry_done(ring);
1135 if (entry->skb) {
1136 dev_kfree_skb(entry->skb);
1137 entry->skb = NULL;
1138 }
1139 rt2x00_ring_index_done_inc(ring);
1140 }
1141}
1142
1143/*
1144 * Device probe functions.
1145 */
1146static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1147{
1148 u16 word;
1149 u8 *mac;
1150
1151 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1152
1153 /*
1154 * Start validation of the data that has been read.
1155 */
1156 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1157 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1158 DECLARE_MAC_BUF(macbuf);
1159
95ea3627 1160 random_ether_addr(mac);
0795af57 1161 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1162 }
1163
1164 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1165 if (word == 0xffff) {
1166 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1167 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1168 ANTENNA_SW_DIVERSITY);
1169 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1170 ANTENNA_SW_DIVERSITY);
1171 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1172 LED_MODE_DEFAULT);
95ea3627
ID		 1173 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1174 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1175 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1176 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1177 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1178 }
1179
1180 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1181 if (word == 0xffff) {
1182 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1183 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1184 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1185 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1186 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1187 }
1188
1189 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1190 if (word == 0xffff) {
1191 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1192 DEFAULT_RSSI_OFFSET);
1193 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1194 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1195 }
1196
1197 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1198 if (word == 0xffff) {
1199 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1200 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1201 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1202 }
1203
1204 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1205 if (word == 0xffff) {
1206 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1207 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1208 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1209 }
1210
1211 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1212 if (word == 0xffff) {
1213 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1214 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1215 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1216 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1217 }
1218
1219 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1220 if (word == 0xffff) {
1221 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1222 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1223 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1224 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1225 }
1226
1227 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1228 if (word == 0xffff) {
1229 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1230 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1231 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1232 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1233 }
1234
1235 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1236 if (word == 0xffff) {
1237 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1238 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1239 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1240 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1241 }
1242
1243 return 0;
1244}
1245
1246static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1247{
1248 u16 reg;
1249 u16 value;
1250 u16 eeprom;
1251
1252 /*
1253 * Read EEPROM word for configuration.
1254 */
1255 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1256
1257 /*
1258 * Identify RF chipset.
1259 */
1260 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1261 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1262 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1263
755a957d 1264 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1265 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1266 return -ENODEV;
1267 }
1268
1269 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1270 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1271 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1272 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1273 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1274 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1275 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1276 return -ENODEV;
1277 }
1278
1279 /*
1280 * Identify default antenna configuration.
1281 */
addc81bd 1282 rt2x00dev->default_ant.tx =
95ea3627 1283 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1284 rt2x00dev->default_ant.rx =
95ea3627
ID		 1285 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1286
addc81bd
ID		 1287 /*
1288 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1289 * I am not 100% sure about this, but the legacy drivers do not
1290 * indicate antenna swapping in software is required when
1291 * diversity is enabled.
1292 */
1293 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1294 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1295 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1296 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1297
95ea3627
ID		 1298 /*
1299 * Store led mode, for correct led behaviour.
1300 */
1301 rt2x00dev->led_mode =
1302 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1303
1304 /*
1305 * Check if the BBP tuning should be disabled.
1306 */
1307 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1308 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1309 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1310
1311 /*
1312 * Read the RSSI <-> dBm offset information.
1313 */
1314 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1315 rt2x00dev->rssi_offset =
1316 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1317
1318 return 0;
1319}
1320
1321/*
1322 * RF value list for RF2522
1323 * Supports: 2.4 GHz
1324 */
1325static const struct rf_channel rf_vals_bg_2522[] = {
1326 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1327 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1328 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1329 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1330 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1331 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1332 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1333 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1334 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1335 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1336 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1337 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1338 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1339 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1340};
1341
1342/*
1343 * RF value list for RF2523
1344 * Supports: 2.4 GHz
1345 */
1346static const struct rf_channel rf_vals_bg_2523[] = {
1347 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1348 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1349 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1350 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1351 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1352 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1353 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1354 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1355 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1356 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1357 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1358 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1359 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1360 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1361};
1362
1363/*
1364 * RF value list for RF2524
1365 * Supports: 2.4 GHz
1366 */
1367static const struct rf_channel rf_vals_bg_2524[] = {
1368 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1369 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1370 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1371 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1372 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1373 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1374 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1375 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1376 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1377 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1378 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1379 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1380 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1381 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1382};
1383
1384/*
1385 * RF value list for RF2525
1386 * Supports: 2.4 GHz
1387 */
1388static const struct rf_channel rf_vals_bg_2525[] = {
1389 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1390 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1391 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1392 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1393 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1394 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1395 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1396 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1397 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1398 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1399 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1400 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1401 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1402 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1403};
1404
1405/*
1406 * RF value list for RF2525e
1407 * Supports: 2.4 GHz
1408 */
1409static const struct rf_channel rf_vals_bg_2525e[] = {
1410 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1411 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1412 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1413 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1414 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1415 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1416 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1417 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1418 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1419 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1420 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1421 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1422 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1423 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1424};
1425
1426/*
1427 * RF value list for RF5222
1428 * Supports: 2.4 GHz & 5.2 GHz
1429 */
1430static const struct rf_channel rf_vals_5222[] = {
1431 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1432 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1433 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1434 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1435 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1436 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1437 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1438 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1439 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1440 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1441 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1442 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1443 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1444 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1445
1446 /* 802.11 UNI / HyperLan 2 */
1447 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1448 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1449 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1450 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1451 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1452 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1453 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1454 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1455
1456 /* 802.11 HyperLan 2 */
1457 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1458 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1459 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1460 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1461 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1462 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1463 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1464 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1465 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1466 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1467
1468 /* 802.11 UNII */
1469 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1470 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1471 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1472 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1473 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1474};
1475
1476static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1477{
1478 struct hw_mode_spec *spec = &rt2x00dev->spec;
1479 u8 *txpower;
1480 unsigned int i;
1481
1482 /*
1483 * Initialize all hw fields.
1484 */
1485 rt2x00dev->hw->flags =
1486 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1487 IEEE80211_HW_RX_INCLUDES_FCS |
4150c572 1488 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
95ea3627
ID		 1489 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1490 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1491 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1492 rt2x00dev->hw->queues = 2;
1493
1494 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1495 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1496 rt2x00_eeprom_addr(rt2x00dev,
1497 EEPROM_MAC_ADDR_0));
1498
1499 /*
1500 * Convert tx_power array in eeprom.
1501 */
1502 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1503 for (i = 0; i < 14; i++)
1504 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1505
1506 /*
1507 * Initialize hw_mode information.
1508 */
1509 spec->num_modes = 2;
1510 spec->num_rates = 12;
1511 spec->tx_power_a = NULL;
1512 spec->tx_power_bg = txpower;
1513 spec->tx_power_default = DEFAULT_TXPOWER;
1514
1515 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1516 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1517 spec->channels = rf_vals_bg_2522;
1518 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1519 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1520 spec->channels = rf_vals_bg_2523;
1521 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1522 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1523 spec->channels = rf_vals_bg_2524;
1524 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1525 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1526 spec->channels = rf_vals_bg_2525;
1527 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1528 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1529 spec->channels = rf_vals_bg_2525e;
1530 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1531 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1532 spec->channels = rf_vals_5222;
1533 spec->num_modes = 3;
1534 }
1535}
1536
1537static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1538{
1539 int retval;
1540
1541 /*
1542 * Allocate eeprom data.
1543 */
1544 retval = rt2500usb_validate_eeprom(rt2x00dev);
1545 if (retval)
1546 return retval;
1547
1548 retval = rt2500usb_init_eeprom(rt2x00dev);
1549 if (retval)
1550 return retval;
1551
1552 /*
1553 * Initialize hw specifications.
1554 */
1555 rt2500usb_probe_hw_mode(rt2x00dev);
1556
1557 /*
4150c572 1558 * This device requires the beacon ring
95ea3627 1559 */
066cb637 1560 __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
95ea3627
ID		 1561
1562 /*
1563 * Set the rssi offset.
1564 */
1565 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1566
1567 return 0;
1568}
1569
1570/*
1571 * IEEE80211 stack callback functions.
1572 */
4150c572
JB		 1573static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1574 unsigned int changed_flags,
1575 unsigned int *total_flags,
1576 int mc_count,
1577 struct dev_addr_list *mc_list)
1578{
1579 struct rt2x00_dev *rt2x00dev = hw->priv;
1580 struct interface *intf = &rt2x00dev->interface;
1581 u16 reg;
1582
1583 /*
1584 * Mask off any flags we are going to ignore from
1585 * the total_flags field.
1586 */
1587 *total_flags &=
1588 FIF_ALLMULTI |
1589 FIF_FCSFAIL |
1590 FIF_PLCPFAIL |
1591 FIF_CONTROL |
1592 FIF_OTHER_BSS |
1593 FIF_PROMISC_IN_BSS;
1594
1595 /*
1596 * Apply some rules to the filters:
1597 * - Some filters imply different filters to be set.
1598 * - Some things we can't filter out at all.
1599 * - Some filters are set based on interface type.
1600 */
1601 if (mc_count)
1602 *total_flags |= FIF_ALLMULTI;
5886d0db
ID		 1603 if (*total_flags & FIF_OTHER_BSS ||
1604 *total_flags & FIF_PROMISC_IN_BSS)
4150c572
JB		 1605 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1606 if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1607 *total_flags |= FIF_PROMISC_IN_BSS;
1608
1609 /*
1610 * Check if there is any work left for us.
1611 */
1612 if (intf->filter == *total_flags)
1613 return;
1614 intf->filter = *total_flags;
1615
1616 /*
1617 * When in atomic context, reschedule and let rt2x00lib
1618 * call this function again.
1619 */
1620 if (in_atomic()) {
1621 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1622 return;
1623 }
1624
1625 /*
1626 * Start configuration steps.
1627 * Note that the version error will always be dropped
1628 * and broadcast frames will always be accepted since
1629 * there is no filter for it at this time.
1630 */
1631 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1632 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1633 !(*total_flags & FIF_FCSFAIL));
1634 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1635 !(*total_flags & FIF_PLCPFAIL));
1636 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1637 !(*total_flags & FIF_CONTROL));
1638 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1639 !(*total_flags & FIF_PROMISC_IN_BSS));
1640 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1641 !(*total_flags & FIF_PROMISC_IN_BSS));
1642 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1643 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1644 !(*total_flags & FIF_ALLMULTI));
1645 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1646 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1647}
1648
95ea3627
ID		 1649static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1650 struct sk_buff *skb,
1651 struct ieee80211_tx_control *control)
1652{
1653 struct rt2x00_dev *rt2x00dev = hw->priv;
1654 struct usb_device *usb_dev =
1655 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
1656 struct data_ring *ring =
1657 rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1658 struct data_entry *beacon;
1659 struct data_entry *guardian;
dd9fa2d2 1660 int pipe = usb_sndbulkpipe(usb_dev, 1);
95ea3627
ID		 1661 int length;
1662
1663 /*
1664 * Just in case the ieee80211 doesn't set this,
1665 * but we need this queue set for the descriptor
1666 * initialization.
1667 */
1668 control->queue = IEEE80211_TX_QUEUE_BEACON;
1669
1670 /*
1671 * Obtain 2 entries, one for the guardian byte,
1672 * the second for the actual beacon.
1673 */
1674 guardian = rt2x00_get_data_entry(ring);
1675 rt2x00_ring_index_inc(ring);
1676 beacon = rt2x00_get_data_entry(ring);
1677
1678 /*
1679 * First we create the beacon.
1680 */
1681 skb_push(skb, ring->desc_size);
c22eb87b
ID		 1682 memset(skb->data, 0, ring->desc_size);
1683
4bd7c452 1684 rt2x00lib_write_tx_desc(rt2x00dev, (__le32 *)skb->data,
95ea3627
ID		 1685 (struct ieee80211_hdr *)(skb->data +
1686 ring->desc_size),
1687 skb->len - ring->desc_size, control);
1688
b242e891 1689 length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
95ea3627 1690
dd9fa2d2 1691 usb_fill_bulk_urb(beacon->priv, usb_dev, pipe,
95ea3627
ID		 1692 skb->data, length, rt2500usb_beacondone, beacon);
1693
1694 beacon->skb = skb;
1695
1696 /*
1697 * Second we need to create the guardian byte.
1698 * We only need a single byte, so lets recycle
1699 * the 'flags' field we are not using for beacons.
1700 */
1701 guardian->flags = 0;
dd9fa2d2 1702 usb_fill_bulk_urb(guardian->priv, usb_dev, pipe,
95ea3627
ID		 1703 &guardian->flags, 1, rt2500usb_beacondone, guardian);
1704
1705 /*
1706 * Send out the guardian byte.
1707 */
1708 usb_submit_urb(guardian->priv, GFP_ATOMIC);
1709
1710 /*
1711 * Enable beacon generation.
1712 */
1713 rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1714
1715 return 0;
1716}
1717
1718static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1719 .tx = rt2x00mac_tx,
4150c572
JB		 1720 .start = rt2x00mac_start,
1721 .stop = rt2x00mac_stop,
95ea3627
ID		 1722 .add_interface = rt2x00mac_add_interface,
1723 .remove_interface = rt2x00mac_remove_interface,
1724 .config = rt2x00mac_config,
1725 .config_interface = rt2x00mac_config_interface,
4150c572 1726 .configure_filter = rt2500usb_configure_filter,
95ea3627 1727 .get_stats = rt2x00mac_get_stats,
5c58ee51 1728 .erp_ie_changed = rt2x00mac_erp_ie_changed,
95ea3627
ID		 1729 .conf_tx = rt2x00mac_conf_tx,
1730 .get_tx_stats = rt2x00mac_get_tx_stats,
1731 .beacon_update = rt2500usb_beacon_update,
1732};
1733
1734static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1735 .probe_hw = rt2500usb_probe_hw,
1736 .initialize = rt2x00usb_initialize,
1737 .uninitialize = rt2x00usb_uninitialize,
1738 .set_device_state = rt2500usb_set_device_state,
1739 .link_stats = rt2500usb_link_stats,
1740 .reset_tuner = rt2500usb_reset_tuner,
1741 .link_tuner = rt2500usb_link_tuner,
1742 .write_tx_desc = rt2500usb_write_tx_desc,
1743 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1744 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1745 .kick_tx_queue = rt2500usb_kick_tx_queue,
1746 .fill_rxdone = rt2500usb_fill_rxdone,
1747 .config_mac_addr = rt2500usb_config_mac_addr,
1748 .config_bssid = rt2500usb_config_bssid,
95ea3627 1749 .config_type = rt2500usb_config_type,
5c58ee51 1750 .config_preamble = rt2500usb_config_preamble,
95ea3627
ID		 1751 .config = rt2500usb_config,
1752};
1753
1754static const struct rt2x00_ops rt2500usb_ops = {
1755 .name = DRV_NAME,
1756 .rxd_size = RXD_DESC_SIZE,
1757 .txd_size = TXD_DESC_SIZE,
1758 .eeprom_size = EEPROM_SIZE,
1759 .rf_size = RF_SIZE,
1760 .lib = &rt2500usb_rt2x00_ops,
1761 .hw = &rt2500usb_mac80211_ops,
1762#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1763 .debugfs = &rt2500usb_rt2x00debug,
1764#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1765};
1766
1767/*
1768 * rt2500usb module information.
1769 */
1770static struct usb_device_id rt2500usb_device_table[] = {
1771 /* ASUS */
1772 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1773 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1774 /* Belkin */
1775 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1776 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1777 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1778 /* Cisco Systems */
1779 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1780 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1781 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1782 /* Conceptronic */
1783 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1784 /* D-LINK */
1785 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1786 /* Gigabyte */
1787 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1788 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1789 /* Hercules */
1790 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1791 /* Melco */
1792 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1793 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1794 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1795 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1796
1797 /* MSI */
1798 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1799 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1800 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1801 /* Ralink */
1802 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1803 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1804 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1805 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1806 /* Siemens */
1807 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1808 /* SMC */
1809 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1810 /* Spairon */
1811 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1812 /* Trust */
1813 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1814 /* Zinwell */
1815 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1816 { 0, }
1817};
1818
1819MODULE_AUTHOR(DRV_PROJECT);
1820MODULE_VERSION(DRV_VERSION);
1821MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1822MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1823MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1824MODULE_LICENSE("GPL");
1825
1826static struct usb_driver rt2500usb_driver = {
1827 .name = DRV_NAME,
1828 .id_table = rt2500usb_device_table,
1829 .probe = rt2x00usb_probe,
1830 .disconnect = rt2x00usb_disconnect,
1831 .suspend = rt2x00usb_suspend,
1832 .resume = rt2x00usb_resume,
1833};
1834
1835static int __init rt2500usb_init(void)
1836{
1837 return usb_register(&rt2500usb_driver);
1838}
1839
1840static void __exit rt2500usb_exit(void)
1841{
1842 usb_deregister(&rt2500usb_driver);
1843}
1844
1845module_init(rt2500usb_init);
1846module_exit(rt2500usb_exit);
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