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[PATCH] rt2x00: Small optimizations
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
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95ea3627
ID		 1/*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27/*
28 * Set enviroment defines for rt2x00.h
29 */
30#define DRV_NAME "rt2500usb"
31
32#include <linux/delay.h>
33#include <linux/etherdevice.h>
34#include <linux/init.h>
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/usb.h>
38
39#include "rt2x00.h"
40#include "rt2x00usb.h"
41#include "rt2500usb.h"
42
43/*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 */
56static inline void rt2500usb_register_read(const struct rt2x00_dev *rt2x00dev,
57 const unsigned int offset,
58 u16 *value)
59{
60 __le16 reg;
61 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
62 USB_VENDOR_REQUEST_IN, offset,
63 &reg, sizeof(u16), REGISTER_TIMEOUT);
64 *value = le16_to_cpu(reg);
65}
66
67static inline void rt2500usb_register_multiread(const struct rt2x00_dev
68 *rt2x00dev,
69 const unsigned int offset,
70 void *value, const u16 length)
71{
72 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
73 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
74 USB_VENDOR_REQUEST_IN, offset,
75 value, length, timeout);
76}
77
78static inline void rt2500usb_register_write(const struct rt2x00_dev *rt2x00dev,
79 const unsigned int offset,
80 u16 value)
81{
82 __le16 reg = cpu_to_le16(value);
83 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
84 USB_VENDOR_REQUEST_OUT, offset,
85 &reg, sizeof(u16), REGISTER_TIMEOUT);
86}
87
88static inline void rt2500usb_register_multiwrite(const struct rt2x00_dev
89 *rt2x00dev,
90 const unsigned int offset,
91 void *value, const u16 length)
92{
93 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
94 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
95 USB_VENDOR_REQUEST_OUT, offset,
96 value, length, timeout);
97}
98
99static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
100{
101 u16 reg;
102 unsigned int i;
103
104 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
105 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
106 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
107 break;
108 udelay(REGISTER_BUSY_DELAY);
109 }
110
111 return reg;
112}
113
114static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
115 const unsigned int word, const u8 value)
116{
117 u16 reg;
118
119 /*
120 * Wait until the BBP becomes ready.
121 */
122 reg = rt2500usb_bbp_check(rt2x00dev);
123 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
124 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
125 return;
126 }
127
128 /*
129 * Write the data into the BBP.
130 */
131 reg = 0;
132 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
133 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
134 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
135
136 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
137}
138
139static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
140 const unsigned int word, u8 *value)
141{
142 u16 reg;
143
144 /*
145 * Wait until the BBP becomes ready.
146 */
147 reg = rt2500usb_bbp_check(rt2x00dev);
148 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
149 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
150 return;
151 }
152
153 /*
154 * Write the request into the BBP.
155 */
156 reg = 0;
157 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
158 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
159
160 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
161
162 /*
163 * Wait until the BBP becomes ready.
164 */
165 reg = rt2500usb_bbp_check(rt2x00dev);
166 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
167 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
168 *value = 0xff;
169 return;
170 }
171
172 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
173 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
174}
175
176static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
177 const unsigned int word, const u32 value)
178{
179 u16 reg;
180 unsigned int i;
181
182 if (!word)
183 return;
184
185 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
186 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
187 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
188 goto rf_write;
189 udelay(REGISTER_BUSY_DELAY);
190 }
191
192 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
193 return;
194
195rf_write:
196 reg = 0;
197 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
198 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
199
200 reg = 0;
201 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
202 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
203 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
204 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
205
206 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
207 rt2x00_rf_write(rt2x00dev, word, value);
208}
209
210#ifdef CONFIG_RT2X00_LIB_DEBUGFS
211#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
212
213static void rt2500usb_read_csr(const struct rt2x00_dev *rt2x00dev,
214 const unsigned int word, u32 *data)
215{
216 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
217}
218
219static void rt2500usb_write_csr(const struct rt2x00_dev *rt2x00dev,
220 const unsigned int word, u32 data)
221{
222 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
223}
224
225static const struct rt2x00debug rt2500usb_rt2x00debug = {
226 .owner = THIS_MODULE,
227 .csr = {
228 .read = rt2500usb_read_csr,
229 .write = rt2500usb_write_csr,
230 .word_size = sizeof(u16),
231 .word_count = CSR_REG_SIZE / sizeof(u16),
232 },
233 .eeprom = {
234 .read = rt2x00_eeprom_read,
235 .write = rt2x00_eeprom_write,
236 .word_size = sizeof(u16),
237 .word_count = EEPROM_SIZE / sizeof(u16),
238 },
239 .bbp = {
240 .read = rt2500usb_bbp_read,
241 .write = rt2500usb_bbp_write,
242 .word_size = sizeof(u8),
243 .word_count = BBP_SIZE / sizeof(u8),
244 },
245 .rf = {
246 .read = rt2x00_rf_read,
247 .write = rt2500usb_rf_write,
248 .word_size = sizeof(u32),
249 .word_count = RF_SIZE / sizeof(u32),
250 },
251};
252#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
253
254/*
255 * Configuration handlers.
256 */
4abee4bb
ID		 257static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev,
258 __le32 *mac)
95ea3627 259{
4abee4bb
ID		 260 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, &mac,
261 (3 * sizeof(__le16)));
95ea3627
ID		 262}
263
4abee4bb
ID		 264static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev,
265 __le32 *bssid)
95ea3627 266{
4abee4bb
ID		 267 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, bssid,
268 (3 * sizeof(__le16)));
95ea3627
ID		 269}
270
feb24691
ID		 271static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
272 const int tsf_sync)
95ea3627
ID		 273{
274 u16 reg;
275
276 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
277
95ea3627
ID		 278 /*
279 * Enable beacon config
280 */
281 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
282 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
a137e202 283 (PREAMBLE + get_duration(IEEE80211_HEADER, 20)) >> 6);
feb24691 284 if (type == IEEE80211_IF_TYPE_STA)
95ea3627
ID		 285 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
286 else
287 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
288 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
289
290 /*
291 * Enable synchronisation.
292 */
293 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
294 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
295 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
296
297 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
4150c572
JB		 298 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
299 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627 300 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
feb24691 301 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, tsf_sync);
95ea3627
ID		 302 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
303}
304
305static void rt2500usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
306{
307 struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
308 u16 reg;
309 u16 value;
310 u16 preamble;
311
312 if (DEVICE_GET_RATE_FIELD(rate, PREAMBLE))
313 preamble = SHORT_PREAMBLE;
314 else
315 preamble = PREAMBLE;
316
317 reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATEMASK;
318
319 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, reg);
320
321 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
322 value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
323 SHORT_DIFS : DIFS) +
324 PLCP + preamble + get_duration(ACK_SIZE, 10);
325 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, value);
326 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
327
328 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb
ID		 329 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
330 (preamble == SHORT_PREAMBLE));
95ea3627
ID		 331 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
332}
333
334static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
335 const int phymode)
336{
337 struct ieee80211_hw_mode *mode;
338 struct ieee80211_rate *rate;
339
340 if (phymode == MODE_IEEE80211A)
341 rt2x00dev->curr_hwmode = HWMODE_A;
342 else if (phymode == MODE_IEEE80211B)
343 rt2x00dev->curr_hwmode = HWMODE_B;
344 else
345 rt2x00dev->curr_hwmode = HWMODE_G;
346
347 mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
348 rate = &mode->rates[mode->num_rates - 1];
349
350 rt2500usb_config_rate(rt2x00dev, rate->val2);
351
352 if (phymode == MODE_IEEE80211B) {
353 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
354 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
355 } else {
356 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
357 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
358 }
359}
360
361static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
362 const int index, const int channel,
363 const int txpower)
364{
365 struct rf_channel reg;
366
367 /*
368 * Fill rf_reg structure.
369 */
370 memcpy(&reg, &rt2x00dev->spec.channels[index], sizeof(reg));
371
372 /*
373 * Set TXpower.
374 */
375 rt2x00_set_field32(&reg.rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
376
377 /*
378 * For RT2525E we should first set the channel to half band higher.
379 */
380 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
381 static const u32 vals[] = {
382 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
383 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
384 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
385 0x00000902, 0x00000906
386 };
387
388 rt2500usb_rf_write(rt2x00dev, 2, vals[channel - 1]);
389 if (reg.rf4)
390 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
391 }
392
393 rt2500usb_rf_write(rt2x00dev, 1, reg.rf1);
394 rt2500usb_rf_write(rt2x00dev, 2, reg.rf2);
395 rt2500usb_rf_write(rt2x00dev, 3, reg.rf3);
396 if (reg.rf4)
397 rt2500usb_rf_write(rt2x00dev, 4, reg.rf4);
398}
399
400static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
401 const int txpower)
402{
403 u32 rf3;
404
405 rt2x00_rf_read(rt2x00dev, 3, &rf3);
406 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
407 rt2500usb_rf_write(rt2x00dev, 3, rf3);
408}
409
410static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
411 const int antenna_tx, const int antenna_rx)
412{
413 u8 r2;
414 u8 r14;
415 u16 csr5;
416 u16 csr6;
417
418 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
419 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
420 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
421 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
422
423 /*
424 * Configure the TX antenna.
425 */
426 switch (antenna_tx) {
427 case ANTENNA_SW_DIVERSITY:
428 case ANTENNA_HW_DIVERSITY:
429 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
430 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
431 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
432 break;
433 case ANTENNA_A:
434 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
435 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
436 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
437 break;
438 case ANTENNA_B:
439 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
440 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
441 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
442 break;
443 }
444
445 /*
446 * Configure the RX antenna.
447 */
448 switch (antenna_rx) {
449 case ANTENNA_SW_DIVERSITY:
450 case ANTENNA_HW_DIVERSITY:
451 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
452 break;
453 case ANTENNA_A:
454 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
455 break;
456 case ANTENNA_B:
457 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
458 break;
459 }
460
461 /*
462 * RT2525E and RT5222 need to flip TX I/Q
463 */
464 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
465 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
466 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
467 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
468 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
469
470 /*
471 * RT2525E does not need RX I/Q Flip.
472 */
473 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
474 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
475 } else {
476 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
477 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
478 }
479
480 rt2500usb_bbp_write(rt2x00dev, 2, r2);
481 rt2500usb_bbp_write(rt2x00dev, 14, r14);
482 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
483 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
484}
485
486static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
487 const int short_slot_time,
488 const int beacon_int)
489{
490 u16 reg;
491
492 rt2500usb_register_write(rt2x00dev, MAC_CSR10,
493 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
494
495 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
496 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, beacon_int * 4);
497 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
498}
499
500static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
501 const unsigned int flags,
502 struct ieee80211_conf *conf)
503{
504 int short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
505
506 if (flags & CONFIG_UPDATE_PHYMODE)
507 rt2500usb_config_phymode(rt2x00dev, conf->phymode);
508 if (flags & CONFIG_UPDATE_CHANNEL)
509 rt2500usb_config_channel(rt2x00dev, conf->channel_val,
510 conf->channel, conf->power_level);
511 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
512 rt2500usb_config_txpower(rt2x00dev, conf->power_level);
513 if (flags & CONFIG_UPDATE_ANTENNA)
514 rt2500usb_config_antenna(rt2x00dev, conf->antenna_sel_tx,
515 conf->antenna_sel_rx);
516 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
517 rt2500usb_config_duration(rt2x00dev, short_slot_time,
518 conf->beacon_int);
519}
520
521/*
522 * LED functions.
523 */
524static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
525{
526 u16 reg;
527
528 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
529 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
530 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
531 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
532
533 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
534
535 if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
536 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
537 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
538 } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
539 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
540 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
541 } else {
542 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
543 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
544 }
545
546 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
547}
548
549static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
550{
551 u16 reg;
552
553 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
554 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
555 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
556 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
557}
558
559/*
560 * Link tuning
561 */
562static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev)
563{
564 u16 reg;
565
566 /*
567 * Update FCS error count from register.
568 */
569 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
570 rt2x00dev->link.rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
571
572 /*
573 * Update False CCA count from register.
574 */
575 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
576 rt2x00dev->link.false_cca =
577 rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
578}
579
580static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
581{
582 u16 eeprom;
583 u16 value;
584
585 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
586 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
587 rt2500usb_bbp_write(rt2x00dev, 24, value);
588
589 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
590 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
591 rt2500usb_bbp_write(rt2x00dev, 25, value);
592
593 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
594 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
595 rt2500usb_bbp_write(rt2x00dev, 61, value);
596
597 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
598 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
599 rt2500usb_bbp_write(rt2x00dev, 17, value);
600
601 rt2x00dev->link.vgc_level = value;
602}
603
604static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
605{
606 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
607 u16 bbp_thresh;
608 u16 vgc_bound;
609 u16 sens;
610 u16 r24;
611 u16 r25;
612 u16 r61;
613 u16 r17_sens;
614 u8 r17;
615 u8 up_bound;
616 u8 low_bound;
617
618 /*
619 * Determine the BBP tuning threshold and correctly
620 * set BBP 24, 25 and 61.
621 */
622 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
623 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
624
625 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
626 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
627 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
628
629 if ((rssi + bbp_thresh) > 0) {
630 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
631 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
632 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
633 } else {
634 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
635 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
636 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
637 }
638
639 rt2500usb_bbp_write(rt2x00dev, 24, r24);
640 rt2500usb_bbp_write(rt2x00dev, 25, r25);
641 rt2500usb_bbp_write(rt2x00dev, 61, r61);
642
643 /*
644 * Read current r17 value, as well as the sensitivity values
645 * for the r17 register.
646 */
647 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
648 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
649
650 /*
651 * A too low RSSI will cause too much false CCA which will
652 * then corrupt the R17 tuning. To remidy this the tuning should
653 * be stopped (While making sure the R17 value will not exceed limits)
654 */
655 if (rssi >= -40) {
656 if (r17 != 0x60)
657 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
658 return;
659 }
660
661 /*
662 * Special big-R17 for short distance
663 */
664 if (rssi >= -58) {
665 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
666 if (r17 != sens)
667 rt2500usb_bbp_write(rt2x00dev, 17, sens);
668 return;
669 }
670
671 /*
672 * Special mid-R17 for middle distance
673 */
674 if (rssi >= -74) {
675 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
676 if (r17 != sens)
677 rt2500usb_bbp_write(rt2x00dev, 17, sens);
678 return;
679 }
680
681 /*
682 * Leave short or middle distance condition, restore r17
683 * to the dynamic tuning range.
684 */
685 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
686 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
687
688 low_bound = 0x32;
689 if (rssi >= -77)
690 up_bound = vgc_bound;
691 else
692 up_bound = vgc_bound - (-77 - rssi);
693
694 if (up_bound < low_bound)
695 up_bound = low_bound;
696
697 if (r17 > up_bound) {
698 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
699 rt2x00dev->link.vgc_level = up_bound;
700 } else if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) {
701 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
702 rt2x00dev->link.vgc_level = r17;
703 } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) {
704 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
705 rt2x00dev->link.vgc_level = r17;
706 }
707}
708
709/*
710 * Initialization functions.
711 */
712static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
713{
714 u16 reg;
715
716 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
717 USB_MODE_TEST, REGISTER_TIMEOUT);
718 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
719 0x00f0, REGISTER_TIMEOUT);
720
721 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
722 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
723 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
724
725 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
726 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
727
728 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
729 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
730 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
731 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
732 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
733
734 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
735 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
736 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
737 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
738 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
739
740 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
741 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
742 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
743 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
744 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
745 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
746
747 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
748 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
749 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
750 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
751 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
752 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
753
754 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
755 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
756 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
757 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
758 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
759 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
760
761 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
762 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
763 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
764 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
765 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
766 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
767
768 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
769 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
770
771 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
772 return -EBUSY;
773
774 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
775 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
776 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
777 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
778 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
779
780 if (rt2x00_get_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
781 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
782 reg &= ~0x0002;
783 } else {
784 reg = 0x3002;
785 }
786 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
787
788 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
789 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
790 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
791 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
792
793 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
794 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
795 rt2x00dev->rx->data_size);
796 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
797
798 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
799 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
800 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
801 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
802
803 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
804 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
805 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
806
807 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
808 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
809 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
810
811 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
812 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
813 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
814
815 return 0;
816}
817
818static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
819{
820 unsigned int i;
821 u16 eeprom;
822 u8 value;
823 u8 reg_id;
824
825 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
826 rt2500usb_bbp_read(rt2x00dev, 0, &value);
827 if ((value != 0xff) && (value != 0x00))
828 goto continue_csr_init;
829 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
830 udelay(REGISTER_BUSY_DELAY);
831 }
832
833 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
834 return -EACCES;
835
836continue_csr_init:
837 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
838 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
839 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
840 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
841 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
842 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
843 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
844 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
845 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
846 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
847 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
848 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
849 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
850 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
851 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
852 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
853 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
854 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
855 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
856 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
857 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
858 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
859 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
860 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
861 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
862 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
863 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
864 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
865 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
866 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
867 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
868
869 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
870 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
871 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
872
873 if (eeprom != 0xffff && eeprom != 0x0000) {
874 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
875 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
876 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
877 reg_id, value);
878 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
879 }
880 }
881 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
882
883 return 0;
884}
885
886/*
887 * Device state switch handlers.
888 */
889static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
890 enum dev_state state)
891{
892 u16 reg;
893
894 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
895 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
896 state == STATE_RADIO_RX_OFF);
897 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
898}
899
900static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
901{
902 /*
903 * Initialize all registers.
904 */
905 if (rt2500usb_init_registers(rt2x00dev) ||
906 rt2500usb_init_bbp(rt2x00dev)) {
907 ERROR(rt2x00dev, "Register initialization failed.\n");
908 return -EIO;
909 }
910
911 rt2x00usb_enable_radio(rt2x00dev);
912
913 /*
914 * Enable LED
915 */
916 rt2500usb_enable_led(rt2x00dev);
917
918 return 0;
919}
920
921static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
922{
923 /*
924 * Disable LED
925 */
926 rt2500usb_disable_led(rt2x00dev);
927
928 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
929 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
930
931 /*
932 * Disable synchronisation.
933 */
934 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
935
936 rt2x00usb_disable_radio(rt2x00dev);
937}
938
939static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
940 enum dev_state state)
941{
942 u16 reg;
943 u16 reg2;
944 unsigned int i;
945 char put_to_sleep;
946 char bbp_state;
947 char rf_state;
948
949 put_to_sleep = (state != STATE_AWAKE);
950
951 reg = 0;
952 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
953 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
954 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
955 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
956 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
957 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
958
959 /*
960 * Device is not guaranteed to be in the requested state yet.
961 * We must wait until the register indicates that the
962 * device has entered the correct state.
963 */
964 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
965 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
966 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
967 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
968 if (bbp_state == state && rf_state == state)
969 return 0;
970 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
971 msleep(30);
972 }
973
974 NOTICE(rt2x00dev, "Device failed to enter state %d, "
975 "current device state: bbp %d and rf %d.\n",
976 state, bbp_state, rf_state);
977
978 return -EBUSY;
979}
980
981static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
982 enum dev_state state)
983{
984 int retval = 0;
985
986 switch (state) {
987 case STATE_RADIO_ON:
988 retval = rt2500usb_enable_radio(rt2x00dev);
989 break;
990 case STATE_RADIO_OFF:
991 rt2500usb_disable_radio(rt2x00dev);
992 break;
993 case STATE_RADIO_RX_ON:
994 case STATE_RADIO_RX_OFF:
995 rt2500usb_toggle_rx(rt2x00dev, state);
996 break;
997 case STATE_DEEP_SLEEP:
998 case STATE_SLEEP:
999 case STATE_STANDBY:
1000 case STATE_AWAKE:
1001 retval = rt2500usb_set_state(rt2x00dev, state);
1002 break;
1003 default:
1004 retval = -ENOTSUPP;
1005 break;
1006 }
1007
1008 return retval;
1009}
1010
1011/*
1012 * TX descriptor initialization
1013 */
1014static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1015 struct data_desc *txd,
4150c572 1016 struct txdata_entry_desc *desc,
95ea3627
ID		 1017 struct ieee80211_hdr *ieee80211hdr,
1018 unsigned int length,
1019 struct ieee80211_tx_control *control)
1020{
1021 u32 word;
1022
1023 /*
1024 * Start writing the descriptor words.
1025 */
1026 rt2x00_desc_read(txd, 1, &word);
1027 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1028 rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
1029 rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1030 rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1031 rt2x00_desc_write(txd, 1, word);
1032
1033 rt2x00_desc_read(txd, 2, &word);
1034 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1035 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1036 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1037 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1038 rt2x00_desc_write(txd, 2, word);
1039
1040 rt2x00_desc_read(txd, 0, &word);
1041 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1042 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1043 test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1044 rt2x00_set_field32(&word, TXD_W0_ACK,
1045 !(control->flags & IEEE80211_TXCTL_NO_ACK));
1046 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1047 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1048 rt2x00_set_field32(&word, TXD_W0_OFDM,
1049 test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1050 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1051 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
1052 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1053 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1054 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1055 rt2x00_desc_write(txd, 0, word);
1056}
1057
dd9fa2d2
ID		 1058static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1059 int maxpacket, struct sk_buff *skb)
1060{
1061 int length;
1062
1063 /*
1064 * The length _must_ be a multiple of 2,
1065 * but it must _not_ be a multiple of the USB packet size.
1066 */
1067 length = roundup(skb->len, 2);
1068 length += (2 * !(length % maxpacket));
1069
1070 return length;
1071}
1072
95ea3627
ID		 1073/*
1074 * TX data initialization
1075 */
1076static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1077 unsigned int queue)
1078{
1079 u16 reg;
1080
1081 if (queue != IEEE80211_TX_QUEUE_BEACON)
1082 return;
1083
1084 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1085 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1086 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1087 /*
1088 * Beacon generation will fail initially.
1089 * To prevent this we need to register the TXRX_CSR19
1090 * register several times.
1091 */
1092 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1093 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1094 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1095 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1096 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1097 }
1098}
1099
1100/*
1101 * RX control handlers
1102 */
4150c572
JB		 1103static void rt2500usb_fill_rxdone(struct data_entry *entry,
1104 struct rxdata_entry_desc *desc)
95ea3627
ID		 1105{
1106 struct urb *urb = entry->priv;
1107 struct data_desc *rxd = (struct data_desc *)(entry->skb->data +
1108 (urb->actual_length -
1109 entry->ring->desc_size));
1110 u32 word0;
1111 u32 word1;
1112
1113 rt2x00_desc_read(rxd, 0, &word0);
1114 rt2x00_desc_read(rxd, 1, &word1);
1115
4150c572
JB		 1116 desc->flags = 0;
1117 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1118 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1119 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1120 desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1121
1122 /*
1123 * Obtain the status about this packet.
1124 */
4150c572
JB		 1125 desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1126 desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
95ea3627 1127 entry->ring->rt2x00dev->rssi_offset;
4150c572
JB		 1128 desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1129 desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
95ea3627 1130
4150c572 1131 return;
95ea3627
ID		 1132}
1133
1134/*
1135 * Interrupt functions.
1136 */
1137static void rt2500usb_beacondone(struct urb *urb)
1138{
1139 struct data_entry *entry = (struct data_entry *)urb->context;
1140 struct data_ring *ring = entry->ring;
1141
1142 if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
1143 return;
1144
1145 /*
1146 * Check if this was the guardian beacon,
1147 * if that was the case we need to send the real beacon now.
1148 * Otherwise we should free the sk_buffer, the device
1149 * should be doing the rest of the work now.
1150 */
1151 if (ring->index == 1) {
1152 rt2x00_ring_index_done_inc(ring);
1153 entry = rt2x00_get_data_entry(ring);
1154 usb_submit_urb(entry->priv, GFP_ATOMIC);
1155 rt2x00_ring_index_inc(ring);
1156 } else if (ring->index_done == 1) {
1157 entry = rt2x00_get_data_entry_done(ring);
1158 if (entry->skb) {
1159 dev_kfree_skb(entry->skb);
1160 entry->skb = NULL;
1161 }
1162 rt2x00_ring_index_done_inc(ring);
1163 }
1164}
1165
1166/*
1167 * Device probe functions.
1168 */
1169static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1170{
1171 u16 word;
1172 u8 *mac;
1173
1174 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1175
1176 /*
1177 * Start validation of the data that has been read.
1178 */
1179 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1180 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1181 DECLARE_MAC_BUF(macbuf);
1182
95ea3627 1183 random_ether_addr(mac);
0795af57 1184 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1185 }
1186
1187 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1188 if (word == 0xffff) {
1189 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1190 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 0);
1191 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 0);
1192 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, 0);
1193 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1194 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1195 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1196 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1197 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1198 }
1199
1200 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1201 if (word == 0xffff) {
1202 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1203 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1204 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1205 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1206 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1207 }
1208
1209 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1210 if (word == 0xffff) {
1211 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1212 DEFAULT_RSSI_OFFSET);
1213 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1214 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1215 }
1216
1217 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1218 if (word == 0xffff) {
1219 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1220 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1221 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1222 }
1223
1224 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1225 if (word == 0xffff) {
1226 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1227 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1228 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1229 }
1230
1231 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1232 if (word == 0xffff) {
1233 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1234 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1235 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1236 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1237 }
1238
1239 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1240 if (word == 0xffff) {
1241 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1242 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1243 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1244 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1245 }
1246
1247 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1248 if (word == 0xffff) {
1249 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1250 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1251 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1252 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1253 }
1254
1255 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1256 if (word == 0xffff) {
1257 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1258 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1259 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1260 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1261 }
1262
1263 return 0;
1264}
1265
1266static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1267{
1268 u16 reg;
1269 u16 value;
1270 u16 eeprom;
1271
1272 /*
1273 * Read EEPROM word for configuration.
1274 */
1275 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1276
1277 /*
1278 * Identify RF chipset.
1279 */
1280 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1281 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1282 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1283
1284 if (rt2x00_rev(&rt2x00dev->chip, 0xffff0)) {
1285 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1286 return -ENODEV;
1287 }
1288
1289 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1290 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1291 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1292 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1293 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1294 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1295 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1296 return -ENODEV;
1297 }
1298
1299 /*
1300 * Identify default antenna configuration.
1301 */
1302 rt2x00dev->hw->conf.antenna_sel_tx =
1303 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1304 rt2x00dev->hw->conf.antenna_sel_rx =
1305 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1306
1307 /*
1308 * Store led mode, for correct led behaviour.
1309 */
1310 rt2x00dev->led_mode =
1311 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1312
1313 /*
1314 * Check if the BBP tuning should be disabled.
1315 */
1316 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1317 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1318 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1319
1320 /*
1321 * Read the RSSI <-> dBm offset information.
1322 */
1323 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1324 rt2x00dev->rssi_offset =
1325 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1326
1327 return 0;
1328}
1329
1330/*
1331 * RF value list for RF2522
1332 * Supports: 2.4 GHz
1333 */
1334static const struct rf_channel rf_vals_bg_2522[] = {
1335 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1336 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1337 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1338 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1339 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1340 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1341 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1342 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1343 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1344 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1345 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1346 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1347 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1348 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1349};
1350
1351/*
1352 * RF value list for RF2523
1353 * Supports: 2.4 GHz
1354 */
1355static const struct rf_channel rf_vals_bg_2523[] = {
1356 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1357 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1358 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1359 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1360 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1361 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1362 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1363 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1364 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1365 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1366 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1367 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1368 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1369 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1370};
1371
1372/*
1373 * RF value list for RF2524
1374 * Supports: 2.4 GHz
1375 */
1376static const struct rf_channel rf_vals_bg_2524[] = {
1377 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1378 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1379 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1380 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1381 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1382 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1383 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1384 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1385 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1386 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1387 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1388 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1389 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1390 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1391};
1392
1393/*
1394 * RF value list for RF2525
1395 * Supports: 2.4 GHz
1396 */
1397static const struct rf_channel rf_vals_bg_2525[] = {
1398 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1399 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1400 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1401 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1402 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1403 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1404 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1405 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1406 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1407 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1408 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1409 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1410 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1411 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1412};
1413
1414/*
1415 * RF value list for RF2525e
1416 * Supports: 2.4 GHz
1417 */
1418static const struct rf_channel rf_vals_bg_2525e[] = {
1419 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1420 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1421 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1422 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1423 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1424 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1425 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1426 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1427 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1428 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1429 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1430 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1431 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1432 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1433};
1434
1435/*
1436 * RF value list for RF5222
1437 * Supports: 2.4 GHz & 5.2 GHz
1438 */
1439static const struct rf_channel rf_vals_5222[] = {
1440 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1441 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1442 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1443 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1444 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1445 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1446 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1447 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1448 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1449 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1450 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1451 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1452 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1453 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1454
1455 /* 802.11 UNI / HyperLan 2 */
1456 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1457 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1458 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1459 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1460 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1461 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1462 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1463 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1464
1465 /* 802.11 HyperLan 2 */
1466 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1467 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1468 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1469 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1470 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1471 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1472 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1473 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1474 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1475 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1476
1477 /* 802.11 UNII */
1478 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1479 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1480 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1481 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1482 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1483};
1484
1485static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1486{
1487 struct hw_mode_spec *spec = &rt2x00dev->spec;
1488 u8 *txpower;
1489 unsigned int i;
1490
1491 /*
1492 * Initialize all hw fields.
1493 */
1494 rt2x00dev->hw->flags =
1495 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1496 IEEE80211_HW_RX_INCLUDES_FCS |
4150c572 1497 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
95ea3627
ID		 1498 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1499 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1500 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1501 rt2x00dev->hw->queues = 2;
1502
1503 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1504 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1505 rt2x00_eeprom_addr(rt2x00dev,
1506 EEPROM_MAC_ADDR_0));
1507
1508 /*
1509 * Convert tx_power array in eeprom.
1510 */
1511 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1512 for (i = 0; i < 14; i++)
1513 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1514
1515 /*
1516 * Initialize hw_mode information.
1517 */
1518 spec->num_modes = 2;
1519 spec->num_rates = 12;
1520 spec->tx_power_a = NULL;
1521 spec->tx_power_bg = txpower;
1522 spec->tx_power_default = DEFAULT_TXPOWER;
1523
1524 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1525 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1526 spec->channels = rf_vals_bg_2522;
1527 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1528 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1529 spec->channels = rf_vals_bg_2523;
1530 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1531 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1532 spec->channels = rf_vals_bg_2524;
1533 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1534 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1535 spec->channels = rf_vals_bg_2525;
1536 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1537 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1538 spec->channels = rf_vals_bg_2525e;
1539 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1540 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1541 spec->channels = rf_vals_5222;
1542 spec->num_modes = 3;
1543 }
1544}
1545
1546static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1547{
1548 int retval;
1549
1550 /*
1551 * Allocate eeprom data.
1552 */
1553 retval = rt2500usb_validate_eeprom(rt2x00dev);
1554 if (retval)
1555 return retval;
1556
1557 retval = rt2500usb_init_eeprom(rt2x00dev);
1558 if (retval)
1559 return retval;
1560
1561 /*
1562 * Initialize hw specifications.
1563 */
1564 rt2500usb_probe_hw_mode(rt2x00dev);
1565
1566 /*
4150c572 1567 * This device requires the beacon ring
95ea3627 1568 */
066cb637 1569 __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
95ea3627
ID		 1570
1571 /*
1572 * Set the rssi offset.
1573 */
1574 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1575
1576 return 0;
1577}
1578
1579/*
1580 * IEEE80211 stack callback functions.
1581 */
4150c572
JB		 1582static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1583 unsigned int changed_flags,
1584 unsigned int *total_flags,
1585 int mc_count,
1586 struct dev_addr_list *mc_list)
1587{
1588 struct rt2x00_dev *rt2x00dev = hw->priv;
1589 struct interface *intf = &rt2x00dev->interface;
1590 u16 reg;
1591
1592 /*
1593 * Mask off any flags we are going to ignore from
1594 * the total_flags field.
1595 */
1596 *total_flags &=
1597 FIF_ALLMULTI |
1598 FIF_FCSFAIL |
1599 FIF_PLCPFAIL |
1600 FIF_CONTROL |
1601 FIF_OTHER_BSS |
1602 FIF_PROMISC_IN_BSS;
1603
1604 /*
1605 * Apply some rules to the filters:
1606 * - Some filters imply different filters to be set.
1607 * - Some things we can't filter out at all.
1608 * - Some filters are set based on interface type.
1609 */
1610 if (mc_count)
1611 *total_flags |= FIF_ALLMULTI;
5886d0db
ID		 1612 if (*total_flags & FIF_OTHER_BSS ||
1613 *total_flags & FIF_PROMISC_IN_BSS)
4150c572
JB		 1614 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1615 if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1616 *total_flags |= FIF_PROMISC_IN_BSS;
1617
1618 /*
1619 * Check if there is any work left for us.
1620 */
1621 if (intf->filter == *total_flags)
1622 return;
1623 intf->filter = *total_flags;
1624
1625 /*
1626 * When in atomic context, reschedule and let rt2x00lib
1627 * call this function again.
1628 */
1629 if (in_atomic()) {
1630 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1631 return;
1632 }
1633
1634 /*
1635 * Start configuration steps.
1636 * Note that the version error will always be dropped
1637 * and broadcast frames will always be accepted since
1638 * there is no filter for it at this time.
1639 */
1640 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1641 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1642 !(*total_flags & FIF_FCSFAIL));
1643 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1644 !(*total_flags & FIF_PLCPFAIL));
1645 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1646 !(*total_flags & FIF_CONTROL));
1647 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1648 !(*total_flags & FIF_PROMISC_IN_BSS));
1649 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1650 !(*total_flags & FIF_PROMISC_IN_BSS));
1651 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1652 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1653 !(*total_flags & FIF_ALLMULTI));
1654 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1655 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1656}
1657
95ea3627
ID		 1658static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1659 struct sk_buff *skb,
1660 struct ieee80211_tx_control *control)
1661{
1662 struct rt2x00_dev *rt2x00dev = hw->priv;
1663 struct usb_device *usb_dev =
1664 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
1665 struct data_ring *ring =
1666 rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1667 struct data_entry *beacon;
1668 struct data_entry *guardian;
dd9fa2d2
ID		 1669 int pipe = usb_sndbulkpipe(usb_dev, 1);
1670 int max_packet = usb_maxpacket(usb_dev, pipe, 1);
95ea3627
ID		 1671 int length;
1672
1673 /*
1674 * Just in case the ieee80211 doesn't set this,
1675 * but we need this queue set for the descriptor
1676 * initialization.
1677 */
1678 control->queue = IEEE80211_TX_QUEUE_BEACON;
1679
1680 /*
1681 * Obtain 2 entries, one for the guardian byte,
1682 * the second for the actual beacon.
1683 */
1684 guardian = rt2x00_get_data_entry(ring);
1685 rt2x00_ring_index_inc(ring);
1686 beacon = rt2x00_get_data_entry(ring);
1687
1688 /*
1689 * First we create the beacon.
1690 */
1691 skb_push(skb, ring->desc_size);
1692 rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1693 (struct ieee80211_hdr *)(skb->data +
1694 ring->desc_size),
1695 skb->len - ring->desc_size, control);
1696
dd9fa2d2 1697 length = rt2500usb_get_tx_data_len(rt2x00dev, max_packet, skb);
95ea3627 1698
dd9fa2d2 1699 usb_fill_bulk_urb(beacon->priv, usb_dev, pipe,
95ea3627
ID		 1700 skb->data, length, rt2500usb_beacondone, beacon);
1701
1702 beacon->skb = skb;
1703
1704 /*
1705 * Second we need to create the guardian byte.
1706 * We only need a single byte, so lets recycle
1707 * the 'flags' field we are not using for beacons.
1708 */
1709 guardian->flags = 0;
dd9fa2d2 1710 usb_fill_bulk_urb(guardian->priv, usb_dev, pipe,
95ea3627
ID		 1711 &guardian->flags, 1, rt2500usb_beacondone, guardian);
1712
1713 /*
1714 * Send out the guardian byte.
1715 */
1716 usb_submit_urb(guardian->priv, GFP_ATOMIC);
1717
1718 /*
1719 * Enable beacon generation.
1720 */
1721 rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1722
1723 return 0;
1724}
1725
1726static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1727 .tx = rt2x00mac_tx,
4150c572
JB		 1728 .start = rt2x00mac_start,
1729 .stop = rt2x00mac_stop,
95ea3627
ID		 1730 .add_interface = rt2x00mac_add_interface,
1731 .remove_interface = rt2x00mac_remove_interface,
1732 .config = rt2x00mac_config,
1733 .config_interface = rt2x00mac_config_interface,
4150c572 1734 .configure_filter = rt2500usb_configure_filter,
95ea3627
ID		 1735 .get_stats = rt2x00mac_get_stats,
1736 .conf_tx = rt2x00mac_conf_tx,
1737 .get_tx_stats = rt2x00mac_get_tx_stats,
1738 .beacon_update = rt2500usb_beacon_update,
1739};
1740
1741static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1742 .probe_hw = rt2500usb_probe_hw,
1743 .initialize = rt2x00usb_initialize,
1744 .uninitialize = rt2x00usb_uninitialize,
1745 .set_device_state = rt2500usb_set_device_state,
1746 .link_stats = rt2500usb_link_stats,
1747 .reset_tuner = rt2500usb_reset_tuner,
1748 .link_tuner = rt2500usb_link_tuner,
1749 .write_tx_desc = rt2500usb_write_tx_desc,
1750 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1751 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1752 .kick_tx_queue = rt2500usb_kick_tx_queue,
1753 .fill_rxdone = rt2500usb_fill_rxdone,
1754 .config_mac_addr = rt2500usb_config_mac_addr,
1755 .config_bssid = rt2500usb_config_bssid,
95ea3627
ID		 1756 .config_type = rt2500usb_config_type,
1757 .config = rt2500usb_config,
1758};
1759
1760static const struct rt2x00_ops rt2500usb_ops = {
1761 .name = DRV_NAME,
1762 .rxd_size = RXD_DESC_SIZE,
1763 .txd_size = TXD_DESC_SIZE,
1764 .eeprom_size = EEPROM_SIZE,
1765 .rf_size = RF_SIZE,
1766 .lib = &rt2500usb_rt2x00_ops,
1767 .hw = &rt2500usb_mac80211_ops,
1768#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1769 .debugfs = &rt2500usb_rt2x00debug,
1770#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1771};
1772
1773/*
1774 * rt2500usb module information.
1775 */
1776static struct usb_device_id rt2500usb_device_table[] = {
1777 /* ASUS */
1778 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1779 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1780 /* Belkin */
1781 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1782 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1783 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1784 /* Cisco Systems */
1785 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1786 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1787 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1788 /* Conceptronic */
1789 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1790 /* D-LINK */
1791 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1792 /* Gigabyte */
1793 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1794 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1795 /* Hercules */
1796 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1797 /* Melco */
1798 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1799 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1800 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1801 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1802
1803 /* MSI */
1804 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1805 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1806 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1807 /* Ralink */
1808 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1809 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1810 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1811 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1812 /* Siemens */
1813 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1814 /* SMC */
1815 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1816 /* Spairon */
1817 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1818 /* Trust */
1819 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1820 /* Zinwell */
1821 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1822 { 0, }
1823};
1824
1825MODULE_AUTHOR(DRV_PROJECT);
1826MODULE_VERSION(DRV_VERSION);
1827MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1828MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1829MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1830MODULE_LICENSE("GPL");
1831
1832static struct usb_driver rt2500usb_driver = {
1833 .name = DRV_NAME,
1834 .id_table = rt2500usb_device_table,
1835 .probe = rt2x00usb_probe,
1836 .disconnect = rt2x00usb_disconnect,
1837 .suspend = rt2x00usb_suspend,
1838 .resume = rt2x00usb_resume,
1839};
1840
1841static int __init rt2500usb_init(void)
1842{
1843 return usb_register(&rt2500usb_driver);
1844}
1845
1846static void __exit rt2500usb_exit(void)
1847{
1848 usb_deregister(&rt2500usb_driver);
1849}
1850
1851module_init(rt2500usb_init);
1852module_exit(rt2500usb_exit);
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