]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/wireless/rt2x00/rt2500usb.c
rt2x00: Fix queue initialization
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID
27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
38/*
39 * Register access.
40 * All access to the CSR registers will go through the methods
41 * rt2500usb_register_read and rt2500usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
3d82346c
AB
50 * If the usb_cache_mutex is already held then the _lock variants must
51 * be used instead.
95ea3627 52 */
0e14f6d3 53static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
54 const unsigned int offset,
55 u16 *value)
56{
57 __le16 reg;
58 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
59 USB_VENDOR_REQUEST_IN, offset,
60 &reg, sizeof(u16), REGISTER_TIMEOUT);
61 *value = le16_to_cpu(reg);
62}
63
3d82346c
AB
64static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
65 const unsigned int offset,
66 u16 *value)
67{
68 __le16 reg;
69 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
70 USB_VENDOR_REQUEST_IN, offset,
71 &reg, sizeof(u16), REGISTER_TIMEOUT);
72 *value = le16_to_cpu(reg);
73}
74
0e14f6d3 75static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
76 const unsigned int offset,
77 void *value, const u16 length)
78{
95ea3627
ID
79 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
80 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID
81 value, length,
82 REGISTER_TIMEOUT16(length));
95ea3627
ID
83}
84
0e14f6d3 85static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
86 const unsigned int offset,
87 u16 value)
88{
89 __le16 reg = cpu_to_le16(value);
90 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
91 USB_VENDOR_REQUEST_OUT, offset,
92 &reg, sizeof(u16), REGISTER_TIMEOUT);
93}
94
3d82346c
AB
95static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
96 const unsigned int offset,
97 u16 value)
98{
99 __le16 reg = cpu_to_le16(value);
100 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
101 USB_VENDOR_REQUEST_OUT, offset,
102 &reg, sizeof(u16), REGISTER_TIMEOUT);
103}
104
0e14f6d3 105static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
106 const unsigned int offset,
107 void *value, const u16 length)
108{
95ea3627
ID
109 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
110 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID
111 value, length,
112 REGISTER_TIMEOUT16(length));
95ea3627
ID
113}
114
0e14f6d3 115static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
95ea3627
ID
116{
117 u16 reg;
118 unsigned int i;
119
120 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 121 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
95ea3627
ID
122 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
123 break;
124 udelay(REGISTER_BUSY_DELAY);
125 }
126
127 return reg;
128}
129
0e14f6d3 130static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
131 const unsigned int word, const u8 value)
132{
133 u16 reg;
134
3d82346c
AB
135 mutex_lock(&rt2x00dev->usb_cache_mutex);
136
95ea3627
ID
137 /*
138 * Wait until the BBP becomes ready.
139 */
140 reg = rt2500usb_bbp_check(rt2x00dev);
141 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
142 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
3d82346c 143 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID
144 return;
145 }
146
147 /*
148 * Write the data into the BBP.
149 */
150 reg = 0;
151 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
152 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
153 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
154
3d82346c
AB
155 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
156
157 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID
158}
159
0e14f6d3 160static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
161 const unsigned int word, u8 *value)
162{
163 u16 reg;
164
3d82346c
AB
165 mutex_lock(&rt2x00dev->usb_cache_mutex);
166
95ea3627
ID
167 /*
168 * Wait until the BBP becomes ready.
169 */
170 reg = rt2500usb_bbp_check(rt2x00dev);
171 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
172 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
173 return;
174 }
175
176 /*
177 * Write the request into the BBP.
178 */
179 reg = 0;
180 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
181 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
182
3d82346c 183 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627
ID
184
185 /*
186 * Wait until the BBP becomes ready.
187 */
188 reg = rt2500usb_bbp_check(rt2x00dev);
189 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
190 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
191 *value = 0xff;
3d82346c 192 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID
193 return;
194 }
195
3d82346c 196 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c
AB
198
199 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID
200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
203 const unsigned int word, const u32 value)
204{
205 u16 reg;
206 unsigned int i;
207
208 if (!word)
209 return;
210
3d82346c
AB
211 mutex_lock(&rt2x00dev->usb_cache_mutex);
212
95ea3627 213 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 214 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
95ea3627
ID
215 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
216 goto rf_write;
217 udelay(REGISTER_BUSY_DELAY);
218 }
219
3d82346c 220 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID
221 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
222 return;
223
224rf_write:
225 reg = 0;
226 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
3d82346c 227 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
95ea3627
ID
228
229 reg = 0;
230 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
231 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
232 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
233 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
234
3d82346c 235 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
95ea3627 236 rt2x00_rf_write(rt2x00dev, word, value);
3d82346c
AB
237
238 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID
239}
240
241#ifdef CONFIG_RT2X00_LIB_DEBUGFS
242#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
243
0e14f6d3 244static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
245 const unsigned int word, u32 *data)
246{
247 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
248}
249
0e14f6d3 250static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
251 const unsigned int word, u32 data)
252{
253 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
254}
255
256static const struct rt2x00debug rt2500usb_rt2x00debug = {
257 .owner = THIS_MODULE,
258 .csr = {
259 .read = rt2500usb_read_csr,
260 .write = rt2500usb_write_csr,
261 .word_size = sizeof(u16),
262 .word_count = CSR_REG_SIZE / sizeof(u16),
263 },
264 .eeprom = {
265 .read = rt2x00_eeprom_read,
266 .write = rt2x00_eeprom_write,
267 .word_size = sizeof(u16),
268 .word_count = EEPROM_SIZE / sizeof(u16),
269 },
270 .bbp = {
271 .read = rt2500usb_bbp_read,
272 .write = rt2500usb_bbp_write,
273 .word_size = sizeof(u8),
274 .word_count = BBP_SIZE / sizeof(u8),
275 },
276 .rf = {
277 .read = rt2x00_rf_read,
278 .write = rt2500usb_rf_write,
279 .word_size = sizeof(u32),
280 .word_count = RF_SIZE / sizeof(u32),
281 },
282};
283#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
284
a9450b70 285#ifdef CONFIG_RT2500USB_LEDS
a2e1d52a 286static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID
287 enum led_brightness brightness)
288{
289 struct rt2x00_led *led =
290 container_of(led_cdev, struct rt2x00_led, led_dev);
291 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 292 u16 reg;
a9450b70 293
a2e1d52a 294 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 295
a2e1d52a
ID
296 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
297 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
298 else if (led->type == LED_TYPE_ACTIVITY)
299 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
300
301 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
302}
303
304static int rt2500usb_blink_set(struct led_classdev *led_cdev,
305 unsigned long *delay_on,
306 unsigned long *delay_off)
307{
308 struct rt2x00_led *led =
309 container_of(led_cdev, struct rt2x00_led, led_dev);
310 u16 reg;
311
312 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
313 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
314 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
315 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 316
a2e1d52a 317 return 0;
a9450b70 318}
475433be
ID
319
320static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
321 struct rt2x00_led *led,
322 enum led_type type)
323{
324 led->rt2x00dev = rt2x00dev;
325 led->type = type;
326 led->led_dev.brightness_set = rt2500usb_brightness_set;
327 led->led_dev.blink_set = rt2500usb_blink_set;
328 led->flags = LED_INITIALIZED;
329}
a9450b70
ID
330#endif /* CONFIG_RT2500USB_LEDS */
331
95ea3627
ID
332/*
333 * Configuration handlers.
334 */
3a643d24
ID
335static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
336 const unsigned int filter_flags)
337{
338 u16 reg;
339
340 /*
341 * Start configuration steps.
342 * Note that the version error will always be dropped
343 * and broadcast frames will always be accepted since
344 * there is no filter for it at this time.
345 */
346 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
347 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
348 !(filter_flags & FIF_FCSFAIL));
349 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
350 !(filter_flags & FIF_PLCPFAIL));
351 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
352 !(filter_flags & FIF_CONTROL));
353 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
354 !(filter_flags & FIF_PROMISC_IN_BSS));
355 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID
356 !(filter_flags & FIF_PROMISC_IN_BSS) &&
357 !rt2x00dev->intf_ap_count);
3a643d24
ID
358 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
359 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
360 !(filter_flags & FIF_ALLMULTI));
361 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
362 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
363}
364
6bb40dd1
ID
365static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
366 struct rt2x00_intf *intf,
367 struct rt2x00intf_conf *conf,
368 const unsigned int flags)
95ea3627 369{
6bb40dd1 370 unsigned int bcn_preload;
95ea3627
ID
371 u16 reg;
372
6bb40dd1 373 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID
374 /*
375 * Enable beacon config
376 */
377 bcn_preload = PREAMBLE + get_duration(IEEE80211_HEADER, 20);
378 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
379 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
380 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
381 2 * (conf->type != IEEE80211_IF_TYPE_STA));
382 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 383
6bb40dd1
ID
384 /*
385 * Enable synchronisation.
386 */
387 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
388 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
389 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
390
391 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 392 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 393 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 394 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID
395 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
396 }
95ea3627 397
6bb40dd1
ID
398 if (flags & CONFIG_UPDATE_MAC)
399 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
400 (3 * sizeof(__le16)));
401
402 if (flags & CONFIG_UPDATE_BSSID)
403 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
404 (3 * sizeof(__le16)));
95ea3627
ID
405}
406
3a643d24
ID
407static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
408 struct rt2x00lib_erp *erp)
95ea3627 409{
95ea3627 410 u16 reg;
95ea3627 411
95ea3627 412 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
72810379 413 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
95ea3627
ID
414 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
415
416 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 417 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 418 !!erp->short_preamble);
95ea3627
ID
419 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
420}
421
422static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51 423 const int basic_rate_mask)
95ea3627 424{
5c58ee51 425 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627
ID
426}
427
428static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 429 struct rf_channel *rf, const int txpower)
95ea3627 430{
95ea3627
ID
431 /*
432 * Set TXpower.
433 */
5c58ee51 434 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID
435
436 /*
437 * For RT2525E we should first set the channel to half band higher.
438 */
439 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
440 static const u32 vals[] = {
441 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
442 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
443 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
444 0x00000902, 0x00000906
445 };
446
5c58ee51
ID
447 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
448 if (rf->rf4)
449 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID
450 }
451
5c58ee51
ID
452 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
453 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
454 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
455 if (rf->rf4)
456 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID
457}
458
459static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
460 const int txpower)
461{
462 u32 rf3;
463
464 rt2x00_rf_read(rt2x00dev, 3, &rf3);
465 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
466 rt2500usb_rf_write(rt2x00dev, 3, rf3);
467}
468
469static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 470 struct antenna_setup *ant)
95ea3627
ID
471{
472 u8 r2;
473 u8 r14;
474 u16 csr5;
475 u16 csr6;
476
a4fe07d9
ID
477 /*
478 * We should never come here because rt2x00lib is supposed
479 * to catch this and send us the correct antenna explicitely.
480 */
481 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
482 ant->tx == ANTENNA_SW_DIVERSITY);
483
95ea3627
ID
484 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
485 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
486 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
487 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
488
489 /*
490 * Configure the TX antenna.
491 */
addc81bd 492 switch (ant->tx) {
95ea3627
ID
493 case ANTENNA_HW_DIVERSITY:
494 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
495 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
496 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
497 break;
498 case ANTENNA_A:
499 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
500 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
501 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
502 break;
503 case ANTENNA_B:
a4fe07d9 504 default:
95ea3627
ID
505 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
506 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
507 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
508 break;
509 }
510
511 /*
512 * Configure the RX antenna.
513 */
addc81bd 514 switch (ant->rx) {
95ea3627
ID
515 case ANTENNA_HW_DIVERSITY:
516 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
517 break;
518 case ANTENNA_A:
519 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
520 break;
521 case ANTENNA_B:
a4fe07d9 522 default:
95ea3627
ID
523 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
524 break;
525 }
526
527 /*
528 * RT2525E and RT5222 need to flip TX I/Q
529 */
530 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
531 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
532 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
533 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
534 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
535
536 /*
537 * RT2525E does not need RX I/Q Flip.
538 */
539 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
540 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
541 } else {
542 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
543 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
544 }
545
546 rt2500usb_bbp_write(rt2x00dev, 2, r2);
547 rt2500usb_bbp_write(rt2x00dev, 14, r14);
548 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
549 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
550}
551
552static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 553 struct rt2x00lib_conf *libconf)
95ea3627
ID
554{
555 u16 reg;
556
5c58ee51 557 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
f5507ce9
ID
558 rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
559 rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
95ea3627
ID
560
561 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID
562 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
563 libconf->conf->beacon_int * 4);
95ea3627
ID
564 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
565}
566
567static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID
568 struct rt2x00lib_conf *libconf,
569 const unsigned int flags)
95ea3627 570{
95ea3627 571 if (flags & CONFIG_UPDATE_PHYMODE)
f5507ce9 572 rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
95ea3627 573 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID
574 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
575 libconf->conf->power_level);
95ea3627 576 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID
577 rt2500usb_config_txpower(rt2x00dev,
578 libconf->conf->power_level);
95ea3627 579 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 580 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 581 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 582 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID
583}
584
95ea3627
ID
585/*
586 * Link tuning
587 */
ebcf26da
ID
588static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
589 struct link_qual *qual)
95ea3627
ID
590{
591 u16 reg;
592
593 /*
594 * Update FCS error count from register.
595 */
596 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 597 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID
598
599 /*
600 * Update False CCA count from register.
601 */
602 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 603 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID
604}
605
606static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
607{
608 u16 eeprom;
609 u16 value;
610
611 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
612 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
613 rt2500usb_bbp_write(rt2x00dev, 24, value);
614
615 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
616 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
617 rt2500usb_bbp_write(rt2x00dev, 25, value);
618
619 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
620 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
621 rt2500usb_bbp_write(rt2x00dev, 61, value);
622
623 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
624 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
625 rt2500usb_bbp_write(rt2x00dev, 17, value);
626
627 rt2x00dev->link.vgc_level = value;
628}
629
630static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
631{
632 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
633 u16 bbp_thresh;
634 u16 vgc_bound;
635 u16 sens;
636 u16 r24;
637 u16 r25;
638 u16 r61;
639 u16 r17_sens;
640 u8 r17;
641 u8 up_bound;
642 u8 low_bound;
643
6bb40dd1
ID
644 /*
645 * Read current r17 value, as well as the sensitivity values
646 * for the r17 register.
647 */
648 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
649 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
650
651 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
652 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
653 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
654
655 /*
656 * If we are not associated, we should go straight to the
657 * dynamic CCA tuning.
658 */
659 if (!rt2x00dev->intf_associated)
660 goto dynamic_cca_tune;
661
95ea3627
ID
662 /*
663 * Determine the BBP tuning threshold and correctly
664 * set BBP 24, 25 and 61.
665 */
666 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
667 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
668
669 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
670 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
671 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
672
673 if ((rssi + bbp_thresh) > 0) {
674 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
675 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
676 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
677 } else {
678 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
679 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
680 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
681 }
682
683 rt2500usb_bbp_write(rt2x00dev, 24, r24);
684 rt2500usb_bbp_write(rt2x00dev, 25, r25);
685 rt2500usb_bbp_write(rt2x00dev, 61, r61);
686
95ea3627
ID
687 /*
688 * A too low RSSI will cause too much false CCA which will
689 * then corrupt the R17 tuning. To remidy this the tuning should
690 * be stopped (While making sure the R17 value will not exceed limits)
691 */
692 if (rssi >= -40) {
693 if (r17 != 0x60)
694 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
695 return;
696 }
697
698 /*
699 * Special big-R17 for short distance
700 */
701 if (rssi >= -58) {
702 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
703 if (r17 != sens)
704 rt2500usb_bbp_write(rt2x00dev, 17, sens);
705 return;
706 }
707
708 /*
709 * Special mid-R17 for middle distance
710 */
711 if (rssi >= -74) {
712 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
713 if (r17 != sens)
714 rt2500usb_bbp_write(rt2x00dev, 17, sens);
715 return;
716 }
717
718 /*
719 * Leave short or middle distance condition, restore r17
720 * to the dynamic tuning range.
721 */
95ea3627 722 low_bound = 0x32;
6bb40dd1
ID
723 if (rssi < -77)
724 up_bound -= (-77 - rssi);
95ea3627
ID
725
726 if (up_bound < low_bound)
727 up_bound = low_bound;
728
729 if (r17 > up_bound) {
730 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
731 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID
732 return;
733 }
734
735dynamic_cca_tune:
736
737 /*
738 * R17 is inside the dynamic tuning range,
739 * start tuning the link based on the false cca counter.
740 */
741 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID
742 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
743 rt2x00dev->link.vgc_level = r17;
ebcf26da 744 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID
745 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
746 rt2x00dev->link.vgc_level = r17;
747 }
748}
749
750/*
751 * Initialization functions.
752 */
753static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
754{
755 u16 reg;
756
757 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
758 USB_MODE_TEST, REGISTER_TIMEOUT);
759 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
760 0x00f0, REGISTER_TIMEOUT);
761
762 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
763 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
764 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
765
766 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
767 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
768
769 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
770 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
771 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
772 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
773 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
774
775 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
776 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
777 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
778 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
779 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
780
781 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
782 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
783 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
784 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
785 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
786 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
787
788 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
789 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
790 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
791 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
792 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
793 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
794
795 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
796 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
797 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
798 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
799 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
800 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
801
802 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
803 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
804 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
805 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
806 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
807 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
808
809 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
810 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
811
812 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
813 return -EBUSY;
814
815 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
816 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
817 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
818 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
819 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
820
755a957d 821 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 822 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 823 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 824 } else {
ddc827f9
ID
825 reg = 0;
826 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
827 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID
828 }
829 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
830
831 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
832 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
833 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
834 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
835
836 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
837 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
838 rt2x00dev->rx->data_size);
839 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
840
841 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
842 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
843 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
844 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
845
846 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
847 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
848 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
849
850 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
851 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
852 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
853
854 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
855 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
856 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
857
858 return 0;
859}
860
2b08da3f 861static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID
862{
863 unsigned int i;
95ea3627 864 u8 value;
95ea3627
ID
865
866 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
867 rt2500usb_bbp_read(rt2x00dev, 0, &value);
868 if ((value != 0xff) && (value != 0x00))
2b08da3f 869 return 0;
95ea3627
ID
870 udelay(REGISTER_BUSY_DELAY);
871 }
872
873 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
874 return -EACCES;
2b08da3f
ID
875}
876
877static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
878{
879 unsigned int i;
880 u16 eeprom;
881 u8 value;
882 u8 reg_id;
883
884 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
885 return -EACCES;
95ea3627 886
95ea3627
ID
887 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
888 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
889 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
890 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
891 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
892 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
893 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
894 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
895 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
896 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
897 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
898 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
899 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
900 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
901 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
902 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
903 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
904 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
905 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
906 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
907 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
908 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
909 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
910 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
911 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
912 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
913 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
914 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
915 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
916 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
917 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
918
95ea3627
ID
919 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
920 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
921
922 if (eeprom != 0xffff && eeprom != 0x0000) {
923 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
924 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID
925 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
926 }
927 }
95ea3627
ID
928
929 return 0;
930}
931
932/*
933 * Device state switch handlers.
934 */
935static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
936 enum dev_state state)
937{
938 u16 reg;
939
940 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
941 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
2b08da3f
ID
942 (state == STATE_RADIO_RX_OFF) ||
943 (state == STATE_RADIO_RX_OFF_LINK));
95ea3627
ID
944 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
945}
946
947static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
948{
949 /*
950 * Initialize all registers.
951 */
2b08da3f
ID
952 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
953 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 954 return -EIO;
95ea3627 955
95ea3627
ID
956 return 0;
957}
958
959static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
960{
95ea3627
ID
961 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
962 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
963
964 /*
965 * Disable synchronisation.
966 */
967 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
968
969 rt2x00usb_disable_radio(rt2x00dev);
970}
971
972static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
973 enum dev_state state)
974{
975 u16 reg;
976 u16 reg2;
977 unsigned int i;
978 char put_to_sleep;
979 char bbp_state;
980 char rf_state;
981
982 put_to_sleep = (state != STATE_AWAKE);
983
984 reg = 0;
985 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
986 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
987 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
988 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
989 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
990 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
991
992 /*
993 * Device is not guaranteed to be in the requested state yet.
994 * We must wait until the register indicates that the
995 * device has entered the correct state.
996 */
997 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
998 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
999 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1000 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1001 if (bbp_state == state && rf_state == state)
1002 return 0;
1003 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1004 msleep(30);
1005 }
1006
95ea3627
ID
1007 return -EBUSY;
1008}
1009
1010static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1011 enum dev_state state)
1012{
1013 int retval = 0;
1014
1015 switch (state) {
1016 case STATE_RADIO_ON:
1017 retval = rt2500usb_enable_radio(rt2x00dev);
1018 break;
1019 case STATE_RADIO_OFF:
1020 rt2500usb_disable_radio(rt2x00dev);
1021 break;
1022 case STATE_RADIO_RX_ON:
61667d8d 1023 case STATE_RADIO_RX_ON_LINK:
95ea3627 1024 case STATE_RADIO_RX_OFF:
61667d8d 1025 case STATE_RADIO_RX_OFF_LINK:
2b08da3f
ID
1026 rt2500usb_toggle_rx(rt2x00dev, state);
1027 break;
1028 case STATE_RADIO_IRQ_ON:
1029 case STATE_RADIO_IRQ_OFF:
1030 /* No support, but no error either */
95ea3627
ID
1031 break;
1032 case STATE_DEEP_SLEEP:
1033 case STATE_SLEEP:
1034 case STATE_STANDBY:
1035 case STATE_AWAKE:
1036 retval = rt2500usb_set_state(rt2x00dev, state);
1037 break;
1038 default:
1039 retval = -ENOTSUPP;
1040 break;
1041 }
1042
2b08da3f
ID
1043 if (unlikely(retval))
1044 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1045 state, retval);
1046
95ea3627
ID
1047 return retval;
1048}
1049
1050/*
1051 * TX descriptor initialization
1052 */
1053static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1054 struct sk_buff *skb,
61486e0f 1055 struct txentry_desc *txdesc)
95ea3627 1056{
181d6902 1057 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1058 __le32 *txd = skbdesc->desc;
95ea3627
ID
1059 u32 word;
1060
1061 /*
1062 * Start writing the descriptor words.
1063 */
1064 rt2x00_desc_read(txd, 1, &word);
1065 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
181d6902
ID
1066 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1067 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1068 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID
1069 rt2x00_desc_write(txd, 1, word);
1070
1071 rt2x00_desc_read(txd, 2, &word);
181d6902
ID
1072 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1073 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1074 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1075 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID
1076 rt2x00_desc_write(txd, 2, word);
1077
1078 rt2x00_desc_read(txd, 0, &word);
61486e0f 1079 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
95ea3627 1080 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1081 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1082 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1083 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1084 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1085 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1086 rt2x00_set_field32(&word, TXD_W0_OFDM,
181d6902 1087 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
95ea3627 1088 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
61486e0f 1089 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
181d6902 1090 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
dd3193e1 1091 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
95ea3627
ID
1092 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1093 rt2x00_desc_write(txd, 0, word);
1094}
1095
dd9fa2d2 1096static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1097 struct sk_buff *skb)
dd9fa2d2
ID
1098{
1099 int length;
1100
1101 /*
1102 * The length _must_ be a multiple of 2,
1103 * but it must _not_ be a multiple of the USB packet size.
1104 */
1105 length = roundup(skb->len, 2);
b242e891 1106 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID
1107
1108 return length;
1109}
1110
95ea3627
ID
1111/*
1112 * TX data initialization
1113 */
1114static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1115 const enum data_queue_qid queue)
95ea3627
ID
1116{
1117 u16 reg;
1118
e58c6aca 1119 if (queue != QID_BEACON)
95ea3627
ID
1120 return;
1121
1122 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1123 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID
1124 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1125 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID
1126 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1127 /*
1128 * Beacon generation will fail initially.
1129 * To prevent this we need to register the TXRX_CSR19
1130 * register several times.
1131 */
1132 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1133 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1134 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1135 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1136 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1137 }
1138}
1139
1140/*
1141 * RX control handlers
1142 */
181d6902
ID
1143static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1144 struct rxdone_entry_desc *rxdesc)
95ea3627 1145{
b8be63ff 1146 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID
1147 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1148 __le32 *rxd =
1149 (__le32 *)(entry->skb->data +
b8be63ff
ID
1150 (entry_priv->urb->actual_length -
1151 entry->queue->desc_size));
95ea3627
ID
1152 u32 word0;
1153 u32 word1;
1154
f855c10b 1155 /*
70a96109
ID
1156 * Copy descriptor to the skb->cb array, this has 2 benefits:
1157 * 1) Each descriptor word is 4 byte aligned.
1158 * 2) Descriptor is safe from moving of frame data in rt2x00usb.
f855c10b 1159 */
70a96109
ID
1160 skbdesc->desc_len =
1161 min_t(u16, entry->queue->desc_size, sizeof(entry->skb->cb));
1162 memcpy(entry->skb->cb, rxd, skbdesc->desc_len);
1163 skbdesc->desc = entry->skb->cb;
1164 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID
1165
1166 /*
70a96109 1167 * It is now safe to read the descriptor on all architectures.
f855c10b 1168 */
95ea3627
ID
1169 rt2x00_desc_read(rxd, 0, &word0);
1170 rt2x00_desc_read(rxd, 1, &word1);
1171
4150c572 1172 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1173 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1174 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1175 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID
1176
1177 /*
1178 * Obtain the status about this packet.
89993890
ID
1179 * When frame was received with an OFDM bitrate,
1180 * the signal is the PLCP value. If it was received with
1181 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1182 */
181d6902
ID
1183 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1184 rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
1185 entry->queue->rt2x00dev->rssi_offset;
181d6902 1186 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1187
19d30e02
ID
1188 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1189 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1190 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1191 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1192
2ae23854
MN
1193 /*
1194 * Adjust the skb memory window to the frame boundaries.
1195 */
2ae23854 1196 skb_trim(entry->skb, rxdesc->size);
7d1de806 1197 skbdesc->data = entry->skb->data;
647d0ca9 1198 skbdesc->data_len = rxdesc->size;
95ea3627
ID
1199}
1200
1201/*
1202 * Interrupt functions.
1203 */
1204static void rt2500usb_beacondone(struct urb *urb)
1205{
181d6902 1206 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1207 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1208
181d6902 1209 if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID
1210 return;
1211
1212 /*
1213 * Check if this was the guardian beacon,
1214 * if that was the case we need to send the real beacon now.
1215 * Otherwise we should free the sk_buffer, the device
1216 * should be doing the rest of the work now.
1217 */
b8be63ff
ID
1218 if (bcn_priv->guardian_urb == urb) {
1219 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1220 } else if (bcn_priv->urb == urb) {
181d6902
ID
1221 dev_kfree_skb(entry->skb);
1222 entry->skb = NULL;
95ea3627
ID
1223 }
1224}
1225
1226/*
1227 * Device probe functions.
1228 */
1229static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1230{
1231 u16 word;
1232 u8 *mac;
6bb40dd1 1233 u8 bbp;
95ea3627
ID
1234
1235 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1236
1237 /*
1238 * Start validation of the data that has been read.
1239 */
1240 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1241 if (!is_valid_ether_addr(mac)) {
0795af57
JP
1242 DECLARE_MAC_BUF(macbuf);
1243
95ea3627 1244 random_ether_addr(mac);
0795af57 1245 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID
1246 }
1247
1248 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1249 if (word == 0xffff) {
1250 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID
1251 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1252 ANTENNA_SW_DIVERSITY);
1253 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1254 ANTENNA_SW_DIVERSITY);
1255 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1256 LED_MODE_DEFAULT);
95ea3627
ID
1257 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1258 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1259 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1260 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1261 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1262 }
1263
1264 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1265 if (word == 0xffff) {
1266 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1267 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1268 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1269 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1270 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1271 }
1272
1273 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1274 if (word == 0xffff) {
1275 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1276 DEFAULT_RSSI_OFFSET);
1277 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1278 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1279 }
1280
1281 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1282 if (word == 0xffff) {
1283 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1284 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1285 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1286 }
1287
6bb40dd1
ID
1288 /*
1289 * Switch lower vgc bound to current BBP R17 value,
1290 * lower the value a bit for better quality.
1291 */
1292 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1293 bbp -= 6;
1294
95ea3627
ID
1295 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1296 if (word == 0xffff) {
1297 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1298 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID
1299 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1300 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1301 }
1302
1303 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1304 if (word == 0xffff) {
1305 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1306 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1307 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1308 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
6bb40dd1
ID
1309 } else {
1310 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1311 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID
1312 }
1313
1314 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1315 if (word == 0xffff) {
1316 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1317 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1318 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1319 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1320 }
1321
1322 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1323 if (word == 0xffff) {
1324 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1325 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1326 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1327 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1328 }
1329
1330 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1331 if (word == 0xffff) {
1332 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1333 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1334 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1335 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1336 }
1337
1338 return 0;
1339}
1340
1341static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1342{
1343 u16 reg;
1344 u16 value;
1345 u16 eeprom;
1346
1347 /*
1348 * Read EEPROM word for configuration.
1349 */
1350 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1351
1352 /*
1353 * Identify RF chipset.
1354 */
1355 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1356 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1357 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1358
755a957d 1359 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID
1360 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1361 return -ENODEV;
1362 }
1363
1364 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1365 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1366 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1367 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1368 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1369 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1370 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1371 return -ENODEV;
1372 }
1373
1374 /*
1375 * Identify default antenna configuration.
1376 */
addc81bd 1377 rt2x00dev->default_ant.tx =
95ea3627 1378 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1379 rt2x00dev->default_ant.rx =
95ea3627
ID
1380 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1381
addc81bd
ID
1382 /*
1383 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1384 * I am not 100% sure about this, but the legacy drivers do not
1385 * indicate antenna swapping in software is required when
1386 * diversity is enabled.
1387 */
1388 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1389 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1390 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1391 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1392
95ea3627
ID
1393 /*
1394 * Store led mode, for correct led behaviour.
1395 */
a9450b70
ID
1396#ifdef CONFIG_RT2500USB_LEDS
1397 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1398
475433be
ID
1399 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1400 if (value == LED_MODE_TXRX_ACTIVITY)
1401 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1402 LED_TYPE_ACTIVITY);
a9450b70 1403#endif /* CONFIG_RT2500USB_LEDS */
95ea3627
ID
1404
1405 /*
1406 * Check if the BBP tuning should be disabled.
1407 */
1408 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1409 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1410 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1411
1412 /*
1413 * Read the RSSI <-> dBm offset information.
1414 */
1415 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1416 rt2x00dev->rssi_offset =
1417 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1418
1419 return 0;
1420}
1421
1422/*
1423 * RF value list for RF2522
1424 * Supports: 2.4 GHz
1425 */
1426static const struct rf_channel rf_vals_bg_2522[] = {
1427 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1428 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1429 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1430 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1431 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1432 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1433 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1434 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1435 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1436 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1437 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1438 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1439 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1440 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1441};
1442
1443/*
1444 * RF value list for RF2523
1445 * Supports: 2.4 GHz
1446 */
1447static const struct rf_channel rf_vals_bg_2523[] = {
1448 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1449 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1450 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1451 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1452 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1453 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1454 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1455 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1456 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1457 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1458 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1459 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1460 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1461 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1462};
1463
1464/*
1465 * RF value list for RF2524
1466 * Supports: 2.4 GHz
1467 */
1468static const struct rf_channel rf_vals_bg_2524[] = {
1469 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1470 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1471 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1472 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1473 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1474 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1475 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1476 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1477 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1478 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1479 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1480 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1481 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1482 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1483};
1484
1485/*
1486 * RF value list for RF2525
1487 * Supports: 2.4 GHz
1488 */
1489static const struct rf_channel rf_vals_bg_2525[] = {
1490 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1491 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1492 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1493 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1494 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1495 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1496 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1497 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1498 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1499 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1500 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1501 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1502 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1503 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1504};
1505
1506/*
1507 * RF value list for RF2525e
1508 * Supports: 2.4 GHz
1509 */
1510static const struct rf_channel rf_vals_bg_2525e[] = {
1511 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1512 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1513 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1514 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1515 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1516 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1517 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1518 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1519 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1520 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1521 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1522 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1523 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1524 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1525};
1526
1527/*
1528 * RF value list for RF5222
1529 * Supports: 2.4 GHz & 5.2 GHz
1530 */
1531static const struct rf_channel rf_vals_5222[] = {
1532 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1533 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1534 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1535 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1536 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1537 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1538 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1539 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1540 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1541 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1542 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1543 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1544 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1545 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1546
1547 /* 802.11 UNI / HyperLan 2 */
1548 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1549 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1550 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1551 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1552 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1553 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1554 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1555 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1556
1557 /* 802.11 HyperLan 2 */
1558 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1559 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1560 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1561 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1562 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1563 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1564 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1565 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1566 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1567 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1568
1569 /* 802.11 UNII */
1570 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1571 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1572 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1573 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1574 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1575};
1576
1577static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1578{
1579 struct hw_mode_spec *spec = &rt2x00dev->spec;
1580 u8 *txpower;
1581 unsigned int i;
1582
1583 /*
1584 * Initialize all hw fields.
1585 */
1586 rt2x00dev->hw->flags =
1587 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1588 IEEE80211_HW_RX_INCLUDES_FCS |
566bfe5a
BR
1589 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1590 IEEE80211_HW_SIGNAL_DBM;
1591
95ea3627 1592 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
95ea3627
ID
1593
1594 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1595 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1596 rt2x00_eeprom_addr(rt2x00dev,
1597 EEPROM_MAC_ADDR_0));
1598
1599 /*
1600 * Convert tx_power array in eeprom.
1601 */
1602 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1603 for (i = 0; i < 14; i++)
1604 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1605
1606 /*
1607 * Initialize hw_mode information.
1608 */
31562e80
ID
1609 spec->supported_bands = SUPPORT_BAND_2GHZ;
1610 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID
1611 spec->tx_power_a = NULL;
1612 spec->tx_power_bg = txpower;
1613 spec->tx_power_default = DEFAULT_TXPOWER;
1614
1615 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1616 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1617 spec->channels = rf_vals_bg_2522;
1618 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1619 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1620 spec->channels = rf_vals_bg_2523;
1621 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1622 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1623 spec->channels = rf_vals_bg_2524;
1624 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1625 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1626 spec->channels = rf_vals_bg_2525;
1627 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1628 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1629 spec->channels = rf_vals_bg_2525e;
1630 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1631 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID
1632 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1633 spec->channels = rf_vals_5222;
95ea3627
ID
1634 }
1635}
1636
1637static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1638{
1639 int retval;
1640
1641 /*
1642 * Allocate eeprom data.
1643 */
1644 retval = rt2500usb_validate_eeprom(rt2x00dev);
1645 if (retval)
1646 return retval;
1647
1648 retval = rt2500usb_init_eeprom(rt2x00dev);
1649 if (retval)
1650 return retval;
1651
1652 /*
1653 * Initialize hw specifications.
1654 */
1655 rt2500usb_probe_hw_mode(rt2x00dev);
1656
1657 /*
181d6902 1658 * This device requires the atim queue
95ea3627 1659 */
181d6902
ID
1660 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1661 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
3a643d24 1662 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
95ea3627
ID
1663
1664 /*
1665 * Set the rssi offset.
1666 */
1667 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1668
1669 return 0;
1670}
1671
1672/*
1673 * IEEE80211 stack callback functions.
1674 */
e039fa4a 1675static int rt2500usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
95ea3627
ID
1676{
1677 struct rt2x00_dev *rt2x00dev = hw->priv;
181d6902 1678 struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev);
e039fa4a
JB
1679 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1680 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
b8be63ff 1681 struct queue_entry_priv_usb_bcn *bcn_priv;
181d6902 1682 struct skb_frame_desc *skbdesc;
7050ec82 1683 struct txentry_desc txdesc;
dd9fa2d2 1684 int pipe = usb_sndbulkpipe(usb_dev, 1);
95ea3627 1685 int length;
8af244cc 1686 u16 reg;
95ea3627 1687
6bb40dd1
ID
1688 if (unlikely(!intf->beacon))
1689 return -ENOBUFS;
1690
b8be63ff 1691 bcn_priv = intf->beacon->priv_data;
95ea3627 1692
7050ec82
ID
1693 /*
1694 * Copy all TX descriptor information into txdesc,
1695 * after that we are free to use the skb->cb array
1696 * for our information.
1697 */
1698 intf->beacon->skb = skb;
e039fa4a 1699 rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
7050ec82 1700
95ea3627 1701 /*
08992f7f 1702 * Add the descriptor in front of the skb.
95ea3627 1703 */
6bb40dd1
ID
1704 skb_push(skb, intf->beacon->queue->desc_size);
1705 memset(skb->data, 0, intf->beacon->queue->desc_size);
c22eb87b 1706
08992f7f
ID
1707 /*
1708 * Fill in skb descriptor
1709 */
181d6902
ID
1710 skbdesc = get_skb_frame_desc(skb);
1711 memset(skbdesc, 0, sizeof(*skbdesc));
baf26a7e 1712 skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
6bb40dd1
ID
1713 skbdesc->data = skb->data + intf->beacon->queue->desc_size;
1714 skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
181d6902 1715 skbdesc->desc = skb->data;
6bb40dd1
ID
1716 skbdesc->desc_len = intf->beacon->queue->desc_size;
1717 skbdesc->entry = intf->beacon;
08992f7f 1718
8af244cc
ID
1719 /*
1720 * Disable beaconing while we are reloading the beacon data,
1721 * otherwise we might be sending out invalid data.
1722 */
1723 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1724 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1725 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1726 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1727 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1728
7050ec82 1729 rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
95ea3627 1730
08992f7f
ID
1731 /*
1732 * USB devices cannot blindly pass the skb->len as the
1733 * length of the data to usb_fill_bulk_urb. Pass the skb
1734 * to the driver to determine what the length should be.
1735 */
b242e891 1736 length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
95ea3627 1737
b8be63ff 1738 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
6bb40dd1
ID
1739 skb->data, length, rt2500usb_beacondone,
1740 intf->beacon);
95ea3627 1741
95ea3627
ID
1742 /*
1743 * Second we need to create the guardian byte.
1744 * We only need a single byte, so lets recycle
1745 * the 'flags' field we are not using for beacons.
1746 */
b8be63ff
ID
1747 bcn_priv->guardian_data = 0;
1748 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1749 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
6bb40dd1 1750 intf->beacon);
95ea3627
ID
1751
1752 /*
1753 * Send out the guardian byte.
1754 */
b8be63ff 1755 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
95ea3627
ID
1756
1757 /*
1758 * Enable beacon generation.
1759 */
e58c6aca 1760 rt2500usb_kick_tx_queue(rt2x00dev, QID_BEACON);
95ea3627
ID
1761
1762 return 0;
1763}
1764
1765static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1766 .tx = rt2x00mac_tx,
4150c572
JB
1767 .start = rt2x00mac_start,
1768 .stop = rt2x00mac_stop,
95ea3627
ID
1769 .add_interface = rt2x00mac_add_interface,
1770 .remove_interface = rt2x00mac_remove_interface,
1771 .config = rt2x00mac_config,
1772 .config_interface = rt2x00mac_config_interface,
3a643d24 1773 .configure_filter = rt2x00mac_configure_filter,
95ea3627 1774 .get_stats = rt2x00mac_get_stats,
471b3efd 1775 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID
1776 .conf_tx = rt2x00mac_conf_tx,
1777 .get_tx_stats = rt2x00mac_get_tx_stats,
1778 .beacon_update = rt2500usb_beacon_update,
1779};
1780
1781static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1782 .probe_hw = rt2500usb_probe_hw,
1783 .initialize = rt2x00usb_initialize,
1784 .uninitialize = rt2x00usb_uninitialize,
837e7f24
ID
1785 .init_rxentry = rt2x00usb_init_rxentry,
1786 .init_txentry = rt2x00usb_init_txentry,
95ea3627
ID
1787 .set_device_state = rt2500usb_set_device_state,
1788 .link_stats = rt2500usb_link_stats,
1789 .reset_tuner = rt2500usb_reset_tuner,
1790 .link_tuner = rt2500usb_link_tuner,
1791 .write_tx_desc = rt2500usb_write_tx_desc,
1792 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1793 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID
1794 .kick_tx_queue = rt2500usb_kick_tx_queue,
1795 .fill_rxdone = rt2500usb_fill_rxdone,
3a643d24 1796 .config_filter = rt2500usb_config_filter,
6bb40dd1 1797 .config_intf = rt2500usb_config_intf,
72810379 1798 .config_erp = rt2500usb_config_erp,
95ea3627
ID
1799 .config = rt2500usb_config,
1800};
1801
181d6902
ID
1802static const struct data_queue_desc rt2500usb_queue_rx = {
1803 .entry_num = RX_ENTRIES,
1804 .data_size = DATA_FRAME_SIZE,
1805 .desc_size = RXD_DESC_SIZE,
b8be63ff 1806 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID
1807};
1808
1809static const struct data_queue_desc rt2500usb_queue_tx = {
1810 .entry_num = TX_ENTRIES,
1811 .data_size = DATA_FRAME_SIZE,
1812 .desc_size = TXD_DESC_SIZE,
b8be63ff 1813 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID
1814};
1815
1816static const struct data_queue_desc rt2500usb_queue_bcn = {
1817 .entry_num = BEACON_ENTRIES,
1818 .data_size = MGMT_FRAME_SIZE,
1819 .desc_size = TXD_DESC_SIZE,
1820 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1821};
1822
1823static const struct data_queue_desc rt2500usb_queue_atim = {
1824 .entry_num = ATIM_ENTRIES,
1825 .data_size = DATA_FRAME_SIZE,
1826 .desc_size = TXD_DESC_SIZE,
b8be63ff 1827 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID
1828};
1829
95ea3627 1830static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1831 .name = KBUILD_MODNAME,
6bb40dd1
ID
1832 .max_sta_intf = 1,
1833 .max_ap_intf = 1,
95ea3627
ID
1834 .eeprom_size = EEPROM_SIZE,
1835 .rf_size = RF_SIZE,
61448f88 1836 .tx_queues = NUM_TX_QUEUES,
181d6902
ID
1837 .rx = &rt2500usb_queue_rx,
1838 .tx = &rt2500usb_queue_tx,
1839 .bcn = &rt2500usb_queue_bcn,
1840 .atim = &rt2500usb_queue_atim,
95ea3627
ID
1841 .lib = &rt2500usb_rt2x00_ops,
1842 .hw = &rt2500usb_mac80211_ops,
1843#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1844 .debugfs = &rt2500usb_rt2x00debug,
1845#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1846};
1847
1848/*
1849 * rt2500usb module information.
1850 */
1851static struct usb_device_id rt2500usb_device_table[] = {
1852 /* ASUS */
1853 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1854 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1855 /* Belkin */
1856 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1857 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1858 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1859 /* Cisco Systems */
1860 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1861 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1862 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1863 /* Conceptronic */
1864 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1865 /* D-LINK */
1866 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1867 /* Gigabyte */
1868 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1869 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1870 /* Hercules */
1871 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1872 /* Melco */
db433feb 1873 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID
1874 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1875 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1876 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1877 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID
1878 /* MSI */
1879 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1880 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1881 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1882 /* Ralink */
1883 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1884 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1885 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1886 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1887 /* Siemens */
1888 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1889 /* SMC */
1890 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1891 /* Spairon */
1892 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1893 /* Trust */
1894 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1895 /* Zinwell */
1896 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1897 { 0, }
1898};
1899
1900MODULE_AUTHOR(DRV_PROJECT);
1901MODULE_VERSION(DRV_VERSION);
1902MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1903MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1904MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1905MODULE_LICENSE("GPL");
1906
1907static struct usb_driver rt2500usb_driver = {
2360157c 1908 .name = KBUILD_MODNAME,
95ea3627
ID
1909 .id_table = rt2500usb_device_table,
1910 .probe = rt2x00usb_probe,
1911 .disconnect = rt2x00usb_disconnect,
1912 .suspend = rt2x00usb_suspend,
1913 .resume = rt2x00usb_resume,
1914};
1915
1916static int __init rt2500usb_init(void)
1917{
1918 return usb_register(&rt2500usb_driver);
1919}
1920
1921static void __exit rt2500usb_exit(void)
1922{
1923 usb_deregister(&rt2500usb_driver);
1924}
1925
1926module_init(rt2500usb_init);
1927module_exit(rt2500usb_exit);