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[PATCH] rt2x00: Implement SW diversity
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627
ID		 1/*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
27/*
28 * Set enviroment defines for rt2x00.h
29 */
30#define DRV_NAME "rt2500usb"
31
32#include <linux/delay.h>
33#include <linux/etherdevice.h>
34#include <linux/init.h>
35#include <linux/kernel.h>
36#include <linux/module.h>
37#include <linux/usb.h>
38
39#include "rt2x00.h"
40#include "rt2x00usb.h"
41#include "rt2500usb.h"
42
43/*
44 * Register access.
45 * All access to the CSR registers will go through the methods
46 * rt2500usb_register_read and rt2500usb_register_write.
47 * BBP and RF register require indirect register access,
48 * and use the CSR registers BBPCSR and RFCSR to achieve this.
49 * These indirect registers work with busy bits,
50 * and we will try maximal REGISTER_BUSY_COUNT times to access
51 * the register while taking a REGISTER_BUSY_DELAY us delay
52 * between each attampt. When the busy bit is still set at that time,
53 * the access attempt is considered to have failed,
54 * and we will print an error.
55 */
56static inline void rt2500usb_register_read(const struct rt2x00_dev *rt2x00dev,
57 const unsigned int offset,
58 u16 *value)
59{
60 __le16 reg;
61 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
62 USB_VENDOR_REQUEST_IN, offset,
63 &reg, sizeof(u16), REGISTER_TIMEOUT);
64 *value = le16_to_cpu(reg);
65}
66
67static inline void rt2500usb_register_multiread(const struct rt2x00_dev
68 *rt2x00dev,
69 const unsigned int offset,
70 void *value, const u16 length)
71{
72 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
73 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
74 USB_VENDOR_REQUEST_IN, offset,
75 value, length, timeout);
76}
77
78static inline void rt2500usb_register_write(const struct rt2x00_dev *rt2x00dev,
79 const unsigned int offset,
80 u16 value)
81{
82 __le16 reg = cpu_to_le16(value);
83 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
84 USB_VENDOR_REQUEST_OUT, offset,
85 &reg, sizeof(u16), REGISTER_TIMEOUT);
86}
87
88static inline void rt2500usb_register_multiwrite(const struct rt2x00_dev
89 *rt2x00dev,
90 const unsigned int offset,
91 void *value, const u16 length)
92{
93 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
94 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
95 USB_VENDOR_REQUEST_OUT, offset,
96 value, length, timeout);
97}
98
99static u16 rt2500usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
100{
101 u16 reg;
102 unsigned int i;
103
104 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
105 rt2500usb_register_read(rt2x00dev, PHY_CSR8, &reg);
106 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
107 break;
108 udelay(REGISTER_BUSY_DELAY);
109 }
110
111 return reg;
112}
113
114static void rt2500usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
115 const unsigned int word, const u8 value)
116{
117 u16 reg;
118
119 /*
120 * Wait until the BBP becomes ready.
121 */
122 reg = rt2500usb_bbp_check(rt2x00dev);
123 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
124 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
125 return;
126 }
127
128 /*
129 * Write the data into the BBP.
130 */
131 reg = 0;
132 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
133 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
134 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
135
136 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
137}
138
139static void rt2500usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
140 const unsigned int word, u8 *value)
141{
142 u16 reg;
143
144 /*
145 * Wait until the BBP becomes ready.
146 */
147 reg = rt2500usb_bbp_check(rt2x00dev);
148 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
149 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
150 return;
151 }
152
153 /*
154 * Write the request into the BBP.
155 */
156 reg = 0;
157 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
158 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
159
160 rt2500usb_register_write(rt2x00dev, PHY_CSR7, reg);
161
162 /*
163 * Wait until the BBP becomes ready.
164 */
165 reg = rt2500usb_bbp_check(rt2x00dev);
166 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
167 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
168 *value = 0xff;
169 return;
170 }
171
172 rt2500usb_register_read(rt2x00dev, PHY_CSR7, &reg);
173 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
174}
175
176static void rt2500usb_rf_write(const struct rt2x00_dev *rt2x00dev,
177 const unsigned int word, const u32 value)
178{
179 u16 reg;
180 unsigned int i;
181
182 if (!word)
183 return;
184
185 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
186 rt2500usb_register_read(rt2x00dev, PHY_CSR10, &reg);
187 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
188 goto rf_write;
189 udelay(REGISTER_BUSY_DELAY);
190 }
191
192 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
193 return;
194
195rf_write:
196 reg = 0;
197 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
198 rt2500usb_register_write(rt2x00dev, PHY_CSR9, reg);
199
200 reg = 0;
201 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
202 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
203 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
204 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
205
206 rt2500usb_register_write(rt2x00dev, PHY_CSR10, reg);
207 rt2x00_rf_write(rt2x00dev, word, value);
208}
209
210#ifdef CONFIG_RT2X00_LIB_DEBUGFS
211#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
212
213static void rt2500usb_read_csr(const struct rt2x00_dev *rt2x00dev,
214 const unsigned int word, u32 *data)
215{
216 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
217}
218
219static void rt2500usb_write_csr(const struct rt2x00_dev *rt2x00dev,
220 const unsigned int word, u32 data)
221{
222 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
223}
224
225static const struct rt2x00debug rt2500usb_rt2x00debug = {
226 .owner = THIS_MODULE,
227 .csr = {
228 .read = rt2500usb_read_csr,
229 .write = rt2500usb_write_csr,
230 .word_size = sizeof(u16),
231 .word_count = CSR_REG_SIZE / sizeof(u16),
232 },
233 .eeprom = {
234 .read = rt2x00_eeprom_read,
235 .write = rt2x00_eeprom_write,
236 .word_size = sizeof(u16),
237 .word_count = EEPROM_SIZE / sizeof(u16),
238 },
239 .bbp = {
240 .read = rt2500usb_bbp_read,
241 .write = rt2500usb_bbp_write,
242 .word_size = sizeof(u8),
243 .word_count = BBP_SIZE / sizeof(u8),
244 },
245 .rf = {
246 .read = rt2x00_rf_read,
247 .write = rt2500usb_rf_write,
248 .word_size = sizeof(u32),
249 .word_count = RF_SIZE / sizeof(u32),
250 },
251};
252#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
253
254/*
255 * Configuration handlers.
256 */
4abee4bb
ID		 257static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev,
258 __le32 *mac)
95ea3627 259{
dd87145d 260 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
4abee4bb 261 (3 * sizeof(__le16)));
95ea3627
ID		 262}
263
4abee4bb
ID		 264static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev,
265 __le32 *bssid)
95ea3627 266{
4abee4bb
ID		 267 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, bssid,
268 (3 * sizeof(__le16)));
95ea3627
ID		 269}
270
feb24691
ID		 271static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
272 const int tsf_sync)
95ea3627
ID		 273{
274 u16 reg;
275
276 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
277
95ea3627
ID		 278 /*
279 * Enable beacon config
280 */
281 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
282 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
a137e202 283 (PREAMBLE + get_duration(IEEE80211_HEADER, 20)) >> 6);
feb24691 284 if (type == IEEE80211_IF_TYPE_STA)
95ea3627
ID		 285 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
286 else
287 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
288 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
289
290 /*
291 * Enable synchronisation.
292 */
293 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
294 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
295 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
296
297 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
4150c572
JB		 298 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
299 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627 300 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
feb24691 301 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, tsf_sync);
95ea3627
ID		 302 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
303}
304
5c58ee51
ID		 305static void rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
306 const int short_preamble,
307 const int ack_timeout,
308 const int ack_consume_time)
95ea3627 309{
95ea3627 310 u16 reg;
95ea3627 311
5c58ee51
ID		 312 /*
313 * When in atomic context, reschedule and let rt2x00lib
314 * call this function again.
315 */
316 if (in_atomic()) {
317 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
318 return;
319 }
95ea3627
ID		 320
321 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
5c58ee51 322 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
95ea3627
ID		 323 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
324
325 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 326 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
5c58ee51 327 !!short_preamble);
95ea3627
ID		 328 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
329}
330
331static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51
ID		 332 const int phymode,
333 const int basic_rate_mask)
95ea3627 334{
5c58ee51 335 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627 336
5c58ee51 337 if (phymode == HWMODE_B) {
95ea3627
ID		 338 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
339 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
340 } else {
341 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
342 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
343 }
344}
345
346static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 347 struct rf_channel *rf, const int txpower)
95ea3627 348{
95ea3627
ID		 349 /*
350 * Set TXpower.
351 */
5c58ee51 352 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID		 353
354 /*
355 * For RT2525E we should first set the channel to half band higher.
356 */
357 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
358 static const u32 vals[] = {
359 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
360 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
361 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
362 0x00000902, 0x00000906
363 };
364
5c58ee51
ID		 365 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
366 if (rf->rf4)
367 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 368 }
369
5c58ee51
ID		 370 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
371 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
372 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
373 if (rf->rf4)
374 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 375}
376
377static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
378 const int txpower)
379{
380 u32 rf3;
381
382 rt2x00_rf_read(rt2x00dev, 3, &rf3);
383 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
384 rt2500usb_rf_write(rt2x00dev, 3, rf3);
385}
386
387static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 388 struct antenna_setup *ant)
95ea3627
ID		 389{
390 u8 r2;
391 u8 r14;
392 u16 csr5;
393 u16 csr6;
394
395 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
396 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
397 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
398 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
399
400 /*
401 * Configure the TX antenna.
402 */
addc81bd 403 switch (ant->tx) {
95ea3627
ID		 404 case ANTENNA_HW_DIVERSITY:
405 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
406 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
407 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
408 break;
409 case ANTENNA_A:
410 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
411 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
412 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
413 break;
39e75857
ID		 414 case ANTENNA_SW_DIVERSITY:
415 /*
416 * NOTE: We should never come here because rt2x00lib is
417 * supposed to catch this and send us the correct antenna
418 * explicitely. However we are nog going to bug about this.
419 * Instead, just default to antenna B.
420 */
95ea3627
ID		 421 case ANTENNA_B:
422 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
423 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
424 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
425 break;
426 }
427
428 /*
429 * Configure the RX antenna.
430 */
addc81bd 431 switch (ant->rx) {
95ea3627
ID		 432 case ANTENNA_HW_DIVERSITY:
433 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
434 break;
435 case ANTENNA_A:
436 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
437 break;
39e75857
ID		 438 case ANTENNA_SW_DIVERSITY:
439 /*
440 * NOTE: We should never come here because rt2x00lib is
441 * supposed to catch this and send us the correct antenna
442 * explicitely. However we are nog going to bug about this.
443 * Instead, just default to antenna B.
444 */
95ea3627
ID		 445 case ANTENNA_B:
446 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
447 break;
448 }
449
450 /*
451 * RT2525E and RT5222 need to flip TX I/Q
452 */
453 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
454 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
455 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
456 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
457 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
458
459 /*
460 * RT2525E does not need RX I/Q Flip.
461 */
462 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
463 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
464 } else {
465 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
466 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
467 }
468
469 rt2500usb_bbp_write(rt2x00dev, 2, r2);
470 rt2500usb_bbp_write(rt2x00dev, 14, r14);
471 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
472 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
473}
474
475static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 476 struct rt2x00lib_conf *libconf)
95ea3627
ID		 477{
478 u16 reg;
479
5c58ee51 480 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
95ea3627
ID		 481
482 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 483 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
484 libconf->conf->beacon_int * 4);
95ea3627
ID		 485 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
486}
487
488static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
489 const unsigned int flags,
5c58ee51 490 struct rt2x00lib_conf *libconf)
95ea3627 491{
95ea3627 492 if (flags & CONFIG_UPDATE_PHYMODE)
5c58ee51
ID		 493 rt2500usb_config_phymode(rt2x00dev, libconf->phymode,
494 libconf->basic_rates);
95ea3627 495 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID		 496 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
497 libconf->conf->power_level);
95ea3627 498 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID		 499 rt2500usb_config_txpower(rt2x00dev,
500 libconf->conf->power_level);
95ea3627 501 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 502 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 503 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 504 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 505}
506
507/*
508 * LED functions.
509 */
510static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
511{
512 u16 reg;
513
514 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
515 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
516 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
517 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
518
519 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
520
521 if (rt2x00dev->led_mode == LED_MODE_TXRX_ACTIVITY) {
522 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
523 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
524 } else if (rt2x00dev->led_mode == LED_MODE_ASUS) {
525 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
526 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
527 } else {
528 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 1);
529 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 1);
530 }
531
532 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
533}
534
535static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
536{
537 u16 reg;
538
539 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
540 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
541 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
542 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
543}
544
545/*
546 * Link tuning
547 */
ebcf26da
ID		 548static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
549 struct link_qual *qual)
95ea3627
ID		 550{
551 u16 reg;
552
553 /*
554 * Update FCS error count from register.
555 */
556 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 557 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 558
559 /*
560 * Update False CCA count from register.
561 */
562 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 563 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 564}
565
566static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
567{
568 u16 eeprom;
569 u16 value;
570
571 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
572 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
573 rt2500usb_bbp_write(rt2x00dev, 24, value);
574
575 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
576 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
577 rt2500usb_bbp_write(rt2x00dev, 25, value);
578
579 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
580 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
581 rt2500usb_bbp_write(rt2x00dev, 61, value);
582
583 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
584 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
585 rt2500usb_bbp_write(rt2x00dev, 17, value);
586
587 rt2x00dev->link.vgc_level = value;
588}
589
590static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
591{
592 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
593 u16 bbp_thresh;
594 u16 vgc_bound;
595 u16 sens;
596 u16 r24;
597 u16 r25;
598 u16 r61;
599 u16 r17_sens;
600 u8 r17;
601 u8 up_bound;
602 u8 low_bound;
603
604 /*
605 * Determine the BBP tuning threshold and correctly
606 * set BBP 24, 25 and 61.
607 */
608 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
609 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
610
611 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
612 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
613 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
614
615 if ((rssi + bbp_thresh) > 0) {
616 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
617 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
618 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
619 } else {
620 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
621 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
622 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
623 }
624
625 rt2500usb_bbp_write(rt2x00dev, 24, r24);
626 rt2500usb_bbp_write(rt2x00dev, 25, r25);
627 rt2500usb_bbp_write(rt2x00dev, 61, r61);
628
629 /*
630 * Read current r17 value, as well as the sensitivity values
631 * for the r17 register.
632 */
633 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
634 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
635
636 /*
637 * A too low RSSI will cause too much false CCA which will
638 * then corrupt the R17 tuning. To remidy this the tuning should
639 * be stopped (While making sure the R17 value will not exceed limits)
640 */
641 if (rssi >= -40) {
642 if (r17 != 0x60)
643 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
644 return;
645 }
646
647 /*
648 * Special big-R17 for short distance
649 */
650 if (rssi >= -58) {
651 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
652 if (r17 != sens)
653 rt2500usb_bbp_write(rt2x00dev, 17, sens);
654 return;
655 }
656
657 /*
658 * Special mid-R17 for middle distance
659 */
660 if (rssi >= -74) {
661 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
662 if (r17 != sens)
663 rt2500usb_bbp_write(rt2x00dev, 17, sens);
664 return;
665 }
666
667 /*
668 * Leave short or middle distance condition, restore r17
669 * to the dynamic tuning range.
670 */
671 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
672 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
673
674 low_bound = 0x32;
675 if (rssi >= -77)
676 up_bound = vgc_bound;
677 else
678 up_bound = vgc_bound - (-77 - rssi);
679
680 if (up_bound < low_bound)
681 up_bound = low_bound;
682
683 if (r17 > up_bound) {
684 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
685 rt2x00dev->link.vgc_level = up_bound;
ebcf26da 686 } else if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 687 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
688 rt2x00dev->link.vgc_level = r17;
ebcf26da 689 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 690 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
691 rt2x00dev->link.vgc_level = r17;
692 }
693}
694
695/*
696 * Initialization functions.
697 */
698static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
699{
700 u16 reg;
701
702 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
703 USB_MODE_TEST, REGISTER_TIMEOUT);
704 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
705 0x00f0, REGISTER_TIMEOUT);
706
707 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
708 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
709 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
710
711 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
712 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
713
714 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
715 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
716 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
717 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
718 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
719
720 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
721 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
722 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
723 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
724 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
725
726 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
727 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
728 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
729 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
730 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
731 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
732
733 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
734 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
735 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
736 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
737 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
738 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
739
740 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
741 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
742 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
743 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
744 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
745 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
746
747 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
748 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
749 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
750 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
751 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
752 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
753
754 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
755 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
756
757 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
758 return -EBUSY;
759
760 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
761 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
762 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
763 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
764 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
765
755a957d 766 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627
ID		 767 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
768 reg &= ~0x0002;
769 } else {
770 reg = 0x3002;
771 }
772 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
773
774 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
775 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
776 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
777 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
778
779 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
780 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
781 rt2x00dev->rx->data_size);
782 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
783
784 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
785 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
786 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
787 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
788
789 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
790 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
791 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
792
793 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
794 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
795 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
796
797 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
798 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
799 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
800
801 return 0;
802}
803
804static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
805{
806 unsigned int i;
807 u16 eeprom;
808 u8 value;
809 u8 reg_id;
810
811 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
812 rt2500usb_bbp_read(rt2x00dev, 0, &value);
813 if ((value != 0xff) && (value != 0x00))
814 goto continue_csr_init;
815 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
816 udelay(REGISTER_BUSY_DELAY);
817 }
818
819 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
820 return -EACCES;
821
822continue_csr_init:
823 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
824 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
825 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
826 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
827 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
828 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
829 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
830 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
831 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
832 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
833 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
834 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
835 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
836 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
837 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
838 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
839 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
840 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
841 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
842 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
843 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
844 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
845 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
846 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
847 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
848 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
849 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
850 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
851 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
852 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
853 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
854
855 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
856 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
857 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
858
859 if (eeprom != 0xffff && eeprom != 0x0000) {
860 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
861 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
862 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
863 reg_id, value);
864 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
865 }
866 }
867 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
868
869 return 0;
870}
871
872/*
873 * Device state switch handlers.
874 */
875static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
876 enum dev_state state)
877{
878 u16 reg;
879
880 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
881 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
882 state == STATE_RADIO_RX_OFF);
883 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
884}
885
886static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
887{
888 /*
889 * Initialize all registers.
890 */
891 if (rt2500usb_init_registers(rt2x00dev) ||
892 rt2500usb_init_bbp(rt2x00dev)) {
893 ERROR(rt2x00dev, "Register initialization failed.\n");
894 return -EIO;
895 }
896
897 rt2x00usb_enable_radio(rt2x00dev);
898
899 /*
900 * Enable LED
901 */
902 rt2500usb_enable_led(rt2x00dev);
903
904 return 0;
905}
906
907static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
908{
909 /*
910 * Disable LED
911 */
912 rt2500usb_disable_led(rt2x00dev);
913
914 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
915 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
916
917 /*
918 * Disable synchronisation.
919 */
920 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
921
922 rt2x00usb_disable_radio(rt2x00dev);
923}
924
925static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
926 enum dev_state state)
927{
928 u16 reg;
929 u16 reg2;
930 unsigned int i;
931 char put_to_sleep;
932 char bbp_state;
933 char rf_state;
934
935 put_to_sleep = (state != STATE_AWAKE);
936
937 reg = 0;
938 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
939 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
940 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
941 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
942 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
943 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
944
945 /*
946 * Device is not guaranteed to be in the requested state yet.
947 * We must wait until the register indicates that the
948 * device has entered the correct state.
949 */
950 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
951 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
952 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
953 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
954 if (bbp_state == state && rf_state == state)
955 return 0;
956 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
957 msleep(30);
958 }
959
960 NOTICE(rt2x00dev, "Device failed to enter state %d, "
961 "current device state: bbp %d and rf %d.\n",
962 state, bbp_state, rf_state);
963
964 return -EBUSY;
965}
966
967static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
968 enum dev_state state)
969{
970 int retval = 0;
971
972 switch (state) {
973 case STATE_RADIO_ON:
974 retval = rt2500usb_enable_radio(rt2x00dev);
975 break;
976 case STATE_RADIO_OFF:
977 rt2500usb_disable_radio(rt2x00dev);
978 break;
979 case STATE_RADIO_RX_ON:
980 case STATE_RADIO_RX_OFF:
981 rt2500usb_toggle_rx(rt2x00dev, state);
982 break;
983 case STATE_DEEP_SLEEP:
984 case STATE_SLEEP:
985 case STATE_STANDBY:
986 case STATE_AWAKE:
987 retval = rt2500usb_set_state(rt2x00dev, state);
988 break;
989 default:
990 retval = -ENOTSUPP;
991 break;
992 }
993
994 return retval;
995}
996
997/*
998 * TX descriptor initialization
999 */
1000static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1001 struct data_desc *txd,
4150c572 1002 struct txdata_entry_desc *desc,
95ea3627
ID		 1003 struct ieee80211_hdr *ieee80211hdr,
1004 unsigned int length,
1005 struct ieee80211_tx_control *control)
1006{
1007 u32 word;
1008
1009 /*
1010 * Start writing the descriptor words.
1011 */
1012 rt2x00_desc_read(txd, 1, &word);
1013 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1014 rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
1015 rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1016 rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1017 rt2x00_desc_write(txd, 1, word);
1018
1019 rt2x00_desc_read(txd, 2, &word);
1020 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1021 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1022 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1023 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1024 rt2x00_desc_write(txd, 2, word);
1025
1026 rt2x00_desc_read(txd, 0, &word);
1027 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1028 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1029 test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1030 rt2x00_set_field32(&word, TXD_W0_ACK,
1031 !(control->flags & IEEE80211_TXCTL_NO_ACK));
1032 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1033 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1034 rt2x00_set_field32(&word, TXD_W0_OFDM,
1035 test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1036 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1037 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
1038 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1039 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1040 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1041 rt2x00_desc_write(txd, 0, word);
1042}
1043
dd9fa2d2 1044static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1045 struct sk_buff *skb)
dd9fa2d2
ID		 1046{
1047 int length;
1048
1049 /*
1050 * The length _must_ be a multiple of 2,
1051 * but it must _not_ be a multiple of the USB packet size.
1052 */
1053 length = roundup(skb->len, 2);
b242e891 1054 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID		 1055
1056 return length;
1057}
1058
95ea3627
ID		 1059/*
1060 * TX data initialization
1061 */
1062static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1063 unsigned int queue)
1064{
1065 u16 reg;
1066
1067 if (queue != IEEE80211_TX_QUEUE_BEACON)
1068 return;
1069
1070 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1071 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1072 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1073 /*
1074 * Beacon generation will fail initially.
1075 * To prevent this we need to register the TXRX_CSR19
1076 * register several times.
1077 */
1078 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1079 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1080 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1081 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1082 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1083 }
1084}
1085
1086/*
1087 * RX control handlers
1088 */
4150c572
JB		 1089static void rt2500usb_fill_rxdone(struct data_entry *entry,
1090 struct rxdata_entry_desc *desc)
95ea3627
ID		 1091{
1092 struct urb *urb = entry->priv;
1093 struct data_desc *rxd = (struct data_desc *)(entry->skb->data +
1094 (urb->actual_length -
1095 entry->ring->desc_size));
1096 u32 word0;
1097 u32 word1;
1098
1099 rt2x00_desc_read(rxd, 0, &word0);
1100 rt2x00_desc_read(rxd, 1, &word1);
1101
4150c572
JB		 1102 desc->flags = 0;
1103 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1104 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1105 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1106 desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1107
1108 /*
1109 * Obtain the status about this packet.
1110 */
4150c572
JB		 1111 desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1112 desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
95ea3627 1113 entry->ring->rt2x00dev->rssi_offset;
4150c572
JB		 1114 desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1115 desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
95ea3627 1116
4150c572 1117 return;
95ea3627
ID		 1118}
1119
1120/*
1121 * Interrupt functions.
1122 */
1123static void rt2500usb_beacondone(struct urb *urb)
1124{
1125 struct data_entry *entry = (struct data_entry *)urb->context;
1126 struct data_ring *ring = entry->ring;
1127
1128 if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
1129 return;
1130
1131 /*
1132 * Check if this was the guardian beacon,
1133 * if that was the case we need to send the real beacon now.
1134 * Otherwise we should free the sk_buffer, the device
1135 * should be doing the rest of the work now.
1136 */
1137 if (ring->index == 1) {
1138 rt2x00_ring_index_done_inc(ring);
1139 entry = rt2x00_get_data_entry(ring);
1140 usb_submit_urb(entry->priv, GFP_ATOMIC);
1141 rt2x00_ring_index_inc(ring);
1142 } else if (ring->index_done == 1) {
1143 entry = rt2x00_get_data_entry_done(ring);
1144 if (entry->skb) {
1145 dev_kfree_skb(entry->skb);
1146 entry->skb = NULL;
1147 }
1148 rt2x00_ring_index_done_inc(ring);
1149 }
1150}
1151
1152/*
1153 * Device probe functions.
1154 */
1155static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1156{
1157 u16 word;
1158 u8 *mac;
1159
1160 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1161
1162 /*
1163 * Start validation of the data that has been read.
1164 */
1165 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1166 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1167 DECLARE_MAC_BUF(macbuf);
1168
95ea3627 1169 random_ether_addr(mac);
0795af57 1170 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1171 }
1172
1173 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1174 if (word == 0xffff) {
1175 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1176 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1177 ANTENNA_SW_DIVERSITY);
1178 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1179 ANTENNA_SW_DIVERSITY);
1180 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1181 LED_MODE_DEFAULT);
95ea3627
ID		 1182 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1183 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1184 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1185 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1186 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1187 }
1188
1189 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1190 if (word == 0xffff) {
1191 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1192 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1193 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1194 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1195 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1196 }
1197
1198 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1199 if (word == 0xffff) {
1200 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1201 DEFAULT_RSSI_OFFSET);
1202 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1203 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1204 }
1205
1206 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1207 if (word == 0xffff) {
1208 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1209 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1210 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1211 }
1212
1213 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1214 if (word == 0xffff) {
1215 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1216 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1217 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1218 }
1219
1220 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1221 if (word == 0xffff) {
1222 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1223 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1224 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1225 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1226 }
1227
1228 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1229 if (word == 0xffff) {
1230 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1231 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1232 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1233 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1234 }
1235
1236 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1237 if (word == 0xffff) {
1238 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1239 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1240 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1241 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1242 }
1243
1244 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1245 if (word == 0xffff) {
1246 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1247 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1248 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1249 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1250 }
1251
1252 return 0;
1253}
1254
1255static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1256{
1257 u16 reg;
1258 u16 value;
1259 u16 eeprom;
1260
1261 /*
1262 * Read EEPROM word for configuration.
1263 */
1264 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1265
1266 /*
1267 * Identify RF chipset.
1268 */
1269 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1270 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1271 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1272
755a957d 1273 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1274 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1275 return -ENODEV;
1276 }
1277
1278 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1279 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1280 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1281 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1282 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1283 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1284 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1285 return -ENODEV;
1286 }
1287
1288 /*
1289 * Identify default antenna configuration.
1290 */
addc81bd 1291 rt2x00dev->default_ant.tx =
95ea3627 1292 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1293 rt2x00dev->default_ant.rx =
95ea3627
ID		 1294 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1295
addc81bd
ID		 1296 /*
1297 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1298 * I am not 100% sure about this, but the legacy drivers do not
1299 * indicate antenna swapping in software is required when
1300 * diversity is enabled.
1301 */
1302 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1303 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1304 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1305 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1306
95ea3627
ID		 1307 /*
1308 * Store led mode, for correct led behaviour.
1309 */
1310 rt2x00dev->led_mode =
1311 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1312
1313 /*
1314 * Check if the BBP tuning should be disabled.
1315 */
1316 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1317 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1318 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1319
1320 /*
1321 * Read the RSSI <-> dBm offset information.
1322 */
1323 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1324 rt2x00dev->rssi_offset =
1325 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1326
1327 return 0;
1328}
1329
1330/*
1331 * RF value list for RF2522
1332 * Supports: 2.4 GHz
1333 */
1334static const struct rf_channel rf_vals_bg_2522[] = {
1335 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1336 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1337 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1338 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1339 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1340 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1341 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1342 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1343 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1344 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1345 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1346 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1347 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1348 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1349};
1350
1351/*
1352 * RF value list for RF2523
1353 * Supports: 2.4 GHz
1354 */
1355static const struct rf_channel rf_vals_bg_2523[] = {
1356 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1357 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1358 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1359 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1360 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1361 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1362 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1363 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1364 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1365 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1366 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1367 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1368 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1369 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1370};
1371
1372/*
1373 * RF value list for RF2524
1374 * Supports: 2.4 GHz
1375 */
1376static const struct rf_channel rf_vals_bg_2524[] = {
1377 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1378 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1379 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1380 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1381 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1382 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1383 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1384 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1385 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1386 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1387 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1388 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1389 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1390 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1391};
1392
1393/*
1394 * RF value list for RF2525
1395 * Supports: 2.4 GHz
1396 */
1397static const struct rf_channel rf_vals_bg_2525[] = {
1398 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1399 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1400 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1401 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1402 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1403 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1404 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1405 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1406 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1407 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1408 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1409 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1410 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1411 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1412};
1413
1414/*
1415 * RF value list for RF2525e
1416 * Supports: 2.4 GHz
1417 */
1418static const struct rf_channel rf_vals_bg_2525e[] = {
1419 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1420 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1421 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1422 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1423 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1424 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1425 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1426 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1427 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1428 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1429 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1430 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1431 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1432 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1433};
1434
1435/*
1436 * RF value list for RF5222
1437 * Supports: 2.4 GHz & 5.2 GHz
1438 */
1439static const struct rf_channel rf_vals_5222[] = {
1440 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1441 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1442 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1443 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1444 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1445 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1446 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1447 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1448 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1449 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1450 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1451 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1452 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1453 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1454
1455 /* 802.11 UNI / HyperLan 2 */
1456 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1457 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1458 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1459 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1460 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1461 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1462 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1463 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1464
1465 /* 802.11 HyperLan 2 */
1466 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1467 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1468 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1469 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1470 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1471 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1472 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1473 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1474 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1475 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1476
1477 /* 802.11 UNII */
1478 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1479 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1480 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1481 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1482 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1483};
1484
1485static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1486{
1487 struct hw_mode_spec *spec = &rt2x00dev->spec;
1488 u8 *txpower;
1489 unsigned int i;
1490
1491 /*
1492 * Initialize all hw fields.
1493 */
1494 rt2x00dev->hw->flags =
1495 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1496 IEEE80211_HW_RX_INCLUDES_FCS |
4150c572 1497 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
95ea3627
ID		 1498 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1499 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1500 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1501 rt2x00dev->hw->queues = 2;
1502
1503 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1504 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1505 rt2x00_eeprom_addr(rt2x00dev,
1506 EEPROM_MAC_ADDR_0));
1507
1508 /*
1509 * Convert tx_power array in eeprom.
1510 */
1511 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1512 for (i = 0; i < 14; i++)
1513 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1514
1515 /*
1516 * Initialize hw_mode information.
1517 */
1518 spec->num_modes = 2;
1519 spec->num_rates = 12;
1520 spec->tx_power_a = NULL;
1521 spec->tx_power_bg = txpower;
1522 spec->tx_power_default = DEFAULT_TXPOWER;
1523
1524 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1525 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1526 spec->channels = rf_vals_bg_2522;
1527 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1528 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1529 spec->channels = rf_vals_bg_2523;
1530 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1531 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1532 spec->channels = rf_vals_bg_2524;
1533 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1534 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1535 spec->channels = rf_vals_bg_2525;
1536 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1537 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1538 spec->channels = rf_vals_bg_2525e;
1539 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1540 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1541 spec->channels = rf_vals_5222;
1542 spec->num_modes = 3;
1543 }
1544}
1545
1546static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1547{
1548 int retval;
1549
1550 /*
1551 * Allocate eeprom data.
1552 */
1553 retval = rt2500usb_validate_eeprom(rt2x00dev);
1554 if (retval)
1555 return retval;
1556
1557 retval = rt2500usb_init_eeprom(rt2x00dev);
1558 if (retval)
1559 return retval;
1560
1561 /*
1562 * Initialize hw specifications.
1563 */
1564 rt2500usb_probe_hw_mode(rt2x00dev);
1565
1566 /*
4150c572 1567 * This device requires the beacon ring
95ea3627 1568 */
066cb637 1569 __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
95ea3627
ID		 1570
1571 /*
1572 * Set the rssi offset.
1573 */
1574 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1575
1576 return 0;
1577}
1578
1579/*
1580 * IEEE80211 stack callback functions.
1581 */
4150c572
JB		 1582static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1583 unsigned int changed_flags,
1584 unsigned int *total_flags,
1585 int mc_count,
1586 struct dev_addr_list *mc_list)
1587{
1588 struct rt2x00_dev *rt2x00dev = hw->priv;
1589 struct interface *intf = &rt2x00dev->interface;
1590 u16 reg;
1591
1592 /*
1593 * Mask off any flags we are going to ignore from
1594 * the total_flags field.
1595 */
1596 *total_flags &=
1597 FIF_ALLMULTI |
1598 FIF_FCSFAIL |
1599 FIF_PLCPFAIL |
1600 FIF_CONTROL |
1601 FIF_OTHER_BSS |
1602 FIF_PROMISC_IN_BSS;
1603
1604 /*
1605 * Apply some rules to the filters:
1606 * - Some filters imply different filters to be set.
1607 * - Some things we can't filter out at all.
1608 * - Some filters are set based on interface type.
1609 */
1610 if (mc_count)
1611 *total_flags |= FIF_ALLMULTI;
5886d0db
ID		 1612 if (*total_flags & FIF_OTHER_BSS ||
1613 *total_flags & FIF_PROMISC_IN_BSS)
4150c572
JB		 1614 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1615 if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1616 *total_flags |= FIF_PROMISC_IN_BSS;
1617
1618 /*
1619 * Check if there is any work left for us.
1620 */
1621 if (intf->filter == *total_flags)
1622 return;
1623 intf->filter = *total_flags;
1624
1625 /*
1626 * When in atomic context, reschedule and let rt2x00lib
1627 * call this function again.
1628 */
1629 if (in_atomic()) {
1630 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1631 return;
1632 }
1633
1634 /*
1635 * Start configuration steps.
1636 * Note that the version error will always be dropped
1637 * and broadcast frames will always be accepted since
1638 * there is no filter for it at this time.
1639 */
1640 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1641 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1642 !(*total_flags & FIF_FCSFAIL));
1643 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1644 !(*total_flags & FIF_PLCPFAIL));
1645 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1646 !(*total_flags & FIF_CONTROL));
1647 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1648 !(*total_flags & FIF_PROMISC_IN_BSS));
1649 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1650 !(*total_flags & FIF_PROMISC_IN_BSS));
1651 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1652 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1653 !(*total_flags & FIF_ALLMULTI));
1654 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1655 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1656}
1657
95ea3627
ID		 1658static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1659 struct sk_buff *skb,
1660 struct ieee80211_tx_control *control)
1661{
1662 struct rt2x00_dev *rt2x00dev = hw->priv;
1663 struct usb_device *usb_dev =
1664 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
1665 struct data_ring *ring =
1666 rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1667 struct data_entry *beacon;
1668 struct data_entry *guardian;
dd9fa2d2 1669 int pipe = usb_sndbulkpipe(usb_dev, 1);
95ea3627
ID		 1670 int length;
1671
1672 /*
1673 * Just in case the ieee80211 doesn't set this,
1674 * but we need this queue set for the descriptor
1675 * initialization.
1676 */
1677 control->queue = IEEE80211_TX_QUEUE_BEACON;
1678
1679 /*
1680 * Obtain 2 entries, one for the guardian byte,
1681 * the second for the actual beacon.
1682 */
1683 guardian = rt2x00_get_data_entry(ring);
1684 rt2x00_ring_index_inc(ring);
1685 beacon = rt2x00_get_data_entry(ring);
1686
1687 /*
1688 * First we create the beacon.
1689 */
1690 skb_push(skb, ring->desc_size);
c22eb87b
ID		 1691 memset(skb->data, 0, ring->desc_size);
1692
95ea3627
ID		 1693 rt2x00lib_write_tx_desc(rt2x00dev, (struct data_desc *)skb->data,
1694 (struct ieee80211_hdr *)(skb->data +
1695 ring->desc_size),
1696 skb->len - ring->desc_size, control);
1697
b242e891 1698 length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
95ea3627 1699
dd9fa2d2 1700 usb_fill_bulk_urb(beacon->priv, usb_dev, pipe,
95ea3627
ID		 1701 skb->data, length, rt2500usb_beacondone, beacon);
1702
1703 beacon->skb = skb;
1704
1705 /*
1706 * Second we need to create the guardian byte.
1707 * We only need a single byte, so lets recycle
1708 * the 'flags' field we are not using for beacons.
1709 */
1710 guardian->flags = 0;
dd9fa2d2 1711 usb_fill_bulk_urb(guardian->priv, usb_dev, pipe,
95ea3627
ID		 1712 &guardian->flags, 1, rt2500usb_beacondone, guardian);
1713
1714 /*
1715 * Send out the guardian byte.
1716 */
1717 usb_submit_urb(guardian->priv, GFP_ATOMIC);
1718
1719 /*
1720 * Enable beacon generation.
1721 */
1722 rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1723
1724 return 0;
1725}
1726
1727static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1728 .tx = rt2x00mac_tx,
4150c572
JB		 1729 .start = rt2x00mac_start,
1730 .stop = rt2x00mac_stop,
95ea3627
ID		 1731 .add_interface = rt2x00mac_add_interface,
1732 .remove_interface = rt2x00mac_remove_interface,
1733 .config = rt2x00mac_config,
1734 .config_interface = rt2x00mac_config_interface,
4150c572 1735 .configure_filter = rt2500usb_configure_filter,
95ea3627 1736 .get_stats = rt2x00mac_get_stats,
5c58ee51 1737 .erp_ie_changed = rt2x00mac_erp_ie_changed,
95ea3627
ID		 1738 .conf_tx = rt2x00mac_conf_tx,
1739 .get_tx_stats = rt2x00mac_get_tx_stats,
1740 .beacon_update = rt2500usb_beacon_update,
1741};
1742
1743static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1744 .probe_hw = rt2500usb_probe_hw,
1745 .initialize = rt2x00usb_initialize,
1746 .uninitialize = rt2x00usb_uninitialize,
1747 .set_device_state = rt2500usb_set_device_state,
1748 .link_stats = rt2500usb_link_stats,
1749 .reset_tuner = rt2500usb_reset_tuner,
1750 .link_tuner = rt2500usb_link_tuner,
1751 .write_tx_desc = rt2500usb_write_tx_desc,
1752 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1753 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1754 .kick_tx_queue = rt2500usb_kick_tx_queue,
1755 .fill_rxdone = rt2500usb_fill_rxdone,
1756 .config_mac_addr = rt2500usb_config_mac_addr,
1757 .config_bssid = rt2500usb_config_bssid,
95ea3627 1758 .config_type = rt2500usb_config_type,
5c58ee51 1759 .config_preamble = rt2500usb_config_preamble,
95ea3627
ID		 1760 .config = rt2500usb_config,
1761};
1762
1763static const struct rt2x00_ops rt2500usb_ops = {
1764 .name = DRV_NAME,
1765 .rxd_size = RXD_DESC_SIZE,
1766 .txd_size = TXD_DESC_SIZE,
1767 .eeprom_size = EEPROM_SIZE,
1768 .rf_size = RF_SIZE,
1769 .lib = &rt2500usb_rt2x00_ops,
1770 .hw = &rt2500usb_mac80211_ops,
1771#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1772 .debugfs = &rt2500usb_rt2x00debug,
1773#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1774};
1775
1776/*
1777 * rt2500usb module information.
1778 */
1779static struct usb_device_id rt2500usb_device_table[] = {
1780 /* ASUS */
1781 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1782 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1783 /* Belkin */
1784 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1785 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1786 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1787 /* Cisco Systems */
1788 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1789 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1790 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1791 /* Conceptronic */
1792 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1793 /* D-LINK */
1794 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1795 /* Gigabyte */
1796 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1797 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1798 /* Hercules */
1799 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1800 /* Melco */
1801 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1802 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1803 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1804 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1805
1806 /* MSI */
1807 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1808 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1809 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1810 /* Ralink */
1811 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1812 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1813 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1814 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1815 /* Siemens */
1816 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1817 /* SMC */
1818 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1819 /* Spairon */
1820 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1821 /* Trust */
1822 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1823 /* Zinwell */
1824 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1825 { 0, }
1826};
1827
1828MODULE_AUTHOR(DRV_PROJECT);
1829MODULE_VERSION(DRV_VERSION);
1830MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1831MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1832MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1833MODULE_LICENSE("GPL");
1834
1835static struct usb_driver rt2500usb_driver = {
1836 .name = DRV_NAME,
1837 .id_table = rt2500usb_device_table,
1838 .probe = rt2x00usb_probe,
1839 .disconnect = rt2x00usb_disconnect,
1840 .suspend = rt2x00usb_suspend,
1841 .resume = rt2x00usb_resume,
1842};
1843
1844static int __init rt2500usb_init(void)
1845{
1846 return usb_register(&rt2500usb_driver);
1847}
1848
1849static void __exit rt2500usb_exit(void)
1850{
1851 usb_deregister(&rt2500usb_driver);
1852}
1853
1854module_init(rt2500usb_init);
1855module_exit(rt2500usb_exit);
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