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rt2x00: Determine MY_BSS from descriptor
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627
ID		 1/*
2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
38/*
39 * Register access.
40 * All access to the CSR registers will go through the methods
41 * rt2500usb_register_read and rt2500usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
3d82346c
AB		 50 * If the usb_cache_mutex is already held then the _lock variants must
51 * be used instead.
95ea3627 52 */
0e14f6d3 53static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 54 const unsigned int offset,
55 u16 *value)
56{
57 __le16 reg;
58 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
59 USB_VENDOR_REQUEST_IN, offset,
60 &reg, sizeof(u16), REGISTER_TIMEOUT);
61 *value = le16_to_cpu(reg);
62}
63
3d82346c
AB		 64static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
65 const unsigned int offset,
66 u16 *value)
67{
68 __le16 reg;
69 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
70 USB_VENDOR_REQUEST_IN, offset,
71 &reg, sizeof(u16), REGISTER_TIMEOUT);
72 *value = le16_to_cpu(reg);
73}
74
0e14f6d3 75static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 76 const unsigned int offset,
77 void *value, const u16 length)
78{
79 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
80 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
81 USB_VENDOR_REQUEST_IN, offset,
82 value, length, timeout);
83}
84
0e14f6d3 85static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 86 const unsigned int offset,
87 u16 value)
88{
89 __le16 reg = cpu_to_le16(value);
90 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
91 USB_VENDOR_REQUEST_OUT, offset,
92 &reg, sizeof(u16), REGISTER_TIMEOUT);
93}
94
3d82346c
AB		 95static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
96 const unsigned int offset,
97 u16 value)
98{
99 __le16 reg = cpu_to_le16(value);
100 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
101 USB_VENDOR_REQUEST_OUT, offset,
102 &reg, sizeof(u16), REGISTER_TIMEOUT);
103}
104
0e14f6d3 105static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 106 const unsigned int offset,
107 void *value, const u16 length)
108{
109 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
110 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
111 USB_VENDOR_REQUEST_OUT, offset,
112 value, length, timeout);
113}
114
0e14f6d3 115static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 116{
117 u16 reg;
118 unsigned int i;
119
120 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 121 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
95ea3627
ID		 122 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
123 break;
124 udelay(REGISTER_BUSY_DELAY);
125 }
126
127 return reg;
128}
129
0e14f6d3 130static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 131 const unsigned int word, const u8 value)
132{
133 u16 reg;
134
3d82346c
AB		 135 mutex_lock(&rt2x00dev->usb_cache_mutex);
136
95ea3627
ID		 137 /*
138 * Wait until the BBP becomes ready.
139 */
140 reg = rt2500usb_bbp_check(rt2x00dev);
141 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
142 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
3d82346c 143 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 144 return;
145 }
146
147 /*
148 * Write the data into the BBP.
149 */
150 reg = 0;
151 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
152 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
153 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
154
3d82346c
AB		 155 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
156
157 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 158}
159
0e14f6d3 160static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 161 const unsigned int word, u8 *value)
162{
163 u16 reg;
164
3d82346c
AB		 165 mutex_lock(&rt2x00dev->usb_cache_mutex);
166
95ea3627
ID		 167 /*
168 * Wait until the BBP becomes ready.
169 */
170 reg = rt2500usb_bbp_check(rt2x00dev);
171 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
172 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
173 return;
174 }
175
176 /*
177 * Write the request into the BBP.
178 */
179 reg = 0;
180 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
181 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
182
3d82346c 183 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627
ID		 184
185 /*
186 * Wait until the BBP becomes ready.
187 */
188 reg = rt2500usb_bbp_check(rt2x00dev);
189 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
190 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
191 *value = 0xff;
3d82346c 192 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 193 return;
194 }
195
3d82346c 196 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c
AB		 198
199 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
206 unsigned int i;
207
208 if (!word)
209 return;
210
3d82346c
AB		 211 mutex_lock(&rt2x00dev->usb_cache_mutex);
212
95ea3627 213 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 214 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
95ea3627
ID		 215 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
216 goto rf_write;
217 udelay(REGISTER_BUSY_DELAY);
218 }
219
3d82346c 220 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 221 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
222 return;
223
224rf_write:
225 reg = 0;
226 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
3d82346c 227 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
95ea3627
ID		 228
229 reg = 0;
230 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
231 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
232 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
233 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
234
3d82346c 235 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
95ea3627 236 rt2x00_rf_write(rt2x00dev, word, value);
3d82346c
AB		 237
238 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 239}
240
241#ifdef CONFIG_RT2X00_LIB_DEBUGFS
242#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
243
0e14f6d3 244static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 245 const unsigned int word, u32 *data)
246{
247 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
248}
249
0e14f6d3 250static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 251 const unsigned int word, u32 data)
252{
253 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
254}
255
256static const struct rt2x00debug rt2500usb_rt2x00debug = {
257 .owner = THIS_MODULE,
258 .csr = {
259 .read = rt2500usb_read_csr,
260 .write = rt2500usb_write_csr,
261 .word_size = sizeof(u16),
262 .word_count = CSR_REG_SIZE / sizeof(u16),
263 },
264 .eeprom = {
265 .read = rt2x00_eeprom_read,
266 .write = rt2x00_eeprom_write,
267 .word_size = sizeof(u16),
268 .word_count = EEPROM_SIZE / sizeof(u16),
269 },
270 .bbp = {
271 .read = rt2500usb_bbp_read,
272 .write = rt2500usb_bbp_write,
273 .word_size = sizeof(u8),
274 .word_count = BBP_SIZE / sizeof(u8),
275 },
276 .rf = {
277 .read = rt2x00_rf_read,
278 .write = rt2500usb_rf_write,
279 .word_size = sizeof(u32),
280 .word_count = RF_SIZE / sizeof(u32),
281 },
282};
283#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
284
285/*
286 * Configuration handlers.
287 */
4abee4bb
ID		 288static void rt2500usb_config_mac_addr(struct rt2x00_dev *rt2x00dev,
289 __le32 *mac)
95ea3627 290{
dd87145d 291 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
4abee4bb 292 (3 * sizeof(__le16)));
95ea3627
ID		 293}
294
4abee4bb
ID		 295static void rt2500usb_config_bssid(struct rt2x00_dev *rt2x00dev,
296 __le32 *bssid)
95ea3627 297{
4abee4bb
ID		 298 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, bssid,
299 (3 * sizeof(__le16)));
95ea3627
ID		 300}
301
feb24691
ID		 302static void rt2500usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
303 const int tsf_sync)
95ea3627
ID		 304{
305 u16 reg;
306
307 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
308
95ea3627
ID		 309 /*
310 * Enable beacon config
311 */
312 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
313 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET,
a137e202 314 (PREAMBLE + get_duration(IEEE80211_HEADER, 20)) >> 6);
feb24691 315 if (type == IEEE80211_IF_TYPE_STA)
95ea3627
ID		 316 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 0);
317 else
318 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW, 2);
319 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
320
321 /*
322 * Enable synchronisation.
323 */
324 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
325 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
326 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
327
328 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
4150c572 329 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
3867705b
ID		 330 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN,
331 (tsf_sync == TSF_SYNC_BEACON));
95ea3627 332 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
feb24691 333 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, tsf_sync);
95ea3627
ID		 334 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
335}
336
5c58ee51
ID		 337static void rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
338 const int short_preamble,
339 const int ack_timeout,
340 const int ack_consume_time)
95ea3627 341{
95ea3627 342 u16 reg;
95ea3627 343
5c58ee51
ID		 344 /*
345 * When in atomic context, reschedule and let rt2x00lib
346 * call this function again.
347 */
348 if (in_atomic()) {
349 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
350 return;
351 }
95ea3627
ID		 352
353 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
5c58ee51 354 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
95ea3627
ID		 355 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
356
357 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 358 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
5c58ee51 359 !!short_preamble);
95ea3627
ID		 360 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
361}
362
363static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51
ID		 364 const int phymode,
365 const int basic_rate_mask)
95ea3627 366{
5c58ee51 367 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627 368
5c58ee51 369 if (phymode == HWMODE_B) {
95ea3627
ID		 370 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x000b);
371 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x0040);
372 } else {
373 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0005);
374 rt2500usb_register_write(rt2x00dev, MAC_CSR12, 0x016c);
375 }
376}
377
378static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 379 struct rf_channel *rf, const int txpower)
95ea3627 380{
95ea3627
ID		 381 /*
382 * Set TXpower.
383 */
5c58ee51 384 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID		 385
386 /*
387 * For RT2525E we should first set the channel to half band higher.
388 */
389 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
390 static const u32 vals[] = {
391 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
392 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
393 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
394 0x00000902, 0x00000906
395 };
396
5c58ee51
ID		 397 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
398 if (rf->rf4)
399 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 400 }
401
5c58ee51
ID		 402 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
403 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
404 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
405 if (rf->rf4)
406 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 407}
408
409static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
410 const int txpower)
411{
412 u32 rf3;
413
414 rt2x00_rf_read(rt2x00dev, 3, &rf3);
415 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
416 rt2500usb_rf_write(rt2x00dev, 3, rf3);
417}
418
419static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 420 struct antenna_setup *ant)
95ea3627
ID		 421{
422 u8 r2;
423 u8 r14;
424 u16 csr5;
425 u16 csr6;
426
427 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
428 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
429 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
430 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
431
432 /*
433 * Configure the TX antenna.
434 */
addc81bd 435 switch (ant->tx) {
95ea3627
ID		 436 case ANTENNA_HW_DIVERSITY:
437 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
438 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
439 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
440 break;
441 case ANTENNA_A:
442 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
443 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
444 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
445 break;
39e75857
ID		 446 case ANTENNA_SW_DIVERSITY:
447 /*
448 * NOTE: We should never come here because rt2x00lib is
449 * supposed to catch this and send us the correct antenna
450 * explicitely. However we are nog going to bug about this.
451 * Instead, just default to antenna B.
452 */
95ea3627
ID		 453 case ANTENNA_B:
454 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
455 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
456 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
457 break;
458 }
459
460 /*
461 * Configure the RX antenna.
462 */
addc81bd 463 switch (ant->rx) {
95ea3627
ID		 464 case ANTENNA_HW_DIVERSITY:
465 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
466 break;
467 case ANTENNA_A:
468 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
469 break;
39e75857
ID		 470 case ANTENNA_SW_DIVERSITY:
471 /*
472 * NOTE: We should never come here because rt2x00lib is
473 * supposed to catch this and send us the correct antenna
474 * explicitely. However we are nog going to bug about this.
475 * Instead, just default to antenna B.
476 */
95ea3627
ID		 477 case ANTENNA_B:
478 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
479 break;
480 }
481
482 /*
483 * RT2525E and RT5222 need to flip TX I/Q
484 */
485 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
486 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
487 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
488 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
489 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
490
491 /*
492 * RT2525E does not need RX I/Q Flip.
493 */
494 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
495 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
496 } else {
497 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
498 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
499 }
500
501 rt2500usb_bbp_write(rt2x00dev, 2, r2);
502 rt2500usb_bbp_write(rt2x00dev, 14, r14);
503 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
504 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
505}
506
507static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 508 struct rt2x00lib_conf *libconf)
95ea3627
ID		 509{
510 u16 reg;
511
5c58ee51 512 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
95ea3627
ID		 513
514 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 515 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
516 libconf->conf->beacon_int * 4);
95ea3627
ID		 517 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
518}
519
520static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
521 const unsigned int flags,
5c58ee51 522 struct rt2x00lib_conf *libconf)
95ea3627 523{
95ea3627 524 if (flags & CONFIG_UPDATE_PHYMODE)
5c58ee51
ID		 525 rt2500usb_config_phymode(rt2x00dev, libconf->phymode,
526 libconf->basic_rates);
95ea3627 527 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID		 528 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
529 libconf->conf->power_level);
95ea3627 530 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID		 531 rt2500usb_config_txpower(rt2x00dev,
532 libconf->conf->power_level);
95ea3627 533 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 534 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 535 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 536 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 537}
538
539/*
540 * LED functions.
541 */
542static void rt2500usb_enable_led(struct rt2x00_dev *rt2x00dev)
543{
544 u16 reg;
545
546 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
547 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
548 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
549 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
550
551 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
ddc827f9
ID		 552 rt2x00_set_field16(&reg, MAC_CSR20_LINK,
553 (rt2x00dev->led_mode != LED_MODE_ASUS));
554 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY,
555 (rt2x00dev->led_mode != LED_MODE_TXRX_ACTIVITY));
95ea3627
ID		 556 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
557}
558
559static void rt2500usb_disable_led(struct rt2x00_dev *rt2x00dev)
560{
561 u16 reg;
562
563 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &reg);
564 rt2x00_set_field16(&reg, MAC_CSR20_LINK, 0);
565 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, 0);
566 rt2500usb_register_write(rt2x00dev, MAC_CSR20, reg);
567}
568
569/*
570 * Link tuning
571 */
ebcf26da
ID		 572static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
573 struct link_qual *qual)
95ea3627
ID		 574{
575 u16 reg;
576
577 /*
578 * Update FCS error count from register.
579 */
580 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 581 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 582
583 /*
584 * Update False CCA count from register.
585 */
586 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 587 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 588}
589
590static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
591{
592 u16 eeprom;
593 u16 value;
594
595 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
596 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
597 rt2500usb_bbp_write(rt2x00dev, 24, value);
598
599 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
600 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
601 rt2500usb_bbp_write(rt2x00dev, 25, value);
602
603 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
604 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
605 rt2500usb_bbp_write(rt2x00dev, 61, value);
606
607 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
608 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
609 rt2500usb_bbp_write(rt2x00dev, 17, value);
610
611 rt2x00dev->link.vgc_level = value;
612}
613
614static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
615{
616 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
617 u16 bbp_thresh;
618 u16 vgc_bound;
619 u16 sens;
620 u16 r24;
621 u16 r25;
622 u16 r61;
623 u16 r17_sens;
624 u8 r17;
625 u8 up_bound;
626 u8 low_bound;
627
628 /*
629 * Determine the BBP tuning threshold and correctly
630 * set BBP 24, 25 and 61.
631 */
632 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
633 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
634
635 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
636 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
637 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
638
639 if ((rssi + bbp_thresh) > 0) {
640 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
641 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
642 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
643 } else {
644 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
645 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
646 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
647 }
648
649 rt2500usb_bbp_write(rt2x00dev, 24, r24);
650 rt2500usb_bbp_write(rt2x00dev, 25, r25);
651 rt2500usb_bbp_write(rt2x00dev, 61, r61);
652
653 /*
654 * Read current r17 value, as well as the sensitivity values
655 * for the r17 register.
656 */
657 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
658 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
659
660 /*
661 * A too low RSSI will cause too much false CCA which will
662 * then corrupt the R17 tuning. To remidy this the tuning should
663 * be stopped (While making sure the R17 value will not exceed limits)
664 */
665 if (rssi >= -40) {
666 if (r17 != 0x60)
667 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
668 return;
669 }
670
671 /*
672 * Special big-R17 for short distance
673 */
674 if (rssi >= -58) {
675 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
676 if (r17 != sens)
677 rt2500usb_bbp_write(rt2x00dev, 17, sens);
678 return;
679 }
680
681 /*
682 * Special mid-R17 for middle distance
683 */
684 if (rssi >= -74) {
685 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
686 if (r17 != sens)
687 rt2500usb_bbp_write(rt2x00dev, 17, sens);
688 return;
689 }
690
691 /*
692 * Leave short or middle distance condition, restore r17
693 * to the dynamic tuning range.
694 */
695 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
696 vgc_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
697
698 low_bound = 0x32;
699 if (rssi >= -77)
700 up_bound = vgc_bound;
701 else
702 up_bound = vgc_bound - (-77 - rssi);
703
704 if (up_bound < low_bound)
705 up_bound = low_bound;
706
707 if (r17 > up_bound) {
708 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
709 rt2x00dev->link.vgc_level = up_bound;
ebcf26da 710 } else if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 711 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
712 rt2x00dev->link.vgc_level = r17;
ebcf26da 713 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 714 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
715 rt2x00dev->link.vgc_level = r17;
716 }
717}
718
719/*
720 * Initialization functions.
721 */
722static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
723{
724 u16 reg;
725
726 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
727 USB_MODE_TEST, REGISTER_TIMEOUT);
728 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
729 0x00f0, REGISTER_TIMEOUT);
730
731 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
732 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
733 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
734
735 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
736 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
737
738 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
739 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
740 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
741 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
742 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
743
744 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
745 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
746 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
747 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
748 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
749
750 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
751 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
752 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
753 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
754 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
755 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
756
757 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
758 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
759 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
760 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
761 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
762 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
763
764 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
765 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
766 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
767 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
768 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
769 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
770
771 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
772 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
773 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
774 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
775 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
776 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
777
778 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
779 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
780
781 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
782 return -EBUSY;
783
784 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
785 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
786 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
787 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
788 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
789
755a957d 790 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 791 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 792 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 793 } else {
ddc827f9
ID		 794 reg = 0;
795 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
796 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 797 }
798 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
799
800 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
801 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
802 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
803 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
804
805 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
806 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
807 rt2x00dev->rx->data_size);
808 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
809
810 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
811 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
812 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
813 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
814
815 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
816 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
817 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
818
819 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
820 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
821 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
822
823 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
824 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
825 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
826
827 return 0;
828}
829
830static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
831{
832 unsigned int i;
833 u16 eeprom;
834 u8 value;
835 u8 reg_id;
836
837 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
838 rt2500usb_bbp_read(rt2x00dev, 0, &value);
839 if ((value != 0xff) && (value != 0x00))
840 goto continue_csr_init;
841 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
842 udelay(REGISTER_BUSY_DELAY);
843 }
844
845 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
846 return -EACCES;
847
848continue_csr_init:
849 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
850 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
851 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
852 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
853 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
854 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
855 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
856 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
857 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
858 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
859 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
860 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
861 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
862 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
863 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
864 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
865 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
866 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
867 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
868 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
869 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
870 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
871 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
872 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
873 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
874 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
875 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
876 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
877 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
878 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
879 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
880
881 DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
882 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
883 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
884
885 if (eeprom != 0xffff && eeprom != 0x0000) {
886 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
887 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
888 DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
889 reg_id, value);
890 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
891 }
892 }
893 DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
894
895 return 0;
896}
897
898/*
899 * Device state switch handlers.
900 */
901static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
902 enum dev_state state)
903{
904 u16 reg;
905
906 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
907 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
908 state == STATE_RADIO_RX_OFF);
909 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
910}
911
912static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
913{
914 /*
915 * Initialize all registers.
916 */
917 if (rt2500usb_init_registers(rt2x00dev) ||
918 rt2500usb_init_bbp(rt2x00dev)) {
919 ERROR(rt2x00dev, "Register initialization failed.\n");
920 return -EIO;
921 }
922
923 rt2x00usb_enable_radio(rt2x00dev);
924
925 /*
926 * Enable LED
927 */
928 rt2500usb_enable_led(rt2x00dev);
929
930 return 0;
931}
932
933static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
934{
935 /*
936 * Disable LED
937 */
938 rt2500usb_disable_led(rt2x00dev);
939
940 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
941 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
942
943 /*
944 * Disable synchronisation.
945 */
946 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
947
948 rt2x00usb_disable_radio(rt2x00dev);
949}
950
951static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
952 enum dev_state state)
953{
954 u16 reg;
955 u16 reg2;
956 unsigned int i;
957 char put_to_sleep;
958 char bbp_state;
959 char rf_state;
960
961 put_to_sleep = (state != STATE_AWAKE);
962
963 reg = 0;
964 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
965 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
966 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
967 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
968 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
969 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
970
971 /*
972 * Device is not guaranteed to be in the requested state yet.
973 * We must wait until the register indicates that the
974 * device has entered the correct state.
975 */
976 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
977 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
978 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
979 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
980 if (bbp_state == state && rf_state == state)
981 return 0;
982 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
983 msleep(30);
984 }
985
986 NOTICE(rt2x00dev, "Device failed to enter state %d, "
987 "current device state: bbp %d and rf %d.\n",
988 state, bbp_state, rf_state);
989
990 return -EBUSY;
991}
992
993static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
994 enum dev_state state)
995{
996 int retval = 0;
997
998 switch (state) {
999 case STATE_RADIO_ON:
1000 retval = rt2500usb_enable_radio(rt2x00dev);
1001 break;
1002 case STATE_RADIO_OFF:
1003 rt2500usb_disable_radio(rt2x00dev);
1004 break;
1005 case STATE_RADIO_RX_ON:
1006 case STATE_RADIO_RX_OFF:
1007 rt2500usb_toggle_rx(rt2x00dev, state);
1008 break;
1009 case STATE_DEEP_SLEEP:
1010 case STATE_SLEEP:
1011 case STATE_STANDBY:
1012 case STATE_AWAKE:
1013 retval = rt2500usb_set_state(rt2x00dev, state);
1014 break;
1015 default:
1016 retval = -ENOTSUPP;
1017 break;
1018 }
1019
1020 return retval;
1021}
1022
1023/*
1024 * TX descriptor initialization
1025 */
1026static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1027 struct sk_buff *skb,
4150c572 1028 struct txdata_entry_desc *desc,
95ea3627
ID		 1029 struct ieee80211_tx_control *control)
1030{
dd3193e1
ID		 1031 struct skb_desc *skbdesc = get_skb_desc(skb);
1032 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1033 u32 word;
1034
1035 /*
1036 * Start writing the descriptor words.
1037 */
1038 rt2x00_desc_read(txd, 1, &word);
1039 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1040 rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs);
1041 rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1042 rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1043 rt2x00_desc_write(txd, 1, word);
1044
1045 rt2x00_desc_read(txd, 2, &word);
1046 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1047 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1048 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1049 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1050 rt2x00_desc_write(txd, 2, word);
1051
1052 rt2x00_desc_read(txd, 0, &word);
1053 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1054 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1055 test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1056 rt2x00_set_field32(&word, TXD_W0_ACK,
2700f8b0 1057 test_bit(ENTRY_TXD_ACK, &desc->flags));
95ea3627
ID		 1058 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1059 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1060 rt2x00_set_field32(&word, TXD_W0_OFDM,
1061 test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1062 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1063 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
1064 rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
dd3193e1 1065 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
95ea3627
ID		 1066 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1067 rt2x00_desc_write(txd, 0, word);
1068}
1069
dd9fa2d2 1070static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1071 struct sk_buff *skb)
dd9fa2d2
ID		 1072{
1073 int length;
1074
1075 /*
1076 * The length _must_ be a multiple of 2,
1077 * but it must _not_ be a multiple of the USB packet size.
1078 */
1079 length = roundup(skb->len, 2);
b242e891 1080 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID		 1081
1082 return length;
1083}
1084
95ea3627
ID		 1085/*
1086 * TX data initialization
1087 */
1088static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1089 unsigned int queue)
1090{
1091 u16 reg;
1092
1093 if (queue != IEEE80211_TX_QUEUE_BEACON)
1094 return;
1095
1096 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1097 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
1098 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1099 /*
1100 * Beacon generation will fail initially.
1101 * To prevent this we need to register the TXRX_CSR19
1102 * register several times.
1103 */
1104 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1105 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1106 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1107 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1108 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1109 }
1110}
1111
1112/*
1113 * RX control handlers
1114 */
4150c572
JB		 1115static void rt2500usb_fill_rxdone(struct data_entry *entry,
1116 struct rxdata_entry_desc *desc)
95ea3627
ID		 1117{
1118 struct urb *urb = entry->priv;
4bd7c452
ID		 1119 __le32 *rxd = (__le32 *)(entry->skb->data +
1120 (urb->actual_length - entry->ring->desc_size));
95ea3627
ID		 1121 u32 word0;
1122 u32 word1;
1123
1124 rt2x00_desc_read(rxd, 0, &word0);
1125 rt2x00_desc_read(rxd, 1, &word1);
1126
4150c572
JB		 1127 desc->flags = 0;
1128 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1129 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1130 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
1131 desc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1132
1133 /*
1134 * Obtain the status about this packet.
1135 */
4150c572
JB		 1136 desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1137 desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
95ea3627 1138 entry->ring->rt2x00dev->rssi_offset;
4150c572
JB		 1139 desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1140 desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
7e56d38d 1141 desc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS);
95ea3627
ID		 1142}
1143
1144/*
1145 * Interrupt functions.
1146 */
1147static void rt2500usb_beacondone(struct urb *urb)
1148{
1149 struct data_entry *entry = (struct data_entry *)urb->context;
1150 struct data_ring *ring = entry->ring;
1151
1152 if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags))
1153 return;
1154
1155 /*
1156 * Check if this was the guardian beacon,
1157 * if that was the case we need to send the real beacon now.
1158 * Otherwise we should free the sk_buffer, the device
1159 * should be doing the rest of the work now.
1160 */
1161 if (ring->index == 1) {
1162 rt2x00_ring_index_done_inc(ring);
1163 entry = rt2x00_get_data_entry(ring);
1164 usb_submit_urb(entry->priv, GFP_ATOMIC);
1165 rt2x00_ring_index_inc(ring);
1166 } else if (ring->index_done == 1) {
1167 entry = rt2x00_get_data_entry_done(ring);
1168 if (entry->skb) {
1169 dev_kfree_skb(entry->skb);
1170 entry->skb = NULL;
1171 }
1172 rt2x00_ring_index_done_inc(ring);
1173 }
1174}
1175
1176/*
1177 * Device probe functions.
1178 */
1179static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1180{
1181 u16 word;
1182 u8 *mac;
1183
1184 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1185
1186 /*
1187 * Start validation of the data that has been read.
1188 */
1189 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1190 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1191 DECLARE_MAC_BUF(macbuf);
1192
95ea3627 1193 random_ether_addr(mac);
0795af57 1194 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1195 }
1196
1197 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1198 if (word == 0xffff) {
1199 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1200 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1201 ANTENNA_SW_DIVERSITY);
1202 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1203 ANTENNA_SW_DIVERSITY);
1204 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1205 LED_MODE_DEFAULT);
95ea3627
ID		 1206 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1207 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1208 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1209 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1210 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1211 }
1212
1213 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1214 if (word == 0xffff) {
1215 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1216 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1217 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1218 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1219 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1220 }
1221
1222 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1223 if (word == 0xffff) {
1224 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1225 DEFAULT_RSSI_OFFSET);
1226 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1227 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1228 }
1229
1230 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1231 if (word == 0xffff) {
1232 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1233 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1234 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1235 }
1236
1237 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1238 if (word == 0xffff) {
1239 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
1240 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1241 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1242 }
1243
1244 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1245 if (word == 0xffff) {
1246 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1247 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1248 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1249 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1250 }
1251
1252 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1253 if (word == 0xffff) {
1254 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1255 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1256 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1257 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1258 }
1259
1260 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1261 if (word == 0xffff) {
1262 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1263 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1264 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1265 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1266 }
1267
1268 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1269 if (word == 0xffff) {
1270 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1271 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1272 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1273 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1274 }
1275
1276 return 0;
1277}
1278
1279static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1280{
1281 u16 reg;
1282 u16 value;
1283 u16 eeprom;
1284
1285 /*
1286 * Read EEPROM word for configuration.
1287 */
1288 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1289
1290 /*
1291 * Identify RF chipset.
1292 */
1293 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1294 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1295 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1296
755a957d 1297 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1298 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1299 return -ENODEV;
1300 }
1301
1302 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1303 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1304 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1305 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1306 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1307 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1308 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1309 return -ENODEV;
1310 }
1311
1312 /*
1313 * Identify default antenna configuration.
1314 */
addc81bd 1315 rt2x00dev->default_ant.tx =
95ea3627 1316 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1317 rt2x00dev->default_ant.rx =
95ea3627
ID		 1318 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1319
addc81bd
ID		 1320 /*
1321 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1322 * I am not 100% sure about this, but the legacy drivers do not
1323 * indicate antenna swapping in software is required when
1324 * diversity is enabled.
1325 */
1326 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1327 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1328 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1329 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1330
95ea3627
ID		 1331 /*
1332 * Store led mode, for correct led behaviour.
1333 */
1334 rt2x00dev->led_mode =
1335 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1336
1337 /*
1338 * Check if the BBP tuning should be disabled.
1339 */
1340 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1341 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1342 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1343
1344 /*
1345 * Read the RSSI <-> dBm offset information.
1346 */
1347 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1348 rt2x00dev->rssi_offset =
1349 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1350
1351 return 0;
1352}
1353
1354/*
1355 * RF value list for RF2522
1356 * Supports: 2.4 GHz
1357 */
1358static const struct rf_channel rf_vals_bg_2522[] = {
1359 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1360 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1361 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1362 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1363 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1364 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1365 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1366 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1367 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1368 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1369 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1370 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1371 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1372 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1373};
1374
1375/*
1376 * RF value list for RF2523
1377 * Supports: 2.4 GHz
1378 */
1379static const struct rf_channel rf_vals_bg_2523[] = {
1380 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1381 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1382 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1383 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1384 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1385 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1386 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1387 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1388 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1389 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1390 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1391 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1392 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1393 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1394};
1395
1396/*
1397 * RF value list for RF2524
1398 * Supports: 2.4 GHz
1399 */
1400static const struct rf_channel rf_vals_bg_2524[] = {
1401 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1402 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1403 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1404 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1405 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1406 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1407 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1408 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1409 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1410 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1411 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1412 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1413 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1414 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1415};
1416
1417/*
1418 * RF value list for RF2525
1419 * Supports: 2.4 GHz
1420 */
1421static const struct rf_channel rf_vals_bg_2525[] = {
1422 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1423 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1424 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1425 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1426 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1427 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1428 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1429 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1430 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1431 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1432 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1433 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1434 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1435 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1436};
1437
1438/*
1439 * RF value list for RF2525e
1440 * Supports: 2.4 GHz
1441 */
1442static const struct rf_channel rf_vals_bg_2525e[] = {
1443 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1444 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1445 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1446 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1447 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1448 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1449 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1450 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1451 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1452 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1453 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1454 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1455 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1456 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1457};
1458
1459/*
1460 * RF value list for RF5222
1461 * Supports: 2.4 GHz & 5.2 GHz
1462 */
1463static const struct rf_channel rf_vals_5222[] = {
1464 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1465 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1466 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1467 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1468 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1469 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1470 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1471 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1472 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1473 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1474 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1475 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1476 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1477 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1478
1479 /* 802.11 UNI / HyperLan 2 */
1480 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1481 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1482 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1483 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1484 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1485 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1486 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1487 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1488
1489 /* 802.11 HyperLan 2 */
1490 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1491 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1492 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1493 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1494 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1495 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1496 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1497 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1498 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1499 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1500
1501 /* 802.11 UNII */
1502 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1503 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1504 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1505 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1506 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1507};
1508
1509static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1510{
1511 struct hw_mode_spec *spec = &rt2x00dev->spec;
1512 u8 *txpower;
1513 unsigned int i;
1514
1515 /*
1516 * Initialize all hw fields.
1517 */
1518 rt2x00dev->hw->flags =
1519 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1520 IEEE80211_HW_RX_INCLUDES_FCS |
4150c572 1521 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
95ea3627
ID		 1522 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1523 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1524 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1525 rt2x00dev->hw->queues = 2;
1526
1527 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1528 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1529 rt2x00_eeprom_addr(rt2x00dev,
1530 EEPROM_MAC_ADDR_0));
1531
1532 /*
1533 * Convert tx_power array in eeprom.
1534 */
1535 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1536 for (i = 0; i < 14; i++)
1537 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1538
1539 /*
1540 * Initialize hw_mode information.
1541 */
1542 spec->num_modes = 2;
1543 spec->num_rates = 12;
1544 spec->tx_power_a = NULL;
1545 spec->tx_power_bg = txpower;
1546 spec->tx_power_default = DEFAULT_TXPOWER;
1547
1548 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1549 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1550 spec->channels = rf_vals_bg_2522;
1551 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1552 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1553 spec->channels = rf_vals_bg_2523;
1554 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1555 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1556 spec->channels = rf_vals_bg_2524;
1557 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1558 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1559 spec->channels = rf_vals_bg_2525;
1560 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1561 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1562 spec->channels = rf_vals_bg_2525e;
1563 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1564 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1565 spec->channels = rf_vals_5222;
1566 spec->num_modes = 3;
1567 }
1568}
1569
1570static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1571{
1572 int retval;
1573
1574 /*
1575 * Allocate eeprom data.
1576 */
1577 retval = rt2500usb_validate_eeprom(rt2x00dev);
1578 if (retval)
1579 return retval;
1580
1581 retval = rt2500usb_init_eeprom(rt2x00dev);
1582 if (retval)
1583 return retval;
1584
1585 /*
1586 * Initialize hw specifications.
1587 */
1588 rt2500usb_probe_hw_mode(rt2x00dev);
1589
1590 /*
4150c572 1591 * This device requires the beacon ring
95ea3627 1592 */
066cb637 1593 __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags);
95ea3627
ID		 1594
1595 /*
1596 * Set the rssi offset.
1597 */
1598 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1599
1600 return 0;
1601}
1602
1603/*
1604 * IEEE80211 stack callback functions.
1605 */
4150c572
JB		 1606static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1607 unsigned int changed_flags,
1608 unsigned int *total_flags,
1609 int mc_count,
1610 struct dev_addr_list *mc_list)
1611{
1612 struct rt2x00_dev *rt2x00dev = hw->priv;
4150c572
JB		 1613 u16 reg;
1614
1615 /*
1616 * Mask off any flags we are going to ignore from
1617 * the total_flags field.
1618 */
1619 *total_flags &=
1620 FIF_ALLMULTI |
1621 FIF_FCSFAIL |
1622 FIF_PLCPFAIL |
1623 FIF_CONTROL |
1624 FIF_OTHER_BSS |
1625 FIF_PROMISC_IN_BSS;
1626
1627 /*
1628 * Apply some rules to the filters:
1629 * - Some filters imply different filters to be set.
1630 * - Some things we can't filter out at all.
4150c572
JB		 1631 */
1632 if (mc_count)
1633 *total_flags |= FIF_ALLMULTI;
5886d0db
ID		 1634 if (*total_flags & FIF_OTHER_BSS ||
1635 *total_flags & FIF_PROMISC_IN_BSS)
4150c572 1636 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
4150c572
JB		 1637
1638 /*
1639 * Check if there is any work left for us.
1640 */
3c4f2085 1641 if (rt2x00dev->packet_filter == *total_flags)
4150c572 1642 return;
3c4f2085 1643 rt2x00dev->packet_filter = *total_flags;
4150c572
JB		 1644
1645 /*
1646 * When in atomic context, reschedule and let rt2x00lib
1647 * call this function again.
1648 */
1649 if (in_atomic()) {
1650 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1651 return;
1652 }
1653
1654 /*
1655 * Start configuration steps.
1656 * Note that the version error will always be dropped
1657 * and broadcast frames will always be accepted since
1658 * there is no filter for it at this time.
1659 */
1660 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1661 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1662 !(*total_flags & FIF_FCSFAIL));
1663 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1664 !(*total_flags & FIF_PLCPFAIL));
1665 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1666 !(*total_flags & FIF_CONTROL));
1667 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1668 !(*total_flags & FIF_PROMISC_IN_BSS));
1669 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1670 !(*total_flags & FIF_PROMISC_IN_BSS));
1671 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1672 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1673 !(*total_flags & FIF_ALLMULTI));
1674 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1675 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1676}
1677
95ea3627
ID		 1678static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1679 struct sk_buff *skb,
1680 struct ieee80211_tx_control *control)
1681{
1682 struct rt2x00_dev *rt2x00dev = hw->priv;
1683 struct usb_device *usb_dev =
1684 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
08992f7f
ID		 1685 struct skb_desc *desc;
1686 struct data_ring *ring;
95ea3627
ID		 1687 struct data_entry *beacon;
1688 struct data_entry *guardian;
dd9fa2d2 1689 int pipe = usb_sndbulkpipe(usb_dev, 1);
95ea3627
ID		 1690 int length;
1691
1692 /*
1693 * Just in case the ieee80211 doesn't set this,
1694 * but we need this queue set for the descriptor
1695 * initialization.
1696 */
1697 control->queue = IEEE80211_TX_QUEUE_BEACON;
08992f7f 1698 ring = rt2x00lib_get_ring(rt2x00dev, control->queue);
95ea3627
ID		 1699
1700 /*
1701 * Obtain 2 entries, one for the guardian byte,
1702 * the second for the actual beacon.
1703 */
1704 guardian = rt2x00_get_data_entry(ring);
1705 rt2x00_ring_index_inc(ring);
1706 beacon = rt2x00_get_data_entry(ring);
1707
1708 /*
08992f7f 1709 * Add the descriptor in front of the skb.
95ea3627
ID		 1710 */
1711 skb_push(skb, ring->desc_size);
c22eb87b
ID		 1712 memset(skb->data, 0, ring->desc_size);
1713
08992f7f
ID		 1714 /*
1715 * Fill in skb descriptor
1716 */
1717 desc = get_skb_desc(skb);
1718 desc->desc_len = ring->desc_size;
1719 desc->data_len = skb->len - ring->desc_size;
1720 desc->desc = skb->data;
1721 desc->data = skb->data + ring->desc_size;
1722 desc->ring = ring;
1723 desc->entry = beacon;
1724
1725 rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
95ea3627 1726
08992f7f
ID		 1727 /*
1728 * USB devices cannot blindly pass the skb->len as the
1729 * length of the data to usb_fill_bulk_urb. Pass the skb
1730 * to the driver to determine what the length should be.
1731 */
b242e891 1732 length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
95ea3627 1733
dd9fa2d2 1734 usb_fill_bulk_urb(beacon->priv, usb_dev, pipe,
95ea3627
ID		 1735 skb->data, length, rt2500usb_beacondone, beacon);
1736
95ea3627
ID		 1737 /*
1738 * Second we need to create the guardian byte.
1739 * We only need a single byte, so lets recycle
1740 * the 'flags' field we are not using for beacons.
1741 */
1742 guardian->flags = 0;
dd9fa2d2 1743 usb_fill_bulk_urb(guardian->priv, usb_dev, pipe,
95ea3627
ID		 1744 &guardian->flags, 1, rt2500usb_beacondone, guardian);
1745
1746 /*
1747 * Send out the guardian byte.
1748 */
1749 usb_submit_urb(guardian->priv, GFP_ATOMIC);
1750
1751 /*
1752 * Enable beacon generation.
1753 */
1754 rt2500usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
1755
1756 return 0;
1757}
1758
1759static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1760 .tx = rt2x00mac_tx,
4150c572
JB		 1761 .start = rt2x00mac_start,
1762 .stop = rt2x00mac_stop,
95ea3627
ID		 1763 .add_interface = rt2x00mac_add_interface,
1764 .remove_interface = rt2x00mac_remove_interface,
1765 .config = rt2x00mac_config,
1766 .config_interface = rt2x00mac_config_interface,
4150c572 1767 .configure_filter = rt2500usb_configure_filter,
95ea3627 1768 .get_stats = rt2x00mac_get_stats,
5c58ee51 1769 .erp_ie_changed = rt2x00mac_erp_ie_changed,
95ea3627
ID		 1770 .conf_tx = rt2x00mac_conf_tx,
1771 .get_tx_stats = rt2x00mac_get_tx_stats,
1772 .beacon_update = rt2500usb_beacon_update,
1773};
1774
1775static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1776 .probe_hw = rt2500usb_probe_hw,
1777 .initialize = rt2x00usb_initialize,
1778 .uninitialize = rt2x00usb_uninitialize,
1779 .set_device_state = rt2500usb_set_device_state,
1780 .link_stats = rt2500usb_link_stats,
1781 .reset_tuner = rt2500usb_reset_tuner,
1782 .link_tuner = rt2500usb_link_tuner,
1783 .write_tx_desc = rt2500usb_write_tx_desc,
1784 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1785 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1786 .kick_tx_queue = rt2500usb_kick_tx_queue,
1787 .fill_rxdone = rt2500usb_fill_rxdone,
1788 .config_mac_addr = rt2500usb_config_mac_addr,
1789 .config_bssid = rt2500usb_config_bssid,
95ea3627 1790 .config_type = rt2500usb_config_type,
5c58ee51 1791 .config_preamble = rt2500usb_config_preamble,
95ea3627
ID		 1792 .config = rt2500usb_config,
1793};
1794
1795static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1796 .name = KBUILD_MODNAME,
95ea3627
ID		 1797 .rxd_size = RXD_DESC_SIZE,
1798 .txd_size = TXD_DESC_SIZE,
1799 .eeprom_size = EEPROM_SIZE,
1800 .rf_size = RF_SIZE,
1801 .lib = &rt2500usb_rt2x00_ops,
1802 .hw = &rt2500usb_mac80211_ops,
1803#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1804 .debugfs = &rt2500usb_rt2x00debug,
1805#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1806};
1807
1808/*
1809 * rt2500usb module information.
1810 */
1811static struct usb_device_id rt2500usb_device_table[] = {
1812 /* ASUS */
1813 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1814 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1815 /* Belkin */
1816 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1817 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1818 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1819 /* Cisco Systems */
1820 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1821 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1822 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1823 /* Conceptronic */
1824 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1825 /* D-LINK */
1826 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1827 /* Gigabyte */
1828 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1829 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1830 /* Hercules */
1831 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1832 /* Melco */
1833 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1834 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1835 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1836 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
1837
1838 /* MSI */
1839 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1840 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1841 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1842 /* Ralink */
1843 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1844 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1845 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1846 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1847 /* Siemens */
1848 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1849 /* SMC */
1850 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1851 /* Spairon */
1852 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1853 /* Trust */
1854 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1855 /* Zinwell */
1856 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1857 { 0, }
1858};
1859
1860MODULE_AUTHOR(DRV_PROJECT);
1861MODULE_VERSION(DRV_VERSION);
1862MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1863MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1864MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1865MODULE_LICENSE("GPL");
1866
1867static struct usb_driver rt2500usb_driver = {
2360157c 1868 .name = KBUILD_MODNAME,
95ea3627
ID		 1869 .id_table = rt2500usb_device_table,
1870 .probe = rt2x00usb_probe,
1871 .disconnect = rt2x00usb_disconnect,
1872 .suspend = rt2x00usb_suspend,
1873 .resume = rt2x00usb_resume,
1874};
1875
1876static int __init rt2500usb_init(void)
1877{
1878 return usb_register(&rt2500usb_driver);
1879}
1880
1881static void __exit rt2500usb_exit(void)
1882{
1883 usb_deregister(&rt2500usb_driver);
1884}
1885
1886module_init(rt2500usb_init);
1887module_exit(rt2500usb_exit);
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