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mac80211: inform driver of basic rateset
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
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95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
38/*
39 * Register access.
40 * All access to the CSR registers will go through the methods
41 * rt2500usb_register_read and rt2500usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
3d82346c
AB		 50 * If the usb_cache_mutex is already held then the _lock variants must
51 * be used instead.
95ea3627 52 */
0e14f6d3 53static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 54 const unsigned int offset,
55 u16 *value)
56{
57 __le16 reg;
58 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
59 USB_VENDOR_REQUEST_IN, offset,
60 &reg, sizeof(u16), REGISTER_TIMEOUT);
61 *value = le16_to_cpu(reg);
62}
63
3d82346c
AB		 64static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
65 const unsigned int offset,
66 u16 *value)
67{
68 __le16 reg;
69 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
70 USB_VENDOR_REQUEST_IN, offset,
71 &reg, sizeof(u16), REGISTER_TIMEOUT);
72 *value = le16_to_cpu(reg);
73}
74
0e14f6d3 75static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 76 const unsigned int offset,
77 void *value, const u16 length)
78{
95ea3627
ID		 79 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
80 USB_VENDOR_REQUEST_IN, offset,
bd394a74
ID		 81 value, length,
82 REGISTER_TIMEOUT16(length));
95ea3627
ID		 83}
84
0e14f6d3 85static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 86 const unsigned int offset,
87 u16 value)
88{
89 __le16 reg = cpu_to_le16(value);
90 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
91 USB_VENDOR_REQUEST_OUT, offset,
92 &reg, sizeof(u16), REGISTER_TIMEOUT);
93}
94
3d82346c
AB		 95static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
96 const unsigned int offset,
97 u16 value)
98{
99 __le16 reg = cpu_to_le16(value);
100 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
101 USB_VENDOR_REQUEST_OUT, offset,
102 &reg, sizeof(u16), REGISTER_TIMEOUT);
103}
104
0e14f6d3 105static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 106 const unsigned int offset,
107 void *value, const u16 length)
108{
95ea3627
ID		 109 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
110 USB_VENDOR_REQUEST_OUT, offset,
bd394a74
ID		 111 value, length,
112 REGISTER_TIMEOUT16(length));
95ea3627
ID		 113}
114
0e14f6d3 115static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 116{
117 u16 reg;
118 unsigned int i;
119
120 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 121 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
95ea3627
ID		 122 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
123 break;
124 udelay(REGISTER_BUSY_DELAY);
125 }
126
127 return reg;
128}
129
0e14f6d3 130static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 131 const unsigned int word, const u8 value)
132{
133 u16 reg;
134
3d82346c
AB		 135 mutex_lock(&rt2x00dev->usb_cache_mutex);
136
95ea3627
ID		 137 /*
138 * Wait until the BBP becomes ready.
139 */
140 reg = rt2500usb_bbp_check(rt2x00dev);
99ade259
ID		 141 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY))
142 goto exit_fail;
95ea3627
ID		 143
144 /*
145 * Write the data into the BBP.
146 */
147 reg = 0;
148 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
149 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
150 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
151
3d82346c
AB		 152 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
153
154 mutex_unlock(&rt2x00dev->usb_cache_mutex);
99ade259
ID		 155
156 return;
157
158exit_fail:
159 mutex_unlock(&rt2x00dev->usb_cache_mutex);
160
161 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
95ea3627
ID		 162}
163
0e14f6d3 164static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 165 const unsigned int word, u8 *value)
166{
167 u16 reg;
168
3d82346c
AB		 169 mutex_lock(&rt2x00dev->usb_cache_mutex);
170
95ea3627
ID		 171 /*
172 * Wait until the BBP becomes ready.
173 */
174 reg = rt2500usb_bbp_check(rt2x00dev);
99ade259
ID		 175 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY))
176 goto exit_fail;
95ea3627
ID		 177
178 /*
179 * Write the request into the BBP.
180 */
181 reg = 0;
182 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
183 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
184
3d82346c 185 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627
ID		 186
187 /*
188 * Wait until the BBP becomes ready.
189 */
190 reg = rt2500usb_bbp_check(rt2x00dev);
99ade259
ID		 191 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY))
192 goto exit_fail;
95ea3627 193
3d82346c 194 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
95ea3627 195 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c
AB		 196
197 mutex_unlock(&rt2x00dev->usb_cache_mutex);
99ade259
ID		 198
199 return;
200
201exit_fail:
202 mutex_unlock(&rt2x00dev->usb_cache_mutex);
203
204 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
205 *value = 0xff;
95ea3627
ID		 206}
207
0e14f6d3 208static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 209 const unsigned int word, const u32 value)
210{
211 u16 reg;
212 unsigned int i;
213
214 if (!word)
215 return;
216
3d82346c
AB		 217 mutex_lock(&rt2x00dev->usb_cache_mutex);
218
95ea3627 219 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 220 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
95ea3627
ID		 221 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
222 goto rf_write;
223 udelay(REGISTER_BUSY_DELAY);
224 }
225
3d82346c 226 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 227 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
228 return;
229
230rf_write:
231 reg = 0;
232 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
3d82346c 233 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
95ea3627
ID		 234
235 reg = 0;
236 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
237 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
238 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
239 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
240
3d82346c 241 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
95ea3627 242 rt2x00_rf_write(rt2x00dev, word, value);
3d82346c
AB		 243
244 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 245}
246
247#ifdef CONFIG_RT2X00_LIB_DEBUGFS
248#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
249
0e14f6d3 250static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 251 const unsigned int word, u32 *data)
252{
253 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
254}
255
0e14f6d3 256static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 257 const unsigned int word, u32 data)
258{
259 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
260}
261
262static const struct rt2x00debug rt2500usb_rt2x00debug = {
263 .owner = THIS_MODULE,
264 .csr = {
265 .read = rt2500usb_read_csr,
266 .write = rt2500usb_write_csr,
267 .word_size = sizeof(u16),
268 .word_count = CSR_REG_SIZE / sizeof(u16),
269 },
270 .eeprom = {
271 .read = rt2x00_eeprom_read,
272 .write = rt2x00_eeprom_write,
273 .word_size = sizeof(u16),
274 .word_count = EEPROM_SIZE / sizeof(u16),
275 },
276 .bbp = {
277 .read = rt2500usb_bbp_read,
278 .write = rt2500usb_bbp_write,
279 .word_size = sizeof(u8),
280 .word_count = BBP_SIZE / sizeof(u8),
281 },
282 .rf = {
283 .read = rt2x00_rf_read,
284 .write = rt2500usb_rf_write,
285 .word_size = sizeof(u32),
286 .word_count = RF_SIZE / sizeof(u32),
287 },
288};
289#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
290
771fd565 291#ifdef CONFIG_RT2X00_LIB_LEDS
a2e1d52a 292static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 293 enum led_brightness brightness)
294{
295 struct rt2x00_led *led =
296 container_of(led_cdev, struct rt2x00_led, led_dev);
297 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 298 u16 reg;
a9450b70 299
a2e1d52a 300 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 301
a2e1d52a
ID		 302 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
303 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
304 else if (led->type == LED_TYPE_ACTIVITY)
305 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
306
307 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
308}
309
310static int rt2500usb_blink_set(struct led_classdev *led_cdev,
311 unsigned long *delay_on,
312 unsigned long *delay_off)
313{
314 struct rt2x00_led *led =
315 container_of(led_cdev, struct rt2x00_led, led_dev);
316 u16 reg;
317
318 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
319 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
320 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
321 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 322
a2e1d52a 323 return 0;
a9450b70 324}
475433be
ID		 325
326static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
327 struct rt2x00_led *led,
328 enum led_type type)
329{
330 led->rt2x00dev = rt2x00dev;
331 led->type = type;
332 led->led_dev.brightness_set = rt2500usb_brightness_set;
333 led->led_dev.blink_set = rt2500usb_blink_set;
334 led->flags = LED_INITIALIZED;
335}
771fd565 336#endif /* CONFIG_RT2X00_LIB_LEDS */
a9450b70 337
95ea3627
ID		 338/*
339 * Configuration handlers.
340 */
3a643d24
ID		 341static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
342 const unsigned int filter_flags)
343{
344 u16 reg;
345
346 /*
347 * Start configuration steps.
348 * Note that the version error will always be dropped
349 * and broadcast frames will always be accepted since
350 * there is no filter for it at this time.
351 */
352 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
353 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
354 !(filter_flags & FIF_FCSFAIL));
355 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
356 !(filter_flags & FIF_PLCPFAIL));
357 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
358 !(filter_flags & FIF_CONTROL));
359 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
360 !(filter_flags & FIF_PROMISC_IN_BSS));
361 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 362 !(filter_flags & FIF_PROMISC_IN_BSS) &&
363 !rt2x00dev->intf_ap_count);
3a643d24
ID		 364 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
365 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
366 !(filter_flags & FIF_ALLMULTI));
367 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
368 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
369}
370
6bb40dd1
ID		 371static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
372 struct rt2x00_intf *intf,
373 struct rt2x00intf_conf *conf,
374 const unsigned int flags)
95ea3627 375{
6bb40dd1 376 unsigned int bcn_preload;
95ea3627
ID		 377 u16 reg;
378
6bb40dd1 379 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 380 /*
381 * Enable beacon config
382 */
383 bcn_preload = PREAMBLE + get_duration(IEEE80211_HEADER, 20);
384 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
385 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
386 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
387 2 * (conf->type != IEEE80211_IF_TYPE_STA));
388 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 389
6bb40dd1
ID		 390 /*
391 * Enable synchronisation.
392 */
393 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
394 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
395 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
396
397 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 398 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 399 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 400 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 401 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
402 }
95ea3627 403
6bb40dd1
ID		 404 if (flags & CONFIG_UPDATE_MAC)
405 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
406 (3 * sizeof(__le16)));
407
408 if (flags & CONFIG_UPDATE_BSSID)
409 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
410 (3 * sizeof(__le16)));
95ea3627
ID		 411}
412
3a643d24
ID		 413static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
414 struct rt2x00lib_erp *erp)
95ea3627 415{
95ea3627 416 u16 reg;
95ea3627 417
95ea3627 418 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
72810379 419 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
95ea3627
ID		 420 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
421
422 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 423 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 424 !!erp->short_preamble);
95ea3627
ID		 425 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
426}
427
428static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51 429 const int basic_rate_mask)
95ea3627 430{
5c58ee51 431 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627
ID		 432}
433
434static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 435 struct rf_channel *rf, const int txpower)
95ea3627 436{
95ea3627
ID		 437 /*
438 * Set TXpower.
439 */
5c58ee51 440 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID		 441
442 /*
443 * For RT2525E we should first set the channel to half band higher.
444 */
445 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
446 static const u32 vals[] = {
447 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
448 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
449 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
450 0x00000902, 0x00000906
451 };
452
5c58ee51
ID		 453 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
454 if (rf->rf4)
455 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 456 }
457
5c58ee51
ID		 458 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
459 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
460 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
461 if (rf->rf4)
462 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 463}
464
465static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
466 const int txpower)
467{
468 u32 rf3;
469
470 rt2x00_rf_read(rt2x00dev, 3, &rf3);
471 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
472 rt2500usb_rf_write(rt2x00dev, 3, rf3);
473}
474
475static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 476 struct antenna_setup *ant)
95ea3627
ID		 477{
478 u8 r2;
479 u8 r14;
480 u16 csr5;
481 u16 csr6;
482
a4fe07d9
ID		 483 /*
484 * We should never come here because rt2x00lib is supposed
485 * to catch this and send us the correct antenna explicitely.
486 */
487 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
488 ant->tx == ANTENNA_SW_DIVERSITY);
489
95ea3627
ID		 490 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
491 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
492 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
493 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
494
495 /*
496 * Configure the TX antenna.
497 */
addc81bd 498 switch (ant->tx) {
95ea3627
ID		 499 case ANTENNA_HW_DIVERSITY:
500 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
501 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
502 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
503 break;
504 case ANTENNA_A:
505 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
506 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
507 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
508 break;
509 case ANTENNA_B:
a4fe07d9 510 default:
95ea3627
ID		 511 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
512 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
513 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
514 break;
515 }
516
517 /*
518 * Configure the RX antenna.
519 */
addc81bd 520 switch (ant->rx) {
95ea3627
ID		 521 case ANTENNA_HW_DIVERSITY:
522 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
523 break;
524 case ANTENNA_A:
525 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
526 break;
527 case ANTENNA_B:
a4fe07d9 528 default:
95ea3627
ID		 529 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
530 break;
531 }
532
533 /*
534 * RT2525E and RT5222 need to flip TX I/Q
535 */
536 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
537 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
538 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
539 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
540 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
541
542 /*
543 * RT2525E does not need RX I/Q Flip.
544 */
545 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
546 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
547 } else {
548 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
549 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
550 }
551
552 rt2500usb_bbp_write(rt2x00dev, 2, r2);
553 rt2500usb_bbp_write(rt2x00dev, 14, r14);
554 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
555 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
556}
557
558static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 559 struct rt2x00lib_conf *libconf)
95ea3627
ID		 560{
561 u16 reg;
562
5c58ee51 563 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
f5507ce9
ID		 564 rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
565 rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
95ea3627
ID		 566
567 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 568 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
569 libconf->conf->beacon_int * 4);
95ea3627
ID		 570 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
571}
572
573static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 574 struct rt2x00lib_conf *libconf,
575 const unsigned int flags)
95ea3627 576{
95ea3627 577 if (flags & CONFIG_UPDATE_PHYMODE)
f5507ce9 578 rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
95ea3627 579 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID		 580 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
581 libconf->conf->power_level);
95ea3627 582 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID		 583 rt2500usb_config_txpower(rt2x00dev,
584 libconf->conf->power_level);
95ea3627 585 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 586 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 587 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 588 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 589}
590
95ea3627
ID		 591/*
592 * Link tuning
593 */
ebcf26da
ID		 594static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
595 struct link_qual *qual)
95ea3627
ID		 596{
597 u16 reg;
598
599 /*
600 * Update FCS error count from register.
601 */
602 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 603 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 604
605 /*
606 * Update False CCA count from register.
607 */
608 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 609 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 610}
611
612static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
613{
614 u16 eeprom;
615 u16 value;
616
617 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
618 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
619 rt2500usb_bbp_write(rt2x00dev, 24, value);
620
621 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
622 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
623 rt2500usb_bbp_write(rt2x00dev, 25, value);
624
625 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
626 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
627 rt2500usb_bbp_write(rt2x00dev, 61, value);
628
629 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
630 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
631 rt2500usb_bbp_write(rt2x00dev, 17, value);
632
633 rt2x00dev->link.vgc_level = value;
634}
635
d06193f3
ID		 636/*
637 * NOTE: This function is directly ported from legacy driver, but
638 * despite it being declared it was never called. Although link tuning
639 * sounds like a good idea, and usually works well for the other drivers,
640 * it does _not_ work with rt2500usb. Enabling this function will result
641 * in TX capabilities only until association kicks in. Immediately
642 * after the successful association all TX frames will be kept in the
643 * hardware queue and never transmitted.
644 */
645#if 0
95ea3627
ID		 646static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
647{
648 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
649 u16 bbp_thresh;
650 u16 vgc_bound;
651 u16 sens;
652 u16 r24;
653 u16 r25;
654 u16 r61;
655 u16 r17_sens;
656 u8 r17;
657 u8 up_bound;
658 u8 low_bound;
659
6bb40dd1
ID		 660 /*
661 * Read current r17 value, as well as the sensitivity values
662 * for the r17 register.
663 */
664 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
665 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
666
667 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
668 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
669 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
670
671 /*
672 * If we are not associated, we should go straight to the
673 * dynamic CCA tuning.
674 */
675 if (!rt2x00dev->intf_associated)
676 goto dynamic_cca_tune;
677
95ea3627
ID		 678 /*
679 * Determine the BBP tuning threshold and correctly
680 * set BBP 24, 25 and 61.
681 */
682 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
683 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
684
685 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
686 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
687 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
688
689 if ((rssi + bbp_thresh) > 0) {
690 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
691 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
692 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
693 } else {
694 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
695 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
696 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
697 }
698
699 rt2500usb_bbp_write(rt2x00dev, 24, r24);
700 rt2500usb_bbp_write(rt2x00dev, 25, r25);
701 rt2500usb_bbp_write(rt2x00dev, 61, r61);
702
95ea3627
ID		 703 /*
704 * A too low RSSI will cause too much false CCA which will
705 * then corrupt the R17 tuning. To remidy this the tuning should
706 * be stopped (While making sure the R17 value will not exceed limits)
707 */
708 if (rssi >= -40) {
709 if (r17 != 0x60)
710 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
711 return;
712 }
713
714 /*
715 * Special big-R17 for short distance
716 */
717 if (rssi >= -58) {
718 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
719 if (r17 != sens)
720 rt2500usb_bbp_write(rt2x00dev, 17, sens);
721 return;
722 }
723
724 /*
725 * Special mid-R17 for middle distance
726 */
727 if (rssi >= -74) {
728 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
729 if (r17 != sens)
730 rt2500usb_bbp_write(rt2x00dev, 17, sens);
731 return;
732 }
733
734 /*
735 * Leave short or middle distance condition, restore r17
736 * to the dynamic tuning range.
737 */
95ea3627 738 low_bound = 0x32;
6bb40dd1
ID		 739 if (rssi < -77)
740 up_bound -= (-77 - rssi);
95ea3627
ID		 741
742 if (up_bound < low_bound)
743 up_bound = low_bound;
744
745 if (r17 > up_bound) {
746 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
747 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 748 return;
749 }
750
751dynamic_cca_tune:
752
753 /*
754 * R17 is inside the dynamic tuning range,
755 * start tuning the link based on the false cca counter.
756 */
757 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 758 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
759 rt2x00dev->link.vgc_level = r17;
ebcf26da 760 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 761 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
762 rt2x00dev->link.vgc_level = r17;
763 }
764}
d06193f3
ID		 765#else
766#define rt2500usb_link_tuner NULL
767#endif
95ea3627
ID		 768
769/*
770 * Initialization functions.
771 */
772static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
773{
774 u16 reg;
775
776 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
777 USB_MODE_TEST, REGISTER_TIMEOUT);
778 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
779 0x00f0, REGISTER_TIMEOUT);
780
781 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
782 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
783 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
784
785 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
786 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
787
788 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
789 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
790 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
791 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
792 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
793
794 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
795 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
796 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
797 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
798 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
799
800 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
801 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
802 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
803 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
804 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
805 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
806
807 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
808 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
809 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
810 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
811 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
812 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
813
814 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
815 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
816 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
817 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
818 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
819 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
820
821 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
822 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
823 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
824 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
825 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
826 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
827
1f909162
ID		 828 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
829 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
830 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
831 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
832 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
833 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
834
95ea3627
ID		 835 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
836 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
837
838 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
839 return -EBUSY;
840
841 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
842 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
843 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
844 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
845 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
846
755a957d 847 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 848 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 849 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 850 } else {
ddc827f9
ID		 851 reg = 0;
852 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
853 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 854 }
855 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
856
857 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
858 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
859 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
860 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
861
862 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
863 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
864 rt2x00dev->rx->data_size);
865 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
866
867 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
868 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
869 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
870 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
871
872 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
873 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
874 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
875
876 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
877 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
878 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
879
880 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
881 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
882 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
883
884 return 0;
885}
886
2b08da3f 887static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 888{
889 unsigned int i;
95ea3627 890 u8 value;
95ea3627
ID		 891
892 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
893 rt2500usb_bbp_read(rt2x00dev, 0, &value);
894 if ((value != 0xff) && (value != 0x00))
2b08da3f 895 return 0;
95ea3627
ID		 896 udelay(REGISTER_BUSY_DELAY);
897 }
898
899 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
900 return -EACCES;
2b08da3f
ID		 901}
902
903static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
904{
905 unsigned int i;
906 u16 eeprom;
907 u8 value;
908 u8 reg_id;
909
910 if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
911 return -EACCES;
95ea3627 912
95ea3627
ID		 913 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
914 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
915 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
916 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
917 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
918 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
919 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
920 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
921 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
922 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
923 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
924 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
925 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
926 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
927 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
928 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
929 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
930 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
931 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
932 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
933 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
934 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
935 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
936 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
937 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
938 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
939 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
940 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
941 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
942 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
943 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
944
95ea3627
ID		 945 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
946 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
947
948 if (eeprom != 0xffff && eeprom != 0x0000) {
949 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
950 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 951 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
952 }
953 }
95ea3627
ID		 954
955 return 0;
956}
957
958/*
959 * Device state switch handlers.
960 */
961static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
962 enum dev_state state)
963{
964 u16 reg;
965
966 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
967 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
2b08da3f
ID		 968 (state == STATE_RADIO_RX_OFF) ||
969 (state == STATE_RADIO_RX_OFF_LINK));
95ea3627
ID		 970 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
971}
972
973static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
974{
975 /*
976 * Initialize all registers.
977 */
2b08da3f
ID		 978 if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
979 rt2500usb_init_bbp(rt2x00dev)))
95ea3627 980 return -EIO;
95ea3627 981
95ea3627
ID		 982 return 0;
983}
984
985static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
986{
95ea3627
ID		 987 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
988 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
989
990 /*
991 * Disable synchronisation.
992 */
993 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
994
995 rt2x00usb_disable_radio(rt2x00dev);
996}
997
998static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
999 enum dev_state state)
1000{
1001 u16 reg;
1002 u16 reg2;
1003 unsigned int i;
1004 char put_to_sleep;
1005 char bbp_state;
1006 char rf_state;
1007
1008 put_to_sleep = (state != STATE_AWAKE);
1009
1010 reg = 0;
1011 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
1012 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
1013 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
1014 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1015 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
1016 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1017
1018 /*
1019 * Device is not guaranteed to be in the requested state yet.
1020 * We must wait until the register indicates that the
1021 * device has entered the correct state.
1022 */
1023 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1024 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
1025 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
1026 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
1027 if (bbp_state == state && rf_state == state)
1028 return 0;
1029 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
1030 msleep(30);
1031 }
1032
95ea3627
ID		 1033 return -EBUSY;
1034}
1035
1036static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1037 enum dev_state state)
1038{
1039 int retval = 0;
1040
1041 switch (state) {
1042 case STATE_RADIO_ON:
1043 retval = rt2500usb_enable_radio(rt2x00dev);
1044 break;
1045 case STATE_RADIO_OFF:
1046 rt2500usb_disable_radio(rt2x00dev);
1047 break;
1048 case STATE_RADIO_RX_ON:
61667d8d 1049 case STATE_RADIO_RX_ON_LINK:
95ea3627 1050 case STATE_RADIO_RX_OFF:
61667d8d 1051 case STATE_RADIO_RX_OFF_LINK:
2b08da3f
ID		 1052 rt2500usb_toggle_rx(rt2x00dev, state);
1053 break;
1054 case STATE_RADIO_IRQ_ON:
1055 case STATE_RADIO_IRQ_OFF:
1056 /* No support, but no error either */
95ea3627
ID		 1057 break;
1058 case STATE_DEEP_SLEEP:
1059 case STATE_SLEEP:
1060 case STATE_STANDBY:
1061 case STATE_AWAKE:
1062 retval = rt2500usb_set_state(rt2x00dev, state);
1063 break;
1064 default:
1065 retval = -ENOTSUPP;
1066 break;
1067 }
1068
2b08da3f
ID		 1069 if (unlikely(retval))
1070 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1071 state, retval);
1072
95ea3627
ID		 1073 return retval;
1074}
1075
1076/*
1077 * TX descriptor initialization
1078 */
1079static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1080 struct sk_buff *skb,
61486e0f 1081 struct txentry_desc *txdesc)
95ea3627 1082{
181d6902 1083 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1084 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1085 u32 word;
1086
1087 /*
1088 * Start writing the descriptor words.
1089 */
1090 rt2x00_desc_read(txd, 1, &word);
1091 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
181d6902
ID		 1092 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1093 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1094 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1095 rt2x00_desc_write(txd, 1, word);
1096
1097 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1098 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1099 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1100 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1101 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1102 rt2x00_desc_write(txd, 2, word);
1103
1104 rt2x00_desc_read(txd, 0, &word);
61486e0f 1105 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
95ea3627 1106 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1107 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1108 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1109 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1110 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1111 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1112 rt2x00_set_field32(&word, TXD_W0_OFDM,
181d6902 1113 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
95ea3627 1114 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
61486e0f 1115 test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
181d6902 1116 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1abc3656 1117 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len);
95ea3627
ID		 1118 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1119 rt2x00_desc_write(txd, 0, word);
1120}
1121
bd88a781
ID		 1122/*
1123 * TX data initialization
1124 */
1125static void rt2500usb_beacondone(struct urb *urb);
1126
1127static void rt2500usb_write_beacon(struct queue_entry *entry)
1128{
1129 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1130 struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
1131 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
1132 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1133 int pipe = usb_sndbulkpipe(usb_dev, 1);
1134 int length;
1135 u16 reg;
1136
1137 /*
1138 * Add the descriptor in front of the skb.
1139 */
1140 skb_push(entry->skb, entry->queue->desc_size);
1141 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1142 skbdesc->desc = entry->skb->data;
1143
1144 /*
1145 * Disable beaconing while we are reloading the beacon data,
1146 * otherwise we might be sending out invalid data.
1147 */
1148 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1149 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1150 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1151 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1152 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1153
1154 /*
1155 * USB devices cannot blindly pass the skb->len as the
1156 * length of the data to usb_fill_bulk_urb. Pass the skb
1157 * to the driver to determine what the length should be.
1158 */
1159 length = rt2x00dev->ops->lib->get_tx_data_len(rt2x00dev, entry->skb);
1160
1161 usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
1162 entry->skb->data, length, rt2500usb_beacondone,
1163 entry);
1164
1165 /*
1166 * Second we need to create the guardian byte.
1167 * We only need a single byte, so lets recycle
1168 * the 'flags' field we are not using for beacons.
1169 */
1170 bcn_priv->guardian_data = 0;
1171 usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
1172 &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
1173 entry);
1174
1175 /*
1176 * Send out the guardian byte.
1177 */
1178 usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
1179}
1180
dd9fa2d2 1181static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1182 struct sk_buff *skb)
dd9fa2d2
ID		 1183{
1184 int length;
1185
1186 /*
1187 * The length _must_ be a multiple of 2,
1188 * but it must _not_ be a multiple of the USB packet size.
1189 */
1190 length = roundup(skb->len, 2);
b242e891 1191 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID		 1192
1193 return length;
1194}
1195
95ea3627 1196static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1197 const enum data_queue_qid queue)
95ea3627
ID		 1198{
1199 u16 reg;
1200
f019d514
ID		 1201 if (queue != QID_BEACON) {
1202 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
95ea3627 1203 return;
f019d514 1204 }
95ea3627
ID		 1205
1206 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1207 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1208 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1209 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID		 1210 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1211 /*
1212 * Beacon generation will fail initially.
1213 * To prevent this we need to register the TXRX_CSR19
1214 * register several times.
1215 */
1216 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1217 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1218 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1219 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1220 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1221 }
1222}
1223
1224/*
1225 * RX control handlers
1226 */
181d6902
ID		 1227static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1228 struct rxdone_entry_desc *rxdesc)
95ea3627 1229{
b8be63ff 1230 struct queue_entry_priv_usb *entry_priv = entry->priv_data;
181d6902
ID		 1231 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1232 __le32 *rxd =
1233 (__le32 *)(entry->skb->data +
b8be63ff
ID		 1234 (entry_priv->urb->actual_length -
1235 entry->queue->desc_size));
95ea3627
ID		 1236 u32 word0;
1237 u32 word1;
1238
f855c10b 1239 /*
a26cbc65
GW		 1240 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1241 * frame data in rt2x00usb.
f855c10b 1242 */
a26cbc65 1243 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
70a96109 1244 rxd = (__le32 *)skbdesc->desc;
f855c10b
ID		 1245
1246 /*
70a96109 1247 * It is now safe to read the descriptor on all architectures.
f855c10b 1248 */
95ea3627
ID		 1249 rt2x00_desc_read(rxd, 0, &word0);
1250 rt2x00_desc_read(rxd, 1, &word1);
1251
4150c572 1252 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1253 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1254 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1255 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1256
1257 /*
1258 * Obtain the status about this packet.
89993890
ID		 1259 * When frame was received with an OFDM bitrate,
1260 * the signal is the PLCP value. If it was received with
1261 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1262 */
181d6902
ID		 1263 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1264 rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
1265 entry->queue->rt2x00dev->rssi_offset;
181d6902 1266 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02 1267
19d30e02
ID		 1268 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1269 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
6c6aa3c0
ID		 1270 else
1271 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
19d30e02
ID		 1272 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1273 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1274
2ae23854
MN		 1275 /*
1276 * Adjust the skb memory window to the frame boundaries.
1277 */
2ae23854 1278 skb_trim(entry->skb, rxdesc->size);
95ea3627
ID		 1279}
1280
1281/*
1282 * Interrupt functions.
1283 */
1284static void rt2500usb_beacondone(struct urb *urb)
1285{
181d6902 1286 struct queue_entry *entry = (struct queue_entry *)urb->context;
b8be63ff 1287 struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
95ea3627 1288
0262ab0d 1289 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1290 return;
1291
1292 /*
1293 * Check if this was the guardian beacon,
1294 * if that was the case we need to send the real beacon now.
1295 * Otherwise we should free the sk_buffer, the device
1296 * should be doing the rest of the work now.
1297 */
b8be63ff
ID		 1298 if (bcn_priv->guardian_urb == urb) {
1299 usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
1300 } else if (bcn_priv->urb == urb) {
181d6902
ID		 1301 dev_kfree_skb(entry->skb);
1302 entry->skb = NULL;
95ea3627
ID		 1303 }
1304}
1305
1306/*
1307 * Device probe functions.
1308 */
1309static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1310{
1311 u16 word;
1312 u8 *mac;
6bb40dd1 1313 u8 bbp;
95ea3627
ID		 1314
1315 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1316
1317 /*
1318 * Start validation of the data that has been read.
1319 */
1320 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1321 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1322 DECLARE_MAC_BUF(macbuf);
1323
95ea3627 1324 random_ether_addr(mac);
0795af57 1325 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1326 }
1327
1328 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1329 if (word == 0xffff) {
1330 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1331 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1332 ANTENNA_SW_DIVERSITY);
1333 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1334 ANTENNA_SW_DIVERSITY);
1335 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1336 LED_MODE_DEFAULT);
95ea3627
ID		 1337 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1338 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1339 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1340 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1341 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1342 }
1343
1344 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1345 if (word == 0xffff) {
1346 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1347 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1348 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1349 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1350 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1351 }
1352
1353 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1354 if (word == 0xffff) {
1355 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1356 DEFAULT_RSSI_OFFSET);
1357 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1358 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1359 }
1360
1361 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1362 if (word == 0xffff) {
1363 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1364 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1365 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1366 }
1367
6bb40dd1
ID		 1368 /*
1369 * Switch lower vgc bound to current BBP R17 value,
1370 * lower the value a bit for better quality.
1371 */
1372 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1373 bbp -= 6;
1374
95ea3627
ID		 1375 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1376 if (word == 0xffff) {
1377 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1378 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1379 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1380 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
8d8acd46
ID		 1381 } else {
1382 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1383 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1384 }
1385
1386 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1387 if (word == 0xffff) {
1388 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1389 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1390 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1391 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
1392 }
1393
1394 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1395 if (word == 0xffff) {
1396 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1397 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1398 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1399 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1400 }
1401
1402 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1403 if (word == 0xffff) {
1404 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1405 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1406 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1407 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1408 }
1409
1410 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1411 if (word == 0xffff) {
1412 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1413 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1414 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1415 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1416 }
1417
1418 return 0;
1419}
1420
1421static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1422{
1423 u16 reg;
1424 u16 value;
1425 u16 eeprom;
1426
1427 /*
1428 * Read EEPROM word for configuration.
1429 */
1430 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1431
1432 /*
1433 * Identify RF chipset.
1434 */
1435 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1436 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1437 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1438
755a957d 1439 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1440 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1441 return -ENODEV;
1442 }
1443
1444 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1445 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1446 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1447 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1448 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1449 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1450 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1451 return -ENODEV;
1452 }
1453
1454 /*
1455 * Identify default antenna configuration.
1456 */
addc81bd 1457 rt2x00dev->default_ant.tx =
95ea3627 1458 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1459 rt2x00dev->default_ant.rx =
95ea3627
ID		 1460 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1461
addc81bd
ID		 1462 /*
1463 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1464 * I am not 100% sure about this, but the legacy drivers do not
1465 * indicate antenna swapping in software is required when
1466 * diversity is enabled.
1467 */
1468 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1469 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1470 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1471 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1472
95ea3627
ID		 1473 /*
1474 * Store led mode, for correct led behaviour.
1475 */
771fd565 1476#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID		 1477 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1478
475433be
ID		 1479 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1480 if (value == LED_MODE_TXRX_ACTIVITY)
1481 rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1482 LED_TYPE_ACTIVITY);
771fd565 1483#endif /* CONFIG_RT2X00_LIB_LEDS */
95ea3627
ID		 1484
1485 /*
1486 * Check if the BBP tuning should be disabled.
1487 */
1488 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1489 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1490 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1491
1492 /*
1493 * Read the RSSI <-> dBm offset information.
1494 */
1495 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1496 rt2x00dev->rssi_offset =
1497 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1498
1499 return 0;
1500}
1501
1502/*
1503 * RF value list for RF2522
1504 * Supports: 2.4 GHz
1505 */
1506static const struct rf_channel rf_vals_bg_2522[] = {
1507 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1508 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1509 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1510 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1511 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1512 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1513 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1514 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1515 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1516 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1517 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1518 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1519 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1520 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1521};
1522
1523/*
1524 * RF value list for RF2523
1525 * Supports: 2.4 GHz
1526 */
1527static const struct rf_channel rf_vals_bg_2523[] = {
1528 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1529 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1530 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1531 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1532 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1533 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1534 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1535 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1536 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1537 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1538 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1539 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1540 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1541 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1542};
1543
1544/*
1545 * RF value list for RF2524
1546 * Supports: 2.4 GHz
1547 */
1548static const struct rf_channel rf_vals_bg_2524[] = {
1549 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1550 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1551 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1552 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1553 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1554 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1555 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1556 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1557 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1558 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1559 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1560 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1561 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1562 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1563};
1564
1565/*
1566 * RF value list for RF2525
1567 * Supports: 2.4 GHz
1568 */
1569static const struct rf_channel rf_vals_bg_2525[] = {
1570 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1571 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1572 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1573 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1574 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1575 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1576 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1577 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1578 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1579 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1580 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1581 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1582 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1583 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1584};
1585
1586/*
1587 * RF value list for RF2525e
1588 * Supports: 2.4 GHz
1589 */
1590static const struct rf_channel rf_vals_bg_2525e[] = {
1591 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1592 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1593 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1594 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1595 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1596 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1597 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1598 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1599 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1600 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1601 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1602 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1603 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1604 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1605};
1606
1607/*
1608 * RF value list for RF5222
1609 * Supports: 2.4 GHz & 5.2 GHz
1610 */
1611static const struct rf_channel rf_vals_5222[] = {
1612 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1613 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1614 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1615 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1616 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1617 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1618 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1619 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1620 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1621 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1622 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1623 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1624 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1625 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1626
1627 /* 802.11 UNI / HyperLan 2 */
1628 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1629 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1630 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1631 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1632 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1633 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1634 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1635 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1636
1637 /* 802.11 HyperLan 2 */
1638 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1639 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1640 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1641 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1642 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1643 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1644 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1645 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1646 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1647 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1648
1649 /* 802.11 UNII */
1650 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1651 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1652 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1653 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1654 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1655};
1656
8c5e7a5f 1657static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 1658{
1659 struct hw_mode_spec *spec = &rt2x00dev->spec;
8c5e7a5f
ID		 1660 struct channel_info *info;
1661 char *tx_power;
95ea3627
ID		 1662 unsigned int i;
1663
1664 /*
1665 * Initialize all hw fields.
1666 */
1667 rt2x00dev->hw->flags =
95ea3627 1668 IEEE80211_HW_RX_INCLUDES_FCS |
566bfe5a
BR		 1669 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1670 IEEE80211_HW_SIGNAL_DBM;
1671
95ea3627 1672 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
95ea3627 1673
14a3bf89 1674 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
95ea3627
ID		 1675 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1676 rt2x00_eeprom_addr(rt2x00dev,
1677 EEPROM_MAC_ADDR_0));
1678
95ea3627
ID		 1679 /*
1680 * Initialize hw_mode information.
1681 */
31562e80
ID		 1682 spec->supported_bands = SUPPORT_BAND_2GHZ;
1683 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1684
1685 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1686 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1687 spec->channels = rf_vals_bg_2522;
1688 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1689 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1690 spec->channels = rf_vals_bg_2523;
1691 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1692 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1693 spec->channels = rf_vals_bg_2524;
1694 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1695 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1696 spec->channels = rf_vals_bg_2525;
1697 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1698 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1699 spec->channels = rf_vals_bg_2525e;
1700 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1701 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1702 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1703 spec->channels = rf_vals_5222;
95ea3627 1704 }
8c5e7a5f
ID		 1705
1706 /*
1707 * Create channel information array
1708 */
1709 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
1710 if (!info)
1711 return -ENOMEM;
1712
1713 spec->channels_info = info;
1714
1715 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1716 for (i = 0; i < 14; i++)
1717 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
1718
1719 if (spec->num_channels > 14) {
1720 for (i = 14; i < spec->num_channels; i++)
1721 info[i].tx_power1 = DEFAULT_TXPOWER;
1722 }
1723
1724 return 0;
95ea3627
ID		 1725}
1726
1727static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1728{
1729 int retval;
1730
1731 /*
1732 * Allocate eeprom data.
1733 */
1734 retval = rt2500usb_validate_eeprom(rt2x00dev);
1735 if (retval)
1736 return retval;
1737
1738 retval = rt2500usb_init_eeprom(rt2x00dev);
1739 if (retval)
1740 return retval;
1741
1742 /*
1743 * Initialize hw specifications.
1744 */
8c5e7a5f
ID		 1745 retval = rt2500usb_probe_hw_mode(rt2x00dev);
1746 if (retval)
1747 return retval;
95ea3627
ID		 1748
1749 /*
181d6902 1750 * This device requires the atim queue
95ea3627 1751 */
181d6902
ID		 1752 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1753 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
3a643d24 1754 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
d06193f3 1755 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
95ea3627
ID		 1756
1757 /*
1758 * Set the rssi offset.
1759 */
1760 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1761
1762 return 0;
1763}
1764
95ea3627
ID		 1765static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1766 .tx = rt2x00mac_tx,
4150c572
JB		 1767 .start = rt2x00mac_start,
1768 .stop = rt2x00mac_stop,
95ea3627
ID		 1769 .add_interface = rt2x00mac_add_interface,
1770 .remove_interface = rt2x00mac_remove_interface,
1771 .config = rt2x00mac_config,
1772 .config_interface = rt2x00mac_config_interface,
3a643d24 1773 .configure_filter = rt2x00mac_configure_filter,
95ea3627 1774 .get_stats = rt2x00mac_get_stats,
471b3efd 1775 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1776 .conf_tx = rt2x00mac_conf_tx,
1777 .get_tx_stats = rt2x00mac_get_tx_stats,
95ea3627
ID		 1778};
1779
1780static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1781 .probe_hw = rt2500usb_probe_hw,
1782 .initialize = rt2x00usb_initialize,
1783 .uninitialize = rt2x00usb_uninitialize,
837e7f24
ID		 1784 .init_rxentry = rt2x00usb_init_rxentry,
1785 .init_txentry = rt2x00usb_init_txentry,
95ea3627
ID		 1786 .set_device_state = rt2500usb_set_device_state,
1787 .link_stats = rt2500usb_link_stats,
1788 .reset_tuner = rt2500usb_reset_tuner,
1789 .link_tuner = rt2500usb_link_tuner,
1790 .write_tx_desc = rt2500usb_write_tx_desc,
1791 .write_tx_data = rt2x00usb_write_tx_data,
bd88a781 1792 .write_beacon = rt2500usb_write_beacon,
dd9fa2d2 1793 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1794 .kick_tx_queue = rt2500usb_kick_tx_queue,
1795 .fill_rxdone = rt2500usb_fill_rxdone,
3a643d24 1796 .config_filter = rt2500usb_config_filter,
6bb40dd1 1797 .config_intf = rt2500usb_config_intf,
72810379 1798 .config_erp = rt2500usb_config_erp,
95ea3627
ID		 1799 .config = rt2500usb_config,
1800};
1801
181d6902
ID		 1802static const struct data_queue_desc rt2500usb_queue_rx = {
1803 .entry_num = RX_ENTRIES,
1804 .data_size = DATA_FRAME_SIZE,
1805 .desc_size = RXD_DESC_SIZE,
b8be63ff 1806 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1807};
1808
1809static const struct data_queue_desc rt2500usb_queue_tx = {
1810 .entry_num = TX_ENTRIES,
1811 .data_size = DATA_FRAME_SIZE,
1812 .desc_size = TXD_DESC_SIZE,
b8be63ff 1813 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1814};
1815
1816static const struct data_queue_desc rt2500usb_queue_bcn = {
1817 .entry_num = BEACON_ENTRIES,
1818 .data_size = MGMT_FRAME_SIZE,
1819 .desc_size = TXD_DESC_SIZE,
1820 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1821};
1822
1823static const struct data_queue_desc rt2500usb_queue_atim = {
1824 .entry_num = ATIM_ENTRIES,
1825 .data_size = DATA_FRAME_SIZE,
1826 .desc_size = TXD_DESC_SIZE,
b8be63ff 1827 .priv_size = sizeof(struct queue_entry_priv_usb),
181d6902
ID		 1828};
1829
95ea3627 1830static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1831 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1832 .max_sta_intf = 1,
1833 .max_ap_intf = 1,
95ea3627
ID		 1834 .eeprom_size = EEPROM_SIZE,
1835 .rf_size = RF_SIZE,
61448f88 1836 .tx_queues = NUM_TX_QUEUES,
181d6902
ID		 1837 .rx = &rt2500usb_queue_rx,
1838 .tx = &rt2500usb_queue_tx,
1839 .bcn = &rt2500usb_queue_bcn,
1840 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1841 .lib = &rt2500usb_rt2x00_ops,
1842 .hw = &rt2500usb_mac80211_ops,
1843#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1844 .debugfs = &rt2500usb_rt2x00debug,
1845#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1846};
1847
1848/*
1849 * rt2500usb module information.
1850 */
1851static struct usb_device_id rt2500usb_device_table[] = {
1852 /* ASUS */
1853 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1854 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1855 /* Belkin */
1856 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1857 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1858 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1859 /* Cisco Systems */
1860 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1861 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1862 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1863 /* Conceptronic */
1864 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1865 /* D-LINK */
1866 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1867 /* Gigabyte */
1868 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1869 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1870 /* Hercules */
1871 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1872 /* Melco */
db433feb 1873 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1874 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1875 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1876 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1877 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1878 /* MSI */
1879 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1880 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1881 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1882 /* Ralink */
1883 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1884 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1885 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1886 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1887 /* Siemens */
1888 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1889 /* SMC */
1890 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1891 /* Spairon */
1892 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1893 /* Trust */
1894 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1895 /* Zinwell */
1896 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1897 { 0, }
1898};
1899
1900MODULE_AUTHOR(DRV_PROJECT);
1901MODULE_VERSION(DRV_VERSION);
1902MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1903MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1904MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1905MODULE_LICENSE("GPL");
1906
1907static struct usb_driver rt2500usb_driver = {
2360157c 1908 .name = KBUILD_MODNAME,
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ID		 1909 .id_table = rt2500usb_device_table,
1910 .probe = rt2x00usb_probe,
1911 .disconnect = rt2x00usb_disconnect,
1912 .suspend = rt2x00usb_suspend,
1913 .resume = rt2x00usb_resume,
1914};
1915
1916static int __init rt2500usb_init(void)
1917{
1918 return usb_register(&rt2500usb_driver);
1919}
1920
1921static void __exit rt2500usb_exit(void)
1922{
1923 usb_deregister(&rt2500usb_driver);
1924}
1925
1926module_init(rt2500usb_init);
1927module_exit(rt2500usb_exit);
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