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95ea3627 | 1 | /* |
811aa9ca | 2 | Copyright (C) 2004 - 2008 rt2x00 SourceForge Project |
95ea3627 ID |
3 | <http://rt2x00.serialmonkey.com> |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the | |
17 | Free Software Foundation, Inc., | |
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | */ | |
20 | ||
21 | /* | |
22 | Module: rt2500usb | |
23 | Abstract: rt2500usb device specific routines. | |
24 | Supported chipsets: RT2570. | |
25 | */ | |
26 | ||
95ea3627 ID |
27 | #include <linux/delay.h> |
28 | #include <linux/etherdevice.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/kernel.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/usb.h> | |
33 | ||
34 | #include "rt2x00.h" | |
35 | #include "rt2x00usb.h" | |
36 | #include "rt2500usb.h" | |
37 | ||
38 | /* | |
39 | * Register access. | |
40 | * All access to the CSR registers will go through the methods | |
41 | * rt2500usb_register_read and rt2500usb_register_write. | |
42 | * BBP and RF register require indirect register access, | |
43 | * and use the CSR registers BBPCSR and RFCSR to achieve this. | |
44 | * These indirect registers work with busy bits, | |
45 | * and we will try maximal REGISTER_BUSY_COUNT times to access | |
46 | * the register while taking a REGISTER_BUSY_DELAY us delay | |
47 | * between each attampt. When the busy bit is still set at that time, | |
48 | * the access attempt is considered to have failed, | |
49 | * and we will print an error. | |
8ff48a8b | 50 | * If the csr_mutex is already held then the _lock variants must |
3d82346c | 51 | * be used instead. |
95ea3627 | 52 | */ |
0e14f6d3 | 53 | static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
54 | const unsigned int offset, |
55 | u16 *value) | |
56 | { | |
57 | __le16 reg; | |
58 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, | |
59 | USB_VENDOR_REQUEST_IN, offset, | |
60 | ®, sizeof(u16), REGISTER_TIMEOUT); | |
61 | *value = le16_to_cpu(reg); | |
62 | } | |
63 | ||
3d82346c AB |
64 | static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev, |
65 | const unsigned int offset, | |
66 | u16 *value) | |
67 | { | |
68 | __le16 reg; | |
69 | rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ, | |
70 | USB_VENDOR_REQUEST_IN, offset, | |
71 | ®, sizeof(u16), REGISTER_TIMEOUT); | |
72 | *value = le16_to_cpu(reg); | |
73 | } | |
74 | ||
0e14f6d3 | 75 | static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
76 | const unsigned int offset, |
77 | void *value, const u16 length) | |
78 | { | |
95ea3627 ID |
79 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
80 | USB_VENDOR_REQUEST_IN, offset, | |
bd394a74 ID |
81 | value, length, |
82 | REGISTER_TIMEOUT16(length)); | |
95ea3627 ID |
83 | } |
84 | ||
0e14f6d3 | 85 | static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
86 | const unsigned int offset, |
87 | u16 value) | |
88 | { | |
89 | __le16 reg = cpu_to_le16(value); | |
90 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, | |
91 | USB_VENDOR_REQUEST_OUT, offset, | |
92 | ®, sizeof(u16), REGISTER_TIMEOUT); | |
93 | } | |
94 | ||
3d82346c AB |
95 | static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev, |
96 | const unsigned int offset, | |
97 | u16 value) | |
98 | { | |
99 | __le16 reg = cpu_to_le16(value); | |
100 | rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE, | |
101 | USB_VENDOR_REQUEST_OUT, offset, | |
102 | ®, sizeof(u16), REGISTER_TIMEOUT); | |
103 | } | |
104 | ||
0e14f6d3 | 105 | static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
106 | const unsigned int offset, |
107 | void *value, const u16 length) | |
108 | { | |
95ea3627 ID |
109 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
110 | USB_VENDOR_REQUEST_OUT, offset, | |
bd394a74 ID |
111 | value, length, |
112 | REGISTER_TIMEOUT16(length)); | |
95ea3627 ID |
113 | } |
114 | ||
0e14f6d3 | 115 | static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev) |
95ea3627 ID |
116 | { |
117 | u16 reg; | |
118 | unsigned int i; | |
119 | ||
120 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | |
3d82346c | 121 | rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, ®); |
95ea3627 ID |
122 | if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
123 | break; | |
124 | udelay(REGISTER_BUSY_DELAY); | |
125 | } | |
126 | ||
127 | return reg; | |
128 | } | |
129 | ||
0e14f6d3 | 130 | static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
131 | const unsigned int word, const u8 value) |
132 | { | |
133 | u16 reg; | |
134 | ||
8ff48a8b | 135 | mutex_lock(&rt2x00dev->csr_mutex); |
3d82346c | 136 | |
95ea3627 ID |
137 | /* |
138 | * Wait until the BBP becomes ready. | |
139 | */ | |
140 | reg = rt2500usb_bbp_check(rt2x00dev); | |
99ade259 ID |
141 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
142 | goto exit_fail; | |
95ea3627 ID |
143 | |
144 | /* | |
145 | * Write the data into the BBP. | |
146 | */ | |
147 | reg = 0; | |
148 | rt2x00_set_field16(®, PHY_CSR7_DATA, value); | |
149 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); | |
150 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 0); | |
151 | ||
3d82346c AB |
152 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); |
153 | ||
8ff48a8b | 154 | mutex_unlock(&rt2x00dev->csr_mutex); |
99ade259 ID |
155 | |
156 | return; | |
157 | ||
158 | exit_fail: | |
8ff48a8b | 159 | mutex_unlock(&rt2x00dev->csr_mutex); |
99ade259 ID |
160 | |
161 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n"); | |
95ea3627 ID |
162 | } |
163 | ||
0e14f6d3 | 164 | static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
165 | const unsigned int word, u8 *value) |
166 | { | |
167 | u16 reg; | |
168 | ||
8ff48a8b | 169 | mutex_lock(&rt2x00dev->csr_mutex); |
3d82346c | 170 | |
95ea3627 ID |
171 | /* |
172 | * Wait until the BBP becomes ready. | |
173 | */ | |
174 | reg = rt2500usb_bbp_check(rt2x00dev); | |
99ade259 ID |
175 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
176 | goto exit_fail; | |
95ea3627 ID |
177 | |
178 | /* | |
179 | * Write the request into the BBP. | |
180 | */ | |
181 | reg = 0; | |
182 | rt2x00_set_field16(®, PHY_CSR7_REG_ID, word); | |
183 | rt2x00_set_field16(®, PHY_CSR7_READ_CONTROL, 1); | |
184 | ||
3d82346c | 185 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); |
95ea3627 ID |
186 | |
187 | /* | |
188 | * Wait until the BBP becomes ready. | |
189 | */ | |
190 | reg = rt2500usb_bbp_check(rt2x00dev); | |
99ade259 ID |
191 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
192 | goto exit_fail; | |
95ea3627 | 193 | |
3d82346c | 194 | rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); |
95ea3627 | 195 | *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); |
3d82346c | 196 | |
8ff48a8b | 197 | mutex_unlock(&rt2x00dev->csr_mutex); |
99ade259 ID |
198 | |
199 | return; | |
200 | ||
201 | exit_fail: | |
8ff48a8b | 202 | mutex_unlock(&rt2x00dev->csr_mutex); |
99ade259 ID |
203 | |
204 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n"); | |
205 | *value = 0xff; | |
95ea3627 ID |
206 | } |
207 | ||
0e14f6d3 | 208 | static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, |
95ea3627 ID |
209 | const unsigned int word, const u32 value) |
210 | { | |
211 | u16 reg; | |
212 | unsigned int i; | |
213 | ||
214 | if (!word) | |
215 | return; | |
216 | ||
8ff48a8b | 217 | mutex_lock(&rt2x00dev->csr_mutex); |
3d82346c | 218 | |
95ea3627 | 219 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
3d82346c | 220 | rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, ®); |
95ea3627 ID |
221 | if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY)) |
222 | goto rf_write; | |
223 | udelay(REGISTER_BUSY_DELAY); | |
224 | } | |
225 | ||
8ff48a8b | 226 | mutex_unlock(&rt2x00dev->csr_mutex); |
95ea3627 ID |
227 | ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n"); |
228 | return; | |
229 | ||
230 | rf_write: | |
231 | reg = 0; | |
232 | rt2x00_set_field16(®, PHY_CSR9_RF_VALUE, value); | |
3d82346c | 233 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg); |
95ea3627 ID |
234 | |
235 | reg = 0; | |
236 | rt2x00_set_field16(®, PHY_CSR10_RF_VALUE, value >> 16); | |
237 | rt2x00_set_field16(®, PHY_CSR10_RF_NUMBER_OF_BITS, 20); | |
238 | rt2x00_set_field16(®, PHY_CSR10_RF_IF_SELECT, 0); | |
239 | rt2x00_set_field16(®, PHY_CSR10_RF_BUSY, 1); | |
240 | ||
3d82346c | 241 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg); |
95ea3627 | 242 | rt2x00_rf_write(rt2x00dev, word, value); |
3d82346c | 243 | |
8ff48a8b | 244 | mutex_unlock(&rt2x00dev->csr_mutex); |
95ea3627 ID |
245 | } |
246 | ||
247 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
743b97ca ID |
248 | static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev, |
249 | const unsigned int offset, | |
250 | u32 *value) | |
95ea3627 | 251 | { |
743b97ca | 252 | rt2500usb_register_read(rt2x00dev, offset, (u16 *)value); |
95ea3627 ID |
253 | } |
254 | ||
743b97ca ID |
255 | static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, |
256 | const unsigned int offset, | |
257 | u32 value) | |
95ea3627 | 258 | { |
743b97ca | 259 | rt2500usb_register_write(rt2x00dev, offset, value); |
95ea3627 ID |
260 | } |
261 | ||
262 | static const struct rt2x00debug rt2500usb_rt2x00debug = { | |
263 | .owner = THIS_MODULE, | |
264 | .csr = { | |
743b97ca ID |
265 | .read = _rt2500usb_register_read, |
266 | .write = _rt2500usb_register_write, | |
267 | .flags = RT2X00DEBUGFS_OFFSET, | |
268 | .word_base = CSR_REG_BASE, | |
95ea3627 ID |
269 | .word_size = sizeof(u16), |
270 | .word_count = CSR_REG_SIZE / sizeof(u16), | |
271 | }, | |
272 | .eeprom = { | |
273 | .read = rt2x00_eeprom_read, | |
274 | .write = rt2x00_eeprom_write, | |
743b97ca | 275 | .word_base = EEPROM_BASE, |
95ea3627 ID |
276 | .word_size = sizeof(u16), |
277 | .word_count = EEPROM_SIZE / sizeof(u16), | |
278 | }, | |
279 | .bbp = { | |
280 | .read = rt2500usb_bbp_read, | |
281 | .write = rt2500usb_bbp_write, | |
743b97ca | 282 | .word_base = BBP_BASE, |
95ea3627 ID |
283 | .word_size = sizeof(u8), |
284 | .word_count = BBP_SIZE / sizeof(u8), | |
285 | }, | |
286 | .rf = { | |
287 | .read = rt2x00_rf_read, | |
288 | .write = rt2500usb_rf_write, | |
743b97ca | 289 | .word_base = RF_BASE, |
95ea3627 ID |
290 | .word_size = sizeof(u32), |
291 | .word_count = RF_SIZE / sizeof(u32), | |
292 | }, | |
293 | }; | |
294 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
295 | ||
771fd565 | 296 | #ifdef CONFIG_RT2X00_LIB_LEDS |
a2e1d52a | 297 | static void rt2500usb_brightness_set(struct led_classdev *led_cdev, |
a9450b70 ID |
298 | enum led_brightness brightness) |
299 | { | |
300 | struct rt2x00_led *led = | |
301 | container_of(led_cdev, struct rt2x00_led, led_dev); | |
302 | unsigned int enabled = brightness != LED_OFF; | |
a2e1d52a | 303 | u16 reg; |
a9450b70 | 304 | |
a2e1d52a | 305 | rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, ®); |
47b10cd1 | 306 | |
a2e1d52a ID |
307 | if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) |
308 | rt2x00_set_field16(®, MAC_CSR20_LINK, enabled); | |
309 | else if (led->type == LED_TYPE_ACTIVITY) | |
310 | rt2x00_set_field16(®, MAC_CSR20_ACTIVITY, enabled); | |
311 | ||
312 | rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg); | |
313 | } | |
314 | ||
315 | static int rt2500usb_blink_set(struct led_classdev *led_cdev, | |
316 | unsigned long *delay_on, | |
317 | unsigned long *delay_off) | |
318 | { | |
319 | struct rt2x00_led *led = | |
320 | container_of(led_cdev, struct rt2x00_led, led_dev); | |
321 | u16 reg; | |
322 | ||
323 | rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, ®); | |
324 | rt2x00_set_field16(®, MAC_CSR21_ON_PERIOD, *delay_on); | |
325 | rt2x00_set_field16(®, MAC_CSR21_OFF_PERIOD, *delay_off); | |
326 | rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg); | |
a9450b70 | 327 | |
a2e1d52a | 328 | return 0; |
a9450b70 | 329 | } |
475433be ID |
330 | |
331 | static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, | |
332 | struct rt2x00_led *led, | |
333 | enum led_type type) | |
334 | { | |
335 | led->rt2x00dev = rt2x00dev; | |
336 | led->type = type; | |
337 | led->led_dev.brightness_set = rt2500usb_brightness_set; | |
338 | led->led_dev.blink_set = rt2500usb_blink_set; | |
339 | led->flags = LED_INITIALIZED; | |
340 | } | |
771fd565 | 341 | #endif /* CONFIG_RT2X00_LIB_LEDS */ |
a9450b70 | 342 | |
95ea3627 ID |
343 | /* |
344 | * Configuration handlers. | |
345 | */ | |
3a643d24 ID |
346 | static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev, |
347 | const unsigned int filter_flags) | |
348 | { | |
349 | u16 reg; | |
350 | ||
351 | /* | |
352 | * Start configuration steps. | |
353 | * Note that the version error will always be dropped | |
354 | * and broadcast frames will always be accepted since | |
355 | * there is no filter for it at this time. | |
356 | */ | |
357 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); | |
358 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CRC, | |
359 | !(filter_flags & FIF_FCSFAIL)); | |
360 | rt2x00_set_field16(®, TXRX_CSR2_DROP_PHYSICAL, | |
361 | !(filter_flags & FIF_PLCPFAIL)); | |
362 | rt2x00_set_field16(®, TXRX_CSR2_DROP_CONTROL, | |
363 | !(filter_flags & FIF_CONTROL)); | |
364 | rt2x00_set_field16(®, TXRX_CSR2_DROP_NOT_TO_ME, | |
365 | !(filter_flags & FIF_PROMISC_IN_BSS)); | |
366 | rt2x00_set_field16(®, TXRX_CSR2_DROP_TODS, | |
e0b005fa ID |
367 | !(filter_flags & FIF_PROMISC_IN_BSS) && |
368 | !rt2x00dev->intf_ap_count); | |
3a643d24 ID |
369 | rt2x00_set_field16(®, TXRX_CSR2_DROP_VERSION_ERROR, 1); |
370 | rt2x00_set_field16(®, TXRX_CSR2_DROP_MULTICAST, | |
371 | !(filter_flags & FIF_ALLMULTI)); | |
372 | rt2x00_set_field16(®, TXRX_CSR2_DROP_BROADCAST, 0); | |
373 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); | |
374 | } | |
375 | ||
6bb40dd1 ID |
376 | static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev, |
377 | struct rt2x00_intf *intf, | |
378 | struct rt2x00intf_conf *conf, | |
379 | const unsigned int flags) | |
95ea3627 | 380 | { |
6bb40dd1 | 381 | unsigned int bcn_preload; |
95ea3627 ID |
382 | u16 reg; |
383 | ||
6bb40dd1 | 384 | if (flags & CONFIG_UPDATE_TYPE) { |
6bb40dd1 ID |
385 | /* |
386 | * Enable beacon config | |
387 | */ | |
bad13639 | 388 | bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20); |
6bb40dd1 ID |
389 | rt2500usb_register_read(rt2x00dev, TXRX_CSR20, ®); |
390 | rt2x00_set_field16(®, TXRX_CSR20_OFFSET, bcn_preload >> 6); | |
391 | rt2x00_set_field16(®, TXRX_CSR20_BCN_EXPECT_WINDOW, | |
05c914fe | 392 | 2 * (conf->type != NL80211_IFTYPE_STATION)); |
6bb40dd1 | 393 | rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg); |
95ea3627 | 394 | |
6bb40dd1 ID |
395 | /* |
396 | * Enable synchronisation. | |
397 | */ | |
398 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); | |
399 | rt2x00_set_field16(®, TXRX_CSR18_OFFSET, 0); | |
400 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); | |
401 | ||
402 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | |
fd3c91c5 | 403 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); |
6bb40dd1 | 404 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, conf->sync); |
fd3c91c5 | 405 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); |
6bb40dd1 ID |
406 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); |
407 | } | |
95ea3627 | 408 | |
6bb40dd1 ID |
409 | if (flags & CONFIG_UPDATE_MAC) |
410 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac, | |
411 | (3 * sizeof(__le16))); | |
412 | ||
413 | if (flags & CONFIG_UPDATE_BSSID) | |
414 | rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid, | |
415 | (3 * sizeof(__le16))); | |
95ea3627 ID |
416 | } |
417 | ||
3a643d24 ID |
418 | static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev, |
419 | struct rt2x00lib_erp *erp) | |
95ea3627 | 420 | { |
95ea3627 | 421 | u16 reg; |
95ea3627 | 422 | |
95ea3627 | 423 | rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); |
72810379 | 424 | rt2x00_set_field16(®, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout); |
95ea3627 ID |
425 | rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); |
426 | ||
427 | rt2500usb_register_read(rt2x00dev, TXRX_CSR10, ®); | |
4f5af6eb | 428 | rt2x00_set_field16(®, TXRX_CSR10_AUTORESPOND_PREAMBLE, |
72810379 | 429 | !!erp->short_preamble); |
95ea3627 | 430 | rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); |
95ea3627 | 431 | |
e4ea1c40 | 432 | rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates); |
95ea3627 | 433 | |
e4ea1c40 ID |
434 | rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time); |
435 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs); | |
436 | rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs); | |
95ea3627 ID |
437 | } |
438 | ||
e4ea1c40 ID |
439 | static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev, |
440 | struct antenna_setup *ant) | |
95ea3627 ID |
441 | { |
442 | u8 r2; | |
443 | u8 r14; | |
444 | u16 csr5; | |
445 | u16 csr6; | |
446 | ||
a4fe07d9 ID |
447 | /* |
448 | * We should never come here because rt2x00lib is supposed | |
449 | * to catch this and send us the correct antenna explicitely. | |
450 | */ | |
451 | BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY || | |
452 | ant->tx == ANTENNA_SW_DIVERSITY); | |
453 | ||
95ea3627 ID |
454 | rt2500usb_bbp_read(rt2x00dev, 2, &r2); |
455 | rt2500usb_bbp_read(rt2x00dev, 14, &r14); | |
456 | rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5); | |
457 | rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6); | |
458 | ||
459 | /* | |
460 | * Configure the TX antenna. | |
461 | */ | |
addc81bd | 462 | switch (ant->tx) { |
95ea3627 ID |
463 | case ANTENNA_HW_DIVERSITY: |
464 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1); | |
465 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1); | |
466 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1); | |
467 | break; | |
468 | case ANTENNA_A: | |
469 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); | |
470 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0); | |
471 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0); | |
472 | break; | |
473 | case ANTENNA_B: | |
a4fe07d9 | 474 | default: |
95ea3627 ID |
475 | rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2); |
476 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2); | |
477 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2); | |
478 | break; | |
479 | } | |
480 | ||
481 | /* | |
482 | * Configure the RX antenna. | |
483 | */ | |
addc81bd | 484 | switch (ant->rx) { |
95ea3627 ID |
485 | case ANTENNA_HW_DIVERSITY: |
486 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1); | |
487 | break; | |
488 | case ANTENNA_A: | |
489 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0); | |
490 | break; | |
491 | case ANTENNA_B: | |
a4fe07d9 | 492 | default: |
95ea3627 ID |
493 | rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2); |
494 | break; | |
495 | } | |
496 | ||
497 | /* | |
498 | * RT2525E and RT5222 need to flip TX I/Q | |
499 | */ | |
500 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E) || | |
501 | rt2x00_rf(&rt2x00dev->chip, RF5222)) { | |
502 | rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); | |
503 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); | |
504 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); | |
505 | ||
506 | /* | |
507 | * RT2525E does not need RX I/Q Flip. | |
508 | */ | |
509 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) | |
510 | rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); | |
511 | } else { | |
512 | rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); | |
513 | rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0); | |
514 | } | |
515 | ||
516 | rt2500usb_bbp_write(rt2x00dev, 2, r2); | |
517 | rt2500usb_bbp_write(rt2x00dev, 14, r14); | |
518 | rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5); | |
519 | rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); | |
520 | } | |
521 | ||
e4ea1c40 ID |
522 | static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, |
523 | struct rf_channel *rf, const int txpower) | |
524 | { | |
525 | /* | |
526 | * Set TXpower. | |
527 | */ | |
528 | rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); | |
529 | ||
530 | /* | |
531 | * For RT2525E we should first set the channel to half band higher. | |
532 | */ | |
533 | if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { | |
534 | static const u32 vals[] = { | |
535 | 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, | |
536 | 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, | |
537 | 0x000008ba, 0x000008be, 0x000008b7, 0x00000902, | |
538 | 0x00000902, 0x00000906 | |
539 | }; | |
540 | ||
541 | rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]); | |
542 | if (rf->rf4) | |
543 | rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); | |
544 | } | |
545 | ||
546 | rt2500usb_rf_write(rt2x00dev, 1, rf->rf1); | |
547 | rt2500usb_rf_write(rt2x00dev, 2, rf->rf2); | |
548 | rt2500usb_rf_write(rt2x00dev, 3, rf->rf3); | |
549 | if (rf->rf4) | |
550 | rt2500usb_rf_write(rt2x00dev, 4, rf->rf4); | |
551 | } | |
552 | ||
553 | static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev, | |
554 | const int txpower) | |
555 | { | |
556 | u32 rf3; | |
557 | ||
558 | rt2x00_rf_read(rt2x00dev, 3, &rf3); | |
559 | rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); | |
560 | rt2500usb_rf_write(rt2x00dev, 3, rf3); | |
561 | } | |
562 | ||
95ea3627 | 563 | static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev, |
5c58ee51 | 564 | struct rt2x00lib_conf *libconf) |
95ea3627 ID |
565 | { |
566 | u16 reg; | |
567 | ||
95ea3627 | 568 | rt2500usb_register_read(rt2x00dev, TXRX_CSR18, ®); |
5c58ee51 ID |
569 | rt2x00_set_field16(®, TXRX_CSR18_INTERVAL, |
570 | libconf->conf->beacon_int * 4); | |
95ea3627 ID |
571 | rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg); |
572 | } | |
573 | ||
574 | static void rt2500usb_config(struct rt2x00_dev *rt2x00dev, | |
6bb40dd1 ID |
575 | struct rt2x00lib_conf *libconf, |
576 | const unsigned int flags) | |
95ea3627 | 577 | { |
e4ea1c40 | 578 | if (flags & IEEE80211_CONF_CHANGE_CHANNEL) |
5c58ee51 ID |
579 | rt2500usb_config_channel(rt2x00dev, &libconf->rf, |
580 | libconf->conf->power_level); | |
e4ea1c40 ID |
581 | if ((flags & IEEE80211_CONF_CHANGE_POWER) && |
582 | !(flags & IEEE80211_CONF_CHANGE_CHANNEL)) | |
5c58ee51 ID |
583 | rt2500usb_config_txpower(rt2x00dev, |
584 | libconf->conf->power_level); | |
e4ea1c40 | 585 | if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL) |
5c58ee51 | 586 | rt2500usb_config_duration(rt2x00dev, libconf); |
95ea3627 ID |
587 | } |
588 | ||
95ea3627 ID |
589 | /* |
590 | * Link tuning | |
591 | */ | |
ebcf26da ID |
592 | static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev, |
593 | struct link_qual *qual) | |
95ea3627 ID |
594 | { |
595 | u16 reg; | |
596 | ||
597 | /* | |
598 | * Update FCS error count from register. | |
599 | */ | |
600 | rt2500usb_register_read(rt2x00dev, STA_CSR0, ®); | |
ebcf26da | 601 | qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR); |
95ea3627 ID |
602 | |
603 | /* | |
604 | * Update False CCA count from register. | |
605 | */ | |
606 | rt2500usb_register_read(rt2x00dev, STA_CSR3, ®); | |
ebcf26da | 607 | qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR); |
95ea3627 ID |
608 | } |
609 | ||
610 | static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev) | |
611 | { | |
612 | u16 eeprom; | |
613 | u16 value; | |
614 | ||
615 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom); | |
616 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW); | |
617 | rt2500usb_bbp_write(rt2x00dev, 24, value); | |
618 | ||
619 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom); | |
620 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW); | |
621 | rt2500usb_bbp_write(rt2x00dev, 25, value); | |
622 | ||
623 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom); | |
624 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW); | |
625 | rt2500usb_bbp_write(rt2x00dev, 61, value); | |
626 | ||
627 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom); | |
628 | value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER); | |
629 | rt2500usb_bbp_write(rt2x00dev, 17, value); | |
630 | ||
631 | rt2x00dev->link.vgc_level = value; | |
632 | } | |
633 | ||
d06193f3 ID |
634 | /* |
635 | * NOTE: This function is directly ported from legacy driver, but | |
636 | * despite it being declared it was never called. Although link tuning | |
637 | * sounds like a good idea, and usually works well for the other drivers, | |
638 | * it does _not_ work with rt2500usb. Enabling this function will result | |
639 | * in TX capabilities only until association kicks in. Immediately | |
640 | * after the successful association all TX frames will be kept in the | |
641 | * hardware queue and never transmitted. | |
642 | */ | |
643 | #if 0 | |
95ea3627 ID |
644 | static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev) |
645 | { | |
646 | int rssi = rt2x00_get_link_rssi(&rt2x00dev->link); | |
647 | u16 bbp_thresh; | |
648 | u16 vgc_bound; | |
649 | u16 sens; | |
650 | u16 r24; | |
651 | u16 r25; | |
652 | u16 r61; | |
653 | u16 r17_sens; | |
654 | u8 r17; | |
655 | u8 up_bound; | |
656 | u8 low_bound; | |
657 | ||
6bb40dd1 ID |
658 | /* |
659 | * Read current r17 value, as well as the sensitivity values | |
660 | * for the r17 register. | |
661 | */ | |
662 | rt2500usb_bbp_read(rt2x00dev, 17, &r17); | |
663 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens); | |
664 | ||
665 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound); | |
666 | up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER); | |
667 | low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER); | |
668 | ||
669 | /* | |
670 | * If we are not associated, we should go straight to the | |
671 | * dynamic CCA tuning. | |
672 | */ | |
673 | if (!rt2x00dev->intf_associated) | |
674 | goto dynamic_cca_tune; | |
675 | ||
95ea3627 ID |
676 | /* |
677 | * Determine the BBP tuning threshold and correctly | |
678 | * set BBP 24, 25 and 61. | |
679 | */ | |
680 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh); | |
681 | bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD); | |
682 | ||
683 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24); | |
684 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25); | |
685 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61); | |
686 | ||
687 | if ((rssi + bbp_thresh) > 0) { | |
688 | r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH); | |
689 | r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH); | |
690 | r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH); | |
691 | } else { | |
692 | r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW); | |
693 | r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW); | |
694 | r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW); | |
695 | } | |
696 | ||
697 | rt2500usb_bbp_write(rt2x00dev, 24, r24); | |
698 | rt2500usb_bbp_write(rt2x00dev, 25, r25); | |
699 | rt2500usb_bbp_write(rt2x00dev, 61, r61); | |
700 | ||
95ea3627 ID |
701 | /* |
702 | * A too low RSSI will cause too much false CCA which will | |
703 | * then corrupt the R17 tuning. To remidy this the tuning should | |
704 | * be stopped (While making sure the R17 value will not exceed limits) | |
705 | */ | |
706 | if (rssi >= -40) { | |
707 | if (r17 != 0x60) | |
708 | rt2500usb_bbp_write(rt2x00dev, 17, 0x60); | |
709 | return; | |
710 | } | |
711 | ||
712 | /* | |
713 | * Special big-R17 for short distance | |
714 | */ | |
715 | if (rssi >= -58) { | |
716 | sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW); | |
717 | if (r17 != sens) | |
718 | rt2500usb_bbp_write(rt2x00dev, 17, sens); | |
719 | return; | |
720 | } | |
721 | ||
722 | /* | |
723 | * Special mid-R17 for middle distance | |
724 | */ | |
725 | if (rssi >= -74) { | |
726 | sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH); | |
727 | if (r17 != sens) | |
728 | rt2500usb_bbp_write(rt2x00dev, 17, sens); | |
729 | return; | |
730 | } | |
731 | ||
732 | /* | |
733 | * Leave short or middle distance condition, restore r17 | |
734 | * to the dynamic tuning range. | |
735 | */ | |
95ea3627 | 736 | low_bound = 0x32; |
6bb40dd1 ID |
737 | if (rssi < -77) |
738 | up_bound -= (-77 - rssi); | |
95ea3627 ID |
739 | |
740 | if (up_bound < low_bound) | |
741 | up_bound = low_bound; | |
742 | ||
743 | if (r17 > up_bound) { | |
744 | rt2500usb_bbp_write(rt2x00dev, 17, up_bound); | |
745 | rt2x00dev->link.vgc_level = up_bound; | |
6bb40dd1 ID |
746 | return; |
747 | } | |
748 | ||
749 | dynamic_cca_tune: | |
750 | ||
751 | /* | |
752 | * R17 is inside the dynamic tuning range, | |
753 | * start tuning the link based on the false cca counter. | |
754 | */ | |
755 | if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) { | |
95ea3627 ID |
756 | rt2500usb_bbp_write(rt2x00dev, 17, ++r17); |
757 | rt2x00dev->link.vgc_level = r17; | |
ebcf26da | 758 | } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) { |
95ea3627 ID |
759 | rt2500usb_bbp_write(rt2x00dev, 17, --r17); |
760 | rt2x00dev->link.vgc_level = r17; | |
761 | } | |
762 | } | |
d06193f3 ID |
763 | #else |
764 | #define rt2500usb_link_tuner NULL | |
765 | #endif | |
95ea3627 ID |
766 | |
767 | /* | |
768 | * Initialization functions. | |
769 | */ | |
770 | static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) | |
771 | { | |
772 | u16 reg; | |
773 | ||
774 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001, | |
775 | USB_MODE_TEST, REGISTER_TIMEOUT); | |
776 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308, | |
777 | 0x00f0, REGISTER_TIMEOUT); | |
778 | ||
779 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); | |
780 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, 1); | |
781 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); | |
782 | ||
783 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111); | |
784 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11); | |
785 | ||
786 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); | |
787 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 1); | |
788 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 1); | |
789 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); | |
790 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); | |
791 | ||
792 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); | |
793 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); | |
794 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); | |
795 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 0); | |
796 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); | |
797 | ||
798 | rt2500usb_register_read(rt2x00dev, TXRX_CSR5, ®); | |
799 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0, 13); | |
800 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID0_VALID, 1); | |
801 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1, 12); | |
802 | rt2x00_set_field16(®, TXRX_CSR5_BBP_ID1_VALID, 1); | |
803 | rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg); | |
804 | ||
805 | rt2500usb_register_read(rt2x00dev, TXRX_CSR6, ®); | |
806 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0, 10); | |
807 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID0_VALID, 1); | |
808 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1, 11); | |
809 | rt2x00_set_field16(®, TXRX_CSR6_BBP_ID1_VALID, 1); | |
810 | rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg); | |
811 | ||
812 | rt2500usb_register_read(rt2x00dev, TXRX_CSR7, ®); | |
813 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0, 7); | |
814 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID0_VALID, 1); | |
815 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1, 6); | |
816 | rt2x00_set_field16(®, TXRX_CSR7_BBP_ID1_VALID, 1); | |
817 | rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg); | |
818 | ||
819 | rt2500usb_register_read(rt2x00dev, TXRX_CSR8, ®); | |
820 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0, 5); | |
821 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID0_VALID, 1); | |
822 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1, 0); | |
823 | rt2x00_set_field16(®, TXRX_CSR8_BBP_ID1_VALID, 0); | |
824 | rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg); | |
825 | ||
1f909162 ID |
826 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
827 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); | |
828 | rt2x00_set_field16(®, TXRX_CSR19_TSF_SYNC, 0); | |
829 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); | |
830 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); | |
831 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
832 | ||
95ea3627 ID |
833 | rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f); |
834 | rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d); | |
835 | ||
836 | if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE)) | |
837 | return -EBUSY; | |
838 | ||
839 | rt2500usb_register_read(rt2x00dev, MAC_CSR1, ®); | |
840 | rt2x00_set_field16(®, MAC_CSR1_SOFT_RESET, 0); | |
841 | rt2x00_set_field16(®, MAC_CSR1_BBP_RESET, 0); | |
842 | rt2x00_set_field16(®, MAC_CSR1_HOST_READY, 1); | |
843 | rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); | |
844 | ||
755a957d | 845 | if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) { |
95ea3627 | 846 | rt2500usb_register_read(rt2x00dev, PHY_CSR2, ®); |
ddc827f9 | 847 | rt2x00_set_field16(®, PHY_CSR2_LNA, 0); |
95ea3627 | 848 | } else { |
ddc827f9 ID |
849 | reg = 0; |
850 | rt2x00_set_field16(®, PHY_CSR2_LNA, 1); | |
851 | rt2x00_set_field16(®, PHY_CSR2_LNA_MODE, 3); | |
95ea3627 ID |
852 | } |
853 | rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg); | |
854 | ||
855 | rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002); | |
856 | rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053); | |
857 | rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee); | |
858 | rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000); | |
859 | ||
860 | rt2500usb_register_read(rt2x00dev, MAC_CSR8, ®); | |
861 | rt2x00_set_field16(®, MAC_CSR8_MAX_FRAME_UNIT, | |
862 | rt2x00dev->rx->data_size); | |
863 | rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg); | |
864 | ||
865 | rt2500usb_register_read(rt2x00dev, TXRX_CSR0, ®); | |
866 | rt2x00_set_field16(®, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER); | |
867 | rt2x00_set_field16(®, TXRX_CSR0_KEY_ID, 0xff); | |
868 | rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg); | |
869 | ||
870 | rt2500usb_register_read(rt2x00dev, MAC_CSR18, ®); | |
871 | rt2x00_set_field16(®, MAC_CSR18_DELAY_AFTER_BEACON, 90); | |
872 | rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg); | |
873 | ||
874 | rt2500usb_register_read(rt2x00dev, PHY_CSR4, ®); | |
875 | rt2x00_set_field16(®, PHY_CSR4_LOW_RF_LE, 1); | |
876 | rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg); | |
877 | ||
878 | rt2500usb_register_read(rt2x00dev, TXRX_CSR1, ®); | |
879 | rt2x00_set_field16(®, TXRX_CSR1_AUTO_SEQUENCE, 1); | |
880 | rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg); | |
881 | ||
882 | return 0; | |
883 | } | |
884 | ||
2b08da3f | 885 | static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
95ea3627 ID |
886 | { |
887 | unsigned int i; | |
95ea3627 | 888 | u8 value; |
95ea3627 ID |
889 | |
890 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | |
891 | rt2500usb_bbp_read(rt2x00dev, 0, &value); | |
892 | if ((value != 0xff) && (value != 0x00)) | |
2b08da3f | 893 | return 0; |
95ea3627 ID |
894 | udelay(REGISTER_BUSY_DELAY); |
895 | } | |
896 | ||
897 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); | |
898 | return -EACCES; | |
2b08da3f ID |
899 | } |
900 | ||
901 | static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) | |
902 | { | |
903 | unsigned int i; | |
904 | u16 eeprom; | |
905 | u8 value; | |
906 | u8 reg_id; | |
907 | ||
908 | if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) | |
909 | return -EACCES; | |
95ea3627 | 910 | |
95ea3627 ID |
911 | rt2500usb_bbp_write(rt2x00dev, 3, 0x02); |
912 | rt2500usb_bbp_write(rt2x00dev, 4, 0x19); | |
913 | rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); | |
914 | rt2500usb_bbp_write(rt2x00dev, 15, 0x30); | |
915 | rt2500usb_bbp_write(rt2x00dev, 16, 0xac); | |
916 | rt2500usb_bbp_write(rt2x00dev, 18, 0x18); | |
917 | rt2500usb_bbp_write(rt2x00dev, 19, 0xff); | |
918 | rt2500usb_bbp_write(rt2x00dev, 20, 0x1e); | |
919 | rt2500usb_bbp_write(rt2x00dev, 21, 0x08); | |
920 | rt2500usb_bbp_write(rt2x00dev, 22, 0x08); | |
921 | rt2500usb_bbp_write(rt2x00dev, 23, 0x08); | |
922 | rt2500usb_bbp_write(rt2x00dev, 24, 0x80); | |
923 | rt2500usb_bbp_write(rt2x00dev, 25, 0x50); | |
924 | rt2500usb_bbp_write(rt2x00dev, 26, 0x08); | |
925 | rt2500usb_bbp_write(rt2x00dev, 27, 0x23); | |
926 | rt2500usb_bbp_write(rt2x00dev, 30, 0x10); | |
927 | rt2500usb_bbp_write(rt2x00dev, 31, 0x2b); | |
928 | rt2500usb_bbp_write(rt2x00dev, 32, 0xb9); | |
929 | rt2500usb_bbp_write(rt2x00dev, 34, 0x12); | |
930 | rt2500usb_bbp_write(rt2x00dev, 35, 0x50); | |
931 | rt2500usb_bbp_write(rt2x00dev, 39, 0xc4); | |
932 | rt2500usb_bbp_write(rt2x00dev, 40, 0x02); | |
933 | rt2500usb_bbp_write(rt2x00dev, 41, 0x60); | |
934 | rt2500usb_bbp_write(rt2x00dev, 53, 0x10); | |
935 | rt2500usb_bbp_write(rt2x00dev, 54, 0x18); | |
936 | rt2500usb_bbp_write(rt2x00dev, 56, 0x08); | |
937 | rt2500usb_bbp_write(rt2x00dev, 57, 0x10); | |
938 | rt2500usb_bbp_write(rt2x00dev, 58, 0x08); | |
939 | rt2500usb_bbp_write(rt2x00dev, 61, 0x60); | |
940 | rt2500usb_bbp_write(rt2x00dev, 62, 0x10); | |
941 | rt2500usb_bbp_write(rt2x00dev, 75, 0xff); | |
942 | ||
95ea3627 ID |
943 | for (i = 0; i < EEPROM_BBP_SIZE; i++) { |
944 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); | |
945 | ||
946 | if (eeprom != 0xffff && eeprom != 0x0000) { | |
947 | reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); | |
948 | value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); | |
95ea3627 ID |
949 | rt2500usb_bbp_write(rt2x00dev, reg_id, value); |
950 | } | |
951 | } | |
95ea3627 ID |
952 | |
953 | return 0; | |
954 | } | |
955 | ||
956 | /* | |
957 | * Device state switch handlers. | |
958 | */ | |
959 | static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev, | |
960 | enum dev_state state) | |
961 | { | |
962 | u16 reg; | |
963 | ||
964 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); | |
965 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, | |
2b08da3f ID |
966 | (state == STATE_RADIO_RX_OFF) || |
967 | (state == STATE_RADIO_RX_OFF_LINK)); | |
95ea3627 ID |
968 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
969 | } | |
970 | ||
971 | static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) | |
972 | { | |
973 | /* | |
974 | * Initialize all registers. | |
975 | */ | |
2b08da3f ID |
976 | if (unlikely(rt2500usb_init_registers(rt2x00dev) || |
977 | rt2500usb_init_bbp(rt2x00dev))) | |
95ea3627 | 978 | return -EIO; |
95ea3627 | 979 | |
95ea3627 ID |
980 | return 0; |
981 | } | |
982 | ||
983 | static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev) | |
984 | { | |
95ea3627 ID |
985 | rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121); |
986 | rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121); | |
987 | ||
988 | /* | |
989 | * Disable synchronisation. | |
990 | */ | |
991 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); | |
992 | ||
993 | rt2x00usb_disable_radio(rt2x00dev); | |
994 | } | |
995 | ||
996 | static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, | |
997 | enum dev_state state) | |
998 | { | |
999 | u16 reg; | |
1000 | u16 reg2; | |
1001 | unsigned int i; | |
1002 | char put_to_sleep; | |
1003 | char bbp_state; | |
1004 | char rf_state; | |
1005 | ||
1006 | put_to_sleep = (state != STATE_AWAKE); | |
1007 | ||
1008 | reg = 0; | |
1009 | rt2x00_set_field16(®, MAC_CSR17_BBP_DESIRE_STATE, state); | |
1010 | rt2x00_set_field16(®, MAC_CSR17_RF_DESIRE_STATE, state); | |
1011 | rt2x00_set_field16(®, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep); | |
1012 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); | |
1013 | rt2x00_set_field16(®, MAC_CSR17_SET_STATE, 1); | |
1014 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); | |
1015 | ||
1016 | /* | |
1017 | * Device is not guaranteed to be in the requested state yet. | |
1018 | * We must wait until the register indicates that the | |
1019 | * device has entered the correct state. | |
1020 | */ | |
1021 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | |
1022 | rt2500usb_register_read(rt2x00dev, MAC_CSR17, ®2); | |
1023 | bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE); | |
1024 | rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE); | |
1025 | if (bbp_state == state && rf_state == state) | |
1026 | return 0; | |
1027 | rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg); | |
1028 | msleep(30); | |
1029 | } | |
1030 | ||
95ea3627 ID |
1031 | return -EBUSY; |
1032 | } | |
1033 | ||
1034 | static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |
1035 | enum dev_state state) | |
1036 | { | |
1037 | int retval = 0; | |
1038 | ||
1039 | switch (state) { | |
1040 | case STATE_RADIO_ON: | |
1041 | retval = rt2500usb_enable_radio(rt2x00dev); | |
1042 | break; | |
1043 | case STATE_RADIO_OFF: | |
1044 | rt2500usb_disable_radio(rt2x00dev); | |
1045 | break; | |
1046 | case STATE_RADIO_RX_ON: | |
61667d8d | 1047 | case STATE_RADIO_RX_ON_LINK: |
95ea3627 | 1048 | case STATE_RADIO_RX_OFF: |
61667d8d | 1049 | case STATE_RADIO_RX_OFF_LINK: |
2b08da3f ID |
1050 | rt2500usb_toggle_rx(rt2x00dev, state); |
1051 | break; | |
1052 | case STATE_RADIO_IRQ_ON: | |
1053 | case STATE_RADIO_IRQ_OFF: | |
1054 | /* No support, but no error either */ | |
95ea3627 ID |
1055 | break; |
1056 | case STATE_DEEP_SLEEP: | |
1057 | case STATE_SLEEP: | |
1058 | case STATE_STANDBY: | |
1059 | case STATE_AWAKE: | |
1060 | retval = rt2500usb_set_state(rt2x00dev, state); | |
1061 | break; | |
1062 | default: | |
1063 | retval = -ENOTSUPP; | |
1064 | break; | |
1065 | } | |
1066 | ||
2b08da3f ID |
1067 | if (unlikely(retval)) |
1068 | ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", | |
1069 | state, retval); | |
1070 | ||
95ea3627 ID |
1071 | return retval; |
1072 | } | |
1073 | ||
1074 | /* | |
1075 | * TX descriptor initialization | |
1076 | */ | |
1077 | static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |
dd3193e1 | 1078 | struct sk_buff *skb, |
61486e0f | 1079 | struct txentry_desc *txdesc) |
95ea3627 | 1080 | { |
181d6902 | 1081 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
dd3193e1 | 1082 | __le32 *txd = skbdesc->desc; |
95ea3627 ID |
1083 | u32 word; |
1084 | ||
1085 | /* | |
1086 | * Start writing the descriptor words. | |
1087 | */ | |
1088 | rt2x00_desc_read(txd, 1, &word); | |
1089 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | |
181d6902 ID |
1090 | rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs); |
1091 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); | |
1092 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); | |
95ea3627 ID |
1093 | rt2x00_desc_write(txd, 1, word); |
1094 | ||
1095 | rt2x00_desc_read(txd, 2, &word); | |
181d6902 ID |
1096 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal); |
1097 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service); | |
1098 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low); | |
1099 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high); | |
95ea3627 ID |
1100 | rt2x00_desc_write(txd, 2, word); |
1101 | ||
1102 | rt2x00_desc_read(txd, 0, &word); | |
61486e0f | 1103 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); |
95ea3627 | 1104 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
181d6902 | 1105 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
95ea3627 | 1106 | rt2x00_set_field32(&word, TXD_W0_ACK, |
181d6902 | 1107 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
95ea3627 | 1108 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
181d6902 | 1109 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
95ea3627 | 1110 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
181d6902 | 1111 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
95ea3627 | 1112 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, |
61486e0f | 1113 | test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); |
181d6902 | 1114 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1abc3656 | 1115 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len); |
95ea3627 ID |
1116 | rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE); |
1117 | rt2x00_desc_write(txd, 0, word); | |
1118 | } | |
1119 | ||
bd88a781 ID |
1120 | /* |
1121 | * TX data initialization | |
1122 | */ | |
1123 | static void rt2500usb_beacondone(struct urb *urb); | |
1124 | ||
1125 | static void rt2500usb_write_beacon(struct queue_entry *entry) | |
1126 | { | |
1127 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | |
1128 | struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); | |
1129 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; | |
1130 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | |
1131 | int pipe = usb_sndbulkpipe(usb_dev, 1); | |
1132 | int length; | |
1133 | u16 reg; | |
1134 | ||
1135 | /* | |
1136 | * Add the descriptor in front of the skb. | |
1137 | */ | |
1138 | skb_push(entry->skb, entry->queue->desc_size); | |
1139 | memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len); | |
1140 | skbdesc->desc = entry->skb->data; | |
1141 | ||
1142 | /* | |
1143 | * Disable beaconing while we are reloading the beacon data, | |
1144 | * otherwise we might be sending out invalid data. | |
1145 | */ | |
1146 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | |
1147 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); | |
1148 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); | |
1149 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); | |
1150 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1151 | ||
1152 | /* | |
1153 | * USB devices cannot blindly pass the skb->len as the | |
1154 | * length of the data to usb_fill_bulk_urb. Pass the skb | |
1155 | * to the driver to determine what the length should be. | |
1156 | */ | |
1157 | length = rt2x00dev->ops->lib->get_tx_data_len(rt2x00dev, entry->skb); | |
1158 | ||
1159 | usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, | |
1160 | entry->skb->data, length, rt2500usb_beacondone, | |
1161 | entry); | |
1162 | ||
1163 | /* | |
1164 | * Second we need to create the guardian byte. | |
1165 | * We only need a single byte, so lets recycle | |
1166 | * the 'flags' field we are not using for beacons. | |
1167 | */ | |
1168 | bcn_priv->guardian_data = 0; | |
1169 | usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, | |
1170 | &bcn_priv->guardian_data, 1, rt2500usb_beacondone, | |
1171 | entry); | |
1172 | ||
1173 | /* | |
1174 | * Send out the guardian byte. | |
1175 | */ | |
1176 | usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); | |
1177 | } | |
1178 | ||
dd9fa2d2 | 1179 | static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev, |
b242e891 | 1180 | struct sk_buff *skb) |
dd9fa2d2 ID |
1181 | { |
1182 | int length; | |
1183 | ||
1184 | /* | |
1185 | * The length _must_ be a multiple of 2, | |
1186 | * but it must _not_ be a multiple of the USB packet size. | |
1187 | */ | |
1188 | length = roundup(skb->len, 2); | |
b242e891 | 1189 | length += (2 * !(length % rt2x00dev->usb_maxpacket)); |
dd9fa2d2 ID |
1190 | |
1191 | return length; | |
1192 | } | |
1193 | ||
95ea3627 | 1194 | static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
e58c6aca | 1195 | const enum data_queue_qid queue) |
95ea3627 ID |
1196 | { |
1197 | u16 reg; | |
1198 | ||
f019d514 ID |
1199 | if (queue != QID_BEACON) { |
1200 | rt2x00usb_kick_tx_queue(rt2x00dev, queue); | |
95ea3627 | 1201 | return; |
f019d514 | 1202 | } |
95ea3627 ID |
1203 | |
1204 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | |
1205 | if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) { | |
8af244cc ID |
1206 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 1); |
1207 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 1); | |
95ea3627 ID |
1208 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 1); |
1209 | /* | |
1210 | * Beacon generation will fail initially. | |
1211 | * To prevent this we need to register the TXRX_CSR19 | |
1212 | * register several times. | |
1213 | */ | |
1214 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1215 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); | |
1216 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1217 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0); | |
1218 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | |
1219 | } | |
1220 | } | |
1221 | ||
1222 | /* | |
1223 | * RX control handlers | |
1224 | */ | |
181d6902 ID |
1225 | static void rt2500usb_fill_rxdone(struct queue_entry *entry, |
1226 | struct rxdone_entry_desc *rxdesc) | |
95ea3627 | 1227 | { |
b8be63ff | 1228 | struct queue_entry_priv_usb *entry_priv = entry->priv_data; |
181d6902 ID |
1229 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
1230 | __le32 *rxd = | |
1231 | (__le32 *)(entry->skb->data + | |
b8be63ff ID |
1232 | (entry_priv->urb->actual_length - |
1233 | entry->queue->desc_size)); | |
95ea3627 ID |
1234 | u32 word0; |
1235 | u32 word1; | |
1236 | ||
f855c10b | 1237 | /* |
a26cbc65 GW |
1238 | * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of |
1239 | * frame data in rt2x00usb. | |
f855c10b | 1240 | */ |
a26cbc65 | 1241 | memcpy(skbdesc->desc, rxd, skbdesc->desc_len); |
70a96109 | 1242 | rxd = (__le32 *)skbdesc->desc; |
f855c10b ID |
1243 | |
1244 | /* | |
70a96109 | 1245 | * It is now safe to read the descriptor on all architectures. |
f855c10b | 1246 | */ |
95ea3627 ID |
1247 | rt2x00_desc_read(rxd, 0, &word0); |
1248 | rt2x00_desc_read(rxd, 1, &word1); | |
1249 | ||
4150c572 | 1250 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
181d6902 | 1251 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
4150c572 | 1252 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
181d6902 | 1253 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; |
95ea3627 ID |
1254 | |
1255 | /* | |
1256 | * Obtain the status about this packet. | |
89993890 ID |
1257 | * When frame was received with an OFDM bitrate, |
1258 | * the signal is the PLCP value. If it was received with | |
1259 | * a CCK bitrate the signal is the rate in 100kbit/s. | |
95ea3627 | 1260 | */ |
181d6902 ID |
1261 | rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); |
1262 | rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) - | |
1263 | entry->queue->rt2x00dev->rssi_offset; | |
181d6902 | 1264 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
19d30e02 | 1265 | |
19d30e02 ID |
1266 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) |
1267 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; | |
6c6aa3c0 ID |
1268 | else |
1269 | rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE; | |
19d30e02 ID |
1270 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
1271 | rxdesc->dev_flags |= RXDONE_MY_BSS; | |
7d1de806 | 1272 | |
2ae23854 MN |
1273 | /* |
1274 | * Adjust the skb memory window to the frame boundaries. | |
1275 | */ | |
2ae23854 | 1276 | skb_trim(entry->skb, rxdesc->size); |
95ea3627 ID |
1277 | } |
1278 | ||
1279 | /* | |
1280 | * Interrupt functions. | |
1281 | */ | |
1282 | static void rt2500usb_beacondone(struct urb *urb) | |
1283 | { | |
181d6902 | 1284 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
b8be63ff | 1285 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; |
95ea3627 | 1286 | |
0262ab0d | 1287 | if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) |
95ea3627 ID |
1288 | return; |
1289 | ||
1290 | /* | |
1291 | * Check if this was the guardian beacon, | |
1292 | * if that was the case we need to send the real beacon now. | |
1293 | * Otherwise we should free the sk_buffer, the device | |
1294 | * should be doing the rest of the work now. | |
1295 | */ | |
b8be63ff ID |
1296 | if (bcn_priv->guardian_urb == urb) { |
1297 | usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); | |
1298 | } else if (bcn_priv->urb == urb) { | |
181d6902 ID |
1299 | dev_kfree_skb(entry->skb); |
1300 | entry->skb = NULL; | |
95ea3627 ID |
1301 | } |
1302 | } | |
1303 | ||
1304 | /* | |
1305 | * Device probe functions. | |
1306 | */ | |
1307 | static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |
1308 | { | |
1309 | u16 word; | |
1310 | u8 *mac; | |
6bb40dd1 | 1311 | u8 bbp; |
95ea3627 ID |
1312 | |
1313 | rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); | |
1314 | ||
1315 | /* | |
1316 | * Start validation of the data that has been read. | |
1317 | */ | |
1318 | mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0); | |
1319 | if (!is_valid_ether_addr(mac)) { | |
1320 | random_ether_addr(mac); | |
e174961c | 1321 | EEPROM(rt2x00dev, "MAC: %pM\n", mac); |
95ea3627 ID |
1322 | } |
1323 | ||
1324 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word); | |
1325 | if (word == 0xffff) { | |
1326 | rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2); | |
362f3b6b ID |
1327 | rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, |
1328 | ANTENNA_SW_DIVERSITY); | |
1329 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, | |
1330 | ANTENNA_SW_DIVERSITY); | |
1331 | rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE, | |
1332 | LED_MODE_DEFAULT); | |
95ea3627 ID |
1333 | rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0); |
1334 | rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0); | |
1335 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522); | |
1336 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); | |
1337 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); | |
1338 | } | |
1339 | ||
1340 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word); | |
1341 | if (word == 0xffff) { | |
1342 | rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); | |
1343 | rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0); | |
1344 | rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0); | |
1345 | rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word); | |
1346 | EEPROM(rt2x00dev, "NIC: 0x%04x\n", word); | |
1347 | } | |
1348 | ||
1349 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word); | |
1350 | if (word == 0xffff) { | |
1351 | rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI, | |
1352 | DEFAULT_RSSI_OFFSET); | |
1353 | rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word); | |
1354 | EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word); | |
1355 | } | |
1356 | ||
1357 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word); | |
1358 | if (word == 0xffff) { | |
1359 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45); | |
1360 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word); | |
1361 | EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word); | |
1362 | } | |
1363 | ||
6bb40dd1 ID |
1364 | /* |
1365 | * Switch lower vgc bound to current BBP R17 value, | |
1366 | * lower the value a bit for better quality. | |
1367 | */ | |
1368 | rt2500usb_bbp_read(rt2x00dev, 17, &bbp); | |
1369 | bbp -= 6; | |
1370 | ||
95ea3627 ID |
1371 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word); |
1372 | if (word == 0xffff) { | |
1373 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40); | |
6bb40dd1 | 1374 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); |
95ea3627 ID |
1375 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); |
1376 | EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word); | |
8d8acd46 ID |
1377 | } else { |
1378 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp); | |
1379 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word); | |
95ea3627 ID |
1380 | } |
1381 | ||
1382 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word); | |
1383 | if (word == 0xffff) { | |
1384 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48); | |
1385 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41); | |
1386 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word); | |
1387 | EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word); | |
1388 | } | |
1389 | ||
1390 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word); | |
1391 | if (word == 0xffff) { | |
1392 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40); | |
1393 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80); | |
1394 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word); | |
1395 | EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word); | |
1396 | } | |
1397 | ||
1398 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word); | |
1399 | if (word == 0xffff) { | |
1400 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40); | |
1401 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50); | |
1402 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word); | |
1403 | EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word); | |
1404 | } | |
1405 | ||
1406 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word); | |
1407 | if (word == 0xffff) { | |
1408 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60); | |
1409 | rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d); | |
1410 | rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word); | |
1411 | EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word); | |
1412 | } | |
1413 | ||
1414 | return 0; | |
1415 | } | |
1416 | ||
1417 | static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) | |
1418 | { | |
1419 | u16 reg; | |
1420 | u16 value; | |
1421 | u16 eeprom; | |
1422 | ||
1423 | /* | |
1424 | * Read EEPROM word for configuration. | |
1425 | */ | |
1426 | rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom); | |
1427 | ||
1428 | /* | |
1429 | * Identify RF chipset. | |
1430 | */ | |
1431 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); | |
1432 | rt2500usb_register_read(rt2x00dev, MAC_CSR0, ®); | |
1433 | rt2x00_set_chip(rt2x00dev, RT2570, value, reg); | |
1434 | ||
755a957d | 1435 | if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) { |
95ea3627 ID |
1436 | ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); |
1437 | return -ENODEV; | |
1438 | } | |
1439 | ||
1440 | if (!rt2x00_rf(&rt2x00dev->chip, RF2522) && | |
1441 | !rt2x00_rf(&rt2x00dev->chip, RF2523) && | |
1442 | !rt2x00_rf(&rt2x00dev->chip, RF2524) && | |
1443 | !rt2x00_rf(&rt2x00dev->chip, RF2525) && | |
1444 | !rt2x00_rf(&rt2x00dev->chip, RF2525E) && | |
1445 | !rt2x00_rf(&rt2x00dev->chip, RF5222)) { | |
1446 | ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); | |
1447 | return -ENODEV; | |
1448 | } | |
1449 | ||
1450 | /* | |
1451 | * Identify default antenna configuration. | |
1452 | */ | |
addc81bd | 1453 | rt2x00dev->default_ant.tx = |
95ea3627 | 1454 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT); |
addc81bd | 1455 | rt2x00dev->default_ant.rx = |
95ea3627 ID |
1456 | rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT); |
1457 | ||
addc81bd ID |
1458 | /* |
1459 | * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead. | |
1460 | * I am not 100% sure about this, but the legacy drivers do not | |
1461 | * indicate antenna swapping in software is required when | |
1462 | * diversity is enabled. | |
1463 | */ | |
1464 | if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY) | |
1465 | rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY; | |
1466 | if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY) | |
1467 | rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY; | |
1468 | ||
95ea3627 ID |
1469 | /* |
1470 | * Store led mode, for correct led behaviour. | |
1471 | */ | |
771fd565 | 1472 | #ifdef CONFIG_RT2X00_LIB_LEDS |
a9450b70 ID |
1473 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); |
1474 | ||
475433be ID |
1475 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
1476 | if (value == LED_MODE_TXRX_ACTIVITY) | |
1477 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, | |
1478 | LED_TYPE_ACTIVITY); | |
771fd565 | 1479 | #endif /* CONFIG_RT2X00_LIB_LEDS */ |
95ea3627 ID |
1480 | |
1481 | /* | |
1482 | * Check if the BBP tuning should be disabled. | |
1483 | */ | |
1484 | rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom); | |
1485 | if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE)) | |
1486 | __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags); | |
1487 | ||
1488 | /* | |
1489 | * Read the RSSI <-> dBm offset information. | |
1490 | */ | |
1491 | rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom); | |
1492 | rt2x00dev->rssi_offset = | |
1493 | rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI); | |
1494 | ||
1495 | return 0; | |
1496 | } | |
1497 | ||
1498 | /* | |
1499 | * RF value list for RF2522 | |
1500 | * Supports: 2.4 GHz | |
1501 | */ | |
1502 | static const struct rf_channel rf_vals_bg_2522[] = { | |
1503 | { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 }, | |
1504 | { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 }, | |
1505 | { 3, 0x00002050, 0x000c2002, 0x00000101, 0 }, | |
1506 | { 4, 0x00002050, 0x000c2016, 0x00000101, 0 }, | |
1507 | { 5, 0x00002050, 0x000c202a, 0x00000101, 0 }, | |
1508 | { 6, 0x00002050, 0x000c203e, 0x00000101, 0 }, | |
1509 | { 7, 0x00002050, 0x000c2052, 0x00000101, 0 }, | |
1510 | { 8, 0x00002050, 0x000c2066, 0x00000101, 0 }, | |
1511 | { 9, 0x00002050, 0x000c207a, 0x00000101, 0 }, | |
1512 | { 10, 0x00002050, 0x000c208e, 0x00000101, 0 }, | |
1513 | { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 }, | |
1514 | { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 }, | |
1515 | { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 }, | |
1516 | { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 }, | |
1517 | }; | |
1518 | ||
1519 | /* | |
1520 | * RF value list for RF2523 | |
1521 | * Supports: 2.4 GHz | |
1522 | */ | |
1523 | static const struct rf_channel rf_vals_bg_2523[] = { | |
1524 | { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b }, | |
1525 | { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b }, | |
1526 | { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b }, | |
1527 | { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b }, | |
1528 | { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b }, | |
1529 | { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b }, | |
1530 | { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b }, | |
1531 | { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b }, | |
1532 | { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b }, | |
1533 | { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b }, | |
1534 | { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b }, | |
1535 | { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b }, | |
1536 | { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b }, | |
1537 | { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 }, | |
1538 | }; | |
1539 | ||
1540 | /* | |
1541 | * RF value list for RF2524 | |
1542 | * Supports: 2.4 GHz | |
1543 | */ | |
1544 | static const struct rf_channel rf_vals_bg_2524[] = { | |
1545 | { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b }, | |
1546 | { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b }, | |
1547 | { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b }, | |
1548 | { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b }, | |
1549 | { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b }, | |
1550 | { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b }, | |
1551 | { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b }, | |
1552 | { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b }, | |
1553 | { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b }, | |
1554 | { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b }, | |
1555 | { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b }, | |
1556 | { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b }, | |
1557 | { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b }, | |
1558 | { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 }, | |
1559 | }; | |
1560 | ||
1561 | /* | |
1562 | * RF value list for RF2525 | |
1563 | * Supports: 2.4 GHz | |
1564 | */ | |
1565 | static const struct rf_channel rf_vals_bg_2525[] = { | |
1566 | { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b }, | |
1567 | { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b }, | |
1568 | { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b }, | |
1569 | { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b }, | |
1570 | { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b }, | |
1571 | { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b }, | |
1572 | { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b }, | |
1573 | { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b }, | |
1574 | { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b }, | |
1575 | { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b }, | |
1576 | { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b }, | |
1577 | { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b }, | |
1578 | { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b }, | |
1579 | { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 }, | |
1580 | }; | |
1581 | ||
1582 | /* | |
1583 | * RF value list for RF2525e | |
1584 | * Supports: 2.4 GHz | |
1585 | */ | |
1586 | static const struct rf_channel rf_vals_bg_2525e[] = { | |
1587 | { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b }, | |
1588 | { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 }, | |
1589 | { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b }, | |
1590 | { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 }, | |
1591 | { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b }, | |
1592 | { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 }, | |
1593 | { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b }, | |
1594 | { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 }, | |
1595 | { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b }, | |
1596 | { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 }, | |
1597 | { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b }, | |
1598 | { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 }, | |
1599 | { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b }, | |
1600 | { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 }, | |
1601 | }; | |
1602 | ||
1603 | /* | |
1604 | * RF value list for RF5222 | |
1605 | * Supports: 2.4 GHz & 5.2 GHz | |
1606 | */ | |
1607 | static const struct rf_channel rf_vals_5222[] = { | |
1608 | { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b }, | |
1609 | { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b }, | |
1610 | { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b }, | |
1611 | { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b }, | |
1612 | { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b }, | |
1613 | { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b }, | |
1614 | { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b }, | |
1615 | { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b }, | |
1616 | { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b }, | |
1617 | { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b }, | |
1618 | { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b }, | |
1619 | { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b }, | |
1620 | { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b }, | |
1621 | { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b }, | |
1622 | ||
1623 | /* 802.11 UNI / HyperLan 2 */ | |
1624 | { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f }, | |
1625 | { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f }, | |
1626 | { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f }, | |
1627 | { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f }, | |
1628 | { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f }, | |
1629 | { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f }, | |
1630 | { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f }, | |
1631 | { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f }, | |
1632 | ||
1633 | /* 802.11 HyperLan 2 */ | |
1634 | { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f }, | |
1635 | { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f }, | |
1636 | { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f }, | |
1637 | { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f }, | |
1638 | { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f }, | |
1639 | { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f }, | |
1640 | { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f }, | |
1641 | { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f }, | |
1642 | { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f }, | |
1643 | { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f }, | |
1644 | ||
1645 | /* 802.11 UNII */ | |
1646 | { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f }, | |
1647 | { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 }, | |
1648 | { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 }, | |
1649 | { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 }, | |
1650 | { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 }, | |
1651 | }; | |
1652 | ||
8c5e7a5f | 1653 | static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) |
95ea3627 ID |
1654 | { |
1655 | struct hw_mode_spec *spec = &rt2x00dev->spec; | |
8c5e7a5f ID |
1656 | struct channel_info *info; |
1657 | char *tx_power; | |
95ea3627 ID |
1658 | unsigned int i; |
1659 | ||
1660 | /* | |
1661 | * Initialize all hw fields. | |
1662 | */ | |
1663 | rt2x00dev->hw->flags = | |
95ea3627 | 1664 | IEEE80211_HW_RX_INCLUDES_FCS | |
566bfe5a BR |
1665 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1666 | IEEE80211_HW_SIGNAL_DBM; | |
1667 | ||
95ea3627 | 1668 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; |
95ea3627 | 1669 | |
14a3bf89 | 1670 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
95ea3627 ID |
1671 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
1672 | rt2x00_eeprom_addr(rt2x00dev, | |
1673 | EEPROM_MAC_ADDR_0)); | |
1674 | ||
95ea3627 ID |
1675 | /* |
1676 | * Initialize hw_mode information. | |
1677 | */ | |
31562e80 ID |
1678 | spec->supported_bands = SUPPORT_BAND_2GHZ; |
1679 | spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; | |
95ea3627 ID |
1680 | |
1681 | if (rt2x00_rf(&rt2x00dev->chip, RF2522)) { | |
1682 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); | |
1683 | spec->channels = rf_vals_bg_2522; | |
1684 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) { | |
1685 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); | |
1686 | spec->channels = rf_vals_bg_2523; | |
1687 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) { | |
1688 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); | |
1689 | spec->channels = rf_vals_bg_2524; | |
1690 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) { | |
1691 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); | |
1692 | spec->channels = rf_vals_bg_2525; | |
1693 | } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { | |
1694 | spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); | |
1695 | spec->channels = rf_vals_bg_2525e; | |
1696 | } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) { | |
31562e80 | 1697 | spec->supported_bands |= SUPPORT_BAND_5GHZ; |
95ea3627 ID |
1698 | spec->num_channels = ARRAY_SIZE(rf_vals_5222); |
1699 | spec->channels = rf_vals_5222; | |
95ea3627 | 1700 | } |
8c5e7a5f ID |
1701 | |
1702 | /* | |
1703 | * Create channel information array | |
1704 | */ | |
1705 | info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL); | |
1706 | if (!info) | |
1707 | return -ENOMEM; | |
1708 | ||
1709 | spec->channels_info = info; | |
1710 | ||
1711 | tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START); | |
1712 | for (i = 0; i < 14; i++) | |
1713 | info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]); | |
1714 | ||
1715 | if (spec->num_channels > 14) { | |
1716 | for (i = 14; i < spec->num_channels; i++) | |
1717 | info[i].tx_power1 = DEFAULT_TXPOWER; | |
1718 | } | |
1719 | ||
1720 | return 0; | |
95ea3627 ID |
1721 | } |
1722 | ||
1723 | static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) | |
1724 | { | |
1725 | int retval; | |
1726 | ||
1727 | /* | |
1728 | * Allocate eeprom data. | |
1729 | */ | |
1730 | retval = rt2500usb_validate_eeprom(rt2x00dev); | |
1731 | if (retval) | |
1732 | return retval; | |
1733 | ||
1734 | retval = rt2500usb_init_eeprom(rt2x00dev); | |
1735 | if (retval) | |
1736 | return retval; | |
1737 | ||
1738 | /* | |
1739 | * Initialize hw specifications. | |
1740 | */ | |
8c5e7a5f ID |
1741 | retval = rt2500usb_probe_hw_mode(rt2x00dev); |
1742 | if (retval) | |
1743 | return retval; | |
95ea3627 ID |
1744 | |
1745 | /* | |
181d6902 | 1746 | * This device requires the atim queue |
95ea3627 | 1747 | */ |
181d6902 ID |
1748 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1749 | __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | |
3a643d24 | 1750 | __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags); |
d06193f3 | 1751 | __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags); |
95ea3627 ID |
1752 | |
1753 | /* | |
1754 | * Set the rssi offset. | |
1755 | */ | |
1756 | rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET; | |
1757 | ||
1758 | return 0; | |
1759 | } | |
1760 | ||
95ea3627 ID |
1761 | static const struct ieee80211_ops rt2500usb_mac80211_ops = { |
1762 | .tx = rt2x00mac_tx, | |
4150c572 JB |
1763 | .start = rt2x00mac_start, |
1764 | .stop = rt2x00mac_stop, | |
95ea3627 ID |
1765 | .add_interface = rt2x00mac_add_interface, |
1766 | .remove_interface = rt2x00mac_remove_interface, | |
1767 | .config = rt2x00mac_config, | |
1768 | .config_interface = rt2x00mac_config_interface, | |
3a643d24 | 1769 | .configure_filter = rt2x00mac_configure_filter, |
95ea3627 | 1770 | .get_stats = rt2x00mac_get_stats, |
471b3efd | 1771 | .bss_info_changed = rt2x00mac_bss_info_changed, |
95ea3627 ID |
1772 | .conf_tx = rt2x00mac_conf_tx, |
1773 | .get_tx_stats = rt2x00mac_get_tx_stats, | |
95ea3627 ID |
1774 | }; |
1775 | ||
1776 | static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { | |
1777 | .probe_hw = rt2500usb_probe_hw, | |
1778 | .initialize = rt2x00usb_initialize, | |
1779 | .uninitialize = rt2x00usb_uninitialize, | |
798b7adb | 1780 | .clear_entry = rt2x00usb_clear_entry, |
95ea3627 ID |
1781 | .set_device_state = rt2500usb_set_device_state, |
1782 | .link_stats = rt2500usb_link_stats, | |
1783 | .reset_tuner = rt2500usb_reset_tuner, | |
1784 | .link_tuner = rt2500usb_link_tuner, | |
1785 | .write_tx_desc = rt2500usb_write_tx_desc, | |
1786 | .write_tx_data = rt2x00usb_write_tx_data, | |
bd88a781 | 1787 | .write_beacon = rt2500usb_write_beacon, |
dd9fa2d2 | 1788 | .get_tx_data_len = rt2500usb_get_tx_data_len, |
95ea3627 ID |
1789 | .kick_tx_queue = rt2500usb_kick_tx_queue, |
1790 | .fill_rxdone = rt2500usb_fill_rxdone, | |
3a643d24 | 1791 | .config_filter = rt2500usb_config_filter, |
6bb40dd1 | 1792 | .config_intf = rt2500usb_config_intf, |
72810379 | 1793 | .config_erp = rt2500usb_config_erp, |
e4ea1c40 | 1794 | .config_ant = rt2500usb_config_ant, |
95ea3627 ID |
1795 | .config = rt2500usb_config, |
1796 | }; | |
1797 | ||
181d6902 ID |
1798 | static const struct data_queue_desc rt2500usb_queue_rx = { |
1799 | .entry_num = RX_ENTRIES, | |
1800 | .data_size = DATA_FRAME_SIZE, | |
1801 | .desc_size = RXD_DESC_SIZE, | |
b8be63ff | 1802 | .priv_size = sizeof(struct queue_entry_priv_usb), |
181d6902 ID |
1803 | }; |
1804 | ||
1805 | static const struct data_queue_desc rt2500usb_queue_tx = { | |
1806 | .entry_num = TX_ENTRIES, | |
1807 | .data_size = DATA_FRAME_SIZE, | |
1808 | .desc_size = TXD_DESC_SIZE, | |
b8be63ff | 1809 | .priv_size = sizeof(struct queue_entry_priv_usb), |
181d6902 ID |
1810 | }; |
1811 | ||
1812 | static const struct data_queue_desc rt2500usb_queue_bcn = { | |
1813 | .entry_num = BEACON_ENTRIES, | |
1814 | .data_size = MGMT_FRAME_SIZE, | |
1815 | .desc_size = TXD_DESC_SIZE, | |
1816 | .priv_size = sizeof(struct queue_entry_priv_usb_bcn), | |
1817 | }; | |
1818 | ||
1819 | static const struct data_queue_desc rt2500usb_queue_atim = { | |
1820 | .entry_num = ATIM_ENTRIES, | |
1821 | .data_size = DATA_FRAME_SIZE, | |
1822 | .desc_size = TXD_DESC_SIZE, | |
b8be63ff | 1823 | .priv_size = sizeof(struct queue_entry_priv_usb), |
181d6902 ID |
1824 | }; |
1825 | ||
95ea3627 | 1826 | static const struct rt2x00_ops rt2500usb_ops = { |
2360157c | 1827 | .name = KBUILD_MODNAME, |
6bb40dd1 ID |
1828 | .max_sta_intf = 1, |
1829 | .max_ap_intf = 1, | |
95ea3627 ID |
1830 | .eeprom_size = EEPROM_SIZE, |
1831 | .rf_size = RF_SIZE, | |
61448f88 | 1832 | .tx_queues = NUM_TX_QUEUES, |
181d6902 ID |
1833 | .rx = &rt2500usb_queue_rx, |
1834 | .tx = &rt2500usb_queue_tx, | |
1835 | .bcn = &rt2500usb_queue_bcn, | |
1836 | .atim = &rt2500usb_queue_atim, | |
95ea3627 ID |
1837 | .lib = &rt2500usb_rt2x00_ops, |
1838 | .hw = &rt2500usb_mac80211_ops, | |
1839 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | |
1840 | .debugfs = &rt2500usb_rt2x00debug, | |
1841 | #endif /* CONFIG_RT2X00_LIB_DEBUGFS */ | |
1842 | }; | |
1843 | ||
1844 | /* | |
1845 | * rt2500usb module information. | |
1846 | */ | |
1847 | static struct usb_device_id rt2500usb_device_table[] = { | |
1848 | /* ASUS */ | |
1849 | { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1850 | { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1851 | /* Belkin */ | |
1852 | { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1853 | { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1854 | { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1855 | /* Cisco Systems */ | |
1856 | { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1857 | { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1858 | { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1859 | /* Conceptronic */ | |
1860 | { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1861 | /* D-LINK */ | |
1862 | { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1863 | /* Gigabyte */ | |
1864 | { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1865 | { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1866 | /* Hercules */ | |
1867 | { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1868 | /* Melco */ | |
db433feb | 1869 | { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) }, |
95ea3627 ID |
1870 | { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) }, |
1871 | { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1872 | { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1873 | { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
95ea3627 ID |
1874 | /* MSI */ |
1875 | { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1876 | { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1877 | { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1878 | /* Ralink */ | |
1879 | { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1880 | { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1881 | { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1882 | { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1883 | /* Siemens */ | |
1884 | { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1885 | /* SMC */ | |
1886 | { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1887 | /* Spairon */ | |
1888 | { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1889 | /* Trust */ | |
1890 | { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1891 | /* Zinwell */ | |
1892 | { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) }, | |
1893 | { 0, } | |
1894 | }; | |
1895 | ||
1896 | MODULE_AUTHOR(DRV_PROJECT); | |
1897 | MODULE_VERSION(DRV_VERSION); | |
1898 | MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver."); | |
1899 | MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards"); | |
1900 | MODULE_DEVICE_TABLE(usb, rt2500usb_device_table); | |
1901 | MODULE_LICENSE("GPL"); | |
1902 | ||
1903 | static struct usb_driver rt2500usb_driver = { | |
2360157c | 1904 | .name = KBUILD_MODNAME, |
95ea3627 ID |
1905 | .id_table = rt2500usb_device_table, |
1906 | .probe = rt2x00usb_probe, | |
1907 | .disconnect = rt2x00usb_disconnect, | |
1908 | .suspend = rt2x00usb_suspend, | |
1909 | .resume = rt2x00usb_resume, | |
1910 | }; | |
1911 | ||
1912 | static int __init rt2500usb_init(void) | |
1913 | { | |
1914 | return usb_register(&rt2500usb_driver); | |
1915 | } | |
1916 | ||
1917 | static void __exit rt2500usb_exit(void) | |
1918 | { | |
1919 | usb_deregister(&rt2500usb_driver); | |
1920 | } | |
1921 | ||
1922 | module_init(rt2500usb_init); | |
1923 | module_exit(rt2500usb_exit); |