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rt2x00: Check IEEE80211_TXCTL_SEND_AFTER_DTIM flag
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
CommitLineData
95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
38/*
39 * Register access.
40 * All access to the CSR registers will go through the methods
41 * rt2500usb_register_read and rt2500usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
3d82346c
AB		 50 * If the usb_cache_mutex is already held then the _lock variants must
51 * be used instead.
95ea3627 52 */
0e14f6d3 53static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 54 const unsigned int offset,
55 u16 *value)
56{
57 __le16 reg;
58 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
59 USB_VENDOR_REQUEST_IN, offset,
60 &reg, sizeof(u16), REGISTER_TIMEOUT);
61 *value = le16_to_cpu(reg);
62}
63
3d82346c
AB		 64static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
65 const unsigned int offset,
66 u16 *value)
67{
68 __le16 reg;
69 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
70 USB_VENDOR_REQUEST_IN, offset,
71 &reg, sizeof(u16), REGISTER_TIMEOUT);
72 *value = le16_to_cpu(reg);
73}
74
0e14f6d3 75static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 76 const unsigned int offset,
77 void *value, const u16 length)
78{
79 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
80 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
81 USB_VENDOR_REQUEST_IN, offset,
82 value, length, timeout);
83}
84
0e14f6d3 85static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 86 const unsigned int offset,
87 u16 value)
88{
89 __le16 reg = cpu_to_le16(value);
90 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
91 USB_VENDOR_REQUEST_OUT, offset,
92 &reg, sizeof(u16), REGISTER_TIMEOUT);
93}
94
3d82346c
AB		 95static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
96 const unsigned int offset,
97 u16 value)
98{
99 __le16 reg = cpu_to_le16(value);
100 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
101 USB_VENDOR_REQUEST_OUT, offset,
102 &reg, sizeof(u16), REGISTER_TIMEOUT);
103}
104
0e14f6d3 105static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 106 const unsigned int offset,
107 void *value, const u16 length)
108{
109 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
110 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
111 USB_VENDOR_REQUEST_OUT, offset,
112 value, length, timeout);
113}
114
0e14f6d3 115static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 116{
117 u16 reg;
118 unsigned int i;
119
120 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 121 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
95ea3627
ID		 122 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
123 break;
124 udelay(REGISTER_BUSY_DELAY);
125 }
126
127 return reg;
128}
129
0e14f6d3 130static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 131 const unsigned int word, const u8 value)
132{
133 u16 reg;
134
3d82346c
AB		 135 mutex_lock(&rt2x00dev->usb_cache_mutex);
136
95ea3627
ID		 137 /*
138 * Wait until the BBP becomes ready.
139 */
140 reg = rt2500usb_bbp_check(rt2x00dev);
141 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
142 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
3d82346c 143 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 144 return;
145 }
146
147 /*
148 * Write the data into the BBP.
149 */
150 reg = 0;
151 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
152 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
153 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
154
3d82346c
AB		 155 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
156
157 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 158}
159
0e14f6d3 160static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 161 const unsigned int word, u8 *value)
162{
163 u16 reg;
164
3d82346c
AB		 165 mutex_lock(&rt2x00dev->usb_cache_mutex);
166
95ea3627
ID		 167 /*
168 * Wait until the BBP becomes ready.
169 */
170 reg = rt2500usb_bbp_check(rt2x00dev);
171 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
172 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
173 return;
174 }
175
176 /*
177 * Write the request into the BBP.
178 */
179 reg = 0;
180 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
181 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
182
3d82346c 183 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627
ID		 184
185 /*
186 * Wait until the BBP becomes ready.
187 */
188 reg = rt2500usb_bbp_check(rt2x00dev);
189 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
190 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
191 *value = 0xff;
3d82346c 192 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 193 return;
194 }
195
3d82346c 196 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c
AB		 198
199 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
206 unsigned int i;
207
208 if (!word)
209 return;
210
3d82346c
AB		 211 mutex_lock(&rt2x00dev->usb_cache_mutex);
212
95ea3627 213 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 214 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
95ea3627
ID		 215 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
216 goto rf_write;
217 udelay(REGISTER_BUSY_DELAY);
218 }
219
3d82346c 220 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 221 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
222 return;
223
224rf_write:
225 reg = 0;
226 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
3d82346c 227 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
95ea3627
ID		 228
229 reg = 0;
230 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
231 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
232 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
233 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
234
3d82346c 235 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
95ea3627 236 rt2x00_rf_write(rt2x00dev, word, value);
3d82346c
AB		 237
238 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 239}
240
241#ifdef CONFIG_RT2X00_LIB_DEBUGFS
242#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
243
0e14f6d3 244static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 245 const unsigned int word, u32 *data)
246{
247 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
248}
249
0e14f6d3 250static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 251 const unsigned int word, u32 data)
252{
253 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
254}
255
256static const struct rt2x00debug rt2500usb_rt2x00debug = {
257 .owner = THIS_MODULE,
258 .csr = {
259 .read = rt2500usb_read_csr,
260 .write = rt2500usb_write_csr,
261 .word_size = sizeof(u16),
262 .word_count = CSR_REG_SIZE / sizeof(u16),
263 },
264 .eeprom = {
265 .read = rt2x00_eeprom_read,
266 .write = rt2x00_eeprom_write,
267 .word_size = sizeof(u16),
268 .word_count = EEPROM_SIZE / sizeof(u16),
269 },
270 .bbp = {
271 .read = rt2500usb_bbp_read,
272 .write = rt2500usb_bbp_write,
273 .word_size = sizeof(u8),
274 .word_count = BBP_SIZE / sizeof(u8),
275 },
276 .rf = {
277 .read = rt2x00_rf_read,
278 .write = rt2500usb_rf_write,
279 .word_size = sizeof(u32),
280 .word_count = RF_SIZE / sizeof(u32),
281 },
282};
283#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
284
a9450b70
ID		 285#ifdef CONFIG_RT2500USB_LEDS
286static void rt2500usb_led_brightness(struct led_classdev *led_cdev,
287 enum led_brightness brightness)
288{
289 struct rt2x00_led *led =
290 container_of(led_cdev, struct rt2x00_led, led_dev);
291 unsigned int enabled = brightness != LED_OFF;
292 unsigned int activity =
293 led->rt2x00dev->led_flags & LED_SUPPORT_ACTIVITY;
a9450b70 294
47b10cd1
ID		 295 if (in_atomic()) {
296 NOTICE(led->rt2x00dev,
61191fb2
LC		 297 "Ignoring LED brightness command for led %d\n",
298 led->type);
47b10cd1
ID		 299 return;
300 }
301
a9450b70 302 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC) {
3b640f21
ID		 303 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
304 MAC_CSR20_LINK, enabled);
305 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
306 MAC_CSR20_ACTIVITY, enabled && activity);
a9450b70
ID		 307 }
308
47b10cd1
ID		 309 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20,
310 led->rt2x00dev->led_mcu_reg);
a9450b70
ID		 311}
312#else
313#define rt2500usb_led_brightness NULL
314#endif /* CONFIG_RT2500USB_LEDS */
315
95ea3627
ID		 316/*
317 * Configuration handlers.
318 */
6bb40dd1
ID		 319static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
320 struct rt2x00_intf *intf,
321 struct rt2x00intf_conf *conf,
322 const unsigned int flags)
95ea3627 323{
6bb40dd1 324 unsigned int bcn_preload;
95ea3627
ID		 325 u16 reg;
326
6bb40dd1 327 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 328 /*
329 * Enable beacon config
330 */
331 bcn_preload = PREAMBLE + get_duration(IEEE80211_HEADER, 20);
332 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
333 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
334 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
335 2 * (conf->type != IEEE80211_IF_TYPE_STA));
336 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 337
6bb40dd1
ID		 338 /*
339 * Enable synchronisation.
340 */
341 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
342 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
343 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
344
345 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
6bb40dd1
ID		 346 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
347 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
348 }
95ea3627 349
6bb40dd1
ID		 350 if (flags & CONFIG_UPDATE_MAC)
351 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
352 (3 * sizeof(__le16)));
353
354 if (flags & CONFIG_UPDATE_BSSID)
355 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
356 (3 * sizeof(__le16)));
95ea3627
ID		 357}
358
6bb40dd1
ID		 359static int rt2500usb_config_preamble(struct rt2x00_dev *rt2x00dev,
360 const int short_preamble,
361 const int ack_timeout,
362 const int ack_consume_time)
95ea3627 363{
95ea3627 364 u16 reg;
95ea3627 365
5c58ee51 366 /*
6bb40dd1
ID		 367 * When in atomic context, we should let rt2x00lib
368 * try this configuration again later.
5c58ee51 369 */
6bb40dd1
ID		 370 if (in_atomic())
371 return -EAGAIN;
95ea3627
ID		 372
373 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
5c58ee51 374 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, ack_timeout);
95ea3627
ID		 375 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
376
377 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 378 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
5c58ee51 379 !!short_preamble);
95ea3627 380 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
6bb40dd1
ID		 381
382 return 0;
95ea3627
ID		 383}
384
385static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51 386 const int basic_rate_mask)
95ea3627 387{
5c58ee51 388 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627
ID		 389}
390
391static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 392 struct rf_channel *rf, const int txpower)
95ea3627 393{
95ea3627
ID		 394 /*
395 * Set TXpower.
396 */
5c58ee51 397 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID		 398
399 /*
400 * For RT2525E we should first set the channel to half band higher.
401 */
402 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
403 static const u32 vals[] = {
404 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
405 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
406 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
407 0x00000902, 0x00000906
408 };
409
5c58ee51
ID		 410 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
411 if (rf->rf4)
412 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 413 }
414
5c58ee51
ID		 415 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
416 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
417 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
418 if (rf->rf4)
419 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 420}
421
422static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
423 const int txpower)
424{
425 u32 rf3;
426
427 rt2x00_rf_read(rt2x00dev, 3, &rf3);
428 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
429 rt2500usb_rf_write(rt2x00dev, 3, rf3);
430}
431
432static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 433 struct antenna_setup *ant)
95ea3627
ID		 434{
435 u8 r2;
436 u8 r14;
437 u16 csr5;
438 u16 csr6;
439
a4fe07d9
ID		 440 /*
441 * We should never come here because rt2x00lib is supposed
442 * to catch this and send us the correct antenna explicitely.
443 */
444 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
445 ant->tx == ANTENNA_SW_DIVERSITY);
446
95ea3627
ID		 447 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
448 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
449 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
450 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
451
452 /*
453 * Configure the TX antenna.
454 */
addc81bd 455 switch (ant->tx) {
95ea3627
ID		 456 case ANTENNA_HW_DIVERSITY:
457 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
458 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
459 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
460 break;
461 case ANTENNA_A:
462 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
463 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
464 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
465 break;
466 case ANTENNA_B:
a4fe07d9 467 default:
95ea3627
ID		 468 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
469 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
470 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
471 break;
472 }
473
474 /*
475 * Configure the RX antenna.
476 */
addc81bd 477 switch (ant->rx) {
95ea3627
ID		 478 case ANTENNA_HW_DIVERSITY:
479 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
480 break;
481 case ANTENNA_A:
482 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
483 break;
484 case ANTENNA_B:
a4fe07d9 485 default:
95ea3627
ID		 486 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
487 break;
488 }
489
490 /*
491 * RT2525E and RT5222 need to flip TX I/Q
492 */
493 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
494 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
495 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
496 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
497 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
498
499 /*
500 * RT2525E does not need RX I/Q Flip.
501 */
502 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
503 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
504 } else {
505 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
506 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
507 }
508
509 rt2500usb_bbp_write(rt2x00dev, 2, r2);
510 rt2500usb_bbp_write(rt2x00dev, 14, r14);
511 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
512 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
513}
514
515static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 516 struct rt2x00lib_conf *libconf)
95ea3627
ID		 517{
518 u16 reg;
519
5c58ee51 520 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
f5507ce9
ID		 521 rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
522 rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
95ea3627
ID		 523
524 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 525 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
526 libconf->conf->beacon_int * 4);
95ea3627
ID		 527 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
528}
529
530static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 531 struct rt2x00lib_conf *libconf,
532 const unsigned int flags)
95ea3627 533{
95ea3627 534 if (flags & CONFIG_UPDATE_PHYMODE)
f5507ce9 535 rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
95ea3627 536 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID		 537 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
538 libconf->conf->power_level);
95ea3627 539 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID		 540 rt2500usb_config_txpower(rt2x00dev,
541 libconf->conf->power_level);
95ea3627 542 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 543 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 544 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 545 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 546}
547
95ea3627
ID		 548/*
549 * Link tuning
550 */
ebcf26da
ID		 551static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
552 struct link_qual *qual)
95ea3627
ID		 553{
554 u16 reg;
555
556 /*
557 * Update FCS error count from register.
558 */
559 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 560 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 561
562 /*
563 * Update False CCA count from register.
564 */
565 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 566 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 567}
568
569static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
570{
571 u16 eeprom;
572 u16 value;
573
574 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
575 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
576 rt2500usb_bbp_write(rt2x00dev, 24, value);
577
578 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
579 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
580 rt2500usb_bbp_write(rt2x00dev, 25, value);
581
582 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
583 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
584 rt2500usb_bbp_write(rt2x00dev, 61, value);
585
586 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
587 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
588 rt2500usb_bbp_write(rt2x00dev, 17, value);
589
590 rt2x00dev->link.vgc_level = value;
591}
592
593static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
594{
595 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
596 u16 bbp_thresh;
597 u16 vgc_bound;
598 u16 sens;
599 u16 r24;
600 u16 r25;
601 u16 r61;
602 u16 r17_sens;
603 u8 r17;
604 u8 up_bound;
605 u8 low_bound;
606
6bb40dd1
ID		 607 /*
608 * Read current r17 value, as well as the sensitivity values
609 * for the r17 register.
610 */
611 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
612 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
613
614 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
615 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
616 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
617
618 /*
619 * If we are not associated, we should go straight to the
620 * dynamic CCA tuning.
621 */
622 if (!rt2x00dev->intf_associated)
623 goto dynamic_cca_tune;
624
95ea3627
ID		 625 /*
626 * Determine the BBP tuning threshold and correctly
627 * set BBP 24, 25 and 61.
628 */
629 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
630 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
631
632 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
633 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
634 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
635
636 if ((rssi + bbp_thresh) > 0) {
637 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
638 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
639 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
640 } else {
641 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
642 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
643 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
644 }
645
646 rt2500usb_bbp_write(rt2x00dev, 24, r24);
647 rt2500usb_bbp_write(rt2x00dev, 25, r25);
648 rt2500usb_bbp_write(rt2x00dev, 61, r61);
649
95ea3627
ID		 650 /*
651 * A too low RSSI will cause too much false CCA which will
652 * then corrupt the R17 tuning. To remidy this the tuning should
653 * be stopped (While making sure the R17 value will not exceed limits)
654 */
655 if (rssi >= -40) {
656 if (r17 != 0x60)
657 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
658 return;
659 }
660
661 /*
662 * Special big-R17 for short distance
663 */
664 if (rssi >= -58) {
665 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
666 if (r17 != sens)
667 rt2500usb_bbp_write(rt2x00dev, 17, sens);
668 return;
669 }
670
671 /*
672 * Special mid-R17 for middle distance
673 */
674 if (rssi >= -74) {
675 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
676 if (r17 != sens)
677 rt2500usb_bbp_write(rt2x00dev, 17, sens);
678 return;
679 }
680
681 /*
682 * Leave short or middle distance condition, restore r17
683 * to the dynamic tuning range.
684 */
95ea3627 685 low_bound = 0x32;
6bb40dd1
ID		 686 if (rssi < -77)
687 up_bound -= (-77 - rssi);
95ea3627
ID		 688
689 if (up_bound < low_bound)
690 up_bound = low_bound;
691
692 if (r17 > up_bound) {
693 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
694 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 695 return;
696 }
697
698dynamic_cca_tune:
699
700 /*
701 * R17 is inside the dynamic tuning range,
702 * start tuning the link based on the false cca counter.
703 */
704 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 705 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
706 rt2x00dev->link.vgc_level = r17;
ebcf26da 707 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 708 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
709 rt2x00dev->link.vgc_level = r17;
710 }
711}
712
713/*
714 * Initialization functions.
715 */
716static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
717{
718 u16 reg;
719
720 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
721 USB_MODE_TEST, REGISTER_TIMEOUT);
722 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
723 0x00f0, REGISTER_TIMEOUT);
724
725 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
726 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
727 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
728
729 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
730 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
731
732 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
733 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
734 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
735 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
736 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
737
738 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
739 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
740 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
741 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
742 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
743
a9450b70
ID		 744 rt2500usb_register_read(rt2x00dev, MAC_CSR21, &reg);
745 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, 70);
746 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, 30);
747 rt2500usb_register_write(rt2x00dev, MAC_CSR21, reg);
748
95ea3627
ID		 749 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
750 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
751 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
752 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
753 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
754 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
755
756 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
757 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
758 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
759 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
760 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
761 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
762
763 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
764 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
765 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
766 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
767 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
768 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
769
770 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
771 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
772 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
773 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
774 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
775 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
776
777 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
778 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
779
780 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
781 return -EBUSY;
782
783 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
784 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
785 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
786 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
787 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
788
755a957d 789 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 790 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 791 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 792 } else {
ddc827f9
ID		 793 reg = 0;
794 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
795 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 796 }
797 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
798
799 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
800 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
801 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
802 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
803
804 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
805 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
806 rt2x00dev->rx->data_size);
807 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
808
809 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
810 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
811 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
812 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
813
814 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
815 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
816 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
817
818 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
819 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
820 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
821
822 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
823 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
824 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
825
826 return 0;
827}
828
829static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
830{
831 unsigned int i;
832 u16 eeprom;
833 u8 value;
834 u8 reg_id;
835
836 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
837 rt2500usb_bbp_read(rt2x00dev, 0, &value);
838 if ((value != 0xff) && (value != 0x00))
839 goto continue_csr_init;
840 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
841 udelay(REGISTER_BUSY_DELAY);
842 }
843
844 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
845 return -EACCES;
846
847continue_csr_init:
848 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
849 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
850 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
851 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
852 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
853 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
854 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
855 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
856 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
857 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
858 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
859 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
860 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
861 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
862 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
863 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
864 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
865 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
866 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
867 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
868 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
869 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
870 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
871 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
872 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
873 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
874 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
875 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
876 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
877 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
878 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
879
95ea3627
ID		 880 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
881 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
882
883 if (eeprom != 0xffff && eeprom != 0x0000) {
884 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
885 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 886 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
887 }
888 }
95ea3627
ID		 889
890 return 0;
891}
892
893/*
894 * Device state switch handlers.
895 */
896static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
897 enum dev_state state)
898{
899 u16 reg;
900
901 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
902 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
903 state == STATE_RADIO_RX_OFF);
904 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
905}
906
907static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
908{
909 /*
910 * Initialize all registers.
911 */
912 if (rt2500usb_init_registers(rt2x00dev) ||
913 rt2500usb_init_bbp(rt2x00dev)) {
914 ERROR(rt2x00dev, "Register initialization failed.\n");
915 return -EIO;
916 }
917
95ea3627
ID		 918 return 0;
919}
920
921static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
922{
95ea3627
ID		 923 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
924 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
925
926 /*
927 * Disable synchronisation.
928 */
929 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
930
931 rt2x00usb_disable_radio(rt2x00dev);
932}
933
934static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
935 enum dev_state state)
936{
937 u16 reg;
938 u16 reg2;
939 unsigned int i;
940 char put_to_sleep;
941 char bbp_state;
942 char rf_state;
943
944 put_to_sleep = (state != STATE_AWAKE);
945
946 reg = 0;
947 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
948 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
949 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
950 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
951 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
952 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
953
954 /*
955 * Device is not guaranteed to be in the requested state yet.
956 * We must wait until the register indicates that the
957 * device has entered the correct state.
958 */
959 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
960 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
961 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
962 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
963 if (bbp_state == state && rf_state == state)
964 return 0;
965 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
966 msleep(30);
967 }
968
969 NOTICE(rt2x00dev, "Device failed to enter state %d, "
970 "current device state: bbp %d and rf %d.\n",
971 state, bbp_state, rf_state);
972
973 return -EBUSY;
974}
975
976static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
977 enum dev_state state)
978{
979 int retval = 0;
980
981 switch (state) {
982 case STATE_RADIO_ON:
983 retval = rt2500usb_enable_radio(rt2x00dev);
984 break;
985 case STATE_RADIO_OFF:
986 rt2500usb_disable_radio(rt2x00dev);
987 break;
988 case STATE_RADIO_RX_ON:
61667d8d
ID		 989 case STATE_RADIO_RX_ON_LINK:
990 rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
991 break;
95ea3627 992 case STATE_RADIO_RX_OFF:
61667d8d
ID		 993 case STATE_RADIO_RX_OFF_LINK:
994 rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
95ea3627
ID		 995 break;
996 case STATE_DEEP_SLEEP:
997 case STATE_SLEEP:
998 case STATE_STANDBY:
999 case STATE_AWAKE:
1000 retval = rt2500usb_set_state(rt2x00dev, state);
1001 break;
1002 default:
1003 retval = -ENOTSUPP;
1004 break;
1005 }
1006
1007 return retval;
1008}
1009
1010/*
1011 * TX descriptor initialization
1012 */
1013static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1014 struct sk_buff *skb,
181d6902 1015 struct txentry_desc *txdesc,
95ea3627
ID		 1016 struct ieee80211_tx_control *control)
1017{
181d6902 1018 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1019 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1020 u32 word;
1021
1022 /*
1023 * Start writing the descriptor words.
1024 */
1025 rt2x00_desc_read(txd, 1, &word);
1026 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
181d6902
ID		 1027 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1028 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1029 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1030 rt2x00_desc_write(txd, 1, word);
1031
1032 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1033 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1034 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1035 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1036 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1037 rt2x00_desc_write(txd, 2, word);
1038
1039 rt2x00_desc_read(txd, 0, &word);
1040 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1041 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1042 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1043 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1044 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1045 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1046 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1047 rt2x00_set_field32(&word, TXD_W0_OFDM,
181d6902 1048 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
95ea3627
ID		 1049 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1050 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
181d6902 1051 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
dd3193e1 1052 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
95ea3627
ID		 1053 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1054 rt2x00_desc_write(txd, 0, word);
1055}
1056
dd9fa2d2 1057static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1058 struct sk_buff *skb)
dd9fa2d2
ID		 1059{
1060 int length;
1061
1062 /*
1063 * The length _must_ be a multiple of 2,
1064 * but it must _not_ be a multiple of the USB packet size.
1065 */
1066 length = roundup(skb->len, 2);
b242e891 1067 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID		 1068
1069 return length;
1070}
1071
95ea3627
ID		 1072/*
1073 * TX data initialization
1074 */
1075static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
5957da4c 1076 const unsigned int queue)
95ea3627
ID		 1077{
1078 u16 reg;
1079
5957da4c 1080 if (queue != RT2X00_BCN_QUEUE_BEACON)
95ea3627
ID		 1081 return;
1082
1083 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1084 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1085 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1086 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID		 1087 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1088 /*
1089 * Beacon generation will fail initially.
1090 * To prevent this we need to register the TXRX_CSR19
1091 * register several times.
1092 */
1093 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1094 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1095 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1096 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1097 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1098 }
1099}
1100
1101/*
1102 * RX control handlers
1103 */
181d6902
ID		 1104static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1105 struct rxdone_entry_desc *rxdesc)
95ea3627 1106{
181d6902
ID		 1107 struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data;
1108 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1109 __le32 *rxd =
1110 (__le32 *)(entry->skb->data +
1111 (priv_rx->urb->actual_length - entry->queue->desc_size));
f855c10b 1112 unsigned int offset = entry->queue->desc_size + 2;
95ea3627
ID		 1113 u32 word0;
1114 u32 word1;
1115
f855c10b
ID		 1116 /*
1117 * Copy descriptor to the available headroom inside the skbuffer.
f855c10b
ID		 1118 */
1119 skb_push(entry->skb, offset);
1120 memcpy(entry->skb->data, rxd, entry->queue->desc_size);
1121 rxd = (__le32 *)entry->skb->data;
f855c10b
ID		 1122
1123 /*
1124 * The descriptor is now aligned to 4 bytes and thus it is
1125 * now safe to read it on all architectures.
1126 */
95ea3627
ID		 1127 rt2x00_desc_read(rxd, 0, &word0);
1128 rt2x00_desc_read(rxd, 1, &word1);
1129
181d6902 1130 rxdesc->flags = 0;
4150c572 1131 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1132 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1133 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1134 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1135
1136 /*
1137 * Obtain the status about this packet.
1138 */
181d6902
ID		 1139 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1140 rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
1141 entry->queue->rt2x00dev->rssi_offset;
1142 rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1143 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1144 rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS);
7d1de806 1145
2ae23854
MN		 1146 /*
1147 * Adjust the skb memory window to the frame boundaries.
1148 */
1149 skb_pull(entry->skb, offset);
1150 skb_trim(entry->skb, rxdesc->size);
1151
7d1de806 1152 /*
f855c10b 1153 * Set descriptor and data pointer.
7d1de806 1154 */
7d1de806 1155 skbdesc->data = entry->skb->data;
647d0ca9 1156 skbdesc->data_len = rxdesc->size;
2ae23854 1157 skbdesc->desc = rxd;
181d6902 1158 skbdesc->desc_len = entry->queue->desc_size;
95ea3627
ID		 1159}
1160
1161/*
1162 * Interrupt functions.
1163 */
1164static void rt2500usb_beacondone(struct urb *urb)
1165{
181d6902
ID		 1166 struct queue_entry *entry = (struct queue_entry *)urb->context;
1167 struct queue_entry_priv_usb_bcn *priv_bcn = entry->priv_data;
95ea3627 1168
181d6902 1169 if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1170 return;
1171
1172 /*
1173 * Check if this was the guardian beacon,
1174 * if that was the case we need to send the real beacon now.
1175 * Otherwise we should free the sk_buffer, the device
1176 * should be doing the rest of the work now.
1177 */
181d6902
ID		 1178 if (priv_bcn->guardian_urb == urb) {
1179 usb_submit_urb(priv_bcn->urb, GFP_ATOMIC);
1180 } else if (priv_bcn->urb == urb) {
1181 dev_kfree_skb(entry->skb);
1182 entry->skb = NULL;
95ea3627
ID		 1183 }
1184}
1185
1186/*
1187 * Device probe functions.
1188 */
1189static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1190{
1191 u16 word;
1192 u8 *mac;
6bb40dd1 1193 u8 bbp;
95ea3627
ID		 1194
1195 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1196
1197 /*
1198 * Start validation of the data that has been read.
1199 */
1200 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1201 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1202 DECLARE_MAC_BUF(macbuf);
1203
95ea3627 1204 random_ether_addr(mac);
0795af57 1205 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1206 }
1207
1208 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1209 if (word == 0xffff) {
1210 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1211 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1212 ANTENNA_SW_DIVERSITY);
1213 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1214 ANTENNA_SW_DIVERSITY);
1215 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1216 LED_MODE_DEFAULT);
95ea3627
ID		 1217 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1218 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1219 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1220 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1221 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1222 }
1223
1224 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1225 if (word == 0xffff) {
1226 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1227 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1228 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1229 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1230 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1231 }
1232
1233 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1234 if (word == 0xffff) {
1235 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1236 DEFAULT_RSSI_OFFSET);
1237 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1238 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1239 }
1240
1241 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1242 if (word == 0xffff) {
1243 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1244 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1245 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1246 }
1247
6bb40dd1
ID		 1248 /*
1249 * Switch lower vgc bound to current BBP R17 value,
1250 * lower the value a bit for better quality.
1251 */
1252 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1253 bbp -= 6;
1254
95ea3627
ID		 1255 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1256 if (word == 0xffff) {
1257 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1258 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1259 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1260 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1261 }
1262
1263 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1264 if (word == 0xffff) {
1265 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1266 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1267 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1268 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
6bb40dd1
ID		 1269 } else {
1270 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1271 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1272 }
1273
1274 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1275 if (word == 0xffff) {
1276 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1277 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1278 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1279 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1280 }
1281
1282 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1283 if (word == 0xffff) {
1284 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1285 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1286 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1287 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1288 }
1289
1290 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1291 if (word == 0xffff) {
1292 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1293 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1294 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1295 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1296 }
1297
1298 return 0;
1299}
1300
1301static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1302{
1303 u16 reg;
1304 u16 value;
1305 u16 eeprom;
1306
1307 /*
1308 * Read EEPROM word for configuration.
1309 */
1310 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1311
1312 /*
1313 * Identify RF chipset.
1314 */
1315 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1316 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1317 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1318
755a957d 1319 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1320 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1321 return -ENODEV;
1322 }
1323
1324 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1325 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1326 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1327 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1328 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1329 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1330 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1331 return -ENODEV;
1332 }
1333
1334 /*
1335 * Identify default antenna configuration.
1336 */
addc81bd 1337 rt2x00dev->default_ant.tx =
95ea3627 1338 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1339 rt2x00dev->default_ant.rx =
95ea3627
ID		 1340 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1341
addc81bd
ID		 1342 /*
1343 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1344 * I am not 100% sure about this, but the legacy drivers do not
1345 * indicate antenna swapping in software is required when
1346 * diversity is enabled.
1347 */
1348 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1349 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1350 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1351 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1352
95ea3627
ID		 1353 /*
1354 * Store led mode, for correct led behaviour.
1355 */
a9450b70
ID		 1356#ifdef CONFIG_RT2500USB_LEDS
1357 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1358
1359 switch (value) {
1360 case LED_MODE_ASUS:
1361 case LED_MODE_ALPHA:
1362 case LED_MODE_DEFAULT:
1363 rt2x00dev->led_flags = LED_SUPPORT_RADIO;
1364 break;
1365 case LED_MODE_TXRX_ACTIVITY:
1366 rt2x00dev->led_flags =
1367 LED_SUPPORT_RADIO | LED_SUPPORT_ACTIVITY;
1368 break;
1369 case LED_MODE_SIGNAL_STRENGTH:
1370 rt2x00dev->led_flags = LED_SUPPORT_RADIO;
1371 break;
1372 }
3b640f21
ID		 1373
1374 /*
1375 * Store the current led register value, we need it later
1376 * in set_brightness but that is called in irq context which
1377 * means we can't use rt2500usb_register_read() at that time.
1378 */
1379 rt2500usb_register_read(rt2x00dev, MAC_CSR20, &rt2x00dev->led_mcu_reg);
a9450b70 1380#endif /* CONFIG_RT2500USB_LEDS */
95ea3627
ID		 1381
1382 /*
1383 * Check if the BBP tuning should be disabled.
1384 */
1385 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1386 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1387 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1388
1389 /*
1390 * Read the RSSI <-> dBm offset information.
1391 */
1392 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1393 rt2x00dev->rssi_offset =
1394 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1395
1396 return 0;
1397}
1398
1399/*
1400 * RF value list for RF2522
1401 * Supports: 2.4 GHz
1402 */
1403static const struct rf_channel rf_vals_bg_2522[] = {
1404 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1405 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1406 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1407 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1408 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1409 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1410 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1411 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1412 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1413 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1414 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1415 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1416 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1417 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1418};
1419
1420/*
1421 * RF value list for RF2523
1422 * Supports: 2.4 GHz
1423 */
1424static const struct rf_channel rf_vals_bg_2523[] = {
1425 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1426 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1427 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1428 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1429 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1430 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1431 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1432 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1433 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1434 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1435 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1436 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1437 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1438 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1439};
1440
1441/*
1442 * RF value list for RF2524
1443 * Supports: 2.4 GHz
1444 */
1445static const struct rf_channel rf_vals_bg_2524[] = {
1446 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1447 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1448 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1449 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1450 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1451 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1452 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1453 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1454 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1455 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1456 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1457 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1458 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1459 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1460};
1461
1462/*
1463 * RF value list for RF2525
1464 * Supports: 2.4 GHz
1465 */
1466static const struct rf_channel rf_vals_bg_2525[] = {
1467 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1468 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1469 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1470 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1471 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1472 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1473 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1474 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1475 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1476 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1477 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1478 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1479 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1480 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1481};
1482
1483/*
1484 * RF value list for RF2525e
1485 * Supports: 2.4 GHz
1486 */
1487static const struct rf_channel rf_vals_bg_2525e[] = {
1488 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1489 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1490 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1491 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1492 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1493 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1494 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1495 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1496 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1497 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1498 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1499 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1500 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1501 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1502};
1503
1504/*
1505 * RF value list for RF5222
1506 * Supports: 2.4 GHz & 5.2 GHz
1507 */
1508static const struct rf_channel rf_vals_5222[] = {
1509 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1510 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1511 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1512 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1513 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1514 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1515 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1516 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1517 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1518 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1519 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1520 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1521 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1522 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1523
1524 /* 802.11 UNI / HyperLan 2 */
1525 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1526 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1527 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1528 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1529 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1530 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1531 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1532 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1533
1534 /* 802.11 HyperLan 2 */
1535 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1536 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1537 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1538 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1539 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1540 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1541 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1542 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1543 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1544 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1545
1546 /* 802.11 UNII */
1547 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1548 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1549 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1550 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1551 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1552};
1553
1554static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1555{
1556 struct hw_mode_spec *spec = &rt2x00dev->spec;
1557 u8 *txpower;
1558 unsigned int i;
1559
1560 /*
1561 * Initialize all hw fields.
1562 */
1563 rt2x00dev->hw->flags =
1564 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1565 IEEE80211_HW_RX_INCLUDES_FCS |
4150c572 1566 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
95ea3627
ID		 1567 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1568 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1569 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1570 rt2x00dev->hw->queues = 2;
1571
1572 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1573 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1574 rt2x00_eeprom_addr(rt2x00dev,
1575 EEPROM_MAC_ADDR_0));
1576
1577 /*
1578 * Convert tx_power array in eeprom.
1579 */
1580 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1581 for (i = 0; i < 14; i++)
1582 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1583
1584 /*
1585 * Initialize hw_mode information.
1586 */
31562e80
ID		 1587 spec->supported_bands = SUPPORT_BAND_2GHZ;
1588 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1589 spec->tx_power_a = NULL;
1590 spec->tx_power_bg = txpower;
1591 spec->tx_power_default = DEFAULT_TXPOWER;
1592
1593 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1594 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1595 spec->channels = rf_vals_bg_2522;
1596 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1597 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1598 spec->channels = rf_vals_bg_2523;
1599 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1600 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1601 spec->channels = rf_vals_bg_2524;
1602 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1603 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1604 spec->channels = rf_vals_bg_2525;
1605 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1606 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1607 spec->channels = rf_vals_bg_2525e;
1608 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1609 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1610 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1611 spec->channels = rf_vals_5222;
95ea3627
ID		 1612 }
1613}
1614
1615static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1616{
1617 int retval;
1618
1619 /*
1620 * Allocate eeprom data.
1621 */
1622 retval = rt2500usb_validate_eeprom(rt2x00dev);
1623 if (retval)
1624 return retval;
1625
1626 retval = rt2500usb_init_eeprom(rt2x00dev);
1627 if (retval)
1628 return retval;
1629
1630 /*
1631 * Initialize hw specifications.
1632 */
1633 rt2500usb_probe_hw_mode(rt2x00dev);
1634
1635 /*
181d6902 1636 * This device requires the atim queue
95ea3627 1637 */
181d6902
ID		 1638 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1639 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
95ea3627
ID		 1640
1641 /*
1642 * Set the rssi offset.
1643 */
1644 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1645
1646 return 0;
1647}
1648
1649/*
1650 * IEEE80211 stack callback functions.
1651 */
4150c572
JB		 1652static void rt2500usb_configure_filter(struct ieee80211_hw *hw,
1653 unsigned int changed_flags,
1654 unsigned int *total_flags,
1655 int mc_count,
1656 struct dev_addr_list *mc_list)
1657{
1658 struct rt2x00_dev *rt2x00dev = hw->priv;
4150c572
JB		 1659 u16 reg;
1660
1661 /*
1662 * Mask off any flags we are going to ignore from
1663 * the total_flags field.
1664 */
1665 *total_flags &=
1666 FIF_ALLMULTI |
1667 FIF_FCSFAIL |
1668 FIF_PLCPFAIL |
1669 FIF_CONTROL |
1670 FIF_OTHER_BSS |
1671 FIF_PROMISC_IN_BSS;
1672
1673 /*
1674 * Apply some rules to the filters:
1675 * - Some filters imply different filters to be set.
1676 * - Some things we can't filter out at all.
4150c572
JB		 1677 */
1678 if (mc_count)
1679 *total_flags |= FIF_ALLMULTI;
5886d0db
ID		 1680 if (*total_flags & FIF_OTHER_BSS ||
1681 *total_flags & FIF_PROMISC_IN_BSS)
4150c572 1682 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
4150c572
JB		 1683
1684 /*
1685 * Check if there is any work left for us.
1686 */
3c4f2085 1687 if (rt2x00dev->packet_filter == *total_flags)
4150c572 1688 return;
3c4f2085 1689 rt2x00dev->packet_filter = *total_flags;
4150c572
JB		 1690
1691 /*
1692 * When in atomic context, reschedule and let rt2x00lib
1693 * call this function again.
1694 */
1695 if (in_atomic()) {
1696 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1697 return;
1698 }
1699
1700 /*
1701 * Start configuration steps.
1702 * Note that the version error will always be dropped
1703 * and broadcast frames will always be accepted since
1704 * there is no filter for it at this time.
1705 */
1706 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
1707 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
1708 !(*total_flags & FIF_FCSFAIL));
1709 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
1710 !(*total_flags & FIF_PLCPFAIL));
1711 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
1712 !(*total_flags & FIF_CONTROL));
1713 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
1714 !(*total_flags & FIF_PROMISC_IN_BSS));
1715 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
1716 !(*total_flags & FIF_PROMISC_IN_BSS));
1717 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
1718 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
1719 !(*total_flags & FIF_ALLMULTI));
1720 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
1721 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
1722}
1723
95ea3627
ID		 1724static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1725 struct sk_buff *skb,
1726 struct ieee80211_tx_control *control)
1727{
1728 struct rt2x00_dev *rt2x00dev = hw->priv;
181d6902 1729 struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev);
6bb40dd1 1730 struct rt2x00_intf *intf = vif_to_intf(control->vif);
181d6902
ID		 1731 struct queue_entry_priv_usb_bcn *priv_bcn;
1732 struct skb_frame_desc *skbdesc;
dd9fa2d2 1733 int pipe = usb_sndbulkpipe(usb_dev, 1);
95ea3627 1734 int length;
8af244cc 1735 u16 reg;
95ea3627 1736
6bb40dd1
ID		 1737 if (unlikely(!intf->beacon))
1738 return -ENOBUFS;
1739
1740 priv_bcn = intf->beacon->priv_data;
95ea3627
ID		 1741
1742 /*
08992f7f 1743 * Add the descriptor in front of the skb.
95ea3627 1744 */
6bb40dd1
ID		 1745 skb_push(skb, intf->beacon->queue->desc_size);
1746 memset(skb->data, 0, intf->beacon->queue->desc_size);
c22eb87b 1747
08992f7f
ID		 1748 /*
1749 * Fill in skb descriptor
1750 */
181d6902
ID		 1751 skbdesc = get_skb_frame_desc(skb);
1752 memset(skbdesc, 0, sizeof(*skbdesc));
baf26a7e 1753 skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
6bb40dd1
ID		 1754 skbdesc->data = skb->data + intf->beacon->queue->desc_size;
1755 skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
181d6902 1756 skbdesc->desc = skb->data;
6bb40dd1
ID		 1757 skbdesc->desc_len = intf->beacon->queue->desc_size;
1758 skbdesc->entry = intf->beacon;
08992f7f 1759
8af244cc
ID		 1760 /*
1761 * Disable beaconing while we are reloading the beacon data,
1762 * otherwise we might be sending out invalid data.
1763 */
1764 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1765 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1766 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1767 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1768 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1769
6bb40dd1 1770 /*
5957da4c
ID		 1771 * mac80211 doesn't provide the control->queue variable
1772 * for beacons. Set our own queue identification so
1773 * it can be used during descriptor initialization.
6bb40dd1 1774 */
5957da4c 1775 control->queue = RT2X00_BCN_QUEUE_BEACON;
08992f7f 1776 rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
95ea3627 1777
08992f7f
ID		 1778 /*
1779 * USB devices cannot blindly pass the skb->len as the
1780 * length of the data to usb_fill_bulk_urb. Pass the skb
1781 * to the driver to determine what the length should be.
1782 */
b242e891 1783 length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
95ea3627 1784
181d6902 1785 usb_fill_bulk_urb(priv_bcn->urb, usb_dev, pipe,
6bb40dd1
ID		 1786 skb->data, length, rt2500usb_beacondone,
1787 intf->beacon);
95ea3627 1788
95ea3627
ID		 1789 /*
1790 * Second we need to create the guardian byte.
1791 * We only need a single byte, so lets recycle
1792 * the 'flags' field we are not using for beacons.
1793 */
181d6902
ID		 1794 priv_bcn->guardian_data = 0;
1795 usb_fill_bulk_urb(priv_bcn->guardian_urb, usb_dev, pipe,
1796 &priv_bcn->guardian_data, 1, rt2500usb_beacondone,
6bb40dd1 1797 intf->beacon);
95ea3627
ID		 1798
1799 /*
1800 * Send out the guardian byte.
1801 */
181d6902 1802 usb_submit_urb(priv_bcn->guardian_urb, GFP_ATOMIC);
95ea3627
ID		 1803
1804 /*
1805 * Enable beacon generation.
1806 */
6bb40dd1 1807 rt2500usb_kick_tx_queue(rt2x00dev, control->queue);
95ea3627
ID		 1808
1809 return 0;
1810}
1811
1812static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1813 .tx = rt2x00mac_tx,
4150c572
JB		 1814 .start = rt2x00mac_start,
1815 .stop = rt2x00mac_stop,
95ea3627
ID		 1816 .add_interface = rt2x00mac_add_interface,
1817 .remove_interface = rt2x00mac_remove_interface,
1818 .config = rt2x00mac_config,
1819 .config_interface = rt2x00mac_config_interface,
4150c572 1820 .configure_filter = rt2500usb_configure_filter,
95ea3627 1821 .get_stats = rt2x00mac_get_stats,
471b3efd 1822 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1823 .conf_tx = rt2x00mac_conf_tx,
1824 .get_tx_stats = rt2x00mac_get_tx_stats,
1825 .beacon_update = rt2500usb_beacon_update,
1826};
1827
1828static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1829 .probe_hw = rt2500usb_probe_hw,
1830 .initialize = rt2x00usb_initialize,
1831 .uninitialize = rt2x00usb_uninitialize,
837e7f24
ID		 1832 .init_rxentry = rt2x00usb_init_rxentry,
1833 .init_txentry = rt2x00usb_init_txentry,
95ea3627
ID		 1834 .set_device_state = rt2500usb_set_device_state,
1835 .link_stats = rt2500usb_link_stats,
1836 .reset_tuner = rt2500usb_reset_tuner,
1837 .link_tuner = rt2500usb_link_tuner,
a9450b70 1838 .led_brightness = rt2500usb_led_brightness,
95ea3627
ID		 1839 .write_tx_desc = rt2500usb_write_tx_desc,
1840 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1841 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1842 .kick_tx_queue = rt2500usb_kick_tx_queue,
1843 .fill_rxdone = rt2500usb_fill_rxdone,
6bb40dd1 1844 .config_intf = rt2500usb_config_intf,
5c58ee51 1845 .config_preamble = rt2500usb_config_preamble,
95ea3627
ID		 1846 .config = rt2500usb_config,
1847};
1848
181d6902
ID		 1849static const struct data_queue_desc rt2500usb_queue_rx = {
1850 .entry_num = RX_ENTRIES,
1851 .data_size = DATA_FRAME_SIZE,
1852 .desc_size = RXD_DESC_SIZE,
1853 .priv_size = sizeof(struct queue_entry_priv_usb_rx),
1854};
1855
1856static const struct data_queue_desc rt2500usb_queue_tx = {
1857 .entry_num = TX_ENTRIES,
1858 .data_size = DATA_FRAME_SIZE,
1859 .desc_size = TXD_DESC_SIZE,
1860 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
1861};
1862
1863static const struct data_queue_desc rt2500usb_queue_bcn = {
1864 .entry_num = BEACON_ENTRIES,
1865 .data_size = MGMT_FRAME_SIZE,
1866 .desc_size = TXD_DESC_SIZE,
1867 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1868};
1869
1870static const struct data_queue_desc rt2500usb_queue_atim = {
1871 .entry_num = ATIM_ENTRIES,
1872 .data_size = DATA_FRAME_SIZE,
1873 .desc_size = TXD_DESC_SIZE,
1874 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
1875};
1876
95ea3627 1877static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1878 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1879 .max_sta_intf = 1,
1880 .max_ap_intf = 1,
95ea3627
ID		 1881 .eeprom_size = EEPROM_SIZE,
1882 .rf_size = RF_SIZE,
181d6902
ID		 1883 .rx = &rt2500usb_queue_rx,
1884 .tx = &rt2500usb_queue_tx,
1885 .bcn = &rt2500usb_queue_bcn,
1886 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1887 .lib = &rt2500usb_rt2x00_ops,
1888 .hw = &rt2500usb_mac80211_ops,
1889#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1890 .debugfs = &rt2500usb_rt2x00debug,
1891#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1892};
1893
1894/*
1895 * rt2500usb module information.
1896 */
1897static struct usb_device_id rt2500usb_device_table[] = {
1898 /* ASUS */
1899 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1900 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1901 /* Belkin */
1902 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1903 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1904 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1905 /* Cisco Systems */
1906 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1907 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1908 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1909 /* Conceptronic */
1910 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1911 /* D-LINK */
1912 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1913 /* Gigabyte */
1914 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1915 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1916 /* Hercules */
1917 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1918 /* Melco */
db433feb 1919 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1920 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1921 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1922 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1923 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1924 /* MSI */
1925 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1926 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1927 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1928 /* Ralink */
1929 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1930 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1931 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1932 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1933 /* Siemens */
1934 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1935 /* SMC */
1936 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1937 /* Spairon */
1938 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1939 /* Trust */
1940 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1941 /* Zinwell */
1942 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1943 { 0, }
1944};
1945
1946MODULE_AUTHOR(DRV_PROJECT);
1947MODULE_VERSION(DRV_VERSION);
1948MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1949MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1950MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1951MODULE_LICENSE("GPL");
1952
1953static struct usb_driver rt2500usb_driver = {
2360157c 1954 .name = KBUILD_MODNAME,
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ID		 1955 .id_table = rt2500usb_device_table,
1956 .probe = rt2x00usb_probe,
1957 .disconnect = rt2x00usb_disconnect,
1958 .suspend = rt2x00usb_suspend,
1959 .resume = rt2x00usb_resume,
1960};
1961
1962static int __init rt2500usb_init(void)
1963{
1964 return usb_register(&rt2500usb_driver);
1965}
1966
1967static void __exit rt2500usb_exit(void)
1968{
1969 usb_deregister(&rt2500usb_driver);
1970}
1971
1972module_init(rt2500usb_init);
1973module_exit(rt2500usb_exit);
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