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rt2x00: Use rt2x00 queue numbering
[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / rt2x00 / rt2500usb.c
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95ea3627 1/*
811aa9ca 2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
95ea3627
ID		 3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2500usb
23 Abstract: rt2500usb device specific routines.
24 Supported chipsets: RT2570.
25 */
26
95ea3627
ID		 27#include <linux/delay.h>
28#include <linux/etherdevice.h>
29#include <linux/init.h>
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/usb.h>
33
34#include "rt2x00.h"
35#include "rt2x00usb.h"
36#include "rt2500usb.h"
37
38/*
39 * Register access.
40 * All access to the CSR registers will go through the methods
41 * rt2500usb_register_read and rt2500usb_register_write.
42 * BBP and RF register require indirect register access,
43 * and use the CSR registers BBPCSR and RFCSR to achieve this.
44 * These indirect registers work with busy bits,
45 * and we will try maximal REGISTER_BUSY_COUNT times to access
46 * the register while taking a REGISTER_BUSY_DELAY us delay
47 * between each attampt. When the busy bit is still set at that time,
48 * the access attempt is considered to have failed,
49 * and we will print an error.
3d82346c
AB		 50 * If the usb_cache_mutex is already held then the _lock variants must
51 * be used instead.
95ea3627 52 */
0e14f6d3 53static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 54 const unsigned int offset,
55 u16 *value)
56{
57 __le16 reg;
58 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
59 USB_VENDOR_REQUEST_IN, offset,
60 &reg, sizeof(u16), REGISTER_TIMEOUT);
61 *value = le16_to_cpu(reg);
62}
63
3d82346c
AB		 64static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
65 const unsigned int offset,
66 u16 *value)
67{
68 __le16 reg;
69 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
70 USB_VENDOR_REQUEST_IN, offset,
71 &reg, sizeof(u16), REGISTER_TIMEOUT);
72 *value = le16_to_cpu(reg);
73}
74
0e14f6d3 75static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 76 const unsigned int offset,
77 void *value, const u16 length)
78{
79 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
80 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
81 USB_VENDOR_REQUEST_IN, offset,
82 value, length, timeout);
83}
84
0e14f6d3 85static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 86 const unsigned int offset,
87 u16 value)
88{
89 __le16 reg = cpu_to_le16(value);
90 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
91 USB_VENDOR_REQUEST_OUT, offset,
92 &reg, sizeof(u16), REGISTER_TIMEOUT);
93}
94
3d82346c
AB		 95static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
96 const unsigned int offset,
97 u16 value)
98{
99 __le16 reg = cpu_to_le16(value);
100 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
101 USB_VENDOR_REQUEST_OUT, offset,
102 &reg, sizeof(u16), REGISTER_TIMEOUT);
103}
104
0e14f6d3 105static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 106 const unsigned int offset,
107 void *value, const u16 length)
108{
109 int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
110 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
111 USB_VENDOR_REQUEST_OUT, offset,
112 value, length, timeout);
113}
114
0e14f6d3 115static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
95ea3627
ID		 116{
117 u16 reg;
118 unsigned int i;
119
120 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 121 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
95ea3627
ID		 122 if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
123 break;
124 udelay(REGISTER_BUSY_DELAY);
125 }
126
127 return reg;
128}
129
0e14f6d3 130static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 131 const unsigned int word, const u8 value)
132{
133 u16 reg;
134
3d82346c
AB		 135 mutex_lock(&rt2x00dev->usb_cache_mutex);
136
95ea3627
ID		 137 /*
138 * Wait until the BBP becomes ready.
139 */
140 reg = rt2500usb_bbp_check(rt2x00dev);
141 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
142 ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
3d82346c 143 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 144 return;
145 }
146
147 /*
148 * Write the data into the BBP.
149 */
150 reg = 0;
151 rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
152 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
153 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
154
3d82346c
AB		 155 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
156
157 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 158}
159
0e14f6d3 160static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 161 const unsigned int word, u8 *value)
162{
163 u16 reg;
164
3d82346c
AB		 165 mutex_lock(&rt2x00dev->usb_cache_mutex);
166
95ea3627
ID		 167 /*
168 * Wait until the BBP becomes ready.
169 */
170 reg = rt2500usb_bbp_check(rt2x00dev);
171 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
172 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
173 return;
174 }
175
176 /*
177 * Write the request into the BBP.
178 */
179 reg = 0;
180 rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
181 rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
182
3d82346c 183 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
95ea3627
ID		 184
185 /*
186 * Wait until the BBP becomes ready.
187 */
188 reg = rt2500usb_bbp_check(rt2x00dev);
189 if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
190 ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
191 *value = 0xff;
3d82346c 192 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 193 return;
194 }
195
3d82346c 196 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
95ea3627 197 *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
3d82346c
AB		 198
199 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 200}
201
0e14f6d3 202static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 203 const unsigned int word, const u32 value)
204{
205 u16 reg;
206 unsigned int i;
207
208 if (!word)
209 return;
210
3d82346c
AB		 211 mutex_lock(&rt2x00dev->usb_cache_mutex);
212
95ea3627 213 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
3d82346c 214 rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
95ea3627
ID		 215 if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
216 goto rf_write;
217 udelay(REGISTER_BUSY_DELAY);
218 }
219
3d82346c 220 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 221 ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
222 return;
223
224rf_write:
225 reg = 0;
226 rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
3d82346c 227 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
95ea3627
ID		 228
229 reg = 0;
230 rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
231 rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
232 rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
233 rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
234
3d82346c 235 rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
95ea3627 236 rt2x00_rf_write(rt2x00dev, word, value);
3d82346c
AB		 237
238 mutex_unlock(&rt2x00dev->usb_cache_mutex);
95ea3627
ID		 239}
240
241#ifdef CONFIG_RT2X00_LIB_DEBUGFS
242#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
243
0e14f6d3 244static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 245 const unsigned int word, u32 *data)
246{
247 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
248}
249
0e14f6d3 250static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID		 251 const unsigned int word, u32 data)
252{
253 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
254}
255
256static const struct rt2x00debug rt2500usb_rt2x00debug = {
257 .owner = THIS_MODULE,
258 .csr = {
259 .read = rt2500usb_read_csr,
260 .write = rt2500usb_write_csr,
261 .word_size = sizeof(u16),
262 .word_count = CSR_REG_SIZE / sizeof(u16),
263 },
264 .eeprom = {
265 .read = rt2x00_eeprom_read,
266 .write = rt2x00_eeprom_write,
267 .word_size = sizeof(u16),
268 .word_count = EEPROM_SIZE / sizeof(u16),
269 },
270 .bbp = {
271 .read = rt2500usb_bbp_read,
272 .write = rt2500usb_bbp_write,
273 .word_size = sizeof(u8),
274 .word_count = BBP_SIZE / sizeof(u8),
275 },
276 .rf = {
277 .read = rt2x00_rf_read,
278 .write = rt2500usb_rf_write,
279 .word_size = sizeof(u32),
280 .word_count = RF_SIZE / sizeof(u32),
281 },
282};
283#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
284
a9450b70 285#ifdef CONFIG_RT2500USB_LEDS
a2e1d52a 286static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
a9450b70
ID		 287 enum led_brightness brightness)
288{
289 struct rt2x00_led *led =
290 container_of(led_cdev, struct rt2x00_led, led_dev);
291 unsigned int enabled = brightness != LED_OFF;
a2e1d52a 292 u16 reg;
a9450b70 293
a2e1d52a 294 rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
47b10cd1 295
a2e1d52a
ID		 296 if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
297 rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
298 else if (led->type == LED_TYPE_ACTIVITY)
299 rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
300
301 rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
302}
303
304static int rt2500usb_blink_set(struct led_classdev *led_cdev,
305 unsigned long *delay_on,
306 unsigned long *delay_off)
307{
308 struct rt2x00_led *led =
309 container_of(led_cdev, struct rt2x00_led, led_dev);
310 u16 reg;
311
312 rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
313 rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
314 rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
315 rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
a9450b70 316
a2e1d52a 317 return 0;
a9450b70 318}
a9450b70
ID		 319#endif /* CONFIG_RT2500USB_LEDS */
320
95ea3627
ID		 321/*
322 * Configuration handlers.
323 */
3a643d24
ID		 324static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
325 const unsigned int filter_flags)
326{
327 u16 reg;
328
329 /*
330 * Start configuration steps.
331 * Note that the version error will always be dropped
332 * and broadcast frames will always be accepted since
333 * there is no filter for it at this time.
334 */
335 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
336 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
337 !(filter_flags & FIF_FCSFAIL));
338 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
339 !(filter_flags & FIF_PLCPFAIL));
340 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
341 !(filter_flags & FIF_CONTROL));
342 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
343 !(filter_flags & FIF_PROMISC_IN_BSS));
344 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
e0b005fa
ID		 345 !(filter_flags & FIF_PROMISC_IN_BSS) &&
346 !rt2x00dev->intf_ap_count);
3a643d24
ID		 347 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
348 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
349 !(filter_flags & FIF_ALLMULTI));
350 rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
351 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
352}
353
6bb40dd1
ID		 354static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
355 struct rt2x00_intf *intf,
356 struct rt2x00intf_conf *conf,
357 const unsigned int flags)
95ea3627 358{
6bb40dd1 359 unsigned int bcn_preload;
95ea3627
ID		 360 u16 reg;
361
6bb40dd1 362 if (flags & CONFIG_UPDATE_TYPE) {
6bb40dd1
ID		 363 /*
364 * Enable beacon config
365 */
366 bcn_preload = PREAMBLE + get_duration(IEEE80211_HEADER, 20);
367 rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
368 rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
369 rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
370 2 * (conf->type != IEEE80211_IF_TYPE_STA));
371 rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
95ea3627 372
6bb40dd1
ID		 373 /*
374 * Enable synchronisation.
375 */
376 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
377 rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
378 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
379
380 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
fd3c91c5 381 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
6bb40dd1 382 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
fd3c91c5 383 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
6bb40dd1
ID		 384 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
385 }
95ea3627 386
6bb40dd1
ID		 387 if (flags & CONFIG_UPDATE_MAC)
388 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
389 (3 * sizeof(__le16)));
390
391 if (flags & CONFIG_UPDATE_BSSID)
392 rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
393 (3 * sizeof(__le16)));
95ea3627
ID		 394}
395
3a643d24
ID		 396static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
397 struct rt2x00lib_erp *erp)
95ea3627 398{
95ea3627 399 u16 reg;
95ea3627 400
95ea3627 401 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
72810379 402 rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
95ea3627
ID		 403 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
404
405 rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
4f5af6eb 406 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
72810379 407 !!erp->short_preamble);
95ea3627
ID		 408 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
409}
410
411static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
5c58ee51 412 const int basic_rate_mask)
95ea3627 413{
5c58ee51 414 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
95ea3627
ID		 415}
416
417static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
5c58ee51 418 struct rf_channel *rf, const int txpower)
95ea3627 419{
95ea3627
ID		 420 /*
421 * Set TXpower.
422 */
5c58ee51 423 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
95ea3627
ID		 424
425 /*
426 * For RT2525E we should first set the channel to half band higher.
427 */
428 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
429 static const u32 vals[] = {
430 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
431 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
432 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
433 0x00000902, 0x00000906
434 };
435
5c58ee51
ID		 436 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
437 if (rf->rf4)
438 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 439 }
440
5c58ee51
ID		 441 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
442 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
443 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
444 if (rf->rf4)
445 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
95ea3627
ID		 446}
447
448static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
449 const int txpower)
450{
451 u32 rf3;
452
453 rt2x00_rf_read(rt2x00dev, 3, &rf3);
454 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
455 rt2500usb_rf_write(rt2x00dev, 3, rf3);
456}
457
458static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
addc81bd 459 struct antenna_setup *ant)
95ea3627
ID		 460{
461 u8 r2;
462 u8 r14;
463 u16 csr5;
464 u16 csr6;
465
a4fe07d9
ID		 466 /*
467 * We should never come here because rt2x00lib is supposed
468 * to catch this and send us the correct antenna explicitely.
469 */
470 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
471 ant->tx == ANTENNA_SW_DIVERSITY);
472
95ea3627
ID		 473 rt2500usb_bbp_read(rt2x00dev, 2, &r2);
474 rt2500usb_bbp_read(rt2x00dev, 14, &r14);
475 rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
476 rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
477
478 /*
479 * Configure the TX antenna.
480 */
addc81bd 481 switch (ant->tx) {
95ea3627
ID		 482 case ANTENNA_HW_DIVERSITY:
483 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
484 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
485 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
486 break;
487 case ANTENNA_A:
488 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
489 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
490 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
491 break;
492 case ANTENNA_B:
a4fe07d9 493 default:
95ea3627
ID		 494 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
495 rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
496 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
497 break;
498 }
499
500 /*
501 * Configure the RX antenna.
502 */
addc81bd 503 switch (ant->rx) {
95ea3627
ID		 504 case ANTENNA_HW_DIVERSITY:
505 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
506 break;
507 case ANTENNA_A:
508 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
509 break;
510 case ANTENNA_B:
a4fe07d9 511 default:
95ea3627
ID		 512 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
513 break;
514 }
515
516 /*
517 * RT2525E and RT5222 need to flip TX I/Q
518 */
519 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
520 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
521 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
522 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
523 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
524
525 /*
526 * RT2525E does not need RX I/Q Flip.
527 */
528 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
529 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
530 } else {
531 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
532 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
533 }
534
535 rt2500usb_bbp_write(rt2x00dev, 2, r2);
536 rt2500usb_bbp_write(rt2x00dev, 14, r14);
537 rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
538 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
539}
540
541static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
5c58ee51 542 struct rt2x00lib_conf *libconf)
95ea3627
ID		 543{
544 u16 reg;
545
5c58ee51 546 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
f5507ce9
ID		 547 rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
548 rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
95ea3627
ID		 549
550 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
5c58ee51
ID		 551 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
552 libconf->conf->beacon_int * 4);
95ea3627
ID		 553 rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
554}
555
556static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
6bb40dd1
ID		 557 struct rt2x00lib_conf *libconf,
558 const unsigned int flags)
95ea3627 559{
95ea3627 560 if (flags & CONFIG_UPDATE_PHYMODE)
f5507ce9 561 rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
95ea3627 562 if (flags & CONFIG_UPDATE_CHANNEL)
5c58ee51
ID		 563 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
564 libconf->conf->power_level);
95ea3627 565 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
5c58ee51
ID		 566 rt2500usb_config_txpower(rt2x00dev,
567 libconf->conf->power_level);
95ea3627 568 if (flags & CONFIG_UPDATE_ANTENNA)
addc81bd 569 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
95ea3627 570 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
5c58ee51 571 rt2500usb_config_duration(rt2x00dev, libconf);
95ea3627
ID		 572}
573
95ea3627
ID		 574/*
575 * Link tuning
576 */
ebcf26da
ID		 577static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
578 struct link_qual *qual)
95ea3627
ID		 579{
580 u16 reg;
581
582 /*
583 * Update FCS error count from register.
584 */
585 rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
ebcf26da 586 qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
95ea3627
ID		 587
588 /*
589 * Update False CCA count from register.
590 */
591 rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
ebcf26da 592 qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
95ea3627
ID		 593}
594
595static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
596{
597 u16 eeprom;
598 u16 value;
599
600 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
601 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
602 rt2500usb_bbp_write(rt2x00dev, 24, value);
603
604 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
605 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
606 rt2500usb_bbp_write(rt2x00dev, 25, value);
607
608 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
609 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
610 rt2500usb_bbp_write(rt2x00dev, 61, value);
611
612 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
613 value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
614 rt2500usb_bbp_write(rt2x00dev, 17, value);
615
616 rt2x00dev->link.vgc_level = value;
617}
618
619static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
620{
621 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
622 u16 bbp_thresh;
623 u16 vgc_bound;
624 u16 sens;
625 u16 r24;
626 u16 r25;
627 u16 r61;
628 u16 r17_sens;
629 u8 r17;
630 u8 up_bound;
631 u8 low_bound;
632
6bb40dd1
ID		 633 /*
634 * Read current r17 value, as well as the sensitivity values
635 * for the r17 register.
636 */
637 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
638 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
639
640 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
641 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
642 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
643
644 /*
645 * If we are not associated, we should go straight to the
646 * dynamic CCA tuning.
647 */
648 if (!rt2x00dev->intf_associated)
649 goto dynamic_cca_tune;
650
95ea3627
ID		 651 /*
652 * Determine the BBP tuning threshold and correctly
653 * set BBP 24, 25 and 61.
654 */
655 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
656 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
657
658 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
659 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
660 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
661
662 if ((rssi + bbp_thresh) > 0) {
663 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
664 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
665 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
666 } else {
667 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
668 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
669 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
670 }
671
672 rt2500usb_bbp_write(rt2x00dev, 24, r24);
673 rt2500usb_bbp_write(rt2x00dev, 25, r25);
674 rt2500usb_bbp_write(rt2x00dev, 61, r61);
675
95ea3627
ID		 676 /*
677 * A too low RSSI will cause too much false CCA which will
678 * then corrupt the R17 tuning. To remidy this the tuning should
679 * be stopped (While making sure the R17 value will not exceed limits)
680 */
681 if (rssi >= -40) {
682 if (r17 != 0x60)
683 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
684 return;
685 }
686
687 /*
688 * Special big-R17 for short distance
689 */
690 if (rssi >= -58) {
691 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
692 if (r17 != sens)
693 rt2500usb_bbp_write(rt2x00dev, 17, sens);
694 return;
695 }
696
697 /*
698 * Special mid-R17 for middle distance
699 */
700 if (rssi >= -74) {
701 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
702 if (r17 != sens)
703 rt2500usb_bbp_write(rt2x00dev, 17, sens);
704 return;
705 }
706
707 /*
708 * Leave short or middle distance condition, restore r17
709 * to the dynamic tuning range.
710 */
95ea3627 711 low_bound = 0x32;
6bb40dd1
ID		 712 if (rssi < -77)
713 up_bound -= (-77 - rssi);
95ea3627
ID		 714
715 if (up_bound < low_bound)
716 up_bound = low_bound;
717
718 if (r17 > up_bound) {
719 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
720 rt2x00dev->link.vgc_level = up_bound;
6bb40dd1
ID		 721 return;
722 }
723
724dynamic_cca_tune:
725
726 /*
727 * R17 is inside the dynamic tuning range,
728 * start tuning the link based on the false cca counter.
729 */
730 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
95ea3627
ID		 731 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
732 rt2x00dev->link.vgc_level = r17;
ebcf26da 733 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
95ea3627
ID		 734 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
735 rt2x00dev->link.vgc_level = r17;
736 }
737}
738
739/*
740 * Initialization functions.
741 */
742static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
743{
744 u16 reg;
745
746 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
747 USB_MODE_TEST, REGISTER_TIMEOUT);
748 rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
749 0x00f0, REGISTER_TIMEOUT);
750
751 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
752 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
753 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
754
755 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
756 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
757
758 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
759 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
760 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
761 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
762 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
763
764 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
765 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
766 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
767 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
768 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
769
770 rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
771 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
772 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
773 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
774 rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
775 rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
776
777 rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
778 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
779 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
780 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
781 rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
782 rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
783
784 rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
785 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
786 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
787 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
788 rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
789 rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
790
791 rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
792 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
793 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
794 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
795 rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
796 rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
797
798 rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
799 rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
800
801 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
802 return -EBUSY;
803
804 rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
805 rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
806 rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
807 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
808 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
809
755a957d 810 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
95ea3627 811 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
ddc827f9 812 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
95ea3627 813 } else {
ddc827f9
ID		 814 reg = 0;
815 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
816 rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
95ea3627
ID		 817 }
818 rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
819
820 rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
821 rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
822 rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
823 rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
824
825 rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
826 rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
827 rt2x00dev->rx->data_size);
828 rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
829
830 rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
831 rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
832 rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
833 rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
834
835 rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
836 rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
837 rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
838
839 rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
840 rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
841 rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
842
843 rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
844 rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
845 rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
846
847 return 0;
848}
849
850static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
851{
852 unsigned int i;
853 u16 eeprom;
854 u8 value;
855 u8 reg_id;
856
857 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
858 rt2500usb_bbp_read(rt2x00dev, 0, &value);
859 if ((value != 0xff) && (value != 0x00))
860 goto continue_csr_init;
861 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
862 udelay(REGISTER_BUSY_DELAY);
863 }
864
865 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
866 return -EACCES;
867
868continue_csr_init:
869 rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
870 rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
871 rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
872 rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
873 rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
874 rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
875 rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
876 rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
877 rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
878 rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
879 rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
880 rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
881 rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
882 rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
883 rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
884 rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
885 rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
886 rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
887 rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
888 rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
889 rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
890 rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
891 rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
892 rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
893 rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
894 rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
895 rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
896 rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
897 rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
898 rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
899 rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
900
95ea3627
ID		 901 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
902 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
903
904 if (eeprom != 0xffff && eeprom != 0x0000) {
905 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
906 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
95ea3627
ID		 907 rt2500usb_bbp_write(rt2x00dev, reg_id, value);
908 }
909 }
95ea3627
ID		 910
911 return 0;
912}
913
914/*
915 * Device state switch handlers.
916 */
917static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
918 enum dev_state state)
919{
920 u16 reg;
921
922 rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
923 rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
924 state == STATE_RADIO_RX_OFF);
925 rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
926}
927
928static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
929{
930 /*
931 * Initialize all registers.
932 */
933 if (rt2500usb_init_registers(rt2x00dev) ||
934 rt2500usb_init_bbp(rt2x00dev)) {
935 ERROR(rt2x00dev, "Register initialization failed.\n");
936 return -EIO;
937 }
938
95ea3627
ID		 939 return 0;
940}
941
942static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
943{
95ea3627
ID		 944 rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
945 rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
946
947 /*
948 * Disable synchronisation.
949 */
950 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
951
952 rt2x00usb_disable_radio(rt2x00dev);
953}
954
955static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
956 enum dev_state state)
957{
958 u16 reg;
959 u16 reg2;
960 unsigned int i;
961 char put_to_sleep;
962 char bbp_state;
963 char rf_state;
964
965 put_to_sleep = (state != STATE_AWAKE);
966
967 reg = 0;
968 rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
969 rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
970 rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
971 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
972 rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
973 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
974
975 /*
976 * Device is not guaranteed to be in the requested state yet.
977 * We must wait until the register indicates that the
978 * device has entered the correct state.
979 */
980 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
981 rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
982 bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
983 rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
984 if (bbp_state == state && rf_state == state)
985 return 0;
986 rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
987 msleep(30);
988 }
989
990 NOTICE(rt2x00dev, "Device failed to enter state %d, "
991 "current device state: bbp %d and rf %d.\n",
992 state, bbp_state, rf_state);
993
994 return -EBUSY;
995}
996
997static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
998 enum dev_state state)
999{
1000 int retval = 0;
1001
1002 switch (state) {
1003 case STATE_RADIO_ON:
1004 retval = rt2500usb_enable_radio(rt2x00dev);
1005 break;
1006 case STATE_RADIO_OFF:
1007 rt2500usb_disable_radio(rt2x00dev);
1008 break;
1009 case STATE_RADIO_RX_ON:
61667d8d
ID		 1010 case STATE_RADIO_RX_ON_LINK:
1011 rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
1012 break;
95ea3627 1013 case STATE_RADIO_RX_OFF:
61667d8d
ID		 1014 case STATE_RADIO_RX_OFF_LINK:
1015 rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
95ea3627
ID		 1016 break;
1017 case STATE_DEEP_SLEEP:
1018 case STATE_SLEEP:
1019 case STATE_STANDBY:
1020 case STATE_AWAKE:
1021 retval = rt2500usb_set_state(rt2x00dev, state);
1022 break;
1023 default:
1024 retval = -ENOTSUPP;
1025 break;
1026 }
1027
1028 return retval;
1029}
1030
1031/*
1032 * TX descriptor initialization
1033 */
1034static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
dd3193e1 1035 struct sk_buff *skb,
181d6902 1036 struct txentry_desc *txdesc,
95ea3627
ID		 1037 struct ieee80211_tx_control *control)
1038{
181d6902 1039 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
dd3193e1 1040 __le32 *txd = skbdesc->desc;
95ea3627
ID		 1041 u32 word;
1042
1043 /*
1044 * Start writing the descriptor words.
1045 */
1046 rt2x00_desc_read(txd, 1, &word);
1047 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
181d6902
ID		 1048 rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
1049 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1050 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
95ea3627
ID		 1051 rt2x00_desc_write(txd, 1, word);
1052
1053 rt2x00_desc_read(txd, 2, &word);
181d6902
ID		 1054 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1055 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1056 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1057 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
95ea3627
ID		 1058 rt2x00_desc_write(txd, 2, word);
1059
1060 rt2x00_desc_read(txd, 0, &word);
1061 rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
1062 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
181d6902 1063 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
95ea3627 1064 rt2x00_set_field32(&word, TXD_W0_ACK,
181d6902 1065 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
95ea3627 1066 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
181d6902 1067 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
95ea3627 1068 rt2x00_set_field32(&word, TXD_W0_OFDM,
181d6902 1069 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
95ea3627
ID		 1070 rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
1071 !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
181d6902 1072 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
dd3193e1 1073 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
95ea3627
ID		 1074 rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
1075 rt2x00_desc_write(txd, 0, word);
1076}
1077
dd9fa2d2 1078static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
b242e891 1079 struct sk_buff *skb)
dd9fa2d2
ID		 1080{
1081 int length;
1082
1083 /*
1084 * The length _must_ be a multiple of 2,
1085 * but it must _not_ be a multiple of the USB packet size.
1086 */
1087 length = roundup(skb->len, 2);
b242e891 1088 length += (2 * !(length % rt2x00dev->usb_maxpacket));
dd9fa2d2
ID		 1089
1090 return length;
1091}
1092
95ea3627
ID		 1093/*
1094 * TX data initialization
1095 */
1096static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
e58c6aca 1097 const enum data_queue_qid queue)
95ea3627
ID		 1098{
1099 u16 reg;
1100
e58c6aca 1101 if (queue != QID_BEACON)
95ea3627
ID		 1102 return;
1103
1104 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1105 if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
8af244cc
ID		 1106 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
1107 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
95ea3627
ID		 1108 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
1109 /*
1110 * Beacon generation will fail initially.
1111 * To prevent this we need to register the TXRX_CSR19
1112 * register several times.
1113 */
1114 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1115 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1116 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1117 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
1118 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1119 }
1120}
1121
1122/*
1123 * RX control handlers
1124 */
181d6902
ID		 1125static void rt2500usb_fill_rxdone(struct queue_entry *entry,
1126 struct rxdone_entry_desc *rxdesc)
95ea3627 1127{
181d6902
ID		 1128 struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data;
1129 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1130 __le32 *rxd =
1131 (__le32 *)(entry->skb->data +
1132 (priv_rx->urb->actual_length - entry->queue->desc_size));
f855c10b 1133 unsigned int offset = entry->queue->desc_size + 2;
95ea3627
ID		 1134 u32 word0;
1135 u32 word1;
1136
f855c10b
ID		 1137 /*
1138 * Copy descriptor to the available headroom inside the skbuffer.
f855c10b
ID		 1139 */
1140 skb_push(entry->skb, offset);
1141 memcpy(entry->skb->data, rxd, entry->queue->desc_size);
1142 rxd = (__le32 *)entry->skb->data;
f855c10b
ID		 1143
1144 /*
1145 * The descriptor is now aligned to 4 bytes and thus it is
1146 * now safe to read it on all architectures.
1147 */
95ea3627
ID		 1148 rt2x00_desc_read(rxd, 0, &word0);
1149 rt2x00_desc_read(rxd, 1, &word1);
1150
181d6902 1151 rxdesc->flags = 0;
4150c572 1152 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
181d6902 1153 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
4150c572 1154 if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
181d6902 1155 rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
95ea3627
ID		 1156
1157 /*
1158 * Obtain the status about this packet.
89993890
ID		 1159 * When frame was received with an OFDM bitrate,
1160 * the signal is the PLCP value. If it was received with
1161 * a CCK bitrate the signal is the rate in 100kbit/s.
95ea3627 1162 */
181d6902
ID		 1163 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1164 rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
1165 entry->queue->rt2x00dev->rssi_offset;
181d6902 1166 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
19d30e02
ID		 1167
1168 rxdesc->dev_flags = 0;
1169 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1170 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1171 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1172 rxdesc->dev_flags |= RXDONE_MY_BSS;
7d1de806 1173
2ae23854
MN		 1174 /*
1175 * Adjust the skb memory window to the frame boundaries.
1176 */
1177 skb_pull(entry->skb, offset);
1178 skb_trim(entry->skb, rxdesc->size);
1179
7d1de806 1180 /*
f855c10b 1181 * Set descriptor and data pointer.
7d1de806 1182 */
7d1de806 1183 skbdesc->data = entry->skb->data;
647d0ca9 1184 skbdesc->data_len = rxdesc->size;
2ae23854 1185 skbdesc->desc = rxd;
181d6902 1186 skbdesc->desc_len = entry->queue->desc_size;
95ea3627
ID		 1187}
1188
1189/*
1190 * Interrupt functions.
1191 */
1192static void rt2500usb_beacondone(struct urb *urb)
1193{
181d6902
ID		 1194 struct queue_entry *entry = (struct queue_entry *)urb->context;
1195 struct queue_entry_priv_usb_bcn *priv_bcn = entry->priv_data;
95ea3627 1196
181d6902 1197 if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
95ea3627
ID		 1198 return;
1199
1200 /*
1201 * Check if this was the guardian beacon,
1202 * if that was the case we need to send the real beacon now.
1203 * Otherwise we should free the sk_buffer, the device
1204 * should be doing the rest of the work now.
1205 */
181d6902
ID		 1206 if (priv_bcn->guardian_urb == urb) {
1207 usb_submit_urb(priv_bcn->urb, GFP_ATOMIC);
1208 } else if (priv_bcn->urb == urb) {
1209 dev_kfree_skb(entry->skb);
1210 entry->skb = NULL;
95ea3627
ID		 1211 }
1212}
1213
1214/*
1215 * Device probe functions.
1216 */
1217static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1218{
1219 u16 word;
1220 u8 *mac;
6bb40dd1 1221 u8 bbp;
95ea3627
ID		 1222
1223 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1224
1225 /*
1226 * Start validation of the data that has been read.
1227 */
1228 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1229 if (!is_valid_ether_addr(mac)) {
0795af57
JP		 1230 DECLARE_MAC_BUF(macbuf);
1231
95ea3627 1232 random_ether_addr(mac);
0795af57 1233 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
95ea3627
ID		 1234 }
1235
1236 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1237 if (word == 0xffff) {
1238 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
362f3b6b
ID		 1239 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1240 ANTENNA_SW_DIVERSITY);
1241 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1242 ANTENNA_SW_DIVERSITY);
1243 rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
1244 LED_MODE_DEFAULT);
95ea3627
ID		 1245 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1246 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1247 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
1248 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1249 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1250 }
1251
1252 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1253 if (word == 0xffff) {
1254 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1255 rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
1256 rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
1257 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1258 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1259 }
1260
1261 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
1262 if (word == 0xffff) {
1263 rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
1264 DEFAULT_RSSI_OFFSET);
1265 rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
1266 EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
1267 }
1268
1269 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
1270 if (word == 0xffff) {
1271 rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
1272 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
1273 EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
1274 }
1275
6bb40dd1
ID		 1276 /*
1277 * Switch lower vgc bound to current BBP R17 value,
1278 * lower the value a bit for better quality.
1279 */
1280 rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
1281 bbp -= 6;
1282
95ea3627
ID		 1283 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
1284 if (word == 0xffff) {
1285 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
6bb40dd1 1286 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
95ea3627
ID		 1287 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
1288 EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
1289 }
1290
1291 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
1292 if (word == 0xffff) {
1293 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
1294 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
1295 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
1296 EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
6bb40dd1
ID		 1297 } else {
1298 rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
1299 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
95ea3627
ID		 1300 }
1301
1302 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
1303 if (word == 0xffff) {
1304 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
1305 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
1306 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
1307 EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
1308 }
1309
1310 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
1311 if (word == 0xffff) {
1312 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
1313 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
1314 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
1315 EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
1316 }
1317
1318 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
1319 if (word == 0xffff) {
1320 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
1321 rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
1322 rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
1323 EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
1324 }
1325
1326 return 0;
1327}
1328
1329static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1330{
1331 u16 reg;
1332 u16 value;
1333 u16 eeprom;
1334
1335 /*
1336 * Read EEPROM word for configuration.
1337 */
1338 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1339
1340 /*
1341 * Identify RF chipset.
1342 */
1343 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1344 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1345 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1346
755a957d 1347 if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
95ea3627
ID		 1348 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1349 return -ENODEV;
1350 }
1351
1352 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
1353 !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
1354 !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
1355 !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
1356 !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
1357 !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
1358 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1359 return -ENODEV;
1360 }
1361
1362 /*
1363 * Identify default antenna configuration.
1364 */
addc81bd 1365 rt2x00dev->default_ant.tx =
95ea3627 1366 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
addc81bd 1367 rt2x00dev->default_ant.rx =
95ea3627
ID		 1368 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1369
addc81bd
ID		 1370 /*
1371 * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
1372 * I am not 100% sure about this, but the legacy drivers do not
1373 * indicate antenna swapping in software is required when
1374 * diversity is enabled.
1375 */
1376 if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
1377 rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
1378 if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
1379 rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
1380
95ea3627
ID		 1381 /*
1382 * Store led mode, for correct led behaviour.
1383 */
a9450b70
ID		 1384#ifdef CONFIG_RT2500USB_LEDS
1385 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
1386
a2e1d52a
ID		 1387 rt2x00dev->led_radio.rt2x00dev = rt2x00dev;
1388 rt2x00dev->led_radio.type = LED_TYPE_RADIO;
1389 rt2x00dev->led_radio.led_dev.brightness_set =
1390 rt2500usb_brightness_set;
1391 rt2x00dev->led_radio.led_dev.blink_set =
1392 rt2500usb_blink_set;
1393 rt2x00dev->led_radio.flags = LED_INITIALIZED;
1394
1395 if (value == LED_MODE_TXRX_ACTIVITY) {
1396 rt2x00dev->led_qual.rt2x00dev = rt2x00dev;
61c2b682 1397 rt2x00dev->led_qual.type = LED_TYPE_ACTIVITY;
a2e1d52a
ID		 1398 rt2x00dev->led_qual.led_dev.brightness_set =
1399 rt2500usb_brightness_set;
1400 rt2x00dev->led_qual.led_dev.blink_set =
1401 rt2500usb_blink_set;
1402 rt2x00dev->led_qual.flags = LED_INITIALIZED;
a9450b70
ID		 1403 }
1404#endif /* CONFIG_RT2500USB_LEDS */
95ea3627
ID		 1405
1406 /*
1407 * Check if the BBP tuning should be disabled.
1408 */
1409 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1410 if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
1411 __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
1412
1413 /*
1414 * Read the RSSI <-> dBm offset information.
1415 */
1416 rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
1417 rt2x00dev->rssi_offset =
1418 rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
1419
1420 return 0;
1421}
1422
1423/*
1424 * RF value list for RF2522
1425 * Supports: 2.4 GHz
1426 */
1427static const struct rf_channel rf_vals_bg_2522[] = {
1428 { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
1429 { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
1430 { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
1431 { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
1432 { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
1433 { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
1434 { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
1435 { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
1436 { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
1437 { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
1438 { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
1439 { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
1440 { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
1441 { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
1442};
1443
1444/*
1445 * RF value list for RF2523
1446 * Supports: 2.4 GHz
1447 */
1448static const struct rf_channel rf_vals_bg_2523[] = {
1449 { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
1450 { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
1451 { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
1452 { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
1453 { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
1454 { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
1455 { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
1456 { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
1457 { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
1458 { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
1459 { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
1460 { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
1461 { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
1462 { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
1463};
1464
1465/*
1466 * RF value list for RF2524
1467 * Supports: 2.4 GHz
1468 */
1469static const struct rf_channel rf_vals_bg_2524[] = {
1470 { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
1471 { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
1472 { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
1473 { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
1474 { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
1475 { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
1476 { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
1477 { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
1478 { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
1479 { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
1480 { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
1481 { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
1482 { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
1483 { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
1484};
1485
1486/*
1487 * RF value list for RF2525
1488 * Supports: 2.4 GHz
1489 */
1490static const struct rf_channel rf_vals_bg_2525[] = {
1491 { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
1492 { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
1493 { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
1494 { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
1495 { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
1496 { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
1497 { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
1498 { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
1499 { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
1500 { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
1501 { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
1502 { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
1503 { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
1504 { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
1505};
1506
1507/*
1508 * RF value list for RF2525e
1509 * Supports: 2.4 GHz
1510 */
1511static const struct rf_channel rf_vals_bg_2525e[] = {
1512 { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
1513 { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
1514 { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
1515 { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
1516 { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
1517 { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
1518 { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
1519 { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
1520 { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
1521 { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
1522 { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
1523 { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
1524 { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
1525 { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
1526};
1527
1528/*
1529 * RF value list for RF5222
1530 * Supports: 2.4 GHz & 5.2 GHz
1531 */
1532static const struct rf_channel rf_vals_5222[] = {
1533 { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
1534 { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
1535 { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
1536 { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
1537 { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
1538 { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
1539 { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
1540 { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
1541 { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
1542 { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
1543 { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
1544 { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
1545 { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
1546 { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
1547
1548 /* 802.11 UNI / HyperLan 2 */
1549 { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
1550 { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
1551 { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
1552 { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
1553 { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
1554 { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
1555 { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
1556 { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
1557
1558 /* 802.11 HyperLan 2 */
1559 { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
1560 { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
1561 { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
1562 { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
1563 { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
1564 { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
1565 { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
1566 { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
1567 { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
1568 { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
1569
1570 /* 802.11 UNII */
1571 { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
1572 { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
1573 { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
1574 { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
1575 { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
1576};
1577
1578static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1579{
1580 struct hw_mode_spec *spec = &rt2x00dev->spec;
1581 u8 *txpower;
1582 unsigned int i;
1583
1584 /*
1585 * Initialize all hw fields.
1586 */
1587 rt2x00dev->hw->flags =
1588 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1589 IEEE80211_HW_RX_INCLUDES_FCS |
4150c572 1590 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
95ea3627
ID		 1591 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1592 rt2x00dev->hw->max_signal = MAX_SIGNAL;
1593 rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1594 rt2x00dev->hw->queues = 2;
1595
1596 SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1597 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1598 rt2x00_eeprom_addr(rt2x00dev,
1599 EEPROM_MAC_ADDR_0));
1600
1601 /*
1602 * Convert tx_power array in eeprom.
1603 */
1604 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
1605 for (i = 0; i < 14; i++)
1606 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1607
1608 /*
1609 * Initialize hw_mode information.
1610 */
31562e80
ID		 1611 spec->supported_bands = SUPPORT_BAND_2GHZ;
1612 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
95ea3627
ID		 1613 spec->tx_power_a = NULL;
1614 spec->tx_power_bg = txpower;
1615 spec->tx_power_default = DEFAULT_TXPOWER;
1616
1617 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
1618 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1619 spec->channels = rf_vals_bg_2522;
1620 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
1621 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1622 spec->channels = rf_vals_bg_2523;
1623 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
1624 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1625 spec->channels = rf_vals_bg_2524;
1626 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
1627 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1628 spec->channels = rf_vals_bg_2525;
1629 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
1630 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1631 spec->channels = rf_vals_bg_2525e;
1632 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
31562e80 1633 spec->supported_bands |= SUPPORT_BAND_5GHZ;
95ea3627
ID		 1634 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1635 spec->channels = rf_vals_5222;
95ea3627
ID		 1636 }
1637}
1638
1639static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1640{
1641 int retval;
1642
1643 /*
1644 * Allocate eeprom data.
1645 */
1646 retval = rt2500usb_validate_eeprom(rt2x00dev);
1647 if (retval)
1648 return retval;
1649
1650 retval = rt2500usb_init_eeprom(rt2x00dev);
1651 if (retval)
1652 return retval;
1653
1654 /*
1655 * Initialize hw specifications.
1656 */
1657 rt2500usb_probe_hw_mode(rt2x00dev);
1658
1659 /*
181d6902 1660 * This device requires the atim queue
95ea3627 1661 */
181d6902
ID		 1662 __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
1663 __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
3a643d24 1664 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
95ea3627
ID		 1665
1666 /*
1667 * Set the rssi offset.
1668 */
1669 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1670
1671 return 0;
1672}
1673
1674/*
1675 * IEEE80211 stack callback functions.
1676 */
1677static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
1678 struct sk_buff *skb,
1679 struct ieee80211_tx_control *control)
1680{
1681 struct rt2x00_dev *rt2x00dev = hw->priv;
181d6902 1682 struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev);
6bb40dd1 1683 struct rt2x00_intf *intf = vif_to_intf(control->vif);
181d6902
ID		 1684 struct queue_entry_priv_usb_bcn *priv_bcn;
1685 struct skb_frame_desc *skbdesc;
dd9fa2d2 1686 int pipe = usb_sndbulkpipe(usb_dev, 1);
95ea3627 1687 int length;
8af244cc 1688 u16 reg;
95ea3627 1689
6bb40dd1
ID		 1690 if (unlikely(!intf->beacon))
1691 return -ENOBUFS;
1692
1693 priv_bcn = intf->beacon->priv_data;
95ea3627
ID		 1694
1695 /*
08992f7f 1696 * Add the descriptor in front of the skb.
95ea3627 1697 */
6bb40dd1
ID		 1698 skb_push(skb, intf->beacon->queue->desc_size);
1699 memset(skb->data, 0, intf->beacon->queue->desc_size);
c22eb87b 1700
08992f7f
ID		 1701 /*
1702 * Fill in skb descriptor
1703 */
181d6902
ID		 1704 skbdesc = get_skb_frame_desc(skb);
1705 memset(skbdesc, 0, sizeof(*skbdesc));
baf26a7e 1706 skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
6bb40dd1
ID		 1707 skbdesc->data = skb->data + intf->beacon->queue->desc_size;
1708 skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
181d6902 1709 skbdesc->desc = skb->data;
6bb40dd1
ID		 1710 skbdesc->desc_len = intf->beacon->queue->desc_size;
1711 skbdesc->entry = intf->beacon;
08992f7f 1712
8af244cc
ID		 1713 /*
1714 * Disable beaconing while we are reloading the beacon data,
1715 * otherwise we might be sending out invalid data.
1716 */
1717 rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
1718 rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
1719 rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
1720 rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
1721 rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
1722
08992f7f 1723 rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
95ea3627 1724
08992f7f
ID		 1725 /*
1726 * USB devices cannot blindly pass the skb->len as the
1727 * length of the data to usb_fill_bulk_urb. Pass the skb
1728 * to the driver to determine what the length should be.
1729 */
b242e891 1730 length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
95ea3627 1731
181d6902 1732 usb_fill_bulk_urb(priv_bcn->urb, usb_dev, pipe,
6bb40dd1
ID		 1733 skb->data, length, rt2500usb_beacondone,
1734 intf->beacon);
95ea3627 1735
95ea3627
ID		 1736 /*
1737 * Second we need to create the guardian byte.
1738 * We only need a single byte, so lets recycle
1739 * the 'flags' field we are not using for beacons.
1740 */
181d6902
ID		 1741 priv_bcn->guardian_data = 0;
1742 usb_fill_bulk_urb(priv_bcn->guardian_urb, usb_dev, pipe,
1743 &priv_bcn->guardian_data, 1, rt2500usb_beacondone,
6bb40dd1 1744 intf->beacon);
95ea3627
ID		 1745
1746 /*
1747 * Send out the guardian byte.
1748 */
181d6902 1749 usb_submit_urb(priv_bcn->guardian_urb, GFP_ATOMIC);
95ea3627
ID		 1750
1751 /*
1752 * Enable beacon generation.
1753 */
e58c6aca 1754 rt2500usb_kick_tx_queue(rt2x00dev, QID_BEACON);
95ea3627
ID		 1755
1756 return 0;
1757}
1758
1759static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1760 .tx = rt2x00mac_tx,
4150c572
JB		 1761 .start = rt2x00mac_start,
1762 .stop = rt2x00mac_stop,
95ea3627
ID		 1763 .add_interface = rt2x00mac_add_interface,
1764 .remove_interface = rt2x00mac_remove_interface,
1765 .config = rt2x00mac_config,
1766 .config_interface = rt2x00mac_config_interface,
3a643d24 1767 .configure_filter = rt2x00mac_configure_filter,
95ea3627 1768 .get_stats = rt2x00mac_get_stats,
471b3efd 1769 .bss_info_changed = rt2x00mac_bss_info_changed,
95ea3627
ID		 1770 .conf_tx = rt2x00mac_conf_tx,
1771 .get_tx_stats = rt2x00mac_get_tx_stats,
1772 .beacon_update = rt2500usb_beacon_update,
1773};
1774
1775static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1776 .probe_hw = rt2500usb_probe_hw,
1777 .initialize = rt2x00usb_initialize,
1778 .uninitialize = rt2x00usb_uninitialize,
837e7f24
ID		 1779 .init_rxentry = rt2x00usb_init_rxentry,
1780 .init_txentry = rt2x00usb_init_txentry,
95ea3627
ID		 1781 .set_device_state = rt2500usb_set_device_state,
1782 .link_stats = rt2500usb_link_stats,
1783 .reset_tuner = rt2500usb_reset_tuner,
1784 .link_tuner = rt2500usb_link_tuner,
1785 .write_tx_desc = rt2500usb_write_tx_desc,
1786 .write_tx_data = rt2x00usb_write_tx_data,
dd9fa2d2 1787 .get_tx_data_len = rt2500usb_get_tx_data_len,
95ea3627
ID		 1788 .kick_tx_queue = rt2500usb_kick_tx_queue,
1789 .fill_rxdone = rt2500usb_fill_rxdone,
3a643d24 1790 .config_filter = rt2500usb_config_filter,
6bb40dd1 1791 .config_intf = rt2500usb_config_intf,
72810379 1792 .config_erp = rt2500usb_config_erp,
95ea3627
ID		 1793 .config = rt2500usb_config,
1794};
1795
181d6902
ID		 1796static const struct data_queue_desc rt2500usb_queue_rx = {
1797 .entry_num = RX_ENTRIES,
1798 .data_size = DATA_FRAME_SIZE,
1799 .desc_size = RXD_DESC_SIZE,
1800 .priv_size = sizeof(struct queue_entry_priv_usb_rx),
1801};
1802
1803static const struct data_queue_desc rt2500usb_queue_tx = {
1804 .entry_num = TX_ENTRIES,
1805 .data_size = DATA_FRAME_SIZE,
1806 .desc_size = TXD_DESC_SIZE,
1807 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
1808};
1809
1810static const struct data_queue_desc rt2500usb_queue_bcn = {
1811 .entry_num = BEACON_ENTRIES,
1812 .data_size = MGMT_FRAME_SIZE,
1813 .desc_size = TXD_DESC_SIZE,
1814 .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
1815};
1816
1817static const struct data_queue_desc rt2500usb_queue_atim = {
1818 .entry_num = ATIM_ENTRIES,
1819 .data_size = DATA_FRAME_SIZE,
1820 .desc_size = TXD_DESC_SIZE,
1821 .priv_size = sizeof(struct queue_entry_priv_usb_tx),
1822};
1823
95ea3627 1824static const struct rt2x00_ops rt2500usb_ops = {
2360157c 1825 .name = KBUILD_MODNAME,
6bb40dd1
ID		 1826 .max_sta_intf = 1,
1827 .max_ap_intf = 1,
95ea3627
ID		 1828 .eeprom_size = EEPROM_SIZE,
1829 .rf_size = RF_SIZE,
181d6902
ID		 1830 .rx = &rt2500usb_queue_rx,
1831 .tx = &rt2500usb_queue_tx,
1832 .bcn = &rt2500usb_queue_bcn,
1833 .atim = &rt2500usb_queue_atim,
95ea3627
ID		 1834 .lib = &rt2500usb_rt2x00_ops,
1835 .hw = &rt2500usb_mac80211_ops,
1836#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1837 .debugfs = &rt2500usb_rt2x00debug,
1838#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1839};
1840
1841/*
1842 * rt2500usb module information.
1843 */
1844static struct usb_device_id rt2500usb_device_table[] = {
1845 /* ASUS */
1846 { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1847 { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
1848 /* Belkin */
1849 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
1850 { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
1851 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
1852 /* Cisco Systems */
1853 { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
1854 { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
1855 { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
1856 /* Conceptronic */
1857 { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
1858 /* D-LINK */
1859 { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
1860 /* Gigabyte */
1861 { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
1862 { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
1863 /* Hercules */
1864 { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
1865 /* Melco */
db433feb 1866 { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
95ea3627
ID		 1867 { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
1868 { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
1869 { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
1870 { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
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ID		 1871 /* MSI */
1872 { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
1873 { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
1874 { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
1875 /* Ralink */
1876 { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
1877 { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
1878 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
1879 { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1880 /* Siemens */
1881 { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
1882 /* SMC */
1883 { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
1884 /* Spairon */
1885 { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
1886 /* Trust */
1887 { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
1888 /* Zinwell */
1889 { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
1890 { 0, }
1891};
1892
1893MODULE_AUTHOR(DRV_PROJECT);
1894MODULE_VERSION(DRV_VERSION);
1895MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
1896MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
1897MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
1898MODULE_LICENSE("GPL");
1899
1900static struct usb_driver rt2500usb_driver = {
2360157c 1901 .name = KBUILD_MODNAME,
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ID		 1902 .id_table = rt2500usb_device_table,
1903 .probe = rt2x00usb_probe,
1904 .disconnect = rt2x00usb_disconnect,
1905 .suspend = rt2x00usb_suspend,
1906 .resume = rt2x00usb_resume,
1907};
1908
1909static int __init rt2500usb_init(void)
1910{
1911 return usb_register(&rt2500usb_driver);
1912}
1913
1914static void __exit rt2500usb_exit(void)
1915{
1916 usb_deregister(&rt2500usb_driver);
1917}
1918
1919module_init(rt2500usb_init);
1920module_exit(rt2500usb_exit);
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