[mirror_ubuntu-jammy-kernel.git] / drivers / net / wireless / rtl8187.h

/*
 * Definitions for RTL8187 hardware
 *
 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
 *
 * Based on the r8187 driver, which is:
 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef RTL8187_H
#define RTL8187_H

#include "rtl818x.h"

#define RTL8187_EEPROM_TXPWR_BASE	0x05
#define RTL8187_EEPROM_MAC_ADDR		0x07
#define RTL8187_EEPROM_TXPWR_CHAN_1	0x16	/* 3 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_6	0x1B	/* 2 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_4	0x3D	/* 2 channels */

#define RTL8187_REQT_READ	0xC0
#define RTL8187_REQT_WRITE	0x40
#define RTL8187_REQ_GET_REG	0x05
#define RTL8187_REQ_SET_REG	0x05

#define RTL8187_MAX_RX		0x9C4

struct rtl8187_rx_info {
	struct urb *urb;
	struct ieee80211_hw *dev;
};

struct rtl8187_rx_hdr {
	__le32 flags;
	u8 noise;
	u8 signal;
	u8 agc;
	u8 reserved;
	__le64 mac_time;
} __attribute__((packed));

struct rtl8187b_rx_hdr {
	__le32 flags;
	__le64 mac_time;
	u8 sq;
	u8 rssi;
	u8 agc;
	u8 flags2;
	__le16 snr_long2end;
	s8 pwdb_g12;
	u8 fot;
} __attribute__((packed));

/* {rtl8187,rtl8187b}_tx_info is in skb */

/* Tx flags are common between rtl8187 and rtl8187b */
#define RTL8187_TX_FLAG_NO_ENCRYPT	(1 << 15)
#define RTL8187_TX_FLAG_MORE_FRAG	(1 << 17)
#define RTL8187_TX_FLAG_CTS		(1 << 18)
#define RTL8187_TX_FLAG_RTS		(1 << 23)

struct rtl8187_tx_hdr {
	__le32 flags;
	__le16 rts_duration;
	__le16 len;
	__le32 retry;
} __attribute__((packed));

struct rtl8187b_tx_hdr {
	__le32 flags;
	__le16 rts_duration;
	__le16 len;
	__le32 unused_1;
	__le16 unused_2;
	__le16 tx_duration;
	__le32 unused_3;
	__le32 retry;
	__le32 unused_4[2];
} __attribute__((packed));

enum {
	DEVICE_RTL8187,
	DEVICE_RTL8187B
};

struct rtl8187_priv {
	/* common between rtl818x drivers */
	struct rtl818x_csr *map;
	const struct rtl818x_rf_ops *rf;
	struct ieee80211_vif *vif;
	int mode;
	/* The mutex protects the TX loopback state.
	 * Any attempt to set channels concurrently locks the device.
	 */
	struct mutex conf_mutex;

	/* rtl8187 specific */
	struct ieee80211_channel channels[14];
	struct ieee80211_rate rates[12];
	struct ieee80211_supported_band band;
	struct usb_device *udev;
	u32 rx_conf;
	u16 txpwr_base;
	u16 seqno;
	u8 asic_rev;
	u8 is_rtl8187b;
	enum {
		RTL8187BvB,
		RTL8187BvD,
		RTL8187BvE
	} hw_rev;
	struct sk_buff_head rx_queue;
	u8 signal;
	u8 quality;
	u8 noise;
};

void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);

static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
				     u8 *addr, u8 idx)
{
	u8 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return val;
}

static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
{
	return rtl818x_ioread8_idx(priv, addr, 0);
}

static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
				       __le16 *addr, u8 idx)
{
	__le16 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return le16_to_cpu(val);
}

static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
{
	return rtl818x_ioread16_idx(priv, addr, 0);
}

static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
				       __le32 *addr, u8 idx)
{
	__le32 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);

	return le32_to_cpu(val);
}

static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
{
	return rtl818x_ioread32_idx(priv, addr, 0);
}

static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
					u8 *addr, u8 val, u8 idx)
{
	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &val,
			sizeof(val), HZ / 2);
}

static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, u8 *addr, u8 val)
{
	rtl818x_iowrite8_idx(priv, addr, val, 0);
}

static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
					 __le16 *addr, u16 val, u8 idx)
{
	__le16 buf = cpu_to_le16(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
			HZ / 2);
}

static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, __le16 *addr,
				     u16 val)
{
	rtl818x_iowrite16_idx(priv, addr, val, 0);
}

static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
					 __le32 *addr, u32 val, u8 idx)
{
	__le32 buf = cpu_to_le32(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
			HZ / 2);
}

static inline void rtl818x_iowrite32(struct rtl8187_priv *priv, __le32 *addr,
				     u32 val)
{
	rtl818x_iowrite32_idx(priv, addr, val, 0);
}

#endif /* RTL8187_H */
Commit	Line	Data
0aec00ae JL	1	/*
	2	* Definitions for RTL8187 hardware
	3	*
	4	* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
	5	* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
	6	*
	7	* Based on the r8187 driver, which is:
	8	* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
605bebe2 MW	15	#ifndef RTL8187_H
	16	#define RTL8187_H
	17
	18	#include "rtl818x.h"
	19
	20	#define RTL8187_EEPROM_TXPWR_BASE 0x05
	21	#define RTL8187_EEPROM_MAC_ADDR 0x07
	22	#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
	23	#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
	24	#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
	25
	26	#define RTL8187_REQT_READ 0xC0
	27	#define RTL8187_REQT_WRITE 0x40
	28	#define RTL8187_REQ_GET_REG 0x05
	29	#define RTL8187_REQ_SET_REG 0x05
	30
	31	#define RTL8187_MAX_RX 0x9C4
	32
	33	struct rtl8187_rx_info {
	34	struct urb *urb;
	35	struct ieee80211_hw *dev;
	36	};
	37
	38	struct rtl8187_rx_hdr {
4150c572	39	__le32 flags;
605bebe2 MW	40	u8 noise;
	41	u8 signal;
	42	u8 agc;
	43	u8 reserved;
	44	__le64 mac_time;
	45	} __attribute__((packed));
	46
c44ac0b9	47	struct rtl8187b_rx_hdr {
605bebe2	48	__le32 flags;
c44ac0b9	49	__le64 mac_time;
0ccd58fc LF	50	u8 sq;
0ccd58fc LF	51	u8 rssi;
c44ac0b9	52	u8 agc;
0ccd58fc LF	53	u8 flags2;
	54	__le16 snr_long2end;
	55	s8 pwdb_g12;
	56	u8 fot;
c44ac0b9 HTL	57	} __attribute__((packed));
	58
	59	/* {rtl8187,rtl8187b}_tx_info is in skb */
	60
	61	/* Tx flags are common between rtl8187 and rtl8187b */
605bebe2 MW	62	#define RTL8187_TX_FLAG_NO_ENCRYPT (1 << 15)
	63	#define RTL8187_TX_FLAG_MORE_FRAG (1 << 17)
	64	#define RTL8187_TX_FLAG_CTS (1 << 18)
	65	#define RTL8187_TX_FLAG_RTS (1 << 23)
c44ac0b9 HTL	66
	67	struct rtl8187_tx_hdr {
	68	__le32 flags;
605bebe2 MW	69	__le16 rts_duration;
	70	__le16 len;
	71	__le32 retry;
	72	} __attribute__((packed));
	73
c44ac0b9 HTL	74	struct rtl8187b_tx_hdr {
	75	__le32 flags;
	76	__le16 rts_duration;
	77	__le16 len;
	78	__le32 unused_1;
	79	__le16 unused_2;
	80	__le16 tx_duration;
	81	__le32 unused_3;
	82	__le32 retry;
	83	__le32 unused_4[2];
	84	} __attribute__((packed));
	85
	86	enum {
	87	DEVICE_RTL8187,
	88	DEVICE_RTL8187B
	89	};
	90
605bebe2 MW	91	struct rtl8187_priv {
	92	/* common between rtl818x drivers */
	93	struct rtl818x_csr *map;
f6532111	94	const struct rtl818x_rf_ops *rf;
32bfd35d	95	struct ieee80211_vif *vif;
605bebe2	96	int mode;
7dcdd073 LF	97	/* The mutex protects the TX loopback state.
	98	* Any attempt to set channels concurrently locks the device.
	99	*/
	100	struct mutex conf_mutex;
605bebe2 MW	101
	102	/* rtl8187 specific */
	103	struct ieee80211_channel channels[14];
	104	struct ieee80211_rate rates[12];
8318d78a	105	struct ieee80211_supported_band band;
605bebe2	106	struct usb_device *udev;
4150c572	107	u32 rx_conf;
605bebe2	108	u16 txpwr_base;
1f690d7b	109	u16 seqno;
605bebe2	110	u8 asic_rev;
c44ac0b9 HTL	111	u8 is_rtl8187b;
	112	enum {
	113	RTL8187BvB,
	114	RTL8187BvD,
	115	RTL8187BvE
	116	} hw_rev;
605bebe2	117	struct sk_buff_head rx_queue;
c44ac0b9 HTL	118	u8 signal;
	119	u8 quality;
	120	u8 noise;
605bebe2 MW	121	};
	122
	123	void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
	124
c44ac0b9 HTL	125	static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
c44ac0b9 HTL	126	u8 *addr, u8 idx)
605bebe2 MW	127	{
	128	u8 val;
	129
	130	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	131	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	132	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	133	sizeof(val), HZ / 2);
605bebe2 MW	134
	135	return val;
	136	}
	137
c44ac0b9 HTL	138	static inline u8 rtl818x_ioread8(struct rtl8187_priv priv, u8 addr)
	139	{
	140	return rtl818x_ioread8_idx(priv, addr, 0);
	141	}
	142
	143	static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
	144	__le16 *addr, u8 idx)
605bebe2 MW	145	{
	146	__le16 val;
	147
	148	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	149	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	150	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	151	sizeof(val), HZ / 2);
605bebe2 MW	152
	153	return le16_to_cpu(val);
	154	}
	155
c44ac0b9 HTL	156	static inline u16 rtl818x_ioread16(struct rtl8187_priv priv, __le16 addr)
	157	{
	158	return rtl818x_ioread16_idx(priv, addr, 0);
	159	}
	160
	161	static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
	162	__le32 *addr, u8 idx)
605bebe2 MW	163	{
	164	__le32 val;
	165
	166	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
	167	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
c44ac0b9 HTL	168	(unsigned long)addr, idx & 0x03, &val,
c44ac0b9 HTL	169	sizeof(val), HZ / 2);
605bebe2 MW	170
	171	return le32_to_cpu(val);
	172	}
	173
c44ac0b9 HTL	174	static inline u32 rtl818x_ioread32(struct rtl8187_priv priv, __le32 addr)
	175	{
	176	return rtl818x_ioread32_idx(priv, addr, 0);
	177	}
	178
	179	static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
	180	u8 *addr, u8 val, u8 idx)
605bebe2 MW	181	{
	182	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	183	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	184	(unsigned long)addr, idx & 0x03, &val,
	185	sizeof(val), HZ / 2);
	186	}
	187
	188	static inline void rtl818x_iowrite8(struct rtl8187_priv priv, u8 addr, u8 val)
	189	{
	190	rtl818x_iowrite8_idx(priv, addr, val, 0);
605bebe2 MW	191	}
605bebe2 MW	192
c44ac0b9 HTL	193	static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
c44ac0b9 HTL	194	__le16 *addr, u16 val, u8 idx)
605bebe2 MW	195	{
	196	__le16 buf = cpu_to_le16(val);
	197
	198	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	199	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	200	(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
c44ac0b9 HTL	201	HZ / 2);
605bebe2 MW	202	}
605bebe2 MW	203
c44ac0b9 HTL	204	static inline void rtl818x_iowrite16(struct rtl8187_priv priv, __le16 addr,
	205	u16 val)
	206	{
	207	rtl818x_iowrite16_idx(priv, addr, val, 0);
	208	}
	209
	210	static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
	211	__le32 *addr, u32 val, u8 idx)
605bebe2 MW	212	{
	213	__le32 buf = cpu_to_le32(val);
	214
	215	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
	216	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
c44ac0b9 HTL	217	(unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
	218	HZ / 2);
	219	}
	220
	221	static inline void rtl818x_iowrite32(struct rtl8187_priv priv, __le32 addr,
	222	u32 val)
	223	{
	224	rtl818x_iowrite32_idx(priv, addr, val, 0);
605bebe2 MW	225	}
	226
	227	#endif /* RTL8187_H */