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605bebe2 MW |
1 | /* |
2 | * Linux device driver for RTL8187 | |
3 | * | |
4 | * Copyright 2007 Michael Wu <flamingice@sourmilk.net> | |
5 | * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> | |
6 | * | |
7 | * Based on the r8187 driver, which is: | |
8 | * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. | |
9 | * | |
0aec00ae JL |
10 | * Magic delays and register offsets below are taken from the original |
11 | * r8187 driver sources. Thanks to Realtek for their support! | |
605bebe2 MW |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | */ | |
17 | ||
18 | #include <linux/init.h> | |
19 | #include <linux/usb.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/etherdevice.h> | |
22 | #include <linux/eeprom_93cx6.h> | |
23 | #include <net/mac80211.h> | |
24 | ||
25 | #include "rtl8187.h" | |
26 | #include "rtl8187_rtl8225.h" | |
27 | ||
28 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); | |
29 | MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); | |
30 | MODULE_DESCRIPTION("RTL8187 USB wireless driver"); | |
31 | MODULE_LICENSE("GPL"); | |
32 | ||
33 | static struct usb_device_id rtl8187_table[] __devinitdata = { | |
34 | /* Realtek */ | |
35 | {USB_DEVICE(0x0bda, 0x8187)}, | |
36 | /* Netgear */ | |
37 | {USB_DEVICE(0x0846, 0x6100)}, | |
38 | {USB_DEVICE(0x0846, 0x6a00)}, | |
39 | {} | |
40 | }; | |
41 | ||
42 | MODULE_DEVICE_TABLE(usb, rtl8187_table); | |
43 | ||
4150c572 JB |
44 | static void rtl8187_iowrite_async_cb(struct urb *urb) |
45 | { | |
46 | kfree(urb->context); | |
47 | usb_free_urb(urb); | |
48 | } | |
49 | ||
50 | static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, | |
51 | void *data, u16 len) | |
52 | { | |
53 | struct usb_ctrlrequest *dr; | |
54 | struct urb *urb; | |
55 | struct rtl8187_async_write_data { | |
56 | u8 data[4]; | |
57 | struct usb_ctrlrequest dr; | |
58 | } *buf; | |
59 | ||
60 | buf = kmalloc(sizeof(*buf), GFP_ATOMIC); | |
61 | if (!buf) | |
62 | return; | |
63 | ||
64 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
65 | if (!urb) { | |
66 | kfree(buf); | |
67 | return; | |
68 | } | |
69 | ||
70 | dr = &buf->dr; | |
71 | ||
72 | dr->bRequestType = RTL8187_REQT_WRITE; | |
73 | dr->bRequest = RTL8187_REQ_SET_REG; | |
74 | dr->wValue = addr; | |
75 | dr->wIndex = 0; | |
76 | dr->wLength = cpu_to_le16(len); | |
77 | ||
78 | memcpy(buf, data, len); | |
79 | ||
80 | usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), | |
81 | (unsigned char *)dr, buf, len, | |
82 | rtl8187_iowrite_async_cb, buf); | |
83 | usb_submit_urb(urb, GFP_ATOMIC); | |
84 | } | |
85 | ||
86 | static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, | |
87 | __le32 *addr, u32 val) | |
88 | { | |
89 | __le32 buf = cpu_to_le32(val); | |
90 | ||
91 | rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), | |
92 | &buf, sizeof(buf)); | |
93 | } | |
94 | ||
605bebe2 MW |
95 | void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) |
96 | { | |
97 | struct rtl8187_priv *priv = dev->priv; | |
98 | ||
99 | data <<= 8; | |
100 | data |= addr | 0x80; | |
101 | ||
102 | rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); | |
103 | rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); | |
104 | rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); | |
105 | rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); | |
106 | ||
107 | msleep(1); | |
108 | } | |
109 | ||
110 | static void rtl8187_tx_cb(struct urb *urb) | |
111 | { | |
112 | struct ieee80211_tx_status status = { {0} }; | |
113 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
114 | struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb; | |
115 | ||
116 | usb_free_urb(info->urb); | |
117 | if (info->control) | |
118 | memcpy(&status.control, info->control, sizeof(status.control)); | |
119 | kfree(info->control); | |
120 | skb_pull(skb, sizeof(struct rtl8187_tx_hdr)); | |
121 | status.flags |= IEEE80211_TX_STATUS_ACK; | |
122 | ieee80211_tx_status_irqsafe(info->dev, skb, &status); | |
123 | } | |
124 | ||
125 | static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb, | |
126 | struct ieee80211_tx_control *control) | |
127 | { | |
128 | struct rtl8187_priv *priv = dev->priv; | |
129 | struct rtl8187_tx_hdr *hdr; | |
130 | struct rtl8187_tx_info *info; | |
131 | struct urb *urb; | |
132 | u32 tmp; | |
133 | ||
134 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
135 | if (!urb) { | |
136 | kfree_skb(skb); | |
137 | return 0; | |
138 | } | |
139 | ||
140 | hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
141 | tmp = skb->len - sizeof(*hdr); | |
142 | tmp |= RTL8187_TX_FLAG_NO_ENCRYPT; | |
143 | tmp |= control->rts_cts_rate << 19; | |
144 | tmp |= control->tx_rate << 24; | |
145 | if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb)) | |
146 | tmp |= RTL8187_TX_FLAG_MORE_FRAG; | |
147 | if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) { | |
148 | tmp |= RTL8187_TX_FLAG_RTS; | |
149 | hdr->rts_duration = | |
7e9ed188 | 150 | ieee80211_rts_duration(dev, priv->if_id, skb->len, control); |
605bebe2 MW |
151 | } |
152 | if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) | |
153 | tmp |= RTL8187_TX_FLAG_CTS; | |
154 | hdr->flags = cpu_to_le32(tmp); | |
155 | hdr->len = 0; | |
156 | tmp = control->retry_limit << 8; | |
157 | hdr->retry = cpu_to_le32(tmp); | |
158 | ||
159 | info = (struct rtl8187_tx_info *)skb->cb; | |
160 | info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC); | |
161 | info->urb = urb; | |
162 | info->dev = dev; | |
163 | usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2), | |
164 | hdr, skb->len, rtl8187_tx_cb, skb); | |
165 | usb_submit_urb(urb, GFP_ATOMIC); | |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
170 | static void rtl8187_rx_cb(struct urb *urb) | |
171 | { | |
172 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
173 | struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; | |
174 | struct ieee80211_hw *dev = info->dev; | |
175 | struct rtl8187_priv *priv = dev->priv; | |
176 | struct rtl8187_rx_hdr *hdr; | |
177 | struct ieee80211_rx_status rx_status = { 0 }; | |
178 | int rate, signal; | |
4150c572 | 179 | u32 flags; |
605bebe2 MW |
180 | |
181 | spin_lock(&priv->rx_queue.lock); | |
182 | if (skb->next) | |
183 | __skb_unlink(skb, &priv->rx_queue); | |
184 | else { | |
185 | spin_unlock(&priv->rx_queue.lock); | |
186 | return; | |
187 | } | |
188 | spin_unlock(&priv->rx_queue.lock); | |
189 | ||
190 | if (unlikely(urb->status)) { | |
191 | usb_free_urb(urb); | |
192 | dev_kfree_skb_irq(skb); | |
193 | return; | |
194 | } | |
195 | ||
196 | skb_put(skb, urb->actual_length); | |
197 | hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr)); | |
4150c572 JB |
198 | flags = le32_to_cpu(hdr->flags); |
199 | skb_trim(skb, flags & 0x0FFF); | |
605bebe2 MW |
200 | |
201 | signal = hdr->agc >> 1; | |
4150c572 | 202 | rate = (flags >> 20) & 0xF; |
605bebe2 MW |
203 | if (rate > 3) { /* OFDM rate */ |
204 | if (signal > 90) | |
205 | signal = 90; | |
206 | else if (signal < 25) | |
207 | signal = 25; | |
208 | signal = 90 - signal; | |
209 | } else { /* CCK rate */ | |
210 | if (signal > 95) | |
211 | signal = 95; | |
212 | else if (signal < 30) | |
213 | signal = 30; | |
214 | signal = 95 - signal; | |
215 | } | |
216 | ||
217 | rx_status.antenna = (hdr->signal >> 7) & 1; | |
218 | rx_status.signal = 64 - min(hdr->noise, (u8)64); | |
219 | rx_status.ssi = signal; | |
220 | rx_status.rate = rate; | |
221 | rx_status.freq = dev->conf.freq; | |
222 | rx_status.channel = dev->conf.channel; | |
223 | rx_status.phymode = dev->conf.phymode; | |
224 | rx_status.mactime = le64_to_cpu(hdr->mac_time); | |
4150c572 JB |
225 | if (flags & (1 << 13)) |
226 | rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; | |
605bebe2 MW |
227 | ieee80211_rx_irqsafe(dev, skb, &rx_status); |
228 | ||
229 | skb = dev_alloc_skb(RTL8187_MAX_RX); | |
230 | if (unlikely(!skb)) { | |
231 | usb_free_urb(urb); | |
232 | /* TODO check rx queue length and refill *somewhere* */ | |
233 | return; | |
234 | } | |
235 | ||
236 | info = (struct rtl8187_rx_info *)skb->cb; | |
237 | info->urb = urb; | |
238 | info->dev = dev; | |
239 | urb->transfer_buffer = skb_tail_pointer(skb); | |
240 | urb->context = skb; | |
241 | skb_queue_tail(&priv->rx_queue, skb); | |
242 | ||
243 | usb_submit_urb(urb, GFP_ATOMIC); | |
244 | } | |
245 | ||
246 | static int rtl8187_init_urbs(struct ieee80211_hw *dev) | |
247 | { | |
248 | struct rtl8187_priv *priv = dev->priv; | |
249 | struct urb *entry; | |
250 | struct sk_buff *skb; | |
251 | struct rtl8187_rx_info *info; | |
252 | ||
253 | while (skb_queue_len(&priv->rx_queue) < 8) { | |
254 | skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); | |
255 | if (!skb) | |
256 | break; | |
257 | entry = usb_alloc_urb(0, GFP_KERNEL); | |
258 | if (!entry) { | |
259 | kfree_skb(skb); | |
260 | break; | |
261 | } | |
262 | usb_fill_bulk_urb(entry, priv->udev, | |
263 | usb_rcvbulkpipe(priv->udev, 1), | |
264 | skb_tail_pointer(skb), | |
265 | RTL8187_MAX_RX, rtl8187_rx_cb, skb); | |
266 | info = (struct rtl8187_rx_info *)skb->cb; | |
267 | info->urb = entry; | |
268 | info->dev = dev; | |
269 | skb_queue_tail(&priv->rx_queue, skb); | |
270 | usb_submit_urb(entry, GFP_KERNEL); | |
271 | } | |
272 | ||
273 | return 0; | |
274 | } | |
275 | ||
276 | static int rtl8187_init_hw(struct ieee80211_hw *dev) | |
277 | { | |
278 | struct rtl8187_priv *priv = dev->priv; | |
279 | u8 reg; | |
280 | int i; | |
281 | ||
282 | /* reset */ | |
283 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
284 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
285 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
286 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON); | |
287 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON); | |
288 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
289 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
290 | ||
291 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
292 | ||
293 | msleep(200); | |
294 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); | |
295 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); | |
296 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); | |
297 | msleep(200); | |
298 | ||
299 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
300 | reg &= (1 << 1); | |
301 | reg |= RTL818X_CMD_RESET; | |
302 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
303 | ||
304 | i = 10; | |
305 | do { | |
306 | msleep(2); | |
307 | if (!(rtl818x_ioread8(priv, &priv->map->CMD) & | |
308 | RTL818X_CMD_RESET)) | |
309 | break; | |
310 | } while (--i); | |
311 | ||
312 | if (!i) { | |
313 | printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy)); | |
314 | return -ETIMEDOUT; | |
315 | } | |
316 | ||
317 | /* reload registers from eeprom */ | |
318 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); | |
319 | ||
320 | i = 10; | |
321 | do { | |
322 | msleep(4); | |
323 | if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & | |
324 | RTL818X_EEPROM_CMD_CONFIG)) | |
325 | break; | |
326 | } while (--i); | |
327 | ||
328 | if (!i) { | |
329 | printk(KERN_ERR "%s: eeprom reset timeout!\n", | |
330 | wiphy_name(dev->wiphy)); | |
331 | return -ETIMEDOUT; | |
332 | } | |
333 | ||
334 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
335 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
336 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
337 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON); | |
338 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON); | |
339 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
340 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
341 | ||
342 | /* setup card */ | |
343 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
344 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
345 | ||
346 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
347 | rtl818x_iowrite8(priv, &priv->map->GPIO, 1); | |
348 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
349 | ||
350 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 MW |
351 | |
352 | rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); | |
353 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
354 | reg &= 0x3F; | |
355 | reg |= 0x80; | |
356 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); | |
357 | ||
358 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
359 | ||
360 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); | |
361 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
362 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); | |
363 | ||
364 | // TODO: set RESP_RATE and BRSR properly | |
365 | rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); | |
366 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
367 | ||
368 | /* host_usb_init */ | |
369 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
370 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
371 | reg = rtl818x_ioread8(priv, (u8 *)0xFE53); | |
372 | rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); | |
373 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
374 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20); | |
375 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
376 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); | |
377 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); | |
378 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); | |
379 | msleep(100); | |
380 | ||
381 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); | |
382 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); | |
383 | rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); | |
384 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
385 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); | |
386 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
387 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); | |
388 | msleep(100); | |
389 | ||
390 | priv->rf_init(dev); | |
391 | ||
392 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
393 | reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & 0xfffe; | |
394 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 0x1); | |
395 | rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); | |
396 | rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); | |
397 | rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); | |
398 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg); | |
399 | ||
400 | return 0; | |
401 | } | |
402 | ||
403 | static void rtl8187_set_channel(struct ieee80211_hw *dev, int channel) | |
404 | { | |
405 | u32 reg; | |
406 | struct rtl8187_priv *priv = dev->priv; | |
407 | ||
408 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); | |
409 | /* Enable TX loopback on MAC level to avoid TX during channel | |
410 | * changes, as this has be seen to causes problems and the | |
411 | * card will stop work until next reset | |
412 | */ | |
413 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
414 | reg | RTL818X_TX_CONF_LOOPBACK_MAC); | |
415 | msleep(10); | |
416 | rtl8225_rf_set_channel(dev, channel); | |
417 | msleep(10); | |
418 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
419 | } | |
420 | ||
4150c572 | 421 | static int rtl8187_start(struct ieee80211_hw *dev) |
605bebe2 MW |
422 | { |
423 | struct rtl8187_priv *priv = dev->priv; | |
424 | u32 reg; | |
425 | int ret; | |
426 | ||
427 | ret = rtl8187_init_hw(dev); | |
428 | if (ret) | |
429 | return ret; | |
430 | ||
431 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); | |
432 | ||
433 | rtl8187_init_urbs(dev); | |
434 | ||
435 | reg = RTL818X_RX_CONF_ONLYERLPKT | | |
436 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
437 | RTL818X_RX_CONF_BSSID | | |
438 | RTL818X_RX_CONF_MGMT | | |
605bebe2 MW |
439 | RTL818X_RX_CONF_DATA | |
440 | (7 << 13 /* RX FIFO threshold NONE */) | | |
441 | (7 << 10 /* MAX RX DMA */) | | |
442 | RTL818X_RX_CONF_BROADCAST | | |
605bebe2 | 443 | RTL818X_RX_CONF_NICMAC; |
605bebe2 | 444 | |
4150c572 | 445 | priv->rx_conf = reg; |
605bebe2 MW |
446 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); |
447 | ||
448 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
449 | reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; | |
450 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
451 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
452 | ||
453 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
454 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; | |
455 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
456 | reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; | |
457 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
458 | ||
459 | reg = RTL818X_TX_CONF_CW_MIN | | |
460 | (7 << 21 /* MAX TX DMA */) | | |
461 | RTL818X_TX_CONF_NO_ICV; | |
462 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
463 | ||
464 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
465 | reg |= RTL818X_CMD_TX_ENABLE; | |
466 | reg |= RTL818X_CMD_RX_ENABLE; | |
467 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
4150c572 | 472 | static void rtl8187_stop(struct ieee80211_hw *dev) |
605bebe2 MW |
473 | { |
474 | struct rtl8187_priv *priv = dev->priv; | |
475 | struct rtl8187_rx_info *info; | |
476 | struct sk_buff *skb; | |
477 | u32 reg; | |
478 | ||
479 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
480 | ||
481 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
482 | reg &= ~RTL818X_CMD_TX_ENABLE; | |
483 | reg &= ~RTL818X_CMD_RX_ENABLE; | |
484 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
485 | ||
486 | rtl8225_rf_stop(dev); | |
487 | ||
488 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
489 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); | |
490 | rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); | |
491 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
492 | ||
493 | while ((skb = skb_dequeue(&priv->rx_queue))) { | |
494 | info = (struct rtl8187_rx_info *)skb->cb; | |
495 | usb_kill_urb(info->urb); | |
496 | kfree_skb(skb); | |
497 | } | |
4150c572 | 498 | return; |
605bebe2 MW |
499 | } |
500 | ||
501 | static int rtl8187_add_interface(struct ieee80211_hw *dev, | |
502 | struct ieee80211_if_init_conf *conf) | |
503 | { | |
504 | struct rtl8187_priv *priv = dev->priv; | |
4150c572 | 505 | int i; |
605bebe2 | 506 | |
4150c572 JB |
507 | if (priv->mode != IEEE80211_IF_TYPE_MNTR) |
508 | return -EOPNOTSUPP; | |
605bebe2 MW |
509 | |
510 | switch (conf->type) { | |
511 | case IEEE80211_IF_TYPE_STA: | |
605bebe2 MW |
512 | priv->mode = conf->type; |
513 | break; | |
514 | default: | |
515 | return -EOPNOTSUPP; | |
516 | } | |
517 | ||
4150c572 JB |
518 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
519 | for (i = 0; i < ETH_ALEN; i++) | |
520 | rtl818x_iowrite8(priv, &priv->map->MAC[i], | |
521 | ((u8 *)conf->mac_addr)[i]); | |
522 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
605bebe2 MW |
523 | |
524 | return 0; | |
525 | } | |
526 | ||
527 | static void rtl8187_remove_interface(struct ieee80211_hw *dev, | |
528 | struct ieee80211_if_init_conf *conf) | |
529 | { | |
530 | struct rtl8187_priv *priv = dev->priv; | |
4150c572 | 531 | priv->mode = IEEE80211_IF_TYPE_MNTR; |
605bebe2 MW |
532 | } |
533 | ||
534 | static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | |
535 | { | |
536 | struct rtl8187_priv *priv = dev->priv; | |
537 | rtl8187_set_channel(dev, conf->channel); | |
538 | ||
539 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); | |
540 | ||
541 | if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) { | |
542 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); | |
543 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); | |
544 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); | |
545 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73); | |
546 | } else { | |
547 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); | |
548 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); | |
549 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); | |
550 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5); | |
551 | } | |
552 | ||
553 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); | |
554 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); | |
555 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
556 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); | |
557 | return 0; | |
558 | } | |
559 | ||
560 | static int rtl8187_config_interface(struct ieee80211_hw *dev, int if_id, | |
561 | struct ieee80211_if_conf *conf) | |
562 | { | |
563 | struct rtl8187_priv *priv = dev->priv; | |
564 | int i; | |
565 | ||
7e9ed188 DD |
566 | priv->if_id = if_id; |
567 | ||
605bebe2 MW |
568 | for (i = 0; i < ETH_ALEN; i++) |
569 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]); | |
570 | ||
571 | if (is_valid_ether_addr(conf->bssid)) | |
572 | rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA); | |
573 | else | |
574 | rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK); | |
575 | ||
576 | return 0; | |
577 | } | |
578 | ||
4150c572 JB |
579 | static void rtl8187_configure_filter(struct ieee80211_hw *dev, |
580 | unsigned int changed_flags, | |
581 | unsigned int *total_flags, | |
582 | int mc_count, struct dev_addr_list *mc_list) | |
583 | { | |
584 | struct rtl8187_priv *priv = dev->priv; | |
585 | ||
586 | *total_flags = 0; | |
587 | ||
588 | if (changed_flags & FIF_PROMISC_IN_BSS) | |
589 | priv->rx_conf ^= RTL818X_RX_CONF_NICMAC; | |
590 | if (changed_flags & FIF_ALLMULTI) | |
591 | priv->rx_conf ^= RTL818X_RX_CONF_MULTICAST; | |
592 | if (changed_flags & FIF_FCSFAIL) | |
593 | priv->rx_conf ^= RTL818X_RX_CONF_FCS; | |
594 | if (changed_flags & FIF_CONTROL) | |
595 | priv->rx_conf ^= RTL818X_RX_CONF_CTRL; | |
596 | if (changed_flags & FIF_OTHER_BSS) | |
597 | priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; | |
598 | ||
599 | if (mc_count > 0) | |
600 | priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; | |
601 | ||
602 | if (priv->rx_conf & RTL818X_RX_CONF_NICMAC) | |
603 | *total_flags |= FIF_PROMISC_IN_BSS; | |
604 | if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) | |
605 | *total_flags |= FIF_ALLMULTI; | |
606 | if (priv->rx_conf & RTL818X_RX_CONF_FCS) | |
607 | *total_flags |= FIF_FCSFAIL; | |
608 | if (priv->rx_conf & RTL818X_RX_CONF_CTRL) | |
609 | *total_flags |= FIF_CONTROL; | |
610 | if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) | |
611 | *total_flags |= FIF_OTHER_BSS; | |
612 | ||
613 | rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); | |
614 | } | |
615 | ||
605bebe2 MW |
616 | static const struct ieee80211_ops rtl8187_ops = { |
617 | .tx = rtl8187_tx, | |
4150c572 | 618 | .start = rtl8187_start, |
605bebe2 MW |
619 | .stop = rtl8187_stop, |
620 | .add_interface = rtl8187_add_interface, | |
621 | .remove_interface = rtl8187_remove_interface, | |
622 | .config = rtl8187_config, | |
623 | .config_interface = rtl8187_config_interface, | |
4150c572 | 624 | .configure_filter = rtl8187_configure_filter, |
605bebe2 MW |
625 | }; |
626 | ||
627 | static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) | |
628 | { | |
629 | struct ieee80211_hw *dev = eeprom->data; | |
630 | struct rtl8187_priv *priv = dev->priv; | |
631 | u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); | |
632 | ||
633 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; | |
634 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; | |
635 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; | |
636 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; | |
637 | } | |
638 | ||
639 | static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) | |
640 | { | |
641 | struct ieee80211_hw *dev = eeprom->data; | |
642 | struct rtl8187_priv *priv = dev->priv; | |
643 | u8 reg = RTL818X_EEPROM_CMD_PROGRAM; | |
644 | ||
645 | if (eeprom->reg_data_in) | |
646 | reg |= RTL818X_EEPROM_CMD_WRITE; | |
647 | if (eeprom->reg_data_out) | |
648 | reg |= RTL818X_EEPROM_CMD_READ; | |
649 | if (eeprom->reg_data_clock) | |
650 | reg |= RTL818X_EEPROM_CMD_CK; | |
651 | if (eeprom->reg_chip_select) | |
652 | reg |= RTL818X_EEPROM_CMD_CS; | |
653 | ||
654 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); | |
655 | udelay(10); | |
656 | } | |
657 | ||
658 | static int __devinit rtl8187_probe(struct usb_interface *intf, | |
659 | const struct usb_device_id *id) | |
660 | { | |
661 | struct usb_device *udev = interface_to_usbdev(intf); | |
662 | struct ieee80211_hw *dev; | |
663 | struct rtl8187_priv *priv; | |
664 | struct eeprom_93cx6 eeprom; | |
665 | struct ieee80211_channel *channel; | |
666 | u16 txpwr, reg; | |
667 | int err, i; | |
0795af57 | 668 | DECLARE_MAC_BUF(mac); |
605bebe2 MW |
669 | |
670 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); | |
671 | if (!dev) { | |
672 | printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); | |
673 | return -ENOMEM; | |
674 | } | |
675 | ||
676 | priv = dev->priv; | |
677 | ||
678 | SET_IEEE80211_DEV(dev, &intf->dev); | |
679 | usb_set_intfdata(intf, dev); | |
680 | priv->udev = udev; | |
681 | ||
682 | usb_get_dev(udev); | |
683 | ||
684 | skb_queue_head_init(&priv->rx_queue); | |
685 | memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); | |
686 | memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); | |
687 | priv->map = (struct rtl818x_csr *)0xFF00; | |
688 | priv->modes[0].mode = MODE_IEEE80211G; | |
689 | priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates); | |
690 | priv->modes[0].rates = priv->rates; | |
691 | priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels); | |
692 | priv->modes[0].channels = priv->channels; | |
693 | priv->modes[1].mode = MODE_IEEE80211B; | |
694 | priv->modes[1].num_rates = 4; | |
695 | priv->modes[1].rates = priv->rates; | |
696 | priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels); | |
697 | priv->modes[1].channels = priv->channels; | |
4150c572 | 698 | priv->mode = IEEE80211_IF_TYPE_MNTR; |
605bebe2 | 699 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
7848ba7d | 700 | IEEE80211_HW_RX_INCLUDES_FCS; |
605bebe2 MW |
701 | dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr); |
702 | dev->queues = 1; | |
703 | dev->max_rssi = 65; | |
704 | dev->max_signal = 64; | |
705 | ||
706 | for (i = 0; i < 2; i++) | |
707 | if ((err = ieee80211_register_hwmode(dev, &priv->modes[i]))) | |
708 | goto err_free_dev; | |
709 | ||
710 | eeprom.data = dev; | |
711 | eeprom.register_read = rtl8187_eeprom_register_read; | |
712 | eeprom.register_write = rtl8187_eeprom_register_write; | |
713 | if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) | |
714 | eeprom.width = PCI_EEPROM_WIDTH_93C66; | |
715 | else | |
716 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
717 | ||
718 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
719 | udelay(10); | |
720 | ||
721 | eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, | |
722 | (__le16 __force *)dev->wiphy->perm_addr, 3); | |
723 | if (!is_valid_ether_addr(dev->wiphy->perm_addr)) { | |
724 | printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " | |
725 | "generated MAC address\n"); | |
726 | random_ether_addr(dev->wiphy->perm_addr); | |
727 | } | |
728 | ||
729 | channel = priv->channels; | |
730 | for (i = 0; i < 3; i++) { | |
731 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, | |
732 | &txpwr); | |
733 | (*channel++).val = txpwr & 0xFF; | |
734 | (*channel++).val = txpwr >> 8; | |
735 | } | |
736 | for (i = 0; i < 2; i++) { | |
737 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, | |
738 | &txpwr); | |
739 | (*channel++).val = txpwr & 0xFF; | |
740 | (*channel++).val = txpwr >> 8; | |
741 | } | |
742 | for (i = 0; i < 2; i++) { | |
743 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i, | |
744 | &txpwr); | |
745 | (*channel++).val = txpwr & 0xFF; | |
746 | (*channel++).val = txpwr >> 8; | |
747 | } | |
748 | ||
749 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, | |
750 | &priv->txpwr_base); | |
751 | ||
752 | reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & ~1; | |
753 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 1); | |
754 | /* 0 means asic B-cut, we should use SW 3 wire | |
755 | * bit-by-bit banging for radio. 1 means we can use | |
756 | * USB specific request to write radio registers */ | |
757 | priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; | |
758 | rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg); | |
759 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
760 | ||
761 | rtl8225_write(dev, 0, 0x1B7); | |
762 | ||
763 | if (rtl8225_read(dev, 8) != 0x588 || rtl8225_read(dev, 9) != 0x700) | |
764 | priv->rf_init = rtl8225_rf_init; | |
765 | else | |
766 | priv->rf_init = rtl8225z2_rf_init; | |
767 | ||
768 | rtl8225_write(dev, 0, 0x0B7); | |
769 | ||
770 | err = ieee80211_register_hw(dev); | |
771 | if (err) { | |
772 | printk(KERN_ERR "rtl8187: Cannot register device\n"); | |
773 | goto err_free_dev; | |
774 | } | |
775 | ||
0795af57 JP |
776 | printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n", |
777 | wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr), | |
605bebe2 MW |
778 | priv->asic_rev, priv->rf_init == rtl8225_rf_init ? |
779 | "rtl8225" : "rtl8225z2"); | |
780 | ||
781 | return 0; | |
782 | ||
783 | err_free_dev: | |
784 | ieee80211_free_hw(dev); | |
785 | usb_set_intfdata(intf, NULL); | |
786 | usb_put_dev(udev); | |
787 | return err; | |
788 | } | |
789 | ||
790 | static void __devexit rtl8187_disconnect(struct usb_interface *intf) | |
791 | { | |
792 | struct ieee80211_hw *dev = usb_get_intfdata(intf); | |
793 | struct rtl8187_priv *priv; | |
794 | ||
795 | if (!dev) | |
796 | return; | |
797 | ||
798 | ieee80211_unregister_hw(dev); | |
799 | ||
800 | priv = dev->priv; | |
801 | usb_put_dev(interface_to_usbdev(intf)); | |
802 | ieee80211_free_hw(dev); | |
803 | } | |
804 | ||
805 | static struct usb_driver rtl8187_driver = { | |
806 | .name = KBUILD_MODNAME, | |
807 | .id_table = rtl8187_table, | |
808 | .probe = rtl8187_probe, | |
809 | .disconnect = rtl8187_disconnect, | |
810 | }; | |
811 | ||
812 | static int __init rtl8187_init(void) | |
813 | { | |
814 | return usb_register(&rtl8187_driver); | |
815 | } | |
816 | ||
817 | static void __exit rtl8187_exit(void) | |
818 | { | |
819 | usb_deregister(&rtl8187_driver); | |
820 | } | |
821 | ||
822 | module_init(rtl8187_init); | |
823 | module_exit(rtl8187_exit); |