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Commit | Line | Data |
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605bebe2 MW |
1 | /* |
2 | * Linux device driver for RTL8187 | |
3 | * | |
4 | * Copyright 2007 Michael Wu <flamingice@sourmilk.net> | |
5 | * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> | |
6 | * | |
7 | * Based on the r8187 driver, which is: | |
8 | * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. | |
9 | * | |
3461fc12 LF |
10 | * The driver was extended to the RTL8187B in 2008 by: |
11 | * Herton Ronaldo Krzesinski <herton@mandriva.com.br> | |
12 | * Hin-Tak Leung <htl10@users.sourceforge.net> | |
13 | * Larry Finger <Larry.Finger@lwfinger.net> | |
14 | * | |
0aec00ae JL |
15 | * Magic delays and register offsets below are taken from the original |
16 | * r8187 driver sources. Thanks to Realtek for their support! | |
605bebe2 MW |
17 | * |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License version 2 as | |
20 | * published by the Free Software Foundation. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/usb.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/etherdevice.h> | |
27 | #include <linux/eeprom_93cx6.h> | |
28 | #include <net/mac80211.h> | |
29 | ||
30 | #include "rtl8187.h" | |
31 | #include "rtl8187_rtl8225.h" | |
a027087a LF |
32 | #ifdef CONFIG_RTL8187_LEDS |
33 | #include "rtl8187_leds.h" | |
34 | #endif | |
ca9152e3 | 35 | #include "rtl8187_rfkill.h" |
605bebe2 MW |
36 | |
37 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); | |
38 | MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); | |
3461fc12 LF |
39 | MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>"); |
40 | MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>"); | |
41 | MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>"); | |
f8a08c34 | 42 | MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); |
605bebe2 MW |
43 | MODULE_LICENSE("GPL"); |
44 | ||
45 | static struct usb_device_id rtl8187_table[] __devinitdata = { | |
7c7e6af3 AM |
46 | /* Asus */ |
47 | {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, | |
eaca90da FF |
48 | /* Belkin */ |
49 | {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B}, | |
605bebe2 | 50 | /* Realtek */ |
f8a08c34 HTL |
51 | {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, |
52 | {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, | |
53 | {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, | |
746db510 | 54 | {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B}, |
046ee5d2 LF |
55 | /* Surecom */ |
56 | {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187}, | |
57 | /* Logitech */ | |
58 | {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187}, | |
605bebe2 | 59 | /* Netgear */ |
f8a08c34 HTL |
60 | {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, |
61 | {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, | |
fcd7cc14 | 62 | {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B}, |
c3cf60a9 | 63 | /* HP */ |
f8a08c34 | 64 | {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187}, |
9934550d | 65 | /* Sitecom */ |
f8a08c34 | 66 | {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, |
f3c76918 | 67 | {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, |
174b2496 | 68 | {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B}, |
046ee5d2 LF |
69 | /* Sphairon Access Systems GmbH */ |
70 | {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187}, | |
71 | /* Dick Smith Electronics */ | |
72 | {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187}, | |
8f7c41d4 IK |
73 | /* Abocom */ |
74 | {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187}, | |
046ee5d2 LF |
75 | /* Qcom */ |
76 | {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187}, | |
77 | /* AirLive */ | |
78 | {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187}, | |
aeeab4ff JL |
79 | /* Linksys */ |
80 | {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B}, | |
605bebe2 MW |
81 | {} |
82 | }; | |
83 | ||
84 | MODULE_DEVICE_TABLE(usb, rtl8187_table); | |
85 | ||
8318d78a JB |
86 | static const struct ieee80211_rate rtl818x_rates[] = { |
87 | { .bitrate = 10, .hw_value = 0, }, | |
88 | { .bitrate = 20, .hw_value = 1, }, | |
89 | { .bitrate = 55, .hw_value = 2, }, | |
90 | { .bitrate = 110, .hw_value = 3, }, | |
91 | { .bitrate = 60, .hw_value = 4, }, | |
92 | { .bitrate = 90, .hw_value = 5, }, | |
93 | { .bitrate = 120, .hw_value = 6, }, | |
94 | { .bitrate = 180, .hw_value = 7, }, | |
95 | { .bitrate = 240, .hw_value = 8, }, | |
96 | { .bitrate = 360, .hw_value = 9, }, | |
97 | { .bitrate = 480, .hw_value = 10, }, | |
98 | { .bitrate = 540, .hw_value = 11, }, | |
99 | }; | |
100 | ||
101 | static const struct ieee80211_channel rtl818x_channels[] = { | |
102 | { .center_freq = 2412 }, | |
103 | { .center_freq = 2417 }, | |
104 | { .center_freq = 2422 }, | |
105 | { .center_freq = 2427 }, | |
106 | { .center_freq = 2432 }, | |
107 | { .center_freq = 2437 }, | |
108 | { .center_freq = 2442 }, | |
109 | { .center_freq = 2447 }, | |
110 | { .center_freq = 2452 }, | |
111 | { .center_freq = 2457 }, | |
112 | { .center_freq = 2462 }, | |
113 | { .center_freq = 2467 }, | |
114 | { .center_freq = 2472 }, | |
115 | { .center_freq = 2484 }, | |
116 | }; | |
117 | ||
4150c572 JB |
118 | static void rtl8187_iowrite_async_cb(struct urb *urb) |
119 | { | |
120 | kfree(urb->context); | |
4150c572 JB |
121 | } |
122 | ||
123 | static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, | |
124 | void *data, u16 len) | |
125 | { | |
126 | struct usb_ctrlrequest *dr; | |
127 | struct urb *urb; | |
128 | struct rtl8187_async_write_data { | |
129 | u8 data[4]; | |
130 | struct usb_ctrlrequest dr; | |
131 | } *buf; | |
ea8ee240 | 132 | int rc; |
4150c572 JB |
133 | |
134 | buf = kmalloc(sizeof(*buf), GFP_ATOMIC); | |
135 | if (!buf) | |
136 | return; | |
137 | ||
138 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
139 | if (!urb) { | |
140 | kfree(buf); | |
141 | return; | |
142 | } | |
143 | ||
144 | dr = &buf->dr; | |
145 | ||
146 | dr->bRequestType = RTL8187_REQT_WRITE; | |
147 | dr->bRequest = RTL8187_REQ_SET_REG; | |
148 | dr->wValue = addr; | |
149 | dr->wIndex = 0; | |
150 | dr->wLength = cpu_to_le16(len); | |
151 | ||
152 | memcpy(buf, data, len); | |
153 | ||
154 | usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), | |
155 | (unsigned char *)dr, buf, len, | |
156 | rtl8187_iowrite_async_cb, buf); | |
c1db52b9 | 157 | usb_anchor_urb(urb, &priv->anchored); |
ea8ee240 ON |
158 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
159 | if (rc < 0) { | |
160 | kfree(buf); | |
c1db52b9 | 161 | usb_unanchor_urb(urb); |
ea8ee240 | 162 | } |
c1db52b9 | 163 | usb_free_urb(urb); |
4150c572 JB |
164 | } |
165 | ||
166 | static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, | |
167 | __le32 *addr, u32 val) | |
168 | { | |
169 | __le32 buf = cpu_to_le32(val); | |
170 | ||
171 | rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), | |
172 | &buf, sizeof(buf)); | |
173 | } | |
174 | ||
605bebe2 MW |
175 | void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) |
176 | { | |
177 | struct rtl8187_priv *priv = dev->priv; | |
178 | ||
179 | data <<= 8; | |
180 | data |= addr | 0x80; | |
181 | ||
182 | rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); | |
183 | rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); | |
184 | rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); | |
185 | rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); | |
605bebe2 MW |
186 | } |
187 | ||
188 | static void rtl8187_tx_cb(struct urb *urb) | |
189 | { | |
605bebe2 | 190 | struct sk_buff *skb = (struct sk_buff *)urb->context; |
e039fa4a | 191 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
e6a9854b | 192 | struct ieee80211_hw *hw = info->rate_driver_data[0]; |
6f7853f3 | 193 | struct rtl8187_priv *priv = hw->priv; |
605bebe2 | 194 | |
6f7853f3 HTL |
195 | skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) : |
196 | sizeof(struct rtl8187_tx_hdr)); | |
e6a9854b | 197 | ieee80211_tx_info_clear_status(info); |
3517afde | 198 | |
2f47690e LF |
199 | if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) { |
200 | if (priv->is_rtl8187b) { | |
201 | skb_queue_tail(&priv->b_tx_status.queue, skb); | |
202 | ||
203 | /* queue is "full", discard last items */ | |
204 | while (skb_queue_len(&priv->b_tx_status.queue) > 5) { | |
205 | struct sk_buff *old_skb; | |
206 | ||
207 | dev_dbg(&priv->udev->dev, | |
208 | "transmit status queue full\n"); | |
209 | ||
210 | old_skb = skb_dequeue(&priv->b_tx_status.queue); | |
211 | ieee80211_tx_status_irqsafe(hw, old_skb); | |
212 | } | |
213 | return; | |
214 | } else { | |
3517afde | 215 | info->flags |= IEEE80211_TX_STAT_ACK; |
2f47690e LF |
216 | } |
217 | } | |
218 | if (priv->is_rtl8187b) | |
3517afde | 219 | ieee80211_tx_status_irqsafe(hw, skb); |
2f47690e LF |
220 | else { |
221 | /* Retry information for the RTI8187 is only available by | |
222 | * reading a register in the device. We are in interrupt mode | |
223 | * here, thus queue the skb and finish on a work queue. */ | |
224 | skb_queue_tail(&priv->b_tx_status.queue, skb); | |
42935eca | 225 | ieee80211_queue_delayed_work(hw, &priv->work, 0); |
3517afde | 226 | } |
605bebe2 MW |
227 | } |
228 | ||
e039fa4a | 229 | static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb) |
605bebe2 MW |
230 | { |
231 | struct rtl8187_priv *priv = dev->priv; | |
e039fa4a | 232 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
6f7853f3 HTL |
233 | unsigned int ep; |
234 | void *buf; | |
605bebe2 | 235 | struct urb *urb; |
98798f48 MW |
236 | __le16 rts_dur = 0; |
237 | u32 flags; | |
ea8ee240 | 238 | int rc; |
605bebe2 MW |
239 | |
240 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
241 | if (!urb) { | |
242 | kfree_skb(skb); | |
d6e2be98 | 243 | return NETDEV_TX_OK; |
605bebe2 MW |
244 | } |
245 | ||
98798f48 | 246 | flags = skb->len; |
38e3b0d8 | 247 | flags |= RTL818X_TX_DESC_FLAG_NO_ENC; |
aa68cbfb | 248 | |
e039fa4a | 249 | flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24; |
8b7b1e05 | 250 | if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control)) |
38e3b0d8 | 251 | flags |= RTL818X_TX_DESC_FLAG_MOREFRAG; |
e6a9854b | 252 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { |
38e3b0d8 | 253 | flags |= RTL818X_TX_DESC_FLAG_RTS; |
e039fa4a | 254 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
32bfd35d | 255 | rts_dur = ieee80211_rts_duration(dev, priv->vif, |
e039fa4a | 256 | skb->len, info); |
e6a9854b | 257 | } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
38e3b0d8 | 258 | flags |= RTL818X_TX_DESC_FLAG_CTS; |
e039fa4a | 259 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
aa68cbfb | 260 | } |
98798f48 | 261 | |
6f7853f3 HTL |
262 | if (!priv->is_rtl8187b) { |
263 | struct rtl8187_tx_hdr *hdr = | |
264 | (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
265 | hdr->flags = cpu_to_le32(flags); | |
266 | hdr->len = 0; | |
267 | hdr->rts_duration = rts_dur; | |
d9a1f486 | 268 | hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); |
6f7853f3 HTL |
269 | buf = hdr; |
270 | ||
271 | ep = 2; | |
272 | } else { | |
273 | /* fc needs to be calculated before skb_push() */ | |
274 | unsigned int epmap[4] = { 6, 7, 5, 4 }; | |
275 | struct ieee80211_hdr *tx_hdr = | |
276 | (struct ieee80211_hdr *)(skb->data); | |
277 | u16 fc = le16_to_cpu(tx_hdr->frame_control); | |
278 | ||
279 | struct rtl8187b_tx_hdr *hdr = | |
280 | (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
281 | struct ieee80211_rate *txrate = | |
282 | ieee80211_get_tx_rate(dev, info); | |
283 | memset(hdr, 0, sizeof(*hdr)); | |
284 | hdr->flags = cpu_to_le32(flags); | |
285 | hdr->rts_duration = rts_dur; | |
d9a1f486 | 286 | hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); |
6f7853f3 HTL |
287 | hdr->tx_duration = |
288 | ieee80211_generic_frame_duration(dev, priv->vif, | |
289 | skb->len, txrate); | |
290 | buf = hdr; | |
291 | ||
292 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
293 | ep = 12; | |
294 | else | |
295 | ep = epmap[skb_get_queue_mapping(skb)]; | |
296 | } | |
605bebe2 | 297 | |
e6a9854b JB |
298 | info->rate_driver_data[0] = dev; |
299 | info->rate_driver_data[1] = urb; | |
6f7853f3 HTL |
300 | |
301 | usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep), | |
302 | buf, skb->len, rtl8187_tx_cb, skb); | |
2fcbab04 | 303 | urb->transfer_flags |= URB_ZERO_PACKET; |
c1db52b9 | 304 | usb_anchor_urb(urb, &priv->anchored); |
ea8ee240 ON |
305 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
306 | if (rc < 0) { | |
c1db52b9 | 307 | usb_unanchor_urb(urb); |
ea8ee240 ON |
308 | kfree_skb(skb); |
309 | } | |
c1db52b9 | 310 | usb_free_urb(urb); |
605bebe2 | 311 | |
d6e2be98 | 312 | return NETDEV_TX_OK; |
605bebe2 MW |
313 | } |
314 | ||
315 | static void rtl8187_rx_cb(struct urb *urb) | |
316 | { | |
317 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
318 | struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; | |
319 | struct ieee80211_hw *dev = info->dev; | |
320 | struct rtl8187_priv *priv = dev->priv; | |
605bebe2 MW |
321 | struct ieee80211_rx_status rx_status = { 0 }; |
322 | int rate, signal; | |
4150c572 | 323 | u32 flags; |
d8588227 | 324 | unsigned long f; |
605bebe2 | 325 | |
d8588227 | 326 | spin_lock_irqsave(&priv->rx_queue.lock, f); |
46c37672 | 327 | __skb_unlink(skb, &priv->rx_queue); |
d8588227 | 328 | spin_unlock_irqrestore(&priv->rx_queue.lock, f); |
c1db52b9 | 329 | skb_put(skb, urb->actual_length); |
605bebe2 MW |
330 | |
331 | if (unlikely(urb->status)) { | |
605bebe2 MW |
332 | dev_kfree_skb_irq(skb); |
333 | return; | |
334 | } | |
335 | ||
6f7853f3 HTL |
336 | if (!priv->is_rtl8187b) { |
337 | struct rtl8187_rx_hdr *hdr = | |
338 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
339 | flags = le32_to_cpu(hdr->flags); | |
a7db74f4 | 340 | /* As with the RTL8187B below, the AGC is used to calculate |
70d9f405 | 341 | * signal strength. In this case, the scaling |
a7db74f4 LF |
342 | * constants are derived from the output of p54usb. |
343 | */ | |
a7db74f4 | 344 | signal = -4 - ((27 * hdr->agc) >> 6); |
6f7853f3 | 345 | rx_status.antenna = (hdr->signal >> 7) & 1; |
6f7853f3 | 346 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
6f7853f3 HTL |
347 | } else { |
348 | struct rtl8187b_rx_hdr *hdr = | |
349 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
0ccd58fc LF |
350 | /* The Realtek datasheet for the RTL8187B shows that the RX |
351 | * header contains the following quantities: signal quality, | |
352 | * RSSI, AGC, the received power in dB, and the measured SNR. | |
353 | * In testing, none of these quantities show qualitative | |
354 | * agreement with AP signal strength, except for the AGC, | |
355 | * which is inversely proportional to the strength of the | |
70d9f405 LF |
356 | * signal. In the following, the signal strength |
357 | * is derived from the AGC. The arbitrary scaling constants | |
0ccd58fc LF |
358 | * are chosen to make the results close to the values obtained |
359 | * for a BCM4312 using b43 as the driver. The noise is ignored | |
360 | * for now. | |
361 | */ | |
6f7853f3 | 362 | flags = le32_to_cpu(hdr->flags); |
0ccd58fc | 363 | signal = 14 - hdr->agc / 2; |
0ccd58fc | 364 | rx_status.antenna = (hdr->rssi >> 7) & 1; |
6f7853f3 | 365 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
6f7853f3 | 366 | } |
605bebe2 | 367 | |
a7db74f4 LF |
368 | rx_status.signal = signal; |
369 | priv->signal = signal; | |
370 | rate = (flags >> 20) & 0xF; | |
6f7853f3 | 371 | skb_trim(skb, flags & 0x0FFF); |
8318d78a JB |
372 | rx_status.rate_idx = rate; |
373 | rx_status.freq = dev->conf.channel->center_freq; | |
374 | rx_status.band = dev->conf.channel->band; | |
03bffc13 | 375 | rx_status.flag |= RX_FLAG_TSFT; |
38e3b0d8 | 376 | if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) |
4150c572 | 377 | rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; |
f1d58c25 JB |
378 | memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); |
379 | ieee80211_rx_irqsafe(dev, skb); | |
605bebe2 MW |
380 | |
381 | skb = dev_alloc_skb(RTL8187_MAX_RX); | |
382 | if (unlikely(!skb)) { | |
605bebe2 MW |
383 | /* TODO check rx queue length and refill *somewhere* */ |
384 | return; | |
385 | } | |
386 | ||
387 | info = (struct rtl8187_rx_info *)skb->cb; | |
388 | info->urb = urb; | |
389 | info->dev = dev; | |
390 | urb->transfer_buffer = skb_tail_pointer(skb); | |
391 | urb->context = skb; | |
392 | skb_queue_tail(&priv->rx_queue, skb); | |
393 | ||
c1db52b9 LF |
394 | usb_anchor_urb(urb, &priv->anchored); |
395 | if (usb_submit_urb(urb, GFP_ATOMIC)) { | |
396 | usb_unanchor_urb(urb); | |
397 | skb_unlink(skb, &priv->rx_queue); | |
398 | dev_kfree_skb_irq(skb); | |
399 | } | |
605bebe2 MW |
400 | } |
401 | ||
402 | static int rtl8187_init_urbs(struct ieee80211_hw *dev) | |
403 | { | |
404 | struct rtl8187_priv *priv = dev->priv; | |
c1db52b9 | 405 | struct urb *entry = NULL; |
605bebe2 MW |
406 | struct sk_buff *skb; |
407 | struct rtl8187_rx_info *info; | |
c1db52b9 | 408 | int ret = 0; |
605bebe2 | 409 | |
2a57cf3e | 410 | while (skb_queue_len(&priv->rx_queue) < 16) { |
605bebe2 | 411 | skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); |
c1db52b9 LF |
412 | if (!skb) { |
413 | ret = -ENOMEM; | |
414 | goto err; | |
415 | } | |
605bebe2 MW |
416 | entry = usb_alloc_urb(0, GFP_KERNEL); |
417 | if (!entry) { | |
c1db52b9 LF |
418 | ret = -ENOMEM; |
419 | goto err; | |
605bebe2 MW |
420 | } |
421 | usb_fill_bulk_urb(entry, priv->udev, | |
6f7853f3 HTL |
422 | usb_rcvbulkpipe(priv->udev, |
423 | priv->is_rtl8187b ? 3 : 1), | |
605bebe2 MW |
424 | skb_tail_pointer(skb), |
425 | RTL8187_MAX_RX, rtl8187_rx_cb, skb); | |
426 | info = (struct rtl8187_rx_info *)skb->cb; | |
427 | info->urb = entry; | |
428 | info->dev = dev; | |
429 | skb_queue_tail(&priv->rx_queue, skb); | |
c1db52b9 LF |
430 | usb_anchor_urb(entry, &priv->anchored); |
431 | ret = usb_submit_urb(entry, GFP_KERNEL); | |
432 | if (ret) { | |
433 | skb_unlink(skb, &priv->rx_queue); | |
434 | usb_unanchor_urb(entry); | |
435 | goto err; | |
436 | } | |
437 | usb_free_urb(entry); | |
605bebe2 | 438 | } |
c1db52b9 | 439 | return ret; |
605bebe2 | 440 | |
c1db52b9 LF |
441 | err: |
442 | usb_free_urb(entry); | |
443 | kfree_skb(skb); | |
444 | usb_kill_anchored_urbs(&priv->anchored); | |
445 | return ret; | |
605bebe2 MW |
446 | } |
447 | ||
3517afde HRK |
448 | static void rtl8187b_status_cb(struct urb *urb) |
449 | { | |
450 | struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context; | |
451 | struct rtl8187_priv *priv = hw->priv; | |
452 | u64 val; | |
453 | unsigned int cmd_type; | |
454 | ||
c1db52b9 | 455 | if (unlikely(urb->status)) |
3517afde | 456 | return; |
3517afde HRK |
457 | |
458 | /* | |
459 | * Read from status buffer: | |
460 | * | |
461 | * bits [30:31] = cmd type: | |
462 | * - 0 indicates tx beacon interrupt | |
463 | * - 1 indicates tx close descriptor | |
464 | * | |
465 | * In the case of tx beacon interrupt: | |
466 | * [0:9] = Last Beacon CW | |
467 | * [10:29] = reserved | |
468 | * [30:31] = 00b | |
469 | * [32:63] = Last Beacon TSF | |
470 | * | |
471 | * If it's tx close descriptor: | |
472 | * [0:7] = Packet Retry Count | |
473 | * [8:14] = RTS Retry Count | |
474 | * [15] = TOK | |
475 | * [16:27] = Sequence No | |
476 | * [28] = LS | |
477 | * [29] = FS | |
478 | * [30:31] = 01b | |
479 | * [32:47] = unused (reserved?) | |
480 | * [48:63] = MAC Used Time | |
481 | */ | |
482 | val = le64_to_cpu(priv->b_tx_status.buf); | |
483 | ||
484 | cmd_type = (val >> 30) & 0x3; | |
485 | if (cmd_type == 1) { | |
486 | unsigned int pkt_rc, seq_no; | |
487 | bool tok; | |
488 | struct sk_buff *skb; | |
489 | struct ieee80211_hdr *ieee80211hdr; | |
490 | unsigned long flags; | |
491 | ||
492 | pkt_rc = val & 0xFF; | |
493 | tok = val & (1 << 15); | |
494 | seq_no = (val >> 16) & 0xFFF; | |
495 | ||
496 | spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags); | |
497 | skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) { | |
498 | ieee80211hdr = (struct ieee80211_hdr *)skb->data; | |
499 | ||
500 | /* | |
501 | * While testing, it was discovered that the seq_no | |
502 | * doesn't actually contains the sequence number. | |
503 | * Instead of returning just the 12 bits of sequence | |
504 | * number, hardware is returning entire sequence control | |
505 | * (fragment number plus sequence number) in a 12 bit | |
506 | * only field overflowing after some time. As a | |
507 | * workaround, just consider the lower bits, and expect | |
508 | * it's unlikely we wrongly ack some sent data | |
509 | */ | |
510 | if ((le16_to_cpu(ieee80211hdr->seq_ctrl) | |
511 | & 0xFFF) == seq_no) | |
512 | break; | |
513 | } | |
514 | if (skb != (struct sk_buff *) &priv->b_tx_status.queue) { | |
515 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | |
516 | ||
517 | __skb_unlink(skb, &priv->b_tx_status.queue); | |
518 | if (tok) | |
519 | info->flags |= IEEE80211_TX_STAT_ACK; | |
1548c86a | 520 | info->status.rates[0].count = pkt_rc + 1; |
3517afde HRK |
521 | |
522 | ieee80211_tx_status_irqsafe(hw, skb); | |
523 | } | |
524 | spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags); | |
525 | } | |
526 | ||
c1db52b9 LF |
527 | usb_anchor_urb(urb, &priv->anchored); |
528 | if (usb_submit_urb(urb, GFP_ATOMIC)) | |
529 | usb_unanchor_urb(urb); | |
3517afde HRK |
530 | } |
531 | ||
532 | static int rtl8187b_init_status_urb(struct ieee80211_hw *dev) | |
533 | { | |
534 | struct rtl8187_priv *priv = dev->priv; | |
535 | struct urb *entry; | |
c1db52b9 | 536 | int ret = 0; |
3517afde HRK |
537 | |
538 | entry = usb_alloc_urb(0, GFP_KERNEL); | |
539 | if (!entry) | |
540 | return -ENOMEM; | |
3517afde HRK |
541 | |
542 | usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9), | |
543 | &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf), | |
544 | rtl8187b_status_cb, dev); | |
545 | ||
c1db52b9 LF |
546 | usb_anchor_urb(entry, &priv->anchored); |
547 | ret = usb_submit_urb(entry, GFP_KERNEL); | |
548 | if (ret) | |
549 | usb_unanchor_urb(entry); | |
550 | usb_free_urb(entry); | |
3517afde | 551 | |
c1db52b9 | 552 | return ret; |
3517afde HRK |
553 | } |
554 | ||
f8a08c34 | 555 | static int rtl8187_cmd_reset(struct ieee80211_hw *dev) |
605bebe2 MW |
556 | { |
557 | struct rtl8187_priv *priv = dev->priv; | |
558 | u8 reg; | |
559 | int i; | |
560 | ||
605bebe2 MW |
561 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
562 | reg &= (1 << 1); | |
563 | reg |= RTL818X_CMD_RESET; | |
564 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
565 | ||
566 | i = 10; | |
567 | do { | |
568 | msleep(2); | |
569 | if (!(rtl818x_ioread8(priv, &priv->map->CMD) & | |
570 | RTL818X_CMD_RESET)) | |
571 | break; | |
572 | } while (--i); | |
573 | ||
574 | if (!i) { | |
575 | printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy)); | |
576 | return -ETIMEDOUT; | |
577 | } | |
578 | ||
579 | /* reload registers from eeprom */ | |
580 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); | |
581 | ||
582 | i = 10; | |
583 | do { | |
584 | msleep(4); | |
585 | if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & | |
586 | RTL818X_EEPROM_CMD_CONFIG)) | |
587 | break; | |
588 | } while (--i); | |
589 | ||
590 | if (!i) { | |
591 | printk(KERN_ERR "%s: eeprom reset timeout!\n", | |
592 | wiphy_name(dev->wiphy)); | |
593 | return -ETIMEDOUT; | |
594 | } | |
595 | ||
f8a08c34 HTL |
596 | return 0; |
597 | } | |
598 | ||
599 | static int rtl8187_init_hw(struct ieee80211_hw *dev) | |
600 | { | |
601 | struct rtl8187_priv *priv = dev->priv; | |
602 | u8 reg; | |
603 | int res; | |
604 | ||
605 | /* reset */ | |
606 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
607 | RTL818X_EEPROM_CMD_CONFIG); | |
608 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
609 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | | |
610 | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
4ece16a1 HRK |
611 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, |
612 | RTL8187_RTL8225_ANAPARAM_ON); | |
613 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, | |
614 | RTL8187_RTL8225_ANAPARAM2_ON); | |
f8a08c34 HTL |
615 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & |
616 | ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
617 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
618 | RTL818X_EEPROM_CMD_NORMAL); | |
619 | ||
620 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
621 | ||
622 | msleep(200); | |
623 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); | |
624 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); | |
625 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); | |
626 | msleep(200); | |
627 | ||
628 | res = rtl8187_cmd_reset(dev); | |
629 | if (res) | |
630 | return res; | |
631 | ||
605bebe2 MW |
632 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
633 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
f8a08c34 HTL |
634 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
635 | reg | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
4ece16a1 HRK |
636 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, |
637 | RTL8187_RTL8225_ANAPARAM_ON); | |
638 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, | |
639 | RTL8187_RTL8225_ANAPARAM2_ON); | |
f8a08c34 HTL |
640 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
641 | reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
605bebe2 MW |
642 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
643 | ||
644 | /* setup card */ | |
645 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
ca9152e3 | 646 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); |
605bebe2 MW |
647 | |
648 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
ca9152e3 | 649 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 1); |
605bebe2 MW |
650 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); |
651 | ||
652 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 MW |
653 | |
654 | rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); | |
655 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
656 | reg &= 0x3F; | |
657 | reg |= 0x80; | |
658 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); | |
659 | ||
660 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
661 | ||
662 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); | |
663 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
2f47690e | 664 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0); |
605bebe2 MW |
665 | |
666 | // TODO: set RESP_RATE and BRSR properly | |
667 | rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); | |
668 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
669 | ||
670 | /* host_usb_init */ | |
671 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
ca9152e3 | 672 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); |
605bebe2 MW |
673 | reg = rtl818x_ioread8(priv, (u8 *)0xFE53); |
674 | rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); | |
675 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
ca9152e3 | 676 | rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20); |
605bebe2 MW |
677 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); |
678 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); | |
679 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); | |
680 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); | |
681 | msleep(100); | |
682 | ||
683 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); | |
684 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); | |
685 | rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); | |
f8a08c34 HTL |
686 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
687 | RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 | 688 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); |
f8a08c34 HTL |
689 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
690 | RTL818X_EEPROM_CMD_NORMAL); | |
605bebe2 MW |
691 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); |
692 | msleep(100); | |
693 | ||
f6532111 | 694 | priv->rf->init(dev); |
605bebe2 MW |
695 | |
696 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
f6532111 MW |
697 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
698 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
699 | rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); |
700 | rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); | |
701 | rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); | |
f6532111 | 702 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
703 | |
704 | return 0; | |
705 | } | |
706 | ||
f8a08c34 HTL |
707 | static const u8 rtl8187b_reg_table[][3] = { |
708 | {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0}, | |
709 | {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0}, | |
710 | {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0}, | |
711 | {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0}, | |
712 | ||
713 | {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1}, | |
714 | {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1}, | |
715 | {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1}, | |
716 | {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1}, | |
717 | {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1}, | |
718 | {0xF7, 0x07, 1}, {0xF8, 0x08, 1}, | |
719 | ||
720 | {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2}, | |
721 | {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2}, | |
722 | {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2}, | |
723 | {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2}, | |
724 | {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2}, | |
725 | {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2}, | |
726 | {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2}, | |
727 | {0x73, 0x9A, 2}, | |
728 | ||
729 | {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0}, | |
730 | {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, | |
731 | {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0}, | |
732 | {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, | |
a027087a | 733 | {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2}, |
f8a08c34 | 734 | |
a027087a LF |
735 | {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0}, |
736 | {0x8F, 0x00, 0} | |
f8a08c34 HTL |
737 | }; |
738 | ||
739 | static int rtl8187b_init_hw(struct ieee80211_hw *dev) | |
740 | { | |
741 | struct rtl8187_priv *priv = dev->priv; | |
742 | int res, i; | |
743 | u8 reg; | |
744 | ||
745 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
746 | RTL818X_EEPROM_CMD_CONFIG); | |
747 | ||
748 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
749 | reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT; | |
750 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
4ece16a1 HRK |
751 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, |
752 | RTL8187B_RTL8225_ANAPARAM2_ON); | |
753 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, | |
754 | RTL8187B_RTL8225_ANAPARAM_ON); | |
755 | rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, | |
756 | RTL8187B_RTL8225_ANAPARAM3_ON); | |
f8a08c34 HTL |
757 | |
758 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10); | |
759 | reg = rtl818x_ioread8(priv, (u8 *)0xFF62); | |
760 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5)); | |
761 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5)); | |
762 | ||
763 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
764 | reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE; | |
765 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
766 | ||
767 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
768 | RTL818X_EEPROM_CMD_NORMAL); | |
769 | ||
770 | res = rtl8187_cmd_reset(dev); | |
771 | if (res) | |
772 | return res; | |
773 | ||
774 | rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF); | |
775 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
776 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
777 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
778 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
779 | reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT | | |
780 | RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
781 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
782 | ||
783 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1); | |
f8a08c34 HTL |
784 | |
785 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
786 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); | |
787 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1); | |
788 | ||
789 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
790 | RTL818X_EEPROM_CMD_CONFIG); | |
791 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
792 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80); | |
793 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
794 | RTL818X_EEPROM_CMD_NORMAL); | |
795 | ||
796 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
797 | for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) { | |
798 | rtl818x_iowrite8_idx(priv, | |
799 | (u8 *)(uintptr_t) | |
800 | (rtl8187b_reg_table[i][0] | 0xFF00), | |
801 | rtl8187b_reg_table[i][1], | |
802 | rtl8187b_reg_table[i][2]); | |
803 | } | |
804 | ||
805 | rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50); | |
806 | rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0); | |
807 | ||
808 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1); | |
809 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1); | |
810 | rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1); | |
811 | ||
812 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001); | |
813 | ||
814 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2); | |
815 | ||
816 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
817 | RTL818X_EEPROM_CMD_CONFIG); | |
818 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
819 | reg |= RTL818X_CONFIG3_ANAPARAM_WRITE; | |
820 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
821 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
822 | RTL818X_EEPROM_CMD_NORMAL); | |
823 | ||
824 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); | |
825 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488); | |
826 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); | |
2f20596b | 827 | msleep(100); |
f8a08c34 HTL |
828 | |
829 | priv->rf->init(dev); | |
830 | ||
831 | reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE; | |
832 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
833 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); | |
834 | ||
835 | rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4); | |
836 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00); | |
837 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
838 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
839 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F); | |
840 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
841 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
842 | ||
843 | reg = rtl818x_ioread8(priv, (u8 *)0xFFDB); | |
844 | rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2)); | |
845 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3); | |
846 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3); | |
847 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3); | |
848 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3); | |
849 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3); | |
850 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3); | |
851 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0); | |
852 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1); | |
853 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1); | |
854 | rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10); | |
855 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2); | |
856 | ||
857 | rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B); | |
858 | ||
859 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1); | |
860 | ||
b4572a92 HRK |
861 | priv->slot_time = 0x9; |
862 | priv->aifsn[0] = 2; /* AIFSN[AC_VO] */ | |
863 | priv->aifsn[1] = 2; /* AIFSN[AC_VI] */ | |
864 | priv->aifsn[2] = 7; /* AIFSN[AC_BK] */ | |
865 | priv->aifsn[3] = 3; /* AIFSN[AC_BE] */ | |
866 | rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0); | |
867 | ||
1a9937b7 HRK |
868 | /* ENEDCA flag must always be set, transmit issues? */ |
869 | rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA); | |
870 | ||
f8a08c34 HTL |
871 | return 0; |
872 | } | |
873 | ||
2f47690e LF |
874 | static void rtl8187_work(struct work_struct *work) |
875 | { | |
876 | /* The RTL8187 returns the retry count through register 0xFFFA. In | |
877 | * addition, it appears to be a cumulative retry count, not the | |
878 | * value for the current TX packet. When multiple TX entries are | |
879 | * queued, the retry count will be valid for the last one in the queue. | |
880 | * The "error" should not matter for purposes of rate setting. */ | |
881 | struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv, | |
882 | work.work); | |
883 | struct ieee80211_tx_info *info; | |
884 | struct ieee80211_hw *dev = priv->dev; | |
885 | static u16 retry; | |
886 | u16 tmp; | |
887 | ||
888 | mutex_lock(&priv->conf_mutex); | |
889 | tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA); | |
890 | while (skb_queue_len(&priv->b_tx_status.queue) > 0) { | |
891 | struct sk_buff *old_skb; | |
892 | ||
893 | old_skb = skb_dequeue(&priv->b_tx_status.queue); | |
894 | info = IEEE80211_SKB_CB(old_skb); | |
895 | info->status.rates[0].count = tmp - retry + 1; | |
896 | ieee80211_tx_status_irqsafe(dev, old_skb); | |
897 | } | |
898 | retry = tmp; | |
899 | mutex_unlock(&priv->conf_mutex); | |
900 | } | |
901 | ||
4150c572 | 902 | static int rtl8187_start(struct ieee80211_hw *dev) |
605bebe2 MW |
903 | { |
904 | struct rtl8187_priv *priv = dev->priv; | |
905 | u32 reg; | |
906 | int ret; | |
907 | ||
ca9152e3 HRK |
908 | mutex_lock(&priv->conf_mutex); |
909 | ||
f8a08c34 HTL |
910 | ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) : |
911 | rtl8187b_init_hw(dev); | |
605bebe2 | 912 | if (ret) |
ca9152e3 | 913 | goto rtl8187_start_exit; |
c1db52b9 LF |
914 | |
915 | init_usb_anchor(&priv->anchored); | |
2f47690e | 916 | priv->dev = dev; |
c1db52b9 | 917 | |
f8a08c34 HTL |
918 | if (priv->is_rtl8187b) { |
919 | reg = RTL818X_RX_CONF_MGMT | | |
920 | RTL818X_RX_CONF_DATA | | |
921 | RTL818X_RX_CONF_BROADCAST | | |
922 | RTL818X_RX_CONF_NICMAC | | |
923 | RTL818X_RX_CONF_BSSID | | |
924 | (7 << 13 /* RX FIFO threshold NONE */) | | |
925 | (7 << 10 /* MAX RX DMA */) | | |
926 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
927 | RTL818X_RX_CONF_ONLYERLPKT | | |
928 | RTL818X_RX_CONF_MULTICAST; | |
929 | priv->rx_conf = reg; | |
930 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); | |
931 | ||
932 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
933 | RTL818X_TX_CONF_HW_SEQNUM | | |
934 | RTL818X_TX_CONF_DISREQQSIZE | | |
935 | (7 << 8 /* short retry limit */) | | |
936 | (7 << 0 /* long retry limit */) | | |
937 | (7 << 21 /* MAX TX DMA */)); | |
938 | rtl8187_init_urbs(dev); | |
3517afde | 939 | rtl8187b_init_status_urb(dev); |
ca9152e3 | 940 | goto rtl8187_start_exit; |
f8a08c34 HTL |
941 | } |
942 | ||
605bebe2 MW |
943 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); |
944 | ||
2fe14263 MW |
945 | rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); |
946 | rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); | |
947 | ||
605bebe2 MW |
948 | rtl8187_init_urbs(dev); |
949 | ||
950 | reg = RTL818X_RX_CONF_ONLYERLPKT | | |
951 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
952 | RTL818X_RX_CONF_BSSID | | |
953 | RTL818X_RX_CONF_MGMT | | |
605bebe2 MW |
954 | RTL818X_RX_CONF_DATA | |
955 | (7 << 13 /* RX FIFO threshold NONE */) | | |
956 | (7 << 10 /* MAX RX DMA */) | | |
957 | RTL818X_RX_CONF_BROADCAST | | |
605bebe2 | 958 | RTL818X_RX_CONF_NICMAC; |
605bebe2 | 959 | |
4150c572 | 960 | priv->rx_conf = reg; |
605bebe2 MW |
961 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); |
962 | ||
963 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
964 | reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; | |
965 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
966 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
967 | ||
968 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
969 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; | |
970 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
971 | reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; | |
972 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
973 | ||
974 | reg = RTL818X_TX_CONF_CW_MIN | | |
975 | (7 << 21 /* MAX TX DMA */) | | |
976 | RTL818X_TX_CONF_NO_ICV; | |
977 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
978 | ||
979 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
980 | reg |= RTL818X_CMD_TX_ENABLE; | |
981 | reg |= RTL818X_CMD_RX_ENABLE; | |
982 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
2f47690e | 983 | INIT_DELAYED_WORK(&priv->work, rtl8187_work); |
605bebe2 | 984 | |
ca9152e3 HRK |
985 | rtl8187_start_exit: |
986 | mutex_unlock(&priv->conf_mutex); | |
987 | return ret; | |
605bebe2 MW |
988 | } |
989 | ||
4150c572 | 990 | static void rtl8187_stop(struct ieee80211_hw *dev) |
605bebe2 MW |
991 | { |
992 | struct rtl8187_priv *priv = dev->priv; | |
605bebe2 MW |
993 | struct sk_buff *skb; |
994 | u32 reg; | |
995 | ||
7dcdd073 | 996 | mutex_lock(&priv->conf_mutex); |
605bebe2 MW |
997 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); |
998 | ||
999 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
1000 | reg &= ~RTL818X_CMD_TX_ENABLE; | |
1001 | reg &= ~RTL818X_CMD_RX_ENABLE; | |
1002 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
1003 | ||
f6532111 | 1004 | priv->rf->stop(dev); |
605bebe2 MW |
1005 | |
1006 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
1007 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); | |
1008 | rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); | |
1009 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
1010 | ||
3517afde HRK |
1011 | while ((skb = skb_dequeue(&priv->b_tx_status.queue))) |
1012 | dev_kfree_skb_any(skb); | |
c1db52b9 LF |
1013 | |
1014 | usb_kill_anchored_urbs(&priv->anchored); | |
6a8171f2 HRK |
1015 | mutex_unlock(&priv->conf_mutex); |
1016 | ||
2f47690e LF |
1017 | if (!priv->is_rtl8187b) |
1018 | cancel_delayed_work_sync(&priv->work); | |
605bebe2 MW |
1019 | } |
1020 | ||
1021 | static int rtl8187_add_interface(struct ieee80211_hw *dev, | |
1ed32e4f | 1022 | struct ieee80211_vif *vif) |
605bebe2 MW |
1023 | { |
1024 | struct rtl8187_priv *priv = dev->priv; | |
4150c572 | 1025 | int i; |
66aafd9a | 1026 | int ret = -EOPNOTSUPP; |
605bebe2 | 1027 | |
66aafd9a | 1028 | mutex_lock(&priv->conf_mutex); |
d30506e0 | 1029 | if (priv->vif) |
66aafd9a | 1030 | goto exit; |
605bebe2 | 1031 | |
1ed32e4f | 1032 | switch (vif->type) { |
05c914fe | 1033 | case NL80211_IFTYPE_STATION: |
605bebe2 MW |
1034 | break; |
1035 | default: | |
66aafd9a | 1036 | goto exit; |
605bebe2 MW |
1037 | } |
1038 | ||
66aafd9a | 1039 | ret = 0; |
1ed32e4f | 1040 | priv->vif = vif; |
aa979a6a | 1041 | |
4150c572 JB |
1042 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
1043 | for (i = 0; i < ETH_ALEN; i++) | |
1044 | rtl818x_iowrite8(priv, &priv->map->MAC[i], | |
1ed32e4f | 1045 | ((u8 *)vif->addr)[i]); |
4150c572 | 1046 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
605bebe2 | 1047 | |
66aafd9a | 1048 | exit: |
7dcdd073 | 1049 | mutex_unlock(&priv->conf_mutex); |
66aafd9a | 1050 | return ret; |
605bebe2 MW |
1051 | } |
1052 | ||
1053 | static void rtl8187_remove_interface(struct ieee80211_hw *dev, | |
1ed32e4f | 1054 | struct ieee80211_vif *vif) |
605bebe2 MW |
1055 | { |
1056 | struct rtl8187_priv *priv = dev->priv; | |
7dcdd073 | 1057 | mutex_lock(&priv->conf_mutex); |
aa979a6a | 1058 | priv->vif = NULL; |
7dcdd073 | 1059 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
1060 | } |
1061 | ||
e8975581 | 1062 | static int rtl8187_config(struct ieee80211_hw *dev, u32 changed) |
605bebe2 MW |
1063 | { |
1064 | struct rtl8187_priv *priv = dev->priv; | |
e8975581 | 1065 | struct ieee80211_conf *conf = &dev->conf; |
f6532111 MW |
1066 | u32 reg; |
1067 | ||
7dcdd073 | 1068 | mutex_lock(&priv->conf_mutex); |
f6532111 MW |
1069 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); |
1070 | /* Enable TX loopback on MAC level to avoid TX during channel | |
1071 | * changes, as this has be seen to causes problems and the | |
1072 | * card will stop work until next reset | |
1073 | */ | |
1074 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
1075 | reg | RTL818X_TX_CONF_LOOPBACK_MAC); | |
f6532111 MW |
1076 | priv->rf->set_chan(dev, conf); |
1077 | msleep(10); | |
1078 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
605bebe2 | 1079 | |
605bebe2 MW |
1080 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); |
1081 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); | |
1082 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
1083 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); | |
7dcdd073 | 1084 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
1085 | return 0; |
1086 | } | |
1087 | ||
b4572a92 HRK |
1088 | /* |
1089 | * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for | |
1090 | * example. Thus we have to use raw values for AC_*_PARAM register addresses. | |
1091 | */ | |
1092 | static __le32 *rtl8187b_ac_addr[4] = { | |
1093 | (__le32 *) 0xFFF0, /* AC_VO */ | |
1094 | (__le32 *) 0xFFF4, /* AC_VI */ | |
1095 | (__le32 *) 0xFFFC, /* AC_BK */ | |
1096 | (__le32 *) 0xFFF8, /* AC_BE */ | |
1097 | }; | |
1098 | ||
1099 | #define SIFS_TIME 0xa | |
1100 | ||
f8288317 HRK |
1101 | static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot, |
1102 | bool use_short_preamble) | |
64761077 | 1103 | { |
f8288317 | 1104 | if (priv->is_rtl8187b) { |
b4572a92 | 1105 | u8 difs, eifs; |
f8288317 | 1106 | u16 ack_timeout; |
b4572a92 | 1107 | int queue; |
f8288317 HRK |
1108 | |
1109 | if (use_short_slot) { | |
b4572a92 | 1110 | priv->slot_time = 0x9; |
f8288317 HRK |
1111 | difs = 0x1c; |
1112 | eifs = 0x53; | |
1113 | } else { | |
b4572a92 | 1114 | priv->slot_time = 0x14; |
f8288317 HRK |
1115 | difs = 0x32; |
1116 | eifs = 0x5b; | |
1117 | } | |
54ac218a | 1118 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); |
b4572a92 | 1119 | rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time); |
f8288317 HRK |
1120 | rtl818x_iowrite8(priv, &priv->map->DIFS, difs); |
1121 | ||
1122 | /* | |
1123 | * BRSR+1 on 8187B is in fact EIFS register | |
1124 | * Value in units of 4 us | |
1125 | */ | |
1126 | rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs); | |
1127 | ||
1128 | /* | |
1129 | * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout | |
1130 | * register. In units of 4 us like eifs register | |
1131 | * ack_timeout = ack duration + plcp + difs + preamble | |
1132 | */ | |
1133 | ack_timeout = 112 + 48 + difs; | |
1134 | if (use_short_preamble) | |
1135 | ack_timeout += 72; | |
1136 | else | |
1137 | ack_timeout += 144; | |
1138 | rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, | |
1139 | DIV_ROUND_UP(ack_timeout, 4)); | |
b4572a92 HRK |
1140 | |
1141 | for (queue = 0; queue < 4; queue++) | |
1142 | rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue], | |
1143 | priv->aifsn[queue] * priv->slot_time + | |
1144 | SIFS_TIME); | |
f8288317 | 1145 | } else { |
64761077 HRK |
1146 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); |
1147 | if (use_short_slot) { | |
1148 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); | |
1149 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); | |
1150 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); | |
64761077 HRK |
1151 | } else { |
1152 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); | |
1153 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); | |
1154 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); | |
64761077 HRK |
1155 | } |
1156 | } | |
1157 | } | |
1158 | ||
1159 | static void rtl8187_bss_info_changed(struct ieee80211_hw *dev, | |
1160 | struct ieee80211_vif *vif, | |
1161 | struct ieee80211_bss_conf *info, | |
1162 | u32 changed) | |
1163 | { | |
1164 | struct rtl8187_priv *priv = dev->priv; | |
2d0ddec5 JB |
1165 | int i; |
1166 | u8 reg; | |
1167 | ||
1168 | if (changed & BSS_CHANGED_BSSID) { | |
1169 | mutex_lock(&priv->conf_mutex); | |
1170 | for (i = 0; i < ETH_ALEN; i++) | |
1171 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], | |
1172 | info->bssid[i]); | |
1173 | ||
1a9937b7 HRK |
1174 | if (priv->is_rtl8187b) |
1175 | reg = RTL818X_MSR_ENEDCA; | |
1176 | else | |
1177 | reg = 0; | |
1178 | ||
2d0ddec5 | 1179 | if (is_valid_ether_addr(info->bssid)) { |
1a9937b7 | 1180 | reg |= RTL818X_MSR_INFRA; |
2d0ddec5 JB |
1181 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); |
1182 | } else { | |
1a9937b7 | 1183 | reg |= RTL818X_MSR_NO_LINK; |
2d0ddec5 JB |
1184 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); |
1185 | } | |
1186 | ||
1187 | mutex_unlock(&priv->conf_mutex); | |
1188 | } | |
64761077 | 1189 | |
f8288317 HRK |
1190 | if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) |
1191 | rtl8187_conf_erp(priv, info->use_short_slot, | |
1192 | info->use_short_preamble); | |
64761077 HRK |
1193 | } |
1194 | ||
3ac64bee JB |
1195 | static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev, |
1196 | int mc_count, struct dev_addr_list *mc_list) | |
1197 | { | |
1198 | return mc_count; | |
1199 | } | |
1200 | ||
4150c572 JB |
1201 | static void rtl8187_configure_filter(struct ieee80211_hw *dev, |
1202 | unsigned int changed_flags, | |
1203 | unsigned int *total_flags, | |
3ac64bee | 1204 | u64 multicast) |
4150c572 JB |
1205 | { |
1206 | struct rtl8187_priv *priv = dev->priv; | |
1207 | ||
4150c572 JB |
1208 | if (changed_flags & FIF_FCSFAIL) |
1209 | priv->rx_conf ^= RTL818X_RX_CONF_FCS; | |
1210 | if (changed_flags & FIF_CONTROL) | |
1211 | priv->rx_conf ^= RTL818X_RX_CONF_CTRL; | |
1212 | if (changed_flags & FIF_OTHER_BSS) | |
1213 | priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; | |
3ac64bee | 1214 | if (*total_flags & FIF_ALLMULTI || multicast > 0) |
4150c572 | 1215 | priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; |
2fe14263 MW |
1216 | else |
1217 | priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST; | |
1218 | ||
1219 | *total_flags = 0; | |
4150c572 | 1220 | |
4150c572 JB |
1221 | if (priv->rx_conf & RTL818X_RX_CONF_FCS) |
1222 | *total_flags |= FIF_FCSFAIL; | |
1223 | if (priv->rx_conf & RTL818X_RX_CONF_CTRL) | |
1224 | *total_flags |= FIF_CONTROL; | |
1225 | if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) | |
1226 | *total_flags |= FIF_OTHER_BSS; | |
2fe14263 MW |
1227 | if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) |
1228 | *total_flags |= FIF_ALLMULTI; | |
4150c572 JB |
1229 | |
1230 | rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); | |
1231 | } | |
1232 | ||
b4572a92 HRK |
1233 | static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue, |
1234 | const struct ieee80211_tx_queue_params *params) | |
1235 | { | |
1236 | struct rtl8187_priv *priv = dev->priv; | |
1237 | u8 cw_min, cw_max; | |
1238 | ||
1239 | if (queue > 3) | |
1240 | return -EINVAL; | |
1241 | ||
1242 | cw_min = fls(params->cw_min); | |
1243 | cw_max = fls(params->cw_max); | |
1244 | ||
1245 | if (priv->is_rtl8187b) { | |
1246 | priv->aifsn[queue] = params->aifs; | |
1247 | ||
1248 | /* | |
1249 | * This is the structure of AC_*_PARAM registers in 8187B: | |
1250 | * - TXOP limit field, bit offset = 16 | |
1251 | * - ECWmax, bit offset = 12 | |
1252 | * - ECWmin, bit offset = 8 | |
1253 | * - AIFS, bit offset = 0 | |
1254 | */ | |
1255 | rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue], | |
1256 | (params->txop << 16) | (cw_max << 12) | | |
1257 | (cw_min << 8) | (params->aifs * | |
1258 | priv->slot_time + SIFS_TIME)); | |
1259 | } else { | |
1260 | if (queue != 0) | |
1261 | return -EINVAL; | |
1262 | ||
1263 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, | |
1264 | cw_min | (cw_max << 4)); | |
1265 | } | |
1266 | return 0; | |
1267 | } | |
1268 | ||
22e16e55 LF |
1269 | static u64 rtl8187_get_tsf(struct ieee80211_hw *dev) |
1270 | { | |
1271 | struct rtl8187_priv *priv = dev->priv; | |
1272 | ||
1273 | return rtl818x_ioread32(priv, &priv->map->TSFT[0]) | | |
1274 | (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32; | |
1275 | } | |
1276 | ||
605bebe2 MW |
1277 | static const struct ieee80211_ops rtl8187_ops = { |
1278 | .tx = rtl8187_tx, | |
4150c572 | 1279 | .start = rtl8187_start, |
605bebe2 MW |
1280 | .stop = rtl8187_stop, |
1281 | .add_interface = rtl8187_add_interface, | |
1282 | .remove_interface = rtl8187_remove_interface, | |
1283 | .config = rtl8187_config, | |
64761077 | 1284 | .bss_info_changed = rtl8187_bss_info_changed, |
3ac64bee | 1285 | .prepare_multicast = rtl8187_prepare_multicast, |
4150c572 | 1286 | .configure_filter = rtl8187_configure_filter, |
ca9152e3 | 1287 | .conf_tx = rtl8187_conf_tx, |
22e16e55 LF |
1288 | .rfkill_poll = rtl8187_rfkill_poll, |
1289 | .get_tsf = rtl8187_get_tsf, | |
605bebe2 MW |
1290 | }; |
1291 | ||
1292 | static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) | |
1293 | { | |
1294 | struct ieee80211_hw *dev = eeprom->data; | |
1295 | struct rtl8187_priv *priv = dev->priv; | |
1296 | u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); | |
1297 | ||
1298 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; | |
1299 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; | |
1300 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; | |
1301 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; | |
1302 | } | |
1303 | ||
1304 | static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) | |
1305 | { | |
1306 | struct ieee80211_hw *dev = eeprom->data; | |
1307 | struct rtl8187_priv *priv = dev->priv; | |
1308 | u8 reg = RTL818X_EEPROM_CMD_PROGRAM; | |
1309 | ||
1310 | if (eeprom->reg_data_in) | |
1311 | reg |= RTL818X_EEPROM_CMD_WRITE; | |
1312 | if (eeprom->reg_data_out) | |
1313 | reg |= RTL818X_EEPROM_CMD_READ; | |
1314 | if (eeprom->reg_data_clock) | |
1315 | reg |= RTL818X_EEPROM_CMD_CK; | |
1316 | if (eeprom->reg_chip_select) | |
1317 | reg |= RTL818X_EEPROM_CMD_CS; | |
1318 | ||
1319 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); | |
1320 | udelay(10); | |
1321 | } | |
1322 | ||
1323 | static int __devinit rtl8187_probe(struct usb_interface *intf, | |
1324 | const struct usb_device_id *id) | |
1325 | { | |
1326 | struct usb_device *udev = interface_to_usbdev(intf); | |
1327 | struct ieee80211_hw *dev; | |
1328 | struct rtl8187_priv *priv; | |
1329 | struct eeprom_93cx6 eeprom; | |
1330 | struct ieee80211_channel *channel; | |
6f7853f3 | 1331 | const char *chip_name; |
605bebe2 | 1332 | u16 txpwr, reg; |
70d57139 | 1333 | u16 product_id = le16_to_cpu(udev->descriptor.idProduct); |
605bebe2 MW |
1334 | int err, i; |
1335 | ||
1336 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); | |
1337 | if (!dev) { | |
1338 | printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); | |
1339 | return -ENOMEM; | |
1340 | } | |
1341 | ||
1342 | priv = dev->priv; | |
0e25b4ef | 1343 | priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B); |
605bebe2 | 1344 | |
9be6f0d4 JL |
1345 | /* allocate "DMA aware" buffer for register accesses */ |
1346 | priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL); | |
1347 | if (!priv->io_dmabuf) { | |
1348 | err = -ENOMEM; | |
1349 | goto err_free_dev; | |
1350 | } | |
1351 | mutex_init(&priv->io_mutex); | |
1352 | ||
605bebe2 MW |
1353 | SET_IEEE80211_DEV(dev, &intf->dev); |
1354 | usb_set_intfdata(intf, dev); | |
1355 | priv->udev = udev; | |
1356 | ||
1357 | usb_get_dev(udev); | |
1358 | ||
1359 | skb_queue_head_init(&priv->rx_queue); | |
8318d78a JB |
1360 | |
1361 | BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); | |
1362 | BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); | |
1363 | ||
605bebe2 MW |
1364 | memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); |
1365 | memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); | |
1366 | priv->map = (struct rtl818x_csr *)0xFF00; | |
8318d78a JB |
1367 | |
1368 | priv->band.band = IEEE80211_BAND_2GHZ; | |
1369 | priv->band.channels = priv->channels; | |
1370 | priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); | |
1371 | priv->band.bitrates = priv->rates; | |
1372 | priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); | |
1373 | dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; | |
1374 | ||
1375 | ||
605bebe2 | 1376 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
a7db74f4 | 1377 | IEEE80211_HW_SIGNAL_DBM | |
0ccd58fc | 1378 | IEEE80211_HW_RX_INCLUDES_FCS; |
605bebe2 | 1379 | |
605bebe2 MW |
1380 | eeprom.data = dev; |
1381 | eeprom.register_read = rtl8187_eeprom_register_read; | |
1382 | eeprom.register_write = rtl8187_eeprom_register_write; | |
1383 | if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) | |
1384 | eeprom.width = PCI_EEPROM_WIDTH_93C66; | |
1385 | else | |
1386 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
1387 | ||
1388 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
1389 | udelay(10); | |
1390 | ||
1391 | eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, | |
1392 | (__le16 __force *)dev->wiphy->perm_addr, 3); | |
1393 | if (!is_valid_ether_addr(dev->wiphy->perm_addr)) { | |
1394 | printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " | |
1395 | "generated MAC address\n"); | |
1396 | random_ether_addr(dev->wiphy->perm_addr); | |
1397 | } | |
1398 | ||
1399 | channel = priv->channels; | |
1400 | for (i = 0; i < 3; i++) { | |
1401 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, | |
1402 | &txpwr); | |
8318d78a JB |
1403 | (*channel++).hw_value = txpwr & 0xFF; |
1404 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 MW |
1405 | } |
1406 | for (i = 0; i < 2; i++) { | |
1407 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, | |
1408 | &txpwr); | |
8318d78a JB |
1409 | (*channel++).hw_value = txpwr & 0xFF; |
1410 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 | 1411 | } |
605bebe2 MW |
1412 | |
1413 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, | |
1414 | &priv->txpwr_base); | |
1415 | ||
f6532111 MW |
1416 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
1417 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
1418 | /* 0 means asic B-cut, we should use SW 3 wire |
1419 | * bit-by-bit banging for radio. 1 means we can use | |
1420 | * USB specific request to write radio registers */ | |
1421 | priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; | |
f6532111 | 1422 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
1423 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
1424 | ||
6f7853f3 HTL |
1425 | if (!priv->is_rtl8187b) { |
1426 | u32 reg32; | |
1427 | reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); | |
1428 | reg32 &= RTL818X_TX_CONF_HWVER_MASK; | |
1429 | switch (reg32) { | |
0e25b4ef LF |
1430 | case RTL818X_TX_CONF_R8187vD_B: |
1431 | /* Some RTL8187B devices have a USB ID of 0x8187 | |
1432 | * detect them here */ | |
1433 | chip_name = "RTL8187BvB(early)"; | |
1434 | priv->is_rtl8187b = 1; | |
1435 | priv->hw_rev = RTL8187BvB; | |
1436 | break; | |
1437 | case RTL818X_TX_CONF_R8187vD: | |
6f7853f3 HTL |
1438 | chip_name = "RTL8187vD"; |
1439 | break; | |
1440 | default: | |
1441 | chip_name = "RTL8187vB (default)"; | |
1442 | } | |
1443 | } else { | |
6f7853f3 HTL |
1444 | /* |
1445 | * Force USB request to write radio registers for 8187B, Realtek | |
1446 | * only uses it in their sources | |
1447 | */ | |
1448 | /*if (priv->asic_rev == 0) { | |
1449 | printk(KERN_WARNING "rtl8187: Forcing use of USB " | |
1450 | "requests to write to radio registers\n"); | |
1451 | priv->asic_rev = 1; | |
1452 | }*/ | |
1453 | switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) { | |
1454 | case RTL818X_R8187B_B: | |
1455 | chip_name = "RTL8187BvB"; | |
1456 | priv->hw_rev = RTL8187BvB; | |
1457 | break; | |
1458 | case RTL818X_R8187B_D: | |
1459 | chip_name = "RTL8187BvD"; | |
1460 | priv->hw_rev = RTL8187BvD; | |
1461 | break; | |
1462 | case RTL818X_R8187B_E: | |
1463 | chip_name = "RTL8187BvE"; | |
1464 | priv->hw_rev = RTL8187BvE; | |
1465 | break; | |
1466 | default: | |
1467 | chip_name = "RTL8187BvB (default)"; | |
1468 | priv->hw_rev = RTL8187BvB; | |
1469 | } | |
1470 | } | |
1471 | ||
0e25b4ef LF |
1472 | if (!priv->is_rtl8187b) { |
1473 | for (i = 0; i < 2; i++) { | |
1474 | eeprom_93cx6_read(&eeprom, | |
1475 | RTL8187_EEPROM_TXPWR_CHAN_6 + i, | |
1476 | &txpwr); | |
1477 | (*channel++).hw_value = txpwr & 0xFF; | |
1478 | (*channel++).hw_value = txpwr >> 8; | |
1479 | } | |
1480 | } else { | |
1481 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6, | |
1482 | &txpwr); | |
1483 | (*channel++).hw_value = txpwr & 0xFF; | |
1484 | ||
1485 | eeprom_93cx6_read(&eeprom, 0x0A, &txpwr); | |
1486 | (*channel++).hw_value = txpwr & 0xFF; | |
1487 | ||
1488 | eeprom_93cx6_read(&eeprom, 0x1C, &txpwr); | |
1489 | (*channel++).hw_value = txpwr & 0xFF; | |
1490 | (*channel++).hw_value = txpwr >> 8; | |
1491 | } | |
70d57139 LF |
1492 | /* Handle the differing rfkill GPIO bit in different models */ |
1493 | priv->rfkill_mask = RFKILL_MASK_8187_89_97; | |
1494 | if (product_id == 0x8197 || product_id == 0x8198) { | |
1495 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®); | |
1496 | if (reg & 0xFF00) | |
1497 | priv->rfkill_mask = RFKILL_MASK_8198; | |
1498 | } | |
0e25b4ef | 1499 | |
94778280 JB |
1500 | /* |
1501 | * XXX: Once this driver supports anything that requires | |
1502 | * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ. | |
1503 | */ | |
f59ac048 LR |
1504 | dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); |
1505 | ||
0e25b4ef LF |
1506 | if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) |
1507 | printk(KERN_INFO "rtl8187: inconsistency between id with OEM" | |
1508 | " info!\n"); | |
1509 | ||
f6532111 | 1510 | priv->rf = rtl8187_detect_rf(dev); |
0e25b4ef LF |
1511 | dev->extra_tx_headroom = (!priv->is_rtl8187b) ? |
1512 | sizeof(struct rtl8187_tx_hdr) : | |
1513 | sizeof(struct rtl8187b_tx_hdr); | |
1514 | if (!priv->is_rtl8187b) | |
1515 | dev->queues = 1; | |
1516 | else | |
1517 | dev->queues = 4; | |
605bebe2 MW |
1518 | |
1519 | err = ieee80211_register_hw(dev); | |
1520 | if (err) { | |
1521 | printk(KERN_ERR "rtl8187: Cannot register device\n"); | |
9be6f0d4 | 1522 | goto err_free_dmabuf; |
605bebe2 | 1523 | } |
7dcdd073 | 1524 | mutex_init(&priv->conf_mutex); |
3517afde | 1525 | skb_queue_head_init(&priv->b_tx_status.queue); |
605bebe2 | 1526 | |
70d57139 | 1527 | printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s, rfkill mask %d\n", |
e174961c | 1528 | wiphy_name(dev->wiphy), dev->wiphy->perm_addr, |
70d57139 | 1529 | chip_name, priv->asic_rev, priv->rf->name, priv->rfkill_mask); |
605bebe2 | 1530 | |
a027087a LF |
1531 | #ifdef CONFIG_RTL8187_LEDS |
1532 | eeprom_93cx6_read(&eeprom, 0x3F, ®); | |
1533 | reg &= 0xFF; | |
1534 | rtl8187_leds_init(dev, reg); | |
1535 | #endif | |
ca9152e3 | 1536 | rtl8187_rfkill_init(dev); |
a027087a | 1537 | |
605bebe2 MW |
1538 | return 0; |
1539 | ||
9be6f0d4 JL |
1540 | err_free_dmabuf: |
1541 | kfree(priv->io_dmabuf); | |
605bebe2 MW |
1542 | err_free_dev: |
1543 | ieee80211_free_hw(dev); | |
1544 | usb_set_intfdata(intf, NULL); | |
1545 | usb_put_dev(udev); | |
1546 | return err; | |
1547 | } | |
1548 | ||
1549 | static void __devexit rtl8187_disconnect(struct usb_interface *intf) | |
1550 | { | |
1551 | struct ieee80211_hw *dev = usb_get_intfdata(intf); | |
1552 | struct rtl8187_priv *priv; | |
1553 | ||
1554 | if (!dev) | |
1555 | return; | |
1556 | ||
a027087a LF |
1557 | #ifdef CONFIG_RTL8187_LEDS |
1558 | rtl8187_leds_exit(dev); | |
1559 | #endif | |
ca9152e3 | 1560 | rtl8187_rfkill_exit(dev); |
605bebe2 MW |
1561 | ieee80211_unregister_hw(dev); |
1562 | ||
1563 | priv = dev->priv; | |
d6e2be98 | 1564 | usb_reset_device(priv->udev); |
605bebe2 | 1565 | usb_put_dev(interface_to_usbdev(intf)); |
9be6f0d4 | 1566 | kfree(priv->io_dmabuf); |
605bebe2 MW |
1567 | ieee80211_free_hw(dev); |
1568 | } | |
1569 | ||
1570 | static struct usb_driver rtl8187_driver = { | |
1571 | .name = KBUILD_MODNAME, | |
1572 | .id_table = rtl8187_table, | |
1573 | .probe = rtl8187_probe, | |
500c1197 | 1574 | .disconnect = __devexit_p(rtl8187_disconnect), |
605bebe2 MW |
1575 | }; |
1576 | ||
1577 | static int __init rtl8187_init(void) | |
1578 | { | |
1579 | return usb_register(&rtl8187_driver); | |
1580 | } | |
1581 | ||
1582 | static void __exit rtl8187_exit(void) | |
1583 | { | |
1584 | usb_deregister(&rtl8187_driver); | |
1585 | } | |
1586 | ||
1587 | module_init(rtl8187_init); | |
1588 | module_exit(rtl8187_exit); |