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4f01358e CL |
1 | /****************************************************************************** |
2 | * | |
6a57b08e | 3 | * Copyright(c) 2009-2012 Realtek Corporation. |
4f01358e CL |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of version 2 of the GNU General Public License as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., | |
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called LICENSE. | |
20 | * | |
21 | * Contact Information: | |
22 | * wlanfae <wlanfae@realtek.com> | |
23 | * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, | |
24 | * Hsinchu 300, Taiwan. | |
25 | * | |
26 | * Larry Finger <Larry.Finger@lwfinger.net> | |
27 | * | |
28 | *****************************************************************************/ | |
29 | ||
30 | #include "../wifi.h" | |
31 | #include "../base.h" | |
32 | #include "reg.h" | |
33 | #include "def.h" | |
34 | #include "phy.h" | |
35 | #include "dm.h" | |
36 | #include "fw.h" | |
37 | ||
38 | #define UNDEC_SM_PWDB entry_min_undecoratedsmoothed_pwdb | |
39 | ||
4f01358e CL |
40 | static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = { |
41 | 0x7f8001fe, /* 0, +6.0dB */ | |
42 | 0x788001e2, /* 1, +5.5dB */ | |
43 | 0x71c001c7, /* 2, +5.0dB */ | |
44 | 0x6b8001ae, /* 3, +4.5dB */ | |
45 | 0x65400195, /* 4, +4.0dB */ | |
46 | 0x5fc0017f, /* 5, +3.5dB */ | |
47 | 0x5a400169, /* 6, +3.0dB */ | |
48 | 0x55400155, /* 7, +2.5dB */ | |
49 | 0x50800142, /* 8, +2.0dB */ | |
50 | 0x4c000130, /* 9, +1.5dB */ | |
51 | 0x47c0011f, /* 10, +1.0dB */ | |
52 | 0x43c0010f, /* 11, +0.5dB */ | |
53 | 0x40000100, /* 12, +0dB */ | |
54 | 0x3c8000f2, /* 13, -0.5dB */ | |
55 | 0x390000e4, /* 14, -1.0dB */ | |
56 | 0x35c000d7, /* 15, -1.5dB */ | |
57 | 0x32c000cb, /* 16, -2.0dB */ | |
58 | 0x300000c0, /* 17, -2.5dB */ | |
59 | 0x2d4000b5, /* 18, -3.0dB */ | |
60 | 0x2ac000ab, /* 19, -3.5dB */ | |
61 | 0x288000a2, /* 20, -4.0dB */ | |
62 | 0x26000098, /* 21, -4.5dB */ | |
63 | 0x24000090, /* 22, -5.0dB */ | |
64 | 0x22000088, /* 23, -5.5dB */ | |
65 | 0x20000080, /* 24, -6.0dB */ | |
66 | 0x1e400079, /* 25, -6.5dB */ | |
67 | 0x1c800072, /* 26, -7.0dB */ | |
68 | 0x1b00006c, /* 27. -7.5dB */ | |
69 | 0x19800066, /* 28, -8.0dB */ | |
70 | 0x18000060, /* 29, -8.5dB */ | |
71 | 0x16c0005b, /* 30, -9.0dB */ | |
72 | 0x15800056, /* 31, -9.5dB */ | |
73 | 0x14400051, /* 32, -10.0dB */ | |
74 | 0x1300004c, /* 33, -10.5dB */ | |
75 | 0x12000048, /* 34, -11.0dB */ | |
76 | 0x11000044, /* 35, -11.5dB */ | |
77 | 0x10000040, /* 36, -12.0dB */ | |
78 | 0x0f00003c, /* 37, -12.5dB */ | |
79 | 0x0e400039, /* 38, -13.0dB */ | |
80 | 0x0d800036, /* 39, -13.5dB */ | |
81 | 0x0cc00033, /* 40, -14.0dB */ | |
82 | 0x0c000030, /* 41, -14.5dB */ | |
83 | 0x0b40002d, /* 42, -15.0dB */ | |
84 | }; | |
85 | ||
86 | static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = { | |
87 | {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ | |
88 | {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ | |
89 | {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ | |
90 | {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ | |
91 | {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ | |
92 | {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ | |
93 | {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ | |
94 | {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ | |
95 | {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ | |
96 | {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ | |
97 | {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ | |
98 | {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ | |
99 | {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */ | |
100 | {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ | |
101 | {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ | |
102 | {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ | |
103 | {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ | |
104 | {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ | |
105 | {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ | |
106 | {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ | |
107 | {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ | |
108 | {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ | |
109 | {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ | |
110 | {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ | |
111 | {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ | |
112 | {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ | |
113 | {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ | |
114 | {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ | |
115 | {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ | |
116 | {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ | |
117 | {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ | |
118 | {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ | |
119 | {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ | |
120 | }; | |
121 | ||
122 | static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = { | |
123 | {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ | |
124 | {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ | |
125 | {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ | |
126 | {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ | |
127 | {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ | |
128 | {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ | |
129 | {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ | |
130 | {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ | |
131 | {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ | |
132 | {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ | |
133 | {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ | |
134 | {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ | |
135 | {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */ | |
136 | {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ | |
137 | {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ | |
138 | {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ | |
139 | {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ | |
140 | {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ | |
141 | {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ | |
142 | {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ | |
143 | {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ | |
144 | {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ | |
145 | {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ | |
146 | {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ | |
147 | {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ | |
148 | {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ | |
149 | {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ | |
150 | {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ | |
151 | {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ | |
152 | {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ | |
153 | {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ | |
154 | {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ | |
155 | {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ | |
156 | }; | |
157 | ||
158 | static void rtl92d_dm_diginit(struct ieee80211_hw *hw) | |
159 | { | |
c21916ec LF |
160 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
161 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; | |
162 | ||
163 | de_digtable->dig_enable_flag = true; | |
164 | de_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX; | |
165 | de_digtable->cur_igvalue = 0x20; | |
166 | de_digtable->pre_igvalue = 0x0; | |
167 | de_digtable->cursta_connectctate = DIG_STA_DISCONNECT; | |
168 | de_digtable->presta_connectstate = DIG_STA_DISCONNECT; | |
169 | de_digtable->curmultista_connectstate = DIG_MULTISTA_DISCONNECT; | |
170 | de_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW; | |
171 | de_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH; | |
172 | de_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW; | |
173 | de_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH; | |
174 | de_digtable->rx_gain_range_max = DM_DIG_FA_UPPER; | |
175 | de_digtable->rx_gain_range_min = DM_DIG_FA_LOWER; | |
176 | de_digtable->backoff_val = DM_DIG_BACKOFF_DEFAULT; | |
177 | de_digtable->backoff_val_range_max = DM_DIG_BACKOFF_MAX; | |
178 | de_digtable->backoff_val_range_min = DM_DIG_BACKOFF_MIN; | |
179 | de_digtable->pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI; | |
180 | de_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX; | |
181 | de_digtable->large_fa_hit = 0; | |
182 | de_digtable->recover_cnt = 0; | |
183 | de_digtable->forbidden_igi = DM_DIG_FA_LOWER; | |
4f01358e CL |
184 | } |
185 | ||
186 | static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw) | |
187 | { | |
188 | u32 ret_value; | |
189 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
190 | struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt); | |
191 | unsigned long flag = 0; | |
192 | ||
193 | /* hold ofdm counter */ | |
194 | rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */ | |
195 | rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */ | |
196 | ||
197 | ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD); | |
198 | falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff); | |
199 | falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16); | |
200 | ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD); | |
201 | falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16); | |
202 | ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD); | |
203 | falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff); | |
204 | falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16); | |
205 | ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD); | |
206 | falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff); | |
207 | falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail + | |
208 | falsealm_cnt->cnt_rate_illegal + | |
209 | falsealm_cnt->cnt_crc8_fail + | |
210 | falsealm_cnt->cnt_mcs_fail + | |
211 | falsealm_cnt->cnt_fast_fsync_fail + | |
212 | falsealm_cnt->cnt_sb_search_fail; | |
213 | ||
214 | if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) { | |
215 | /* hold cck counter */ | |
216 | rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); | |
217 | ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0); | |
218 | falsealm_cnt->cnt_cck_fail = ret_value; | |
219 | ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3); | |
220 | falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8; | |
221 | rtl92d_release_cckandrw_pagea_ctl(hw, &flag); | |
222 | } else { | |
223 | falsealm_cnt->cnt_cck_fail = 0; | |
224 | } | |
225 | ||
226 | /* reset false alarm counter registers */ | |
227 | falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail + | |
228 | falsealm_cnt->cnt_sb_search_fail + | |
229 | falsealm_cnt->cnt_parity_fail + | |
230 | falsealm_cnt->cnt_rate_illegal + | |
231 | falsealm_cnt->cnt_crc8_fail + | |
232 | falsealm_cnt->cnt_mcs_fail + | |
233 | falsealm_cnt->cnt_cck_fail; | |
234 | ||
235 | rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1); | |
236 | /* update ofdm counter */ | |
237 | rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0); | |
238 | /* update page C counter */ | |
239 | rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0); | |
240 | /* update page D counter */ | |
241 | rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0); | |
242 | if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) { | |
243 | /* reset cck counter */ | |
244 | rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); | |
245 | rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0); | |
246 | /* enable cck counter */ | |
247 | rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2); | |
248 | rtl92d_release_cckandrw_pagea_ctl(hw, &flag); | |
249 | } | |
f30d7507 JP |
250 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
251 | "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n", | |
4f01358e | 252 | falsealm_cnt->cnt_fast_fsync_fail, |
f30d7507 JP |
253 | falsealm_cnt->cnt_sb_search_fail); |
254 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | |
255 | "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n", | |
4f01358e CL |
256 | falsealm_cnt->cnt_parity_fail, |
257 | falsealm_cnt->cnt_rate_illegal, | |
258 | falsealm_cnt->cnt_crc8_fail, | |
f30d7507 | 259 | falsealm_cnt->cnt_mcs_fail); |
4f01358e | 260 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
f30d7507 | 261 | "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n", |
4f01358e CL |
262 | falsealm_cnt->cnt_ofdm_fail, |
263 | falsealm_cnt->cnt_cck_fail, | |
f30d7507 | 264 | falsealm_cnt->cnt_all); |
4f01358e CL |
265 | } |
266 | ||
267 | static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw) | |
268 | { | |
269 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
c21916ec | 270 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; |
4f01358e CL |
271 | struct rtl_mac *mac = rtl_mac(rtlpriv); |
272 | ||
273 | /* Determine the minimum RSSI */ | |
274 | if ((mac->link_state < MAC80211_LINKED) && | |
275 | (rtlpriv->dm.UNDEC_SM_PWDB == 0)) { | |
c21916ec | 276 | de_digtable->min_undecorated_pwdb_for_dm = 0; |
4f01358e | 277 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, |
f30d7507 | 278 | "Not connected to any\n"); |
4f01358e CL |
279 | } |
280 | if (mac->link_state >= MAC80211_LINKED) { | |
281 | if (mac->opmode == NL80211_IFTYPE_AP || | |
282 | mac->opmode == NL80211_IFTYPE_ADHOC) { | |
c21916ec | 283 | de_digtable->min_undecorated_pwdb_for_dm = |
4f01358e CL |
284 | rtlpriv->dm.UNDEC_SM_PWDB; |
285 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, | |
f30d7507 JP |
286 | "AP Client PWDB = 0x%lx\n", |
287 | rtlpriv->dm.UNDEC_SM_PWDB); | |
4f01358e | 288 | } else { |
c21916ec | 289 | de_digtable->min_undecorated_pwdb_for_dm = |
4f01358e CL |
290 | rtlpriv->dm.undecorated_smoothed_pwdb; |
291 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, | |
f30d7507 | 292 | "STA Default Port PWDB = 0x%x\n", |
c21916ec | 293 | de_digtable->min_undecorated_pwdb_for_dm); |
4f01358e CL |
294 | } |
295 | } else { | |
c21916ec | 296 | de_digtable->min_undecorated_pwdb_for_dm = |
4f01358e CL |
297 | rtlpriv->dm.UNDEC_SM_PWDB; |
298 | RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD, | |
5aff4e74 | 299 | "AP Ext Port or disconnect PWDB = 0x%x\n", |
c21916ec | 300 | de_digtable->min_undecorated_pwdb_for_dm); |
4f01358e CL |
301 | } |
302 | ||
f30d7507 | 303 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n", |
c21916ec | 304 | de_digtable->min_undecorated_pwdb_for_dm); |
4f01358e CL |
305 | } |
306 | ||
307 | static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw) | |
308 | { | |
309 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
c21916ec | 310 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; |
4f01358e CL |
311 | unsigned long flag = 0; |
312 | ||
c21916ec LF |
313 | if (de_digtable->cursta_connectctate == DIG_STA_CONNECT) { |
314 | if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) { | |
315 | if (de_digtable->min_undecorated_pwdb_for_dm <= 25) | |
316 | de_digtable->cur_cck_pd_state = | |
4f01358e CL |
317 | CCK_PD_STAGE_LOWRSSI; |
318 | else | |
c21916ec | 319 | de_digtable->cur_cck_pd_state = |
4f01358e CL |
320 | CCK_PD_STAGE_HIGHRSSI; |
321 | } else { | |
c21916ec LF |
322 | if (de_digtable->min_undecorated_pwdb_for_dm <= 20) |
323 | de_digtable->cur_cck_pd_state = | |
4f01358e CL |
324 | CCK_PD_STAGE_LOWRSSI; |
325 | else | |
c21916ec | 326 | de_digtable->cur_cck_pd_state = |
4f01358e CL |
327 | CCK_PD_STAGE_HIGHRSSI; |
328 | } | |
329 | } else { | |
c21916ec | 330 | de_digtable->cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI; |
4f01358e | 331 | } |
c21916ec LF |
332 | if (de_digtable->pre_cck_pd_state != de_digtable->cur_cck_pd_state) { |
333 | if (de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) { | |
4f01358e CL |
334 | rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); |
335 | rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83); | |
336 | rtl92d_release_cckandrw_pagea_ctl(hw, &flag); | |
337 | } else { | |
338 | rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); | |
339 | rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd); | |
340 | rtl92d_release_cckandrw_pagea_ctl(hw, &flag); | |
341 | } | |
c21916ec | 342 | de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state; |
4f01358e | 343 | } |
f30d7507 | 344 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n", |
c21916ec | 345 | de_digtable->cursta_connectctate == DIG_STA_CONNECT ? |
f30d7507 JP |
346 | "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT"); |
347 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n", | |
c21916ec | 348 | de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ? |
f30d7507 JP |
349 | "Low RSSI " : "High RSSI "); |
350 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n", | |
351 | IS_92D_SINGLEPHY(rtlpriv->rtlhal.version)); | |
4f01358e CL |
352 | |
353 | } | |
354 | ||
355 | void rtl92d_dm_write_dig(struct ieee80211_hw *hw) | |
356 | { | |
357 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
c21916ec | 358 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; |
4f01358e | 359 | |
f30d7507 JP |
360 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
361 | "cur_igvalue = 0x%x, pre_igvalue = 0x%x, backoff_val = %d\n", | |
c21916ec LF |
362 | de_digtable->cur_igvalue, de_digtable->pre_igvalue, |
363 | de_digtable->backoff_val); | |
364 | if (de_digtable->dig_enable_flag == false) { | |
f30d7507 | 365 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n"); |
c21916ec | 366 | de_digtable->pre_igvalue = 0x17; |
4f01358e CL |
367 | return; |
368 | } | |
c21916ec | 369 | if (de_digtable->pre_igvalue != de_digtable->cur_igvalue) { |
4f01358e | 370 | rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f, |
c21916ec | 371 | de_digtable->cur_igvalue); |
4f01358e | 372 | rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f, |
c21916ec LF |
373 | de_digtable->cur_igvalue); |
374 | de_digtable->pre_igvalue = de_digtable->cur_igvalue; | |
4f01358e CL |
375 | } |
376 | } | |
377 | ||
378 | static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv) | |
379 | { | |
c21916ec LF |
380 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; |
381 | ||
4f01358e CL |
382 | if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) && |
383 | (rtlpriv->mac80211.vendor == PEER_CISCO)) { | |
f30d7507 | 384 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n"); |
c21916ec LF |
385 | if (de_digtable->last_min_undecorated_pwdb_for_dm >= 50 |
386 | && de_digtable->min_undecorated_pwdb_for_dm < 50) { | |
4f01358e CL |
387 | rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00); |
388 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | |
f30d7507 | 389 | "Early Mode Off\n"); |
c21916ec LF |
390 | } else if (de_digtable->last_min_undecorated_pwdb_for_dm <= 55 && |
391 | de_digtable->min_undecorated_pwdb_for_dm > 55) { | |
4f01358e CL |
392 | rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f); |
393 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | |
f30d7507 | 394 | "Early Mode On\n"); |
4f01358e CL |
395 | } |
396 | } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) { | |
397 | rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f); | |
f30d7507 | 398 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n"); |
4f01358e CL |
399 | } |
400 | } | |
401 | ||
402 | static void rtl92d_dm_dig(struct ieee80211_hw *hw) | |
403 | { | |
404 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
c21916ec LF |
405 | struct dig_t *de_digtable = &rtlpriv->dm_digtable; |
406 | u8 value_igi = de_digtable->cur_igvalue; | |
4f01358e CL |
407 | struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt); |
408 | ||
f30d7507 | 409 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n"); |
4f01358e CL |
410 | if (rtlpriv->rtlhal.earlymode_enable) { |
411 | rtl92d_early_mode_enabled(rtlpriv); | |
c21916ec LF |
412 | de_digtable->last_min_undecorated_pwdb_for_dm = |
413 | de_digtable->min_undecorated_pwdb_for_dm; | |
4f01358e | 414 | } |
23677ce3 | 415 | if (!rtlpriv->dm.dm_initialgain_enable) |
4f01358e CL |
416 | return; |
417 | ||
418 | /* because we will send data pkt when scanning | |
419 | * this will cause some ap like gear-3700 wep TP | |
420 | * lower if we retrun here, this is the diff of | |
421 | * mac80211 driver vs ieee80211 driver */ | |
422 | /* if (rtlpriv->mac80211.act_scanning) | |
423 | * return; */ | |
424 | ||
425 | /* Not STA mode return tmp */ | |
426 | if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION) | |
427 | return; | |
f30d7507 | 428 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n"); |
4f01358e CL |
429 | /* Decide the current status and if modify initial gain or not */ |
430 | if (rtlpriv->mac80211.link_state >= MAC80211_LINKED) | |
c21916ec | 431 | de_digtable->cursta_connectctate = DIG_STA_CONNECT; |
4f01358e | 432 | else |
c21916ec | 433 | de_digtable->cursta_connectctate = DIG_STA_DISCONNECT; |
4f01358e CL |
434 | |
435 | /* adjust initial gain according to false alarm counter */ | |
436 | if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0) | |
437 | value_igi--; | |
438 | else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1) | |
439 | value_igi += 0; | |
440 | else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2) | |
441 | value_igi++; | |
442 | else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2) | |
443 | value_igi += 2; | |
444 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | |
f30d7507 | 445 | "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n", |
c21916ec | 446 | de_digtable->large_fa_hit, de_digtable->forbidden_igi); |
4f01358e | 447 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
f30d7507 | 448 | "dm_DIG() Before: Recover_cnt=%d, rx_gain_range_min=%x\n", |
c21916ec | 449 | de_digtable->recover_cnt, de_digtable->rx_gain_range_min); |
4f01358e CL |
450 | |
451 | /* deal with abnorally large false alarm */ | |
452 | if (falsealm_cnt->cnt_all > 10000) { | |
453 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | |
f30d7507 | 454 | "dm_DIG(): Abnormally false alarm case\n"); |
4f01358e | 455 | |
c21916ec LF |
456 | de_digtable->large_fa_hit++; |
457 | if (de_digtable->forbidden_igi < de_digtable->cur_igvalue) { | |
458 | de_digtable->forbidden_igi = de_digtable->cur_igvalue; | |
459 | de_digtable->large_fa_hit = 1; | |
4f01358e | 460 | } |
c21916ec LF |
461 | if (de_digtable->large_fa_hit >= 3) { |
462 | if ((de_digtable->forbidden_igi + 1) > DM_DIG_MAX) | |
463 | de_digtable->rx_gain_range_min = DM_DIG_MAX; | |
4f01358e | 464 | else |
c21916ec LF |
465 | de_digtable->rx_gain_range_min = |
466 | (de_digtable->forbidden_igi + 1); | |
467 | de_digtable->recover_cnt = 3600; /* 3600=2hr */ | |
4f01358e CL |
468 | } |
469 | } else { | |
470 | /* Recovery mechanism for IGI lower bound */ | |
c21916ec LF |
471 | if (de_digtable->recover_cnt != 0) { |
472 | de_digtable->recover_cnt--; | |
4f01358e | 473 | } else { |
c21916ec LF |
474 | if (de_digtable->large_fa_hit == 0) { |
475 | if ((de_digtable->forbidden_igi - 1) < | |
4f01358e | 476 | DM_DIG_FA_LOWER) { |
c21916ec | 477 | de_digtable->forbidden_igi = |
4f01358e | 478 | DM_DIG_FA_LOWER; |
c21916ec | 479 | de_digtable->rx_gain_range_min = |
4f01358e CL |
480 | DM_DIG_FA_LOWER; |
481 | ||
482 | } else { | |
c21916ec LF |
483 | de_digtable->forbidden_igi--; |
484 | de_digtable->rx_gain_range_min = | |
485 | (de_digtable->forbidden_igi + 1); | |
4f01358e | 486 | } |
c21916ec LF |
487 | } else if (de_digtable->large_fa_hit == 3) { |
488 | de_digtable->large_fa_hit = 0; | |
4f01358e CL |
489 | } |
490 | } | |
491 | } | |
492 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, | |
f30d7507 | 493 | "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n", |
c21916ec | 494 | de_digtable->large_fa_hit, de_digtable->forbidden_igi); |
4f01358e | 495 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, |
f30d7507 | 496 | "dm_DIG() After: recover_cnt=%d, rx_gain_range_min=%x\n", |
c21916ec | 497 | de_digtable->recover_cnt, de_digtable->rx_gain_range_min); |
4f01358e CL |
498 | |
499 | if (value_igi > DM_DIG_MAX) | |
500 | value_igi = DM_DIG_MAX; | |
c21916ec LF |
501 | else if (value_igi < de_digtable->rx_gain_range_min) |
502 | value_igi = de_digtable->rx_gain_range_min; | |
503 | de_digtable->cur_igvalue = value_igi; | |
4f01358e CL |
504 | rtl92d_dm_write_dig(hw); |
505 | if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) | |
506 | rtl92d_dm_cck_packet_detection_thresh(hw); | |
f30d7507 | 507 | RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n"); |
4f01358e CL |
508 | } |
509 | ||
510 | static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw) | |
511 | { | |
512 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
513 | ||
514 | rtlpriv->dm.dynamic_txpower_enable = true; | |
515 | rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL; | |
516 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; | |
517 | } | |
518 | ||
519 | static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw) | |
520 | { | |
521 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
522 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | |
523 | struct rtl_hal *rtlhal = rtl_hal(rtlpriv); | |
524 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | |
525 | long undecorated_smoothed_pwdb; | |
526 | ||
527 | if ((!rtlpriv->dm.dynamic_txpower_enable) | |
528 | || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) { | |
529 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; | |
530 | return; | |
531 | } | |
532 | if ((mac->link_state < MAC80211_LINKED) && | |
533 | (rtlpriv->dm.UNDEC_SM_PWDB == 0)) { | |
534 | RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, | |
f30d7507 | 535 | "Not connected to any\n"); |
4f01358e CL |
536 | rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL; |
537 | rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL; | |
538 | return; | |
539 | } | |
540 | if (mac->link_state >= MAC80211_LINKED) { | |
541 | if (mac->opmode == NL80211_IFTYPE_ADHOC) { | |
542 | undecorated_smoothed_pwdb = | |
543 | rtlpriv->dm.UNDEC_SM_PWDB; | |
544 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | |
f30d7507 JP |
545 | "IBSS Client PWDB = 0x%lx\n", |
546 | undecorated_smoothed_pwdb); | |
4f01358e CL |
547 | } else { |
548 | undecorated_smoothed_pwdb = | |
549 | rtlpriv->dm.undecorated_smoothed_pwdb; | |
550 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | |
f30d7507 JP |
551 | "STA Default Port PWDB = 0x%lx\n", |
552 | undecorated_smoothed_pwdb); | |
4f01358e CL |
553 | } |
554 | } else { | |
555 | undecorated_smoothed_pwdb = | |
556 | rtlpriv->dm.UNDEC_SM_PWDB; | |
557 | ||
558 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | |
f30d7507 JP |
559 | "AP Ext Port PWDB = 0x%lx\n", |
560 | undecorated_smoothed_pwdb); | |
4f01358e CL |
561 | } |
562 | if (rtlhal->current_bandtype == BAND_ON_5G) { | |
563 | if (undecorated_smoothed_pwdb >= 0x33) { | |
564 | rtlpriv->dm.dynamic_txhighpower_lvl = | |
565 | TXHIGHPWRLEVEL_LEVEL2; | |
566 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, | |
f30d7507 | 567 | "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n"); |
4f01358e CL |
568 | } else if ((undecorated_smoothed_pwdb < 0x33) |
569 | && (undecorated_smoothed_pwdb >= 0x2b)) { | |
570 | rtlpriv->dm.dynamic_txhighpower_lvl = | |
571 | TXHIGHPWRLEVEL_LEVEL1; | |
572 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, | |
f30d7507 | 573 | "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n"); |
4f01358e CL |
574 | } else if (undecorated_smoothed_pwdb < 0x2b) { |
575 | rtlpriv->dm.dynamic_txhighpower_lvl = | |
576 | TXHIGHPWRLEVEL_NORMAL; | |
577 | RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD, | |
f30d7507 | 578 | "5G:TxHighPwrLevel_Normal\n"); |
4f01358e CL |
579 | } |
580 | } else { | |
581 | if (undecorated_smoothed_pwdb >= | |
582 | TX_POWER_NEAR_FIELD_THRESH_LVL2) { | |
583 | rtlpriv->dm.dynamic_txhighpower_lvl = | |
584 | TXHIGHPWRLEVEL_LEVEL2; | |
585 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | |
f30d7507 | 586 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n"); |
4f01358e CL |
587 | } else |
588 | if ((undecorated_smoothed_pwdb < | |
589 | (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3)) | |
590 | && (undecorated_smoothed_pwdb >= | |
591 | TX_POWER_NEAR_FIELD_THRESH_LVL1)) { | |
592 | ||
593 | rtlpriv->dm.dynamic_txhighpower_lvl = | |
594 | TXHIGHPWRLEVEL_LEVEL1; | |
595 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | |
f30d7507 | 596 | "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n"); |
4f01358e CL |
597 | } else if (undecorated_smoothed_pwdb < |
598 | (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) { | |
599 | rtlpriv->dm.dynamic_txhighpower_lvl = | |
600 | TXHIGHPWRLEVEL_NORMAL; | |
601 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | |
f30d7507 | 602 | "TXHIGHPWRLEVEL_NORMAL\n"); |
4f01358e CL |
603 | } |
604 | } | |
605 | if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) { | |
606 | RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, | |
f30d7507 JP |
607 | "PHY_SetTxPowerLevel8192S() Channel = %d\n", |
608 | rtlphy->current_channel); | |
4f01358e CL |
609 | rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel); |
610 | } | |
611 | rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl; | |
612 | } | |
613 | ||
614 | static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw) | |
615 | { | |
616 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
617 | ||
618 | /* AP & ADHOC & MESH will return tmp */ | |
619 | if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION) | |
620 | return; | |
621 | /* Indicate Rx signal strength to FW. */ | |
622 | if (rtlpriv->dm.useramask) { | |
623 | u32 temp = rtlpriv->dm.undecorated_smoothed_pwdb; | |
624 | ||
625 | temp <<= 16; | |
626 | temp |= 0x100; | |
627 | /* fw v12 cmdid 5:use max macid ,for nic , | |
628 | * default macid is 0 ,max macid is 1 */ | |
629 | rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp)); | |
630 | } else { | |
631 | rtl_write_byte(rtlpriv, 0x4fe, | |
632 | (u8) rtlpriv->dm.undecorated_smoothed_pwdb); | |
633 | } | |
634 | } | |
635 | ||
636 | void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw) | |
637 | { | |
638 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
639 | ||
640 | rtlpriv->dm.current_turbo_edca = false; | |
641 | rtlpriv->dm.is_any_nonbepkts = false; | |
642 | rtlpriv->dm.is_cur_rdlstate = false; | |
643 | } | |
644 | ||
645 | static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw) | |
646 | { | |
647 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
648 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | |
649 | static u64 last_txok_cnt; | |
650 | static u64 last_rxok_cnt; | |
651 | u64 cur_txok_cnt; | |
652 | u64 cur_rxok_cnt; | |
653 | u32 edca_be_ul = 0x5ea42b; | |
654 | u32 edca_be_dl = 0x5ea42b; | |
655 | ||
656 | if (mac->link_state != MAC80211_LINKED) { | |
657 | rtlpriv->dm.current_turbo_edca = false; | |
658 | goto exit; | |
659 | } | |
660 | ||
661 | /* Enable BEQ TxOP limit configuration in wireless G-mode. */ | |
662 | /* To check whether we shall force turn on TXOP configuration. */ | |
663 | if ((!rtlpriv->dm.disable_framebursting) && | |
664 | (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION || | |
665 | rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION || | |
666 | rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) { | |
667 | /* Force TxOP limit to 0x005e for UL. */ | |
668 | if (!(edca_be_ul & 0xffff0000)) | |
669 | edca_be_ul |= 0x005e0000; | |
670 | /* Force TxOP limit to 0x005e for DL. */ | |
671 | if (!(edca_be_dl & 0xffff0000)) | |
672 | edca_be_dl |= 0x005e0000; | |
673 | } | |
674 | ||
675 | if ((!rtlpriv->dm.is_any_nonbepkts) && | |
676 | (!rtlpriv->dm.disable_framebursting)) { | |
677 | cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt; | |
678 | cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt; | |
679 | if (cur_rxok_cnt > 4 * cur_txok_cnt) { | |
680 | if (!rtlpriv->dm.is_cur_rdlstate || | |
681 | !rtlpriv->dm.current_turbo_edca) { | |
682 | rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, | |
683 | edca_be_dl); | |
684 | rtlpriv->dm.is_cur_rdlstate = true; | |
685 | } | |
686 | } else { | |
687 | if (rtlpriv->dm.is_cur_rdlstate || | |
688 | !rtlpriv->dm.current_turbo_edca) { | |
689 | rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, | |
690 | edca_be_ul); | |
691 | rtlpriv->dm.is_cur_rdlstate = false; | |
692 | } | |
693 | } | |
694 | rtlpriv->dm.current_turbo_edca = true; | |
695 | } else { | |
696 | if (rtlpriv->dm.current_turbo_edca) { | |
697 | u8 tmp = AC0_BE; | |
698 | rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM, | |
2c208890 | 699 | &tmp); |
4f01358e CL |
700 | rtlpriv->dm.current_turbo_edca = false; |
701 | } | |
702 | } | |
703 | ||
704 | exit: | |
705 | rtlpriv->dm.is_any_nonbepkts = false; | |
706 | last_txok_cnt = rtlpriv->stats.txbytesunicast; | |
707 | last_rxok_cnt = rtlpriv->stats.rxbytesunicast; | |
708 | } | |
709 | ||
710 | static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw) | |
711 | { | |
712 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
713 | u8 index_mapping[RX_INDEX_MAPPING_NUM] = { | |
714 | 0x0f, 0x0f, 0x0d, 0x0c, 0x0b, | |
715 | 0x0a, 0x09, 0x08, 0x07, 0x06, | |
716 | 0x05, 0x04, 0x04, 0x03, 0x02 | |
717 | }; | |
718 | int i; | |
719 | u32 u4tmp; | |
720 | ||
721 | u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter - | |
722 | rtlpriv->dm.thermalvalue_rxgain)]) << 12; | |
723 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 | 724 | "===> Rx Gain %x\n", u4tmp); |
4f01358e CL |
725 | for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++) |
726 | rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK, | |
727 | (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp); | |
728 | } | |
729 | ||
730 | static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg, | |
731 | u8 *cck_index_old) | |
732 | { | |
733 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
734 | int i; | |
735 | unsigned long flag = 0; | |
736 | long temp_cck; | |
737 | ||
738 | /* Query CCK default setting From 0xa24 */ | |
739 | rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag); | |
740 | temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2, | |
741 | BMASKDWORD) & BMASKCCK; | |
742 | rtl92d_release_cckandrw_pagea_ctl(hw, &flag); | |
743 | for (i = 0; i < CCK_TABLE_LENGTH; i++) { | |
744 | if (rtlpriv->dm.cck_inch14) { | |
745 | if (!memcmp((void *)&temp_cck, | |
746 | (void *)&cckswing_table_ch14[i][2], 4)) { | |
747 | *cck_index_old = (u8) i; | |
f30d7507 JP |
748 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
749 | "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n", | |
750 | RCCK0_TXFILTER2, temp_cck, | |
751 | *cck_index_old, | |
752 | rtlpriv->dm.cck_inch14); | |
4f01358e CL |
753 | break; |
754 | } | |
755 | } else { | |
756 | if (!memcmp((void *) &temp_cck, | |
757 | &cckswing_table_ch1ch13[i][2], 4)) { | |
758 | *cck_index_old = (u8) i; | |
f30d7507 JP |
759 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, |
760 | "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n", | |
761 | RCCK0_TXFILTER2, temp_cck, | |
762 | *cck_index_old, | |
763 | rtlpriv->dm.cck_inch14); | |
4f01358e CL |
764 | break; |
765 | } | |
766 | } | |
767 | } | |
768 | *temp_cckg = temp_cck; | |
769 | } | |
770 | ||
771 | static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index, | |
772 | bool *internal_pa, u8 thermalvalue, u8 delta, | |
773 | u8 rf, struct rtl_efuse *rtlefuse, | |
774 | struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy, | |
775 | u8 index_mapping[5][INDEX_MAPPING_NUM], | |
776 | u8 index_mapping_pa[8][INDEX_MAPPING_NUM]) | |
777 | { | |
778 | int i; | |
779 | u8 index; | |
780 | u8 offset = 0; | |
781 | ||
782 | for (i = 0; i < rf; i++) { | |
783 | if (rtlhal->macphymode == DUALMAC_DUALPHY && | |
784 | rtlhal->interfaceindex == 1) /* MAC 1 5G */ | |
785 | *internal_pa = rtlefuse->internal_pa_5g[1]; | |
786 | else | |
787 | *internal_pa = rtlefuse->internal_pa_5g[i]; | |
788 | if (*internal_pa) { | |
789 | if (rtlhal->interfaceindex == 1 || i == rf) | |
790 | offset = 4; | |
791 | else | |
792 | offset = 0; | |
793 | if (rtlphy->current_channel >= 100 && | |
794 | rtlphy->current_channel <= 165) | |
795 | offset += 2; | |
796 | } else { | |
797 | if (rtlhal->interfaceindex == 1 || i == rf) | |
798 | offset = 2; | |
799 | else | |
800 | offset = 0; | |
801 | } | |
802 | if (thermalvalue > rtlefuse->eeprom_thermalmeter) | |
803 | offset++; | |
804 | if (*internal_pa) { | |
805 | if (delta > INDEX_MAPPING_NUM - 1) | |
806 | index = index_mapping_pa[offset] | |
807 | [INDEX_MAPPING_NUM - 1]; | |
808 | else | |
809 | index = | |
810 | index_mapping_pa[offset][delta]; | |
811 | } else { | |
812 | if (delta > INDEX_MAPPING_NUM - 1) | |
813 | index = | |
814 | index_mapping[offset][INDEX_MAPPING_NUM - 1]; | |
815 | else | |
816 | index = index_mapping[offset][delta]; | |
817 | } | |
818 | if (thermalvalue > rtlefuse->eeprom_thermalmeter) { | |
819 | if (*internal_pa && thermalvalue > 0x12) { | |
820 | ofdm_index[i] = rtlpriv->dm.ofdm_index[i] - | |
821 | ((delta / 2) * 3 + (delta % 2)); | |
822 | } else { | |
823 | ofdm_index[i] -= index; | |
824 | } | |
825 | } else { | |
826 | ofdm_index[i] += index; | |
827 | } | |
828 | } | |
829 | } | |
830 | ||
831 | static void rtl92d_dm_txpower_tracking_callback_thermalmeter( | |
832 | struct ieee80211_hw *hw) | |
833 | { | |
834 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
835 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); | |
836 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | |
837 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); | |
838 | u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain; | |
839 | u8 offset, thermalvalue_avg_count = 0; | |
840 | u32 thermalvalue_avg = 0; | |
841 | bool internal_pa = false; | |
842 | long ele_a = 0, ele_d, temp_cck, val_x, value32; | |
843 | long val_y, ele_c = 0; | |
844 | u8 ofdm_index[2]; | |
845 | u8 cck_index = 0; | |
846 | u8 ofdm_index_old[2]; | |
847 | u8 cck_index_old = 0; | |
848 | u8 index; | |
849 | int i; | |
850 | bool is2t = IS_92D_SINGLEPHY(rtlhal->version); | |
851 | u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf; | |
852 | u8 indexforchannel = | |
853 | rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel); | |
854 | u8 index_mapping[5][INDEX_MAPPING_NUM] = { | |
855 | /* 5G, path A/MAC 0, decrease power */ | |
856 | {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18}, | |
857 | /* 5G, path A/MAC 0, increase power */ | |
858 | {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18}, | |
859 | /* 5G, path B/MAC 1, decrease power */ | |
860 | {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18}, | |
861 | /* 5G, path B/MAC 1, increase power */ | |
862 | {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18}, | |
863 | /* 2.4G, for decreas power */ | |
864 | {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10}, | |
865 | }; | |
866 | u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = { | |
867 | /* 5G, path A/MAC 0, ch36-64, decrease power */ | |
868 | {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16}, | |
869 | /* 5G, path A/MAC 0, ch36-64, increase power */ | |
870 | {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18}, | |
871 | /* 5G, path A/MAC 0, ch100-165, decrease power */ | |
872 | {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15}, | |
873 | /* 5G, path A/MAC 0, ch100-165, increase power */ | |
874 | {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18}, | |
875 | /* 5G, path B/MAC 1, ch36-64, decrease power */ | |
876 | {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16}, | |
877 | /* 5G, path B/MAC 1, ch36-64, increase power */ | |
878 | {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18}, | |
879 | /* 5G, path B/MAC 1, ch100-165, decrease power */ | |
880 | {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14}, | |
881 | /* 5G, path B/MAC 1, ch100-165, increase power */ | |
882 | {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18}, | |
883 | }; | |
884 | ||
885 | rtlpriv->dm.txpower_trackinginit = true; | |
f30d7507 | 886 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n"); |
4f01358e CL |
887 | thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800); |
888 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
889 | "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n", |
890 | thermalvalue, | |
891 | rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter); | |
4f01358e CL |
892 | rtl92d_phy_ap_calibrate(hw, (thermalvalue - |
893 | rtlefuse->eeprom_thermalmeter)); | |
894 | if (is2t) | |
895 | rf = 2; | |
896 | else | |
897 | rf = 1; | |
898 | if (thermalvalue) { | |
899 | ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE, | |
900 | BMASKDWORD) & BMASKOFDM_D; | |
901 | for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { | |
902 | if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) { | |
903 | ofdm_index_old[0] = (u8) i; | |
904 | ||
905 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 | 906 | "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n", |
4f01358e | 907 | ROFDM0_XATxIQIMBALANCE, |
f30d7507 | 908 | ele_d, ofdm_index_old[0]); |
4f01358e CL |
909 | break; |
910 | } | |
911 | } | |
912 | if (is2t) { | |
913 | ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE, | |
914 | BMASKDWORD) & BMASKOFDM_D; | |
915 | for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) { | |
916 | if (ele_d == | |
917 | (ofdmswing_table[i] & BMASKOFDM_D)) { | |
918 | ofdm_index_old[1] = (u8) i; | |
919 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, | |
920 | DBG_LOUD, | |
f30d7507 | 921 | "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n", |
4f01358e | 922 | ROFDM0_XBTxIQIMBALANCE, ele_d, |
f30d7507 | 923 | ofdm_index_old[1]); |
4f01358e CL |
924 | break; |
925 | } | |
926 | } | |
927 | } | |
928 | if (rtlhal->current_bandtype == BAND_ON_2_4G) { | |
929 | rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old); | |
930 | } else { | |
931 | temp_cck = 0x090e1317; | |
932 | cck_index_old = 12; | |
933 | } | |
934 | ||
935 | if (!rtlpriv->dm.thermalvalue) { | |
936 | rtlpriv->dm.thermalvalue = | |
937 | rtlefuse->eeprom_thermalmeter; | |
938 | rtlpriv->dm.thermalvalue_lck = thermalvalue; | |
939 | rtlpriv->dm.thermalvalue_iqk = thermalvalue; | |
940 | rtlpriv->dm.thermalvalue_rxgain = | |
941 | rtlefuse->eeprom_thermalmeter; | |
942 | for (i = 0; i < rf; i++) | |
943 | rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i]; | |
944 | rtlpriv->dm.cck_index = cck_index_old; | |
945 | } | |
946 | if (rtlhal->reloadtxpowerindex) { | |
947 | for (i = 0; i < rf; i++) | |
948 | rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i]; | |
949 | rtlpriv->dm.cck_index = cck_index_old; | |
950 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 | 951 | "reload ofdm index for band switch\n"); |
4f01358e CL |
952 | } |
953 | rtlpriv->dm.thermalvalue_avg | |
954 | [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue; | |
955 | rtlpriv->dm.thermalvalue_avg_index++; | |
956 | if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM) | |
957 | rtlpriv->dm.thermalvalue_avg_index = 0; | |
958 | for (i = 0; i < AVG_THERMAL_NUM; i++) { | |
959 | if (rtlpriv->dm.thermalvalue_avg[i]) { | |
960 | thermalvalue_avg += | |
961 | rtlpriv->dm.thermalvalue_avg[i]; | |
962 | thermalvalue_avg_count++; | |
963 | } | |
964 | } | |
965 | if (thermalvalue_avg_count) | |
966 | thermalvalue = (u8) (thermalvalue_avg / | |
967 | thermalvalue_avg_count); | |
968 | if (rtlhal->reloadtxpowerindex) { | |
969 | delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ? | |
970 | (thermalvalue - rtlefuse->eeprom_thermalmeter) : | |
971 | (rtlefuse->eeprom_thermalmeter - thermalvalue); | |
972 | rtlhal->reloadtxpowerindex = false; | |
973 | rtlpriv->dm.done_txpower = false; | |
974 | } else if (rtlpriv->dm.done_txpower) { | |
975 | delta = (thermalvalue > rtlpriv->dm.thermalvalue) ? | |
976 | (thermalvalue - rtlpriv->dm.thermalvalue) : | |
977 | (rtlpriv->dm.thermalvalue - thermalvalue); | |
978 | } else { | |
979 | delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ? | |
980 | (thermalvalue - rtlefuse->eeprom_thermalmeter) : | |
981 | (rtlefuse->eeprom_thermalmeter - thermalvalue); | |
982 | } | |
983 | delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ? | |
984 | (thermalvalue - rtlpriv->dm.thermalvalue_lck) : | |
985 | (rtlpriv->dm.thermalvalue_lck - thermalvalue); | |
986 | delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ? | |
987 | (thermalvalue - rtlpriv->dm.thermalvalue_iqk) : | |
988 | (rtlpriv->dm.thermalvalue_iqk - thermalvalue); | |
989 | delta_rxgain = | |
990 | (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ? | |
991 | (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) : | |
992 | (rtlpriv->dm.thermalvalue_rxgain - thermalvalue); | |
993 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
994 | "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n", |
995 | thermalvalue, rtlpriv->dm.thermalvalue, | |
996 | rtlefuse->eeprom_thermalmeter, delta, delta_lck, | |
997 | delta_iqk); | |
4f01358e CL |
998 | if ((delta_lck > rtlefuse->delta_lck) && |
999 | (rtlefuse->delta_lck != 0)) { | |
1000 | rtlpriv->dm.thermalvalue_lck = thermalvalue; | |
1001 | rtl92d_phy_lc_calibrate(hw); | |
1002 | } | |
1003 | if (delta > 0 && rtlpriv->dm.txpower_track_control) { | |
1004 | rtlpriv->dm.done_txpower = true; | |
1005 | delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ? | |
1006 | (thermalvalue - rtlefuse->eeprom_thermalmeter) : | |
1007 | (rtlefuse->eeprom_thermalmeter - thermalvalue); | |
1008 | if (rtlhal->current_bandtype == BAND_ON_2_4G) { | |
1009 | offset = 4; | |
1010 | if (delta > INDEX_MAPPING_NUM - 1) | |
1011 | index = index_mapping[offset] | |
1012 | [INDEX_MAPPING_NUM - 1]; | |
1013 | else | |
1014 | index = index_mapping[offset][delta]; | |
1015 | if (thermalvalue > rtlpriv->dm.thermalvalue) { | |
1016 | for (i = 0; i < rf; i++) | |
1017 | ofdm_index[i] -= delta; | |
1018 | cck_index -= delta; | |
1019 | } else { | |
1020 | for (i = 0; i < rf; i++) | |
1021 | ofdm_index[i] += index; | |
1022 | cck_index += index; | |
1023 | } | |
1024 | } else if (rtlhal->current_bandtype == BAND_ON_5G) { | |
1025 | rtl92d_bandtype_5G(rtlhal, ofdm_index, | |
1026 | &internal_pa, thermalvalue, | |
1027 | delta, rf, rtlefuse, rtlpriv, | |
1028 | rtlphy, index_mapping, | |
1029 | index_mapping_internal_pa); | |
1030 | } | |
1031 | if (is2t) { | |
1032 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
1033 | "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n", |
1034 | rtlpriv->dm.ofdm_index[0], | |
1035 | rtlpriv->dm.ofdm_index[1], | |
1036 | rtlpriv->dm.cck_index); | |
4f01358e CL |
1037 | } else { |
1038 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
1039 | "temp OFDM_A_index=0x%x,cck_index = 0x%x\n", |
1040 | rtlpriv->dm.ofdm_index[0], | |
1041 | rtlpriv->dm.cck_index); | |
4f01358e CL |
1042 | } |
1043 | for (i = 0; i < rf; i++) { | |
1044 | if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1) | |
1045 | ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1; | |
1046 | else if (ofdm_index[i] < ofdm_min_index) | |
1047 | ofdm_index[i] = ofdm_min_index; | |
1048 | } | |
1049 | if (rtlhal->current_bandtype == BAND_ON_2_4G) { | |
1050 | if (cck_index > CCK_TABLE_SIZE - 1) { | |
1051 | cck_index = CCK_TABLE_SIZE - 1; | |
1052 | } else if (internal_pa || | |
1053 | rtlhal->current_bandtype == | |
1054 | BAND_ON_2_4G) { | |
1055 | if (ofdm_index[i] < | |
1056 | ofdm_min_index_internal_pa) | |
1057 | ofdm_index[i] = | |
1058 | ofdm_min_index_internal_pa; | |
1059 | } else if (cck_index < 0) { | |
1060 | cck_index = 0; | |
1061 | } | |
1062 | } | |
1063 | if (is2t) { | |
1064 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 | 1065 | "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n", |
4f01358e | 1066 | ofdm_index[0], ofdm_index[1], |
f30d7507 | 1067 | cck_index); |
4f01358e CL |
1068 | } else { |
1069 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
1070 | "new OFDM_A_index=0x%x,cck_index = 0x%x\n", |
1071 | ofdm_index[0], cck_index); | |
4f01358e CL |
1072 | } |
1073 | ele_d = (ofdmswing_table[(u8) ofdm_index[0]] & | |
1074 | 0xFFC00000) >> 22; | |
1075 | val_x = rtlphy->iqk_matrix_regsetting | |
1076 | [indexforchannel].value[0][0]; | |
1077 | val_y = rtlphy->iqk_matrix_regsetting | |
1078 | [indexforchannel].value[0][1]; | |
1079 | if (val_x != 0) { | |
1080 | if ((val_x & 0x00000200) != 0) | |
1081 | val_x = val_x | 0xFFFFFC00; | |
1082 | ele_a = | |
1083 | ((val_x * ele_d) >> 8) & 0x000003FF; | |
1084 | ||
1085 | /* new element C = element D x Y */ | |
1086 | if ((val_y & 0x00000200) != 0) | |
1087 | val_y = val_y | 0xFFFFFC00; | |
1088 | ele_c = ((val_y * ele_d) >> 8) & 0x000003FF; | |
1089 | ||
1090 | /* wirte new elements A, C, D to regC80 and | |
1091 | * regC94, element B is always 0 */ | |
1092 | value32 = (ele_d << 22) | ((ele_c & 0x3F) << | |
1093 | 16) | ele_a; | |
1094 | rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE, | |
1095 | BMASKDWORD, value32); | |
1096 | ||
1097 | value32 = (ele_c & 0x000003C0) >> 6; | |
1098 | rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS, | |
1099 | value32); | |
1100 | ||
1101 | value32 = ((val_x * ele_d) >> 7) & 0x01; | |
1102 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24), | |
1103 | value32); | |
1104 | ||
1105 | } else { | |
1106 | rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE, | |
1107 | BMASKDWORD, | |
1108 | ofdmswing_table | |
1109 | [(u8)ofdm_index[0]]); | |
1110 | rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS, | |
1111 | 0x00); | |
1112 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, | |
1113 | BIT(24), 0x00); | |
1114 | } | |
1115 | ||
1116 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
1117 | "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n", |
1118 | rtlhal->interfaceindex, | |
4f01358e | 1119 | val_x, val_y, ele_a, ele_c, ele_d, |
f30d7507 | 1120 | val_x, val_y); |
4f01358e CL |
1121 | |
1122 | if (rtlhal->current_bandtype == BAND_ON_2_4G) { | |
1123 | /* Adjust CCK according to IQK result */ | |
1124 | if (!rtlpriv->dm.cck_inch14) { | |
1125 | rtl_write_byte(rtlpriv, 0xa22, | |
1126 | cckswing_table_ch1ch13 | |
1127 | [(u8)cck_index][0]); | |
1128 | rtl_write_byte(rtlpriv, 0xa23, | |
1129 | cckswing_table_ch1ch13 | |
1130 | [(u8)cck_index][1]); | |
1131 | rtl_write_byte(rtlpriv, 0xa24, | |
1132 | cckswing_table_ch1ch13 | |
1133 | [(u8)cck_index][2]); | |
1134 | rtl_write_byte(rtlpriv, 0xa25, | |
1135 | cckswing_table_ch1ch13 | |
1136 | [(u8)cck_index][3]); | |
1137 | rtl_write_byte(rtlpriv, 0xa26, | |
1138 | cckswing_table_ch1ch13 | |
1139 | [(u8)cck_index][4]); | |
1140 | rtl_write_byte(rtlpriv, 0xa27, | |
1141 | cckswing_table_ch1ch13 | |
1142 | [(u8)cck_index][5]); | |
1143 | rtl_write_byte(rtlpriv, 0xa28, | |
1144 | cckswing_table_ch1ch13 | |
1145 | [(u8)cck_index][6]); | |
1146 | rtl_write_byte(rtlpriv, 0xa29, | |
1147 | cckswing_table_ch1ch13 | |
1148 | [(u8)cck_index][7]); | |
1149 | } else { | |
1150 | rtl_write_byte(rtlpriv, 0xa22, | |
1151 | cckswing_table_ch14 | |
1152 | [(u8)cck_index][0]); | |
1153 | rtl_write_byte(rtlpriv, 0xa23, | |
1154 | cckswing_table_ch14 | |
1155 | [(u8)cck_index][1]); | |
1156 | rtl_write_byte(rtlpriv, 0xa24, | |
1157 | cckswing_table_ch14 | |
1158 | [(u8)cck_index][2]); | |
1159 | rtl_write_byte(rtlpriv, 0xa25, | |
1160 | cckswing_table_ch14 | |
1161 | [(u8)cck_index][3]); | |
1162 | rtl_write_byte(rtlpriv, 0xa26, | |
1163 | cckswing_table_ch14 | |
1164 | [(u8)cck_index][4]); | |
1165 | rtl_write_byte(rtlpriv, 0xa27, | |
1166 | cckswing_table_ch14 | |
1167 | [(u8)cck_index][5]); | |
1168 | rtl_write_byte(rtlpriv, 0xa28, | |
1169 | cckswing_table_ch14 | |
1170 | [(u8)cck_index][6]); | |
1171 | rtl_write_byte(rtlpriv, 0xa29, | |
1172 | cckswing_table_ch14 | |
1173 | [(u8)cck_index][7]); | |
1174 | } | |
1175 | } | |
1176 | if (is2t) { | |
1177 | ele_d = (ofdmswing_table[(u8) ofdm_index[1]] & | |
1178 | 0xFFC00000) >> 22; | |
1179 | val_x = rtlphy->iqk_matrix_regsetting | |
1180 | [indexforchannel].value[0][4]; | |
1181 | val_y = rtlphy->iqk_matrix_regsetting | |
1182 | [indexforchannel].value[0][5]; | |
1183 | if (val_x != 0) { | |
1184 | if ((val_x & 0x00000200) != 0) | |
1185 | /* consider minus */ | |
1186 | val_x = val_x | 0xFFFFFC00; | |
1187 | ele_a = ((val_x * ele_d) >> 8) & | |
1188 | 0x000003FF; | |
1189 | /* new element C = element D x Y */ | |
1190 | if ((val_y & 0x00000200) != 0) | |
1191 | val_y = | |
1192 | val_y | 0xFFFFFC00; | |
1193 | ele_c = | |
1194 | ((val_y * | |
1195 | ele_d) >> 8) & 0x00003FF; | |
1196 | /* write new elements A, C, D to regC88 | |
1197 | * and regC9C, element B is always 0 | |
1198 | */ | |
1199 | value32 = (ele_d << 22) | | |
1200 | ((ele_c & 0x3F) << 16) | | |
1201 | ele_a; | |
1202 | rtl_set_bbreg(hw, | |
1203 | ROFDM0_XBTxIQIMBALANCE, | |
1204 | BMASKDWORD, value32); | |
1205 | value32 = (ele_c & 0x000003C0) >> 6; | |
1206 | rtl_set_bbreg(hw, ROFDM0_XDTxAFE, | |
1207 | BMASKH4BITS, value32); | |
1208 | value32 = ((val_x * ele_d) >> 7) & 0x01; | |
1209 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, | |
1210 | BIT(28), value32); | |
1211 | } else { | |
1212 | rtl_set_bbreg(hw, | |
1213 | ROFDM0_XBTxIQIMBALANCE, | |
1214 | BMASKDWORD, | |
1215 | ofdmswing_table | |
1216 | [(u8) ofdm_index[1]]); | |
1217 | rtl_set_bbreg(hw, ROFDM0_XDTxAFE, | |
1218 | BMASKH4BITS, 0x00); | |
1219 | rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, | |
1220 | BIT(28), 0x00); | |
1221 | } | |
1222 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
1223 | "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n", |
1224 | val_x, val_y, ele_a, ele_c, | |
1225 | ele_d, val_x, val_y); | |
4f01358e CL |
1226 | } |
1227 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 | 1228 | "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", |
4f01358e CL |
1229 | rtl_get_bbreg(hw, 0xc80, BMASKDWORD), |
1230 | rtl_get_bbreg(hw, 0xc94, BMASKDWORD), | |
1231 | rtl_get_rfreg(hw, RF90_PATH_A, 0x24, | |
f30d7507 | 1232 | BRFREGOFFSETMASK)); |
4f01358e CL |
1233 | } |
1234 | if ((delta_iqk > rtlefuse->delta_iqk) && | |
1235 | (rtlefuse->delta_iqk != 0)) { | |
1236 | rtl92d_phy_reset_iqk_result(hw); | |
1237 | rtlpriv->dm.thermalvalue_iqk = thermalvalue; | |
1238 | rtl92d_phy_iq_calibrate(hw); | |
1239 | } | |
1240 | if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G | |
1241 | && thermalvalue <= rtlefuse->eeprom_thermalmeter) { | |
1242 | rtlpriv->dm.thermalvalue_rxgain = thermalvalue; | |
1243 | rtl92d_dm_rxgain_tracking_thermalmeter(hw); | |
1244 | } | |
1245 | if (rtlpriv->dm.txpower_track_control) | |
1246 | rtlpriv->dm.thermalvalue = thermalvalue; | |
1247 | } | |
1248 | ||
f30d7507 | 1249 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n"); |
4f01358e CL |
1250 | } |
1251 | ||
1252 | static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw) | |
1253 | { | |
1254 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
1255 | ||
1256 | rtlpriv->dm.txpower_tracking = true; | |
1257 | rtlpriv->dm.txpower_trackinginit = false; | |
1258 | rtlpriv->dm.txpower_track_control = true; | |
1259 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 JP |
1260 | "pMgntInfo->txpower_tracking = %d\n", |
1261 | rtlpriv->dm.txpower_tracking); | |
4f01358e CL |
1262 | } |
1263 | ||
1264 | void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw) | |
1265 | { | |
1266 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
1267 | static u8 tm_trigger; | |
1268 | ||
1269 | if (!rtlpriv->dm.txpower_tracking) | |
1270 | return; | |
1271 | ||
1272 | if (!tm_trigger) { | |
1273 | rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) | | |
1274 | BIT(16), 0x03); | |
1275 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 | 1276 | "Trigger 92S Thermal Meter!!\n"); |
4f01358e CL |
1277 | tm_trigger = 1; |
1278 | return; | |
1279 | } else { | |
1280 | RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, | |
f30d7507 | 1281 | "Schedule TxPowerTracking direct call!!\n"); |
4f01358e CL |
1282 | rtl92d_dm_txpower_tracking_callback_thermalmeter(hw); |
1283 | tm_trigger = 0; | |
1284 | } | |
1285 | } | |
1286 | ||
1287 | void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw) | |
1288 | { | |
1289 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
1290 | struct rate_adaptive *ra = &(rtlpriv->ra); | |
1291 | ||
1292 | ra->ratr_state = DM_RATR_STA_INIT; | |
1293 | ra->pre_ratr_state = DM_RATR_STA_INIT; | |
1294 | if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER) | |
1295 | rtlpriv->dm.useramask = true; | |
1296 | else | |
1297 | rtlpriv->dm.useramask = false; | |
1298 | } | |
1299 | ||
1300 | void rtl92d_dm_init(struct ieee80211_hw *hw) | |
1301 | { | |
1302 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
1303 | ||
1304 | rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER; | |
1305 | rtl92d_dm_diginit(hw); | |
1306 | rtl92d_dm_init_dynamic_txpower(hw); | |
1307 | rtl92d_dm_init_edca_turbo(hw); | |
1308 | rtl92d_dm_init_rate_adaptive_mask(hw); | |
1309 | rtl92d_dm_initialize_txpower_tracking(hw); | |
1310 | } | |
1311 | ||
1312 | void rtl92d_dm_watchdog(struct ieee80211_hw *hw) | |
1313 | { | |
1314 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); | |
1315 | bool fw_current_inpsmode = false; | |
1316 | bool fwps_awake = true; | |
1317 | ||
1318 | /* 1. RF is OFF. (No need to do DM.) | |
1319 | * 2. Fw is under power saving mode for FwLPS. | |
1320 | * (Prevent from SW/FW I/O racing.) | |
1321 | * 3. IPS workitem is scheduled. (Prevent from IPS sequence | |
1322 | * to be swapped with DM. | |
1323 | * 4. RFChangeInProgress is TRUE. | |
1324 | * (Prevent from broken by IPS/HW/SW Rf off.) */ | |
1325 | ||
1326 | if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) && | |
1327 | fwps_awake) && (!ppsc->rfchange_inprogress)) { | |
1328 | rtl92d_dm_pwdb_monitor(hw); | |
1329 | rtl92d_dm_false_alarm_counter_statistics(hw); | |
1330 | rtl92d_dm_find_minimum_rssi(hw); | |
1331 | rtl92d_dm_dig(hw); | |
1332 | /* rtl92d_dm_dynamic_bb_powersaving(hw); */ | |
1333 | rtl92d_dm_dynamic_txpower(hw); | |
1334 | /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */ | |
1335 | /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */ | |
1336 | /* rtl92d_dm_interrupt_migration(hw); */ | |
1337 | rtl92d_dm_check_edca_turbo(hw); | |
1338 | } | |
1339 | } |