[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / ti / wlcore / rx.c

/*
 * This file is part of wl1271
 *
 * Copyright (C) 2009 Nokia Corporation
 *
 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include <linux/gfp.h>
#include <linux/sched.h>

#include "wlcore.h"
#include "debug.h"
#include "acx.h"
#include "rx.h"
#include "tx.h"
#include "io.h"
#include "hw_ops.h"

/*
 * TODO: this is here just for now, it must be removed when the data
 * operations are in place.
 */
#include "../wl12xx/reg.h"

static u32 wlcore_rx_get_buf_size(struct wl1271 *wl,
				  u32 rx_pkt_desc)
{
	if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)
		return (rx_pkt_desc & ALIGNED_RX_BUF_SIZE_MASK) >>
		       ALIGNED_RX_BUF_SIZE_SHIFT;

	return (rx_pkt_desc & RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
}

static u32 wlcore_rx_get_align_buf_size(struct wl1271 *wl, u32 pkt_len)
{
	if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)
		return ALIGN(pkt_len, WL12XX_BUS_BLOCK_SIZE);

	return pkt_len;
}

static void wl1271_rx_status(struct wl1271 *wl,
			     struct wl1271_rx_descriptor *desc,
			     struct ieee80211_rx_status *status,
			     u8 beacon)
{
	memset(status, 0, sizeof(struct ieee80211_rx_status));

	if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
		status->band = NL80211_BAND_2GHZ;
	else
		status->band = NL80211_BAND_5GHZ;

	status->rate_idx = wlcore_rate_to_idx(wl, desc->rate, status->band);

	/* 11n support */
	if (desc->rate <= wl->hw_min_ht_rate)
		status->encoding = RX_ENC_HT;

	/*
	* Read the signal level and antenna diversity indication.
	* The msb in the signal level is always set as it is a
	* negative number.
	* The antenna indication is the msb of the rssi.
	*/
	status->signal = ((desc->rssi & RSSI_LEVEL_BITMASK) | BIT(7));
	status->antenna = ((desc->rssi & ANT_DIVERSITY_BITMASK) >> 7);

	/*
	 * FIXME: In wl1251, the SNR should be divided by two.  In wl1271 we
	 * need to divide by two for now, but TI has been discussing about
	 * changing it.  This needs to be rechecked.
	 */
	wl->noise = desc->rssi - (desc->snr >> 1);

	status->freq = ieee80211_channel_to_frequency(desc->channel,
						      status->band);

	if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
		u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;

		status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED |
				RX_FLAG_DECRYPTED;

		if (unlikely(desc_err_code & WL1271_RX_DESC_MIC_FAIL)) {
			status->flag |= RX_FLAG_MMIC_ERROR;
			wl1271_warning("Michael MIC error. Desc: 0x%x",
				       desc_err_code);
		}
	}

	if (beacon)
		wlcore_set_pending_regdomain_ch(wl, (u16)desc->channel,
						status->band);
}

static int wl1271_rx_handle_data(struct wl1271 *wl, u8 *data, u32 length,
				 enum wl_rx_buf_align rx_align, u8 *hlid)
{
	struct wl1271_rx_descriptor *desc;
	struct sk_buff *skb;
	struct ieee80211_hdr *hdr;
	u8 beacon = 0;
	u8 is_data = 0;
	u8 reserved = 0, offset_to_data = 0;
	u16 seq_num;
	u32 pkt_data_len;

	/*
	 * In PLT mode we seem to get frames and mac80211 warns about them,
	 * workaround this by not retrieving them at all.
	 */
	if (unlikely(wl->plt))
		return -EINVAL;

	pkt_data_len = wlcore_hw_get_rx_packet_len(wl, data, length);
	if (!pkt_data_len) {
		wl1271_error("Invalid packet arrived from HW. length %d",
			     length);
		return -EINVAL;
	}

	if (rx_align == WLCORE_RX_BUF_UNALIGNED)
		reserved = RX_BUF_ALIGN;
	else if (rx_align == WLCORE_RX_BUF_PADDED)
		offset_to_data = RX_BUF_ALIGN;

	/* the data read starts with the descriptor */
	desc = (struct wl1271_rx_descriptor *) data;

	if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
		size_t len = length - sizeof(*desc);
		wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
		return 0;
	}

	/* discard corrupted packets */
	if (desc->status & WL1271_RX_DESC_DECRYPT_FAIL) {
		hdr = (void *)(data + sizeof(*desc) + offset_to_data);
		wl1271_warning("corrupted packet in RX: status: 0x%x len: %d",
			       desc->status & WL1271_RX_DESC_STATUS_MASK,
			       pkt_data_len);
		wl1271_dump((DEBUG_RX|DEBUG_CMD), "PKT: ", data + sizeof(*desc),
			    min(pkt_data_len,
				ieee80211_hdrlen(hdr->frame_control)));
		return -EINVAL;
	}

	/* skb length not including rx descriptor */
	skb = __dev_alloc_skb(pkt_data_len + reserved, GFP_KERNEL);
	if (!skb) {
		wl1271_error("Couldn't allocate RX frame");
		return -ENOMEM;
	}

	/* reserve the unaligned payload(if any) */
	skb_reserve(skb, reserved);

	/*
	 * Copy packets from aggregation buffer to the skbs without rx
	 * descriptor and with packet payload aligned care. In case of unaligned
	 * packets copy the packets in offset of 2 bytes guarantee IP header
	 * payload aligned to 4 bytes.
	 */
	skb_put_data(skb, data + sizeof(*desc), pkt_data_len);
	if (rx_align == WLCORE_RX_BUF_PADDED)
		skb_pull(skb, RX_BUF_ALIGN);

	*hlid = desc->hlid;

	hdr = (struct ieee80211_hdr *)skb->data;
	if (ieee80211_is_beacon(hdr->frame_control))
		beacon = 1;
	if (ieee80211_is_data_present(hdr->frame_control))
		is_data = 1;

	wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
	wlcore_hw_set_rx_csum(wl, desc, skb);

	seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
	wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb,
		     skb->len - desc->pad_len,
		     beacon ? "beacon" : "",
		     seq_num, *hlid);

	skb_queue_tail(&wl->deferred_rx_queue, skb);
	queue_work(wl->freezable_wq, &wl->netstack_work);

	return is_data;
}

int wlcore_rx(struct wl1271 *wl, struct wl_fw_status *status)
{
	unsigned long active_hlids[BITS_TO_LONGS(WLCORE_MAX_LINKS)] = {0};
	u32 buf_size;
	u32 fw_rx_counter = status->fw_rx_counter % wl->num_rx_desc;
	u32 drv_rx_counter = wl->rx_counter % wl->num_rx_desc;
	u32 rx_counter;
	u32 pkt_len, align_pkt_len;
	u32 pkt_offset, des;
	u8 hlid;
	enum wl_rx_buf_align rx_align;
	int ret = 0;

	/* update rates per link */
	hlid = status->counters.hlid;

	if (hlid < WLCORE_MAX_LINKS)
		wl->links[hlid].fw_rate_mbps =
				status->counters.tx_last_rate_mbps;

	while (drv_rx_counter != fw_rx_counter) {
		buf_size = 0;
		rx_counter = drv_rx_counter;
		while (rx_counter != fw_rx_counter) {
			des = le32_to_cpu(status->rx_pkt_descs[rx_counter]);
			pkt_len = wlcore_rx_get_buf_size(wl, des);
			align_pkt_len = wlcore_rx_get_align_buf_size(wl,
								     pkt_len);
			if (buf_size + align_pkt_len > wl->aggr_buf_size)
				break;
			buf_size += align_pkt_len;
			rx_counter++;
			rx_counter %= wl->num_rx_desc;
		}

		if (buf_size == 0) {
			wl1271_warning("received empty data");
			break;
		}

		/* Read all available packets at once */
		des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]);
		ret = wlcore_hw_prepare_read(wl, des, buf_size);
		if (ret < 0)
			goto out;

		ret = wlcore_read_data(wl, REG_SLV_MEM_DATA, wl->aggr_buf,
				       buf_size, true);
		if (ret < 0)
			goto out;

		/* Split data into separate packets */
		pkt_offset = 0;
		while (pkt_offset < buf_size) {
			des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]);
			pkt_len = wlcore_rx_get_buf_size(wl, des);
			rx_align = wlcore_hw_get_rx_buf_align(wl, des);

			/*
			 * the handle data call can only fail in memory-outage
			 * conditions, in that case the received frame will just
			 * be dropped.
			 */
			if (wl1271_rx_handle_data(wl,
						  wl->aggr_buf + pkt_offset,
						  pkt_len, rx_align,
						  &hlid) == 1) {
				if (hlid < wl->num_links)
					__set_bit(hlid, active_hlids);
				else
					WARN(1,
					     "hlid (%d) exceeded MAX_LINKS\n",
					     hlid);
			}

			wl->rx_counter++;
			drv_rx_counter++;
			drv_rx_counter %= wl->num_rx_desc;
			pkt_offset += wlcore_rx_get_align_buf_size(wl, pkt_len);
		}
	}

	/*
	 * Write the driver's packet counter to the FW. This is only required
	 * for older hardware revisions
	 */
	if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) {
		ret = wlcore_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER,
				     wl->rx_counter);
		if (ret < 0)
			goto out;
	}

	wl12xx_rearm_rx_streaming(wl, active_hlids);

out:
	return ret;
}

#ifdef CONFIG_PM
int wl1271_rx_filter_enable(struct wl1271 *wl,
			    int index, bool enable,
			    struct wl12xx_rx_filter *filter)
{
	int ret;

	if (!!test_bit(index, wl->rx_filter_enabled) == enable) {
		wl1271_warning("Request to enable an already "
			     "enabled rx filter %d", index);
		return 0;
	}

	ret = wl1271_acx_set_rx_filter(wl, index, enable, filter);

	if (ret) {
		wl1271_error("Failed to %s rx data filter %d (err=%d)",
			     enable ? "enable" : "disable", index, ret);
		return ret;
	}

	if (enable)
		__set_bit(index, wl->rx_filter_enabled);
	else
		__clear_bit(index, wl->rx_filter_enabled);

	return 0;
}

int wl1271_rx_filter_clear_all(struct wl1271 *wl)
{
	int i, ret = 0;

	for (i = 0; i < WL1271_MAX_RX_FILTERS; i++) {
		if (!test_bit(i, wl->rx_filter_enabled))
			continue;
		ret = wl1271_rx_filter_enable(wl, i, 0, NULL);
		if (ret)
			goto out;
	}

out:
	return ret;
}
#endif /* CONFIG_PM */
Commit	Line	Data
f5fc0f86 LC	1	/*
	2	* This file is part of wl1271
	3	*
	4	* Copyright (C) 2009 Nokia Corporation
	5	*
	6	* Contact: Luciano Coelho <luciano.coelho@nokia.com>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	20	* 02110-1301 USA
	21	*
	22	*/
	23
5a0e3ad6	24	#include <linux/gfp.h>
95dac04f	25	#include <linux/sched.h>
5a0e3ad6	26
c31be25a	27	#include "wlcore.h"
0f4e3122	28	#include "debug.h"
00d20100	29	#include "acx.h"
00d20100	30	#include "rx.h"
9eb599e9	31	#include "tx.h"
00d20100	32	#include "io.h"
cd70f6a4	33	#include "hw_ops.h"
f5fc0f86	34
00782136 LC	35	/*
	36	* TODO: this is here just for now, it must be removed when the data
	37	* operations are in place.
	38	*/
	39	#include "../wl12xx/reg.h"
	40
5766435e AN	41	static u32 wlcore_rx_get_buf_size(struct wl1271 *wl,
5766435e AN	42	u32 rx_pkt_desc)
f5fc0f86	43	{
5766435e AN	44	if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)
	45	return (rx_pkt_desc & ALIGNED_RX_BUF_SIZE_MASK) >>
	46	ALIGNED_RX_BUF_SIZE_SHIFT;
	47
	48	return (rx_pkt_desc & RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
	49	}
	50
	51	static u32 wlcore_rx_get_align_buf_size(struct wl1271 *wl, u32 pkt_len)
	52	{
	53	if (wl->quirks & WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN)
	54	return ALIGN(pkt_len, WL12XX_BUS_BLOCK_SIZE);
	55
	56	return pkt_len;
f5fc0f86 LC	57	}
f5fc0f86 LC	58
f5fc0f86 LC	59	static void wl1271_rx_status(struct wl1271 *wl,
	60	struct wl1271_rx_descriptor *desc,
	61	struct ieee80211_rx_status *status,
	62	u8 beacon)
	63	{
	64	memset(status, 0, sizeof(struct ieee80211_rx_status));
	65
6a2de93b	66	if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG)
57fbcce3	67	status->band = NL80211_BAND_2GHZ;
6a2de93b	68	else
57fbcce3	69	status->band = NL80211_BAND_5GHZ;
6a2de93b	70
43a8bc5a	71	status->rate_idx = wlcore_rate_to_idx(wl, desc->rate, status->band);
a4102645	72
18357850	73	/* 11n support */
43a8bc5a	74	if (desc->rate <= wl->hw_min_ht_rate)
da6a4352	75	status->encoding = RX_ENC_HT;
18357850	76
5d7e73ba GM	77	/*
	78	* Read the signal level and antenna diversity indication.
	79	* The msb in the signal level is always set as it is a
	80	* negative number.
	81	* The antenna indication is the msb of the rssi.
	82	*/
5d6af28a GM	83	status->signal = ((desc->rssi & RSSI_LEVEL_BITMASK) \| BIT(7));
5d6af28a GM	84	status->antenna = ((desc->rssi & ANT_DIVERSITY_BITMASK) >> 7);
f5fc0f86	85
ece550d0 JL	86	/*
	87	* FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
	88	* need to divide by two for now, but TI has been discussing about
	89	* changing it. This needs to be rechecked.
	90	*/
	91	wl->noise = desc->rssi - (desc->snr >> 1);
	92
0af0467f JO	93	status->freq = ieee80211_channel_to_frequency(desc->channel,
0af0467f JO	94	status->band);
f5fc0f86 LC	95
f5fc0f86 LC	96	if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
34c8e3d2	97	u8 desc_err_code = desc->status & WL1271_RX_DESC_STATUS_MASK;
f5fc0f86	98
34c8e3d2 AN	99	status->flag \|= RX_FLAG_IV_STRIPPED \| RX_FLAG_MMIC_STRIPPED \|
	100	RX_FLAG_DECRYPTED;
	101
387116b8	102	if (unlikely(desc_err_code & WL1271_RX_DESC_MIC_FAIL)) {
5d07b668	103	status->flag \|= RX_FLAG_MMIC_ERROR;
387116b8 AN	104	wl1271_warning("Michael MIC error. Desc: 0x%x",
387116b8 AN	105	desc_err_code);
34c8e3d2	106	}
f5fc0f86	107	}
6b70e7eb VG	108
	109	if (beacon)
	110	wlcore_set_pending_regdomain_ch(wl, (u16)desc->channel,
	111	status->band);
f5fc0f86 LC	112	}
f5fc0f86 LC	113
0a1d3abc	114	static int wl1271_rx_handle_data(struct wl1271 wl, u8 data, u32 length,
cd70f6a4	115	enum wl_rx_buf_align rx_align, u8 *hlid)
f5fc0f86	116	{
f5fc0f86 LC	117	struct wl1271_rx_descriptor *desc;
f5fc0f86 LC	118	struct sk_buff *skb;
92fe9b5f	119	struct ieee80211_hdr *hdr;
f5fc0f86	120	u8 beacon = 0;
77ddaa10	121	u8 is_data = 0;
387116b8	122	u8 reserved = 0, offset_to_data = 0;
5c472148	123	u16 seq_num;
4158149c	124	u32 pkt_data_len;
f5fc0f86	125
93c5bb68 KV	126	/*
	127	* In PLT mode we seem to get frames and mac80211 warns about them,
	128	* workaround this by not retrieving them at all.
	129	*/
3fcdab70	130	if (unlikely(wl->plt))
1f37cbc9	131	return -EINVAL;
93c5bb68	132
4158149c AN	133	pkt_data_len = wlcore_hw_get_rx_packet_len(wl, data, length);
	134	if (!pkt_data_len) {
	135	wl1271_error("Invalid packet arrived from HW. length %d",
	136	length);
	137	return -EINVAL;
	138	}
	139
cd70f6a4	140	if (rx_align == WLCORE_RX_BUF_UNALIGNED)
04414e2a	141	reserved = RX_BUF_ALIGN;
387116b8 AN	142	else if (rx_align == WLCORE_RX_BUF_PADDED)
387116b8 AN	143	offset_to_data = RX_BUF_ALIGN;
cd70f6a4	144
34c8e3d2 AN	145	/* the data read starts with the descriptor */
	146	desc = (struct wl1271_rx_descriptor *) data;
	147
95dac04f IY	148	if (desc->packet_class == WL12XX_RX_CLASS_LOGGER) {
	149	size_t len = length - sizeof(*desc);
	150	wl12xx_copy_fwlog(wl, data + sizeof(*desc), len);
95dac04f IY	151	return 0;
	152	}
	153
34c8e3d2	154	/* discard corrupted packets */
387116b8 AN	155	if (desc->status & WL1271_RX_DESC_DECRYPT_FAIL) {
	156	hdr = (void )(data + sizeof(desc) + offset_to_data);
	157	wl1271_warning("corrupted packet in RX: status: 0x%x len: %d",
	158	desc->status & WL1271_RX_DESC_STATUS_MASK,
	159	pkt_data_len);
	160	wl1271_dump((DEBUG_RX\|DEBUG_CMD), "PKT: ", data + sizeof(*desc),
	161	min(pkt_data_len,
	162	ieee80211_hdrlen(hdr->frame_control)));
34c8e3d2 AN	163	return -EINVAL;
	164	}
	165
4158149c AN	166	/* skb length not including rx descriptor */
4158149c AN	167	skb = __dev_alloc_skb(pkt_data_len + reserved, GFP_KERNEL);
f5fc0f86 LC	168	if (!skb) {
f5fc0f86 LC	169	wl1271_error("Couldn't allocate RX frame");
1f37cbc9	170	return -ENOMEM;
f5fc0f86 LC	171	}
f5fc0f86 LC	172
0a1d3abc SL	173	/* reserve the unaligned payload(if any) */
	174	skb_reserve(skb, reserved);
	175
0a1d3abc SL	176	/*
	177	* Copy packets from aggregation buffer to the skbs without rx
	178	* descriptor and with packet payload aligned care. In case of unaligned
	179	* packets copy the packets in offset of 2 bytes guarantee IP header
	180	* payload aligned to 4 bytes.
	181	*/
b952f4df	182	skb_put_data(skb, data + sizeof(*desc), pkt_data_len);
cd70f6a4	183	if (rx_align == WLCORE_RX_BUF_PADDED)
04414e2a	184	skb_pull(skb, RX_BUF_ALIGN);
cd70f6a4	185
9eb599e9	186	*hlid = desc->hlid;
f5fc0f86	187
92fe9b5f EP	188	hdr = (struct ieee80211_hdr *)skb->data;
92fe9b5f EP	189	if (ieee80211_is_beacon(hdr->frame_control))
f5fc0f86	190	beacon = 1;
77ddaa10 EP	191	if (ieee80211_is_data_present(hdr->frame_control))
77ddaa10 EP	192	is_data = 1;
f5fc0f86	193
58be4607	194	wl1271_rx_status(wl, desc, IEEE80211_SKB_RXCB(skb), beacon);
169da04f	195	wlcore_hw_set_rx_csum(wl, desc, skb);
f5fc0f86	196
5c472148	197	seq_num = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
9eb599e9	198	wl1271_debug(DEBUG_RX, "rx skb 0x%p: %d B %s seq %d hlid %d", skb,
a20a5b7e	199	skb->len - desc->pad_len,
5c472148	200	beacon ? "beacon" : "",
9eb599e9	201	seq_num, *hlid);
f5fc0f86	202
a620865e	203	skb_queue_tail(&wl->deferred_rx_queue, skb);
92ef8960	204	queue_work(wl->freezable_wq, &wl->netstack_work);
1f37cbc9	205
77ddaa10	206	return is_data;
f5fc0f86 LC	207	}
f5fc0f86 LC	208
75fb4df7	209	int wlcore_rx(struct wl1271 wl, struct wl_fw_status status)
f5fc0f86	210	{
da08fdfa	211	unsigned long active_hlids[BITS_TO_LONGS(WLCORE_MAX_LINKS)] = {0};
f5fc0f86	212	u32 buf_size;
0afd04e5 AN	213	u32 fw_rx_counter = status->fw_rx_counter % wl->num_rx_desc;
0afd04e5 AN	214	u32 drv_rx_counter = wl->rx_counter % wl->num_rx_desc;
1f37cbc9	215	u32 rx_counter;
5766435e AN	216	u32 pkt_len, align_pkt_len;
5766435e AN	217	u32 pkt_offset, des;
9eb599e9	218	u8 hlid;
cd70f6a4	219	enum wl_rx_buf_align rx_align;
045b9b5f	220	int ret = 0;
f5fc0f86	221
88f07e70 MA	222	/* update rates per link */
	223	hlid = status->counters.hlid;
	224
	225	if (hlid < WLCORE_MAX_LINKS)
	226	wl->links[hlid].fw_rate_mbps =
	227	status->counters.tx_last_rate_mbps;
	228
f5fc0f86	229	while (drv_rx_counter != fw_rx_counter) {
1f37cbc9 IY	230	buf_size = 0;
	231	rx_counter = drv_rx_counter;
	232	while (rx_counter != fw_rx_counter) {
5766435e AN	233	des = le32_to_cpu(status->rx_pkt_descs[rx_counter]);
	234	pkt_len = wlcore_rx_get_buf_size(wl, des);
	235	align_pkt_len = wlcore_rx_get_align_buf_size(wl,
	236	pkt_len);
26a309c7	237	if (buf_size + align_pkt_len > wl->aggr_buf_size)
1f37cbc9	238	break;
5766435e	239	buf_size += align_pkt_len;
1f37cbc9	240	rx_counter++;
0afd04e5	241	rx_counter %= wl->num_rx_desc;
1f37cbc9	242	}
f5fc0f86 LC	243
	244	if (buf_size == 0) {
	245	wl1271_warning("received empty data");
	246	break;
	247	}
	248
1f37cbc9	249	/* Read all available packets at once */
b14684a0	250	des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]);
eb96f841 IY	251	ret = wlcore_hw_prepare_read(wl, des, buf_size);
	252	if (ret < 0)
	253	goto out;
045b9b5f IY	254
	255	ret = wlcore_read_data(wl, REG_SLV_MEM_DATA, wl->aggr_buf,
	256	buf_size, true);
	257	if (ret < 0)
	258	goto out;
1f37cbc9 IY	259
	260	/* Split data into separate packets */
	261	pkt_offset = 0;
	262	while (pkt_offset < buf_size) {
5766435e AN	263	des = le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]);
5766435e AN	264	pkt_len = wlcore_rx_get_buf_size(wl, des);
cd70f6a4	265	rx_align = wlcore_hw_get_rx_buf_align(wl, des);
0a1d3abc	266
fb2382c7 JO	267	/*
	268	* the handle data call can only fail in memory-outage
	269	* conditions, in that case the received frame will just
	270	* be dropped.
	271	*/
77ddaa10 EP	272	if (wl1271_rx_handle_data(wl,
77ddaa10 EP	273	wl->aggr_buf + pkt_offset,
cd70f6a4	274	pkt_len, rx_align,
9eb599e9	275	&hlid) == 1) {
da08fdfa	276	if (hlid < wl->num_links)
f414218e LC	277	__set_bit(hlid, active_hlids);
	278	else
	279	WARN(1,
da08fdfa EP	280	"hlid (%d) exceeded MAX_LINKS\n",
da08fdfa EP	281	hlid);
9eb599e9	282	}
77ddaa10	283
1f37cbc9 IY	284	wl->rx_counter++;
1f37cbc9 IY	285	drv_rx_counter++;
0afd04e5	286	drv_rx_counter %= wl->num_rx_desc;
5766435e	287	pkt_offset += wlcore_rx_get_align_buf_size(wl, pkt_len);
1f37cbc9	288	}
f5fc0f86	289	}
606ea9fa IY	290
	291	/*
	292	* Write the driver's packet counter to the FW. This is only required
	293	* for older hardware revisions
	294	*/
b0f0ad39 IY	295	if (wl->quirks & WLCORE_QUIRK_END_OF_TRANSACTION) {
	296	ret = wlcore_write32(wl, WL12XX_REG_RX_DRIVER_COUNTER,
	297	wl->rx_counter);
	298	if (ret < 0)
	299	goto out;
	300	}
77ddaa10	301
9eb599e9	302	wl12xx_rearm_rx_streaming(wl, active_hlids);
045b9b5f IY	303
	304	out:
	305	return ret;
f5fc0f86	306	}
dbe0a8cd	307
4161923a	308	#ifdef CONFIG_PM
dbe0a8cd ES	309	int wl1271_rx_filter_enable(struct wl1271 *wl,
	310	int index, bool enable,
	311	struct wl12xx_rx_filter *filter)
	312	{
	313	int ret;
	314
02d0727c	315	if (!!test_bit(index, wl->rx_filter_enabled) == enable) {
dbe0a8cd ES	316	wl1271_warning("Request to enable an already "
	317	"enabled rx filter %d", index);
	318	return 0;
	319	}
	320
	321	ret = wl1271_acx_set_rx_filter(wl, index, enable, filter);
	322
	323	if (ret) {
	324	wl1271_error("Failed to %s rx data filter %d (err=%d)",
	325	enable ? "enable" : "disable", index, ret);
	326	return ret;
	327	}
	328
02d0727c NZ	329	if (enable)
	330	__set_bit(index, wl->rx_filter_enabled);
	331	else
	332	__clear_bit(index, wl->rx_filter_enabled);
dbe0a8cd ES	333
	334	return 0;
	335	}
	336
c439a1ca	337	int wl1271_rx_filter_clear_all(struct wl1271 *wl)
dbe0a8cd	338	{
c439a1ca	339	int i, ret = 0;
dbe0a8cd ES	340
dbe0a8cd ES	341	for (i = 0; i < WL1271_MAX_RX_FILTERS; i++) {
02d0727c	342	if (!test_bit(i, wl->rx_filter_enabled))
dbe0a8cd	343	continue;
c439a1ca AN	344	ret = wl1271_rx_filter_enable(wl, i, 0, NULL);
	345	if (ret)
	346	goto out;
dbe0a8cd	347	}
c439a1ca AN	348
	349	out:
	350	return ret;
dbe0a8cd	351	}
4161923a	352	#endif /* CONFIG_PM */