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Commit | Line | Data |
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f5fc0f86 LC |
1 | /* |
2 | * This file is part of wl1271 | |
3 | * | |
4 | * Copyright (C) 2008-2009 Nokia Corporation | |
5 | * | |
6 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License | |
10 | * version 2 as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, but | |
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
20 | * 02110-1301 USA | |
21 | * | |
22 | */ | |
23 | ||
a6b7a407 | 24 | #include <linux/interrupt.h> |
2d5e82b8 | 25 | #include <linux/irq.h> |
f5fc0f86 | 26 | #include <linux/module.h> |
e757201b GS |
27 | #include <linux/slab.h> |
28 | #include <linux/swab.h> | |
f5fc0f86 LC |
29 | #include <linux/crc7.h> |
30 | #include <linux/spi/spi.h> | |
c1f9a095 | 31 | #include <linux/wl12xx.h> |
0969d679 | 32 | #include <linux/platform_device.h> |
04654c38 | 33 | #include <linux/of_irq.h> |
4c1ce07b | 34 | #include <linux/regulator/consumer.h> |
f5fc0f86 | 35 | |
c31be25a | 36 | #include "wlcore.h" |
f5fc0f86 | 37 | #include "wl12xx_80211.h" |
00d20100 | 38 | #include "io.h" |
f5fc0f86 | 39 | |
760d969f TP |
40 | #define WSPI_CMD_READ 0x40000000 |
41 | #define WSPI_CMD_WRITE 0x00000000 | |
42 | #define WSPI_CMD_FIXED 0x20000000 | |
43 | #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000 | |
44 | #define WSPI_CMD_BYTE_LENGTH_OFFSET 17 | |
45 | #define WSPI_CMD_BYTE_ADDR 0x0001FFFF | |
46 | ||
47 | #define WSPI_INIT_CMD_CRC_LEN 5 | |
48 | ||
49 | #define WSPI_INIT_CMD_START 0x00 | |
50 | #define WSPI_INIT_CMD_TX 0x40 | |
51 | /* the extra bypass bit is sampled by the TNET as '1' */ | |
52 | #define WSPI_INIT_CMD_BYPASS_BIT 0x80 | |
53 | #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07 | |
54 | #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80 | |
55 | #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00 | |
56 | #define WSPI_INIT_CMD_IOD 0x40 | |
57 | #define WSPI_INIT_CMD_IP 0x20 | |
58 | #define WSPI_INIT_CMD_CS 0x10 | |
59 | #define WSPI_INIT_CMD_WS 0x08 | |
60 | #define WSPI_INIT_CMD_WSPI 0x01 | |
61 | #define WSPI_INIT_CMD_END 0x01 | |
62 | ||
63 | #define WSPI_INIT_CMD_LEN 8 | |
64 | ||
65 | #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \ | |
66 | ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32)) | |
67 | #define HW_ACCESS_WSPI_INIT_CMD_MASK 0 | |
68 | ||
5c57a901 IY |
69 | /* HW limitation: maximum possible chunk size is 4095 bytes */ |
70 | #define WSPI_MAX_CHUNK_SIZE 4092 | |
71 | ||
61932ba5 AN |
72 | /* |
73 | * only support SPI for 12xx - this code should be reworked when 18xx | |
74 | * support is introduced | |
75 | */ | |
76 | #define SPI_AGGR_BUFFER_SIZE (4 * PAGE_SIZE) | |
77 | ||
9b2761cb UM |
78 | /* Maximum number of SPI write chunks */ |
79 | #define WSPI_MAX_NUM_OF_CHUNKS \ | |
80 | ((SPI_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE) + 1) | |
81 | ||
5c57a901 | 82 | |
b65019f6 FB |
83 | struct wl12xx_spi_glue { |
84 | struct device *dev; | |
0969d679 | 85 | struct platform_device *core; |
4c1ce07b | 86 | struct regulator *reg; /* Power regulator */ |
b65019f6 FB |
87 | }; |
88 | ||
a390e85c | 89 | static void wl12xx_spi_reset(struct device *child) |
8197b711 | 90 | { |
a390e85c | 91 | struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); |
f5fc0f86 LC |
92 | u8 *cmd; |
93 | struct spi_transfer t; | |
94 | struct spi_message m; | |
95 | ||
96 | cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL); | |
97 | if (!cmd) { | |
e5d3625e LC |
98 | dev_err(child->parent, |
99 | "could not allocate cmd for spi reset\n"); | |
f5fc0f86 LC |
100 | return; |
101 | } | |
102 | ||
103 | memset(&t, 0, sizeof(t)); | |
104 | spi_message_init(&m); | |
105 | ||
106 | memset(cmd, 0xff, WSPI_INIT_CMD_LEN); | |
107 | ||
108 | t.tx_buf = cmd; | |
109 | t.len = WSPI_INIT_CMD_LEN; | |
110 | spi_message_add_tail(&t, &m); | |
111 | ||
b65019f6 | 112 | spi_sync(to_spi_device(glue->dev), &m); |
f5fc0f86 | 113 | |
0dd38667 | 114 | kfree(cmd); |
f5fc0f86 LC |
115 | } |
116 | ||
a390e85c | 117 | static void wl12xx_spi_init(struct device *child) |
f5fc0f86 | 118 | { |
a390e85c | 119 | struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); |
f5fc0f86 LC |
120 | struct spi_transfer t; |
121 | struct spi_message m; | |
e757201b | 122 | u8 *cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL); |
f5fc0f86 | 123 | |
f5fc0f86 | 124 | if (!cmd) { |
e5d3625e LC |
125 | dev_err(child->parent, |
126 | "could not allocate cmd for spi init\n"); | |
f5fc0f86 LC |
127 | return; |
128 | } | |
129 | ||
f5fc0f86 LC |
130 | memset(&t, 0, sizeof(t)); |
131 | spi_message_init(&m); | |
132 | ||
133 | /* | |
134 | * Set WSPI_INIT_COMMAND | |
135 | * the data is being send from the MSB to LSB | |
136 | */ | |
e757201b GS |
137 | cmd[0] = 0xff; |
138 | cmd[1] = 0xff; | |
139 | cmd[2] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX; | |
140 | cmd[3] = 0; | |
141 | cmd[4] = 0; | |
142 | cmd[5] = HW_ACCESS_WSPI_INIT_CMD_MASK << 3; | |
143 | cmd[5] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN; | |
144 | ||
145 | cmd[6] = WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS | |
146 | | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS; | |
f5fc0f86 LC |
147 | |
148 | if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0) | |
e757201b | 149 | cmd[6] |= WSPI_INIT_CMD_DIS_FIXEDBUSY; |
f5fc0f86 | 150 | else |
e757201b | 151 | cmd[6] |= WSPI_INIT_CMD_EN_FIXEDBUSY; |
f5fc0f86 | 152 | |
e757201b GS |
153 | cmd[7] = crc7_be(0, cmd+2, WSPI_INIT_CMD_CRC_LEN) | WSPI_INIT_CMD_END; |
154 | /* | |
155 | * The above is the logical order; it must actually be stored | |
156 | * in the buffer byte-swapped. | |
157 | */ | |
158 | __swab32s((u32 *)cmd); | |
159 | __swab32s((u32 *)cmd+1); | |
f5fc0f86 LC |
160 | |
161 | t.tx_buf = cmd; | |
162 | t.len = WSPI_INIT_CMD_LEN; | |
163 | spi_message_add_tail(&t, &m); | |
164 | ||
b65019f6 | 165 | spi_sync(to_spi_device(glue->dev), &m); |
bb123611 | 166 | kfree(cmd); |
f5fc0f86 LC |
167 | } |
168 | ||
545f1da8 JO |
169 | #define WL1271_BUSY_WORD_TIMEOUT 1000 |
170 | ||
a390e85c | 171 | static int wl12xx_spi_read_busy(struct device *child) |
545f1da8 | 172 | { |
a390e85c FB |
173 | struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); |
174 | struct wl1271 *wl = dev_get_drvdata(child); | |
545f1da8 JO |
175 | struct spi_transfer t[1]; |
176 | struct spi_message m; | |
177 | u32 *busy_buf; | |
178 | int num_busy_bytes = 0; | |
179 | ||
545f1da8 JO |
180 | /* |
181 | * Read further busy words from SPI until a non-busy word is | |
182 | * encountered, then read the data itself into the buffer. | |
183 | */ | |
545f1da8 JO |
184 | |
185 | num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT; | |
186 | busy_buf = wl->buffer_busyword; | |
187 | while (num_busy_bytes) { | |
188 | num_busy_bytes--; | |
189 | spi_message_init(&m); | |
190 | memset(t, 0, sizeof(t)); | |
191 | t[0].rx_buf = busy_buf; | |
192 | t[0].len = sizeof(u32); | |
259da430 | 193 | t[0].cs_change = true; |
545f1da8 | 194 | spi_message_add_tail(&t[0], &m); |
b65019f6 | 195 | spi_sync(to_spi_device(glue->dev), &m); |
545f1da8 | 196 | |
259da430 JO |
197 | if (*busy_buf & 0x1) |
198 | return 0; | |
545f1da8 JO |
199 | } |
200 | ||
201 | /* The SPI bus is unresponsive, the read failed. */ | |
e5d3625e | 202 | dev_err(child->parent, "SPI read busy-word timeout!\n"); |
259da430 | 203 | return -ETIMEDOUT; |
545f1da8 JO |
204 | } |
205 | ||
f1a26e63 IY |
206 | static int __must_check wl12xx_spi_raw_read(struct device *child, int addr, |
207 | void *buf, size_t len, bool fixed) | |
f5fc0f86 | 208 | { |
a390e85c FB |
209 | struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); |
210 | struct wl1271 *wl = dev_get_drvdata(child); | |
5c57a901 | 211 | struct spi_transfer t[2]; |
f5fc0f86 | 212 | struct spi_message m; |
545f1da8 | 213 | u32 *busy_buf; |
f5fc0f86 | 214 | u32 *cmd; |
5c57a901 | 215 | u32 chunk_len; |
f5fc0f86 | 216 | |
5c57a901 | 217 | while (len > 0) { |
c8e49556 | 218 | chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len); |
f5fc0f86 | 219 | |
5c57a901 IY |
220 | cmd = &wl->buffer_cmd; |
221 | busy_buf = wl->buffer_busyword; | |
f5fc0f86 | 222 | |
5c57a901 IY |
223 | *cmd = 0; |
224 | *cmd |= WSPI_CMD_READ; | |
225 | *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) & | |
226 | WSPI_CMD_BYTE_LENGTH; | |
227 | *cmd |= addr & WSPI_CMD_BYTE_ADDR; | |
f5fc0f86 | 228 | |
5c57a901 IY |
229 | if (fixed) |
230 | *cmd |= WSPI_CMD_FIXED; | |
f5fc0f86 | 231 | |
5c57a901 IY |
232 | spi_message_init(&m); |
233 | memset(t, 0, sizeof(t)); | |
f5fc0f86 | 234 | |
5c57a901 IY |
235 | t[0].tx_buf = cmd; |
236 | t[0].len = 4; | |
237 | t[0].cs_change = true; | |
238 | spi_message_add_tail(&t[0], &m); | |
f5fc0f86 | 239 | |
5c57a901 IY |
240 | /* Busy and non busy words read */ |
241 | t[1].rx_buf = busy_buf; | |
242 | t[1].len = WL1271_BUSY_WORD_LEN; | |
243 | t[1].cs_change = true; | |
244 | spi_message_add_tail(&t[1], &m); | |
f5fc0f86 | 245 | |
b65019f6 | 246 | spi_sync(to_spi_device(glue->dev), &m); |
259da430 | 247 | |
5c57a901 | 248 | if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) && |
a390e85c | 249 | wl12xx_spi_read_busy(child)) { |
5c57a901 | 250 | memset(buf, 0, chunk_len); |
02eb1d9d | 251 | return 0; |
5c57a901 | 252 | } |
259da430 | 253 | |
5c57a901 IY |
254 | spi_message_init(&m); |
255 | memset(t, 0, sizeof(t)); | |
259da430 | 256 | |
5c57a901 IY |
257 | t[0].rx_buf = buf; |
258 | t[0].len = chunk_len; | |
259 | t[0].cs_change = true; | |
260 | spi_message_add_tail(&t[0], &m); | |
261 | ||
b65019f6 | 262 | spi_sync(to_spi_device(glue->dev), &m); |
f5fc0f86 | 263 | |
5c57a901 IY |
264 | if (!fixed) |
265 | addr += chunk_len; | |
266 | buf += chunk_len; | |
267 | len -= chunk_len; | |
268 | } | |
02eb1d9d IY |
269 | |
270 | return 0; | |
f5fc0f86 LC |
271 | } |
272 | ||
f1a26e63 IY |
273 | static int __must_check wl12xx_spi_raw_write(struct device *child, int addr, |
274 | void *buf, size_t len, bool fixed) | |
f5fc0f86 | 275 | { |
a390e85c | 276 | struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); |
9b2761cb UM |
277 | /* SPI write buffers - 2 for each chunk */ |
278 | struct spi_transfer t[2 * WSPI_MAX_NUM_OF_CHUNKS]; | |
f5fc0f86 | 279 | struct spi_message m; |
9b2761cb | 280 | u32 commands[WSPI_MAX_NUM_OF_CHUNKS]; /* 1 command per chunk */ |
f5fc0f86 | 281 | u32 *cmd; |
5c57a901 IY |
282 | u32 chunk_len; |
283 | int i; | |
f5fc0f86 | 284 | |
61932ba5 | 285 | WARN_ON(len > SPI_AGGR_BUFFER_SIZE); |
f5fc0f86 LC |
286 | |
287 | spi_message_init(&m); | |
288 | memset(t, 0, sizeof(t)); | |
289 | ||
5c57a901 IY |
290 | cmd = &commands[0]; |
291 | i = 0; | |
292 | while (len > 0) { | |
c8e49556 | 293 | chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len); |
f5fc0f86 | 294 | |
5c57a901 IY |
295 | *cmd = 0; |
296 | *cmd |= WSPI_CMD_WRITE; | |
297 | *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) & | |
298 | WSPI_CMD_BYTE_LENGTH; | |
299 | *cmd |= addr & WSPI_CMD_BYTE_ADDR; | |
f5fc0f86 | 300 | |
5c57a901 IY |
301 | if (fixed) |
302 | *cmd |= WSPI_CMD_FIXED; | |
303 | ||
304 | t[i].tx_buf = cmd; | |
305 | t[i].len = sizeof(*cmd); | |
306 | spi_message_add_tail(&t[i++], &m); | |
307 | ||
308 | t[i].tx_buf = buf; | |
309 | t[i].len = chunk_len; | |
310 | spi_message_add_tail(&t[i++], &m); | |
f5fc0f86 | 311 | |
5c57a901 IY |
312 | if (!fixed) |
313 | addr += chunk_len; | |
314 | buf += chunk_len; | |
315 | len -= chunk_len; | |
316 | cmd++; | |
317 | } | |
318 | ||
b65019f6 | 319 | spi_sync(to_spi_device(glue->dev), &m); |
02eb1d9d IY |
320 | |
321 | return 0; | |
f5fc0f86 | 322 | } |
2d5e82b8 | 323 | |
4c1ce07b UM |
324 | /** |
325 | * wl12xx_spi_set_power - power on/off the wl12xx unit | |
326 | * @child: wl12xx device handle. | |
327 | * @enable: true/false to power on/off the unit. | |
328 | * | |
329 | * use the WiFi enable regulator to enable/disable the WiFi unit. | |
330 | */ | |
331 | static int wl12xx_spi_set_power(struct device *child, bool enable) | |
332 | { | |
333 | int ret = 0; | |
334 | struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent); | |
335 | ||
336 | WARN_ON(!glue->reg); | |
337 | ||
338 | /* Update regulator state */ | |
339 | if (enable) { | |
340 | ret = regulator_enable(glue->reg); | |
341 | if (ret) | |
342 | dev_err(child, "Power enable failure\n"); | |
343 | } else { | |
344 | ret = regulator_disable(glue->reg); | |
345 | if (ret) | |
346 | dev_err(child, "Power disable failure\n"); | |
347 | } | |
348 | ||
349 | return ret; | |
350 | } | |
351 | ||
8197b711 | 352 | static struct wl1271_if_operations spi_ops = { |
a390e85c FB |
353 | .read = wl12xx_spi_raw_read, |
354 | .write = wl12xx_spi_raw_write, | |
355 | .reset = wl12xx_spi_reset, | |
356 | .init = wl12xx_spi_init, | |
4c1ce07b | 357 | .power = wl12xx_spi_set_power, |
a81159ed | 358 | .set_block_size = NULL, |
8197b711 TP |
359 | }; |
360 | ||
04654c38 UM |
361 | static const struct of_device_id wlcore_spi_of_match_table[] = { |
362 | { .compatible = "ti,wl1271" }, | |
363 | { } | |
364 | }; | |
365 | MODULE_DEVICE_TABLE(of, wlcore_spi_of_match_table); | |
366 | ||
367 | /** | |
368 | * wlcore_probe_of - DT node parsing. | |
369 | * @spi: SPI slave device parameters. | |
370 | * @res: resource parameters. | |
371 | * @glue: wl12xx SPI bus to slave device glue parameters. | |
372 | * @pdev_data: wlcore device parameters | |
373 | */ | |
374 | static int wlcore_probe_of(struct spi_device *spi, struct wl12xx_spi_glue *glue, | |
375 | struct wlcore_platdev_data *pdev_data) | |
376 | { | |
377 | struct device_node *dt_node = spi->dev.of_node; | |
378 | int ret; | |
379 | ||
380 | if (of_find_property(dt_node, "clock-xtal", NULL)) | |
381 | pdev_data->ref_clock_xtal = true; | |
382 | ||
383 | ret = of_property_read_u32(dt_node, "ref-clock-frequency", | |
384 | &pdev_data->ref_clock_freq); | |
287980e4 | 385 | if (ret) { |
04654c38 UM |
386 | dev_err(glue->dev, |
387 | "can't get reference clock frequency (%d)\n", ret); | |
388 | return ret; | |
389 | } | |
390 | ||
391 | return 0; | |
392 | } | |
393 | ||
b74324d1 | 394 | static int wl1271_probe(struct spi_device *spi) |
2d5e82b8 | 395 | { |
b65019f6 | 396 | struct wl12xx_spi_glue *glue; |
4c104162 | 397 | struct wlcore_platdev_data pdev_data; |
0969d679 | 398 | struct resource res[1]; |
372e3a84 | 399 | int ret; |
2d5e82b8 | 400 | |
4c104162 | 401 | memset(&pdev_data, 0x00, sizeof(pdev_data)); |
afb43e6d | 402 | |
4c104162 | 403 | pdev_data.if_ops = &spi_ops; |
a390e85c | 404 | |
372e3a84 | 405 | glue = devm_kzalloc(&spi->dev, sizeof(*glue), GFP_KERNEL); |
b65019f6 | 406 | if (!glue) { |
e5d3625e | 407 | dev_err(&spi->dev, "can't allocate glue\n"); |
372e3a84 | 408 | return -ENOMEM; |
b65019f6 FB |
409 | } |
410 | ||
b65019f6 | 411 | glue->dev = &spi->dev; |
b65019f6 FB |
412 | |
413 | spi_set_drvdata(spi, glue); | |
2d5e82b8 TP |
414 | |
415 | /* This is the only SPI value that we need to set here, the rest | |
416 | * comes from the board-peripherals file */ | |
417 | spi->bits_per_word = 32; | |
418 | ||
4c1ce07b UM |
419 | glue->reg = devm_regulator_get(&spi->dev, "vwlan"); |
420 | if (PTR_ERR(glue->reg) == -EPROBE_DEFER) | |
421 | return -EPROBE_DEFER; | |
422 | if (IS_ERR(glue->reg)) { | |
423 | dev_err(glue->dev, "can't get regulator\n"); | |
424 | return PTR_ERR(glue->reg); | |
425 | } | |
426 | ||
04654c38 | 427 | ret = wlcore_probe_of(spi, glue, &pdev_data); |
287980e4 | 428 | if (ret) { |
04654c38 UM |
429 | dev_err(glue->dev, |
430 | "can't get device tree parameters (%d)\n", ret); | |
431 | return ret; | |
432 | } | |
433 | ||
2d5e82b8 TP |
434 | ret = spi_setup(spi); |
435 | if (ret < 0) { | |
e5d3625e | 436 | dev_err(glue->dev, "spi_setup failed\n"); |
372e3a84 | 437 | return ret; |
2d5e82b8 TP |
438 | } |
439 | ||
06ab4058 | 440 | glue->core = platform_device_alloc("wl12xx", PLATFORM_DEVID_AUTO); |
0969d679 | 441 | if (!glue->core) { |
e5d3625e | 442 | dev_err(glue->dev, "can't allocate platform_device\n"); |
372e3a84 | 443 | return -ENOMEM; |
0969d679 FB |
444 | } |
445 | ||
446 | glue->core->dev.parent = &spi->dev; | |
447 | ||
448 | memset(res, 0x00, sizeof(res)); | |
449 | ||
450 | res[0].start = spi->irq; | |
04654c38 | 451 | res[0].flags = IORESOURCE_IRQ | irq_get_trigger_type(spi->irq); |
0969d679 FB |
452 | res[0].name = "irq"; |
453 | ||
454 | ret = platform_device_add_resources(glue->core, res, ARRAY_SIZE(res)); | |
455 | if (ret) { | |
e5d3625e | 456 | dev_err(glue->dev, "can't add resources\n"); |
0969d679 FB |
457 | goto out_dev_put; |
458 | } | |
459 | ||
4c104162 CE |
460 | ret = platform_device_add_data(glue->core, &pdev_data, |
461 | sizeof(pdev_data)); | |
0969d679 | 462 | if (ret) { |
e5d3625e | 463 | dev_err(glue->dev, "can't add platform data\n"); |
0969d679 FB |
464 | goto out_dev_put; |
465 | } | |
466 | ||
467 | ret = platform_device_add(glue->core); | |
468 | if (ret) { | |
e5d3625e | 469 | dev_err(glue->dev, "can't register platform device\n"); |
0969d679 FB |
470 | goto out_dev_put; |
471 | } | |
472 | ||
2d5e82b8 TP |
473 | return 0; |
474 | ||
0969d679 FB |
475 | out_dev_put: |
476 | platform_device_put(glue->core); | |
2d5e82b8 TP |
477 | return ret; |
478 | } | |
479 | ||
b74324d1 | 480 | static int wl1271_remove(struct spi_device *spi) |
2d5e82b8 | 481 | { |
b65019f6 | 482 | struct wl12xx_spi_glue *glue = spi_get_drvdata(spi); |
2d5e82b8 | 483 | |
ca6dc103 | 484 | platform_device_unregister(glue->core); |
2d5e82b8 TP |
485 | |
486 | return 0; | |
487 | } | |
488 | ||
2d5e82b8 TP |
489 | static struct spi_driver wl1271_spi_driver = { |
490 | .driver = { | |
7fdd50d0 | 491 | .name = "wl1271_spi", |
04654c38 | 492 | .of_match_table = of_match_ptr(wlcore_spi_of_match_table), |
2d5e82b8 TP |
493 | }, |
494 | ||
495 | .probe = wl1271_probe, | |
b74324d1 | 496 | .remove = wl1271_remove, |
2d5e82b8 TP |
497 | }; |
498 | ||
d5a49178 | 499 | module_spi_driver(wl1271_spi_driver); |
2d5e82b8 | 500 | MODULE_LICENSE("GPL"); |
5245e3a9 | 501 | MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>"); |
2d5e82b8 | 502 | MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>"); |
f148cfdd | 503 | MODULE_ALIAS("spi:wl1271"); |