[mirror_ubuntu-artful-kernel.git] / drivers / net / wireless / wl12xx / wl1271.h

/*
 * This file is part of wl1271
 *
 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
 * Copyright (C) 2008-2009 Nokia Corporation
 *
 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#ifndef __WL1271_H__
#define __WL1271_H__

#include <linux/mutex.h>
#include <linux/completion.h>
#include <linux/spinlock.h>
#include <linux/list.h>
#include <linux/bitops.h>
#include <net/mac80211.h>

#include "wl1271_conf.h"

#define DRIVER_NAME "wl1271"
#define DRIVER_PREFIX DRIVER_NAME ": "

enum {
	DEBUG_NONE	= 0,
	DEBUG_IRQ	= BIT(0),
	DEBUG_SPI	= BIT(1),
	DEBUG_BOOT	= BIT(2),
	DEBUG_MAILBOX	= BIT(3),
	DEBUG_TESTMODE	= BIT(4),
	DEBUG_EVENT	= BIT(5),
	DEBUG_TX	= BIT(6),
	DEBUG_RX	= BIT(7),
	DEBUG_SCAN	= BIT(8),
	DEBUG_CRYPT	= BIT(9),
	DEBUG_PSM	= BIT(10),
	DEBUG_MAC80211	= BIT(11),
	DEBUG_CMD	= BIT(12),
	DEBUG_ACX	= BIT(13),
	DEBUG_SDIO	= BIT(14),
	DEBUG_FILTERS   = BIT(15),
	DEBUG_ADHOC     = BIT(16),
	DEBUG_ALL	= ~0,
};

#define DEBUG_LEVEL (DEBUG_NONE)

#define DEBUG_DUMP_LIMIT 1024

#define wl1271_error(fmt, arg...) \
	printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)

#define wl1271_warning(fmt, arg...) \
	printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)

#define wl1271_notice(fmt, arg...) \
	printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)

#define wl1271_info(fmt, arg...) \
	printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)

#define wl1271_debug(level, fmt, arg...) \
	do { \
		if (level & DEBUG_LEVEL) \
			printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
	} while (0)

#define wl1271_dump(level, prefix, buf, len)	\
	do { \
		if (level & DEBUG_LEVEL) \
			print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
				       DUMP_PREFIX_OFFSET, 16, 1,	\
				       buf,				\
				       min_t(size_t, len, DEBUG_DUMP_LIMIT), \
				       0);				\
	} while (0)

#define wl1271_dump_ascii(level, prefix, buf, len)	\
	do { \
		if (level & DEBUG_LEVEL) \
			print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
				       DUMP_PREFIX_OFFSET, 16, 1,	\
				       buf,				\
				       min_t(size_t, len, DEBUG_DUMP_LIMIT), \
				       true);				\
	} while (0)

#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN |	\
				  CFG_BSSID_FILTER_EN | \
				  CFG_MC_FILTER_EN)

#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN |  \
				  CFG_RX_MGMT_EN | CFG_RX_DATA_EN |   \
				  CFG_RX_CTL_EN | CFG_RX_BCN_EN |     \
				  CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)

#define WL1271_FW_NAME "wl1271-fw.bin"
#define WL1271_NVS_NAME "wl1271-nvs.bin"

#define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
#define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))

/* NVS data structure */
#define WL1271_NVS_SECTION_SIZE                  468

#define WL1271_NVS_GENERAL_PARAMS_SIZE            57
#define WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED \
	(WL1271_NVS_GENERAL_PARAMS_SIZE + 1)
#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE         17
#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED \
	(WL1271_NVS_STAT_RADIO_PARAMS_SIZE + 1)
#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE          65
#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED \
	(WL1271_NVS_DYN_RADIO_PARAMS_SIZE + 1)
#define WL1271_NVS_FEM_COUNT                       2
#define WL1271_NVS_INI_SPARE_SIZE                124

struct wl1271_nvs_file {
	/* NVS section */
	u8 nvs[WL1271_NVS_SECTION_SIZE];

	/* INI section */
	u8 general_params[WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED];
	u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED];
	u8 dyn_radio_params[WL1271_NVS_FEM_COUNT]
			   [WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED];
	u8 ini_spare[WL1271_NVS_INI_SPARE_SIZE];
} __attribute__ ((packed));

/*
 * Enable/disable 802.11a support for WL1273
 */
#undef WL1271_80211A_ENABLED

#define WL1271_BUSY_WORD_CNT 1
#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))

#define WL1271_ELP_HW_STATE_ASLEEP 0
#define WL1271_ELP_HW_STATE_IRQ    1

#define WL1271_DEFAULT_BEACON_INT  100
#define WL1271_DEFAULT_DTIM_PERIOD 1

#define ACX_TX_DESCRIPTORS         32

enum wl1271_state {
	WL1271_STATE_OFF,
	WL1271_STATE_ON,
	WL1271_STATE_PLT,
};

enum wl1271_partition_type {
	PART_DOWN,
	PART_WORK,
	PART_DRPW,

	PART_TABLE_LEN
};

struct wl1271_partition {
	u32 size;
	u32 start;
};

struct wl1271_partition_set {
	struct wl1271_partition mem;
	struct wl1271_partition reg;
	struct wl1271_partition mem2;
	struct wl1271_partition mem3;
};

struct wl1271;

/* FIXME: I'm not sure about this structure name */
struct wl1271_chip {
	u32 id;
	char fw_ver[21];
};

struct wl1271_stats {
	struct acx_statistics *fw_stats;
	unsigned long fw_stats_update;

	unsigned int retry_count;
	unsigned int excessive_retries;
};

struct wl1271_debugfs {
	struct dentry *rootdir;
	struct dentry *fw_statistics;

	struct dentry *tx_internal_desc_overflow;

	struct dentry *rx_out_of_mem;
	struct dentry *rx_hdr_overflow;
	struct dentry *rx_hw_stuck;
	struct dentry *rx_dropped;
	struct dentry *rx_fcs_err;
	struct dentry *rx_xfr_hint_trig;
	struct dentry *rx_path_reset;
	struct dentry *rx_reset_counter;

	struct dentry *dma_rx_requested;
	struct dentry *dma_rx_errors;
	struct dentry *dma_tx_requested;
	struct dentry *dma_tx_errors;

	struct dentry *isr_cmd_cmplt;
	struct dentry *isr_fiqs;
	struct dentry *isr_rx_headers;
	struct dentry *isr_rx_mem_overflow;
	struct dentry *isr_rx_rdys;
	struct dentry *isr_irqs;
	struct dentry *isr_tx_procs;
	struct dentry *isr_decrypt_done;
	struct dentry *isr_dma0_done;
	struct dentry *isr_dma1_done;
	struct dentry *isr_tx_exch_complete;
	struct dentry *isr_commands;
	struct dentry *isr_rx_procs;
	struct dentry *isr_hw_pm_mode_changes;
	struct dentry *isr_host_acknowledges;
	struct dentry *isr_pci_pm;
	struct dentry *isr_wakeups;
	struct dentry *isr_low_rssi;

	struct dentry *wep_addr_key_count;
	struct dentry *wep_default_key_count;
	/* skipping wep.reserved */
	struct dentry *wep_key_not_found;
	struct dentry *wep_decrypt_fail;
	struct dentry *wep_packets;
	struct dentry *wep_interrupt;

	struct dentry *pwr_ps_enter;
	struct dentry *pwr_elp_enter;
	struct dentry *pwr_missing_bcns;
	struct dentry *pwr_wake_on_host;
	struct dentry *pwr_wake_on_timer_exp;
	struct dentry *pwr_tx_with_ps;
	struct dentry *pwr_tx_without_ps;
	struct dentry *pwr_rcvd_beacons;
	struct dentry *pwr_power_save_off;
	struct dentry *pwr_enable_ps;
	struct dentry *pwr_disable_ps;
	struct dentry *pwr_fix_tsf_ps;
	/* skipping cont_miss_bcns_spread for now */
	struct dentry *pwr_rcvd_awake_beacons;

	struct dentry *mic_rx_pkts;
	struct dentry *mic_calc_failure;

	struct dentry *aes_encrypt_fail;
	struct dentry *aes_decrypt_fail;
	struct dentry *aes_encrypt_packets;
	struct dentry *aes_decrypt_packets;
	struct dentry *aes_encrypt_interrupt;
	struct dentry *aes_decrypt_interrupt;

	struct dentry *event_heart_beat;
	struct dentry *event_calibration;
	struct dentry *event_rx_mismatch;
	struct dentry *event_rx_mem_empty;
	struct dentry *event_rx_pool;
	struct dentry *event_oom_late;
	struct dentry *event_phy_transmit_error;
	struct dentry *event_tx_stuck;

	struct dentry *ps_pspoll_timeouts;
	struct dentry *ps_upsd_timeouts;
	struct dentry *ps_upsd_max_sptime;
	struct dentry *ps_upsd_max_apturn;
	struct dentry *ps_pspoll_max_apturn;
	struct dentry *ps_pspoll_utilization;
	struct dentry *ps_upsd_utilization;

	struct dentry *rxpipe_rx_prep_beacon_drop;
	struct dentry *rxpipe_descr_host_int_trig_rx_data;
	struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
	struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
	struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;

	struct dentry *tx_queue_len;

	struct dentry *retry_count;
	struct dentry *excessive_retries;
	struct dentry *gpio_power;
};

#define NUM_TX_QUEUES              4
#define NUM_RX_PKT_DESC            8

/* FW status registers */
struct wl1271_fw_status {
	__le32 intr;
	u8  fw_rx_counter;
	u8  drv_rx_counter;
	u8  reserved;
	u8  tx_results_counter;
	__le32 rx_pkt_descs[NUM_RX_PKT_DESC];
	__le32 tx_released_blks[NUM_TX_QUEUES];
	__le32 fw_localtime;
	__le32 padding[2];
} __attribute__ ((packed));

struct wl1271_rx_mem_pool_addr {
	u32 addr;
	u32 addr_extra;
};

struct wl1271_scan {
	u8 state;
	u8 ssid[IW_ESSID_MAX_SIZE+1];
	size_t ssid_len;
	u8 active;
	u8 high_prio;
	u8 probe_requests;
};

struct wl1271_if_operations {
	void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
		     bool fixed);
	void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
		     bool fixed);
	void (*reset)(struct wl1271 *wl);
	void (*init)(struct wl1271 *wl);
	void (*power)(struct wl1271 *wl, bool enable);
	struct device* (*dev)(struct wl1271 *wl);
	void (*enable_irq)(struct wl1271 *wl);
	void (*disable_irq)(struct wl1271 *wl);
};

struct wl1271 {
	struct platform_device *plat_dev;
	struct ieee80211_hw *hw;
	bool mac80211_registered;

	void *if_priv;

	struct wl1271_if_operations *if_ops;

	void (*set_power)(bool enable);
	int irq;

	spinlock_t wl_lock;

	enum wl1271_state state;
	struct mutex mutex;

#define WL1271_FLAG_STA_RATES_CHANGED  (0)
#define WL1271_FLAG_STA_ASSOCIATED     (1)
#define WL1271_FLAG_JOINED             (2)
#define WL1271_FLAG_GPIO_POWER         (3)
#define WL1271_FLAG_TX_QUEUE_STOPPED   (4)
#define WL1271_FLAG_SCANNING           (5)
#define WL1271_FLAG_IN_ELP             (6)
#define WL1271_FLAG_PSM                (7)
#define WL1271_FLAG_PSM_REQUESTED      (8)
#define WL1271_FLAG_IRQ_PENDING        (9)
#define WL1271_FLAG_IRQ_RUNNING       (10)
#define WL1271_FLAG_IDLE              (11)
	unsigned long flags;

	struct wl1271_partition_set part;

	struct wl1271_chip chip;

	int cmd_box_addr;
	int event_box_addr;

	u8 *fw;
	size_t fw_len;
	struct wl1271_nvs_file *nvs;

	s8 hw_pg_ver;

	u8 bssid[ETH_ALEN];
	u8 mac_addr[ETH_ALEN];
	u8 bss_type;
	u8 set_bss_type;
	u8 ssid[IW_ESSID_MAX_SIZE + 1];
	u8 ssid_len;
	int channel;

	struct wl1271_acx_mem_map *target_mem_map;

	/* Accounting for allocated / available TX blocks on HW */
	u32 tx_blocks_freed[NUM_TX_QUEUES];
	u32 tx_blocks_available;
	u32 tx_results_count;

	/* Transmitted TX packets counter for chipset interface */
	u32 tx_packets_count;

	/* Time-offset between host and chipset clocks */
	s64 time_offset;

	/* Session counter for the chipset */
	int session_counter;

	/* Frames scheduled for transmission, not handled yet */
	struct sk_buff_head tx_queue;

	struct work_struct tx_work;

	/* Pending TX frames */
	struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];

	/* Security sequence number counters */
	u8 tx_security_last_seq;
	s64 tx_security_seq;

	/* FW Rx counter */
	u32 rx_counter;

	/* Rx memory pool address */
	struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;

	/* The target interrupt mask */
	struct work_struct irq_work;

	/* The mbox event mask */
	u32 event_mask;

	/* Mailbox pointers */
	u32 mbox_ptr[2];

	/* Are we currently scanning */
	struct wl1271_scan scan;

	/* Our association ID */
	u16 aid;

	/* currently configured rate set */
	u32 sta_rate_set;
	u32 basic_rate_set;
	u32 basic_rate;
	u32 rate_set;

	/* The current band */
	enum ieee80211_band band;

	/* Beaconing interval (needed for ad-hoc) */
	u32 beacon_int;

	/* Default key (for WEP) */
	u32 default_key;

	unsigned int filters;
	unsigned int rx_config;
	unsigned int rx_filter;

	struct completion *elp_compl;
	struct delayed_work elp_work;

	/* retry counter for PSM entries */
	u8 psm_entry_retry;

	/* in dBm */
	int power_level;

	int rssi_thold;
	int last_rssi_event;

	struct wl1271_stats stats;
	struct wl1271_debugfs debugfs;

	__le32 buffer_32;
	u32 buffer_cmd;
	u32 buffer_busyword[WL1271_BUSY_WORD_CNT];

	struct wl1271_fw_status *fw_status;
	struct wl1271_tx_hw_res_if *tx_res_if;

	struct ieee80211_vif *vif;

	/* Current chipset configuration */
	struct conf_drv_settings conf;

	bool sg_enabled;

	struct list_head list;
};

int wl1271_plt_start(struct wl1271 *wl);
int wl1271_plt_stop(struct wl1271 *wl);

#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */

#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */

#define WL1271_DEFAULT_POWER_LEVEL 0

#define WL1271_TX_QUEUE_LOW_WATERMARK  10
#define WL1271_TX_QUEUE_HIGH_WATERMARK 25

/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
   on in case is has been shut down shortly before */
#define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */

static inline bool wl1271_11a_enabled(void)
{
	/* FIXME: this could be determined based on the NVS-INI file */
#ifdef WL1271_80211A_ENABLED
	return true;
#else
	return false;
#endif
}

#endif
Commit	Line	Data
f5fc0f86 LC	1	/*
	2	* This file is part of wl1271
	3	*
	4	* Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
	5	* Copyright (C) 2008-2009 Nokia Corporation
	6	*
	7	* Contact: Luciano Coelho <luciano.coelho@nokia.com>
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License
	11	* version 2 as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful, but
	14	* WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	16	* General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	21	* 02110-1301 USA
	22	*
	23	*/
	24
	25	#ifndef __WL1271_H__
	26	#define __WL1271_H__
	27
	28	#include <linux/mutex.h>
	29	#include <linux/completion.h>
	30	#include <linux/spinlock.h>
	31	#include <linux/list.h>
	32	#include <linux/bitops.h>
	33	#include <net/mac80211.h>
	34
2b60100b JO	35	#include "wl1271_conf.h"
2b60100b JO	36
f5fc0f86 LC	37	#define DRIVER_NAME "wl1271"
	38	#define DRIVER_PREFIX DRIVER_NAME ": "
	39
	40	enum {
	41	DEBUG_NONE = 0,
	42	DEBUG_IRQ = BIT(0),
	43	DEBUG_SPI = BIT(1),
	44	DEBUG_BOOT = BIT(2),
	45	DEBUG_MAILBOX = BIT(3),
c8c90873	46	DEBUG_TESTMODE = BIT(4),
f5fc0f86 LC	47	DEBUG_EVENT = BIT(5),
	48	DEBUG_TX = BIT(6),
	49	DEBUG_RX = BIT(7),
	50	DEBUG_SCAN = BIT(8),
	51	DEBUG_CRYPT = BIT(9),
	52	DEBUG_PSM = BIT(10),
	53	DEBUG_MAC80211 = BIT(11),
	54	DEBUG_CMD = BIT(12),
	55	DEBUG_ACX = BIT(13),
a3b8ea75	56	DEBUG_SDIO = BIT(14),
14b228a0	57	DEBUG_FILTERS = BIT(15),
5da11dcd	58	DEBUG_ADHOC = BIT(16),
f5fc0f86 LC	59	DEBUG_ALL = ~0,
	60	};
	61
	62	#define DEBUG_LEVEL (DEBUG_NONE)
	63
	64	#define DEBUG_DUMP_LIMIT 1024
	65
	66	#define wl1271_error(fmt, arg...) \
	67	printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
	68
	69	#define wl1271_warning(fmt, arg...) \
	70	printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
	71
	72	#define wl1271_notice(fmt, arg...) \
	73	printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
	74
	75	#define wl1271_info(fmt, arg...) \
	76	printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
	77
	78	#define wl1271_debug(level, fmt, arg...) \
	79	do { \
	80	if (level & DEBUG_LEVEL) \
	81	printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
	82	} while (0)
	83
	84	#define wl1271_dump(level, prefix, buf, len) \
	85	do { \
	86	if (level & DEBUG_LEVEL) \
	87	print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
	88	DUMP_PREFIX_OFFSET, 16, 1, \
	89	buf, \
	90	min_t(size_t, len, DEBUG_DUMP_LIMIT), \
	91	0); \
	92	} while (0)
	93
	94	#define wl1271_dump_ascii(level, prefix, buf, len) \
	95	do { \
	96	if (level & DEBUG_LEVEL) \
	97	print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
	98	DUMP_PREFIX_OFFSET, 16, 1, \
	99	buf, \
	100	min_t(size_t, len, DEBUG_DUMP_LIMIT), \
	101	true); \
	102	} while (0)
	103
	104	#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN \| \
c87dec9f JO	105	CFG_BSSID_FILTER_EN \| \
c87dec9f JO	106	CFG_MC_FILTER_EN)
f5fc0f86 LC	107
	108	#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK \| CFG_RX_PRSP_EN \| \
	109	CFG_RX_MGMT_EN \| CFG_RX_DATA_EN \| \
	110	CFG_RX_CTL_EN \| CFG_RX_BCN_EN \| \
	111	CFG_RX_AUTH_EN \| CFG_RX_ASSOC_EN)
	112
	113	#define WL1271_FW_NAME "wl1271-fw.bin"
	114	#define WL1271_NVS_NAME "wl1271-nvs.bin"
152ee6e0	115
04e36fc5 JO	116	#define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
	117	#define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
	118
152ee6e0 JO	119	/* NVS data structure */
	120	#define WL1271_NVS_SECTION_SIZE 468
	121
	122	#define WL1271_NVS_GENERAL_PARAMS_SIZE 57
	123	#define WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED \
	124	(WL1271_NVS_GENERAL_PARAMS_SIZE + 1)
	125	#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE 17
	126	#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED \
	127	(WL1271_NVS_STAT_RADIO_PARAMS_SIZE + 1)
	128	#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE 65
	129	#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED \
	130	(WL1271_NVS_DYN_RADIO_PARAMS_SIZE + 1)
	131	#define WL1271_NVS_FEM_COUNT 2
	132	#define WL1271_NVS_INI_SPARE_SIZE 124
	133
	134	struct wl1271_nvs_file {
	135	/* NVS section */
	136	u8 nvs[WL1271_NVS_SECTION_SIZE];
	137
	138	/* INI section */
	139	u8 general_params[WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED];
	140	u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED];
	141	u8 dyn_radio_params[WL1271_NVS_FEM_COUNT]
	142	[WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED];
	143	u8 ini_spare[WL1271_NVS_INI_SPARE_SIZE];
	144	} __attribute__ ((packed));
f5fc0f86	145
1ebec3d7 TP	146	/*
	147	* Enable/disable 802.11a support for WL1273
	148	*/
	149	#undef WL1271_80211A_ENABLED
	150
259da430	151	#define WL1271_BUSY_WORD_CNT 1
545f1da8	152	#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
f5fc0f86 LC	153
	154	#define WL1271_ELP_HW_STATE_ASLEEP 0
	155	#define WL1271_ELP_HW_STATE_IRQ 1
	156
d94cd297 JO	157	#define WL1271_DEFAULT_BEACON_INT 100
	158	#define WL1271_DEFAULT_DTIM_PERIOD 1
	159
c87dec9f	160	#define ACX_TX_DESCRIPTORS 32
be7078c2	161
f5fc0f86 LC	162	enum wl1271_state {
	163	WL1271_STATE_OFF,
	164	WL1271_STATE_ON,
	165	WL1271_STATE_PLT,
	166	};
	167
	168	enum wl1271_partition_type {
	169	PART_DOWN,
	170	PART_WORK,
	171	PART_DRPW,
	172
	173	PART_TABLE_LEN
	174	};
	175
	176	struct wl1271_partition {
	177	u32 size;
	178	u32 start;
	179	};
	180
	181	struct wl1271_partition_set {
	182	struct wl1271_partition mem;
	183	struct wl1271_partition reg;
451de97a JO	184	struct wl1271_partition mem2;
451de97a JO	185	struct wl1271_partition mem3;
f5fc0f86 LC	186	};
	187
	188	struct wl1271;
	189
	190	/* FIXME: I'm not sure about this structure name */
	191	struct wl1271_chip {
	192	u32 id;
	193	char fw_ver[21];
	194	};
	195
	196	struct wl1271_stats {
	197	struct acx_statistics *fw_stats;
	198	unsigned long fw_stats_update;
	199
	200	unsigned int retry_count;
	201	unsigned int excessive_retries;
	202	};
	203
	204	struct wl1271_debugfs {
	205	struct dentry *rootdir;
	206	struct dentry *fw_statistics;
	207
	208	struct dentry *tx_internal_desc_overflow;
	209
	210	struct dentry *rx_out_of_mem;
	211	struct dentry *rx_hdr_overflow;
	212	struct dentry *rx_hw_stuck;
	213	struct dentry *rx_dropped;
	214	struct dentry *rx_fcs_err;
	215	struct dentry *rx_xfr_hint_trig;
	216	struct dentry *rx_path_reset;
	217	struct dentry *rx_reset_counter;
	218
	219	struct dentry *dma_rx_requested;
	220	struct dentry *dma_rx_errors;
	221	struct dentry *dma_tx_requested;
	222	struct dentry *dma_tx_errors;
	223
	224	struct dentry *isr_cmd_cmplt;
	225	struct dentry *isr_fiqs;
	226	struct dentry *isr_rx_headers;
	227	struct dentry *isr_rx_mem_overflow;
	228	struct dentry *isr_rx_rdys;
	229	struct dentry *isr_irqs;
	230	struct dentry *isr_tx_procs;
	231	struct dentry *isr_decrypt_done;
	232	struct dentry *isr_dma0_done;
	233	struct dentry *isr_dma1_done;
	234	struct dentry *isr_tx_exch_complete;
	235	struct dentry *isr_commands;
	236	struct dentry *isr_rx_procs;
	237	struct dentry *isr_hw_pm_mode_changes;
	238	struct dentry *isr_host_acknowledges;
	239	struct dentry *isr_pci_pm;
	240	struct dentry *isr_wakeups;
	241	struct dentry *isr_low_rssi;
	242
	243	struct dentry *wep_addr_key_count;
	244	struct dentry *wep_default_key_count;
	245	/* skipping wep.reserved */
	246	struct dentry *wep_key_not_found;
	247	struct dentry *wep_decrypt_fail;
	248	struct dentry *wep_packets;
	249	struct dentry *wep_interrupt;
250
251	struct dentry *pwr_ps_enter;
252	struct dentry *pwr_elp_enter;
253	struct dentry *pwr_missing_bcns;
254	struct dentry *pwr_wake_on_host;
255	struct dentry *pwr_wake_on_timer_exp;
256	struct dentry *pwr_tx_with_ps;
257	struct dentry *pwr_tx_without_ps;
258	struct dentry *pwr_rcvd_beacons;
259	struct dentry *pwr_power_save_off;
260	struct dentry *pwr_enable_ps;
261	struct dentry *pwr_disable_ps;
262	struct dentry *pwr_fix_tsf_ps;
263	/* skipping cont_miss_bcns_spread for now */
264	struct dentry *pwr_rcvd_awake_beacons;
265
266	struct dentry *mic_rx_pkts;
267	struct dentry *mic_calc_failure;
268
269	struct dentry *aes_encrypt_fail;
270	struct dentry *aes_decrypt_fail;
271	struct dentry *aes_encrypt_packets;
272	struct dentry *aes_decrypt_packets;
273	struct dentry *aes_encrypt_interrupt;
274	struct dentry *aes_decrypt_interrupt;
275
276	struct dentry *event_heart_beat;
277	struct dentry *event_calibration;
278	struct dentry *event_rx_mismatch;
279	struct dentry *event_rx_mem_empty;
280	struct dentry *event_rx_pool;
281	struct dentry *event_oom_late;
282	struct dentry *event_phy_transmit_error;
283	struct dentry *event_tx_stuck;
284
285	struct dentry *ps_pspoll_timeouts;
286	struct dentry *ps_upsd_timeouts;
287	struct dentry *ps_upsd_max_sptime;
288	struct dentry *ps_upsd_max_apturn;
289	struct dentry *ps_pspoll_max_apturn;
290	struct dentry *ps_pspoll_utilization;
291	struct dentry *ps_upsd_utilization;
292
293	struct dentry *rxpipe_rx_prep_beacon_drop;
294	struct dentry *rxpipe_descr_host_int_trig_rx_data;
295	struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
296	struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
297	struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
298
299	struct dentry *tx_queue_len;
300
301	struct dentry *retry_count;
302	struct dentry *excessive_retries;
98b2a684	303	struct dentry *gpio_power;
f5fc0f86 LC	304	};
	305
	306	#define NUM_TX_QUEUES 4
	307	#define NUM_RX_PKT_DESC 8
	308
	309	/* FW status registers */
	310	struct wl1271_fw_status {
d0f63b20	311	__le32 intr;
f5fc0f86 LC	312	u8 fw_rx_counter;
	313	u8 drv_rx_counter;
	314	u8 reserved;
	315	u8 tx_results_counter;
d0f63b20 LC	316	__le32 rx_pkt_descs[NUM_RX_PKT_DESC];
	317	__le32 tx_released_blks[NUM_TX_QUEUES];
	318	__le32 fw_localtime;
	319	__le32 padding[2];
f5fc0f86 LC	320	} __attribute__ ((packed));
	321
	322	struct wl1271_rx_mem_pool_addr {
	323	u32 addr;
	324	u32 addr_extra;
	325	};
	326
abb0b3bf TP	327	struct wl1271_scan {
	328	u8 state;
	329	u8 ssid[IW_ESSID_MAX_SIZE+1];
	330	size_t ssid_len;
	331	u8 active;
	332	u8 high_prio;
	333	u8 probe_requests;
	334	};
	335
8197b711 TP	336	struct wl1271_if_operations {
	337	void (read)(struct wl1271 wl, int addr, void *buf, size_t len,
	338	bool fixed);
	339	void (write)(struct wl1271 wl, int addr, void *buf, size_t len,
	340	bool fixed);
	341	void (reset)(struct wl1271 wl);
	342	void (init)(struct wl1271 wl);
becd551c	343	void (power)(struct wl1271 wl, bool enable);
8197b711 TP	344	struct device* (dev)(struct wl1271 wl);
	345	void (enable_irq)(struct wl1271 wl);
	346	void (disable_irq)(struct wl1271 wl);
	347	};
	348
f5fc0f86	349	struct wl1271 {
3b56dd6a	350	struct platform_device *plat_dev;
f5fc0f86 LC	351	struct ieee80211_hw *hw;
	352	bool mac80211_registered;
	353
8197b711 TP	354	void *if_priv;
	355
	356	struct wl1271_if_operations *if_ops;
f5fc0f86 LC	357
	358	void (*set_power)(bool enable);
	359	int irq;
	360
	361	spinlock_t wl_lock;
	362
	363	enum wl1271_state state;
	364	struct mutex mutex;
	365
830fb67b JO	366	#define WL1271_FLAG_STA_RATES_CHANGED (0)
830fb67b JO	367	#define WL1271_FLAG_STA_ASSOCIATED (1)
71449f8d JO	368	#define WL1271_FLAG_JOINED (2)
	369	#define WL1271_FLAG_GPIO_POWER (3)
	370	#define WL1271_FLAG_TX_QUEUE_STOPPED (4)
	371	#define WL1271_FLAG_SCANNING (5)
	372	#define WL1271_FLAG_IN_ELP (6)
	373	#define WL1271_FLAG_PSM (7)
	374	#define WL1271_FLAG_PSM_REQUESTED (8)
1e73eb62 JO	375	#define WL1271_FLAG_IRQ_PENDING (9)
1e73eb62 JO	376	#define WL1271_FLAG_IRQ_RUNNING (10)
e1972818	377	#define WL1271_FLAG_IDLE (11)
830fb67b JO	378	unsigned long flags;
830fb67b JO	379
451de97a	380	struct wl1271_partition_set part;
f5fc0f86 LC	381
	382	struct wl1271_chip chip;
	383
	384	int cmd_box_addr;
	385	int event_box_addr;
	386
	387	u8 *fw;
	388	size_t fw_len;
152ee6e0	389	struct wl1271_nvs_file *nvs;
f5fc0f86	390
d717fd61 JO	391	s8 hw_pg_ver;
d717fd61 JO	392
f5fc0f86 LC	393	u8 bssid[ETH_ALEN];
	394	u8 mac_addr[ETH_ALEN];
	395	u8 bss_type;
5da11dcd	396	u8 set_bss_type;
f5fc0f86 LC	397	u8 ssid[IW_ESSID_MAX_SIZE + 1];
f5fc0f86 LC	398	u8 ssid_len;
f5fc0f86 LC	399	int channel;
	400
	401	struct wl1271_acx_mem_map *target_mem_map;
	402
	403	/* Accounting for allocated / available TX blocks on HW */
	404	u32 tx_blocks_freed[NUM_TX_QUEUES];
	405	u32 tx_blocks_available;
ffb591cd	406	u32 tx_results_count;
f5fc0f86 LC	407
f5fc0f86 LC	408	/* Transmitted TX packets counter for chipset interface */
ffb591cd	409	u32 tx_packets_count;
f5fc0f86 LC	410
f5fc0f86 LC	411	/* Time-offset between host and chipset clocks */
ac5e1e39	412	s64 time_offset;
f5fc0f86 LC	413
	414	/* Session counter for the chipset */
	415	int session_counter;
	416
	417	/* Frames scheduled for transmission, not handled yet */
	418	struct sk_buff_head tx_queue;
f5fc0f86 LC	419
f5fc0f86 LC	420	struct work_struct tx_work;
c87dec9f	421
f5fc0f86	422	/* Pending TX frames */
be7078c2	423	struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
f5fc0f86	424
ac4e4ce5 JO	425	/* Security sequence number counters */
ac4e4ce5 JO	426	u8 tx_security_last_seq;
04e36fc5	427	s64 tx_security_seq;
ac4e4ce5	428
f5fc0f86 LC	429	/* FW Rx counter */
	430	u32 rx_counter;
	431
	432	/* Rx memory pool address */
	433	struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
	434
	435	/* The target interrupt mask */
	436	struct work_struct irq_work;
	437
	438	/* The mbox event mask */
	439	u32 event_mask;
	440
	441	/* Mailbox pointers */
	442	u32 mbox_ptr[2];
	443
	444	/* Are we currently scanning */
abb0b3bf	445	struct wl1271_scan scan;
f5fc0f86 LC	446
	447	/* Our association ID */
	448	u16 aid;
	449
d94cd297	450	/* currently configured rate set */
830fb67b	451	u32 sta_rate_set;
d94cd297	452	u32 basic_rate_set;
ebba60c6	453	u32 basic_rate;
830fb67b	454	u32 rate_set;
d94cd297	455
8a5a37a6 JO	456	/* The current band */
	457	enum ieee80211_band band;
	458
60e84c2e JO	459	/* Beaconing interval (needed for ad-hoc) */
	460	u32 beacon_int;
	461
f5fc0f86 LC	462	/* Default key (for WEP) */
	463	u32 default_key;
	464
14b228a0	465	unsigned int filters;
f5fc0f86 LC	466	unsigned int rx_config;
	467	unsigned int rx_filter;
	468
f5fc0f86	469	struct completion *elp_compl;
37b70a81	470	struct delayed_work elp_work;
f5fc0f86	471
19ad0715 JO	472	/* retry counter for PSM entries */
	473	u8 psm_entry_retry;
	474
f5fc0f86 LC	475	/* in dBm */
	476	int power_level;
	477
00236aed JO	478	int rssi_thold;
	479	int last_rssi_event;
	480
f5fc0f86 LC	481	struct wl1271_stats stats;
	482	struct wl1271_debugfs debugfs;
	483
554d7209	484	__le32 buffer_32;
f5fc0f86	485	u32 buffer_cmd;
545f1da8	486	u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
f5fc0f86 LC	487
	488	struct wl1271_fw_status *fw_status;
	489	struct wl1271_tx_hw_res_if *tx_res_if;
b771eee5 JO	490
b771eee5 JO	491	struct ieee80211_vif *vif;
d6e19d13	492
2b60100b JO	493	/* Current chipset configuration */
2b60100b JO	494	struct conf_drv_settings conf;
01c09162	495
7fc3a864 JO	496	bool sg_enabled;
7fc3a864 JO	497
01c09162	498	struct list_head list;
f5fc0f86 LC	499	};
	500
	501	int wl1271_plt_start(struct wl1271 *wl);
	502	int wl1271_plt_stop(struct wl1271 *wl);
	503
	504	#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
	505
	506	#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
	507
	508	#define WL1271_DEFAULT_POWER_LEVEL 0
	509
06f7bc7d JO	510	#define WL1271_TX_QUEUE_LOW_WATERMARK 10
06f7bc7d JO	511	#define WL1271_TX_QUEUE_HIGH_WATERMARK 25
f5fc0f86	512
01ac17ec JO	513	/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
	514	on in case is has been shut down shortly before */
	515	#define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
f5fc0f86 LC	516	#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
f5fc0f86 LC	517
1ebec3d7 TP	518	static inline bool wl1271_11a_enabled(void)
1ebec3d7 TP	519	{
152ee6e0	520	/* FIXME: this could be determined based on the NVS-INI file */
1ebec3d7 TP	521	#ifdef WL1271_80211A_ENABLED
	522	return true;
	523	#else
	524	return false;
	525	#endif
	526	}
	527
f5fc0f86	528	#endif