]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/net/wireless/wl12xx/wl12xx.h
wl12xx: Check for FW quirks as soon as the FW boots
[mirror_ubuntu-bionic-kernel.git] / drivers / net / wireless / wl12xx / wl12xx.h
CommitLineData
f5fc0f86
LC
1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
00d20100
SL
25#ifndef __WL12XX_H__
26#define __WL12XX_H__
f5fc0f86
LC
27
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
00d20100
SL
35#include "conf.h"
36#include "ini.h"
2b60100b 37
f5fc0f86
LC
38#define DRIVER_NAME "wl1271"
39#define DRIVER_PREFIX DRIVER_NAME ": "
40
4b7fac77
LS
41/*
42 * FW versions support BA 11n
43 * versions marks x.x.x.50-60.x
44 */
45#define WL12XX_BA_SUPPORT_FW_COST_VER2_START 50
46#define WL12XX_BA_SUPPORT_FW_COST_VER2_END 60
47
f5fc0f86
LC
48enum {
49 DEBUG_NONE = 0,
50 DEBUG_IRQ = BIT(0),
51 DEBUG_SPI = BIT(1),
52 DEBUG_BOOT = BIT(2),
53 DEBUG_MAILBOX = BIT(3),
c8c90873 54 DEBUG_TESTMODE = BIT(4),
f5fc0f86
LC
55 DEBUG_EVENT = BIT(5),
56 DEBUG_TX = BIT(6),
57 DEBUG_RX = BIT(7),
58 DEBUG_SCAN = BIT(8),
59 DEBUG_CRYPT = BIT(9),
60 DEBUG_PSM = BIT(10),
61 DEBUG_MAC80211 = BIT(11),
62 DEBUG_CMD = BIT(12),
63 DEBUG_ACX = BIT(13),
a3b8ea75 64 DEBUG_SDIO = BIT(14),
14b228a0 65 DEBUG_FILTERS = BIT(15),
5da11dcd 66 DEBUG_ADHOC = BIT(16),
e78a287a
AN
67 DEBUG_AP = BIT(17),
68 DEBUG_MASTER = (DEBUG_ADHOC | DEBUG_AP),
f5fc0f86
LC
69 DEBUG_ALL = ~0,
70};
71
17c1755c 72extern u32 wl12xx_debug_level;
f5fc0f86
LC
73
74#define DEBUG_DUMP_LIMIT 1024
75
76#define wl1271_error(fmt, arg...) \
17c1755c 77 pr_err(DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
f5fc0f86
LC
78
79#define wl1271_warning(fmt, arg...) \
17c1755c 80 pr_warning(DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
f5fc0f86
LC
81
82#define wl1271_notice(fmt, arg...) \
17c1755c 83 pr_info(DRIVER_PREFIX fmt "\n", ##arg)
f5fc0f86
LC
84
85#define wl1271_info(fmt, arg...) \
17c1755c 86 pr_info(DRIVER_PREFIX fmt "\n", ##arg)
f5fc0f86
LC
87
88#define wl1271_debug(level, fmt, arg...) \
89 do { \
17c1755c
EP
90 if (level & wl12xx_debug_level) \
91 pr_debug(DRIVER_PREFIX fmt "\n", ##arg); \
f5fc0f86
LC
92 } while (0)
93
17c1755c 94/* TODO: use pr_debug_hex_dump when it will be available */
f5fc0f86
LC
95#define wl1271_dump(level, prefix, buf, len) \
96 do { \
17c1755c 97 if (level & wl12xx_debug_level) \
f5fc0f86
LC
98 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
99 DUMP_PREFIX_OFFSET, 16, 1, \
100 buf, \
101 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
102 0); \
103 } while (0)
104
105#define wl1271_dump_ascii(level, prefix, buf, len) \
106 do { \
17c1755c 107 if (level & wl12xx_debug_level) \
f5fc0f86
LC
108 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
109 DUMP_PREFIX_OFFSET, 16, 1, \
110 buf, \
111 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
112 true); \
113 } while (0)
114
ae113b57 115#define WL1271_DEFAULT_STA_RX_CONFIG (CFG_UNI_FILTER_EN | \
c87dec9f
JO
116 CFG_BSSID_FILTER_EN | \
117 CFG_MC_FILTER_EN)
f5fc0f86 118
ae113b57 119#define WL1271_DEFAULT_STA_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
f5fc0f86
LC
120 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
121 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
122 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
123
ae113b57
AN
124#define WL1271_DEFAULT_AP_RX_CONFIG 0
125
126#define WL1271_DEFAULT_AP_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PREQ_EN | \
127 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
128 CFG_RX_CTL_EN | CFG_RX_AUTH_EN | \
129 CFG_RX_ASSOC_EN)
130
131
132
f62c317c 133#define WL1271_FW_NAME "ti-connectivity/wl1271-fw-2.bin"
5aa42346 134#define WL128X_FW_NAME "ti-connectivity/wl128x-fw.bin"
1aed55fd
AN
135#define WL127X_AP_FW_NAME "ti-connectivity/wl1271-fw-ap.bin"
136#define WL128X_AP_FW_NAME "ti-connectivity/wl128x-fw-ap.bin"
166d504e 137
5aa42346
SL
138/*
139 * wl127x and wl128x are using the same NVS file name. However, the
140 * ini parameters between them are different. The driver validates
141 * the correct NVS size in wl1271_boot_upload_nvs().
142 */
143#define WL12XX_NVS_NAME "ti-connectivity/wl1271-nvs.bin"
152ee6e0 144
04e36fc5
JO
145#define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
146#define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
147
7a55724e
JO
148#define WL1271_CIPHER_SUITE_GEM 0x00147201
149
259da430 150#define WL1271_BUSY_WORD_CNT 1
545f1da8 151#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
f5fc0f86
LC
152
153#define WL1271_ELP_HW_STATE_ASLEEP 0
154#define WL1271_ELP_HW_STATE_IRQ 1
155
d94cd297
JO
156#define WL1271_DEFAULT_BEACON_INT 100
157#define WL1271_DEFAULT_DTIM_PERIOD 1
158
98bdaabb
AN
159#define WL1271_AP_GLOBAL_HLID 0
160#define WL1271_AP_BROADCAST_HLID 1
161#define WL1271_AP_STA_HLID_START 2
162
b622d992
AN
163/*
164 * When in AP-mode, we allow (at least) this number of mem-blocks
165 * to be transmitted to FW for a STA in PS-mode. Only when packets are
166 * present in the FW buffers it will wake the sleeping STA. We want to put
167 * enough packets for the driver to transmit all of its buffered data before
168 * the STA goes to sleep again. But we don't want to take too much mem-blocks
169 * as it might hurt the throughput of active STAs.
170 * The number of blocks (18) is enough for 2 large packets.
171 */
172#define WL1271_PS_STA_MAX_BLOCKS (2 * 9)
173
98bdaabb 174#define WL1271_AP_BSS_INDEX 0
25eaea30 175#define WL1271_AP_DEF_INACTIV_SEC 300
98bdaabb
AN
176#define WL1271_AP_DEF_BEACON_EXP 20
177
c87dec9f 178#define ACX_TX_DESCRIPTORS 32
be7078c2 179
1f37cbc9
IY
180#define WL1271_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)
181
f5fc0f86
LC
182enum wl1271_state {
183 WL1271_STATE_OFF,
184 WL1271_STATE_ON,
185 WL1271_STATE_PLT,
186};
187
188enum wl1271_partition_type {
189 PART_DOWN,
190 PART_WORK,
191 PART_DRPW,
192
193 PART_TABLE_LEN
194};
195
196struct wl1271_partition {
197 u32 size;
198 u32 start;
199};
200
201struct wl1271_partition_set {
202 struct wl1271_partition mem;
203 struct wl1271_partition reg;
451de97a
JO
204 struct wl1271_partition mem2;
205 struct wl1271_partition mem3;
f5fc0f86
LC
206};
207
208struct wl1271;
209
e7ddf549
LC
210enum {
211 FW_VER_CHIP,
212 FW_VER_IF_TYPE,
213 FW_VER_MAJOR,
214 FW_VER_SUBTYPE,
215 FW_VER_MINOR,
216
217 NUM_FW_VER
218};
219
220#define FW_VER_CHIP_WL127X 6
221#define FW_VER_CHIP_WL128X 7
222
223#define FW_VER_IF_TYPE_STA 1
224#define FW_VER_IF_TYPE_AP 2
225
226#define FW_VER_MINOR_1_SPARE_STA_MIN 58
227#define FW_VER_MINOR_1_SPARE_AP_MIN 47
4b7fac77 228
f5fc0f86
LC
229struct wl1271_chip {
230 u32 id;
4b7fac77 231 char fw_ver_str[ETHTOOL_BUSINFO_LEN];
e7ddf549 232 unsigned int fw_ver[NUM_FW_VER];
f5fc0f86
LC
233};
234
235struct wl1271_stats {
236 struct acx_statistics *fw_stats;
237 unsigned long fw_stats_update;
238
239 unsigned int retry_count;
240 unsigned int excessive_retries;
241};
242
f5fc0f86
LC
243#define NUM_TX_QUEUES 4
244#define NUM_RX_PKT_DESC 8
245
beb6c880
AN
246#define AP_MAX_STATIONS 5
247
248/* Broadcast and Global links + links to stations */
249#define AP_MAX_LINKS (AP_MAX_STATIONS + 2)
250
c8bde243
EP
251/* FW status registers common for AP/STA */
252struct wl1271_fw_common_status {
d0f63b20 253 __le32 intr;
f5fc0f86
LC
254 u8 fw_rx_counter;
255 u8 drv_rx_counter;
256 u8 reserved;
257 u8 tx_results_counter;
d0f63b20
LC
258 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
259 __le32 tx_released_blks[NUM_TX_QUEUES];
260 __le32 fw_localtime;
c8bde243
EP
261} __packed;
262
263/* FW status registers for AP */
264struct wl1271_fw_ap_status {
265 struct wl1271_fw_common_status common;
beb6c880
AN
266
267 /* Next fields valid only in AP FW */
268
269 /*
270 * A bitmap (where each bit represents a single HLID)
271 * to indicate if the station is in PS mode.
272 */
273 __le32 link_ps_bitmap;
274
275 /* Number of freed MBs per HLID */
276 u8 tx_lnk_free_blks[AP_MAX_LINKS];
277 u8 padding_1[1];
ba2d3587 278} __packed;
f5fc0f86 279
c8bde243
EP
280/* FW status registers for STA */
281struct wl1271_fw_sta_status {
282 struct wl1271_fw_common_status common;
283
284 u8 tx_total;
285 u8 reserved1;
286 __le16 reserved2;
13b107dd
SL
287 /* Total structure size is 68 bytes */
288 u32 padding;
c8bde243
EP
289} __packed;
290
291struct wl1271_fw_full_status {
292 union {
293 struct wl1271_fw_common_status common;
294 struct wl1271_fw_sta_status sta;
295 struct wl1271_fw_ap_status ap;
296 };
297} __packed;
298
299
f5fc0f86
LC
300struct wl1271_rx_mem_pool_addr {
301 u32 addr;
302 u32 addr_extra;
303};
304
4a31c11c 305#define WL1271_MAX_CHANNELS 64
abb0b3bf 306struct wl1271_scan {
4fb26fa9 307 struct cfg80211_scan_request *req;
4a31c11c 308 unsigned long scanned_ch[BITS_TO_LONGS(WL1271_MAX_CHANNELS)];
78abd320 309 bool failed;
abb0b3bf
TP
310 u8 state;
311 u8 ssid[IW_ESSID_MAX_SIZE+1];
312 size_t ssid_len;
abb0b3bf
TP
313};
314
8197b711
TP
315struct wl1271_if_operations {
316 void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
317 bool fixed);
318 void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
319 bool fixed);
320 void (*reset)(struct wl1271 *wl);
321 void (*init)(struct wl1271 *wl);
2cc78ff7 322 int (*power)(struct wl1271 *wl, bool enable);
8197b711
TP
323 struct device* (*dev)(struct wl1271 *wl);
324 void (*enable_irq)(struct wl1271 *wl);
325 void (*disable_irq)(struct wl1271 *wl);
0da13da7 326 void (*set_block_size) (struct wl1271 *wl, unsigned int blksz);
8197b711
TP
327};
328
7f179b46
AN
329#define MAX_NUM_KEYS 14
330#define MAX_KEY_SIZE 32
331
332struct wl1271_ap_key {
333 u8 id;
334 u8 key_type;
335 u8 key_size;
336 u8 key[MAX_KEY_SIZE];
337 u8 hlid;
338 u32 tx_seq_32;
339 u16 tx_seq_16;
340};
341
72c2d9e5
EP
342enum wl12xx_flags {
343 WL1271_FLAG_STA_ASSOCIATED,
344 WL1271_FLAG_JOINED,
345 WL1271_FLAG_GPIO_POWER,
346 WL1271_FLAG_TX_QUEUE_STOPPED,
b07d4037 347 WL1271_FLAG_TX_PENDING,
72c2d9e5 348 WL1271_FLAG_IN_ELP,
a665d6e2 349 WL1271_FLAG_ELP_REQUESTED,
72c2d9e5
EP
350 WL1271_FLAG_PSM,
351 WL1271_FLAG_PSM_REQUESTED,
72c2d9e5
EP
352 WL1271_FLAG_IRQ_RUNNING,
353 WL1271_FLAG_IDLE,
72c2d9e5
EP
354 WL1271_FLAG_PSPOLL_FAILURE,
355 WL1271_FLAG_STA_STATE_SENT,
356 WL1271_FLAG_FW_TX_BUSY,
13026dec
JO
357 WL1271_FLAG_AP_STARTED,
358 WL1271_FLAG_IF_INITIALIZED,
990f5de7 359 WL1271_FLAG_DUMMY_PACKET_PENDING,
f44e5868
EP
360 WL1271_FLAG_SUSPENDED,
361 WL1271_FLAG_PENDING_WORK,
77ddaa10
EP
362 WL1271_FLAG_SOFT_GEMINI,
363 WL1271_FLAG_RX_STREAMING_STARTED,
72c2d9e5
EP
364};
365
a8c0ddb5
AN
366struct wl1271_link {
367 /* AP-mode - TX queue per AC in link */
368 struct sk_buff_head tx_queue[NUM_TX_QUEUES];
09039f42
AN
369
370 /* accounting for allocated / available TX blocks in FW */
371 u8 allocated_blks;
372 u8 prev_freed_blks;
b622d992
AN
373
374 u8 addr[ETH_ALEN];
a8c0ddb5
AN
375};
376
f5fc0f86 377struct wl1271 {
3b56dd6a 378 struct platform_device *plat_dev;
f5fc0f86
LC
379 struct ieee80211_hw *hw;
380 bool mac80211_registered;
381
8197b711
TP
382 void *if_priv;
383
384 struct wl1271_if_operations *if_ops;
f5fc0f86
LC
385
386 void (*set_power)(bool enable);
387 int irq;
15cea993 388 int ref_clock;
f5fc0f86
LC
389
390 spinlock_t wl_lock;
391
392 enum wl1271_state state;
393 struct mutex mutex;
394
830fb67b
JO
395 unsigned long flags;
396
451de97a 397 struct wl1271_partition_set part;
f5fc0f86
LC
398
399 struct wl1271_chip chip;
400
401 int cmd_box_addr;
402 int event_box_addr;
403
404 u8 *fw;
405 size_t fw_len;
166d504e 406 u8 fw_bss_type;
bc765bf3 407 void *nvs;
02fabb0e 408 size_t nvs_len;
f5fc0f86 409
d717fd61
JO
410 s8 hw_pg_ver;
411
f5fc0f86
LC
412 u8 bssid[ETH_ALEN];
413 u8 mac_addr[ETH_ALEN];
414 u8 bss_type;
5da11dcd 415 u8 set_bss_type;
f5fc0f86
LC
416 u8 ssid[IW_ESSID_MAX_SIZE + 1];
417 u8 ssid_len;
f5fc0f86
LC
418 int channel;
419
420 struct wl1271_acx_mem_map *target_mem_map;
421
422 /* Accounting for allocated / available TX blocks on HW */
423 u32 tx_blocks_freed[NUM_TX_QUEUES];
424 u32 tx_blocks_available;
d2f4d47d 425 u32 tx_allocated_blocks;
ffb591cd 426 u32 tx_results_count;
f5fc0f86
LC
427
428 /* Transmitted TX packets counter for chipset interface */
ffb591cd 429 u32 tx_packets_count;
f5fc0f86
LC
430
431 /* Time-offset between host and chipset clocks */
ac5e1e39 432 s64 time_offset;
f5fc0f86
LC
433
434 /* Session counter for the chipset */
435 int session_counter;
436
437 /* Frames scheduled for transmission, not handled yet */
6742f554
JO
438 struct sk_buff_head tx_queue[NUM_TX_QUEUES];
439 int tx_queue_count;
f5fc0f86 440
a620865e
IY
441 /* Frames received, not handled yet by mac80211 */
442 struct sk_buff_head deferred_rx_queue;
443
444 /* Frames sent, not returned yet to mac80211 */
445 struct sk_buff_head deferred_tx_queue;
446
f5fc0f86 447 struct work_struct tx_work;
92ef8960 448 struct workqueue_struct *freezable_wq;
c87dec9f 449
f5fc0f86 450 /* Pending TX frames */
25eeb9e3 451 unsigned long tx_frames_map[BITS_TO_LONGS(ACX_TX_DESCRIPTORS)];
be7078c2 452 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
781608c4 453 int tx_frames_cnt;
f5fc0f86 454
ac4e4ce5
JO
455 /* Security sequence number counters */
456 u8 tx_security_last_seq;
04e36fc5 457 s64 tx_security_seq;
ac4e4ce5 458
f5fc0f86
LC
459 /* FW Rx counter */
460 u32 rx_counter;
461
462 /* Rx memory pool address */
463 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
464
1f37cbc9
IY
465 /* Intermediate buffer, used for packet aggregation */
466 u8 *aggr_buf;
467
990f5de7
IY
468 /* Reusable dummy packet template */
469 struct sk_buff *dummy_packet;
470
a620865e
IY
471 /* Network stack work */
472 struct work_struct netstack_work;
f5fc0f86 473
52b0e7a6
JO
474 /* Hardware recovery work */
475 struct work_struct recovery_work;
476
f5fc0f86
LC
477 /* The mbox event mask */
478 u32 event_mask;
479
480 /* Mailbox pointers */
481 u32 mbox_ptr[2];
482
483 /* Are we currently scanning */
abb0b3bf 484 struct wl1271_scan scan;
78abd320 485 struct delayed_work scan_complete_work;
f5fc0f86 486
33c2c06c
LC
487 bool sched_scanning;
488
2f6724b2
JO
489 /* probe-req template for the current AP */
490 struct sk_buff *probereq;
491
f5fc0f86
LC
492 /* Our association ID */
493 u16 aid;
494
e8b03a2b
SL
495 /*
496 * currently configured rate set:
497 * bits 0-15 - 802.11abg rates
498 * bits 16-23 - 802.11n MCS index mask
499 * support only 1 stream, thus only 8 bits for the MCS rates (0-7).
500 */
d94cd297 501 u32 basic_rate_set;
ebba60c6 502 u32 basic_rate;
830fb67b 503 u32 rate_set;
d94cd297 504
8a5a37a6
JO
505 /* The current band */
506 enum ieee80211_band band;
507
60e84c2e
JO
508 /* Beaconing interval (needed for ad-hoc) */
509 u32 beacon_int;
510
f5fc0f86
LC
511 /* Default key (for WEP) */
512 u32 default_key;
513
77ddaa10
EP
514 /* Rx Streaming */
515 struct work_struct rx_streaming_enable_work;
516 struct work_struct rx_streaming_disable_work;
517 struct timer_list rx_streaming_timer;
518
14b228a0 519 unsigned int filters;
f5fc0f86
LC
520 unsigned int rx_config;
521 unsigned int rx_filter;
522
f5fc0f86 523 struct completion *elp_compl;
9439064c 524 struct completion *ps_compl;
37b70a81 525 struct delayed_work elp_work;
90494a90
JO
526 struct delayed_work pspoll_work;
527
528 /* counter for ps-poll delivery failures */
529 int ps_poll_failures;
f5fc0f86 530
19ad0715
JO
531 /* retry counter for PSM entries */
532 u8 psm_entry_retry;
533
f5fc0f86
LC
534 /* in dBm */
535 int power_level;
536
00236aed
JO
537 int rssi_thold;
538 int last_rssi_event;
539
f5fc0f86 540 struct wl1271_stats stats;
f5fc0f86 541
554d7209 542 __le32 buffer_32;
f5fc0f86 543 u32 buffer_cmd;
545f1da8 544 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
f5fc0f86 545
c8bde243 546 struct wl1271_fw_full_status *fw_status;
f5fc0f86 547 struct wl1271_tx_hw_res_if *tx_res_if;
b771eee5
JO
548
549 struct ieee80211_vif *vif;
d6e19d13 550
2b60100b
JO
551 /* Current chipset configuration */
552 struct conf_drv_settings conf;
01c09162 553
7fc3a864
JO
554 bool sg_enabled;
555
02fabb0e
JO
556 bool enable_11a;
557
01c09162 558 struct list_head list;
ece550d0
JL
559
560 /* Most recently reported noise in dBm */
561 s8 noise;
f84f7d78
AN
562
563 /* map for HLIDs of associated stations - when operating in AP mode */
564 unsigned long ap_hlid_map[BITS_TO_LONGS(AP_MAX_STATIONS)];
7f179b46
AN
565
566 /* recoreded keys for AP-mode - set here before AP startup */
567 struct wl1271_ap_key *recorded_ap_keys[MAX_NUM_KEYS];
a8aaaf53
LC
568
569 /* bands supported by this instance of wl12xx */
570 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
4b7fac77
LS
571
572 /* RX BA constraint value */
573 bool ba_support;
4b7fac77 574 u8 ba_rx_bitmap;
70559a06 575 bool ba_allowed;
a8c0ddb5 576
5ea417ae 577 int tcxo_clock;
48a61477 578
402e4861
EP
579 /*
580 * wowlan trigger was configured during suspend.
581 * (currently, only "ANY" trigger is supported)
582 */
583 bool wow_enabled;
6bb04332 584 bool irq_wake_enabled;
402e4861 585
a8c0ddb5
AN
586 /*
587 * AP-mode - links indexed by HLID. The global and broadcast links
588 * are always active.
589 */
590 struct wl1271_link links[AP_MAX_LINKS];
591
592 /* the hlid of the link where the last transmitted skb came from */
593 int last_tx_hlid;
b622d992
AN
594
595 /* AP-mode - a bitmap of links currently in PS mode according to FW */
596 u32 ap_fw_ps_map;
597
598 /* AP-mode - a bitmap of links currently in PS mode in mac80211 */
599 unsigned long ap_ps_map;
606ea9fa
IY
600
601 /* Quirks of specific hardware revisions */
602 unsigned int quirks;
341b7cde
IY
603
604 /* Platform limitations */
605 unsigned int platform_quirks;
f84f7d78
AN
606};
607
608struct wl1271_station {
609 u8 hlid;
f5fc0f86
LC
610};
611
612int wl1271_plt_start(struct wl1271 *wl);
613int wl1271_plt_stop(struct wl1271 *wl);
77ddaa10 614int wl1271_recalc_rx_streaming(struct wl1271 *wl);
f5fc0f86
LC
615
616#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
617
618#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
619
620#define WL1271_DEFAULT_POWER_LEVEL 0
621
06f7bc7d
JO
622#define WL1271_TX_QUEUE_LOW_WATERMARK 10
623#define WL1271_TX_QUEUE_HIGH_WATERMARK 25
f5fc0f86 624
a620865e
IY
625#define WL1271_DEFERRED_QUEUE_LIMIT 64
626
01ac17ec
JO
627/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
628 on in case is has been shut down shortly before */
e8a8b252
SW
629#define WL1271_PRE_POWER_ON_SLEEP 20 /* in milliseconds */
630#define WL1271_POWER_ON_SLEEP 200 /* in milliseconds */
f5fc0f86 631
e8b03a2b
SL
632/* Macros to handle wl1271.sta_rate_set */
633#define HW_BG_RATES_MASK 0xffff
634#define HW_HT_RATES_OFFSET 16
635
606ea9fa
IY
636/* Quirks */
637
638/* Each RX/TX transaction requires an end-of-transaction transfer */
0da13da7 639#define WL12XX_QUIRK_END_OF_TRANSACTION BIT(0)
606ea9fa 640
e7ddf549
LC
641/*
642 * Older firmwares use 2 spare TX blocks
643 * (for STA < 6.1.3.50.58 or for AP < 6.2.0.0.47)
644 */
0da13da7
IY
645#define WL12XX_QUIRK_USE_2_SPARE_BLOCKS BIT(1)
646
647/* WL128X requires aggregated packets to be aligned to the SDIO block size */
648#define WL12XX_QUIRK_BLOCKSIZE_ALIGNMENT BIT(2)
e7ddf549 649
0c005048
SL
650/*
651 * WL127X AP mode requires Low Power DRPw (LPD) enable to reduce power
652 * consumption
653 */
654#define WL12XX_QUIRK_LPD_MODE BIT(3)
655
f5fc0f86 656#endif