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97f18414 EL |
1 | /* |
2 | * I2C Link Layer for PN544 HCI based Driver | |
3 | * | |
4 | * Copyright (C) 2012 Intel Corporation. All rights reserved. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the | |
17 | * Free Software Foundation, Inc., | |
18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | */ | |
20 | ||
21 | #include <linux/crc-ccitt.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/i2c.h> | |
24 | #include <linux/gpio.h> | |
25 | #include <linux/miscdevice.h> | |
26 | #include <linux/interrupt.h> | |
27 | #include <linux/delay.h> | |
06c66034 EL |
28 | #include <linux/nfc.h> |
29 | #include <linux/firmware.h> | |
30 | #include <linux/unaligned/access_ok.h> | |
61cdb018 | 31 | #include <linux/platform_data/pn544.h> |
97f18414 EL |
32 | |
33 | #include <net/nfc/hci.h> | |
34 | #include <net/nfc/llc.h> | |
06c66034 | 35 | #include <net/nfc/nfc.h> |
97f18414 EL |
36 | |
37 | #include "pn544.h" | |
38 | ||
39 | #define PN544_I2C_FRAME_HEADROOM 1 | |
40 | #define PN544_I2C_FRAME_TAILROOM 2 | |
41 | ||
42 | /* framing in HCI mode */ | |
43 | #define PN544_HCI_I2C_LLC_LEN 1 | |
44 | #define PN544_HCI_I2C_LLC_CRC 2 | |
45 | #define PN544_HCI_I2C_LLC_LEN_CRC (PN544_HCI_I2C_LLC_LEN + \ | |
46 | PN544_HCI_I2C_LLC_CRC) | |
47 | #define PN544_HCI_I2C_LLC_MIN_SIZE (1 + PN544_HCI_I2C_LLC_LEN_CRC) | |
48 | #define PN544_HCI_I2C_LLC_MAX_PAYLOAD 29 | |
49 | #define PN544_HCI_I2C_LLC_MAX_SIZE (PN544_HCI_I2C_LLC_LEN_CRC + 1 + \ | |
50 | PN544_HCI_I2C_LLC_MAX_PAYLOAD) | |
51 | ||
52 | static struct i2c_device_id pn544_hci_i2c_id_table[] = { | |
53 | {"pn544", 0}, | |
54 | {} | |
55 | }; | |
56 | ||
57 | MODULE_DEVICE_TABLE(i2c, pn544_hci_i2c_id_table); | |
58 | ||
59 | #define PN544_HCI_I2C_DRIVER_NAME "pn544_hci_i2c" | |
60 | ||
06c66034 EL |
61 | #define PN544_FW_CMD_WRITE 0x08 |
62 | #define PN544_FW_CMD_CHECK 0x06 | |
63 | ||
64 | struct pn544_i2c_fw_frame_write { | |
65 | u8 cmd; | |
66 | u16 be_length; | |
67 | u8 be_dest_addr[3]; | |
68 | u16 be_datalen; | |
69 | u8 data[]; | |
70 | } __packed; | |
71 | ||
72 | struct pn544_i2c_fw_frame_check { | |
73 | u8 cmd; | |
74 | u16 be_length; | |
75 | u8 be_start_addr[3]; | |
76 | u16 be_datalen; | |
77 | u16 be_crc; | |
78 | } __packed; | |
79 | ||
80 | struct pn544_i2c_fw_frame_response { | |
81 | u8 status; | |
82 | u16 be_length; | |
83 | } __packed; | |
84 | ||
85 | struct pn544_i2c_fw_blob { | |
86 | u32 be_size; | |
87 | u32 be_destaddr; | |
88 | u8 data[]; | |
89 | }; | |
90 | ||
91 | #define PN544_FW_CMD_RESULT_TIMEOUT 0x01 | |
92 | #define PN544_FW_CMD_RESULT_BAD_CRC 0x02 | |
93 | #define PN544_FW_CMD_RESULT_ACCESS_DENIED 0x08 | |
94 | #define PN544_FW_CMD_RESULT_PROTOCOL_ERROR 0x0B | |
95 | #define PN544_FW_CMD_RESULT_INVALID_PARAMETER 0x11 | |
96 | #define PN544_FW_CMD_RESULT_INVALID_LENGTH 0x18 | |
97 | #define PN544_FW_CMD_RESULT_WRITE_FAILED 0x74 | |
98 | ||
99 | #define MIN(X, Y) ((X) < (Y) ? (X) : (Y)) | |
100 | ||
101 | #define PN544_FW_WRITE_BUFFER_MAX_LEN 0x9f7 | |
102 | #define PN544_FW_I2C_MAX_PAYLOAD PN544_HCI_I2C_LLC_MAX_SIZE | |
103 | #define PN544_FW_I2C_WRITE_FRAME_HEADER_LEN 8 | |
104 | #define PN544_FW_I2C_WRITE_DATA_MAX_LEN MIN((PN544_FW_I2C_MAX_PAYLOAD -\ | |
105 | PN544_FW_I2C_WRITE_FRAME_HEADER_LEN),\ | |
106 | PN544_FW_WRITE_BUFFER_MAX_LEN) | |
107 | ||
108 | #define FW_WORK_STATE_IDLE 1 | |
109 | #define FW_WORK_STATE_START 2 | |
110 | #define FW_WORK_STATE_WAIT_WRITE_ANSWER 3 | |
111 | #define FW_WORK_STATE_WAIT_CHECK_ANSWER 4 | |
112 | ||
97f18414 EL |
113 | struct pn544_i2c_phy { |
114 | struct i2c_client *i2c_dev; | |
115 | struct nfc_hci_dev *hdev; | |
116 | ||
117 | unsigned int gpio_en; | |
118 | unsigned int gpio_irq; | |
119 | unsigned int gpio_fw; | |
120 | unsigned int en_polarity; | |
121 | ||
06c66034 EL |
122 | struct work_struct fw_work; |
123 | int fw_work_state; | |
124 | char firmware_name[NFC_FIRMWARE_NAME_MAXSIZE + 1]; | |
125 | const struct firmware *fw; | |
126 | u32 fw_blob_dest_addr; | |
127 | size_t fw_blob_size; | |
128 | const u8 *fw_blob_data; | |
129 | size_t fw_written; | |
130 | int fw_cmd_result; | |
131 | ||
97f18414 | 132 | int powered; |
eab10b71 | 133 | int run_mode; |
97f18414 EL |
134 | |
135 | int hard_fault; /* | |
136 | * < 0 if hardware error occured (e.g. i2c err) | |
137 | * and prevents normal operation. | |
138 | */ | |
139 | }; | |
140 | ||
141 | #define I2C_DUMP_SKB(info, skb) \ | |
142 | do { \ | |
143 | pr_debug("%s:\n", info); \ | |
144 | print_hex_dump(KERN_DEBUG, "i2c: ", DUMP_PREFIX_OFFSET, \ | |
145 | 16, 1, (skb)->data, (skb)->len, 0); \ | |
146 | } while (0) | |
147 | ||
148 | static void pn544_hci_i2c_platform_init(struct pn544_i2c_phy *phy) | |
149 | { | |
150 | int polarity, retry, ret; | |
151 | char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 }; | |
152 | int count = sizeof(rset_cmd); | |
153 | ||
154 | pr_info(DRIVER_DESC ": %s\n", __func__); | |
155 | dev_info(&phy->i2c_dev->dev, "Detecting nfc_en polarity\n"); | |
156 | ||
157 | /* Disable fw download */ | |
158 | gpio_set_value(phy->gpio_fw, 0); | |
159 | ||
160 | for (polarity = 0; polarity < 2; polarity++) { | |
161 | phy->en_polarity = polarity; | |
162 | retry = 3; | |
163 | while (retry--) { | |
164 | /* power off */ | |
165 | gpio_set_value(phy->gpio_en, !phy->en_polarity); | |
166 | usleep_range(10000, 15000); | |
167 | ||
168 | /* power on */ | |
169 | gpio_set_value(phy->gpio_en, phy->en_polarity); | |
170 | usleep_range(10000, 15000); | |
171 | ||
172 | /* send reset */ | |
173 | dev_dbg(&phy->i2c_dev->dev, "Sending reset cmd\n"); | |
174 | ret = i2c_master_send(phy->i2c_dev, rset_cmd, count); | |
175 | if (ret == count) { | |
176 | dev_info(&phy->i2c_dev->dev, | |
177 | "nfc_en polarity : active %s\n", | |
178 | (polarity == 0 ? "low" : "high")); | |
179 | goto out; | |
180 | } | |
181 | } | |
182 | } | |
183 | ||
184 | dev_err(&phy->i2c_dev->dev, | |
185 | "Could not detect nfc_en polarity, fallback to active high\n"); | |
186 | ||
187 | out: | |
188 | gpio_set_value(phy->gpio_en, !phy->en_polarity); | |
189 | } | |
190 | ||
eab10b71 EL |
191 | static void pn544_hci_i2c_enable_mode(struct pn544_i2c_phy *phy, int run_mode) |
192 | { | |
193 | gpio_set_value(phy->gpio_fw, run_mode == PN544_FW_MODE ? 1 : 0); | |
194 | gpio_set_value(phy->gpio_en, phy->en_polarity); | |
195 | usleep_range(10000, 15000); | |
196 | ||
197 | phy->run_mode = run_mode; | |
198 | } | |
199 | ||
97f18414 EL |
200 | static int pn544_hci_i2c_enable(void *phy_id) |
201 | { | |
202 | struct pn544_i2c_phy *phy = phy_id; | |
203 | ||
204 | pr_info(DRIVER_DESC ": %s\n", __func__); | |
205 | ||
eab10b71 | 206 | pn544_hci_i2c_enable_mode(phy, PN544_HCI_MODE); |
97f18414 EL |
207 | |
208 | phy->powered = 1; | |
209 | ||
210 | return 0; | |
211 | } | |
212 | ||
213 | static void pn544_hci_i2c_disable(void *phy_id) | |
214 | { | |
215 | struct pn544_i2c_phy *phy = phy_id; | |
216 | ||
217 | pr_info(DRIVER_DESC ": %s\n", __func__); | |
218 | ||
219 | gpio_set_value(phy->gpio_fw, 0); | |
220 | gpio_set_value(phy->gpio_en, !phy->en_polarity); | |
221 | usleep_range(10000, 15000); | |
222 | ||
223 | gpio_set_value(phy->gpio_en, phy->en_polarity); | |
224 | usleep_range(10000, 15000); | |
225 | ||
226 | gpio_set_value(phy->gpio_en, !phy->en_polarity); | |
227 | usleep_range(10000, 15000); | |
228 | ||
229 | phy->powered = 0; | |
230 | } | |
231 | ||
232 | static void pn544_hci_i2c_add_len_crc(struct sk_buff *skb) | |
233 | { | |
234 | u16 crc; | |
235 | int len; | |
236 | ||
237 | len = skb->len + 2; | |
238 | *skb_push(skb, 1) = len; | |
239 | ||
240 | crc = crc_ccitt(0xffff, skb->data, skb->len); | |
241 | crc = ~crc; | |
242 | *skb_put(skb, 1) = crc & 0xff; | |
243 | *skb_put(skb, 1) = crc >> 8; | |
244 | } | |
245 | ||
246 | static void pn544_hci_i2c_remove_len_crc(struct sk_buff *skb) | |
247 | { | |
248 | skb_pull(skb, PN544_I2C_FRAME_HEADROOM); | |
249 | skb_trim(skb, PN544_I2C_FRAME_TAILROOM); | |
250 | } | |
251 | ||
252 | /* | |
253 | * Writing a frame must not return the number of written bytes. | |
254 | * It must return either zero for success, or <0 for error. | |
255 | * In addition, it must not alter the skb | |
256 | */ | |
257 | static int pn544_hci_i2c_write(void *phy_id, struct sk_buff *skb) | |
258 | { | |
259 | int r; | |
260 | struct pn544_i2c_phy *phy = phy_id; | |
261 | struct i2c_client *client = phy->i2c_dev; | |
262 | ||
263 | if (phy->hard_fault != 0) | |
264 | return phy->hard_fault; | |
265 | ||
266 | usleep_range(3000, 6000); | |
267 | ||
268 | pn544_hci_i2c_add_len_crc(skb); | |
269 | ||
270 | I2C_DUMP_SKB("i2c frame written", skb); | |
271 | ||
272 | r = i2c_master_send(client, skb->data, skb->len); | |
273 | ||
274 | if (r == -EREMOTEIO) { /* Retry, chip was in standby */ | |
275 | usleep_range(6000, 10000); | |
276 | r = i2c_master_send(client, skb->data, skb->len); | |
277 | } | |
278 | ||
279 | if (r >= 0) { | |
280 | if (r != skb->len) | |
281 | r = -EREMOTEIO; | |
282 | else | |
283 | r = 0; | |
284 | } | |
285 | ||
286 | pn544_hci_i2c_remove_len_crc(skb); | |
287 | ||
288 | return r; | |
289 | } | |
290 | ||
291 | static int check_crc(u8 *buf, int buflen) | |
292 | { | |
293 | int len; | |
294 | u16 crc; | |
295 | ||
296 | len = buf[0] + 1; | |
297 | crc = crc_ccitt(0xffff, buf, len - 2); | |
298 | crc = ~crc; | |
299 | ||
300 | if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) { | |
301 | pr_err(PN544_HCI_I2C_DRIVER_NAME | |
302 | ": CRC error 0x%x != 0x%x 0x%x\n", | |
303 | crc, buf[len - 1], buf[len - 2]); | |
304 | ||
305 | pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__); | |
306 | print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE, | |
307 | 16, 2, buf, buflen, false); | |
308 | return -EPERM; | |
309 | } | |
310 | return 0; | |
311 | } | |
312 | ||
313 | /* | |
314 | * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees | |
315 | * that i2c bus will be flushed and that next read will start on a new frame. | |
316 | * returned skb contains only LLC header and payload. | |
317 | * returns: | |
318 | * -EREMOTEIO : i2c read error (fatal) | |
319 | * -EBADMSG : frame was incorrect and discarded | |
320 | * -ENOMEM : cannot allocate skb, frame dropped | |
321 | */ | |
322 | static int pn544_hci_i2c_read(struct pn544_i2c_phy *phy, struct sk_buff **skb) | |
323 | { | |
324 | int r; | |
325 | u8 len; | |
326 | u8 tmp[PN544_HCI_I2C_LLC_MAX_SIZE - 1]; | |
327 | struct i2c_client *client = phy->i2c_dev; | |
328 | ||
329 | r = i2c_master_recv(client, &len, 1); | |
330 | if (r != 1) { | |
331 | dev_err(&client->dev, "cannot read len byte\n"); | |
332 | return -EREMOTEIO; | |
333 | } | |
334 | ||
335 | if ((len < (PN544_HCI_I2C_LLC_MIN_SIZE - 1)) || | |
336 | (len > (PN544_HCI_I2C_LLC_MAX_SIZE - 1))) { | |
337 | dev_err(&client->dev, "invalid len byte\n"); | |
338 | r = -EBADMSG; | |
339 | goto flush; | |
340 | } | |
341 | ||
342 | *skb = alloc_skb(1 + len, GFP_KERNEL); | |
343 | if (*skb == NULL) { | |
344 | r = -ENOMEM; | |
345 | goto flush; | |
346 | } | |
347 | ||
348 | *skb_put(*skb, 1) = len; | |
349 | ||
350 | r = i2c_master_recv(client, skb_put(*skb, len), len); | |
351 | if (r != len) { | |
352 | kfree_skb(*skb); | |
353 | return -EREMOTEIO; | |
354 | } | |
355 | ||
356 | I2C_DUMP_SKB("i2c frame read", *skb); | |
357 | ||
358 | r = check_crc((*skb)->data, (*skb)->len); | |
359 | if (r != 0) { | |
360 | kfree_skb(*skb); | |
361 | r = -EBADMSG; | |
362 | goto flush; | |
363 | } | |
364 | ||
365 | skb_pull(*skb, 1); | |
366 | skb_trim(*skb, (*skb)->len - 2); | |
367 | ||
368 | usleep_range(3000, 6000); | |
369 | ||
370 | return 0; | |
371 | ||
372 | flush: | |
373 | if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0) | |
374 | r = -EREMOTEIO; | |
375 | ||
376 | usleep_range(3000, 6000); | |
377 | ||
378 | return r; | |
379 | } | |
380 | ||
06c66034 EL |
381 | static int pn544_hci_i2c_fw_read_status(struct pn544_i2c_phy *phy) |
382 | { | |
383 | int r; | |
384 | struct pn544_i2c_fw_frame_response response; | |
385 | struct i2c_client *client = phy->i2c_dev; | |
386 | ||
387 | r = i2c_master_recv(client, (char *) &response, sizeof(response)); | |
388 | if (r != sizeof(response)) { | |
389 | dev_err(&client->dev, "cannot read fw status\n"); | |
390 | return -EIO; | |
391 | } | |
392 | ||
393 | usleep_range(3000, 6000); | |
394 | ||
395 | switch (response.status) { | |
396 | case 0: | |
397 | return 0; | |
398 | case PN544_FW_CMD_RESULT_TIMEOUT: | |
399 | return -ETIMEDOUT; | |
400 | case PN544_FW_CMD_RESULT_BAD_CRC: | |
401 | return -ENODATA; | |
402 | case PN544_FW_CMD_RESULT_ACCESS_DENIED: | |
403 | return -EACCES; | |
404 | case PN544_FW_CMD_RESULT_PROTOCOL_ERROR: | |
405 | return -EPROTO; | |
406 | case PN544_FW_CMD_RESULT_INVALID_PARAMETER: | |
407 | return -EINVAL; | |
408 | case PN544_FW_CMD_RESULT_INVALID_LENGTH: | |
409 | return -EBADMSG; | |
410 | case PN544_FW_CMD_RESULT_WRITE_FAILED: | |
411 | return -EIO; | |
412 | default: | |
413 | return -EIO; | |
414 | } | |
415 | } | |
416 | ||
97f18414 EL |
417 | /* |
418 | * Reads an shdlc frame from the chip. This is not as straightforward as it | |
419 | * seems. There are cases where we could loose the frame start synchronization. | |
420 | * The frame format is len-data-crc, and corruption can occur anywhere while | |
421 | * transiting on i2c bus, such that we could read an invalid len. | |
422 | * In order to recover synchronization with the next frame, we must be sure | |
423 | * to read the real amount of data without using the len byte. We do this by | |
424 | * assuming the following: | |
425 | * - the chip will always present only one single complete frame on the bus | |
426 | * before triggering the interrupt | |
427 | * - the chip will not present a new frame until we have completely read | |
428 | * the previous one (or until we have handled the interrupt). | |
429 | * The tricky case is when we read a corrupted len that is less than the real | |
430 | * len. We must detect this here in order to determine that we need to flush | |
431 | * the bus. This is the reason why we check the crc here. | |
432 | */ | |
433 | static irqreturn_t pn544_hci_i2c_irq_thread_fn(int irq, void *phy_id) | |
434 | { | |
435 | struct pn544_i2c_phy *phy = phy_id; | |
436 | struct i2c_client *client; | |
437 | struct sk_buff *skb = NULL; | |
438 | int r; | |
439 | ||
440 | if (!phy || irq != phy->i2c_dev->irq) { | |
441 | WARN_ON_ONCE(1); | |
442 | return IRQ_NONE; | |
443 | } | |
444 | ||
445 | client = phy->i2c_dev; | |
446 | dev_dbg(&client->dev, "IRQ\n"); | |
447 | ||
448 | if (phy->hard_fault != 0) | |
449 | return IRQ_HANDLED; | |
450 | ||
06c66034 EL |
451 | if (phy->run_mode == PN544_FW_MODE) { |
452 | phy->fw_cmd_result = pn544_hci_i2c_fw_read_status(phy); | |
453 | schedule_work(&phy->fw_work); | |
454 | } else { | |
455 | r = pn544_hci_i2c_read(phy, &skb); | |
456 | if (r == -EREMOTEIO) { | |
457 | phy->hard_fault = r; | |
97f18414 | 458 | |
06c66034 | 459 | nfc_hci_recv_frame(phy->hdev, NULL); |
97f18414 | 460 | |
06c66034 EL |
461 | return IRQ_HANDLED; |
462 | } else if ((r == -ENOMEM) || (r == -EBADMSG)) { | |
463 | return IRQ_HANDLED; | |
464 | } | |
97f18414 | 465 | |
06c66034 EL |
466 | nfc_hci_recv_frame(phy->hdev, skb); |
467 | } | |
97f18414 EL |
468 | return IRQ_HANDLED; |
469 | } | |
470 | ||
471 | static struct nfc_phy_ops i2c_phy_ops = { | |
472 | .write = pn544_hci_i2c_write, | |
473 | .enable = pn544_hci_i2c_enable, | |
474 | .disable = pn544_hci_i2c_disable, | |
475 | }; | |
476 | ||
06c66034 EL |
477 | static int pn544_hci_i2c_fw_download(void *phy_id, const char *firmware_name) |
478 | { | |
479 | struct pn544_i2c_phy *phy = phy_id; | |
480 | ||
481 | pr_info(DRIVER_DESC ": Starting Firmware Download (%s)\n", | |
482 | firmware_name); | |
483 | ||
484 | strcpy(phy->firmware_name, firmware_name); | |
485 | ||
486 | phy->fw_work_state = FW_WORK_STATE_START; | |
487 | ||
488 | schedule_work(&phy->fw_work); | |
489 | ||
490 | return 0; | |
491 | } | |
492 | ||
493 | static void pn544_hci_i2c_fw_work_complete(struct pn544_i2c_phy *phy, | |
494 | int result) | |
495 | { | |
496 | pr_info(DRIVER_DESC ": Firmware Download Complete, result=%d\n", result); | |
497 | ||
498 | pn544_hci_i2c_disable(phy); | |
499 | ||
500 | phy->fw_work_state = FW_WORK_STATE_IDLE; | |
501 | ||
502 | if (phy->fw) { | |
503 | release_firmware(phy->fw); | |
504 | phy->fw = NULL; | |
505 | } | |
506 | ||
507 | nfc_fw_download_done(phy->hdev->ndev, phy->firmware_name, (u32) -result); | |
508 | } | |
509 | ||
510 | static int pn544_hci_i2c_fw_write_cmd(struct i2c_client *client, u32 dest_addr, | |
511 | const u8 *data, u16 datalen) | |
512 | { | |
513 | u8 frame[PN544_FW_I2C_MAX_PAYLOAD]; | |
514 | struct pn544_i2c_fw_frame_write *framep; | |
515 | u16 params_len; | |
516 | int framelen; | |
517 | int r; | |
518 | ||
519 | if (datalen > PN544_FW_I2C_WRITE_DATA_MAX_LEN) | |
520 | datalen = PN544_FW_I2C_WRITE_DATA_MAX_LEN; | |
521 | ||
522 | framep = (struct pn544_i2c_fw_frame_write *) frame; | |
523 | ||
524 | params_len = sizeof(framep->be_dest_addr) + | |
525 | sizeof(framep->be_datalen) + datalen; | |
526 | framelen = params_len + sizeof(framep->cmd) + | |
527 | sizeof(framep->be_length); | |
528 | ||
529 | framep->cmd = PN544_FW_CMD_WRITE; | |
530 | ||
531 | put_unaligned_be16(params_len, &framep->be_length); | |
532 | ||
533 | framep->be_dest_addr[0] = (dest_addr & 0xff0000) >> 16; | |
534 | framep->be_dest_addr[1] = (dest_addr & 0xff00) >> 8; | |
535 | framep->be_dest_addr[2] = dest_addr & 0xff; | |
536 | ||
537 | put_unaligned_be16(datalen, &framep->be_datalen); | |
538 | ||
539 | memcpy(framep->data, data, datalen); | |
540 | ||
541 | r = i2c_master_send(client, frame, framelen); | |
542 | ||
543 | if (r == framelen) | |
544 | return datalen; | |
545 | else if (r < 0) | |
546 | return r; | |
547 | else | |
548 | return -EIO; | |
549 | } | |
550 | ||
551 | static int pn544_hci_i2c_fw_check_cmd(struct i2c_client *client, u32 start_addr, | |
552 | const u8 *data, u16 datalen) | |
553 | { | |
554 | struct pn544_i2c_fw_frame_check frame; | |
555 | int r; | |
556 | u16 crc; | |
557 | ||
558 | /* calculate local crc for the data we want to check */ | |
559 | crc = crc_ccitt(0xffff, data, datalen); | |
560 | ||
561 | frame.cmd = PN544_FW_CMD_CHECK; | |
562 | ||
563 | put_unaligned_be16(sizeof(frame.be_start_addr) + | |
564 | sizeof(frame.be_datalen) + sizeof(frame.be_crc), | |
565 | &frame.be_length); | |
566 | ||
567 | /* tell the chip the memory region to which our crc applies */ | |
568 | frame.be_start_addr[0] = (start_addr & 0xff0000) >> 16; | |
569 | frame.be_start_addr[1] = (start_addr & 0xff00) >> 8; | |
570 | frame.be_start_addr[2] = start_addr & 0xff; | |
571 | ||
572 | put_unaligned_be16(datalen, &frame.be_datalen); | |
573 | ||
574 | /* | |
575 | * and give our local crc. Chip will calculate its own crc for the | |
576 | * region and compare with ours. | |
577 | */ | |
578 | put_unaligned_be16(crc, &frame.be_crc); | |
579 | ||
580 | r = i2c_master_send(client, (const char *) &frame, sizeof(frame)); | |
581 | ||
582 | if (r == sizeof(frame)) | |
583 | return 0; | |
584 | else if (r < 0) | |
585 | return r; | |
586 | else | |
587 | return -EIO; | |
588 | } | |
589 | ||
590 | static int pn544_hci_i2c_fw_write_chunk(struct pn544_i2c_phy *phy) | |
591 | { | |
592 | int r; | |
593 | ||
594 | r = pn544_hci_i2c_fw_write_cmd(phy->i2c_dev, | |
595 | phy->fw_blob_dest_addr + phy->fw_written, | |
596 | phy->fw_blob_data + phy->fw_written, | |
597 | phy->fw_blob_size - phy->fw_written); | |
598 | if (r < 0) | |
599 | return r; | |
600 | ||
601 | phy->fw_written += r; | |
602 | phy->fw_work_state = FW_WORK_STATE_WAIT_WRITE_ANSWER; | |
603 | ||
604 | return 0; | |
605 | } | |
606 | ||
607 | static void pn544_hci_i2c_fw_work(struct work_struct *work) | |
608 | { | |
609 | struct pn544_i2c_phy *phy = container_of(work, struct pn544_i2c_phy, | |
610 | fw_work); | |
611 | int r; | |
612 | struct pn544_i2c_fw_blob *blob; | |
613 | ||
614 | switch (phy->fw_work_state) { | |
615 | case FW_WORK_STATE_START: | |
616 | pn544_hci_i2c_enable_mode(phy, PN544_FW_MODE); | |
617 | ||
618 | r = request_firmware(&phy->fw, phy->firmware_name, | |
619 | &phy->i2c_dev->dev); | |
620 | if (r < 0) | |
621 | goto exit_state_start; | |
622 | ||
623 | blob = (struct pn544_i2c_fw_blob *) phy->fw->data; | |
624 | phy->fw_blob_size = get_unaligned_be32(&blob->be_size); | |
625 | phy->fw_blob_dest_addr = get_unaligned_be32(&blob->be_destaddr); | |
626 | phy->fw_blob_data = blob->data; | |
627 | ||
628 | phy->fw_written = 0; | |
629 | r = pn544_hci_i2c_fw_write_chunk(phy); | |
630 | ||
631 | exit_state_start: | |
632 | if (r < 0) | |
633 | pn544_hci_i2c_fw_work_complete(phy, r); | |
634 | break; | |
635 | ||
636 | case FW_WORK_STATE_WAIT_WRITE_ANSWER: | |
637 | r = phy->fw_cmd_result; | |
638 | if (r < 0) | |
639 | goto exit_state_wait_write_answer; | |
640 | ||
641 | if (phy->fw_written == phy->fw_blob_size) { | |
642 | r = pn544_hci_i2c_fw_check_cmd(phy->i2c_dev, | |
643 | phy->fw_blob_dest_addr, | |
644 | phy->fw_blob_data, | |
645 | phy->fw_blob_size); | |
646 | if (r < 0) | |
647 | goto exit_state_wait_write_answer; | |
648 | phy->fw_work_state = FW_WORK_STATE_WAIT_CHECK_ANSWER; | |
649 | break; | |
650 | } | |
651 | ||
652 | r = pn544_hci_i2c_fw_write_chunk(phy); | |
653 | ||
654 | exit_state_wait_write_answer: | |
655 | if (r < 0) | |
656 | pn544_hci_i2c_fw_work_complete(phy, r); | |
657 | break; | |
658 | ||
659 | case FW_WORK_STATE_WAIT_CHECK_ANSWER: | |
660 | r = phy->fw_cmd_result; | |
661 | if (r < 0) | |
662 | goto exit_state_wait_check_answer; | |
663 | ||
664 | blob = (struct pn544_i2c_fw_blob *) (phy->fw_blob_data + | |
665 | phy->fw_blob_size); | |
666 | phy->fw_blob_size = get_unaligned_be32(&blob->be_size); | |
667 | if (phy->fw_blob_size != 0) { | |
668 | phy->fw_blob_dest_addr = | |
669 | get_unaligned_be32(&blob->be_destaddr); | |
670 | phy->fw_blob_data = blob->data; | |
671 | ||
672 | phy->fw_written = 0; | |
673 | r = pn544_hci_i2c_fw_write_chunk(phy); | |
674 | } | |
675 | ||
676 | exit_state_wait_check_answer: | |
677 | if (r < 0 || phy->fw_blob_size == 0) | |
678 | pn544_hci_i2c_fw_work_complete(phy, r); | |
679 | break; | |
680 | ||
681 | default: | |
682 | break; | |
683 | } | |
684 | } | |
685 | ||
0fe763c5 GKH |
686 | static int pn544_hci_i2c_probe(struct i2c_client *client, |
687 | const struct i2c_device_id *id) | |
97f18414 EL |
688 | { |
689 | struct pn544_i2c_phy *phy; | |
690 | struct pn544_nfc_platform_data *pdata; | |
691 | int r = 0; | |
692 | ||
693 | dev_dbg(&client->dev, "%s\n", __func__); | |
694 | dev_dbg(&client->dev, "IRQ: %d\n", client->irq); | |
695 | ||
696 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
697 | dev_err(&client->dev, "Need I2C_FUNC_I2C\n"); | |
698 | return -ENODEV; | |
699 | } | |
700 | ||
a0f36536 SO |
701 | phy = devm_kzalloc(&client->dev, sizeof(struct pn544_i2c_phy), |
702 | GFP_KERNEL); | |
97f18414 EL |
703 | if (!phy) { |
704 | dev_err(&client->dev, | |
705 | "Cannot allocate memory for pn544 i2c phy.\n"); | |
a0f36536 | 706 | return -ENOMEM; |
97f18414 EL |
707 | } |
708 | ||
06c66034 EL |
709 | INIT_WORK(&phy->fw_work, pn544_hci_i2c_fw_work); |
710 | phy->fw_work_state = FW_WORK_STATE_IDLE; | |
711 | ||
97f18414 EL |
712 | phy->i2c_dev = client; |
713 | i2c_set_clientdata(client, phy); | |
714 | ||
715 | pdata = client->dev.platform_data; | |
716 | if (pdata == NULL) { | |
717 | dev_err(&client->dev, "No platform data\n"); | |
a0f36536 | 718 | return -EINVAL; |
97f18414 EL |
719 | } |
720 | ||
721 | if (pdata->request_resources == NULL) { | |
722 | dev_err(&client->dev, "request_resources() missing\n"); | |
a0f36536 | 723 | return -EINVAL; |
97f18414 EL |
724 | } |
725 | ||
726 | r = pdata->request_resources(client); | |
727 | if (r) { | |
728 | dev_err(&client->dev, "Cannot get platform resources\n"); | |
a0f36536 | 729 | return r; |
97f18414 EL |
730 | } |
731 | ||
732 | phy->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE); | |
733 | phy->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET); | |
734 | phy->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ); | |
735 | ||
736 | pn544_hci_i2c_platform_init(phy); | |
737 | ||
738 | r = request_threaded_irq(client->irq, NULL, pn544_hci_i2c_irq_thread_fn, | |
739 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | |
740 | PN544_HCI_I2C_DRIVER_NAME, phy); | |
741 | if (r < 0) { | |
742 | dev_err(&client->dev, "Unable to register IRQ handler\n"); | |
743 | goto err_rti; | |
744 | } | |
745 | ||
746 | r = pn544_hci_probe(phy, &i2c_phy_ops, LLC_SHDLC_NAME, | |
747 | PN544_I2C_FRAME_HEADROOM, PN544_I2C_FRAME_TAILROOM, | |
06c66034 EL |
748 | PN544_HCI_I2C_LLC_MAX_PAYLOAD, |
749 | pn544_hci_i2c_fw_download, &phy->hdev); | |
97f18414 EL |
750 | if (r < 0) |
751 | goto err_hci; | |
752 | ||
753 | return 0; | |
754 | ||
755 | err_hci: | |
756 | free_irq(client->irq, phy); | |
757 | ||
758 | err_rti: | |
759 | if (pdata->free_resources != NULL) | |
760 | pdata->free_resources(); | |
761 | ||
97f18414 EL |
762 | return r; |
763 | } | |
764 | ||
0fe763c5 | 765 | static int pn544_hci_i2c_remove(struct i2c_client *client) |
97f18414 EL |
766 | { |
767 | struct pn544_i2c_phy *phy = i2c_get_clientdata(client); | |
768 | struct pn544_nfc_platform_data *pdata = client->dev.platform_data; | |
769 | ||
770 | dev_dbg(&client->dev, "%s\n", __func__); | |
771 | ||
06c66034 EL |
772 | cancel_work_sync(&phy->fw_work); |
773 | if (phy->fw_work_state != FW_WORK_STATE_IDLE) | |
774 | pn544_hci_i2c_fw_work_complete(phy, -ENODEV); | |
775 | ||
97f18414 EL |
776 | pn544_hci_remove(phy->hdev); |
777 | ||
778 | if (phy->powered) | |
779 | pn544_hci_i2c_disable(phy); | |
780 | ||
781 | free_irq(client->irq, phy); | |
782 | if (pdata->free_resources) | |
783 | pdata->free_resources(); | |
784 | ||
97f18414 EL |
785 | return 0; |
786 | } | |
787 | ||
788 | static struct i2c_driver pn544_hci_i2c_driver = { | |
789 | .driver = { | |
790 | .name = PN544_HCI_I2C_DRIVER_NAME, | |
791 | }, | |
792 | .probe = pn544_hci_i2c_probe, | |
793 | .id_table = pn544_hci_i2c_id_table, | |
0fe763c5 | 794 | .remove = pn544_hci_i2c_remove, |
97f18414 EL |
795 | }; |
796 | ||
234d4d6b | 797 | module_i2c_driver(pn544_hci_i2c_driver); |
97f18414 EL |
798 | |
799 | MODULE_LICENSE("GPL"); | |
800 | MODULE_DESCRIPTION(DRIVER_DESC); |