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68957303 CR |
1 | /* |
2 | * I2C Link Layer for ST21NFCA HCI based Driver | |
3 | * Copyright (C) 2014 STMicroelectronics SAS. All rights reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
16 | */ | |
17 | ||
18 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
19 | ||
20 | #include <linux/crc-ccitt.h> | |
21 | #include <linux/module.h> | |
22 | #include <linux/i2c.h> | |
23 | #include <linux/gpio.h> | |
c44cb2ed CR |
24 | #include <linux/of_irq.h> |
25 | #include <linux/of_gpio.h> | |
68957303 CR |
26 | #include <linux/miscdevice.h> |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/delay.h> | |
29 | #include <linux/nfc.h> | |
30 | #include <linux/firmware.h> | |
68957303 | 31 | #include <linux/platform_data/st21nfca.h> |
db083bcb | 32 | #include <asm/unaligned.h> |
68957303 CR |
33 | |
34 | #include <net/nfc/hci.h> | |
35 | #include <net/nfc/llc.h> | |
36 | #include <net/nfc/nfc.h> | |
37 | ||
38 | #include "st21nfca.h" | |
39 | ||
40 | /* | |
41 | * Every frame starts with ST21NFCA_SOF_EOF and ends with ST21NFCA_SOF_EOF. | |
42 | * Because ST21NFCA_SOF_EOF is a possible data value, there is a mecanism | |
43 | * called byte stuffing has been introduced. | |
44 | * | |
45 | * if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING | |
46 | * - insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte) | |
47 | * - xor byte with ST21NFCA_BYTE_STUFFING_MASK | |
48 | */ | |
49 | #define ST21NFCA_SOF_EOF 0x7e | |
50 | #define ST21NFCA_BYTE_STUFFING_MASK 0x20 | |
51 | #define ST21NFCA_ESCAPE_BYTE_STUFFING 0x7d | |
52 | ||
e1fb97b9 | 53 | /* SOF + 00 */ |
68957303 CR |
54 | #define ST21NFCA_FRAME_HEADROOM 2 |
55 | ||
e1fb97b9 CR |
56 | /* 2 bytes crc + EOF */ |
57 | #define ST21NFCA_FRAME_TAILROOM 3 | |
c97ffdbf CR |
58 | #define IS_START_OF_FRAME(buf) (buf[0] == ST21NFCA_SOF_EOF && \ |
59 | buf[1] == 0) | |
68957303 CR |
60 | |
61 | #define ST21NFCA_HCI_I2C_DRIVER_NAME "st21nfca_hci_i2c" | |
62 | ||
63 | static struct i2c_device_id st21nfca_hci_i2c_id_table[] = { | |
64 | {ST21NFCA_HCI_DRIVER_NAME, 0}, | |
65 | {} | |
66 | }; | |
67 | ||
68 | MODULE_DEVICE_TABLE(i2c, st21nfca_hci_i2c_id_table); | |
69 | ||
70 | struct st21nfca_i2c_phy { | |
71 | struct i2c_client *i2c_dev; | |
72 | struct nfc_hci_dev *hdev; | |
73 | ||
74 | unsigned int gpio_ena; | |
68957303 CR |
75 | unsigned int irq_polarity; |
76 | ||
77 | struct sk_buff *pending_skb; | |
78 | int current_read_len; | |
79 | /* | |
80 | * crc might have fail because i2c macro | |
81 | * is disable due to other interface activity | |
82 | */ | |
83 | int crc_trials; | |
84 | ||
85 | int powered; | |
86 | int run_mode; | |
87 | ||
88 | /* | |
89 | * < 0 if hardware error occured (e.g. i2c err) | |
90 | * and prevents normal operation. | |
91 | */ | |
92 | int hard_fault; | |
a3c5d8fb | 93 | struct mutex phy_lock; |
68957303 | 94 | }; |
0531107e | 95 | static u8 len_seq[] = { 16, 24, 12, 29 }; |
68957303 CR |
96 | static u16 wait_tab[] = { 2, 3, 5, 15, 20, 40}; |
97 | ||
98 | #define I2C_DUMP_SKB(info, skb) \ | |
99 | do { \ | |
100 | pr_debug("%s:\n", info); \ | |
101 | print_hex_dump(KERN_DEBUG, "i2c: ", DUMP_PREFIX_OFFSET, \ | |
102 | 16, 1, (skb)->data, (skb)->len, 0); \ | |
103 | } while (0) | |
104 | ||
18d2c624 CR |
105 | /* |
106 | * In order to get the CLF in a known state we generate an internal reboot | |
107 | * using a proprietary command. | |
108 | * Once the reboot is completed, we expect to receive a ST21NFCA_SOF_EOF | |
109 | * fill buffer. | |
110 | */ | |
111 | static int st21nfca_hci_platform_init(struct st21nfca_i2c_phy *phy) | |
68957303 | 112 | { |
c5b0c370 | 113 | u16 wait_reboot[] = { 50, 300, 1000 }; |
68957303 CR |
114 | char reboot_cmd[] = { 0x7E, 0x66, 0x48, 0xF6, 0x7E }; |
115 | u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE]; | |
116 | int i, r = -1; | |
117 | ||
18d2c624 CR |
118 | for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) { |
119 | r = i2c_master_send(phy->i2c_dev, reboot_cmd, | |
120 | sizeof(reboot_cmd)); | |
121 | if (r < 0) | |
122 | msleep(wait_reboot[i]); | |
123 | } | |
124 | if (r < 0) | |
125 | return r; | |
126 | ||
127 | /* CLF is spending about 20ms to do an internal reboot */ | |
128 | msleep(20); | |
129 | r = -1; | |
130 | for (i = 0; i < ARRAY_SIZE(wait_reboot) && r < 0; i++) { | |
68957303 CR |
131 | r = i2c_master_recv(phy->i2c_dev, tmp, |
132 | ST21NFCA_HCI_LLC_MAX_SIZE); | |
18d2c624 CR |
133 | if (r < 0) |
134 | msleep(wait_reboot[i]); | |
135 | } | |
136 | if (r < 0) | |
137 | return r; | |
68957303 | 138 | |
18d2c624 CR |
139 | for (i = 0; i < ST21NFCA_HCI_LLC_MAX_SIZE && |
140 | tmp[i] == ST21NFCA_SOF_EOF; i++) | |
141 | ; | |
142 | ||
143 | if (r != ST21NFCA_HCI_LLC_MAX_SIZE) | |
144 | return -ENODEV; | |
68957303 | 145 | |
18d2c624 CR |
146 | usleep_range(1000, 1500); |
147 | return 0; | |
68957303 CR |
148 | } |
149 | ||
150 | static int st21nfca_hci_i2c_enable(void *phy_id) | |
151 | { | |
152 | struct st21nfca_i2c_phy *phy = phy_id; | |
153 | ||
154 | gpio_set_value(phy->gpio_ena, 1); | |
155 | phy->powered = 1; | |
156 | phy->run_mode = ST21NFCA_HCI_MODE; | |
157 | ||
158 | usleep_range(10000, 15000); | |
159 | ||
160 | return 0; | |
161 | } | |
162 | ||
163 | static void st21nfca_hci_i2c_disable(void *phy_id) | |
164 | { | |
165 | struct st21nfca_i2c_phy *phy = phy_id; | |
166 | ||
167 | pr_info("\n"); | |
168 | gpio_set_value(phy->gpio_ena, 0); | |
169 | ||
170 | phy->powered = 0; | |
171 | } | |
172 | ||
e1fb97b9 | 173 | static void st21nfca_hci_add_len_crc(struct sk_buff *skb) |
68957303 | 174 | { |
68957303 CR |
175 | u16 crc; |
176 | u8 tmp; | |
177 | ||
178 | *skb_push(skb, 1) = 0; | |
179 | ||
180 | crc = crc_ccitt(0xffff, skb->data, skb->len); | |
181 | crc = ~crc; | |
182 | ||
183 | tmp = crc & 0x00ff; | |
184 | *skb_put(skb, 1) = tmp; | |
185 | ||
186 | tmp = (crc >> 8) & 0x00ff; | |
187 | *skb_put(skb, 1) = tmp; | |
68957303 CR |
188 | } |
189 | ||
e1fb97b9 | 190 | static void st21nfca_hci_remove_len_crc(struct sk_buff *skb) |
68957303 CR |
191 | { |
192 | skb_pull(skb, ST21NFCA_FRAME_HEADROOM); | |
e1fb97b9 | 193 | skb_trim(skb, skb->len - ST21NFCA_FRAME_TAILROOM); |
68957303 CR |
194 | } |
195 | ||
196 | /* | |
197 | * Writing a frame must not return the number of written bytes. | |
198 | * It must return either zero for success, or <0 for error. | |
199 | * In addition, it must not alter the skb | |
200 | */ | |
201 | static int st21nfca_hci_i2c_write(void *phy_id, struct sk_buff *skb) | |
202 | { | |
e1fb97b9 | 203 | int r = -1, i, j; |
68957303 CR |
204 | struct st21nfca_i2c_phy *phy = phy_id; |
205 | struct i2c_client *client = phy->i2c_dev; | |
68957303 CR |
206 | u8 tmp[ST21NFCA_HCI_LLC_MAX_SIZE * 2]; |
207 | ||
208 | I2C_DUMP_SKB("st21nfca_hci_i2c_write", skb); | |
209 | ||
210 | ||
211 | if (phy->hard_fault != 0) | |
212 | return phy->hard_fault; | |
213 | ||
214 | /* | |
215 | * Compute CRC before byte stuffing computation on frame | |
216 | * Note st21nfca_hci_add_len_crc is doing a byte stuffing | |
217 | * on its own value | |
218 | */ | |
e1fb97b9 | 219 | st21nfca_hci_add_len_crc(skb); |
68957303 CR |
220 | |
221 | /* add ST21NFCA_SOF_EOF on tail */ | |
222 | *skb_put(skb, 1) = ST21NFCA_SOF_EOF; | |
223 | /* add ST21NFCA_SOF_EOF on head */ | |
224 | *skb_push(skb, 1) = ST21NFCA_SOF_EOF; | |
225 | ||
226 | /* | |
227 | * Compute byte stuffing | |
228 | * if byte == ST21NFCA_SOF_EOF or ST21NFCA_ESCAPE_BYTE_STUFFING | |
229 | * insert ST21NFCA_ESCAPE_BYTE_STUFFING (escape byte) | |
230 | * xor byte with ST21NFCA_BYTE_STUFFING_MASK | |
231 | */ | |
232 | tmp[0] = skb->data[0]; | |
233 | for (i = 1, j = 1; i < skb->len - 1; i++, j++) { | |
234 | if (skb->data[i] == ST21NFCA_SOF_EOF | |
235 | || skb->data[i] == ST21NFCA_ESCAPE_BYTE_STUFFING) { | |
236 | tmp[j] = ST21NFCA_ESCAPE_BYTE_STUFFING; | |
237 | j++; | |
238 | tmp[j] = skb->data[i] ^ ST21NFCA_BYTE_STUFFING_MASK; | |
239 | } else { | |
240 | tmp[j] = skb->data[i]; | |
241 | } | |
242 | } | |
243 | tmp[j] = skb->data[i]; | |
244 | j++; | |
245 | ||
246 | /* | |
247 | * Manage sleep mode | |
248 | * Try 3 times to send data with delay between each | |
249 | */ | |
a3c5d8fb | 250 | mutex_lock(&phy->phy_lock); |
68957303 CR |
251 | for (i = 0; i < ARRAY_SIZE(wait_tab) && r < 0; i++) { |
252 | r = i2c_master_send(client, tmp, j); | |
253 | if (r < 0) | |
254 | msleep(wait_tab[i]); | |
255 | } | |
a3c5d8fb | 256 | mutex_unlock(&phy->phy_lock); |
68957303 CR |
257 | |
258 | if (r >= 0) { | |
259 | if (r != j) | |
260 | r = -EREMOTEIO; | |
261 | else | |
262 | r = 0; | |
263 | } | |
264 | ||
e1fb97b9 | 265 | st21nfca_hci_remove_len_crc(skb); |
68957303 CR |
266 | |
267 | return r; | |
268 | } | |
269 | ||
270 | static int get_frame_size(u8 *buf, int buflen) | |
271 | { | |
272 | int len = 0; | |
3e6df919 | 273 | |
68957303 CR |
274 | if (buf[len + 1] == ST21NFCA_SOF_EOF) |
275 | return 0; | |
276 | ||
277 | for (len = 1; len < buflen && buf[len] != ST21NFCA_SOF_EOF; len++) | |
278 | ; | |
279 | ||
280 | return len; | |
281 | } | |
282 | ||
283 | static int check_crc(u8 *buf, int buflen) | |
284 | { | |
285 | u16 crc; | |
286 | ||
287 | crc = crc_ccitt(0xffff, buf, buflen - 2); | |
288 | crc = ~crc; | |
289 | ||
290 | if (buf[buflen - 2] != (crc & 0xff) || buf[buflen - 1] != (crc >> 8)) { | |
291 | pr_err(ST21NFCA_HCI_DRIVER_NAME | |
292 | ": CRC error 0x%x != 0x%x 0x%x\n", crc, buf[buflen - 1], | |
293 | buf[buflen - 2]); | |
294 | ||
295 | pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__); | |
296 | print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE, | |
297 | 16, 2, buf, buflen, false); | |
298 | return -EPERM; | |
299 | } | |
300 | return 0; | |
301 | } | |
302 | ||
303 | /* | |
304 | * Prepare received data for upper layer. | |
305 | * Received data include byte stuffing, crc and sof/eof | |
306 | * which is not usable by hci part. | |
307 | * returns: | |
308 | * frame size without sof/eof, header and byte stuffing | |
309 | * -EBADMSG : frame was incorrect and discarded | |
310 | */ | |
311 | static int st21nfca_hci_i2c_repack(struct sk_buff *skb) | |
312 | { | |
313 | int i, j, r, size; | |
3e6df919 | 314 | |
68957303 CR |
315 | if (skb->len < 1 || (skb->len > 1 && skb->data[1] != 0)) |
316 | return -EBADMSG; | |
317 | ||
318 | size = get_frame_size(skb->data, skb->len); | |
319 | if (size > 0) { | |
320 | skb_trim(skb, size); | |
321 | /* remove ST21NFCA byte stuffing for upper layer */ | |
322 | for (i = 1, j = 0; i < skb->len; i++) { | |
3096e25a | 323 | if (skb->data[i + j] == |
68957303 | 324 | (u8) ST21NFCA_ESCAPE_BYTE_STUFFING) { |
3096e25a CR |
325 | skb->data[i] = skb->data[i + j + 1] |
326 | | ST21NFCA_BYTE_STUFFING_MASK; | |
68957303 CR |
327 | i++; |
328 | j++; | |
329 | } | |
330 | skb->data[i] = skb->data[i + j]; | |
331 | } | |
332 | /* remove byte stuffing useless byte */ | |
333 | skb_trim(skb, i - j); | |
334 | /* remove ST21NFCA_SOF_EOF from head */ | |
335 | skb_pull(skb, 1); | |
336 | ||
337 | r = check_crc(skb->data, skb->len); | |
338 | if (r != 0) { | |
339 | i = 0; | |
340 | return -EBADMSG; | |
341 | } | |
342 | ||
343 | /* remove headbyte */ | |
344 | skb_pull(skb, 1); | |
345 | /* remove crc. Byte Stuffing is already removed here */ | |
346 | skb_trim(skb, skb->len - 2); | |
347 | return skb->len; | |
348 | } | |
349 | return 0; | |
350 | } | |
351 | ||
352 | /* | |
353 | * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees | |
354 | * that i2c bus will be flushed and that next read will start on a new frame. | |
355 | * returned skb contains only LLC header and payload. | |
356 | * returns: | |
357 | * frame size : if received frame is complete (find ST21NFCA_SOF_EOF at | |
358 | * end of read) | |
359 | * -EAGAIN : if received frame is incomplete (not find ST21NFCA_SOF_EOF | |
360 | * at end of read) | |
361 | * -EREMOTEIO : i2c read error (fatal) | |
362 | * -EBADMSG : frame was incorrect and discarded | |
363 | * (value returned from st21nfca_hci_i2c_repack) | |
364 | * -EIO : if no ST21NFCA_SOF_EOF is found after reaching | |
365 | * the read length end sequence | |
366 | */ | |
367 | static int st21nfca_hci_i2c_read(struct st21nfca_i2c_phy *phy, | |
368 | struct sk_buff *skb) | |
369 | { | |
370 | int r, i; | |
371 | u8 len; | |
c97ffdbf | 372 | u8 buf[ST21NFCA_HCI_LLC_MAX_PAYLOAD]; |
68957303 CR |
373 | struct i2c_client *client = phy->i2c_dev; |
374 | ||
375 | if (phy->current_read_len < ARRAY_SIZE(len_seq)) { | |
376 | len = len_seq[phy->current_read_len]; | |
377 | ||
378 | /* | |
379 | * Add retry mecanism | |
380 | * Operation on I2C interface may fail in case of operation on | |
381 | * RF or SWP interface | |
382 | */ | |
383 | r = 0; | |
a3c5d8fb | 384 | mutex_lock(&phy->phy_lock); |
68957303 | 385 | for (i = 0; i < ARRAY_SIZE(wait_tab) && r <= 0; i++) { |
c97ffdbf | 386 | r = i2c_master_recv(client, buf, len); |
68957303 CR |
387 | if (r < 0) |
388 | msleep(wait_tab[i]); | |
389 | } | |
a3c5d8fb | 390 | mutex_unlock(&phy->phy_lock); |
68957303 CR |
391 | |
392 | if (r != len) { | |
393 | phy->current_read_len = 0; | |
394 | return -EREMOTEIO; | |
395 | } | |
396 | ||
c97ffdbf CR |
397 | /* |
398 | * The first read sequence does not start with SOF. | |
399 | * Data is corrupeted so we drop it. | |
400 | */ | |
8e9466cc | 401 | if (!phy->current_read_len && !IS_START_OF_FRAME(buf)) { |
c97ffdbf CR |
402 | skb_trim(skb, 0); |
403 | phy->current_read_len = 0; | |
404 | return -EIO; | |
8e9466cc | 405 | } else if (phy->current_read_len && IS_START_OF_FRAME(buf)) { |
c97ffdbf CR |
406 | /* |
407 | * Previous frame transmission was interrupted and | |
408 | * the frame got repeated. | |
409 | * Received frame start with ST21NFCA_SOF_EOF + 00. | |
410 | */ | |
411 | skb_trim(skb, 0); | |
412 | phy->current_read_len = 0; | |
413 | } | |
414 | ||
415 | memcpy(skb_put(skb, len), buf, len); | |
416 | ||
417 | if (skb->data[skb->len - 1] == ST21NFCA_SOF_EOF) { | |
68957303 CR |
418 | phy->current_read_len = 0; |
419 | return st21nfca_hci_i2c_repack(skb); | |
420 | } | |
421 | phy->current_read_len++; | |
422 | return -EAGAIN; | |
423 | } | |
424 | return -EIO; | |
425 | } | |
426 | ||
427 | /* | |
428 | * Reads an shdlc frame from the chip. This is not as straightforward as it | |
429 | * seems. The frame format is data-crc, and corruption can occur anywhere | |
430 | * while transiting on i2c bus, such that we could read an invalid data. | |
431 | * The tricky case is when we read a corrupted data or crc. We must detect | |
432 | * this here in order to determine that data can be transmitted to the hci | |
433 | * core. This is the reason why we check the crc here. | |
434 | * The CLF will repeat a frame until we send a RR on that frame. | |
435 | * | |
436 | * On ST21NFCA, IRQ goes in idle when read starts. As no size information are | |
437 | * available in the incoming data, other IRQ might come. Every IRQ will trigger | |
438 | * a read sequence with different length and will fill the current frame. | |
439 | * The reception is complete once we reach a ST21NFCA_SOF_EOF. | |
440 | */ | |
441 | static irqreturn_t st21nfca_hci_irq_thread_fn(int irq, void *phy_id) | |
442 | { | |
443 | struct st21nfca_i2c_phy *phy = phy_id; | |
444 | struct i2c_client *client; | |
445 | ||
446 | int r; | |
447 | ||
448 | if (!phy || irq != phy->i2c_dev->irq) { | |
449 | WARN_ON_ONCE(1); | |
450 | return IRQ_NONE; | |
451 | } | |
452 | ||
453 | client = phy->i2c_dev; | |
454 | dev_dbg(&client->dev, "IRQ\n"); | |
455 | ||
456 | if (phy->hard_fault != 0) | |
457 | return IRQ_HANDLED; | |
458 | ||
459 | r = st21nfca_hci_i2c_read(phy, phy->pending_skb); | |
460 | if (r == -EREMOTEIO) { | |
461 | phy->hard_fault = r; | |
462 | ||
463 | nfc_hci_recv_frame(phy->hdev, NULL); | |
464 | ||
465 | return IRQ_HANDLED; | |
466 | } else if (r == -EAGAIN || r == -EIO) { | |
467 | return IRQ_HANDLED; | |
468 | } else if (r == -EBADMSG && phy->crc_trials < ARRAY_SIZE(wait_tab)) { | |
469 | /* | |
470 | * With ST21NFCA, only one interface (I2C, RF or SWP) | |
471 | * may be active at a time. | |
472 | * Having incorrect crc is usually due to i2c macrocell | |
473 | * deactivation in the middle of a transmission. | |
474 | * It may generate corrupted data on i2c. | |
475 | * We give sometime to get i2c back. | |
476 | * The complete frame will be repeated. | |
477 | */ | |
478 | msleep(wait_tab[phy->crc_trials]); | |
479 | phy->crc_trials++; | |
480 | phy->current_read_len = 0; | |
0c942b00 | 481 | kfree_skb(phy->pending_skb); |
68957303 CR |
482 | } else if (r > 0) { |
483 | /* | |
484 | * We succeeded to read data from the CLF and | |
485 | * data is valid. | |
486 | * Reset counter. | |
487 | */ | |
488 | nfc_hci_recv_frame(phy->hdev, phy->pending_skb); | |
489 | phy->crc_trials = 0; | |
cf577344 CR |
490 | } else { |
491 | kfree_skb(phy->pending_skb); | |
68957303 CR |
492 | } |
493 | ||
494 | phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL); | |
495 | if (phy->pending_skb == NULL) { | |
496 | phy->hard_fault = -ENOMEM; | |
497 | nfc_hci_recv_frame(phy->hdev, NULL); | |
498 | } | |
499 | ||
500 | return IRQ_HANDLED; | |
501 | } | |
502 | ||
503 | static struct nfc_phy_ops i2c_phy_ops = { | |
504 | .write = st21nfca_hci_i2c_write, | |
505 | .enable = st21nfca_hci_i2c_enable, | |
506 | .disable = st21nfca_hci_i2c_disable, | |
507 | }; | |
508 | ||
c44cb2ed CR |
509 | #ifdef CONFIG_OF |
510 | static int st21nfca_hci_i2c_of_request_resources(struct i2c_client *client) | |
511 | { | |
512 | struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client); | |
513 | struct device_node *pp; | |
514 | int gpio; | |
515 | int r; | |
516 | ||
517 | pp = client->dev.of_node; | |
518 | if (!pp) | |
519 | return -ENODEV; | |
520 | ||
521 | /* Get GPIO from device tree */ | |
522 | gpio = of_get_named_gpio(pp, "enable-gpios", 0); | |
523 | if (gpio < 0) { | |
524 | nfc_err(&client->dev, "Failed to retrieve enable-gpios from device tree\n"); | |
525 | return gpio; | |
526 | } | |
527 | ||
528 | /* GPIO request and configuration */ | |
0be8ce73 AL |
529 | r = devm_gpio_request_one(&client->dev, gpio, GPIOF_OUT_INIT_HIGH, |
530 | "clf_enable"); | |
c44cb2ed CR |
531 | if (r) { |
532 | nfc_err(&client->dev, "Failed to request enable pin\n"); | |
67df3f95 | 533 | return r; |
c44cb2ed CR |
534 | } |
535 | ||
c44cb2ed CR |
536 | phy->gpio_ena = gpio; |
537 | ||
40af86a4 | 538 | phy->irq_polarity = irq_get_trigger_type(client->irq); |
c44cb2ed CR |
539 | |
540 | return 0; | |
541 | } | |
542 | #else | |
543 | static int st21nfca_hci_i2c_of_request_resources(struct i2c_client *client) | |
544 | { | |
545 | return -ENODEV; | |
546 | } | |
547 | #endif | |
548 | ||
fcb45e6a | 549 | static int st21nfca_hci_i2c_request_resources(struct i2c_client *client) |
68957303 CR |
550 | { |
551 | struct st21nfca_nfc_platform_data *pdata; | |
fcb45e6a | 552 | struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client); |
68957303 CR |
553 | int r; |
554 | ||
555 | pdata = client->dev.platform_data; | |
556 | if (pdata == NULL) { | |
557 | nfc_err(&client->dev, "No platform data\n"); | |
558 | return -EINVAL; | |
559 | } | |
560 | ||
561 | /* store for later use */ | |
68957303 CR |
562 | phy->gpio_ena = pdata->gpio_ena; |
563 | phy->irq_polarity = pdata->irq_polarity; | |
68957303 | 564 | |
fcb45e6a | 565 | if (phy->gpio_ena > 0) { |
0be8ce73 AL |
566 | r = devm_gpio_request_one(&client->dev, phy->gpio_ena, |
567 | GPIOF_OUT_INIT_HIGH, "clf_enable"); | |
68957303 CR |
568 | if (r) { |
569 | pr_err("%s : ena gpio_request failed\n", __FILE__); | |
67df3f95 | 570 | return r; |
68957303 | 571 | } |
68957303 CR |
572 | } |
573 | ||
fcb45e6a | 574 | return 0; |
68957303 CR |
575 | } |
576 | ||
577 | static int st21nfca_hci_i2c_probe(struct i2c_client *client, | |
578 | const struct i2c_device_id *id) | |
579 | { | |
580 | struct st21nfca_i2c_phy *phy; | |
581 | struct st21nfca_nfc_platform_data *pdata; | |
fcb45e6a | 582 | int r; |
68957303 CR |
583 | |
584 | dev_dbg(&client->dev, "%s\n", __func__); | |
585 | dev_dbg(&client->dev, "IRQ: %d\n", client->irq); | |
586 | ||
587 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
588 | nfc_err(&client->dev, "Need I2C_FUNC_I2C\n"); | |
589 | return -ENODEV; | |
590 | } | |
591 | ||
592 | phy = devm_kzalloc(&client->dev, sizeof(struct st21nfca_i2c_phy), | |
593 | GFP_KERNEL); | |
594 | if (!phy) { | |
595 | nfc_err(&client->dev, | |
596 | "Cannot allocate memory for st21nfca i2c phy.\n"); | |
597 | return -ENOMEM; | |
598 | } | |
599 | ||
600 | phy->i2c_dev = client; | |
fcb45e6a CR |
601 | phy->pending_skb = alloc_skb(ST21NFCA_HCI_LLC_MAX_SIZE * 2, GFP_KERNEL); |
602 | if (phy->pending_skb == NULL) | |
603 | return -ENOMEM; | |
68957303 | 604 | |
fcb45e6a CR |
605 | phy->current_read_len = 0; |
606 | phy->crc_trials = 0; | |
a3c5d8fb | 607 | mutex_init(&phy->phy_lock); |
68957303 CR |
608 | i2c_set_clientdata(client, phy); |
609 | ||
610 | pdata = client->dev.platform_data; | |
c44cb2ed CR |
611 | if (!pdata && client->dev.of_node) { |
612 | r = st21nfca_hci_i2c_of_request_resources(client); | |
613 | if (r) { | |
614 | nfc_err(&client->dev, "No platform data\n"); | |
615 | return r; | |
616 | } | |
617 | } else if (pdata) { | |
618 | r = st21nfca_hci_i2c_request_resources(client); | |
619 | if (r) { | |
620 | nfc_err(&client->dev, "Cannot get platform resources\n"); | |
621 | return r; | |
622 | } | |
623 | } else { | |
624 | nfc_err(&client->dev, "st21nfca platform resources not available\n"); | |
fcb45e6a CR |
625 | return -ENODEV; |
626 | } | |
fcb45e6a | 627 | |
18d2c624 CR |
628 | r = st21nfca_hci_platform_init(phy); |
629 | if (r < 0) { | |
630 | nfc_err(&client->dev, "Unable to reboot st21nfca\n"); | |
67df3f95 | 631 | return r; |
18d2c624 CR |
632 | } |
633 | ||
68957303 CR |
634 | r = devm_request_threaded_irq(&client->dev, client->irq, NULL, |
635 | st21nfca_hci_irq_thread_fn, | |
636 | phy->irq_polarity | IRQF_ONESHOT, | |
637 | ST21NFCA_HCI_DRIVER_NAME, phy); | |
638 | if (r < 0) { | |
639 | nfc_err(&client->dev, "Unable to register IRQ handler\n"); | |
640 | return r; | |
641 | } | |
642 | ||
9bac75d0 | 643 | return st21nfca_hci_probe(phy, &i2c_phy_ops, LLC_SHDLC_NAME, |
68957303 CR |
644 | ST21NFCA_FRAME_HEADROOM, ST21NFCA_FRAME_TAILROOM, |
645 | ST21NFCA_HCI_LLC_MAX_PAYLOAD, &phy->hdev); | |
68957303 CR |
646 | } |
647 | ||
648 | static int st21nfca_hci_i2c_remove(struct i2c_client *client) | |
649 | { | |
650 | struct st21nfca_i2c_phy *phy = i2c_get_clientdata(client); | |
651 | ||
652 | dev_dbg(&client->dev, "%s\n", __func__); | |
653 | ||
654 | st21nfca_hci_remove(phy->hdev); | |
655 | ||
656 | if (phy->powered) | |
657 | st21nfca_hci_i2c_disable(phy); | |
658 | ||
659 | return 0; | |
660 | } | |
661 | ||
17e40107 | 662 | #ifdef CONFIG_OF |
c44cb2ed CR |
663 | static const struct of_device_id of_st21nfca_i2c_match[] = { |
664 | { .compatible = "st,st21nfca_i2c", }, | |
665 | {} | |
666 | }; | |
17e40107 CR |
667 | MODULE_DEVICE_TABLE(of, of_st21nfca_i2c_match); |
668 | #endif | |
c44cb2ed | 669 | |
68957303 CR |
670 | static struct i2c_driver st21nfca_hci_i2c_driver = { |
671 | .driver = { | |
fcb45e6a CR |
672 | .owner = THIS_MODULE, |
673 | .name = ST21NFCA_HCI_I2C_DRIVER_NAME, | |
c44cb2ed | 674 | .of_match_table = of_match_ptr(of_st21nfca_i2c_match), |
fcb45e6a | 675 | }, |
68957303 CR |
676 | .probe = st21nfca_hci_i2c_probe, |
677 | .id_table = st21nfca_hci_i2c_id_table, | |
678 | .remove = st21nfca_hci_i2c_remove, | |
679 | }; | |
680 | ||
681 | module_i2c_driver(st21nfca_hci_i2c_driver); | |
682 | ||
683 | MODULE_LICENSE("GPL"); | |
684 | MODULE_DESCRIPTION(DRIVER_DESC); |