]>
Commit | Line | Data |
---|---|---|
165063f1 MG |
1 | /* |
2 | * TI TRF7970a RFID/NFC Transceiver Driver | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com | |
5 | * | |
6 | * Author: Erick Macias <emacias@ti.com> | |
7 | * Author: Felipe Balbi <balbi@ti.com> | |
8 | * Author: Mark A. Greer <mgreer@animalcreek.com> | |
9 | * | |
10 | * This program is free software: you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 of | |
12 | * the License as published by the Free Software Foundation. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/device.h> | |
17 | #include <linux/netdevice.h> | |
18 | #include <linux/interrupt.h> | |
e6403b7c | 19 | #include <linux/pm_runtime.h> |
165063f1 MG |
20 | #include <linux/nfc.h> |
21 | #include <linux/skbuff.h> | |
22 | #include <linux/delay.h> | |
d34e48d6 | 23 | #include <linux/gpio/consumer.h> |
165063f1 | 24 | #include <linux/of.h> |
165063f1 MG |
25 | #include <linux/spi/spi.h> |
26 | #include <linux/regulator/consumer.h> | |
27 | ||
28 | #include <net/nfc/nfc.h> | |
29 | #include <net/nfc/digital.h> | |
30 | ||
31 | /* There are 3 ways the host can communicate with the trf7970a: | |
32 | * parallel mode, SPI with Slave Select (SS) mode, and SPI without | |
33 | * SS mode. The driver only supports the two SPI modes. | |
34 | * | |
35 | * The trf7970a is very timing sensitive and the VIN, EN2, and EN | |
36 | * pins must asserted in that order and with specific delays in between. | |
37 | * The delays used in the driver were provided by TI and have been | |
95064bd9 MG |
38 | * confirmed to work with this driver. There is a bug with the current |
39 | * version of the trf7970a that requires that EN2 remain low no matter | |
40 | * what. If it goes high, it will generate an RF field even when in | |
41 | * passive target mode. TI has indicated that the chip will work okay | |
42 | * when EN2 is left low. The 'en2-rf-quirk' device tree property | |
43 | * indicates that trf7970a currently being used has the erratum and | |
44 | * that EN2 must be kept low. | |
165063f1 MG |
45 | * |
46 | * Timeouts are implemented using the delayed workqueue kernel facility. | |
47 | * Timeouts are required so things don't hang when there is no response | |
48 | * from the trf7970a (or tag). Using this mechanism creates a race with | |
49 | * interrupts, however. That is, an interrupt and a timeout could occur | |
50 | * closely enough together that one is blocked by the mutex while the other | |
51 | * executes. When the timeout handler executes first and blocks the | |
52 | * interrupt handler, it will eventually set the state to IDLE so the | |
53 | * interrupt handler will check the state and exit with no harm done. | |
54 | * When the interrupt handler executes first and blocks the timeout handler, | |
55 | * the cancel_delayed_work() call will know that it didn't cancel the | |
56 | * work item (i.e., timeout) and will return zero. That return code is | |
57 | * used by the timer handler to indicate that it should ignore the timeout | |
58 | * once its unblocked. | |
59 | * | |
60 | * Aborting an active command isn't as simple as it seems because the only | |
61 | * way to abort a command that's already been sent to the tag is so turn | |
62 | * off power to the tag. If we do that, though, we'd have to go through | |
63 | * the entire anticollision procedure again but the digital layer doesn't | |
13b4272a | 64 | * support that. So, if an abort is received before trf7970a_send_cmd() |
165063f1 MG |
65 | * has sent the command to the tag, it simply returns -ECANCELED. If the |
66 | * command has already been sent to the tag, then the driver continues | |
67 | * normally and recieves the response data (or error) but just before | |
68 | * sending the data upstream, it frees the rx_skb and sends -ECANCELED | |
69 | * upstream instead. If the command failed, that error will be sent | |
70 | * upstream. | |
71 | * | |
72 | * When recieving data from a tag and the interrupt status register has | |
73 | * only the SRX bit set, it means that all of the data has been received | |
74 | * (once what's in the fifo has been read). However, depending on timing | |
75 | * an interrupt status with only the SRX bit set may not be recived. In | |
5fa3af35 MG |
76 | * those cases, the timeout mechanism is used to wait 20 ms in case more |
77 | * data arrives. After 20 ms, it is assumed that all of the data has been | |
165063f1 MG |
78 | * received and the accumulated rx data is sent upstream. The |
79 | * 'TRF7970A_ST_WAIT_FOR_RX_DATA_CONT' state is used for this purpose | |
80 | * (i.e., it indicates that some data has been received but we're not sure | |
81 | * if there is more coming so a timeout in this state means all data has | |
5fa3af35 MG |
82 | * been received and there isn't an error). The delay is 20 ms since delays |
83 | * of ~16 ms have been observed during testing. | |
165063f1 | 84 | * |
38b4eb1f MG |
85 | * When transmitting a frame larger than the FIFO size (127 bytes), the |
86 | * driver will wait 20 ms for the FIFO to drain past the low-watermark | |
87 | * and generate an interrupt. The low-watermark set to 32 bytes so the | |
88 | * interrupt should fire after 127 - 32 = 95 bytes have been sent. At | |
89 | * the lowest possible bit rate (6.62 kbps for 15693), it will take up | |
90 | * to ~14.35 ms so 20 ms is used for the timeout. | |
91 | * | |
165063f1 MG |
92 | * Type 2 write and sector select commands respond with a 4-bit ACK or NACK. |
93 | * Having only 4 bits in the FIFO won't normally generate an interrupt so | |
94 | * driver enables the '4_bit_RX' bit of the Special Functions register 1 | |
95 | * to cause an interrupt in that case. Leaving that bit for a read command | |
96 | * messes up the data returned so it is only enabled when the framing is | |
97 | * 'NFC_DIGITAL_FRAMING_NFCA_T2T' and the command is not a read command. | |
98 | * Unfortunately, that means that the driver has to peek into tx frames | |
99 | * when the framing is 'NFC_DIGITAL_FRAMING_NFCA_T2T'. This is done by | |
100 | * the trf7970a_per_cmd_config() routine. | |
9d9304b3 MG |
101 | * |
102 | * ISO/IEC 15693 frames specify whether to use single or double sub-carrier | |
103 | * frequencies and whether to use low or high data rates in the flags byte | |
104 | * of the frame. This means that the driver has to peek at all 15693 frames | |
105 | * to determine what speed to set the communication to. In addition, write | |
106 | * and lock commands use the OPTION flag to indicate that an EOF must be | |
107 | * sent to the tag before it will send its response. So the driver has to | |
108 | * examine all frames for that reason too. | |
109 | * | |
110 | * It is unclear how long to wait before sending the EOF. According to the | |
111 | * Note under Table 1-1 in section 1.6 of | |
112 | * http://www.ti.com/lit/ug/scbu011/scbu011.pdf, that wait should be at least | |
113 | * 10 ms for TI Tag-it HF-I tags; however testing has shown that is not long | |
38b4eb1f MG |
114 | * enough so 20 ms is used. So the timer is set to 40 ms - 20 ms to drain |
115 | * up to 127 bytes in the FIFO at the lowest bit rate plus another 20 ms to | |
116 | * ensure the wait is long enough before sending the EOF. This seems to work | |
9d9304b3 | 117 | * reliably. |
165063f1 MG |
118 | */ |
119 | ||
80062891 | 120 | #define TRF7970A_SUPPORTED_PROTOCOLS \ |
9d9304b3 | 121 | (NFC_PROTO_MIFARE_MASK | NFC_PROTO_ISO14443_MASK | \ |
6857bb96 | 122 | NFC_PROTO_ISO14443_B_MASK | NFC_PROTO_FELICA_MASK | \ |
13b4272a | 123 | NFC_PROTO_ISO15693_MASK | NFC_PROTO_NFC_DEP_MASK) |
165063f1 | 124 | |
e2f0f671 | 125 | #define TRF7970A_AUTOSUSPEND_DELAY 30000 /* 30 seconds */ |
837eb4d2 GL |
126 | #define TRF7970A_13MHZ_CLOCK_FREQUENCY 13560000 |
127 | #define TRF7970A_27MHZ_CLOCK_FREQUENCY 27120000 | |
128 | ||
165063f1 MG |
129 | #define TRF7970A_RX_SKB_ALLOC_SIZE 256 |
130 | ||
1568bfef | 131 | #define TRF7970A_FIFO_SIZE 127 |
165063f1 MG |
132 | |
133 | /* TX length is 3 nibbles long ==> 4KB - 1 bytes max */ | |
134 | #define TRF7970A_TX_MAX (4096 - 1) | |
135 | ||
1961843c | 136 | #define TRF7970A_WAIT_FOR_TX_IRQ 20 |
5fa3af35 | 137 | #define TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT 20 |
38b4eb1f MG |
138 | #define TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT 20 |
139 | #define TRF7970A_WAIT_TO_ISSUE_ISO15693_EOF 40 | |
165063f1 | 140 | |
4e64eff8 MG |
141 | /* Guard times for various RF technologies (in us) */ |
142 | #define TRF7970A_GUARD_TIME_NFCA 5000 | |
143 | #define TRF7970A_GUARD_TIME_NFCB 5000 | |
144 | #define TRF7970A_GUARD_TIME_NFCF 20000 | |
145 | #define TRF7970A_GUARD_TIME_15693 1000 | |
146 | ||
165063f1 MG |
147 | /* Quirks */ |
148 | /* Erratum: When reading IRQ Status register on trf7970a, we must issue a | |
149 | * read continuous command for IRQ Status and Collision Position registers. | |
150 | */ | |
772079eb | 151 | #define TRF7970A_QUIRK_IRQ_STATUS_READ BIT(0) |
95064bd9 | 152 | #define TRF7970A_QUIRK_EN2_MUST_STAY_LOW BIT(1) |
165063f1 MG |
153 | |
154 | /* Direct commands */ | |
155 | #define TRF7970A_CMD_IDLE 0x00 | |
156 | #define TRF7970A_CMD_SOFT_INIT 0x03 | |
157 | #define TRF7970A_CMD_RF_COLLISION 0x04 | |
158 | #define TRF7970A_CMD_RF_COLLISION_RESPONSE_N 0x05 | |
159 | #define TRF7970A_CMD_RF_COLLISION_RESPONSE_0 0x06 | |
160 | #define TRF7970A_CMD_FIFO_RESET 0x0f | |
161 | #define TRF7970A_CMD_TRANSMIT_NO_CRC 0x10 | |
162 | #define TRF7970A_CMD_TRANSMIT 0x11 | |
163 | #define TRF7970A_CMD_DELAY_TRANSMIT_NO_CRC 0x12 | |
164 | #define TRF7970A_CMD_DELAY_TRANSMIT 0x13 | |
165 | #define TRF7970A_CMD_EOF 0x14 | |
166 | #define TRF7970A_CMD_CLOSE_SLOT 0x15 | |
167 | #define TRF7970A_CMD_BLOCK_RX 0x16 | |
168 | #define TRF7970A_CMD_ENABLE_RX 0x17 | |
851ee3cb MG |
169 | #define TRF7970A_CMD_TEST_INT_RF 0x18 |
170 | #define TRF7970A_CMD_TEST_EXT_RF 0x19 | |
165063f1 MG |
171 | #define TRF7970A_CMD_RX_GAIN_ADJUST 0x1a |
172 | ||
173 | /* Bits determining whether its a direct command or register R/W, | |
174 | * whether to use a continuous SPI transaction or not, and the actual | |
175 | * direct cmd opcode or regster address. | |
176 | */ | |
177 | #define TRF7970A_CMD_BIT_CTRL BIT(7) | |
178 | #define TRF7970A_CMD_BIT_RW BIT(6) | |
179 | #define TRF7970A_CMD_BIT_CONTINUOUS BIT(5) | |
180 | #define TRF7970A_CMD_BIT_OPCODE(opcode) ((opcode) & 0x1f) | |
181 | ||
182 | /* Registers addresses */ | |
183 | #define TRF7970A_CHIP_STATUS_CTRL 0x00 | |
184 | #define TRF7970A_ISO_CTRL 0x01 | |
185 | #define TRF7970A_ISO14443B_TX_OPTIONS 0x02 | |
186 | #define TRF7970A_ISO14443A_HIGH_BITRATE_OPTIONS 0x03 | |
187 | #define TRF7970A_TX_TIMER_SETTING_H_BYTE 0x04 | |
188 | #define TRF7970A_TX_TIMER_SETTING_L_BYTE 0x05 | |
189 | #define TRF7970A_TX_PULSE_LENGTH_CTRL 0x06 | |
190 | #define TRF7970A_RX_NO_RESPONSE_WAIT 0x07 | |
191 | #define TRF7970A_RX_WAIT_TIME 0x08 | |
192 | #define TRF7970A_MODULATOR_SYS_CLK_CTRL 0x09 | |
193 | #define TRF7970A_RX_SPECIAL_SETTINGS 0x0a | |
194 | #define TRF7970A_REG_IO_CTRL 0x0b | |
195 | #define TRF7970A_IRQ_STATUS 0x0c | |
196 | #define TRF7970A_COLLISION_IRQ_MASK 0x0d | |
197 | #define TRF7970A_COLLISION_POSITION 0x0e | |
198 | #define TRF7970A_RSSI_OSC_STATUS 0x0f | |
199 | #define TRF7970A_SPECIAL_FCN_REG1 0x10 | |
200 | #define TRF7970A_SPECIAL_FCN_REG2 0x11 | |
201 | #define TRF7970A_RAM1 0x12 | |
202 | #define TRF7970A_RAM2 0x13 | |
203 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS 0x14 | |
204 | #define TRF7970A_NFC_LOW_FIELD_LEVEL 0x16 | |
205 | #define TRF7970A_NFCID1 0x17 | |
206 | #define TRF7970A_NFC_TARGET_LEVEL 0x18 | |
207 | #define TRF79070A_NFC_TARGET_PROTOCOL 0x19 | |
208 | #define TRF7970A_TEST_REGISTER1 0x1a | |
209 | #define TRF7970A_TEST_REGISTER2 0x1b | |
210 | #define TRF7970A_FIFO_STATUS 0x1c | |
211 | #define TRF7970A_TX_LENGTH_BYTE1 0x1d | |
212 | #define TRF7970A_TX_LENGTH_BYTE2 0x1e | |
213 | #define TRF7970A_FIFO_IO_REGISTER 0x1f | |
214 | ||
215 | /* Chip Status Control Register Bits */ | |
216 | #define TRF7970A_CHIP_STATUS_VRS5_3 BIT(0) | |
217 | #define TRF7970A_CHIP_STATUS_REC_ON BIT(1) | |
218 | #define TRF7970A_CHIP_STATUS_AGC_ON BIT(2) | |
219 | #define TRF7970A_CHIP_STATUS_PM_ON BIT(3) | |
220 | #define TRF7970A_CHIP_STATUS_RF_PWR BIT(4) | |
221 | #define TRF7970A_CHIP_STATUS_RF_ON BIT(5) | |
222 | #define TRF7970A_CHIP_STATUS_DIRECT BIT(6) | |
223 | #define TRF7970A_CHIP_STATUS_STBY BIT(7) | |
224 | ||
225 | /* ISO Control Register Bits */ | |
226 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF4_662 0x00 | |
227 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF256_662 0x01 | |
228 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648 0x02 | |
229 | #define TRF7970A_ISO_CTRL_15693_SGL_1OF256_2648 0x03 | |
230 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF4_667a 0x04 | |
231 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF256_667 0x05 | |
232 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF4_2669 0x06 | |
233 | #define TRF7970A_ISO_CTRL_15693_DBL_1OF256_2669 0x07 | |
234 | #define TRF7970A_ISO_CTRL_14443A_106 0x08 | |
235 | #define TRF7970A_ISO_CTRL_14443A_212 0x09 | |
236 | #define TRF7970A_ISO_CTRL_14443A_424 0x0a | |
237 | #define TRF7970A_ISO_CTRL_14443A_848 0x0b | |
238 | #define TRF7970A_ISO_CTRL_14443B_106 0x0c | |
239 | #define TRF7970A_ISO_CTRL_14443B_212 0x0d | |
240 | #define TRF7970A_ISO_CTRL_14443B_424 0x0e | |
241 | #define TRF7970A_ISO_CTRL_14443B_848 0x0f | |
242 | #define TRF7970A_ISO_CTRL_FELICA_212 0x1a | |
243 | #define TRF7970A_ISO_CTRL_FELICA_424 0x1b | |
13b4272a MG |
244 | #define TRF7970A_ISO_CTRL_NFC_NFCA_106 0x01 |
245 | #define TRF7970A_ISO_CTRL_NFC_NFCF_212 0x02 | |
246 | #define TRF7970A_ISO_CTRL_NFC_NFCF_424 0x03 | |
247 | #define TRF7970A_ISO_CTRL_NFC_CE_14443A 0x00 | |
248 | #define TRF7970A_ISO_CTRL_NFC_CE_14443B 0x01 | |
249 | #define TRF7970A_ISO_CTRL_NFC_CE BIT(2) | |
250 | #define TRF7970A_ISO_CTRL_NFC_ACTIVE BIT(3) | |
251 | #define TRF7970A_ISO_CTRL_NFC_INITIATOR BIT(4) | |
252 | #define TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE BIT(5) | |
165063f1 MG |
253 | #define TRF7970A_ISO_CTRL_RFID BIT(5) |
254 | #define TRF7970A_ISO_CTRL_DIR_MODE BIT(6) | |
255 | #define TRF7970A_ISO_CTRL_RX_CRC_N BIT(7) /* true == No CRC */ | |
256 | ||
257 | #define TRF7970A_ISO_CTRL_RFID_SPEED_MASK 0x1f | |
258 | ||
259 | /* Modulator and SYS_CLK Control Register Bits */ | |
260 | #define TRF7970A_MODULATOR_DEPTH(n) ((n) & 0x7) | |
261 | #define TRF7970A_MODULATOR_DEPTH_ASK10 (TRF7970A_MODULATOR_DEPTH(0)) | |
262 | #define TRF7970A_MODULATOR_DEPTH_OOK (TRF7970A_MODULATOR_DEPTH(1)) | |
263 | #define TRF7970A_MODULATOR_DEPTH_ASK7 (TRF7970A_MODULATOR_DEPTH(2)) | |
264 | #define TRF7970A_MODULATOR_DEPTH_ASK8_5 (TRF7970A_MODULATOR_DEPTH(3)) | |
265 | #define TRF7970A_MODULATOR_DEPTH_ASK13 (TRF7970A_MODULATOR_DEPTH(4)) | |
266 | #define TRF7970A_MODULATOR_DEPTH_ASK16 (TRF7970A_MODULATOR_DEPTH(5)) | |
267 | #define TRF7970A_MODULATOR_DEPTH_ASK22 (TRF7970A_MODULATOR_DEPTH(6)) | |
268 | #define TRF7970A_MODULATOR_DEPTH_ASK30 (TRF7970A_MODULATOR_DEPTH(7)) | |
269 | #define TRF7970A_MODULATOR_EN_ANA BIT(3) | |
270 | #define TRF7970A_MODULATOR_CLK(n) (((n) & 0x3) << 4) | |
271 | #define TRF7970A_MODULATOR_CLK_DISABLED (TRF7970A_MODULATOR_CLK(0)) | |
272 | #define TRF7970A_MODULATOR_CLK_3_6 (TRF7970A_MODULATOR_CLK(1)) | |
273 | #define TRF7970A_MODULATOR_CLK_6_13 (TRF7970A_MODULATOR_CLK(2)) | |
274 | #define TRF7970A_MODULATOR_CLK_13_27 (TRF7970A_MODULATOR_CLK(3)) | |
275 | #define TRF7970A_MODULATOR_EN_OOK BIT(6) | |
276 | #define TRF7970A_MODULATOR_27MHZ BIT(7) | |
277 | ||
13b4272a MG |
278 | #define TRF7970A_RX_SPECIAL_SETTINGS_NO_LIM BIT(0) |
279 | #define TRF7970A_RX_SPECIAL_SETTINGS_AGCR BIT(1) | |
280 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_0DB (0x0 << 2) | |
281 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_5DB (0x1 << 2) | |
282 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_10DB (0x2 << 2) | |
283 | #define TRF7970A_RX_SPECIAL_SETTINGS_GD_15DB (0x3 << 2) | |
284 | #define TRF7970A_RX_SPECIAL_SETTINGS_HBT BIT(4) | |
285 | #define TRF7970A_RX_SPECIAL_SETTINGS_M848 BIT(5) | |
286 | #define TRF7970A_RX_SPECIAL_SETTINGS_C424 BIT(6) | |
287 | #define TRF7970A_RX_SPECIAL_SETTINGS_C212 BIT(7) | |
288 | ||
289 | #define TRF7970A_REG_IO_CTRL_VRS(v) ((v) & 0x07) | |
290 | #define TRF7970A_REG_IO_CTRL_IO_LOW BIT(5) | |
291 | #define TRF7970A_REG_IO_CTRL_EN_EXT_PA BIT(6) | |
292 | #define TRF7970A_REG_IO_CTRL_AUTO_REG BIT(7) | |
293 | ||
165063f1 | 294 | /* IRQ Status Register Bits */ |
e2f0f671 | 295 | #define TRF7970A_IRQ_STATUS_NORESP BIT(0) /* ISO15693 only */ |
13b4272a | 296 | #define TRF7970A_IRQ_STATUS_NFC_COL_ERROR BIT(0) |
165063f1 MG |
297 | #define TRF7970A_IRQ_STATUS_COL BIT(1) |
298 | #define TRF7970A_IRQ_STATUS_FRAMING_EOF_ERROR BIT(2) | |
13b4272a | 299 | #define TRF7970A_IRQ_STATUS_NFC_RF BIT(2) |
165063f1 | 300 | #define TRF7970A_IRQ_STATUS_PARITY_ERROR BIT(3) |
13b4272a | 301 | #define TRF7970A_IRQ_STATUS_NFC_SDD BIT(3) |
165063f1 | 302 | #define TRF7970A_IRQ_STATUS_CRC_ERROR BIT(4) |
13b4272a | 303 | #define TRF7970A_IRQ_STATUS_NFC_PROTO_ERROR BIT(4) |
165063f1 MG |
304 | #define TRF7970A_IRQ_STATUS_FIFO BIT(5) |
305 | #define TRF7970A_IRQ_STATUS_SRX BIT(6) | |
306 | #define TRF7970A_IRQ_STATUS_TX BIT(7) | |
307 | ||
308 | #define TRF7970A_IRQ_STATUS_ERROR \ | |
309 | (TRF7970A_IRQ_STATUS_COL | \ | |
310 | TRF7970A_IRQ_STATUS_FRAMING_EOF_ERROR | \ | |
311 | TRF7970A_IRQ_STATUS_PARITY_ERROR | \ | |
312 | TRF7970A_IRQ_STATUS_CRC_ERROR) | |
313 | ||
851ee3cb MG |
314 | #define TRF7970A_RSSI_OSC_STATUS_RSSI_MASK (BIT(2) | BIT(1) | BIT(0)) |
315 | #define TRF7970A_RSSI_OSC_STATUS_RSSI_X_MASK (BIT(5) | BIT(4) | BIT(3)) | |
316 | #define TRF7970A_RSSI_OSC_STATUS_RSSI_OSC_OK BIT(6) | |
317 | ||
165063f1 MG |
318 | #define TRF7970A_SPECIAL_FCN_REG1_COL_7_6 BIT(0) |
319 | #define TRF7970A_SPECIAL_FCN_REG1_14_ANTICOLL BIT(1) | |
320 | #define TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX BIT(2) | |
321 | #define TRF7970A_SPECIAL_FCN_REG1_SP_DIR_MODE BIT(3) | |
322 | #define TRF7970A_SPECIAL_FCN_REG1_NEXT_SLOT_37US BIT(4) | |
323 | #define TRF7970A_SPECIAL_FCN_REG1_PAR43 BIT(5) | |
324 | ||
325 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_124 (0x0 << 2) | |
326 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_120 (0x1 << 2) | |
327 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_112 (0x2 << 2) | |
328 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_96 (0x3 << 2) | |
329 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_4 0x0 | |
330 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_8 0x1 | |
331 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_16 0x2 | |
332 | #define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_32 0x3 | |
333 | ||
13b4272a MG |
334 | #define TRF7970A_NFC_LOW_FIELD_LEVEL_RFDET(v) ((v) & 0x07) |
335 | #define TRF7970A_NFC_LOW_FIELD_LEVEL_CLEX_DIS BIT(7) | |
336 | ||
337 | #define TRF7970A_NFC_TARGET_LEVEL_RFDET(v) ((v) & 0x07) | |
338 | #define TRF7970A_NFC_TARGET_LEVEL_HI_RF BIT(3) | |
ae291f79 | 339 | #define TRF7970A_NFC_TARGET_LEVEL_SDD_EN BIT(5) |
13b4272a MG |
340 | #define TRF7970A_NFC_TARGET_LEVEL_LD_S_4BYTES (0x0 << 6) |
341 | #define TRF7970A_NFC_TARGET_LEVEL_LD_S_7BYTES (0x1 << 6) | |
342 | #define TRF7970A_NFC_TARGET_LEVEL_LD_S_10BYTES (0x2 << 6) | |
343 | ||
cb174aba MG |
344 | #define TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_106 BIT(0) |
345 | #define TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_212 BIT(1) | |
346 | #define TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_424 (BIT(0) | BIT(1)) | |
347 | #define TRF79070A_NFC_TARGET_PROTOCOL_PAS_14443B BIT(2) | |
348 | #define TRF79070A_NFC_TARGET_PROTOCOL_PAS_106 BIT(3) | |
349 | #define TRF79070A_NFC_TARGET_PROTOCOL_FELICA BIT(4) | |
350 | #define TRF79070A_NFC_TARGET_PROTOCOL_RF_L BIT(6) | |
351 | #define TRF79070A_NFC_TARGET_PROTOCOL_RF_H BIT(7) | |
352 | ||
353 | #define TRF79070A_NFC_TARGET_PROTOCOL_106A \ | |
354 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
355 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
356 | TRF79070A_NFC_TARGET_PROTOCOL_PAS_106 | \ | |
357 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_106) | |
358 | ||
359 | #define TRF79070A_NFC_TARGET_PROTOCOL_106B \ | |
360 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
361 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
362 | TRF79070A_NFC_TARGET_PROTOCOL_PAS_14443B | \ | |
363 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_106) | |
364 | ||
365 | #define TRF79070A_NFC_TARGET_PROTOCOL_212F \ | |
366 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
367 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
368 | TRF79070A_NFC_TARGET_PROTOCOL_FELICA | \ | |
369 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_212) | |
370 | ||
371 | #define TRF79070A_NFC_TARGET_PROTOCOL_424F \ | |
372 | (TRF79070A_NFC_TARGET_PROTOCOL_RF_H | \ | |
373 | TRF79070A_NFC_TARGET_PROTOCOL_RF_L | \ | |
374 | TRF79070A_NFC_TARGET_PROTOCOL_FELICA | \ | |
375 | TRF79070A_NFC_TARGET_PROTOCOL_NFCBR_424) | |
376 | ||
165063f1 MG |
377 | #define TRF7970A_FIFO_STATUS_OVERFLOW BIT(7) |
378 | ||
379 | /* NFC (ISO/IEC 14443A) Type 2 Tag commands */ | |
380 | #define NFC_T2T_CMD_READ 0x30 | |
381 | ||
9d9304b3 MG |
382 | /* ISO 15693 commands codes */ |
383 | #define ISO15693_CMD_INVENTORY 0x01 | |
384 | #define ISO15693_CMD_READ_SINGLE_BLOCK 0x20 | |
385 | #define ISO15693_CMD_WRITE_SINGLE_BLOCK 0x21 | |
386 | #define ISO15693_CMD_LOCK_BLOCK 0x22 | |
387 | #define ISO15693_CMD_READ_MULTIPLE_BLOCK 0x23 | |
388 | #define ISO15693_CMD_WRITE_MULTIPLE_BLOCK 0x24 | |
389 | #define ISO15693_CMD_SELECT 0x25 | |
390 | #define ISO15693_CMD_RESET_TO_READY 0x26 | |
391 | #define ISO15693_CMD_WRITE_AFI 0x27 | |
392 | #define ISO15693_CMD_LOCK_AFI 0x28 | |
393 | #define ISO15693_CMD_WRITE_DSFID 0x29 | |
394 | #define ISO15693_CMD_LOCK_DSFID 0x2a | |
395 | #define ISO15693_CMD_GET_SYSTEM_INFO 0x2b | |
396 | #define ISO15693_CMD_GET_MULTIPLE_BLOCK_SECURITY_STATUS 0x2c | |
397 | ||
398 | /* ISO 15693 request and response flags */ | |
399 | #define ISO15693_REQ_FLAG_SUB_CARRIER BIT(0) | |
400 | #define ISO15693_REQ_FLAG_DATA_RATE BIT(1) | |
401 | #define ISO15693_REQ_FLAG_INVENTORY BIT(2) | |
402 | #define ISO15693_REQ_FLAG_PROTOCOL_EXT BIT(3) | |
403 | #define ISO15693_REQ_FLAG_SELECT BIT(4) | |
404 | #define ISO15693_REQ_FLAG_AFI BIT(4) | |
405 | #define ISO15693_REQ_FLAG_ADDRESS BIT(5) | |
406 | #define ISO15693_REQ_FLAG_NB_SLOTS BIT(5) | |
407 | #define ISO15693_REQ_FLAG_OPTION BIT(6) | |
408 | ||
409 | #define ISO15693_REQ_FLAG_SPEED_MASK \ | |
410 | (ISO15693_REQ_FLAG_SUB_CARRIER | ISO15693_REQ_FLAG_DATA_RATE) | |
411 | ||
165063f1 | 412 | enum trf7970a_state { |
ceccd6aa | 413 | TRF7970A_ST_PWR_OFF, |
b5e17d9b | 414 | TRF7970A_ST_RF_OFF, |
165063f1 MG |
415 | TRF7970A_ST_IDLE, |
416 | TRF7970A_ST_IDLE_RX_BLOCKED, | |
417 | TRF7970A_ST_WAIT_FOR_TX_FIFO, | |
418 | TRF7970A_ST_WAIT_FOR_RX_DATA, | |
419 | TRF7970A_ST_WAIT_FOR_RX_DATA_CONT, | |
9d9304b3 | 420 | TRF7970A_ST_WAIT_TO_ISSUE_EOF, |
13b4272a | 421 | TRF7970A_ST_LISTENING, |
cb174aba | 422 | TRF7970A_ST_LISTENING_MD, |
165063f1 MG |
423 | TRF7970A_ST_MAX |
424 | }; | |
425 | ||
426 | struct trf7970a { | |
427 | enum trf7970a_state state; | |
428 | struct device *dev; | |
429 | struct spi_device *spi; | |
430 | struct regulator *regulator; | |
431 | struct nfc_digital_dev *ddev; | |
432 | u32 quirks; | |
13b4272a | 433 | bool is_initiator; |
165063f1 MG |
434 | bool aborting; |
435 | struct sk_buff *tx_skb; | |
436 | struct sk_buff *rx_skb; | |
437 | nfc_digital_cmd_complete_t cb; | |
438 | void *cb_arg; | |
ebcc5a0d | 439 | u8 chip_status_ctrl; |
165063f1 | 440 | u8 iso_ctrl; |
49d19cc7 | 441 | u8 iso_ctrl_tech; |
12e9ade3 | 442 | u8 modulator_sys_clk_ctrl; |
165063f1 | 443 | u8 special_fcn_reg1; |
49d22c70 | 444 | u8 io_ctrl; |
4e64eff8 | 445 | unsigned int guard_time; |
165063f1 MG |
446 | int technology; |
447 | int framing; | |
cb174aba | 448 | u8 md_rf_tech; |
165063f1 | 449 | u8 tx_cmd; |
9d9304b3 | 450 | bool issue_eof; |
d34e48d6 MG |
451 | struct gpio_desc *en_gpiod; |
452 | struct gpio_desc *en2_gpiod; | |
165063f1 MG |
453 | struct mutex lock; |
454 | unsigned int timeout; | |
455 | bool ignore_timeout; | |
456 | struct delayed_work timeout_work; | |
457 | }; | |
458 | ||
165063f1 MG |
459 | static int trf7970a_cmd(struct trf7970a *trf, u8 opcode) |
460 | { | |
461 | u8 cmd = TRF7970A_CMD_BIT_CTRL | TRF7970A_CMD_BIT_OPCODE(opcode); | |
462 | int ret; | |
463 | ||
464 | dev_dbg(trf->dev, "cmd: 0x%x\n", cmd); | |
465 | ||
466 | ret = spi_write(trf->spi, &cmd, 1); | |
467 | if (ret) | |
468 | dev_err(trf->dev, "%s - cmd: 0x%x, ret: %d\n", __func__, cmd, | |
e2f0f671 | 469 | ret); |
165063f1 MG |
470 | return ret; |
471 | } | |
472 | ||
473 | static int trf7970a_read(struct trf7970a *trf, u8 reg, u8 *val) | |
474 | { | |
475 | u8 addr = TRF7970A_CMD_BIT_RW | reg; | |
476 | int ret; | |
477 | ||
478 | ret = spi_write_then_read(trf->spi, &addr, 1, val, 1); | |
479 | if (ret) | |
480 | dev_err(trf->dev, "%s - addr: 0x%x, ret: %d\n", __func__, addr, | |
e2f0f671 | 481 | ret); |
165063f1 MG |
482 | |
483 | dev_dbg(trf->dev, "read(0x%x): 0x%x\n", addr, *val); | |
484 | ||
485 | return ret; | |
486 | } | |
487 | ||
e2f0f671 MG |
488 | static int trf7970a_read_cont(struct trf7970a *trf, u8 reg, u8 *buf, |
489 | size_t len) | |
165063f1 MG |
490 | { |
491 | u8 addr = reg | TRF7970A_CMD_BIT_RW | TRF7970A_CMD_BIT_CONTINUOUS; | |
3e7f3356 MG |
492 | struct spi_transfer t[2]; |
493 | struct spi_message m; | |
165063f1 MG |
494 | int ret; |
495 | ||
496 | dev_dbg(trf->dev, "read_cont(0x%x, %zd)\n", addr, len); | |
497 | ||
3e7f3356 MG |
498 | spi_message_init(&m); |
499 | ||
500 | memset(&t, 0, sizeof(t)); | |
501 | ||
502 | t[0].tx_buf = &addr; | |
503 | t[0].len = sizeof(addr); | |
504 | spi_message_add_tail(&t[0], &m); | |
505 | ||
506 | t[1].rx_buf = buf; | |
507 | t[1].len = len; | |
508 | spi_message_add_tail(&t[1], &m); | |
509 | ||
510 | ret = spi_sync(trf->spi, &m); | |
165063f1 MG |
511 | if (ret) |
512 | dev_err(trf->dev, "%s - addr: 0x%x, ret: %d\n", __func__, addr, | |
e2f0f671 | 513 | ret); |
165063f1 MG |
514 | return ret; |
515 | } | |
516 | ||
517 | static int trf7970a_write(struct trf7970a *trf, u8 reg, u8 val) | |
518 | { | |
519 | u8 buf[2] = { reg, val }; | |
520 | int ret; | |
521 | ||
522 | dev_dbg(trf->dev, "write(0x%x): 0x%x\n", reg, val); | |
523 | ||
524 | ret = spi_write(trf->spi, buf, 2); | |
525 | if (ret) | |
526 | dev_err(trf->dev, "%s - write: 0x%x 0x%x, ret: %d\n", __func__, | |
e2f0f671 | 527 | buf[0], buf[1], ret); |
165063f1 MG |
528 | |
529 | return ret; | |
530 | } | |
531 | ||
532 | static int trf7970a_read_irqstatus(struct trf7970a *trf, u8 *status) | |
533 | { | |
534 | int ret; | |
535 | u8 buf[2]; | |
536 | u8 addr; | |
537 | ||
538 | addr = TRF7970A_IRQ_STATUS | TRF7970A_CMD_BIT_RW; | |
539 | ||
772079eb | 540 | if (trf->quirks & TRF7970A_QUIRK_IRQ_STATUS_READ) { |
165063f1 MG |
541 | addr |= TRF7970A_CMD_BIT_CONTINUOUS; |
542 | ret = spi_write_then_read(trf->spi, &addr, 1, buf, 2); | |
543 | } else { | |
544 | ret = spi_write_then_read(trf->spi, &addr, 1, buf, 1); | |
545 | } | |
546 | ||
547 | if (ret) | |
548 | dev_err(trf->dev, "%s - irqstatus: Status read failed: %d\n", | |
e2f0f671 | 549 | __func__, ret); |
165063f1 MG |
550 | else |
551 | *status = buf[0]; | |
552 | ||
553 | return ret; | |
554 | } | |
555 | ||
cb174aba MG |
556 | static int trf7970a_read_target_proto(struct trf7970a *trf, u8 *target_proto) |
557 | { | |
558 | int ret; | |
559 | u8 buf[2]; | |
560 | u8 addr; | |
561 | ||
562 | addr = TRF79070A_NFC_TARGET_PROTOCOL | TRF7970A_CMD_BIT_RW | | |
e2f0f671 | 563 | TRF7970A_CMD_BIT_CONTINUOUS; |
cb174aba MG |
564 | |
565 | ret = spi_write_then_read(trf->spi, &addr, 1, buf, 2); | |
566 | if (ret) | |
567 | dev_err(trf->dev, "%s - target_proto: Read failed: %d\n", | |
e2f0f671 | 568 | __func__, ret); |
cb174aba MG |
569 | else |
570 | *target_proto = buf[0]; | |
571 | ||
572 | return ret; | |
573 | } | |
574 | ||
575 | static int trf7970a_mode_detect(struct trf7970a *trf, u8 *rf_tech) | |
576 | { | |
577 | int ret; | |
578 | u8 target_proto, tech; | |
579 | ||
580 | ret = trf7970a_read_target_proto(trf, &target_proto); | |
581 | if (ret) | |
582 | return ret; | |
583 | ||
584 | switch (target_proto) { | |
585 | case TRF79070A_NFC_TARGET_PROTOCOL_106A: | |
586 | tech = NFC_DIGITAL_RF_TECH_106A; | |
587 | break; | |
588 | case TRF79070A_NFC_TARGET_PROTOCOL_106B: | |
589 | tech = NFC_DIGITAL_RF_TECH_106B; | |
590 | break; | |
591 | case TRF79070A_NFC_TARGET_PROTOCOL_212F: | |
592 | tech = NFC_DIGITAL_RF_TECH_212F; | |
593 | break; | |
594 | case TRF79070A_NFC_TARGET_PROTOCOL_424F: | |
595 | tech = NFC_DIGITAL_RF_TECH_424F; | |
596 | break; | |
597 | default: | |
598 | dev_dbg(trf->dev, "%s - mode_detect: target_proto: 0x%x\n", | |
e2f0f671 | 599 | __func__, target_proto); |
cb174aba MG |
600 | return -EIO; |
601 | } | |
602 | ||
603 | *rf_tech = tech; | |
604 | ||
605 | return ret; | |
606 | } | |
607 | ||
165063f1 MG |
608 | static void trf7970a_send_upstream(struct trf7970a *trf) |
609 | { | |
165063f1 MG |
610 | dev_kfree_skb_any(trf->tx_skb); |
611 | trf->tx_skb = NULL; | |
612 | ||
613 | if (trf->rx_skb && !IS_ERR(trf->rx_skb) && !trf->aborting) | |
614 | print_hex_dump_debug("trf7970a rx data: ", DUMP_PREFIX_NONE, | |
e2f0f671 MG |
615 | 16, 1, trf->rx_skb->data, trf->rx_skb->len, |
616 | false); | |
165063f1 | 617 | |
165063f1 MG |
618 | trf->state = TRF7970A_ST_IDLE; |
619 | ||
620 | if (trf->aborting) { | |
621 | dev_dbg(trf->dev, "Abort process complete\n"); | |
622 | ||
623 | if (!IS_ERR(trf->rx_skb)) { | |
624 | kfree_skb(trf->rx_skb); | |
625 | trf->rx_skb = ERR_PTR(-ECANCELED); | |
626 | } | |
627 | ||
628 | trf->aborting = false; | |
629 | } | |
630 | ||
631 | trf->cb(trf->ddev, trf->cb_arg, trf->rx_skb); | |
632 | ||
633 | trf->rx_skb = NULL; | |
634 | } | |
635 | ||
636 | static void trf7970a_send_err_upstream(struct trf7970a *trf, int errno) | |
637 | { | |
638 | dev_dbg(trf->dev, "Error - state: %d, errno: %d\n", trf->state, errno); | |
639 | ||
6fb9edcb MG |
640 | cancel_delayed_work(&trf->timeout_work); |
641 | ||
165063f1 MG |
642 | kfree_skb(trf->rx_skb); |
643 | trf->rx_skb = ERR_PTR(errno); | |
644 | ||
645 | trf7970a_send_upstream(trf); | |
646 | } | |
647 | ||
648 | static int trf7970a_transmit(struct trf7970a *trf, struct sk_buff *skb, | |
e2f0f671 MG |
649 | unsigned int len, u8 *prefix, |
650 | unsigned int prefix_len) | |
165063f1 | 651 | { |
7a1e5552 MG |
652 | struct spi_transfer t[2]; |
653 | struct spi_message m; | |
165063f1 MG |
654 | unsigned int timeout; |
655 | int ret; | |
656 | ||
657 | print_hex_dump_debug("trf7970a tx data: ", DUMP_PREFIX_NONE, | |
e2f0f671 | 658 | 16, 1, skb->data, len, false); |
165063f1 | 659 | |
7a1e5552 MG |
660 | spi_message_init(&m); |
661 | ||
662 | memset(&t, 0, sizeof(t)); | |
663 | ||
664 | t[0].tx_buf = prefix; | |
665 | t[0].len = prefix_len; | |
666 | spi_message_add_tail(&t[0], &m); | |
667 | ||
668 | t[1].tx_buf = skb->data; | |
669 | t[1].len = len; | |
670 | spi_message_add_tail(&t[1], &m); | |
671 | ||
672 | ret = spi_sync(trf->spi, &m); | |
165063f1 MG |
673 | if (ret) { |
674 | dev_err(trf->dev, "%s - Can't send tx data: %d\n", __func__, | |
e2f0f671 | 675 | ret); |
165063f1 MG |
676 | return ret; |
677 | } | |
678 | ||
679 | skb_pull(skb, len); | |
680 | ||
681 | if (skb->len > 0) { | |
682 | trf->state = TRF7970A_ST_WAIT_FOR_TX_FIFO; | |
683 | timeout = TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT; | |
684 | } else { | |
9d9304b3 MG |
685 | if (trf->issue_eof) { |
686 | trf->state = TRF7970A_ST_WAIT_TO_ISSUE_EOF; | |
687 | timeout = TRF7970A_WAIT_TO_ISSUE_ISO15693_EOF; | |
688 | } else { | |
689 | trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA; | |
1961843c MG |
690 | |
691 | if (!trf->timeout) | |
692 | timeout = TRF7970A_WAIT_FOR_TX_IRQ; | |
693 | else | |
694 | timeout = trf->timeout; | |
9d9304b3 | 695 | } |
165063f1 MG |
696 | } |
697 | ||
698 | dev_dbg(trf->dev, "Setting timeout for %d ms, state: %d\n", timeout, | |
e2f0f671 | 699 | trf->state); |
165063f1 MG |
700 | |
701 | schedule_delayed_work(&trf->timeout_work, msecs_to_jiffies(timeout)); | |
702 | ||
703 | return 0; | |
704 | } | |
705 | ||
706 | static void trf7970a_fill_fifo(struct trf7970a *trf) | |
707 | { | |
708 | struct sk_buff *skb = trf->tx_skb; | |
709 | unsigned int len; | |
710 | int ret; | |
711 | u8 fifo_bytes; | |
7a1e5552 | 712 | u8 prefix; |
165063f1 MG |
713 | |
714 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes); | |
715 | if (ret) { | |
716 | trf7970a_send_err_upstream(trf, ret); | |
717 | return; | |
718 | } | |
719 | ||
720 | dev_dbg(trf->dev, "Filling FIFO - fifo_bytes: 0x%x\n", fifo_bytes); | |
721 | ||
4542e834 | 722 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; |
165063f1 MG |
723 | |
724 | /* Calculate how much more data can be written to the fifo */ | |
725 | len = TRF7970A_FIFO_SIZE - fifo_bytes; | |
0e840ed5 MG |
726 | if (!len) { |
727 | schedule_delayed_work(&trf->timeout_work, | |
728 | msecs_to_jiffies(TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT)); | |
729 | return; | |
730 | } | |
731 | ||
165063f1 MG |
732 | len = min(skb->len, len); |
733 | ||
7a1e5552 MG |
734 | prefix = TRF7970A_CMD_BIT_CONTINUOUS | TRF7970A_FIFO_IO_REGISTER; |
735 | ||
736 | ret = trf7970a_transmit(trf, skb, len, &prefix, sizeof(prefix)); | |
165063f1 MG |
737 | if (ret) |
738 | trf7970a_send_err_upstream(trf, ret); | |
739 | } | |
740 | ||
741 | static void trf7970a_drain_fifo(struct trf7970a *trf, u8 status) | |
742 | { | |
743 | struct sk_buff *skb = trf->rx_skb; | |
744 | int ret; | |
745 | u8 fifo_bytes; | |
746 | ||
747 | if (status & TRF7970A_IRQ_STATUS_ERROR) { | |
748 | trf7970a_send_err_upstream(trf, -EIO); | |
749 | return; | |
750 | } | |
751 | ||
752 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes); | |
753 | if (ret) { | |
754 | trf7970a_send_err_upstream(trf, ret); | |
755 | return; | |
756 | } | |
757 | ||
758 | dev_dbg(trf->dev, "Draining FIFO - fifo_bytes: 0x%x\n", fifo_bytes); | |
759 | ||
4542e834 MG |
760 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; |
761 | ||
165063f1 MG |
762 | if (!fifo_bytes) |
763 | goto no_rx_data; | |
764 | ||
165063f1 MG |
765 | if (fifo_bytes > skb_tailroom(skb)) { |
766 | skb = skb_copy_expand(skb, skb_headroom(skb), | |
e2f0f671 MG |
767 | max_t(int, fifo_bytes, |
768 | TRF7970A_RX_SKB_ALLOC_SIZE), | |
769 | GFP_KERNEL); | |
165063f1 MG |
770 | if (!skb) { |
771 | trf7970a_send_err_upstream(trf, -ENOMEM); | |
772 | return; | |
773 | } | |
774 | ||
775 | kfree_skb(trf->rx_skb); | |
776 | trf->rx_skb = skb; | |
777 | } | |
778 | ||
779 | ret = trf7970a_read_cont(trf, TRF7970A_FIFO_IO_REGISTER, | |
e2f0f671 | 780 | skb_put(skb, fifo_bytes), fifo_bytes); |
165063f1 MG |
781 | if (ret) { |
782 | trf7970a_send_err_upstream(trf, ret); | |
783 | return; | |
784 | } | |
785 | ||
786 | /* If received Type 2 ACK/NACK, shift right 4 bits and pass up */ | |
787 | if ((trf->framing == NFC_DIGITAL_FRAMING_NFCA_T2T) && (skb->len == 1) && | |
e2f0f671 | 788 | (trf->special_fcn_reg1 == TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX)) { |
165063f1 MG |
789 | skb->data[0] >>= 4; |
790 | status = TRF7970A_IRQ_STATUS_SRX; | |
791 | } else { | |
792 | trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA_CONT; | |
5d8f7594 MG |
793 | |
794 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes); | |
795 | if (ret) { | |
796 | trf7970a_send_err_upstream(trf, ret); | |
797 | return; | |
798 | } | |
799 | ||
800 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; | |
801 | ||
802 | /* If there are bytes in the FIFO, set status to '0' so | |
803 | * the if stmt below doesn't fire and the driver will wait | |
804 | * for the trf7970a to generate another RX interrupt. | |
805 | */ | |
806 | if (fifo_bytes) | |
807 | status = 0; | |
165063f1 MG |
808 | } |
809 | ||
810 | no_rx_data: | |
e2f0f671 | 811 | if (status == TRF7970A_IRQ_STATUS_SRX) { /* Receive complete */ |
165063f1 MG |
812 | trf7970a_send_upstream(trf); |
813 | return; | |
814 | } | |
815 | ||
816 | dev_dbg(trf->dev, "Setting timeout for %d ms\n", | |
e2f0f671 | 817 | TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT); |
165063f1 MG |
818 | |
819 | schedule_delayed_work(&trf->timeout_work, | |
e2f0f671 | 820 | msecs_to_jiffies(TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT)); |
165063f1 MG |
821 | } |
822 | ||
823 | static irqreturn_t trf7970a_irq(int irq, void *dev_id) | |
824 | { | |
825 | struct trf7970a *trf = dev_id; | |
826 | int ret; | |
13b4272a | 827 | u8 status, fifo_bytes, iso_ctrl; |
165063f1 MG |
828 | |
829 | mutex_lock(&trf->lock); | |
830 | ||
b5e17d9b | 831 | if (trf->state == TRF7970A_ST_RF_OFF) { |
165063f1 MG |
832 | mutex_unlock(&trf->lock); |
833 | return IRQ_NONE; | |
834 | } | |
835 | ||
836 | ret = trf7970a_read_irqstatus(trf, &status); | |
837 | if (ret) { | |
838 | mutex_unlock(&trf->lock); | |
839 | return IRQ_NONE; | |
840 | } | |
841 | ||
842 | dev_dbg(trf->dev, "IRQ - state: %d, status: 0x%x\n", trf->state, | |
e2f0f671 | 843 | status); |
165063f1 MG |
844 | |
845 | if (!status) { | |
846 | mutex_unlock(&trf->lock); | |
847 | return IRQ_NONE; | |
848 | } | |
849 | ||
850 | switch (trf->state) { | |
851 | case TRF7970A_ST_IDLE: | |
852 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
13b4272a MG |
853 | /* If initiator and getting interrupts caused by RF noise, |
854 | * turn off the receiver to avoid unnecessary interrupts. | |
855 | * It will be turned back on in trf7970a_send_cmd() when | |
856 | * the next command is issued. | |
165063f1 | 857 | */ |
13b4272a | 858 | if (trf->is_initiator && (status & TRF7970A_IRQ_STATUS_ERROR)) { |
165063f1 MG |
859 | trf7970a_cmd(trf, TRF7970A_CMD_BLOCK_RX); |
860 | trf->state = TRF7970A_ST_IDLE_RX_BLOCKED; | |
861 | } | |
862 | ||
863 | trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); | |
864 | break; | |
865 | case TRF7970A_ST_WAIT_FOR_TX_FIFO: | |
866 | if (status & TRF7970A_IRQ_STATUS_TX) { | |
867 | trf->ignore_timeout = | |
e2f0f671 | 868 | !cancel_delayed_work(&trf->timeout_work); |
165063f1 MG |
869 | trf7970a_fill_fifo(trf); |
870 | } else { | |
871 | trf7970a_send_err_upstream(trf, -EIO); | |
872 | } | |
873 | break; | |
874 | case TRF7970A_ST_WAIT_FOR_RX_DATA: | |
875 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
876 | if (status & TRF7970A_IRQ_STATUS_SRX) { | |
877 | trf->ignore_timeout = | |
e2f0f671 | 878 | !cancel_delayed_work(&trf->timeout_work); |
165063f1 | 879 | trf7970a_drain_fifo(trf, status); |
bece3c54 MG |
880 | } else if (status & TRF7970A_IRQ_STATUS_FIFO) { |
881 | ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, | |
e2f0f671 | 882 | &fifo_bytes); |
bece3c54 MG |
883 | |
884 | fifo_bytes &= ~TRF7970A_FIFO_STATUS_OVERFLOW; | |
885 | ||
886 | if (ret) | |
887 | trf7970a_send_err_upstream(trf, ret); | |
888 | else if (!fifo_bytes) | |
889 | trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); | |
13b4272a | 890 | } else if ((status == TRF7970A_IRQ_STATUS_TX) || |
e2f0f671 MG |
891 | (!trf->is_initiator && |
892 | (status == (TRF7970A_IRQ_STATUS_TX | | |
893 | TRF7970A_IRQ_STATUS_NFC_RF)))) { | |
4dd836e4 | 894 | trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); |
1961843c MG |
895 | |
896 | if (!trf->timeout) { | |
e2f0f671 MG |
897 | trf->ignore_timeout = |
898 | !cancel_delayed_work(&trf->timeout_work); | |
1961843c MG |
899 | trf->rx_skb = ERR_PTR(0); |
900 | trf7970a_send_upstream(trf); | |
901 | break; | |
902 | } | |
13b4272a MG |
903 | |
904 | if (trf->is_initiator) | |
905 | break; | |
906 | ||
907 | iso_ctrl = trf->iso_ctrl; | |
908 | ||
909 | switch (trf->framing) { | |
910 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD: | |
911 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT_NO_CRC; | |
912 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; | |
913 | trf->iso_ctrl = 0xff; /* Force ISO_CTRL write */ | |
914 | break; | |
915 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD_WITH_CRC_A: | |
916 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
917 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; | |
918 | trf->iso_ctrl = 0xff; /* Force ISO_CTRL write */ | |
919 | break; | |
920 | case NFC_DIGITAL_FRAMING_NFCA_ANTICOL_COMPLETE: | |
921 | ret = trf7970a_write(trf, | |
e2f0f671 MG |
922 | TRF7970A_SPECIAL_FCN_REG1, |
923 | TRF7970A_SPECIAL_FCN_REG1_14_ANTICOLL); | |
13b4272a | 924 | if (ret) |
b9e3016a | 925 | goto err_unlock_exit; |
13b4272a MG |
926 | |
927 | trf->special_fcn_reg1 = | |
e2f0f671 | 928 | TRF7970A_SPECIAL_FCN_REG1_14_ANTICOLL; |
13b4272a MG |
929 | break; |
930 | default: | |
931 | break; | |
932 | } | |
933 | ||
934 | if (iso_ctrl != trf->iso_ctrl) { | |
935 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, | |
e2f0f671 | 936 | iso_ctrl); |
13b4272a | 937 | if (ret) |
b9e3016a | 938 | goto err_unlock_exit; |
13b4272a MG |
939 | |
940 | trf->iso_ctrl = iso_ctrl; | |
941 | } | |
4dd836e4 | 942 | } else { |
165063f1 MG |
943 | trf7970a_send_err_upstream(trf, -EIO); |
944 | } | |
945 | break; | |
9d9304b3 MG |
946 | case TRF7970A_ST_WAIT_TO_ISSUE_EOF: |
947 | if (status != TRF7970A_IRQ_STATUS_TX) | |
948 | trf7970a_send_err_upstream(trf, -EIO); | |
949 | break; | |
13b4272a MG |
950 | case TRF7970A_ST_LISTENING: |
951 | if (status & TRF7970A_IRQ_STATUS_SRX) { | |
952 | trf->ignore_timeout = | |
e2f0f671 | 953 | !cancel_delayed_work(&trf->timeout_work); |
13b4272a MG |
954 | trf7970a_drain_fifo(trf, status); |
955 | } else if (!(status & TRF7970A_IRQ_STATUS_NFC_RF)) { | |
956 | trf7970a_send_err_upstream(trf, -EIO); | |
957 | } | |
958 | break; | |
cb174aba MG |
959 | case TRF7970A_ST_LISTENING_MD: |
960 | if (status & TRF7970A_IRQ_STATUS_SRX) { | |
961 | trf->ignore_timeout = | |
e2f0f671 | 962 | !cancel_delayed_work(&trf->timeout_work); |
cb174aba MG |
963 | |
964 | ret = trf7970a_mode_detect(trf, &trf->md_rf_tech); | |
965 | if (ret) { | |
966 | trf7970a_send_err_upstream(trf, ret); | |
967 | } else { | |
968 | trf->state = TRF7970A_ST_LISTENING; | |
969 | trf7970a_drain_fifo(trf, status); | |
970 | } | |
971 | } else if (!(status & TRF7970A_IRQ_STATUS_NFC_RF)) { | |
972 | trf7970a_send_err_upstream(trf, -EIO); | |
973 | } | |
974 | break; | |
165063f1 MG |
975 | default: |
976 | dev_err(trf->dev, "%s - Driver in invalid state: %d\n", | |
e2f0f671 | 977 | __func__, trf->state); |
165063f1 MG |
978 | } |
979 | ||
b9e3016a | 980 | err_unlock_exit: |
165063f1 MG |
981 | mutex_unlock(&trf->lock); |
982 | return IRQ_HANDLED; | |
983 | } | |
984 | ||
9d9304b3 MG |
985 | static void trf7970a_issue_eof(struct trf7970a *trf) |
986 | { | |
987 | int ret; | |
988 | ||
989 | dev_dbg(trf->dev, "Issuing EOF\n"); | |
990 | ||
991 | ret = trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET); | |
992 | if (ret) | |
993 | trf7970a_send_err_upstream(trf, ret); | |
994 | ||
995 | ret = trf7970a_cmd(trf, TRF7970A_CMD_EOF); | |
996 | if (ret) | |
997 | trf7970a_send_err_upstream(trf, ret); | |
998 | ||
999 | trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA; | |
1000 | ||
1001 | dev_dbg(trf->dev, "Setting timeout for %d ms, state: %d\n", | |
e2f0f671 | 1002 | trf->timeout, trf->state); |
9d9304b3 MG |
1003 | |
1004 | schedule_delayed_work(&trf->timeout_work, | |
e2f0f671 | 1005 | msecs_to_jiffies(trf->timeout)); |
9d9304b3 MG |
1006 | } |
1007 | ||
165063f1 MG |
1008 | static void trf7970a_timeout_work_handler(struct work_struct *work) |
1009 | { | |
1010 | struct trf7970a *trf = container_of(work, struct trf7970a, | |
e2f0f671 | 1011 | timeout_work.work); |
165063f1 MG |
1012 | |
1013 | dev_dbg(trf->dev, "Timeout - state: %d, ignore_timeout: %d\n", | |
e2f0f671 | 1014 | trf->state, trf->ignore_timeout); |
165063f1 MG |
1015 | |
1016 | mutex_lock(&trf->lock); | |
1017 | ||
1018 | if (trf->ignore_timeout) | |
1019 | trf->ignore_timeout = false; | |
1020 | else if (trf->state == TRF7970A_ST_WAIT_FOR_RX_DATA_CONT) | |
afa5b5f1 | 1021 | trf7970a_drain_fifo(trf, TRF7970A_IRQ_STATUS_SRX); |
9d9304b3 MG |
1022 | else if (trf->state == TRF7970A_ST_WAIT_TO_ISSUE_EOF) |
1023 | trf7970a_issue_eof(trf); | |
165063f1 MG |
1024 | else |
1025 | trf7970a_send_err_upstream(trf, -ETIMEDOUT); | |
1026 | ||
1027 | mutex_unlock(&trf->lock); | |
1028 | } | |
1029 | ||
1030 | static int trf7970a_init(struct trf7970a *trf) | |
1031 | { | |
1032 | int ret; | |
1033 | ||
1034 | dev_dbg(trf->dev, "Initializing device - state: %d\n", trf->state); | |
1035 | ||
1036 | ret = trf7970a_cmd(trf, TRF7970A_CMD_SOFT_INIT); | |
1037 | if (ret) | |
1038 | goto err_out; | |
1039 | ||
1040 | ret = trf7970a_cmd(trf, TRF7970A_CMD_IDLE); | |
1041 | if (ret) | |
1042 | goto err_out; | |
1043 | ||
49d22c70 | 1044 | ret = trf7970a_write(trf, TRF7970A_REG_IO_CTRL, |
e2f0f671 | 1045 | trf->io_ctrl | TRF7970A_REG_IO_CTRL_VRS(0x1)); |
49d22c70 GL |
1046 | if (ret) |
1047 | goto err_out; | |
1048 | ||
58d46f53 GL |
1049 | ret = trf7970a_write(trf, TRF7970A_NFC_TARGET_LEVEL, 0); |
1050 | if (ret) | |
1051 | goto err_out; | |
1052 | ||
4e007f81 MG |
1053 | usleep_range(1000, 2000); |
1054 | ||
7149d6bf MG |
1055 | trf->chip_status_ctrl &= ~TRF7970A_CHIP_STATUS_RF_ON; |
1056 | ||
837eb4d2 | 1057 | ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL, |
e2f0f671 | 1058 | trf->modulator_sys_clk_ctrl); |
6c08df42 MG |
1059 | if (ret) |
1060 | goto err_out; | |
1061 | ||
165063f1 | 1062 | ret = trf7970a_write(trf, TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS, |
e2f0f671 MG |
1063 | TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_96 | |
1064 | TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_32); | |
165063f1 MG |
1065 | if (ret) |
1066 | goto err_out; | |
1067 | ||
1068 | ret = trf7970a_write(trf, TRF7970A_SPECIAL_FCN_REG1, 0); | |
1069 | if (ret) | |
1070 | goto err_out; | |
1071 | ||
1072 | trf->special_fcn_reg1 = 0; | |
1073 | ||
49d19cc7 | 1074 | trf->iso_ctrl = 0xff; |
165063f1 MG |
1075 | return 0; |
1076 | ||
1077 | err_out: | |
1078 | dev_dbg(trf->dev, "Couldn't init device: %d\n", ret); | |
1079 | return ret; | |
1080 | } | |
1081 | ||
1082 | static void trf7970a_switch_rf_off(struct trf7970a *trf) | |
1083 | { | |
cfc708db | 1084 | if ((trf->state == TRF7970A_ST_PWR_OFF) || |
e2f0f671 | 1085 | (trf->state == TRF7970A_ST_RF_OFF)) |
cfc708db MG |
1086 | return; |
1087 | ||
165063f1 MG |
1088 | dev_dbg(trf->dev, "Switching rf off\n"); |
1089 | ||
a1d2dc5b MG |
1090 | trf->chip_status_ctrl &= ~TRF7970A_CHIP_STATUS_RF_ON; |
1091 | ||
1092 | trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, trf->chip_status_ctrl); | |
1093 | ||
165063f1 | 1094 | trf->aborting = false; |
b5e17d9b | 1095 | trf->state = TRF7970A_ST_RF_OFF; |
e6403b7c MG |
1096 | |
1097 | pm_runtime_mark_last_busy(trf->dev); | |
1098 | pm_runtime_put_autosuspend(trf->dev); | |
165063f1 MG |
1099 | } |
1100 | ||
0a1de842 | 1101 | static int trf7970a_switch_rf_on(struct trf7970a *trf) |
165063f1 | 1102 | { |
a08e5454 MG |
1103 | int ret; |
1104 | ||
165063f1 MG |
1105 | dev_dbg(trf->dev, "Switching rf on\n"); |
1106 | ||
e6403b7c | 1107 | pm_runtime_get_sync(trf->dev); |
165063f1 | 1108 | |
e2f0f671 | 1109 | if (trf->state != TRF7970A_ST_RF_OFF) { /* Power on, RF off */ |
ceccd6aa | 1110 | dev_err(trf->dev, "%s - Incorrect state: %d\n", __func__, |
e2f0f671 | 1111 | trf->state); |
ceccd6aa MG |
1112 | return -EINVAL; |
1113 | } | |
1114 | ||
a08e5454 MG |
1115 | ret = trf7970a_init(trf); |
1116 | if (ret) { | |
1117 | dev_err(trf->dev, "%s - Can't initialize: %d\n", __func__, ret); | |
0a1de842 | 1118 | return ret; |
a08e5454 MG |
1119 | } |
1120 | ||
e6403b7c | 1121 | trf->state = TRF7970A_ST_IDLE; |
0a1de842 MG |
1122 | |
1123 | return 0; | |
165063f1 MG |
1124 | } |
1125 | ||
1126 | static int trf7970a_switch_rf(struct nfc_digital_dev *ddev, bool on) | |
1127 | { | |
1128 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
0a1de842 | 1129 | int ret = 0; |
165063f1 MG |
1130 | |
1131 | dev_dbg(trf->dev, "Switching RF - state: %d, on: %d\n", trf->state, on); | |
1132 | ||
1133 | mutex_lock(&trf->lock); | |
1134 | ||
1135 | if (on) { | |
1136 | switch (trf->state) { | |
ceccd6aa | 1137 | case TRF7970A_ST_PWR_OFF: |
b5e17d9b | 1138 | case TRF7970A_ST_RF_OFF: |
0a1de842 | 1139 | ret = trf7970a_switch_rf_on(trf); |
165063f1 MG |
1140 | break; |
1141 | case TRF7970A_ST_IDLE: | |
1142 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
1143 | break; | |
1144 | default: | |
1145 | dev_err(trf->dev, "%s - Invalid request: %d %d\n", | |
e2f0f671 | 1146 | __func__, trf->state, on); |
165063f1 | 1147 | trf7970a_switch_rf_off(trf); |
0a1de842 | 1148 | ret = -EINVAL; |
165063f1 MG |
1149 | } |
1150 | } else { | |
1151 | switch (trf->state) { | |
ceccd6aa | 1152 | case TRF7970A_ST_PWR_OFF: |
b5e17d9b | 1153 | case TRF7970A_ST_RF_OFF: |
165063f1 MG |
1154 | break; |
1155 | default: | |
1156 | dev_err(trf->dev, "%s - Invalid request: %d %d\n", | |
e2f0f671 | 1157 | __func__, trf->state, on); |
0a1de842 | 1158 | ret = -EINVAL; |
165063f1 MG |
1159 | /* FALLTHROUGH */ |
1160 | case TRF7970A_ST_IDLE: | |
1161 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
13b4272a MG |
1162 | case TRF7970A_ST_WAIT_FOR_RX_DATA: |
1163 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
165063f1 MG |
1164 | trf7970a_switch_rf_off(trf); |
1165 | } | |
1166 | } | |
1167 | ||
1168 | mutex_unlock(&trf->lock); | |
0a1de842 | 1169 | return ret; |
165063f1 MG |
1170 | } |
1171 | ||
307e5caf | 1172 | static int trf7970a_in_config_rf_tech(struct trf7970a *trf, int tech) |
165063f1 MG |
1173 | { |
1174 | int ret = 0; | |
1175 | ||
1176 | dev_dbg(trf->dev, "rf technology: %d\n", tech); | |
1177 | ||
1178 | switch (tech) { | |
1179 | case NFC_DIGITAL_RF_TECH_106A: | |
49d19cc7 | 1180 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_14443A_106; |
837eb4d2 | 1181 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1182 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1183 | TRF7970A_MODULATOR_DEPTH_OOK; | |
4e64eff8 | 1184 | trf->guard_time = TRF7970A_GUARD_TIME_NFCA; |
165063f1 | 1185 | break; |
742b1f9f MG |
1186 | case NFC_DIGITAL_RF_TECH_106B: |
1187 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_14443B_106; | |
837eb4d2 | 1188 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1189 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1190 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
4e64eff8 | 1191 | trf->guard_time = TRF7970A_GUARD_TIME_NFCB; |
742b1f9f | 1192 | break; |
6857bb96 MG |
1193 | case NFC_DIGITAL_RF_TECH_212F: |
1194 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_FELICA_212; | |
837eb4d2 | 1195 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1196 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1197 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
4e64eff8 | 1198 | trf->guard_time = TRF7970A_GUARD_TIME_NFCF; |
6857bb96 MG |
1199 | break; |
1200 | case NFC_DIGITAL_RF_TECH_424F: | |
1201 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_FELICA_424; | |
837eb4d2 | 1202 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1203 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1204 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
4e64eff8 | 1205 | trf->guard_time = TRF7970A_GUARD_TIME_NFCF; |
6857bb96 | 1206 | break; |
9d9304b3 | 1207 | case NFC_DIGITAL_RF_TECH_ISO15693: |
49d19cc7 | 1208 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648; |
837eb4d2 | 1209 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1210 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1211 | TRF7970A_MODULATOR_DEPTH_OOK; | |
4e64eff8 | 1212 | trf->guard_time = TRF7970A_GUARD_TIME_15693; |
9d9304b3 | 1213 | break; |
165063f1 MG |
1214 | default: |
1215 | dev_dbg(trf->dev, "Unsupported rf technology: %d\n", tech); | |
1216 | return -EINVAL; | |
1217 | } | |
1218 | ||
1219 | trf->technology = tech; | |
1220 | ||
13b4272a MG |
1221 | /* If in initiator mode and not changing the RF tech due to a |
1222 | * PSL sequence (indicated by 'trf->iso_ctrl == 0xff' from | |
1223 | * trf7970a_init()), clear the NFC Target Detection Level register | |
1224 | * due to erratum. | |
1225 | */ | |
1226 | if (trf->iso_ctrl == 0xff) | |
1227 | ret = trf7970a_write(trf, TRF7970A_NFC_TARGET_LEVEL, 0); | |
1228 | ||
165063f1 MG |
1229 | return ret; |
1230 | } | |
1231 | ||
851ee3cb MG |
1232 | static int trf7970a_is_rf_field(struct trf7970a *trf, bool *is_rf_field) |
1233 | { | |
1234 | int ret; | |
1235 | u8 rssi; | |
1236 | ||
1237 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 MG |
1238 | trf->chip_status_ctrl | |
1239 | TRF7970A_CHIP_STATUS_REC_ON); | |
851ee3cb MG |
1240 | if (ret) |
1241 | return ret; | |
1242 | ||
1243 | ret = trf7970a_cmd(trf, TRF7970A_CMD_TEST_EXT_RF); | |
1244 | if (ret) | |
1245 | return ret; | |
1246 | ||
1247 | usleep_range(50, 60); | |
1248 | ||
1249 | ret = trf7970a_read(trf, TRF7970A_RSSI_OSC_STATUS, &rssi); | |
1250 | if (ret) | |
1251 | return ret; | |
1252 | ||
1253 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 | 1254 | trf->chip_status_ctrl); |
851ee3cb MG |
1255 | if (ret) |
1256 | return ret; | |
1257 | ||
1258 | if (rssi & TRF7970A_RSSI_OSC_STATUS_RSSI_MASK) | |
1259 | *is_rf_field = true; | |
1260 | else | |
1261 | *is_rf_field = false; | |
1262 | ||
1263 | return 0; | |
1264 | } | |
1265 | ||
307e5caf | 1266 | static int trf7970a_in_config_framing(struct trf7970a *trf, int framing) |
165063f1 | 1267 | { |
49d19cc7 | 1268 | u8 iso_ctrl = trf->iso_ctrl_tech; |
851ee3cb | 1269 | bool is_rf_field = false; |
49d19cc7 MG |
1270 | int ret; |
1271 | ||
165063f1 MG |
1272 | dev_dbg(trf->dev, "framing: %d\n", framing); |
1273 | ||
1274 | switch (framing) { | |
1275 | case NFC_DIGITAL_FRAMING_NFCA_SHORT: | |
1276 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD: | |
1277 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT_NO_CRC; | |
49d19cc7 | 1278 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; |
165063f1 MG |
1279 | break; |
1280 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD_WITH_CRC_A: | |
80062891 | 1281 | case NFC_DIGITAL_FRAMING_NFCA_T4T: |
742b1f9f MG |
1282 | case NFC_DIGITAL_FRAMING_NFCB: |
1283 | case NFC_DIGITAL_FRAMING_NFCB_T4T: | |
6857bb96 MG |
1284 | case NFC_DIGITAL_FRAMING_NFCF: |
1285 | case NFC_DIGITAL_FRAMING_NFCF_T3T: | |
9d9304b3 MG |
1286 | case NFC_DIGITAL_FRAMING_ISO15693_INVENTORY: |
1287 | case NFC_DIGITAL_FRAMING_ISO15693_T5T: | |
13b4272a MG |
1288 | case NFC_DIGITAL_FRAMING_NFCA_NFC_DEP: |
1289 | case NFC_DIGITAL_FRAMING_NFCF_NFC_DEP: | |
165063f1 | 1290 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; |
49d19cc7 | 1291 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; |
165063f1 MG |
1292 | break; |
1293 | case NFC_DIGITAL_FRAMING_NFCA_T2T: | |
1294 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
49d19cc7 | 1295 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; |
165063f1 MG |
1296 | break; |
1297 | default: | |
1298 | dev_dbg(trf->dev, "Unsupported Framing: %d\n", framing); | |
1299 | return -EINVAL; | |
1300 | } | |
1301 | ||
1302 | trf->framing = framing; | |
1303 | ||
851ee3cb MG |
1304 | if (!(trf->chip_status_ctrl & TRF7970A_CHIP_STATUS_RF_ON)) { |
1305 | ret = trf7970a_is_rf_field(trf, &is_rf_field); | |
1306 | if (ret) | |
1307 | return ret; | |
1308 | ||
1309 | if (is_rf_field) | |
1310 | return -EBUSY; | |
1311 | } | |
1312 | ||
49d19cc7 MG |
1313 | if (iso_ctrl != trf->iso_ctrl) { |
1314 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, iso_ctrl); | |
1315 | if (ret) | |
1316 | return ret; | |
1317 | ||
1318 | trf->iso_ctrl = iso_ctrl; | |
a0822a7e MG |
1319 | |
1320 | ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL, | |
e2f0f671 | 1321 | trf->modulator_sys_clk_ctrl); |
a0822a7e MG |
1322 | if (ret) |
1323 | return ret; | |
49d19cc7 MG |
1324 | } |
1325 | ||
a1d2dc5b MG |
1326 | if (!(trf->chip_status_ctrl & TRF7970A_CHIP_STATUS_RF_ON)) { |
1327 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 MG |
1328 | trf->chip_status_ctrl | |
1329 | TRF7970A_CHIP_STATUS_RF_ON); | |
a1d2dc5b MG |
1330 | if (ret) |
1331 | return ret; | |
1332 | ||
1333 | trf->chip_status_ctrl |= TRF7970A_CHIP_STATUS_RF_ON; | |
1334 | ||
4e64eff8 | 1335 | usleep_range(trf->guard_time, trf->guard_time + 1000); |
a1d2dc5b MG |
1336 | } |
1337 | ||
49d19cc7 | 1338 | return 0; |
165063f1 MG |
1339 | } |
1340 | ||
1341 | static int trf7970a_in_configure_hw(struct nfc_digital_dev *ddev, int type, | |
e2f0f671 | 1342 | int param) |
165063f1 MG |
1343 | { |
1344 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
18422e68 | 1345 | int ret; |
165063f1 MG |
1346 | |
1347 | dev_dbg(trf->dev, "Configure hw - type: %d, param: %d\n", type, param); | |
1348 | ||
1349 | mutex_lock(&trf->lock); | |
1350 | ||
13b4272a MG |
1351 | trf->is_initiator = true; |
1352 | ||
ceccd6aa | 1353 | if ((trf->state == TRF7970A_ST_PWR_OFF) || |
e2f0f671 | 1354 | (trf->state == TRF7970A_ST_RF_OFF)) { |
0a1de842 MG |
1355 | ret = trf7970a_switch_rf_on(trf); |
1356 | if (ret) | |
1357 | goto err_unlock; | |
1358 | } | |
165063f1 MG |
1359 | |
1360 | switch (type) { | |
1361 | case NFC_DIGITAL_CONFIG_RF_TECH: | |
307e5caf | 1362 | ret = trf7970a_in_config_rf_tech(trf, param); |
165063f1 MG |
1363 | break; |
1364 | case NFC_DIGITAL_CONFIG_FRAMING: | |
307e5caf | 1365 | ret = trf7970a_in_config_framing(trf, param); |
165063f1 MG |
1366 | break; |
1367 | default: | |
1368 | dev_dbg(trf->dev, "Unknown type: %d\n", type); | |
1369 | ret = -EINVAL; | |
1370 | } | |
1371 | ||
0a1de842 | 1372 | err_unlock: |
165063f1 MG |
1373 | mutex_unlock(&trf->lock); |
1374 | return ret; | |
1375 | } | |
1376 | ||
9d9304b3 MG |
1377 | static int trf7970a_is_iso15693_write_or_lock(u8 cmd) |
1378 | { | |
1379 | switch (cmd) { | |
1380 | case ISO15693_CMD_WRITE_SINGLE_BLOCK: | |
1381 | case ISO15693_CMD_LOCK_BLOCK: | |
1382 | case ISO15693_CMD_WRITE_MULTIPLE_BLOCK: | |
1383 | case ISO15693_CMD_WRITE_AFI: | |
1384 | case ISO15693_CMD_LOCK_AFI: | |
1385 | case ISO15693_CMD_WRITE_DSFID: | |
1386 | case ISO15693_CMD_LOCK_DSFID: | |
1387 | return 1; | |
1388 | break; | |
1389 | default: | |
1390 | return 0; | |
1391 | } | |
1392 | } | |
1393 | ||
165063f1 MG |
1394 | static int trf7970a_per_cmd_config(struct trf7970a *trf, struct sk_buff *skb) |
1395 | { | |
1396 | u8 *req = skb->data; | |
9d9304b3 | 1397 | u8 special_fcn_reg1, iso_ctrl; |
165063f1 MG |
1398 | int ret; |
1399 | ||
9d9304b3 MG |
1400 | trf->issue_eof = false; |
1401 | ||
165063f1 MG |
1402 | /* When issuing Type 2 read command, make sure the '4_bit_RX' bit in |
1403 | * special functions register 1 is cleared; otherwise, its a write or | |
1404 | * sector select command and '4_bit_RX' must be set. | |
9d9304b3 MG |
1405 | * |
1406 | * When issuing an ISO 15693 command, inspect the flags byte to see | |
1407 | * what speed to use. Also, remember if the OPTION flag is set on | |
1408 | * a Type 5 write or lock command so the driver will know that it | |
1409 | * has to send an EOF in order to get a response. | |
165063f1 MG |
1410 | */ |
1411 | if ((trf->technology == NFC_DIGITAL_RF_TECH_106A) && | |
e2f0f671 | 1412 | (trf->framing == NFC_DIGITAL_FRAMING_NFCA_T2T)) { |
165063f1 MG |
1413 | if (req[0] == NFC_T2T_CMD_READ) |
1414 | special_fcn_reg1 = 0; | |
1415 | else | |
1416 | special_fcn_reg1 = TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX; | |
1417 | ||
1418 | if (special_fcn_reg1 != trf->special_fcn_reg1) { | |
1419 | ret = trf7970a_write(trf, TRF7970A_SPECIAL_FCN_REG1, | |
e2f0f671 | 1420 | special_fcn_reg1); |
165063f1 MG |
1421 | if (ret) |
1422 | return ret; | |
1423 | ||
1424 | trf->special_fcn_reg1 = special_fcn_reg1; | |
1425 | } | |
9d9304b3 MG |
1426 | } else if (trf->technology == NFC_DIGITAL_RF_TECH_ISO15693) { |
1427 | iso_ctrl = trf->iso_ctrl & ~TRF7970A_ISO_CTRL_RFID_SPEED_MASK; | |
1428 | ||
1429 | switch (req[0] & ISO15693_REQ_FLAG_SPEED_MASK) { | |
1430 | case 0x00: | |
1431 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_SGL_1OF4_662; | |
1432 | break; | |
1433 | case ISO15693_REQ_FLAG_SUB_CARRIER: | |
1434 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_DBL_1OF4_667a; | |
1435 | break; | |
1436 | case ISO15693_REQ_FLAG_DATA_RATE: | |
1437 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648; | |
1438 | break; | |
1439 | case (ISO15693_REQ_FLAG_SUB_CARRIER | | |
e2f0f671 | 1440 | ISO15693_REQ_FLAG_DATA_RATE): |
9d9304b3 MG |
1441 | iso_ctrl |= TRF7970A_ISO_CTRL_15693_DBL_1OF4_2669; |
1442 | break; | |
1443 | } | |
1444 | ||
1445 | if (iso_ctrl != trf->iso_ctrl) { | |
1446 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, iso_ctrl); | |
1447 | if (ret) | |
1448 | return ret; | |
1449 | ||
1450 | trf->iso_ctrl = iso_ctrl; | |
1451 | } | |
1452 | ||
a81d1ab3 MG |
1453 | if ((trf->framing == NFC_DIGITAL_FRAMING_ISO15693_T5T) && |
1454 | trf7970a_is_iso15693_write_or_lock(req[1]) && | |
1455 | (req[0] & ISO15693_REQ_FLAG_OPTION)) | |
1456 | trf->issue_eof = true; | |
165063f1 MG |
1457 | } |
1458 | ||
1459 | return 0; | |
1460 | } | |
1461 | ||
13b4272a | 1462 | static int trf7970a_send_cmd(struct nfc_digital_dev *ddev, |
e2f0f671 MG |
1463 | struct sk_buff *skb, u16 timeout, |
1464 | nfc_digital_cmd_complete_t cb, void *arg) | |
165063f1 MG |
1465 | { |
1466 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
7a1e5552 | 1467 | u8 prefix[5]; |
165063f1 MG |
1468 | unsigned int len; |
1469 | int ret; | |
aff0564a | 1470 | u8 status; |
165063f1 MG |
1471 | |
1472 | dev_dbg(trf->dev, "New request - state: %d, timeout: %d ms, len: %d\n", | |
e2f0f671 | 1473 | trf->state, timeout, skb->len); |
165063f1 MG |
1474 | |
1475 | if (skb->len > TRF7970A_TX_MAX) | |
1476 | return -EINVAL; | |
1477 | ||
1478 | mutex_lock(&trf->lock); | |
1479 | ||
1480 | if ((trf->state != TRF7970A_ST_IDLE) && | |
e2f0f671 | 1481 | (trf->state != TRF7970A_ST_IDLE_RX_BLOCKED)) { |
165063f1 | 1482 | dev_err(trf->dev, "%s - Bogus state: %d\n", __func__, |
e2f0f671 | 1483 | trf->state); |
165063f1 MG |
1484 | ret = -EIO; |
1485 | goto out_err; | |
1486 | } | |
1487 | ||
1488 | if (trf->aborting) { | |
1489 | dev_dbg(trf->dev, "Abort process complete\n"); | |
1490 | trf->aborting = false; | |
1491 | ret = -ECANCELED; | |
1492 | goto out_err; | |
1493 | } | |
1494 | ||
1961843c MG |
1495 | if (timeout) { |
1496 | trf->rx_skb = nfc_alloc_recv_skb(TRF7970A_RX_SKB_ALLOC_SIZE, | |
e2f0f671 | 1497 | GFP_KERNEL); |
1961843c MG |
1498 | if (!trf->rx_skb) { |
1499 | dev_dbg(trf->dev, "Can't alloc rx_skb\n"); | |
1500 | ret = -ENOMEM; | |
1501 | goto out_err; | |
1502 | } | |
165063f1 MG |
1503 | } |
1504 | ||
1505 | if (trf->state == TRF7970A_ST_IDLE_RX_BLOCKED) { | |
1506 | ret = trf7970a_cmd(trf, TRF7970A_CMD_ENABLE_RX); | |
1507 | if (ret) | |
1508 | goto out_err; | |
1509 | ||
1510 | trf->state = TRF7970A_ST_IDLE; | |
1511 | } | |
1512 | ||
13b4272a MG |
1513 | if (trf->is_initiator) { |
1514 | ret = trf7970a_per_cmd_config(trf, skb); | |
1515 | if (ret) | |
1516 | goto out_err; | |
1517 | } | |
165063f1 MG |
1518 | |
1519 | trf->ddev = ddev; | |
1520 | trf->tx_skb = skb; | |
1521 | trf->cb = cb; | |
1522 | trf->cb_arg = arg; | |
1523 | trf->timeout = timeout; | |
1524 | trf->ignore_timeout = false; | |
1525 | ||
1526 | len = skb->len; | |
165063f1 MG |
1527 | |
1528 | /* TX data must be prefixed with a FIFO reset cmd, a cmd that depends | |
1529 | * on what the current framing is, the address of the TX length byte 1 | |
1530 | * register (0x1d), and the 2 byte length of the data to be transmitted. | |
7a1e5552 | 1531 | * That totals 5 bytes. |
165063f1 MG |
1532 | */ |
1533 | prefix[0] = TRF7970A_CMD_BIT_CTRL | | |
e2f0f671 | 1534 | TRF7970A_CMD_BIT_OPCODE(TRF7970A_CMD_FIFO_RESET); |
165063f1 | 1535 | prefix[1] = TRF7970A_CMD_BIT_CTRL | |
e2f0f671 | 1536 | TRF7970A_CMD_BIT_OPCODE(trf->tx_cmd); |
165063f1 MG |
1537 | prefix[2] = TRF7970A_CMD_BIT_CONTINUOUS | TRF7970A_TX_LENGTH_BYTE1; |
1538 | ||
1539 | if (trf->framing == NFC_DIGITAL_FRAMING_NFCA_SHORT) { | |
1540 | prefix[3] = 0x00; | |
e2f0f671 | 1541 | prefix[4] = 0x0f; /* 7 bits */ |
165063f1 MG |
1542 | } else { |
1543 | prefix[3] = (len & 0xf00) >> 4; | |
1544 | prefix[3] |= ((len & 0xf0) >> 4); | |
1545 | prefix[4] = ((len & 0x0f) << 4); | |
1546 | } | |
1547 | ||
1548 | len = min_t(int, skb->len, TRF7970A_FIFO_SIZE); | |
1549 | ||
aff0564a MG |
1550 | /* Clear possible spurious interrupt */ |
1551 | ret = trf7970a_read_irqstatus(trf, &status); | |
1552 | if (ret) | |
1553 | goto out_err; | |
1554 | ||
7a1e5552 | 1555 | ret = trf7970a_transmit(trf, skb, len, prefix, sizeof(prefix)); |
165063f1 MG |
1556 | if (ret) { |
1557 | kfree_skb(trf->rx_skb); | |
1558 | trf->rx_skb = NULL; | |
1559 | } | |
1560 | ||
1561 | out_err: | |
1562 | mutex_unlock(&trf->lock); | |
1563 | return ret; | |
1564 | } | |
1565 | ||
13b4272a | 1566 | static int trf7970a_tg_config_rf_tech(struct trf7970a *trf, int tech) |
165063f1 | 1567 | { |
13b4272a MG |
1568 | int ret = 0; |
1569 | ||
1570 | dev_dbg(trf->dev, "rf technology: %d\n", tech); | |
1571 | ||
1572 | switch (tech) { | |
1573 | case NFC_DIGITAL_RF_TECH_106A: | |
1574 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE | | |
e2f0f671 | 1575 | TRF7970A_ISO_CTRL_NFC_CE | TRF7970A_ISO_CTRL_NFC_CE_14443A; |
837eb4d2 | 1576 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1577 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1578 | TRF7970A_MODULATOR_DEPTH_OOK; | |
13b4272a MG |
1579 | break; |
1580 | case NFC_DIGITAL_RF_TECH_212F: | |
1581 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE | | |
e2f0f671 | 1582 | TRF7970A_ISO_CTRL_NFC_NFCF_212; |
837eb4d2 | 1583 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1584 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1585 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
13b4272a MG |
1586 | break; |
1587 | case NFC_DIGITAL_RF_TECH_424F: | |
1588 | trf->iso_ctrl_tech = TRF7970A_ISO_CTRL_NFC_NFC_CE_MODE | | |
e2f0f671 | 1589 | TRF7970A_ISO_CTRL_NFC_NFCF_424; |
837eb4d2 | 1590 | trf->modulator_sys_clk_ctrl = |
e2f0f671 MG |
1591 | (trf->modulator_sys_clk_ctrl & 0xf8) | |
1592 | TRF7970A_MODULATOR_DEPTH_ASK10; | |
13b4272a MG |
1593 | break; |
1594 | default: | |
1595 | dev_dbg(trf->dev, "Unsupported rf technology: %d\n", tech); | |
1596 | return -EINVAL; | |
1597 | } | |
1598 | ||
1599 | trf->technology = tech; | |
165063f1 | 1600 | |
13b4272a MG |
1601 | /* Normally we write the ISO_CTRL register in |
1602 | * trf7970a_tg_config_framing() because the framing can change | |
1603 | * the value written. However, when sending a PSL RES, | |
1604 | * digital_tg_send_psl_res_complete() doesn't call | |
1605 | * trf7970a_tg_config_framing() so we must write the register | |
1606 | * here. | |
1607 | */ | |
1608 | if ((trf->framing == NFC_DIGITAL_FRAMING_NFC_DEP_ACTIVATED) && | |
e2f0f671 | 1609 | (trf->iso_ctrl_tech != trf->iso_ctrl)) { |
13b4272a | 1610 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, |
e2f0f671 | 1611 | trf->iso_ctrl_tech); |
13b4272a MG |
1612 | |
1613 | trf->iso_ctrl = trf->iso_ctrl_tech; | |
1614 | } | |
165063f1 | 1615 | |
13b4272a | 1616 | return ret; |
165063f1 MG |
1617 | } |
1618 | ||
13b4272a MG |
1619 | /* Since this is a target routine, several of the framing calls are |
1620 | * made between receiving the request and sending the response so they | |
1621 | * should take effect until after the response is sent. This is accomplished | |
1622 | * by skipping the ISO_CTRL register write here and doing it in the interrupt | |
1623 | * handler. | |
1624 | */ | |
1625 | static int trf7970a_tg_config_framing(struct trf7970a *trf, int framing) | |
1626 | { | |
1627 | u8 iso_ctrl = trf->iso_ctrl_tech; | |
1628 | int ret; | |
1629 | ||
1630 | dev_dbg(trf->dev, "framing: %d\n", framing); | |
1631 | ||
1632 | switch (framing) { | |
1633 | case NFC_DIGITAL_FRAMING_NFCA_NFC_DEP: | |
1634 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT_NO_CRC; | |
1635 | iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N; | |
1636 | break; | |
1637 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD: | |
1638 | case NFC_DIGITAL_FRAMING_NFCA_STANDARD_WITH_CRC_A: | |
1639 | case NFC_DIGITAL_FRAMING_NFCA_ANTICOL_COMPLETE: | |
1640 | /* These ones are applied in the interrupt handler */ | |
1641 | iso_ctrl = trf->iso_ctrl; /* Don't write to ISO_CTRL yet */ | |
1642 | break; | |
1643 | case NFC_DIGITAL_FRAMING_NFCF_NFC_DEP: | |
1644 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
1645 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; | |
1646 | break; | |
1647 | case NFC_DIGITAL_FRAMING_NFC_DEP_ACTIVATED: | |
1648 | trf->tx_cmd = TRF7970A_CMD_TRANSMIT; | |
1649 | iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N; | |
1650 | break; | |
1651 | default: | |
1652 | dev_dbg(trf->dev, "Unsupported Framing: %d\n", framing); | |
1653 | return -EINVAL; | |
1654 | } | |
1655 | ||
1656 | trf->framing = framing; | |
1657 | ||
1658 | if (iso_ctrl != trf->iso_ctrl) { | |
1659 | ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, iso_ctrl); | |
1660 | if (ret) | |
1661 | return ret; | |
1662 | ||
1663 | trf->iso_ctrl = iso_ctrl; | |
1664 | ||
1665 | ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL, | |
e2f0f671 | 1666 | trf->modulator_sys_clk_ctrl); |
13b4272a MG |
1667 | if (ret) |
1668 | return ret; | |
1669 | } | |
1670 | ||
1671 | if (!(trf->chip_status_ctrl & TRF7970A_CHIP_STATUS_RF_ON)) { | |
1672 | ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL, | |
e2f0f671 MG |
1673 | trf->chip_status_ctrl | |
1674 | TRF7970A_CHIP_STATUS_RF_ON); | |
13b4272a MG |
1675 | if (ret) |
1676 | return ret; | |
1677 | ||
1678 | trf->chip_status_ctrl |= TRF7970A_CHIP_STATUS_RF_ON; | |
1679 | } | |
1680 | ||
1681 | return 0; | |
1682 | } | |
1683 | ||
1684 | static int trf7970a_tg_configure_hw(struct nfc_digital_dev *ddev, int type, | |
e2f0f671 | 1685 | int param) |
165063f1 MG |
1686 | { |
1687 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
13b4272a MG |
1688 | int ret; |
1689 | ||
1690 | dev_dbg(trf->dev, "Configure hw - type: %d, param: %d\n", type, param); | |
1691 | ||
1692 | mutex_lock(&trf->lock); | |
1693 | ||
1694 | trf->is_initiator = false; | |
165063f1 | 1695 | |
13b4272a | 1696 | if ((trf->state == TRF7970A_ST_PWR_OFF) || |
e2f0f671 | 1697 | (trf->state == TRF7970A_ST_RF_OFF)) { |
13b4272a MG |
1698 | ret = trf7970a_switch_rf_on(trf); |
1699 | if (ret) | |
1700 | goto err_unlock; | |
1701 | } | |
1702 | ||
1703 | switch (type) { | |
1704 | case NFC_DIGITAL_CONFIG_RF_TECH: | |
1705 | ret = trf7970a_tg_config_rf_tech(trf, param); | |
1706 | break; | |
1707 | case NFC_DIGITAL_CONFIG_FRAMING: | |
1708 | ret = trf7970a_tg_config_framing(trf, param); | |
1709 | break; | |
1710 | default: | |
1711 | dev_dbg(trf->dev, "Unknown type: %d\n", type); | |
1712 | ret = -EINVAL; | |
1713 | } | |
165063f1 | 1714 | |
13b4272a MG |
1715 | err_unlock: |
1716 | mutex_unlock(&trf->lock); | |
1717 | return ret; | |
165063f1 MG |
1718 | } |
1719 | ||
cb174aba | 1720 | static int _trf7970a_tg_listen(struct nfc_digital_dev *ddev, u16 timeout, |
e2f0f671 MG |
1721 | nfc_digital_cmd_complete_t cb, void *arg, |
1722 | bool mode_detect) | |
165063f1 MG |
1723 | { |
1724 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
13b4272a MG |
1725 | int ret; |
1726 | ||
13b4272a | 1727 | mutex_lock(&trf->lock); |
165063f1 | 1728 | |
13b4272a | 1729 | if ((trf->state != TRF7970A_ST_IDLE) && |
e2f0f671 | 1730 | (trf->state != TRF7970A_ST_IDLE_RX_BLOCKED)) { |
13b4272a | 1731 | dev_err(trf->dev, "%s - Bogus state: %d\n", __func__, |
e2f0f671 | 1732 | trf->state); |
13b4272a MG |
1733 | ret = -EIO; |
1734 | goto out_err; | |
1735 | } | |
1736 | ||
1737 | if (trf->aborting) { | |
1738 | dev_dbg(trf->dev, "Abort process complete\n"); | |
1739 | trf->aborting = false; | |
1740 | ret = -ECANCELED; | |
1741 | goto out_err; | |
1742 | } | |
1743 | ||
1744 | trf->rx_skb = nfc_alloc_recv_skb(TRF7970A_RX_SKB_ALLOC_SIZE, | |
e2f0f671 | 1745 | GFP_KERNEL); |
13b4272a MG |
1746 | if (!trf->rx_skb) { |
1747 | dev_dbg(trf->dev, "Can't alloc rx_skb\n"); | |
1748 | ret = -ENOMEM; | |
1749 | goto out_err; | |
1750 | } | |
1751 | ||
1752 | ret = trf7970a_write(trf, TRF7970A_RX_SPECIAL_SETTINGS, | |
e2f0f671 MG |
1753 | TRF7970A_RX_SPECIAL_SETTINGS_HBT | |
1754 | TRF7970A_RX_SPECIAL_SETTINGS_M848 | | |
1755 | TRF7970A_RX_SPECIAL_SETTINGS_C424 | | |
1756 | TRF7970A_RX_SPECIAL_SETTINGS_C212); | |
13b4272a | 1757 | if (ret) |
fc0ae243 | 1758 | goto out_err; |
13b4272a MG |
1759 | |
1760 | ret = trf7970a_write(trf, TRF7970A_REG_IO_CTRL, | |
e2f0f671 | 1761 | trf->io_ctrl | TRF7970A_REG_IO_CTRL_VRS(0x1)); |
13b4272a | 1762 | if (ret) |
fc0ae243 | 1763 | goto out_err; |
165063f1 | 1764 | |
13b4272a | 1765 | ret = trf7970a_write(trf, TRF7970A_NFC_LOW_FIELD_LEVEL, |
e2f0f671 | 1766 | TRF7970A_NFC_LOW_FIELD_LEVEL_RFDET(0x3)); |
13b4272a | 1767 | if (ret) |
fc0ae243 | 1768 | goto out_err; |
13b4272a MG |
1769 | |
1770 | ret = trf7970a_write(trf, TRF7970A_NFC_TARGET_LEVEL, | |
e2f0f671 | 1771 | TRF7970A_NFC_TARGET_LEVEL_RFDET(0x7)); |
13b4272a | 1772 | if (ret) |
fc0ae243 | 1773 | goto out_err; |
13b4272a MG |
1774 | |
1775 | trf->ddev = ddev; | |
1776 | trf->cb = cb; | |
1777 | trf->cb_arg = arg; | |
1778 | trf->timeout = timeout; | |
1779 | trf->ignore_timeout = false; | |
1780 | ||
1781 | ret = trf7970a_cmd(trf, TRF7970A_CMD_ENABLE_RX); | |
1782 | if (ret) | |
1783 | goto out_err; | |
1784 | ||
cb174aba MG |
1785 | trf->state = mode_detect ? TRF7970A_ST_LISTENING_MD : |
1786 | TRF7970A_ST_LISTENING; | |
13b4272a MG |
1787 | |
1788 | schedule_delayed_work(&trf->timeout_work, msecs_to_jiffies(timeout)); | |
1789 | ||
1790 | out_err: | |
1791 | mutex_unlock(&trf->lock); | |
1792 | return ret; | |
165063f1 MG |
1793 | } |
1794 | ||
cb174aba | 1795 | static int trf7970a_tg_listen(struct nfc_digital_dev *ddev, u16 timeout, |
e2f0f671 | 1796 | nfc_digital_cmd_complete_t cb, void *arg) |
cb174aba MG |
1797 | { |
1798 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1799 | ||
1800 | dev_dbg(trf->dev, "Listen - state: %d, timeout: %d ms\n", | |
e2f0f671 | 1801 | trf->state, timeout); |
cb174aba MG |
1802 | |
1803 | return _trf7970a_tg_listen(ddev, timeout, cb, arg, false); | |
1804 | } | |
1805 | ||
1806 | static int trf7970a_tg_listen_md(struct nfc_digital_dev *ddev, | |
e2f0f671 MG |
1807 | u16 timeout, nfc_digital_cmd_complete_t cb, |
1808 | void *arg) | |
cb174aba MG |
1809 | { |
1810 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1811 | int ret; | |
1812 | ||
1813 | dev_dbg(trf->dev, "Listen MD - state: %d, timeout: %d ms\n", | |
e2f0f671 | 1814 | trf->state, timeout); |
cb174aba MG |
1815 | |
1816 | ret = trf7970a_tg_configure_hw(ddev, NFC_DIGITAL_CONFIG_RF_TECH, | |
e2f0f671 | 1817 | NFC_DIGITAL_RF_TECH_106A); |
cb174aba MG |
1818 | if (ret) |
1819 | return ret; | |
1820 | ||
1821 | ret = trf7970a_tg_configure_hw(ddev, NFC_DIGITAL_CONFIG_FRAMING, | |
e2f0f671 | 1822 | NFC_DIGITAL_FRAMING_NFCA_NFC_DEP); |
cb174aba MG |
1823 | if (ret) |
1824 | return ret; | |
1825 | ||
1826 | return _trf7970a_tg_listen(ddev, timeout, cb, arg, true); | |
1827 | } | |
1828 | ||
1829 | static int trf7970a_tg_get_rf_tech(struct nfc_digital_dev *ddev, u8 *rf_tech) | |
1830 | { | |
1831 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1832 | ||
1833 | dev_dbg(trf->dev, "Get RF Tech - state: %d, rf_tech: %d\n", | |
e2f0f671 | 1834 | trf->state, trf->md_rf_tech); |
cb174aba MG |
1835 | |
1836 | *rf_tech = trf->md_rf_tech; | |
1837 | ||
1838 | return 0; | |
1839 | } | |
1840 | ||
165063f1 MG |
1841 | static void trf7970a_abort_cmd(struct nfc_digital_dev *ddev) |
1842 | { | |
1843 | struct trf7970a *trf = nfc_digital_get_drvdata(ddev); | |
1844 | ||
1845 | dev_dbg(trf->dev, "Abort process initiated\n"); | |
1846 | ||
1847 | mutex_lock(&trf->lock); | |
5876bc75 MG |
1848 | |
1849 | switch (trf->state) { | |
1850 | case TRF7970A_ST_WAIT_FOR_TX_FIFO: | |
1851 | case TRF7970A_ST_WAIT_FOR_RX_DATA: | |
1852 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
1853 | case TRF7970A_ST_WAIT_TO_ISSUE_EOF: | |
1854 | trf->aborting = true; | |
1855 | break; | |
13b4272a MG |
1856 | case TRF7970A_ST_LISTENING: |
1857 | trf->ignore_timeout = !cancel_delayed_work(&trf->timeout_work); | |
1858 | trf7970a_send_err_upstream(trf, -ECANCELED); | |
1859 | dev_dbg(trf->dev, "Abort process complete\n"); | |
1860 | break; | |
5876bc75 MG |
1861 | default: |
1862 | break; | |
1863 | } | |
1864 | ||
165063f1 MG |
1865 | mutex_unlock(&trf->lock); |
1866 | } | |
1867 | ||
1868 | static struct nfc_digital_ops trf7970a_nfc_ops = { | |
1869 | .in_configure_hw = trf7970a_in_configure_hw, | |
13b4272a | 1870 | .in_send_cmd = trf7970a_send_cmd, |
165063f1 | 1871 | .tg_configure_hw = trf7970a_tg_configure_hw, |
13b4272a | 1872 | .tg_send_cmd = trf7970a_send_cmd, |
165063f1 | 1873 | .tg_listen = trf7970a_tg_listen, |
cb174aba MG |
1874 | .tg_listen_md = trf7970a_tg_listen_md, |
1875 | .tg_get_rf_tech = trf7970a_tg_get_rf_tech, | |
165063f1 MG |
1876 | .switch_rf = trf7970a_switch_rf, |
1877 | .abort_cmd = trf7970a_abort_cmd, | |
1878 | }; | |
1879 | ||
ceccd6aa MG |
1880 | static int trf7970a_power_up(struct trf7970a *trf) |
1881 | { | |
1882 | int ret; | |
1883 | ||
1884 | dev_dbg(trf->dev, "Powering up - state: %d\n", trf->state); | |
1885 | ||
1886 | if (trf->state != TRF7970A_ST_PWR_OFF) | |
1887 | return 0; | |
1888 | ||
1889 | ret = regulator_enable(trf->regulator); | |
1890 | if (ret) { | |
1891 | dev_err(trf->dev, "%s - Can't enable VIN: %d\n", __func__, ret); | |
1892 | return ret; | |
1893 | } | |
1894 | ||
1895 | usleep_range(5000, 6000); | |
1896 | ||
d34e48d6 MG |
1897 | if (trf->en2_gpiod && |
1898 | !(trf->quirks & TRF7970A_QUIRK_EN2_MUST_STAY_LOW)) { | |
1899 | gpiod_set_value_cansleep(trf->en2_gpiod, 1); | |
1900 | usleep_range(1000, 2000); | |
ceccd6aa MG |
1901 | } |
1902 | ||
d34e48d6 | 1903 | gpiod_set_value_cansleep(trf->en_gpiod, 1); |
ceccd6aa MG |
1904 | |
1905 | usleep_range(20000, 21000); | |
1906 | ||
1907 | trf->state = TRF7970A_ST_RF_OFF; | |
1908 | ||
1909 | return 0; | |
1910 | } | |
1911 | ||
1912 | static int trf7970a_power_down(struct trf7970a *trf) | |
1913 | { | |
1914 | int ret; | |
1915 | ||
1916 | dev_dbg(trf->dev, "Powering down - state: %d\n", trf->state); | |
1917 | ||
1918 | if (trf->state == TRF7970A_ST_PWR_OFF) | |
1919 | return 0; | |
1920 | ||
1921 | if (trf->state != TRF7970A_ST_RF_OFF) { | |
1922 | dev_dbg(trf->dev, "Can't power down - not RF_OFF state (%d)\n", | |
e2f0f671 | 1923 | trf->state); |
ceccd6aa MG |
1924 | return -EBUSY; |
1925 | } | |
1926 | ||
d34e48d6 | 1927 | gpiod_set_value_cansleep(trf->en_gpiod, 0); |
67dec192 | 1928 | |
e2f0f671 | 1929 | if (trf->en2_gpiod && !(trf->quirks & TRF7970A_QUIRK_EN2_MUST_STAY_LOW)) |
d34e48d6 | 1930 | gpiod_set_value_cansleep(trf->en2_gpiod, 0); |
ceccd6aa MG |
1931 | |
1932 | ret = regulator_disable(trf->regulator); | |
1933 | if (ret) | |
1934 | dev_err(trf->dev, "%s - Can't disable VIN: %d\n", __func__, | |
e2f0f671 | 1935 | ret); |
ceccd6aa MG |
1936 | |
1937 | trf->state = TRF7970A_ST_PWR_OFF; | |
1938 | ||
1939 | return ret; | |
1940 | } | |
1941 | ||
b528281b MG |
1942 | static int trf7970a_startup(struct trf7970a *trf) |
1943 | { | |
1944 | int ret; | |
1945 | ||
1946 | ret = trf7970a_power_up(trf); | |
1947 | if (ret) | |
1948 | return ret; | |
1949 | ||
1950 | pm_runtime_set_active(trf->dev); | |
1951 | pm_runtime_enable(trf->dev); | |
1952 | pm_runtime_mark_last_busy(trf->dev); | |
1953 | ||
1954 | return 0; | |
1955 | } | |
1956 | ||
1957 | static void trf7970a_shutdown(struct trf7970a *trf) | |
1958 | { | |
1959 | switch (trf->state) { | |
1960 | case TRF7970A_ST_WAIT_FOR_TX_FIFO: | |
1961 | case TRF7970A_ST_WAIT_FOR_RX_DATA: | |
1962 | case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT: | |
1963 | case TRF7970A_ST_WAIT_TO_ISSUE_EOF: | |
13b4272a | 1964 | case TRF7970A_ST_LISTENING: |
b528281b MG |
1965 | trf7970a_send_err_upstream(trf, -ECANCELED); |
1966 | /* FALLTHROUGH */ | |
1967 | case TRF7970A_ST_IDLE: | |
1968 | case TRF7970A_ST_IDLE_RX_BLOCKED: | |
1969 | trf7970a_switch_rf_off(trf); | |
1970 | break; | |
1971 | default: | |
1972 | break; | |
1973 | } | |
1974 | ||
1975 | pm_runtime_disable(trf->dev); | |
1976 | pm_runtime_set_suspended(trf->dev); | |
1977 | ||
1978 | trf7970a_power_down(trf); | |
1979 | } | |
1980 | ||
fd0c8280 MG |
1981 | static int trf7970a_get_autosuspend_delay(struct device_node *np) |
1982 | { | |
1983 | int autosuspend_delay, ret; | |
1984 | ||
1985 | ret = of_property_read_u32(np, "autosuspend-delay", &autosuspend_delay); | |
1986 | if (ret) | |
1987 | autosuspend_delay = TRF7970A_AUTOSUSPEND_DELAY; | |
1988 | ||
fd0c8280 MG |
1989 | return autosuspend_delay; |
1990 | } | |
1991 | ||
165063f1 MG |
1992 | static int trf7970a_probe(struct spi_device *spi) |
1993 | { | |
1994 | struct device_node *np = spi->dev.of_node; | |
165063f1 | 1995 | struct trf7970a *trf; |
fd0c8280 | 1996 | int uvolts, autosuspend_delay, ret; |
837eb4d2 | 1997 | u32 clk_freq = TRF7970A_13MHZ_CLOCK_FREQUENCY; |
165063f1 MG |
1998 | |
1999 | if (!np) { | |
2000 | dev_err(&spi->dev, "No Device Tree entry\n"); | |
2001 | return -EINVAL; | |
2002 | } | |
2003 | ||
2004 | trf = devm_kzalloc(&spi->dev, sizeof(*trf), GFP_KERNEL); | |
2005 | if (!trf) | |
2006 | return -ENOMEM; | |
2007 | ||
ceccd6aa | 2008 | trf->state = TRF7970A_ST_PWR_OFF; |
165063f1 MG |
2009 | trf->dev = &spi->dev; |
2010 | trf->spi = spi; | |
165063f1 MG |
2011 | |
2012 | spi->mode = SPI_MODE_1; | |
2013 | spi->bits_per_word = 8; | |
2014 | ||
24707296 MG |
2015 | ret = spi_setup(spi); |
2016 | if (ret < 0) { | |
2017 | dev_err(trf->dev, "Can't set up SPI Communication\n"); | |
2018 | return ret; | |
2019 | } | |
2020 | ||
772079eb MG |
2021 | if (of_property_read_bool(np, "irq-status-read-quirk")) |
2022 | trf->quirks |= TRF7970A_QUIRK_IRQ_STATUS_READ; | |
2023 | ||
69f984f0 | 2024 | /* There are two enable pins - only EN must be present in the DT */ |
d34e48d6 MG |
2025 | trf->en_gpiod = devm_gpiod_get_index(trf->dev, "ti,enable", 0, |
2026 | GPIOD_OUT_LOW); | |
2027 | if (IS_ERR(trf->en_gpiod)) { | |
165063f1 | 2028 | dev_err(trf->dev, "No EN GPIO property\n"); |
d34e48d6 | 2029 | return PTR_ERR(trf->en_gpiod); |
165063f1 MG |
2030 | } |
2031 | ||
d34e48d6 MG |
2032 | trf->en2_gpiod = devm_gpiod_get_index_optional(trf->dev, "ti,enable", 1, |
2033 | GPIOD_OUT_LOW); | |
2034 | if (!trf->en2_gpiod) { | |
ce69b95c | 2035 | dev_info(trf->dev, "No EN2 GPIO property\n"); |
d34e48d6 MG |
2036 | } else if (IS_ERR(trf->en2_gpiod)) { |
2037 | dev_err(trf->dev, "Error getting EN2 GPIO property: %ld\n", | |
2038 | PTR_ERR(trf->en2_gpiod)); | |
2039 | return PTR_ERR(trf->en2_gpiod); | |
2040 | } else if (of_property_read_bool(np, "en2-rf-quirk")) { | |
2041 | trf->quirks |= TRF7970A_QUIRK_EN2_MUST_STAY_LOW; | |
165063f1 MG |
2042 | } |
2043 | ||
837eb4d2 | 2044 | of_property_read_u32(np, "clock-frequency", &clk_freq); |
e1038535 | 2045 | if ((clk_freq != TRF7970A_27MHZ_CLOCK_FREQUENCY) && |
e2f0f671 | 2046 | (clk_freq != TRF7970A_13MHZ_CLOCK_FREQUENCY)) { |
837eb4d2 | 2047 | dev_err(trf->dev, |
e2f0f671 | 2048 | "clock-frequency (%u Hz) unsupported\n", clk_freq); |
837eb4d2 GL |
2049 | return -EINVAL; |
2050 | } | |
2051 | ||
bd751808 GL |
2052 | if (clk_freq == TRF7970A_27MHZ_CLOCK_FREQUENCY) { |
2053 | trf->modulator_sys_clk_ctrl = TRF7970A_MODULATOR_27MHZ; | |
2054 | dev_dbg(trf->dev, "trf7970a configured for 27MHz crystal\n"); | |
2055 | } else { | |
2056 | trf->modulator_sys_clk_ctrl = 0; | |
2057 | } | |
2058 | ||
165063f1 | 2059 | ret = devm_request_threaded_irq(trf->dev, spi->irq, NULL, |
e2f0f671 MG |
2060 | trf7970a_irq, |
2061 | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | |
2062 | "trf7970a", trf); | |
165063f1 MG |
2063 | if (ret) { |
2064 | dev_err(trf->dev, "Can't request IRQ#%d: %d\n", spi->irq, ret); | |
2065 | return ret; | |
2066 | } | |
2067 | ||
2068 | mutex_init(&trf->lock); | |
2069 | INIT_DELAYED_WORK(&trf->timeout_work, trf7970a_timeout_work_handler); | |
2070 | ||
2071 | trf->regulator = devm_regulator_get(&spi->dev, "vin"); | |
2072 | if (IS_ERR(trf->regulator)) { | |
2073 | ret = PTR_ERR(trf->regulator); | |
2074 | dev_err(trf->dev, "Can't get VIN regulator: %d\n", ret); | |
2075 | goto err_destroy_lock; | |
2076 | } | |
2077 | ||
2078 | ret = regulator_enable(trf->regulator); | |
2079 | if (ret) { | |
2080 | dev_err(trf->dev, "Can't enable VIN: %d\n", ret); | |
2081 | goto err_destroy_lock; | |
2082 | } | |
2083 | ||
a34631c2 | 2084 | uvolts = regulator_get_voltage(trf->regulator); |
ebcc5a0d MG |
2085 | if (uvolts > 4000000) |
2086 | trf->chip_status_ctrl = TRF7970A_CHIP_STATUS_VRS5_3; | |
2087 | ||
49d22c70 GL |
2088 | trf->regulator = devm_regulator_get(&spi->dev, "vdd-io"); |
2089 | if (IS_ERR(trf->regulator)) { | |
2090 | ret = PTR_ERR(trf->regulator); | |
2091 | dev_err(trf->dev, "Can't get VDD_IO regulator: %d\n", ret); | |
2092 | goto err_destroy_lock; | |
2093 | } | |
2094 | ||
2095 | ret = regulator_enable(trf->regulator); | |
2096 | if (ret) { | |
2097 | dev_err(trf->dev, "Can't enable VDD_IO: %d\n", ret); | |
2098 | goto err_destroy_lock; | |
2099 | } | |
2100 | ||
2101 | if (regulator_get_voltage(trf->regulator) == 1800000) { | |
2102 | trf->io_ctrl = TRF7970A_REG_IO_CTRL_IO_LOW; | |
2103 | dev_dbg(trf->dev, "trf7970a config vdd_io to 1.8V\n"); | |
2104 | } | |
2105 | ||
165063f1 | 2106 | trf->ddev = nfc_digital_allocate_device(&trf7970a_nfc_ops, |
e2f0f671 MG |
2107 | TRF7970A_SUPPORTED_PROTOCOLS, |
2108 | NFC_DIGITAL_DRV_CAPS_IN_CRC | | |
2109 | NFC_DIGITAL_DRV_CAPS_TG_CRC, 0, | |
2110 | 0); | |
165063f1 MG |
2111 | if (!trf->ddev) { |
2112 | dev_err(trf->dev, "Can't allocate NFC digital device\n"); | |
2113 | ret = -ENOMEM; | |
2114 | goto err_disable_regulator; | |
2115 | } | |
2116 | ||
2117 | nfc_digital_set_parent_dev(trf->ddev, trf->dev); | |
2118 | nfc_digital_set_drvdata(trf->ddev, trf); | |
2119 | spi_set_drvdata(spi, trf); | |
2120 | ||
fd0c8280 MG |
2121 | autosuspend_delay = trf7970a_get_autosuspend_delay(np); |
2122 | ||
2123 | pm_runtime_set_autosuspend_delay(trf->dev, autosuspend_delay); | |
e6403b7c | 2124 | pm_runtime_use_autosuspend(trf->dev); |
ceccd6aa | 2125 | |
b528281b | 2126 | ret = trf7970a_startup(trf); |
ceccd6aa MG |
2127 | if (ret) |
2128 | goto err_free_ddev; | |
2129 | ||
165063f1 MG |
2130 | ret = nfc_digital_register_device(trf->ddev); |
2131 | if (ret) { | |
2132 | dev_err(trf->dev, "Can't register NFC digital device: %d\n", | |
e2f0f671 | 2133 | ret); |
b528281b | 2134 | goto err_shutdown; |
165063f1 MG |
2135 | } |
2136 | ||
2137 | return 0; | |
2138 | ||
b528281b MG |
2139 | err_shutdown: |
2140 | trf7970a_shutdown(trf); | |
ceccd6aa | 2141 | err_free_ddev: |
165063f1 MG |
2142 | nfc_digital_free_device(trf->ddev); |
2143 | err_disable_regulator: | |
2144 | regulator_disable(trf->regulator); | |
2145 | err_destroy_lock: | |
2146 | mutex_destroy(&trf->lock); | |
2147 | return ret; | |
2148 | } | |
2149 | ||
2150 | static int trf7970a_remove(struct spi_device *spi) | |
2151 | { | |
2152 | struct trf7970a *trf = spi_get_drvdata(spi); | |
2153 | ||
2154 | mutex_lock(&trf->lock); | |
2155 | ||
b528281b | 2156 | trf7970a_shutdown(trf); |
ceccd6aa MG |
2157 | |
2158 | mutex_unlock(&trf->lock); | |
e6403b7c | 2159 | |
165063f1 MG |
2160 | nfc_digital_unregister_device(trf->ddev); |
2161 | nfc_digital_free_device(trf->ddev); | |
2162 | ||
2163 | regulator_disable(trf->regulator); | |
2164 | ||
2165 | mutex_destroy(&trf->lock); | |
2166 | ||
2167 | return 0; | |
2168 | } | |
2169 | ||
77c9539d MG |
2170 | #ifdef CONFIG_PM_SLEEP |
2171 | static int trf7970a_suspend(struct device *dev) | |
2172 | { | |
88e2ce01 | 2173 | struct spi_device *spi = to_spi_device(dev); |
77c9539d | 2174 | struct trf7970a *trf = spi_get_drvdata(spi); |
77c9539d MG |
2175 | |
2176 | dev_dbg(dev, "Suspend\n"); | |
2177 | ||
2178 | mutex_lock(&trf->lock); | |
2179 | ||
2180 | trf7970a_shutdown(trf); | |
2181 | ||
2182 | mutex_unlock(&trf->lock); | |
2183 | ||
671970f5 | 2184 | return 0; |
77c9539d MG |
2185 | } |
2186 | ||
2187 | static int trf7970a_resume(struct device *dev) | |
2188 | { | |
88e2ce01 | 2189 | struct spi_device *spi = to_spi_device(dev); |
77c9539d | 2190 | struct trf7970a *trf = spi_get_drvdata(spi); |
55ef2e75 | 2191 | int ret; |
77c9539d MG |
2192 | |
2193 | dev_dbg(dev, "Resume\n"); | |
2194 | ||
2195 | mutex_lock(&trf->lock); | |
2196 | ||
2197 | ret = trf7970a_startup(trf); | |
2198 | ||
2199 | mutex_unlock(&trf->lock); | |
2200 | ||
2201 | return ret; | |
2202 | } | |
2203 | #endif | |
2204 | ||
e8a9235c | 2205 | #ifdef CONFIG_PM |
e6403b7c MG |
2206 | static int trf7970a_pm_runtime_suspend(struct device *dev) |
2207 | { | |
88e2ce01 | 2208 | struct spi_device *spi = to_spi_device(dev); |
e6403b7c MG |
2209 | struct trf7970a *trf = spi_get_drvdata(spi); |
2210 | int ret; | |
2211 | ||
2212 | dev_dbg(dev, "Runtime suspend\n"); | |
2213 | ||
ceccd6aa | 2214 | mutex_lock(&trf->lock); |
e6403b7c | 2215 | |
ceccd6aa | 2216 | ret = trf7970a_power_down(trf); |
e6403b7c | 2217 | |
ceccd6aa | 2218 | mutex_unlock(&trf->lock); |
e6403b7c MG |
2219 | |
2220 | return ret; | |
2221 | } | |
2222 | ||
2223 | static int trf7970a_pm_runtime_resume(struct device *dev) | |
2224 | { | |
88e2ce01 | 2225 | struct spi_device *spi = to_spi_device(dev); |
e6403b7c MG |
2226 | struct trf7970a *trf = spi_get_drvdata(spi); |
2227 | int ret; | |
2228 | ||
2229 | dev_dbg(dev, "Runtime resume\n"); | |
2230 | ||
ceccd6aa MG |
2231 | ret = trf7970a_power_up(trf); |
2232 | if (!ret) | |
2233 | pm_runtime_mark_last_busy(dev); | |
e6403b7c | 2234 | |
ceccd6aa | 2235 | return ret; |
e6403b7c MG |
2236 | } |
2237 | #endif | |
2238 | ||
2239 | static const struct dev_pm_ops trf7970a_pm_ops = { | |
77c9539d | 2240 | SET_SYSTEM_SLEEP_PM_OPS(trf7970a_suspend, trf7970a_resume) |
e6403b7c | 2241 | SET_RUNTIME_PM_OPS(trf7970a_pm_runtime_suspend, |
e2f0f671 | 2242 | trf7970a_pm_runtime_resume, NULL) |
e6403b7c MG |
2243 | }; |
2244 | ||
3c39c1a5 | 2245 | static const struct of_device_id trf7970a_of_match[] = { |
e2f0f671 | 2246 | {.compatible = "ti,trf7970a",}, |
fcc652f6 | 2247 | {}, |
3c39c1a5 | 2248 | }; |
e2f0f671 | 2249 | |
3c39c1a5 JMC |
2250 | MODULE_DEVICE_TABLE(of, trf7970a_of_match); |
2251 | ||
165063f1 | 2252 | static const struct spi_device_id trf7970a_id_table[] = { |
e2f0f671 MG |
2253 | {"trf7970a", 0}, |
2254 | {} | |
165063f1 | 2255 | }; |
e2f0f671 | 2256 | |
165063f1 MG |
2257 | MODULE_DEVICE_TABLE(spi, trf7970a_id_table); |
2258 | ||
2259 | static struct spi_driver trf7970a_spi_driver = { | |
2260 | .probe = trf7970a_probe, | |
2261 | .remove = trf7970a_remove, | |
2262 | .id_table = trf7970a_id_table, | |
e2f0f671 MG |
2263 | .driver = { |
2264 | .name = "trf7970a", | |
2265 | .of_match_table = of_match_ptr(trf7970a_of_match), | |
2266 | .pm = &trf7970a_pm_ops, | |
165063f1 MG |
2267 | }, |
2268 | }; | |
2269 | ||
2270 | module_spi_driver(trf7970a_spi_driver); | |
2271 | ||
2272 | MODULE_AUTHOR("Mark A. Greer <mgreer@animalcreek.com>"); | |
2273 | MODULE_LICENSE("GPL v2"); | |
2274 | MODULE_DESCRIPTION("TI trf7970a RFID/NFC Transceiver Driver"); |