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fce8a7bb
JM
1/*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2012 Intel Corporation. All rights reserved.
e26a5843 8 * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
fce8a7bb
JM
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * BSD LICENSE
15 *
16 * Copyright(c) 2012 Intel Corporation. All rights reserved.
e26a5843 17 * Copyright (C) 2015 EMC Corporation. All Rights Reserved.
fce8a7bb
JM
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 *
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copy
26 * notice, this list of conditions and the following disclaimer in
27 * the documentation and/or other materials provided with the
28 * distribution.
29 * * Neither the name of Intel Corporation nor the names of its
30 * contributors may be used to endorse or promote products derived
31 * from this software without specific prior written permission.
32 *
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
36 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
37 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
38 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
39 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
40 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
41 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
42 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 *
e26a5843 45 * PCIe NTB Transport Linux driver
fce8a7bb
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46 *
47 * Contact Information:
48 * Jon Mason <jon.mason@intel.com>
49 */
50#include <linux/debugfs.h>
51#include <linux/delay.h>
282a2fee 52#include <linux/dmaengine.h>
fce8a7bb
JM
53#include <linux/dma-mapping.h>
54#include <linux/errno.h>
55#include <linux/export.h>
56#include <linux/interrupt.h>
57#include <linux/module.h>
58#include <linux/pci.h>
59#include <linux/slab.h>
60#include <linux/types.h>
06917f75 61#include <linux/uaccess.h>
e26a5843
AH
62#include "linux/ntb.h"
63#include "linux/ntb_transport.h"
fce8a7bb 64
e26a5843
AH
65#define NTB_TRANSPORT_VERSION 4
66#define NTB_TRANSPORT_VER "4"
67#define NTB_TRANSPORT_NAME "ntb_transport"
68#define NTB_TRANSPORT_DESC "Software Queue-Pair Transport over NTB"
b17faba0 69#define NTB_TRANSPORT_MIN_SPADS (MW0_SZ_HIGH + 2)
e26a5843
AH
70
71MODULE_DESCRIPTION(NTB_TRANSPORT_DESC);
72MODULE_VERSION(NTB_TRANSPORT_VER);
73MODULE_LICENSE("Dual BSD/GPL");
74MODULE_AUTHOR("Intel Corporation");
75
76static unsigned long max_mw_size;
77module_param(max_mw_size, ulong, 0644);
78MODULE_PARM_DESC(max_mw_size, "Limit size of large memory windows");
fce8a7bb 79
9891417d 80static unsigned int transport_mtu = 0x10000;
fce8a7bb
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81module_param(transport_mtu, uint, 0644);
82MODULE_PARM_DESC(transport_mtu, "Maximum size of NTB transport packets");
83
948d3a65 84static unsigned char max_num_clients;
fce8a7bb
JM
85module_param(max_num_clients, byte, 0644);
86MODULE_PARM_DESC(max_num_clients, "Maximum number of NTB transport clients");
87
282a2fee
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88static unsigned int copy_bytes = 1024;
89module_param(copy_bytes, uint, 0644);
90MODULE_PARM_DESC(copy_bytes, "Threshold under which NTB will use the CPU to copy instead of DMA");
91
a41ef053
DJ
92static bool use_dma;
93module_param(use_dma, bool, 0644);
94MODULE_PARM_DESC(use_dma, "Use DMA engine to perform large data copy");
95
e26a5843
AH
96static struct dentry *nt_debugfs_dir;
97
fce8a7bb
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98struct ntb_queue_entry {
99 /* ntb_queue list reference */
100 struct list_head entry;
e26a5843 101 /* pointers to data to be transferred */
fce8a7bb
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102 void *cb_data;
103 void *buf;
104 unsigned int len;
105 unsigned int flags;
9cabc269
DJ
106 int retries;
107 int errors;
108 unsigned int tx_index;
72203572 109 unsigned int rx_index;
282a2fee
JM
110
111 struct ntb_transport_qp *qp;
112 union {
113 struct ntb_payload_header __iomem *tx_hdr;
114 struct ntb_payload_header *rx_hdr;
115 };
fce8a7bb
JM
116};
117
793c20e9
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118struct ntb_rx_info {
119 unsigned int entry;
120};
121
fce8a7bb 122struct ntb_transport_qp {
e26a5843
AH
123 struct ntb_transport_ctx *transport;
124 struct ntb_dev *ndev;
fce8a7bb 125 void *cb_data;
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DJ
126 struct dma_chan *tx_dma_chan;
127 struct dma_chan *rx_dma_chan;
fce8a7bb
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128
129 bool client_ready;
e26a5843 130 bool link_is_up;
e9021331 131 bool active;
e26a5843 132
fce8a7bb 133 u8 qp_num; /* Only 64 QP's are allowed. 0-63 */
e26a5843 134 u64 qp_bit;
fce8a7bb 135
74465645 136 struct ntb_rx_info __iomem *rx_info;
793c20e9
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137 struct ntb_rx_info *remote_rx_info;
138
53ca4fea
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139 void (*tx_handler)(struct ntb_transport_qp *qp, void *qp_data,
140 void *data, int len);
fce8a7bb
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141 struct list_head tx_free_q;
142 spinlock_t ntb_tx_free_q_lock;
74465645 143 void __iomem *tx_mw;
282a2fee 144 dma_addr_t tx_mw_phys;
793c20e9
JM
145 unsigned int tx_index;
146 unsigned int tx_max_entry;
ef114ed5 147 unsigned int tx_max_frame;
fce8a7bb 148
53ca4fea
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149 void (*rx_handler)(struct ntb_transport_qp *qp, void *qp_data,
150 void *data, int len);
da2e5ae5 151 struct list_head rx_post_q;
fce8a7bb
JM
152 struct list_head rx_pend_q;
153 struct list_head rx_free_q;
da2e5ae5
AH
154 /* ntb_rx_q_lock: synchronize access to rx_XXXX_q */
155 spinlock_t ntb_rx_q_lock;
793c20e9
JM
156 void *rx_buff;
157 unsigned int rx_index;
158 unsigned int rx_max_entry;
ef114ed5 159 unsigned int rx_max_frame;
a754a8fc 160 unsigned int rx_alloc_entry;
282a2fee 161 dma_cookie_t last_cookie;
e26a5843 162 struct tasklet_struct rxc_db_work;
fce8a7bb 163
53ca4fea 164 void (*event_handler)(void *data, int status);
fce8a7bb 165 struct delayed_work link_work;
7b4f2d3c 166 struct work_struct link_cleanup;
fce8a7bb
JM
167
168 struct dentry *debugfs_dir;
169 struct dentry *debugfs_stats;
170
171 /* Stats */
172 u64 rx_bytes;
173 u64 rx_pkts;
174 u64 rx_ring_empty;
175 u64 rx_err_no_buf;
176 u64 rx_err_oflow;
177 u64 rx_err_ver;
282a2fee
JM
178 u64 rx_memcpy;
179 u64 rx_async;
8c874cc1 180 u64 dma_rx_prep_err;
fce8a7bb
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181 u64 tx_bytes;
182 u64 tx_pkts;
183 u64 tx_ring_full;
282a2fee
JM
184 u64 tx_err_no_buf;
185 u64 tx_memcpy;
186 u64 tx_async;
8c874cc1 187 u64 dma_tx_prep_err;
fce8a7bb
JM
188};
189
190struct ntb_transport_mw {
e26a5843
AH
191 phys_addr_t phys_addr;
192 resource_size_t phys_size;
193 resource_size_t xlat_align;
194 resource_size_t xlat_align_size;
195 void __iomem *vbase;
196 size_t xlat_size;
197 size_t buff_size;
fce8a7bb
JM
198 void *virt_addr;
199 dma_addr_t dma_addr;
200};
201
202struct ntb_transport_client_dev {
203 struct list_head entry;
e26a5843 204 struct ntb_transport_ctx *nt;
fce8a7bb
JM
205 struct device dev;
206};
207
e26a5843 208struct ntb_transport_ctx {
fce8a7bb
JM
209 struct list_head entry;
210 struct list_head client_devs;
211
e26a5843
AH
212 struct ntb_dev *ndev;
213
214 struct ntb_transport_mw *mw_vec;
215 struct ntb_transport_qp *qp_vec;
216 unsigned int mw_count;
217 unsigned int qp_count;
218 u64 qp_bitmap;
219 u64 qp_bitmap_free;
220
221 bool link_is_up;
fce8a7bb 222 struct delayed_work link_work;
7b4f2d3c 223 struct work_struct link_cleanup;
c8650fd0
DJ
224
225 struct dentry *debugfs_node_dir;
fce8a7bb
JM
226};
227
228enum {
e26a5843
AH
229 DESC_DONE_FLAG = BIT(0),
230 LINK_DOWN_FLAG = BIT(1),
fce8a7bb
JM
231};
232
233struct ntb_payload_header {
74465645 234 unsigned int ver;
fce8a7bb
JM
235 unsigned int len;
236 unsigned int flags;
237};
238
239enum {
240 VERSION = 0,
fce8a7bb 241 QP_LINKS,
113fc505
JM
242 NUM_QPS,
243 NUM_MWS,
244 MW0_SZ_HIGH,
245 MW0_SZ_LOW,
fce8a7bb
JM
246};
247
e26a5843
AH
248#define dev_client_dev(__dev) \
249 container_of((__dev), struct ntb_transport_client_dev, dev)
250
251#define drv_client(__drv) \
252 container_of((__drv), struct ntb_transport_client, driver)
253
254#define QP_TO_MW(nt, qp) ((qp) % nt->mw_count)
fce8a7bb
JM
255#define NTB_QP_DEF_NUM_ENTRIES 100
256#define NTB_LINK_DOWN_TIMEOUT 10
8c874cc1 257#define DMA_RETRIES 20
c0a88032 258#define DMA_OUT_RESOURCE_TO msecs_to_jiffies(50)
fce8a7bb 259
e26a5843
AH
260static void ntb_transport_rxc_db(unsigned long data);
261static const struct ntb_ctx_ops ntb_transport_ops;
262static struct ntb_client ntb_transport_client;
9cabc269
DJ
263static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
264 struct ntb_queue_entry *entry);
265static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset);
72203572
DJ
266static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset);
267static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset);
268
e26a5843
AH
269
270static int ntb_transport_bus_match(struct device *dev,
271 struct device_driver *drv)
fce8a7bb
JM
272{
273 return !strncmp(dev_name(dev), drv->name, strlen(drv->name));
274}
275
e26a5843 276static int ntb_transport_bus_probe(struct device *dev)
fce8a7bb 277{
e26a5843 278 const struct ntb_transport_client *client;
fce8a7bb
JM
279 int rc = -EINVAL;
280
281 get_device(dev);
e26a5843
AH
282
283 client = drv_client(dev->driver);
284 rc = client->probe(dev);
fce8a7bb
JM
285 if (rc)
286 put_device(dev);
287
288 return rc;
289}
290
e26a5843 291static int ntb_transport_bus_remove(struct device *dev)
fce8a7bb 292{
e26a5843 293 const struct ntb_transport_client *client;
fce8a7bb 294
e26a5843
AH
295 client = drv_client(dev->driver);
296 client->remove(dev);
fce8a7bb
JM
297
298 put_device(dev);
299
300 return 0;
301}
302
e26a5843
AH
303static struct bus_type ntb_transport_bus = {
304 .name = "ntb_transport",
305 .match = ntb_transport_bus_match,
306 .probe = ntb_transport_bus_probe,
307 .remove = ntb_transport_bus_remove,
fce8a7bb
JM
308};
309
310static LIST_HEAD(ntb_transport_list);
311
e26a5843 312static int ntb_bus_init(struct ntb_transport_ctx *nt)
fce8a7bb 313{
31510000 314 list_add_tail(&nt->entry, &ntb_transport_list);
fce8a7bb
JM
315 return 0;
316}
317
e26a5843 318static void ntb_bus_remove(struct ntb_transport_ctx *nt)
fce8a7bb
JM
319{
320 struct ntb_transport_client_dev *client_dev, *cd;
321
322 list_for_each_entry_safe(client_dev, cd, &nt->client_devs, entry) {
323 dev_err(client_dev->dev.parent, "%s still attached to bus, removing\n",
324 dev_name(&client_dev->dev));
325 list_del(&client_dev->entry);
326 device_unregister(&client_dev->dev);
327 }
328
329 list_del(&nt->entry);
fce8a7bb
JM
330}
331
e26a5843 332static void ntb_transport_client_release(struct device *dev)
fce8a7bb
JM
333{
334 struct ntb_transport_client_dev *client_dev;
fce8a7bb 335
e26a5843 336 client_dev = dev_client_dev(dev);
fce8a7bb
JM
337 kfree(client_dev);
338}
339
340/**
e26a5843 341 * ntb_transport_unregister_client_dev - Unregister NTB client device
fce8a7bb
JM
342 * @device_name: Name of NTB client device
343 *
344 * Unregister an NTB client device with the NTB transport layer
345 */
e26a5843 346void ntb_transport_unregister_client_dev(char *device_name)
fce8a7bb
JM
347{
348 struct ntb_transport_client_dev *client, *cd;
e26a5843 349 struct ntb_transport_ctx *nt;
fce8a7bb
JM
350
351 list_for_each_entry(nt, &ntb_transport_list, entry)
352 list_for_each_entry_safe(client, cd, &nt->client_devs, entry)
353 if (!strncmp(dev_name(&client->dev), device_name,
354 strlen(device_name))) {
355 list_del(&client->entry);
356 device_unregister(&client->dev);
357 }
358}
e26a5843 359EXPORT_SYMBOL_GPL(ntb_transport_unregister_client_dev);
fce8a7bb
JM
360
361/**
e26a5843 362 * ntb_transport_register_client_dev - Register NTB client device
fce8a7bb
JM
363 * @device_name: Name of NTB client device
364 *
365 * Register an NTB client device with the NTB transport layer
366 */
e26a5843 367int ntb_transport_register_client_dev(char *device_name)
fce8a7bb
JM
368{
369 struct ntb_transport_client_dev *client_dev;
e26a5843 370 struct ntb_transport_ctx *nt;
1199aa61 371 int node;
8b19d450 372 int rc, i = 0;
fce8a7bb 373
8222b402
JM
374 if (list_empty(&ntb_transport_list))
375 return -ENODEV;
376
fce8a7bb
JM
377 list_for_each_entry(nt, &ntb_transport_list, entry) {
378 struct device *dev;
379
1199aa61
AH
380 node = dev_to_node(&nt->ndev->dev);
381
382 client_dev = kzalloc_node(sizeof(*client_dev),
383 GFP_KERNEL, node);
fce8a7bb
JM
384 if (!client_dev) {
385 rc = -ENOMEM;
386 goto err;
387 }
388
389 dev = &client_dev->dev;
390
391 /* setup and register client devices */
8b19d450 392 dev_set_name(dev, "%s%d", device_name, i);
e26a5843
AH
393 dev->bus = &ntb_transport_bus;
394 dev->release = ntb_transport_client_release;
395 dev->parent = &nt->ndev->dev;
fce8a7bb
JM
396
397 rc = device_register(dev);
398 if (rc) {
399 kfree(client_dev);
400 goto err;
401 }
402
403 list_add_tail(&client_dev->entry, &nt->client_devs);
8b19d450 404 i++;
fce8a7bb
JM
405 }
406
407 return 0;
408
409err:
e26a5843 410 ntb_transport_unregister_client_dev(device_name);
fce8a7bb
JM
411
412 return rc;
413}
e26a5843 414EXPORT_SYMBOL_GPL(ntb_transport_register_client_dev);
fce8a7bb
JM
415
416/**
ec110bc7 417 * ntb_transport_register_client - Register NTB client driver
fce8a7bb
JM
418 * @drv: NTB client driver to be registered
419 *
420 * Register an NTB client driver with the NTB transport layer
421 *
422 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
423 */
e26a5843 424int ntb_transport_register_client(struct ntb_transport_client *drv)
fce8a7bb 425{
e26a5843 426 drv->driver.bus = &ntb_transport_bus;
fce8a7bb 427
8222b402
JM
428 if (list_empty(&ntb_transport_list))
429 return -ENODEV;
430
fce8a7bb
JM
431 return driver_register(&drv->driver);
432}
ec110bc7 433EXPORT_SYMBOL_GPL(ntb_transport_register_client);
fce8a7bb
JM
434
435/**
ec110bc7 436 * ntb_transport_unregister_client - Unregister NTB client driver
fce8a7bb
JM
437 * @drv: NTB client driver to be unregistered
438 *
439 * Unregister an NTB client driver with the NTB transport layer
440 *
441 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
442 */
e26a5843 443void ntb_transport_unregister_client(struct ntb_transport_client *drv)
fce8a7bb
JM
444{
445 driver_unregister(&drv->driver);
446}
ec110bc7 447EXPORT_SYMBOL_GPL(ntb_transport_unregister_client);
fce8a7bb 448
fce8a7bb
JM
449static ssize_t debugfs_read(struct file *filp, char __user *ubuf, size_t count,
450 loff_t *offp)
451{
452 struct ntb_transport_qp *qp;
d7237e22 453 char *buf;
fce8a7bb
JM
454 ssize_t ret, out_offset, out_count;
455
260bee94
DJ
456 qp = filp->private_data;
457
458 if (!qp || !qp->link_is_up)
459 return 0;
460
282a2fee 461 out_count = 1000;
d7237e22
JM
462
463 buf = kmalloc(out_count, GFP_KERNEL);
464 if (!buf)
465 return -ENOMEM;
fce8a7bb 466
fce8a7bb
JM
467 out_offset = 0;
468 out_offset += snprintf(buf + out_offset, out_count - out_offset,
d98ef99e 469 "\nNTB QP stats:\n\n");
fce8a7bb
JM
470 out_offset += snprintf(buf + out_offset, out_count - out_offset,
471 "rx_bytes - \t%llu\n", qp->rx_bytes);
472 out_offset += snprintf(buf + out_offset, out_count - out_offset,
473 "rx_pkts - \t%llu\n", qp->rx_pkts);
282a2fee
JM
474 out_offset += snprintf(buf + out_offset, out_count - out_offset,
475 "rx_memcpy - \t%llu\n", qp->rx_memcpy);
476 out_offset += snprintf(buf + out_offset, out_count - out_offset,
477 "rx_async - \t%llu\n", qp->rx_async);
fce8a7bb
JM
478 out_offset += snprintf(buf + out_offset, out_count - out_offset,
479 "rx_ring_empty - %llu\n", qp->rx_ring_empty);
480 out_offset += snprintf(buf + out_offset, out_count - out_offset,
481 "rx_err_no_buf - %llu\n", qp->rx_err_no_buf);
482 out_offset += snprintf(buf + out_offset, out_count - out_offset,
483 "rx_err_oflow - \t%llu\n", qp->rx_err_oflow);
484 out_offset += snprintf(buf + out_offset, out_count - out_offset,
485 "rx_err_ver - \t%llu\n", qp->rx_err_ver);
486 out_offset += snprintf(buf + out_offset, out_count - out_offset,
d98ef99e 487 "rx_buff - \t0x%p\n", qp->rx_buff);
fce8a7bb 488 out_offset += snprintf(buf + out_offset, out_count - out_offset,
793c20e9 489 "rx_index - \t%u\n", qp->rx_index);
fce8a7bb 490 out_offset += snprintf(buf + out_offset, out_count - out_offset,
a754a8fc
DJ
491 "rx_max_entry - \t%u\n", qp->rx_max_entry);
492 out_offset += snprintf(buf + out_offset, out_count - out_offset,
493 "rx_alloc_entry - \t%u\n\n", qp->rx_alloc_entry);
fce8a7bb
JM
494
495 out_offset += snprintf(buf + out_offset, out_count - out_offset,
496 "tx_bytes - \t%llu\n", qp->tx_bytes);
497 out_offset += snprintf(buf + out_offset, out_count - out_offset,
498 "tx_pkts - \t%llu\n", qp->tx_pkts);
282a2fee
JM
499 out_offset += snprintf(buf + out_offset, out_count - out_offset,
500 "tx_memcpy - \t%llu\n", qp->tx_memcpy);
501 out_offset += snprintf(buf + out_offset, out_count - out_offset,
502 "tx_async - \t%llu\n", qp->tx_async);
fce8a7bb
JM
503 out_offset += snprintf(buf + out_offset, out_count - out_offset,
504 "tx_ring_full - \t%llu\n", qp->tx_ring_full);
282a2fee
JM
505 out_offset += snprintf(buf + out_offset, out_count - out_offset,
506 "tx_err_no_buf - %llu\n", qp->tx_err_no_buf);
fce8a7bb 507 out_offset += snprintf(buf + out_offset, out_count - out_offset,
d98ef99e 508 "tx_mw - \t0x%p\n", qp->tx_mw);
fce8a7bb 509 out_offset += snprintf(buf + out_offset, out_count - out_offset,
d98ef99e 510 "tx_index (H) - \t%u\n", qp->tx_index);
fce8a7bb 511 out_offset += snprintf(buf + out_offset, out_count - out_offset,
d98ef99e 512 "RRI (T) - \t%u\n",
e74bfeed 513 qp->remote_rx_info->entry);
d98ef99e
DJ
514 out_offset += snprintf(buf + out_offset, out_count - out_offset,
515 "tx_max_entry - \t%u\n", qp->tx_max_entry);
e74bfeed
DJ
516 out_offset += snprintf(buf + out_offset, out_count - out_offset,
517 "free tx - \t%u\n",
518 ntb_transport_tx_free_entry(qp));
8c874cc1
DJ
519 out_offset += snprintf(buf + out_offset, out_count - out_offset,
520 "DMA tx prep err - \t%llu\n",
521 qp->dma_tx_prep_err);
522 out_offset += snprintf(buf + out_offset, out_count - out_offset,
523 "DMA rx prep err - \t%llu\n",
524 qp->dma_rx_prep_err);
fce8a7bb
JM
525
526 out_offset += snprintf(buf + out_offset, out_count - out_offset,
d98ef99e
DJ
527 "\n");
528 out_offset += snprintf(buf + out_offset, out_count - out_offset,
569410ca
DJ
529 "Using TX DMA - \t%s\n",
530 qp->tx_dma_chan ? "Yes" : "No");
531 out_offset += snprintf(buf + out_offset, out_count - out_offset,
532 "Using RX DMA - \t%s\n",
533 qp->rx_dma_chan ? "Yes" : "No");
d98ef99e
DJ
534 out_offset += snprintf(buf + out_offset, out_count - out_offset,
535 "QP Link - \t%s\n",
e26a5843 536 qp->link_is_up ? "Up" : "Down");
d98ef99e
DJ
537 out_offset += snprintf(buf + out_offset, out_count - out_offset,
538 "\n");
539
d7237e22
JM
540 if (out_offset > out_count)
541 out_offset = out_count;
fce8a7bb
JM
542
543 ret = simple_read_from_buffer(ubuf, count, offp, buf, out_offset);
d7237e22 544 kfree(buf);
fce8a7bb
JM
545 return ret;
546}
547
548static const struct file_operations ntb_qp_debugfs_stats = {
549 .owner = THIS_MODULE,
d66d7ac2 550 .open = simple_open,
fce8a7bb
JM
551 .read = debugfs_read,
552};
553
554static void ntb_list_add(spinlock_t *lock, struct list_head *entry,
555 struct list_head *list)
556{
557 unsigned long flags;
558
559 spin_lock_irqsave(lock, flags);
560 list_add_tail(entry, list);
561 spin_unlock_irqrestore(lock, flags);
562}
563
564static struct ntb_queue_entry *ntb_list_rm(spinlock_t *lock,
53ca4fea 565 struct list_head *list)
fce8a7bb
JM
566{
567 struct ntb_queue_entry *entry;
568 unsigned long flags;
569
570 spin_lock_irqsave(lock, flags);
571 if (list_empty(list)) {
572 entry = NULL;
573 goto out;
574 }
575 entry = list_first_entry(list, struct ntb_queue_entry, entry);
576 list_del(&entry->entry);
e74bfeed 577
fce8a7bb
JM
578out:
579 spin_unlock_irqrestore(lock, flags);
580
581 return entry;
582}
583
da2e5ae5
AH
584static struct ntb_queue_entry *ntb_list_mv(spinlock_t *lock,
585 struct list_head *list,
586 struct list_head *to_list)
587{
588 struct ntb_queue_entry *entry;
589 unsigned long flags;
590
591 spin_lock_irqsave(lock, flags);
592
593 if (list_empty(list)) {
594 entry = NULL;
595 } else {
596 entry = list_first_entry(list, struct ntb_queue_entry, entry);
597 list_move_tail(&entry->entry, to_list);
598 }
599
600 spin_unlock_irqrestore(lock, flags);
601
602 return entry;
603}
604
e26a5843
AH
605static int ntb_transport_setup_qp_mw(struct ntb_transport_ctx *nt,
606 unsigned int qp_num)
fce8a7bb 607{
e26a5843
AH
608 struct ntb_transport_qp *qp = &nt->qp_vec[qp_num];
609 struct ntb_transport_mw *mw;
a754a8fc
DJ
610 struct ntb_dev *ndev = nt->ndev;
611 struct ntb_queue_entry *entry;
ef114ed5 612 unsigned int rx_size, num_qps_mw;
e26a5843 613 unsigned int mw_num, mw_count, qp_count;
793c20e9 614 unsigned int i;
a754a8fc 615 int node;
fce8a7bb 616
e26a5843
AH
617 mw_count = nt->mw_count;
618 qp_count = nt->qp_count;
948d3a65 619
e26a5843
AH
620 mw_num = QP_TO_MW(nt, qp_num);
621 mw = &nt->mw_vec[mw_num];
622
623 if (!mw->virt_addr)
624 return -ENOMEM;
fce8a7bb 625
e26a5843
AH
626 if (qp_count % mw_count && mw_num + 1 < qp_count / mw_count)
627 num_qps_mw = qp_count / mw_count + 1;
fce8a7bb 628 else
e26a5843 629 num_qps_mw = qp_count / mw_count;
fce8a7bb 630
e26a5843 631 rx_size = (unsigned int)mw->xlat_size / num_qps_mw;
c92ba3c5 632 qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);
793c20e9
JM
633 rx_size -= sizeof(struct ntb_rx_info);
634
282a2fee
JM
635 qp->remote_rx_info = qp->rx_buff + rx_size;
636
c9d534c8
JM
637 /* Due to housekeeping, there must be atleast 2 buffs */
638 qp->rx_max_frame = min(transport_mtu, rx_size / 2);
793c20e9
JM
639 qp->rx_max_entry = rx_size / qp->rx_max_frame;
640 qp->rx_index = 0;
641
a754a8fc
DJ
642 /*
643 * Checking to see if we have more entries than the default.
644 * We should add additional entries if that is the case so we
645 * can be in sync with the transport frames.
646 */
647 node = dev_to_node(&ndev->dev);
648 for (i = qp->rx_alloc_entry; i < qp->rx_max_entry; i++) {
649 entry = kzalloc_node(sizeof(*entry), GFP_ATOMIC, node);
650 if (!entry)
651 return -ENOMEM;
652
653 entry->qp = qp;
654 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
655 &qp->rx_free_q);
656 qp->rx_alloc_entry++;
657 }
658
c9d534c8 659 qp->remote_rx_info->entry = qp->rx_max_entry - 1;
fce8a7bb 660
ef114ed5 661 /* setup the hdr offsets with 0's */
793c20e9 662 for (i = 0; i < qp->rx_max_entry; i++) {
e26a5843
AH
663 void *offset = (qp->rx_buff + qp->rx_max_frame * (i + 1) -
664 sizeof(struct ntb_payload_header));
ef114ed5 665 memset(offset, 0, sizeof(struct ntb_payload_header));
793c20e9 666 }
fce8a7bb
JM
667
668 qp->rx_pkts = 0;
669 qp->tx_pkts = 0;
90f9e934 670 qp->tx_index = 0;
e26a5843
AH
671
672 return 0;
fce8a7bb
JM
673}
674
e26a5843 675static void ntb_free_mw(struct ntb_transport_ctx *nt, int num_mw)
b77b2637 676{
e26a5843
AH
677 struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
678 struct pci_dev *pdev = nt->ndev->pdev;
b77b2637
JM
679
680 if (!mw->virt_addr)
681 return;
682
e26a5843
AH
683 ntb_mw_clear_trans(nt->ndev, num_mw);
684 dma_free_coherent(&pdev->dev, mw->buff_size,
685 mw->virt_addr, mw->dma_addr);
686 mw->xlat_size = 0;
687 mw->buff_size = 0;
b77b2637
JM
688 mw->virt_addr = NULL;
689}
690
e26a5843 691static int ntb_set_mw(struct ntb_transport_ctx *nt, int num_mw,
8c9edf63 692 resource_size_t size)
fce8a7bb 693{
e26a5843
AH
694 struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];
695 struct pci_dev *pdev = nt->ndev->pdev;
8c9edf63 696 size_t xlat_size, buff_size;
e26a5843
AH
697 int rc;
698
8c9edf63
AH
699 if (!size)
700 return -EINVAL;
701
e26a5843
AH
702 xlat_size = round_up(size, mw->xlat_align_size);
703 buff_size = round_up(size, mw->xlat_align);
fce8a7bb 704
b77b2637 705 /* No need to re-setup */
e26a5843 706 if (mw->xlat_size == xlat_size)
b77b2637
JM
707 return 0;
708
e26a5843 709 if (mw->buff_size)
b77b2637
JM
710 ntb_free_mw(nt, num_mw);
711
e26a5843
AH
712 /* Alloc memory for receiving data. Must be aligned */
713 mw->xlat_size = xlat_size;
714 mw->buff_size = buff_size;
fce8a7bb 715
e26a5843
AH
716 mw->virt_addr = dma_alloc_coherent(&pdev->dev, buff_size,
717 &mw->dma_addr, GFP_KERNEL);
fce8a7bb 718 if (!mw->virt_addr) {
e26a5843
AH
719 mw->xlat_size = 0;
720 mw->buff_size = 0;
8c9edf63 721 dev_err(&pdev->dev, "Unable to alloc MW buff of size %zu\n",
e26a5843 722 buff_size);
fce8a7bb
JM
723 return -ENOMEM;
724 }
725
3cc5ba19
DJ
726 /*
727 * we must ensure that the memory address allocated is BAR size
728 * aligned in order for the XLAT register to take the value. This
729 * is a requirement of the hardware. It is recommended to setup CMA
730 * for BAR sizes equal or greater than 4MB.
731 */
e26a5843
AH
732 if (!IS_ALIGNED(mw->dma_addr, mw->xlat_align)) {
733 dev_err(&pdev->dev, "DMA memory %pad is not aligned\n",
3cc5ba19
DJ
734 &mw->dma_addr);
735 ntb_free_mw(nt, num_mw);
736 return -ENOMEM;
737 }
738
fce8a7bb 739 /* Notify HW the memory location of the receive buffer */
e26a5843
AH
740 rc = ntb_mw_set_trans(nt->ndev, num_mw, mw->dma_addr, mw->xlat_size);
741 if (rc) {
742 dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);
743 ntb_free_mw(nt, num_mw);
744 return -EIO;
745 }
fce8a7bb
JM
746
747 return 0;
748}
749
2849b5d7
AH
750static void ntb_qp_link_down_reset(struct ntb_transport_qp *qp)
751{
752 qp->link_is_up = false;
e9021331 753 qp->active = false;
2849b5d7
AH
754
755 qp->tx_index = 0;
756 qp->rx_index = 0;
757 qp->rx_bytes = 0;
758 qp->rx_pkts = 0;
759 qp->rx_ring_empty = 0;
760 qp->rx_err_no_buf = 0;
761 qp->rx_err_oflow = 0;
762 qp->rx_err_ver = 0;
763 qp->rx_memcpy = 0;
764 qp->rx_async = 0;
765 qp->tx_bytes = 0;
766 qp->tx_pkts = 0;
767 qp->tx_ring_full = 0;
768 qp->tx_err_no_buf = 0;
769 qp->tx_memcpy = 0;
770 qp->tx_async = 0;
8c874cc1
DJ
771 qp->dma_tx_prep_err = 0;
772 qp->dma_rx_prep_err = 0;
2849b5d7
AH
773}
774
fca4d518 775static void ntb_qp_link_cleanup(struct ntb_transport_qp *qp)
fce8a7bb 776{
e26a5843
AH
777 struct ntb_transport_ctx *nt = qp->transport;
778 struct pci_dev *pdev = nt->ndev->pdev;
fce8a7bb 779
e22e0b9d 780 dev_info(&pdev->dev, "qp %d: Link Cleanup\n", qp->qp_num);
2849b5d7
AH
781
782 cancel_delayed_work_sync(&qp->link_work);
783 ntb_qp_link_down_reset(qp);
e26a5843
AH
784
785 if (qp->event_handler)
786 qp->event_handler(qp->cb_data, qp->link_is_up);
fca4d518
JM
787}
788
789static void ntb_qp_link_cleanup_work(struct work_struct *work)
790{
791 struct ntb_transport_qp *qp = container_of(work,
792 struct ntb_transport_qp,
793 link_cleanup);
e26a5843 794 struct ntb_transport_ctx *nt = qp->transport;
fca4d518
JM
795
796 ntb_qp_link_cleanup(qp);
fce8a7bb 797
e26a5843 798 if (nt->link_is_up)
fce8a7bb
JM
799 schedule_delayed_work(&qp->link_work,
800 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
801}
802
7b4f2d3c
JM
803static void ntb_qp_link_down(struct ntb_transport_qp *qp)
804{
805 schedule_work(&qp->link_cleanup);
806}
807
e26a5843 808static void ntb_transport_link_cleanup(struct ntb_transport_ctx *nt)
fce8a7bb 809{
e26a5843
AH
810 struct ntb_transport_qp *qp;
811 u64 qp_bitmap_alloc;
b17faba0 812 unsigned int i, count;
fce8a7bb 813
e26a5843
AH
814 qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
815
fca4d518 816 /* Pass along the info to any clients */
e26a5843
AH
817 for (i = 0; i < nt->qp_count; i++)
818 if (qp_bitmap_alloc & BIT_ULL(i)) {
819 qp = &nt->qp_vec[i];
820 ntb_qp_link_cleanup(qp);
821 cancel_work_sync(&qp->link_cleanup);
822 cancel_delayed_work_sync(&qp->link_work);
823 }
fca4d518 824
e26a5843 825 if (!nt->link_is_up)
fce8a7bb 826 cancel_delayed_work_sync(&nt->link_work);
fce8a7bb 827
fce8a7bb
JM
828 /* The scratchpad registers keep the values if the remote side
829 * goes down, blast them now to give them a sane value the next
830 * time they are accessed
831 */
b17faba0
SS
832 count = ntb_spad_count(nt->ndev);
833 for (i = 0; i < count; i++)
e26a5843 834 ntb_spad_write(nt->ndev, i, 0);
fce8a7bb
JM
835}
836
fca4d518
JM
837static void ntb_transport_link_cleanup_work(struct work_struct *work)
838{
e26a5843
AH
839 struct ntb_transport_ctx *nt =
840 container_of(work, struct ntb_transport_ctx, link_cleanup);
fca4d518
JM
841
842 ntb_transport_link_cleanup(nt);
843}
844
e26a5843 845static void ntb_transport_event_callback(void *data)
fce8a7bb 846{
e26a5843 847 struct ntb_transport_ctx *nt = data;
fce8a7bb 848
e26a5843 849 if (ntb_link_is_up(nt->ndev, NULL, NULL) == 1)
fce8a7bb 850 schedule_delayed_work(&nt->link_work, 0);
e26a5843 851 else
7b4f2d3c 852 schedule_work(&nt->link_cleanup);
fce8a7bb
JM
853}
854
855static void ntb_transport_link_work(struct work_struct *work)
856{
e26a5843
AH
857 struct ntb_transport_ctx *nt =
858 container_of(work, struct ntb_transport_ctx, link_work.work);
859 struct ntb_dev *ndev = nt->ndev;
860 struct pci_dev *pdev = ndev->pdev;
861 resource_size_t size;
fce8a7bb 862 u32 val;
84f76685 863 int rc = 0, i, spad;
fce8a7bb 864
113fc505 865 /* send the local info, in the opposite order of the way we read it */
e26a5843
AH
866 for (i = 0; i < nt->mw_count; i++) {
867 size = nt->mw_vec[i].phys_size;
fce8a7bb 868
e26a5843
AH
869 if (max_mw_size && size > max_mw_size)
870 size = max_mw_size;
fce8a7bb 871
e26a5843 872 spad = MW0_SZ_HIGH + (i * 2);
fdcb4b2e 873 ntb_peer_spad_write(ndev, spad, upper_32_bits(size));
fce8a7bb 874
e26a5843 875 spad = MW0_SZ_LOW + (i * 2);
fdcb4b2e 876 ntb_peer_spad_write(ndev, spad, lower_32_bits(size));
fce8a7bb
JM
877 }
878
e26a5843 879 ntb_peer_spad_write(ndev, NUM_MWS, nt->mw_count);
fce8a7bb 880
e26a5843 881 ntb_peer_spad_write(ndev, NUM_QPS, nt->qp_count);
fce8a7bb 882
e26a5843 883 ntb_peer_spad_write(ndev, VERSION, NTB_TRANSPORT_VERSION);
fce8a7bb 884
e26a5843 885 /* Query the remote side for its info */
0f69a7df 886 val = ntb_spad_read(ndev, VERSION);
e26a5843
AH
887 dev_dbg(&pdev->dev, "Remote version = %d\n", val);
888 if (val != NTB_TRANSPORT_VERSION)
fce8a7bb 889 goto out;
fce8a7bb 890
0f69a7df 891 val = ntb_spad_read(ndev, NUM_QPS);
fce8a7bb 892 dev_dbg(&pdev->dev, "Remote max number of qps = %d\n", val);
e26a5843 893 if (val != nt->qp_count)
fce8a7bb 894 goto out;
fce8a7bb 895
0f69a7df 896 val = ntb_spad_read(ndev, NUM_MWS);
113fc505 897 dev_dbg(&pdev->dev, "Remote number of mws = %d\n", val);
e26a5843
AH
898 if (val != nt->mw_count)
899 goto out;
fce8a7bb 900
e26a5843 901 for (i = 0; i < nt->mw_count; i++) {
113fc505 902 u64 val64;
fce8a7bb 903
0f69a7df 904 val = ntb_spad_read(ndev, MW0_SZ_HIGH + (i * 2));
e26a5843 905 val64 = (u64)val << 32;
113fc505 906
0f69a7df 907 val = ntb_spad_read(ndev, MW0_SZ_LOW + (i * 2));
113fc505
JM
908 val64 |= val;
909
e26a5843 910 dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);
113fc505
JM
911
912 rc = ntb_set_mw(nt, i, val64);
913 if (rc)
914 goto out1;
915 }
fce8a7bb 916
e26a5843 917 nt->link_is_up = true;
fce8a7bb 918
e26a5843
AH
919 for (i = 0; i < nt->qp_count; i++) {
920 struct ntb_transport_qp *qp = &nt->qp_vec[i];
fce8a7bb
JM
921
922 ntb_transport_setup_qp_mw(nt, i);
923
e26a5843 924 if (qp->client_ready)
fce8a7bb
JM
925 schedule_delayed_work(&qp->link_work, 0);
926 }
927
928 return;
929
113fc505 930out1:
e26a5843 931 for (i = 0; i < nt->mw_count; i++)
113fc505 932 ntb_free_mw(nt, i);
84f76685
DJ
933
934 /* if there's an actual failure, we should just bail */
935 if (rc < 0) {
936 ntb_link_disable(ndev);
937 return;
938 }
939
fce8a7bb 940out:
e26a5843 941 if (ntb_link_is_up(ndev, NULL, NULL) == 1)
fce8a7bb
JM
942 schedule_delayed_work(&nt->link_work,
943 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
944}
945
946static void ntb_qp_link_work(struct work_struct *work)
947{
948 struct ntb_transport_qp *qp = container_of(work,
949 struct ntb_transport_qp,
950 link_work.work);
e26a5843
AH
951 struct pci_dev *pdev = qp->ndev->pdev;
952 struct ntb_transport_ctx *nt = qp->transport;
953 int val;
fce8a7bb 954
e26a5843 955 WARN_ON(!nt->link_is_up);
fce8a7bb 956
e26a5843 957 val = ntb_spad_read(nt->ndev, QP_LINKS);
fce8a7bb 958
e26a5843 959 ntb_peer_spad_write(nt->ndev, QP_LINKS, val | BIT(qp->qp_num));
fce8a7bb
JM
960
961 /* query remote spad for qp ready bits */
28762289 962 dev_dbg_ratelimited(&pdev->dev, "Remote QP link status = %x\n", val);
fce8a7bb
JM
963
964 /* See if the remote side is up */
e26a5843 965 if (val & BIT(qp->qp_num)) {
fce8a7bb 966 dev_info(&pdev->dev, "qp %d: Link Up\n", qp->qp_num);
e26a5843 967 qp->link_is_up = true;
e9021331 968 qp->active = true;
e26a5843 969
fce8a7bb 970 if (qp->event_handler)
e26a5843 971 qp->event_handler(qp->cb_data, qp->link_is_up);
8b5a22d8 972
e9021331
DJ
973 if (qp->active)
974 tasklet_schedule(&qp->rxc_db_work);
e26a5843 975 } else if (nt->link_is_up)
fce8a7bb
JM
976 schedule_delayed_work(&qp->link_work,
977 msecs_to_jiffies(NTB_LINK_DOWN_TIMEOUT));
978}
979
e26a5843 980static int ntb_transport_init_queue(struct ntb_transport_ctx *nt,
53ca4fea 981 unsigned int qp_num)
fce8a7bb
JM
982{
983 struct ntb_transport_qp *qp;
e26a5843
AH
984 phys_addr_t mw_base;
985 resource_size_t mw_size;
ef114ed5 986 unsigned int num_qps_mw, tx_size;
e26a5843 987 unsigned int mw_num, mw_count, qp_count;
282a2fee 988 u64 qp_offset;
948d3a65 989
e26a5843
AH
990 mw_count = nt->mw_count;
991 qp_count = nt->qp_count;
fce8a7bb 992
e26a5843 993 mw_num = QP_TO_MW(nt, qp_num);
e26a5843
AH
994
995 qp = &nt->qp_vec[qp_num];
fce8a7bb
JM
996 qp->qp_num = qp_num;
997 qp->transport = nt;
998 qp->ndev = nt->ndev;
e26a5843 999 qp->client_ready = false;
fce8a7bb 1000 qp->event_handler = NULL;
2849b5d7 1001 ntb_qp_link_down_reset(qp);
fce8a7bb 1002
e26a5843
AH
1003 if (qp_count % mw_count && mw_num + 1 < qp_count / mw_count)
1004 num_qps_mw = qp_count / mw_count + 1;
ef114ed5 1005 else
e26a5843
AH
1006 num_qps_mw = qp_count / mw_count;
1007
1008 mw_base = nt->mw_vec[mw_num].phys_addr;
1009 mw_size = nt->mw_vec[mw_num].phys_size;
ef114ed5 1010
e26a5843 1011 tx_size = (unsigned int)mw_size / num_qps_mw;
c92ba3c5 1012 qp_offset = tx_size * (qp_num / mw_count);
e26a5843
AH
1013
1014 qp->tx_mw = nt->mw_vec[mw_num].vbase + qp_offset;
282a2fee
JM
1015 if (!qp->tx_mw)
1016 return -EINVAL;
1017
e26a5843 1018 qp->tx_mw_phys = mw_base + qp_offset;
282a2fee
JM
1019 if (!qp->tx_mw_phys)
1020 return -EINVAL;
1021
793c20e9 1022 tx_size -= sizeof(struct ntb_rx_info);
282a2fee 1023 qp->rx_info = qp->tx_mw + tx_size;
793c20e9 1024
c9d534c8
JM
1025 /* Due to housekeeping, there must be atleast 2 buffs */
1026 qp->tx_max_frame = min(transport_mtu, tx_size / 2);
793c20e9 1027 qp->tx_max_entry = tx_size / qp->tx_max_frame;
ef114ed5 1028
c8650fd0 1029 if (nt->debugfs_node_dir) {
fce8a7bb
JM
1030 char debugfs_name[4];
1031
1032 snprintf(debugfs_name, 4, "qp%d", qp_num);
1033 qp->debugfs_dir = debugfs_create_dir(debugfs_name,
c8650fd0 1034 nt->debugfs_node_dir);
fce8a7bb
JM
1035
1036 qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR,
1037 qp->debugfs_dir, qp,
1038 &ntb_qp_debugfs_stats);
e26a5843
AH
1039 } else {
1040 qp->debugfs_dir = NULL;
1041 qp->debugfs_stats = NULL;
fce8a7bb
JM
1042 }
1043
1044 INIT_DELAYED_WORK(&qp->link_work, ntb_qp_link_work);
fca4d518 1045 INIT_WORK(&qp->link_cleanup, ntb_qp_link_cleanup_work);
fce8a7bb 1046
da2e5ae5 1047 spin_lock_init(&qp->ntb_rx_q_lock);
fce8a7bb
JM
1048 spin_lock_init(&qp->ntb_tx_free_q_lock);
1049
da2e5ae5 1050 INIT_LIST_HEAD(&qp->rx_post_q);
fce8a7bb
JM
1051 INIT_LIST_HEAD(&qp->rx_pend_q);
1052 INIT_LIST_HEAD(&qp->rx_free_q);
1053 INIT_LIST_HEAD(&qp->tx_free_q);
282a2fee 1054
e26a5843
AH
1055 tasklet_init(&qp->rxc_db_work, ntb_transport_rxc_db,
1056 (unsigned long)qp);
1057
282a2fee 1058 return 0;
fce8a7bb
JM
1059}
1060
e26a5843 1061static int ntb_transport_probe(struct ntb_client *self, struct ntb_dev *ndev)
fce8a7bb 1062{
e26a5843
AH
1063 struct ntb_transport_ctx *nt;
1064 struct ntb_transport_mw *mw;
b17faba0 1065 unsigned int mw_count, qp_count, spad_count, max_mw_count_for_spads;
e26a5843 1066 u64 qp_bitmap;
1199aa61 1067 int node;
fce8a7bb
JM
1068 int rc, i;
1069
19645a07 1070 mw_count = ntb_mw_count(ndev);
19645a07 1071
e26a5843
AH
1072 if (ntb_db_is_unsafe(ndev))
1073 dev_dbg(&ndev->dev,
1074 "doorbell is unsafe, proceed anyway...\n");
1075 if (ntb_spad_is_unsafe(ndev))
1076 dev_dbg(&ndev->dev,
1077 "scratchpad is unsafe, proceed anyway...\n");
1078
1199aa61
AH
1079 node = dev_to_node(&ndev->dev);
1080
1081 nt = kzalloc_node(sizeof(*nt), GFP_KERNEL, node);
fce8a7bb
JM
1082 if (!nt)
1083 return -ENOMEM;
1084
e26a5843 1085 nt->ndev = ndev;
b17faba0
SS
1086 spad_count = ntb_spad_count(ndev);
1087
1088 /* Limit the MW's based on the availability of scratchpads */
1089
1090 if (spad_count < NTB_TRANSPORT_MIN_SPADS) {
1091 nt->mw_count = 0;
1092 rc = -EINVAL;
1093 goto err;
1094 }
e26a5843 1095
b17faba0
SS
1096 max_mw_count_for_spads = (spad_count - MW0_SZ_HIGH) / 2;
1097 nt->mw_count = min(mw_count, max_mw_count_for_spads);
e26a5843 1098
1199aa61
AH
1099 nt->mw_vec = kzalloc_node(mw_count * sizeof(*nt->mw_vec),
1100 GFP_KERNEL, node);
e26a5843
AH
1101 if (!nt->mw_vec) {
1102 rc = -ENOMEM;
fce8a7bb
JM
1103 goto err;
1104 }
1105
e26a5843
AH
1106 for (i = 0; i < mw_count; i++) {
1107 mw = &nt->mw_vec[i];
1108
1109 rc = ntb_mw_get_range(ndev, i, &mw->phys_addr, &mw->phys_size,
1110 &mw->xlat_align, &mw->xlat_align_size);
1111 if (rc)
1112 goto err1;
1113
06917f75 1114 mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);
e26a5843
AH
1115 if (!mw->vbase) {
1116 rc = -ENOMEM;
1117 goto err1;
1118 }
1119
1120 mw->buff_size = 0;
1121 mw->xlat_size = 0;
1122 mw->virt_addr = NULL;
1123 mw->dma_addr = 0;
948d3a65
JM
1124 }
1125
e26a5843
AH
1126 qp_bitmap = ntb_db_valid_mask(ndev);
1127
1128 qp_count = ilog2(qp_bitmap);
1129 if (max_num_clients && max_num_clients < qp_count)
1130 qp_count = max_num_clients;
1131 else if (mw_count < qp_count)
1132 qp_count = mw_count;
1133
1134 qp_bitmap &= BIT_ULL(qp_count) - 1;
1135
1136 nt->qp_count = qp_count;
1137 nt->qp_bitmap = qp_bitmap;
1138 nt->qp_bitmap_free = qp_bitmap;
fce8a7bb 1139
1199aa61
AH
1140 nt->qp_vec = kzalloc_node(qp_count * sizeof(*nt->qp_vec),
1141 GFP_KERNEL, node);
e26a5843 1142 if (!nt->qp_vec) {
fce8a7bb 1143 rc = -ENOMEM;
d4adee09 1144 goto err1;
fce8a7bb
JM
1145 }
1146
c8650fd0
DJ
1147 if (nt_debugfs_dir) {
1148 nt->debugfs_node_dir =
1149 debugfs_create_dir(pci_name(ndev->pdev),
1150 nt_debugfs_dir);
1151 }
1152
e26a5843 1153 for (i = 0; i < qp_count; i++) {
282a2fee
JM
1154 rc = ntb_transport_init_queue(nt, i);
1155 if (rc)
d4adee09 1156 goto err2;
282a2fee 1157 }
fce8a7bb
JM
1158
1159 INIT_DELAYED_WORK(&nt->link_work, ntb_transport_link_work);
fca4d518 1160 INIT_WORK(&nt->link_cleanup, ntb_transport_link_cleanup_work);
fce8a7bb 1161
e26a5843 1162 rc = ntb_set_ctx(ndev, nt, &ntb_transport_ops);
fce8a7bb 1163 if (rc)
d4adee09 1164 goto err2;
fce8a7bb
JM
1165
1166 INIT_LIST_HEAD(&nt->client_devs);
1167 rc = ntb_bus_init(nt);
1168 if (rc)
d4adee09 1169 goto err3;
fce8a7bb 1170
e26a5843
AH
1171 nt->link_is_up = false;
1172 ntb_link_enable(ndev, NTB_SPEED_AUTO, NTB_WIDTH_AUTO);
1173 ntb_link_event(ndev);
fce8a7bb
JM
1174
1175 return 0;
1176
948d3a65 1177err3:
d4adee09 1178 ntb_clear_ctx(ndev);
948d3a65 1179err2:
d4adee09 1180 kfree(nt->qp_vec);
fce8a7bb 1181err1:
e26a5843
AH
1182 while (i--) {
1183 mw = &nt->mw_vec[i];
1184 iounmap(mw->vbase);
1185 }
d4adee09 1186 kfree(nt->mw_vec);
fce8a7bb 1187err:
fce8a7bb
JM
1188 kfree(nt);
1189 return rc;
1190}
1191
e26a5843 1192static void ntb_transport_free(struct ntb_client *self, struct ntb_dev *ndev)
fce8a7bb 1193{
e26a5843
AH
1194 struct ntb_transport_ctx *nt = ndev->ctx;
1195 struct ntb_transport_qp *qp;
1196 u64 qp_bitmap_alloc;
fce8a7bb
JM
1197 int i;
1198
fca4d518 1199 ntb_transport_link_cleanup(nt);
e26a5843
AH
1200 cancel_work_sync(&nt->link_cleanup);
1201 cancel_delayed_work_sync(&nt->link_work);
1202
1203 qp_bitmap_alloc = nt->qp_bitmap & ~nt->qp_bitmap_free;
fce8a7bb
JM
1204
1205 /* verify that all the qp's are freed */
e26a5843
AH
1206 for (i = 0; i < nt->qp_count; i++) {
1207 qp = &nt->qp_vec[i];
1208 if (qp_bitmap_alloc & BIT_ULL(i))
1209 ntb_transport_free_queue(qp);
1210 debugfs_remove_recursive(qp->debugfs_dir);
1517a3f2 1211 }
fce8a7bb 1212
e26a5843
AH
1213 ntb_link_disable(ndev);
1214 ntb_clear_ctx(ndev);
fce8a7bb 1215
e26a5843 1216 ntb_bus_remove(nt);
fce8a7bb 1217
e26a5843 1218 for (i = nt->mw_count; i--; ) {
113fc505 1219 ntb_free_mw(nt, i);
e26a5843
AH
1220 iounmap(nt->mw_vec[i].vbase);
1221 }
fce8a7bb 1222
e26a5843
AH
1223 kfree(nt->qp_vec);
1224 kfree(nt->mw_vec);
fce8a7bb
JM
1225 kfree(nt);
1226}
1227
da2e5ae5 1228static void ntb_complete_rxc(struct ntb_transport_qp *qp)
fce8a7bb 1229{
da2e5ae5
AH
1230 struct ntb_queue_entry *entry;
1231 void *cb_data;
1232 unsigned int len;
1233 unsigned long irqflags;
1234
1235 spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
1236
1237 while (!list_empty(&qp->rx_post_q)) {
1238 entry = list_first_entry(&qp->rx_post_q,
1239 struct ntb_queue_entry, entry);
1240 if (!(entry->flags & DESC_DONE_FLAG))
1241 break;
1242
1243 entry->rx_hdr->flags = 0;
72203572 1244 iowrite32(entry->rx_index, &qp->rx_info->entry);
da2e5ae5
AH
1245
1246 cb_data = entry->cb_data;
1247 len = entry->len;
1248
1249 list_move_tail(&entry->entry, &qp->rx_free_q);
1250
1251 spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1252
1253 if (qp->rx_handler && qp->client_ready)
1254 qp->rx_handler(qp, qp->cb_data, cb_data, len);
1255
1256 spin_lock_irqsave(&qp->ntb_rx_q_lock, irqflags);
1257 }
282a2fee 1258
da2e5ae5
AH
1259 spin_unlock_irqrestore(&qp->ntb_rx_q_lock, irqflags);
1260}
fce8a7bb 1261
72203572
DJ
1262static void ntb_rx_copy_callback(void *data,
1263 const struct dmaengine_result *res)
da2e5ae5
AH
1264{
1265 struct ntb_queue_entry *entry = data;
fce8a7bb 1266
72203572
DJ
1267 /* we need to check DMA results if we are using DMA */
1268 if (res) {
1269 enum dmaengine_tx_result dma_err = res->result;
1270
1271 switch (dma_err) {
1272 case DMA_TRANS_READ_FAILED:
1273 case DMA_TRANS_WRITE_FAILED:
1274 entry->errors++;
1275 case DMA_TRANS_ABORTED:
1276 {
1277 struct ntb_transport_qp *qp = entry->qp;
1278 void *offset = qp->rx_buff + qp->rx_max_frame *
1279 qp->rx_index;
1280
1281 ntb_memcpy_rx(entry, offset);
1282 qp->rx_memcpy++;
1283 return;
1284 }
1285
1286 case DMA_TRANS_NOERROR:
1287 default:
1288 break;
1289 }
1290 }
1291
da2e5ae5 1292 entry->flags |= DESC_DONE_FLAG;
448c6fb3 1293
da2e5ae5 1294 ntb_complete_rxc(entry->qp);
fce8a7bb
JM
1295}
1296
282a2fee
JM
1297static void ntb_memcpy_rx(struct ntb_queue_entry *entry, void *offset)
1298{
1299 void *buf = entry->buf;
1300 size_t len = entry->len;
1301
1302 memcpy(buf, offset, len);
1303
e26a5843
AH
1304 /* Ensure that the data is fully copied out before clearing the flag */
1305 wmb();
1306
72203572 1307 ntb_rx_copy_callback(entry, NULL);
282a2fee
JM
1308}
1309
72203572 1310static int ntb_async_rx_submit(struct ntb_queue_entry *entry, void *offset)
282a2fee
JM
1311{
1312 struct dma_async_tx_descriptor *txd;
1313 struct ntb_transport_qp *qp = entry->qp;
569410ca 1314 struct dma_chan *chan = qp->rx_dma_chan;
282a2fee 1315 struct dma_device *device;
da2e5ae5 1316 size_t pay_off, buff_off, len;
6f57fd05 1317 struct dmaengine_unmap_data *unmap;
282a2fee
JM
1318 dma_cookie_t cookie;
1319 void *buf = entry->buf;
8c874cc1 1320 int retries = 0;
282a2fee 1321
da2e5ae5 1322 len = entry->len;
282a2fee 1323 device = chan->device;
e26a5843
AH
1324 pay_off = (size_t)offset & ~PAGE_MASK;
1325 buff_off = (size_t)buf & ~PAGE_MASK;
282a2fee
JM
1326
1327 if (!is_dma_copy_aligned(device, pay_off, buff_off, len))
905921e7 1328 goto err;
282a2fee 1329
6f57fd05
BZ
1330 unmap = dmaengine_get_unmap_data(device->dev, 2, GFP_NOWAIT);
1331 if (!unmap)
905921e7 1332 goto err;
282a2fee 1333
6f57fd05
BZ
1334 unmap->len = len;
1335 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(offset),
1336 pay_off, len, DMA_TO_DEVICE);
1337 if (dma_mapping_error(device->dev, unmap->addr[0]))
1338 goto err_get_unmap;
1339
1340 unmap->to_cnt = 1;
282a2fee 1341
6f57fd05
BZ
1342 unmap->addr[1] = dma_map_page(device->dev, virt_to_page(buf),
1343 buff_off, len, DMA_FROM_DEVICE);
1344 if (dma_mapping_error(device->dev, unmap->addr[1]))
1345 goto err_get_unmap;
1346
1347 unmap->from_cnt = 1;
1348
8c874cc1 1349 for (retries = 0; retries < DMA_RETRIES; retries++) {
72203572
DJ
1350 txd = device->device_prep_dma_memcpy(chan,
1351 unmap->addr[1],
8c874cc1
DJ
1352 unmap->addr[0], len,
1353 DMA_PREP_INTERRUPT);
1354 if (txd)
1355 break;
1356
1357 set_current_state(TASK_INTERRUPTIBLE);
1358 schedule_timeout(DMA_OUT_RESOURCE_TO);
1359 }
1360
1361 if (!txd) {
1362 qp->dma_rx_prep_err++;
6f57fd05 1363 goto err_get_unmap;
8c874cc1 1364 }
282a2fee 1365
72203572 1366 txd->callback_result = ntb_rx_copy_callback;
282a2fee 1367 txd->callback_param = entry;
6f57fd05 1368 dma_set_unmap(txd, unmap);
282a2fee
JM
1369
1370 cookie = dmaengine_submit(txd);
1371 if (dma_submit_error(cookie))
6f57fd05
BZ
1372 goto err_set_unmap;
1373
1374 dmaengine_unmap_put(unmap);
282a2fee
JM
1375
1376 qp->last_cookie = cookie;
1377
1378 qp->rx_async++;
1379
72203572 1380 return 0;
282a2fee 1381
6f57fd05
BZ
1382err_set_unmap:
1383 dmaengine_unmap_put(unmap);
1384err_get_unmap:
1385 dmaengine_unmap_put(unmap);
72203572
DJ
1386err:
1387 return -ENXIO;
1388}
1389
1390static void ntb_async_rx(struct ntb_queue_entry *entry, void *offset)
1391{
1392 struct ntb_transport_qp *qp = entry->qp;
1393 struct dma_chan *chan = qp->rx_dma_chan;
1394 int res;
1395
1396 if (!chan)
1397 goto err;
1398
1399 if (entry->len < copy_bytes)
1400 goto err;
1401
1402 res = ntb_async_rx_submit(entry, offset);
1403 if (res < 0)
1404 goto err;
1405
1406 if (!entry->retries)
1407 qp->rx_async++;
1408
1409 return;
1410
282a2fee
JM
1411err:
1412 ntb_memcpy_rx(entry, offset);
1413 qp->rx_memcpy++;
1414}
1415
fce8a7bb
JM
1416static int ntb_process_rxc(struct ntb_transport_qp *qp)
1417{
1418 struct ntb_payload_header *hdr;
1419 struct ntb_queue_entry *entry;
1420 void *offset;
1421
793c20e9
JM
1422 offset = qp->rx_buff + qp->rx_max_frame * qp->rx_index;
1423 hdr = offset + qp->rx_max_frame - sizeof(struct ntb_payload_header);
1424
e26a5843
AH
1425 dev_dbg(&qp->ndev->pdev->dev, "qp %d: RX ver %u len %d flags %x\n",
1426 qp->qp_num, hdr->ver, hdr->len, hdr->flags);
fce8a7bb 1427
fce8a7bb 1428 if (!(hdr->flags & DESC_DONE_FLAG)) {
e26a5843 1429 dev_dbg(&qp->ndev->pdev->dev, "done flag not set\n");
fce8a7bb
JM
1430 qp->rx_ring_empty++;
1431 return -EAGAIN;
1432 }
1433
e26a5843
AH
1434 if (hdr->flags & LINK_DOWN_FLAG) {
1435 dev_dbg(&qp->ndev->pdev->dev, "link down flag set\n");
1436 ntb_qp_link_down(qp);
1437 hdr->flags = 0;
c0900b33 1438 return -EAGAIN;
e26a5843
AH
1439 }
1440
1441 if (hdr->ver != (u32)qp->rx_pkts) {
1442 dev_dbg(&qp->ndev->pdev->dev,
1443 "version mismatch, expected %llu - got %u\n",
1444 qp->rx_pkts, hdr->ver);
fce8a7bb
JM
1445 qp->rx_err_ver++;
1446 return -EIO;
1447 }
1448
da2e5ae5 1449 entry = ntb_list_mv(&qp->ntb_rx_q_lock, &qp->rx_pend_q, &qp->rx_post_q);
e26a5843
AH
1450 if (!entry) {
1451 dev_dbg(&qp->ndev->pdev->dev, "no receive buffer\n");
1452 qp->rx_err_no_buf++;
da2e5ae5 1453 return -EAGAIN;
fce8a7bb
JM
1454 }
1455
da2e5ae5 1456 entry->rx_hdr = hdr;
72203572 1457 entry->rx_index = qp->rx_index;
da2e5ae5 1458
282a2fee 1459 if (hdr->len > entry->len) {
e26a5843
AH
1460 dev_dbg(&qp->ndev->pdev->dev,
1461 "receive buffer overflow! Wanted %d got %d\n",
fce8a7bb 1462 hdr->len, entry->len);
e26a5843 1463 qp->rx_err_oflow++;
282a2fee 1464
da2e5ae5
AH
1465 entry->len = -EIO;
1466 entry->flags |= DESC_DONE_FLAG;
fce8a7bb 1467
da2e5ae5
AH
1468 ntb_complete_rxc(qp);
1469 } else {
1470 dev_dbg(&qp->ndev->pdev->dev,
1471 "RX OK index %u ver %u size %d into buf size %d\n",
1472 qp->rx_index, hdr->ver, hdr->len, entry->len);
e26a5843 1473
da2e5ae5
AH
1474 qp->rx_bytes += hdr->len;
1475 qp->rx_pkts++;
e26a5843 1476
da2e5ae5 1477 entry->len = hdr->len;
282a2fee 1478
da2e5ae5
AH
1479 ntb_async_rx(entry, offset);
1480 }
fce8a7bb 1481
282a2fee
JM
1482 qp->rx_index++;
1483 qp->rx_index %= qp->rx_max_entry;
1484
1485 return 0;
fce8a7bb
JM
1486}
1487
e26a5843 1488static void ntb_transport_rxc_db(unsigned long data)
fce8a7bb 1489{
e26a5843 1490 struct ntb_transport_qp *qp = (void *)data;
c336acd3 1491 int rc, i;
fce8a7bb 1492
e26a5843
AH
1493 dev_dbg(&qp->ndev->pdev->dev, "%s: doorbell %d received\n",
1494 __func__, qp->qp_num);
e8aeb60c 1495
c336acd3
JM
1496 /* Limit the number of packets processed in a single interrupt to
1497 * provide fairness to others
1498 */
1499 for (i = 0; i < qp->rx_max_entry; i++) {
fce8a7bb 1500 rc = ntb_process_rxc(qp);
c336acd3
JM
1501 if (rc)
1502 break;
1503 }
282a2fee 1504
569410ca
DJ
1505 if (i && qp->rx_dma_chan)
1506 dma_async_issue_pending(qp->rx_dma_chan);
fce8a7bb 1507
e26a5843
AH
1508 if (i == qp->rx_max_entry) {
1509 /* there is more work to do */
e9021331
DJ
1510 if (qp->active)
1511 tasklet_schedule(&qp->rxc_db_work);
e26a5843
AH
1512 } else if (ntb_db_read(qp->ndev) & BIT_ULL(qp->qp_num)) {
1513 /* the doorbell bit is set: clear it */
1514 ntb_db_clear(qp->ndev, BIT_ULL(qp->qp_num));
1515 /* ntb_db_read ensures ntb_db_clear write is committed */
1516 ntb_db_read(qp->ndev);
1517
1518 /* an interrupt may have arrived between finishing
1519 * ntb_process_rxc and clearing the doorbell bit:
1520 * there might be some more work to do.
1521 */
e9021331
DJ
1522 if (qp->active)
1523 tasklet_schedule(&qp->rxc_db_work);
e26a5843 1524 }
fce8a7bb
JM
1525}
1526
9cabc269
DJ
1527static void ntb_tx_copy_callback(void *data,
1528 const struct dmaengine_result *res)
fce8a7bb 1529{
282a2fee
JM
1530 struct ntb_queue_entry *entry = data;
1531 struct ntb_transport_qp *qp = entry->qp;
1532 struct ntb_payload_header __iomem *hdr = entry->tx_hdr;
fce8a7bb 1533
9cabc269
DJ
1534 /* we need to check DMA results if we are using DMA */
1535 if (res) {
1536 enum dmaengine_tx_result dma_err = res->result;
1537
1538 switch (dma_err) {
1539 case DMA_TRANS_READ_FAILED:
1540 case DMA_TRANS_WRITE_FAILED:
1541 entry->errors++;
1542 case DMA_TRANS_ABORTED:
1543 {
1544 void __iomem *offset =
1545 qp->tx_mw + qp->tx_max_frame *
1546 entry->tx_index;
1547
1548 /* resubmit via CPU */
1549 ntb_memcpy_tx(entry, offset);
1550 qp->tx_memcpy++;
1551 return;
1552 }
1553
1554 case DMA_TRANS_NOERROR:
1555 default:
1556 break;
1557 }
1558 }
1559
74465645 1560 iowrite32(entry->flags | DESC_DONE_FLAG, &hdr->flags);
fce8a7bb 1561
e26a5843 1562 ntb_peer_db_set(qp->ndev, BIT_ULL(qp->qp_num));
fce8a7bb
JM
1563
1564 /* The entry length can only be zero if the packet is intended to be a
1565 * "link down" or similar. Since no payload is being sent in these
1566 * cases, there is nothing to add to the completion queue.
1567 */
1568 if (entry->len > 0) {
1569 qp->tx_bytes += entry->len;
1570
1571 if (qp->tx_handler)
1572 qp->tx_handler(qp, qp->cb_data, entry->cb_data,
1573 entry->len);
1574 }
1575
1576 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry, &qp->tx_free_q);
1577}
1578
282a2fee 1579static void ntb_memcpy_tx(struct ntb_queue_entry *entry, void __iomem *offset)
fce8a7bb 1580{
06917f75
DJ
1581#ifdef ARCH_HAS_NOCACHE_UACCESS
1582 /*
1583 * Using non-temporal mov to improve performance on non-cached
1584 * writes, even though we aren't actually copying from user space.
1585 */
1586 __copy_from_user_inatomic_nocache(offset, entry->buf, entry->len);
1587#else
282a2fee 1588 memcpy_toio(offset, entry->buf, entry->len);
06917f75 1589#endif
282a2fee 1590
e26a5843
AH
1591 /* Ensure that the data is fully copied out before setting the flags */
1592 wmb();
1593
9cabc269 1594 ntb_tx_copy_callback(entry, NULL);
282a2fee
JM
1595}
1596
9cabc269
DJ
1597static int ntb_async_tx_submit(struct ntb_transport_qp *qp,
1598 struct ntb_queue_entry *entry)
282a2fee 1599{
282a2fee 1600 struct dma_async_tx_descriptor *txd;
569410ca 1601 struct dma_chan *chan = qp->tx_dma_chan;
282a2fee 1602 struct dma_device *device;
9cabc269
DJ
1603 size_t len = entry->len;
1604 void *buf = entry->buf;
282a2fee 1605 size_t dest_off, buff_off;
6f57fd05
BZ
1606 struct dmaengine_unmap_data *unmap;
1607 dma_addr_t dest;
282a2fee 1608 dma_cookie_t cookie;
8c874cc1 1609 int retries = 0;
fce8a7bb 1610
282a2fee 1611 device = chan->device;
9cabc269 1612 dest = qp->tx_mw_phys + qp->tx_max_frame * entry->tx_index;
e26a5843
AH
1613 buff_off = (size_t)buf & ~PAGE_MASK;
1614 dest_off = (size_t)dest & ~PAGE_MASK;
282a2fee
JM
1615
1616 if (!is_dma_copy_aligned(device, buff_off, dest_off, len))
1617 goto err;
1618
6f57fd05
BZ
1619 unmap = dmaengine_get_unmap_data(device->dev, 1, GFP_NOWAIT);
1620 if (!unmap)
282a2fee
JM
1621 goto err;
1622
6f57fd05
BZ
1623 unmap->len = len;
1624 unmap->addr[0] = dma_map_page(device->dev, virt_to_page(buf),
1625 buff_off, len, DMA_TO_DEVICE);
1626 if (dma_mapping_error(device->dev, unmap->addr[0]))
1627 goto err_get_unmap;
1628
1629 unmap->to_cnt = 1;
1630
8c874cc1 1631 for (retries = 0; retries < DMA_RETRIES; retries++) {
9cabc269
DJ
1632 txd = device->device_prep_dma_memcpy(chan, dest,
1633 unmap->addr[0], len,
1634 DMA_PREP_INTERRUPT);
8c874cc1
DJ
1635 if (txd)
1636 break;
1637
1638 set_current_state(TASK_INTERRUPTIBLE);
1639 schedule_timeout(DMA_OUT_RESOURCE_TO);
1640 }
1641
1642 if (!txd) {
1643 qp->dma_tx_prep_err++;
6f57fd05 1644 goto err_get_unmap;
8c874cc1 1645 }
282a2fee 1646
9cabc269 1647 txd->callback_result = ntb_tx_copy_callback;
282a2fee 1648 txd->callback_param = entry;
6f57fd05 1649 dma_set_unmap(txd, unmap);
282a2fee
JM
1650
1651 cookie = dmaengine_submit(txd);
1652 if (dma_submit_error(cookie))
6f57fd05
BZ
1653 goto err_set_unmap;
1654
1655 dmaengine_unmap_put(unmap);
282a2fee
JM
1656
1657 dma_async_issue_pending(chan);
282a2fee 1658
9cabc269 1659 return 0;
6f57fd05
BZ
1660err_set_unmap:
1661 dmaengine_unmap_put(unmap);
1662err_get_unmap:
1663 dmaengine_unmap_put(unmap);
9cabc269
DJ
1664err:
1665 return -ENXIO;
1666}
1667
1668static void ntb_async_tx(struct ntb_transport_qp *qp,
1669 struct ntb_queue_entry *entry)
1670{
1671 struct ntb_payload_header __iomem *hdr;
1672 struct dma_chan *chan = qp->tx_dma_chan;
1673 void __iomem *offset;
1674 int res;
1675
1676 entry->tx_index = qp->tx_index;
1677 offset = qp->tx_mw + qp->tx_max_frame * entry->tx_index;
1678 hdr = offset + qp->tx_max_frame - sizeof(struct ntb_payload_header);
1679 entry->tx_hdr = hdr;
1680
1681 iowrite32(entry->len, &hdr->len);
1682 iowrite32((u32)qp->tx_pkts, &hdr->ver);
1683
1684 if (!chan)
1685 goto err;
1686
1687 if (entry->len < copy_bytes)
1688 goto err;
1689
1690 res = ntb_async_tx_submit(qp, entry);
1691 if (res < 0)
1692 goto err;
1693
1694 if (!entry->retries)
1695 qp->tx_async++;
1696
1697 return;
1698
282a2fee
JM
1699err:
1700 ntb_memcpy_tx(entry, offset);
1701 qp->tx_memcpy++;
1702}
1703
1704static int ntb_process_tx(struct ntb_transport_qp *qp,
1705 struct ntb_queue_entry *entry)
1706{
793c20e9 1707 if (qp->tx_index == qp->remote_rx_info->entry) {
fce8a7bb
JM
1708 qp->tx_ring_full++;
1709 return -EAGAIN;
1710 }
1711
ef114ed5 1712 if (entry->len > qp->tx_max_frame - sizeof(struct ntb_payload_header)) {
fce8a7bb 1713 if (qp->tx_handler)
179f912a 1714 qp->tx_handler(qp, qp->cb_data, NULL, -EIO);
fce8a7bb
JM
1715
1716 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
1717 &qp->tx_free_q);
1718 return 0;
1719 }
1720
282a2fee 1721 ntb_async_tx(qp, entry);
fce8a7bb 1722
793c20e9
JM
1723 qp->tx_index++;
1724 qp->tx_index %= qp->tx_max_entry;
fce8a7bb
JM
1725
1726 qp->tx_pkts++;
1727
1728 return 0;
1729}
1730
1731static void ntb_send_link_down(struct ntb_transport_qp *qp)
1732{
e26a5843 1733 struct pci_dev *pdev = qp->ndev->pdev;
fce8a7bb
JM
1734 struct ntb_queue_entry *entry;
1735 int i, rc;
1736
e26a5843 1737 if (!qp->link_is_up)
fce8a7bb
JM
1738 return;
1739
e22e0b9d 1740 dev_info(&pdev->dev, "qp %d: Send Link Down\n", qp->qp_num);
fce8a7bb
JM
1741
1742 for (i = 0; i < NTB_LINK_DOWN_TIMEOUT; i++) {
f766755c 1743 entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
fce8a7bb
JM
1744 if (entry)
1745 break;
1746 msleep(100);
1747 }
1748
1749 if (!entry)
1750 return;
1751
1752 entry->cb_data = NULL;
1753 entry->buf = NULL;
1754 entry->len = 0;
1755 entry->flags = LINK_DOWN_FLAG;
1756
1757 rc = ntb_process_tx(qp, entry);
1758 if (rc)
1759 dev_err(&pdev->dev, "ntb: QP%d unable to send linkdown msg\n",
1760 qp->qp_num);
2849b5d7
AH
1761
1762 ntb_qp_link_down_reset(qp);
fce8a7bb
JM
1763}
1764
1199aa61
AH
1765static bool ntb_dma_filter_fn(struct dma_chan *chan, void *node)
1766{
1767 return dev_to_node(&chan->dev->device) == (int)(unsigned long)node;
1768}
1769
fce8a7bb
JM
1770/**
1771 * ntb_transport_create_queue - Create a new NTB transport layer queue
1772 * @rx_handler: receive callback function
1773 * @tx_handler: transmit callback function
1774 * @event_handler: event callback function
1775 *
1776 * Create a new NTB transport layer queue and provide the queue with a callback
1777 * routine for both transmit and receive. The receive callback routine will be
1778 * used to pass up data when the transport has received it on the queue. The
1779 * transmit callback routine will be called when the transport has completed the
1780 * transmission of the data on the queue and the data is ready to be freed.
1781 *
1782 * RETURNS: pointer to newly created ntb_queue, NULL on error.
1783 */
1784struct ntb_transport_qp *
e26a5843 1785ntb_transport_create_queue(void *data, struct device *client_dev,
fce8a7bb
JM
1786 const struct ntb_queue_handlers *handlers)
1787{
e26a5843
AH
1788 struct ntb_dev *ndev;
1789 struct pci_dev *pdev;
1790 struct ntb_transport_ctx *nt;
fce8a7bb
JM
1791 struct ntb_queue_entry *entry;
1792 struct ntb_transport_qp *qp;
e26a5843 1793 u64 qp_bit;
fce8a7bb 1794 unsigned int free_queue;
1199aa61
AH
1795 dma_cap_mask_t dma_mask;
1796 int node;
e26a5843 1797 int i;
fce8a7bb 1798
e26a5843
AH
1799 ndev = dev_ntb(client_dev->parent);
1800 pdev = ndev->pdev;
1801 nt = ndev->ctx;
fce8a7bb 1802
1199aa61
AH
1803 node = dev_to_node(&ndev->dev);
1804
8fcd0950 1805 free_queue = ffs(nt->qp_bitmap_free);
fce8a7bb
JM
1806 if (!free_queue)
1807 goto err;
1808
1809 /* decrement free_queue to make it zero based */
1810 free_queue--;
1811
e26a5843
AH
1812 qp = &nt->qp_vec[free_queue];
1813 qp_bit = BIT_ULL(qp->qp_num);
1814
1815 nt->qp_bitmap_free &= ~qp_bit;
fce8a7bb 1816
fce8a7bb
JM
1817 qp->cb_data = data;
1818 qp->rx_handler = handlers->rx_handler;
1819 qp->tx_handler = handlers->tx_handler;
1820 qp->event_handler = handlers->event_handler;
1821
1199aa61
AH
1822 dma_cap_zero(dma_mask);
1823 dma_cap_set(DMA_MEMCPY, dma_mask);
1824
a41ef053 1825 if (use_dma) {
569410ca
DJ
1826 qp->tx_dma_chan =
1827 dma_request_channel(dma_mask, ntb_dma_filter_fn,
1828 (void *)(unsigned long)node);
1829 if (!qp->tx_dma_chan)
1830 dev_info(&pdev->dev, "Unable to allocate TX DMA channel\n");
1831
1832 qp->rx_dma_chan =
1833 dma_request_channel(dma_mask, ntb_dma_filter_fn,
1834 (void *)(unsigned long)node);
1835 if (!qp->rx_dma_chan)
1836 dev_info(&pdev->dev, "Unable to allocate RX DMA channel\n");
a41ef053 1837 } else {
569410ca
DJ
1838 qp->tx_dma_chan = NULL;
1839 qp->rx_dma_chan = NULL;
a41ef053 1840 }
569410ca
DJ
1841
1842 dev_dbg(&pdev->dev, "Using %s memcpy for TX\n",
1843 qp->tx_dma_chan ? "DMA" : "CPU");
1844
1845 dev_dbg(&pdev->dev, "Using %s memcpy for RX\n",
1846 qp->rx_dma_chan ? "DMA" : "CPU");
282a2fee 1847
fce8a7bb 1848 for (i = 0; i < NTB_QP_DEF_NUM_ENTRIES; i++) {
1199aa61 1849 entry = kzalloc_node(sizeof(*entry), GFP_ATOMIC, node);
fce8a7bb
JM
1850 if (!entry)
1851 goto err1;
1852
282a2fee 1853 entry->qp = qp;
da2e5ae5 1854 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry,
f766755c 1855 &qp->rx_free_q);
fce8a7bb 1856 }
a754a8fc 1857 qp->rx_alloc_entry = NTB_QP_DEF_NUM_ENTRIES;
fce8a7bb 1858
a754a8fc 1859 for (i = 0; i < qp->tx_max_entry; i++) {
1199aa61 1860 entry = kzalloc_node(sizeof(*entry), GFP_ATOMIC, node);
fce8a7bb
JM
1861 if (!entry)
1862 goto err2;
1863
282a2fee 1864 entry->qp = qp;
fce8a7bb 1865 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
f766755c 1866 &qp->tx_free_q);
fce8a7bb
JM
1867 }
1868
e26a5843
AH
1869 ntb_db_clear(qp->ndev, qp_bit);
1870 ntb_db_clear_mask(qp->ndev, qp_bit);
fce8a7bb
JM
1871
1872 dev_info(&pdev->dev, "NTB Transport QP %d created\n", qp->qp_num);
1873
1874 return qp;
1875
fce8a7bb 1876err2:
f766755c 1877 while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
fce8a7bb
JM
1878 kfree(entry);
1879err1:
a754a8fc 1880 qp->rx_alloc_entry = 0;
da2e5ae5 1881 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
fce8a7bb 1882 kfree(entry);
569410ca
DJ
1883 if (qp->tx_dma_chan)
1884 dma_release_channel(qp->tx_dma_chan);
1885 if (qp->rx_dma_chan)
1886 dma_release_channel(qp->rx_dma_chan);
e26a5843 1887 nt->qp_bitmap_free |= qp_bit;
fce8a7bb
JM
1888err:
1889 return NULL;
1890}
1891EXPORT_SYMBOL_GPL(ntb_transport_create_queue);
1892
1893/**
1894 * ntb_transport_free_queue - Frees NTB transport queue
1895 * @qp: NTB queue to be freed
1896 *
1897 * Frees NTB transport queue
1898 */
1899void ntb_transport_free_queue(struct ntb_transport_qp *qp)
1900{
186f27ff 1901 struct pci_dev *pdev;
fce8a7bb 1902 struct ntb_queue_entry *entry;
e26a5843 1903 u64 qp_bit;
fce8a7bb
JM
1904
1905 if (!qp)
1906 return;
1907
e26a5843 1908 pdev = qp->ndev->pdev;
186f27ff 1909
e9021331
DJ
1910 qp->active = false;
1911
569410ca
DJ
1912 if (qp->tx_dma_chan) {
1913 struct dma_chan *chan = qp->tx_dma_chan;
1914 /* Putting the dma_chan to NULL will force any new traffic to be
1915 * processed by the CPU instead of the DAM engine
1916 */
1917 qp->tx_dma_chan = NULL;
1918
1919 /* Try to be nice and wait for any queued DMA engine
1920 * transactions to process before smashing it with a rock
1921 */
1922 dma_sync_wait(chan, qp->last_cookie);
1923 dmaengine_terminate_all(chan);
1924 dma_release_channel(chan);
1925 }
1926
1927 if (qp->rx_dma_chan) {
1928 struct dma_chan *chan = qp->rx_dma_chan;
282a2fee
JM
1929 /* Putting the dma_chan to NULL will force any new traffic to be
1930 * processed by the CPU instead of the DAM engine
1931 */
569410ca 1932 qp->rx_dma_chan = NULL;
282a2fee
JM
1933
1934 /* Try to be nice and wait for any queued DMA engine
1935 * transactions to process before smashing it with a rock
1936 */
1937 dma_sync_wait(chan, qp->last_cookie);
1938 dmaengine_terminate_all(chan);
1199aa61 1939 dma_release_channel(chan);
282a2fee 1940 }
fce8a7bb 1941
e26a5843
AH
1942 qp_bit = BIT_ULL(qp->qp_num);
1943
1944 ntb_db_set_mask(qp->ndev, qp_bit);
e9021331 1945 tasklet_kill(&qp->rxc_db_work);
fce8a7bb 1946
282a2fee
JM
1947 cancel_delayed_work_sync(&qp->link_work);
1948
e26a5843
AH
1949 qp->cb_data = NULL;
1950 qp->rx_handler = NULL;
1951 qp->tx_handler = NULL;
1952 qp->event_handler = NULL;
1953
da2e5ae5 1954 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q)))
fce8a7bb
JM
1955 kfree(entry);
1956
da2e5ae5
AH
1957 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q))) {
1958 dev_warn(&pdev->dev, "Freeing item from non-empty rx_pend_q\n");
1959 kfree(entry);
1960 }
1961
1962 while ((entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_post_q))) {
1963 dev_warn(&pdev->dev, "Freeing item from non-empty rx_post_q\n");
fce8a7bb
JM
1964 kfree(entry);
1965 }
1966
f766755c 1967 while ((entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q)))
fce8a7bb
JM
1968 kfree(entry);
1969
30a4bb1e 1970 qp->transport->qp_bitmap_free |= qp_bit;
fce8a7bb
JM
1971
1972 dev_info(&pdev->dev, "NTB Transport QP %d freed\n", qp->qp_num);
1973}
1974EXPORT_SYMBOL_GPL(ntb_transport_free_queue);
1975
1976/**
1977 * ntb_transport_rx_remove - Dequeues enqueued rx packet
1978 * @qp: NTB queue to be freed
1979 * @len: pointer to variable to write enqueued buffers length
1980 *
1981 * Dequeues unused buffers from receive queue. Should only be used during
1982 * shutdown of qp.
1983 *
1984 * RETURNS: NULL error value on error, or void* for success.
1985 */
1986void *ntb_transport_rx_remove(struct ntb_transport_qp *qp, unsigned int *len)
1987{
1988 struct ntb_queue_entry *entry;
1989 void *buf;
1990
e26a5843 1991 if (!qp || qp->client_ready)
fce8a7bb
JM
1992 return NULL;
1993
da2e5ae5 1994 entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_pend_q);
fce8a7bb
JM
1995 if (!entry)
1996 return NULL;
1997
1998 buf = entry->cb_data;
1999 *len = entry->len;
2000
da2e5ae5 2001 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_free_q);
fce8a7bb
JM
2002
2003 return buf;
2004}
2005EXPORT_SYMBOL_GPL(ntb_transport_rx_remove);
2006
2007/**
2008 * ntb_transport_rx_enqueue - Enqueue a new NTB queue entry
2009 * @qp: NTB transport layer queue the entry is to be enqueued on
2010 * @cb: per buffer pointer for callback function to use
2011 * @data: pointer to data buffer that incoming packets will be copied into
2012 * @len: length of the data buffer
2013 *
2014 * Enqueue a new receive buffer onto the transport queue into which a NTB
2015 * payload can be received into.
2016 *
2017 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
2018 */
2019int ntb_transport_rx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
2020 unsigned int len)
2021{
2022 struct ntb_queue_entry *entry;
2023
2024 if (!qp)
2025 return -EINVAL;
2026
da2e5ae5 2027 entry = ntb_list_rm(&qp->ntb_rx_q_lock, &qp->rx_free_q);
fce8a7bb
JM
2028 if (!entry)
2029 return -ENOMEM;
2030
2031 entry->cb_data = cb;
2032 entry->buf = data;
2033 entry->len = len;
da2e5ae5 2034 entry->flags = 0;
72203572
DJ
2035 entry->retries = 0;
2036 entry->errors = 0;
2037 entry->rx_index = 0;
da2e5ae5
AH
2038
2039 ntb_list_add(&qp->ntb_rx_q_lock, &entry->entry, &qp->rx_pend_q);
fce8a7bb 2040
e9021331
DJ
2041 if (qp->active)
2042 tasklet_schedule(&qp->rxc_db_work);
fce8a7bb
JM
2043
2044 return 0;
2045}
2046EXPORT_SYMBOL_GPL(ntb_transport_rx_enqueue);
2047
2048/**
2049 * ntb_transport_tx_enqueue - Enqueue a new NTB queue entry
2050 * @qp: NTB transport layer queue the entry is to be enqueued on
2051 * @cb: per buffer pointer for callback function to use
2052 * @data: pointer to data buffer that will be sent
2053 * @len: length of the data buffer
2054 *
2055 * Enqueue a new transmit buffer onto the transport queue from which a NTB
f9a2cf89 2056 * payload will be transmitted. This assumes that a lock is being held to
fce8a7bb
JM
2057 * serialize access to the qp.
2058 *
2059 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
2060 */
2061int ntb_transport_tx_enqueue(struct ntb_transport_qp *qp, void *cb, void *data,
2062 unsigned int len)
2063{
2064 struct ntb_queue_entry *entry;
2065 int rc;
2066
e26a5843 2067 if (!qp || !qp->link_is_up || !len)
fce8a7bb
JM
2068 return -EINVAL;
2069
2070 entry = ntb_list_rm(&qp->ntb_tx_free_q_lock, &qp->tx_free_q);
282a2fee
JM
2071 if (!entry) {
2072 qp->tx_err_no_buf++;
e74bfeed 2073 return -EBUSY;
282a2fee 2074 }
fce8a7bb
JM
2075
2076 entry->cb_data = cb;
2077 entry->buf = data;
2078 entry->len = len;
2079 entry->flags = 0;
9cabc269
DJ
2080 entry->errors = 0;
2081 entry->retries = 0;
2082 entry->tx_index = 0;
fce8a7bb
JM
2083
2084 rc = ntb_process_tx(qp, entry);
2085 if (rc)
2086 ntb_list_add(&qp->ntb_tx_free_q_lock, &entry->entry,
2087 &qp->tx_free_q);
2088
2089 return rc;
2090}
2091EXPORT_SYMBOL_GPL(ntb_transport_tx_enqueue);
2092
2093/**
2094 * ntb_transport_link_up - Notify NTB transport of client readiness to use queue
2095 * @qp: NTB transport layer queue to be enabled
2096 *
2097 * Notify NTB transport layer of client readiness to use queue
2098 */
2099void ntb_transport_link_up(struct ntb_transport_qp *qp)
2100{
2101 if (!qp)
2102 return;
2103
e26a5843 2104 qp->client_ready = true;
fce8a7bb 2105
e26a5843 2106 if (qp->transport->link_is_up)
fce8a7bb
JM
2107 schedule_delayed_work(&qp->link_work, 0);
2108}
2109EXPORT_SYMBOL_GPL(ntb_transport_link_up);
2110
2111/**
2112 * ntb_transport_link_down - Notify NTB transport to no longer enqueue data
2113 * @qp: NTB transport layer queue to be disabled
2114 *
2115 * Notify NTB transport layer of client's desire to no longer receive data on
2116 * transport queue specified. It is the client's responsibility to ensure all
f9a2cf89 2117 * entries on queue are purged or otherwise handled appropriately.
fce8a7bb
JM
2118 */
2119void ntb_transport_link_down(struct ntb_transport_qp *qp)
2120{
e26a5843 2121 int val;
fce8a7bb
JM
2122
2123 if (!qp)
2124 return;
2125
e26a5843 2126 qp->client_ready = false;
fce8a7bb 2127
e26a5843 2128 val = ntb_spad_read(qp->ndev, QP_LINKS);
fce8a7bb 2129
e26a5843
AH
2130 ntb_peer_spad_write(qp->ndev, QP_LINKS,
2131 val & ~BIT(qp->qp_num));
fce8a7bb 2132
e26a5843 2133 if (qp->link_is_up)
fce8a7bb
JM
2134 ntb_send_link_down(qp);
2135 else
2136 cancel_delayed_work_sync(&qp->link_work);
2137}
2138EXPORT_SYMBOL_GPL(ntb_transport_link_down);
2139
2140/**
2141 * ntb_transport_link_query - Query transport link state
2142 * @qp: NTB transport layer queue to be queried
2143 *
2144 * Query connectivity to the remote system of the NTB transport queue
2145 *
2146 * RETURNS: true for link up or false for link down
2147 */
2148bool ntb_transport_link_query(struct ntb_transport_qp *qp)
2149{
186f27ff
JM
2150 if (!qp)
2151 return false;
2152
e26a5843 2153 return qp->link_is_up;
fce8a7bb
JM
2154}
2155EXPORT_SYMBOL_GPL(ntb_transport_link_query);
2156
2157/**
2158 * ntb_transport_qp_num - Query the qp number
2159 * @qp: NTB transport layer queue to be queried
2160 *
2161 * Query qp number of the NTB transport queue
2162 *
2163 * RETURNS: a zero based number specifying the qp number
2164 */
2165unsigned char ntb_transport_qp_num(struct ntb_transport_qp *qp)
2166{
186f27ff
JM
2167 if (!qp)
2168 return 0;
2169
fce8a7bb
JM
2170 return qp->qp_num;
2171}
2172EXPORT_SYMBOL_GPL(ntb_transport_qp_num);
2173
2174/**
2175 * ntb_transport_max_size - Query the max payload size of a qp
2176 * @qp: NTB transport layer queue to be queried
2177 *
2178 * Query the maximum payload size permissible on the given qp
2179 *
2180 * RETURNS: the max payload size of a qp
2181 */
ef114ed5 2182unsigned int ntb_transport_max_size(struct ntb_transport_qp *qp)
fce8a7bb 2183{
04afde45 2184 unsigned int max_size;
569410ca 2185 unsigned int copy_align;
04afde45 2186 struct dma_chan *rx_chan, *tx_chan;
282a2fee 2187
186f27ff
JM
2188 if (!qp)
2189 return 0;
2190
04afde45
DJ
2191 rx_chan = qp->rx_dma_chan;
2192 tx_chan = qp->tx_dma_chan;
282a2fee 2193
04afde45
DJ
2194 copy_align = max(rx_chan ? rx_chan->device->copy_align : 0,
2195 tx_chan ? tx_chan->device->copy_align : 0);
569410ca 2196
282a2fee 2197 /* If DMA engine usage is possible, try to find the max size for that */
04afde45
DJ
2198 max_size = qp->tx_max_frame - sizeof(struct ntb_payload_header);
2199 max_size = round_down(max_size, 1 << copy_align);
282a2fee 2200
04afde45 2201 return max_size;
fce8a7bb
JM
2202}
2203EXPORT_SYMBOL_GPL(ntb_transport_max_size);
e26a5843 2204
e74bfeed
DJ
2205unsigned int ntb_transport_tx_free_entry(struct ntb_transport_qp *qp)
2206{
2207 unsigned int head = qp->tx_index;
2208 unsigned int tail = qp->remote_rx_info->entry;
2209
2210 return tail > head ? tail - head : qp->tx_max_entry + tail - head;
2211}
2212EXPORT_SYMBOL_GPL(ntb_transport_tx_free_entry);
2213
e26a5843
AH
2214static void ntb_transport_doorbell_callback(void *data, int vector)
2215{
2216 struct ntb_transport_ctx *nt = data;
2217 struct ntb_transport_qp *qp;
2218 u64 db_bits;
2219 unsigned int qp_num;
2220
2221 db_bits = (nt->qp_bitmap & ~nt->qp_bitmap_free &
2222 ntb_db_vector_mask(nt->ndev, vector));
2223
2224 while (db_bits) {
2225 qp_num = __ffs(db_bits);
2226 qp = &nt->qp_vec[qp_num];
2227
e9021331
DJ
2228 if (qp->active)
2229 tasklet_schedule(&qp->rxc_db_work);
e26a5843
AH
2230
2231 db_bits &= ~BIT_ULL(qp_num);
2232 }
2233}
2234
2235static const struct ntb_ctx_ops ntb_transport_ops = {
2236 .link_event = ntb_transport_event_callback,
2237 .db_event = ntb_transport_doorbell_callback,
2238};
2239
2240static struct ntb_client ntb_transport_client = {
2241 .ops = {
2242 .probe = ntb_transport_probe,
2243 .remove = ntb_transport_free,
2244 },
2245};
2246
2247static int __init ntb_transport_init(void)
2248{
2249 int rc;
2250
7eb38781
DJ
2251 pr_info("%s, version %s\n", NTB_TRANSPORT_DESC, NTB_TRANSPORT_VER);
2252
e26a5843
AH
2253 if (debugfs_initialized())
2254 nt_debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL);
2255
2256 rc = bus_register(&ntb_transport_bus);
2257 if (rc)
2258 goto err_bus;
2259
2260 rc = ntb_register_client(&ntb_transport_client);
2261 if (rc)
2262 goto err_client;
2263
2264 return 0;
2265
2266err_client:
2267 bus_unregister(&ntb_transport_bus);
2268err_bus:
2269 debugfs_remove_recursive(nt_debugfs_dir);
2270 return rc;
2271}
2272module_init(ntb_transport_init);
2273
2274static void __exit ntb_transport_exit(void)
2275{
e26a5843
AH
2276 ntb_unregister_client(&ntb_transport_client);
2277 bus_unregister(&ntb_transport_bus);
dd62245e 2278 debugfs_remove_recursive(nt_debugfs_dir);
e26a5843
AH
2279}
2280module_exit(ntb_transport_exit);