]>
Commit | Line | Data |
---|---|---|
45def22c DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
62232e45 | 14 | #include <linux/vmalloc.h> |
45def22c | 15 | #include <linux/uaccess.h> |
3d88002e | 16 | #include <linux/module.h> |
8c2f7e86 | 17 | #include <linux/blkdev.h> |
45def22c | 18 | #include <linux/fcntl.h> |
e6dfb2de | 19 | #include <linux/async.h> |
8c2f7e86 | 20 | #include <linux/genhd.h> |
62232e45 | 21 | #include <linux/ndctl.h> |
4d88a97a | 22 | #include <linux/sched.h> |
45def22c DW |
23 | #include <linux/slab.h> |
24 | #include <linux/fs.h> | |
25 | #include <linux/io.h> | |
62232e45 | 26 | #include <linux/mm.h> |
4d88a97a | 27 | #include <linux/nd.h> |
45def22c | 28 | #include "nd-core.h" |
4d88a97a | 29 | #include "nd.h" |
45def22c | 30 | |
62232e45 | 31 | int nvdimm_major; |
45def22c DW |
32 | static int nvdimm_bus_major; |
33 | static struct class *nd_class; | |
34 | ||
4d88a97a DW |
35 | static int to_nd_device_type(struct device *dev) |
36 | { | |
37 | if (is_nvdimm(dev)) | |
38 | return ND_DEVICE_DIMM; | |
3d88002e DW |
39 | else if (is_nd_pmem(dev)) |
40 | return ND_DEVICE_REGION_PMEM; | |
41 | else if (is_nd_blk(dev)) | |
42 | return ND_DEVICE_REGION_BLK; | |
43 | else if (is_nd_pmem(dev->parent) || is_nd_blk(dev->parent)) | |
44 | return nd_region_to_nstype(to_nd_region(dev->parent)); | |
4d88a97a DW |
45 | |
46 | return 0; | |
47 | } | |
48 | ||
49 | static int nvdimm_bus_uevent(struct device *dev, struct kobj_uevent_env *env) | |
50 | { | |
41d7a6d6 TK |
51 | /* |
52 | * Ensure that region devices always have their numa node set as | |
53 | * early as possible. | |
54 | */ | |
55 | if (is_nd_pmem(dev) || is_nd_blk(dev)) | |
56 | set_dev_node(dev, to_nd_region(dev)->numa_node); | |
4d88a97a DW |
57 | return add_uevent_var(env, "MODALIAS=" ND_DEVICE_MODALIAS_FMT, |
58 | to_nd_device_type(dev)); | |
59 | } | |
60 | ||
61 | static int nvdimm_bus_match(struct device *dev, struct device_driver *drv) | |
62 | { | |
63 | struct nd_device_driver *nd_drv = to_nd_device_driver(drv); | |
64 | ||
65 | return test_bit(to_nd_device_type(dev), &nd_drv->type); | |
66 | } | |
67 | ||
3d88002e DW |
68 | static struct module *to_bus_provider(struct device *dev) |
69 | { | |
70 | /* pin bus providers while regions are enabled */ | |
71 | if (is_nd_pmem(dev) || is_nd_blk(dev)) { | |
72 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); | |
73 | ||
74 | return nvdimm_bus->module; | |
75 | } | |
76 | return NULL; | |
77 | } | |
78 | ||
eaf96153 DW |
79 | static void nvdimm_bus_probe_start(struct nvdimm_bus *nvdimm_bus) |
80 | { | |
81 | nvdimm_bus_lock(&nvdimm_bus->dev); | |
82 | nvdimm_bus->probe_active++; | |
83 | nvdimm_bus_unlock(&nvdimm_bus->dev); | |
84 | } | |
85 | ||
86 | static void nvdimm_bus_probe_end(struct nvdimm_bus *nvdimm_bus) | |
87 | { | |
88 | nvdimm_bus_lock(&nvdimm_bus->dev); | |
89 | if (--nvdimm_bus->probe_active == 0) | |
90 | wake_up(&nvdimm_bus->probe_wait); | |
91 | nvdimm_bus_unlock(&nvdimm_bus->dev); | |
92 | } | |
93 | ||
4d88a97a DW |
94 | static int nvdimm_bus_probe(struct device *dev) |
95 | { | |
96 | struct nd_device_driver *nd_drv = to_nd_device_driver(dev->driver); | |
3d88002e | 97 | struct module *provider = to_bus_provider(dev); |
4d88a97a DW |
98 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); |
99 | int rc; | |
100 | ||
3d88002e DW |
101 | if (!try_module_get(provider)) |
102 | return -ENXIO; | |
103 | ||
eaf96153 | 104 | nvdimm_bus_probe_start(nvdimm_bus); |
4d88a97a | 105 | rc = nd_drv->probe(dev); |
eaf96153 DW |
106 | if (rc == 0) |
107 | nd_region_probe_success(nvdimm_bus, dev); | |
bf9bccc1 DW |
108 | else |
109 | nd_region_disable(nvdimm_bus, dev); | |
eaf96153 DW |
110 | nvdimm_bus_probe_end(nvdimm_bus); |
111 | ||
4d88a97a DW |
112 | dev_dbg(&nvdimm_bus->dev, "%s.probe(%s) = %d\n", dev->driver->name, |
113 | dev_name(dev), rc); | |
8c2f7e86 | 114 | |
3d88002e DW |
115 | if (rc != 0) |
116 | module_put(provider); | |
4d88a97a DW |
117 | return rc; |
118 | } | |
119 | ||
120 | static int nvdimm_bus_remove(struct device *dev) | |
121 | { | |
122 | struct nd_device_driver *nd_drv = to_nd_device_driver(dev->driver); | |
3d88002e | 123 | struct module *provider = to_bus_provider(dev); |
4d88a97a DW |
124 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); |
125 | int rc; | |
126 | ||
127 | rc = nd_drv->remove(dev); | |
eaf96153 DW |
128 | nd_region_disable(nvdimm_bus, dev); |
129 | ||
4d88a97a DW |
130 | dev_dbg(&nvdimm_bus->dev, "%s.remove(%s) = %d\n", dev->driver->name, |
131 | dev_name(dev), rc); | |
3d88002e | 132 | module_put(provider); |
4d88a97a DW |
133 | return rc; |
134 | } | |
135 | ||
136 | static struct bus_type nvdimm_bus_type = { | |
e6dfb2de | 137 | .name = "nd", |
4d88a97a DW |
138 | .uevent = nvdimm_bus_uevent, |
139 | .match = nvdimm_bus_match, | |
140 | .probe = nvdimm_bus_probe, | |
141 | .remove = nvdimm_bus_remove, | |
142 | }; | |
143 | ||
144 | static ASYNC_DOMAIN_EXCLUSIVE(nd_async_domain); | |
145 | ||
146 | void nd_synchronize(void) | |
147 | { | |
148 | async_synchronize_full_domain(&nd_async_domain); | |
149 | } | |
150 | EXPORT_SYMBOL_GPL(nd_synchronize); | |
151 | ||
152 | static void nd_async_device_register(void *d, async_cookie_t cookie) | |
153 | { | |
154 | struct device *dev = d; | |
155 | ||
156 | if (device_add(dev) != 0) { | |
157 | dev_err(dev, "%s: failed\n", __func__); | |
158 | put_device(dev); | |
159 | } | |
160 | put_device(dev); | |
161 | } | |
162 | ||
163 | static void nd_async_device_unregister(void *d, async_cookie_t cookie) | |
164 | { | |
165 | struct device *dev = d; | |
166 | ||
0ba1c634 DW |
167 | /* flush bus operations before delete */ |
168 | nvdimm_bus_lock(dev); | |
169 | nvdimm_bus_unlock(dev); | |
170 | ||
4d88a97a DW |
171 | device_unregister(dev); |
172 | put_device(dev); | |
173 | } | |
174 | ||
8c2f7e86 | 175 | void __nd_device_register(struct device *dev) |
4d88a97a DW |
176 | { |
177 | dev->bus = &nvdimm_bus_type; | |
4d88a97a DW |
178 | get_device(dev); |
179 | async_schedule_domain(nd_async_device_register, dev, | |
180 | &nd_async_domain); | |
181 | } | |
8c2f7e86 DW |
182 | |
183 | void nd_device_register(struct device *dev) | |
184 | { | |
185 | device_initialize(dev); | |
186 | __nd_device_register(dev); | |
187 | } | |
4d88a97a DW |
188 | EXPORT_SYMBOL(nd_device_register); |
189 | ||
190 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode) | |
191 | { | |
192 | switch (mode) { | |
193 | case ND_ASYNC: | |
194 | get_device(dev); | |
195 | async_schedule_domain(nd_async_device_unregister, dev, | |
196 | &nd_async_domain); | |
197 | break; | |
198 | case ND_SYNC: | |
199 | nd_synchronize(); | |
200 | device_unregister(dev); | |
201 | break; | |
202 | } | |
203 | } | |
204 | EXPORT_SYMBOL(nd_device_unregister); | |
205 | ||
206 | /** | |
207 | * __nd_driver_register() - register a region or a namespace driver | |
208 | * @nd_drv: driver to register | |
209 | * @owner: automatically set by nd_driver_register() macro | |
210 | * @mod_name: automatically set by nd_driver_register() macro | |
211 | */ | |
212 | int __nd_driver_register(struct nd_device_driver *nd_drv, struct module *owner, | |
213 | const char *mod_name) | |
214 | { | |
215 | struct device_driver *drv = &nd_drv->drv; | |
216 | ||
217 | if (!nd_drv->type) { | |
218 | pr_debug("driver type bitmask not set (%pf)\n", | |
219 | __builtin_return_address(0)); | |
220 | return -EINVAL; | |
221 | } | |
222 | ||
223 | if (!nd_drv->probe || !nd_drv->remove) { | |
224 | pr_debug("->probe() and ->remove() must be specified\n"); | |
225 | return -EINVAL; | |
226 | } | |
227 | ||
228 | drv->bus = &nvdimm_bus_type; | |
229 | drv->owner = owner; | |
230 | drv->mod_name = mod_name; | |
231 | ||
232 | return driver_register(drv); | |
233 | } | |
234 | EXPORT_SYMBOL(__nd_driver_register); | |
235 | ||
58138820 DW |
236 | int nvdimm_revalidate_disk(struct gendisk *disk) |
237 | { | |
238 | struct device *dev = disk->driverfs_dev; | |
239 | struct nd_region *nd_region = to_nd_region(dev->parent); | |
240 | const char *pol = nd_region->ro ? "only" : "write"; | |
241 | ||
242 | if (nd_region->ro == get_disk_ro(disk)) | |
243 | return 0; | |
244 | ||
245 | dev_info(dev, "%s read-%s, marking %s read-%s\n", | |
246 | dev_name(&nd_region->dev), pol, disk->disk_name, pol); | |
247 | set_disk_ro(disk, nd_region->ro); | |
248 | ||
249 | return 0; | |
250 | ||
251 | } | |
252 | EXPORT_SYMBOL(nvdimm_revalidate_disk); | |
253 | ||
4d88a97a DW |
254 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, |
255 | char *buf) | |
256 | { | |
257 | return sprintf(buf, ND_DEVICE_MODALIAS_FMT "\n", | |
258 | to_nd_device_type(dev)); | |
259 | } | |
260 | static DEVICE_ATTR_RO(modalias); | |
261 | ||
262 | static ssize_t devtype_show(struct device *dev, struct device_attribute *attr, | |
263 | char *buf) | |
264 | { | |
265 | return sprintf(buf, "%s\n", dev->type->name); | |
266 | } | |
267 | static DEVICE_ATTR_RO(devtype); | |
268 | ||
269 | static struct attribute *nd_device_attributes[] = { | |
270 | &dev_attr_modalias.attr, | |
271 | &dev_attr_devtype.attr, | |
272 | NULL, | |
273 | }; | |
274 | ||
275 | /** | |
276 | * nd_device_attribute_group - generic attributes for all devices on an nd bus | |
277 | */ | |
278 | struct attribute_group nd_device_attribute_group = { | |
279 | .attrs = nd_device_attributes, | |
e6dfb2de | 280 | }; |
4d88a97a | 281 | EXPORT_SYMBOL_GPL(nd_device_attribute_group); |
e6dfb2de | 282 | |
45def22c DW |
283 | int nvdimm_bus_create_ndctl(struct nvdimm_bus *nvdimm_bus) |
284 | { | |
285 | dev_t devt = MKDEV(nvdimm_bus_major, nvdimm_bus->id); | |
286 | struct device *dev; | |
287 | ||
288 | dev = device_create(nd_class, &nvdimm_bus->dev, devt, nvdimm_bus, | |
289 | "ndctl%d", nvdimm_bus->id); | |
290 | ||
291 | if (IS_ERR(dev)) { | |
292 | dev_dbg(&nvdimm_bus->dev, "failed to register ndctl%d: %ld\n", | |
293 | nvdimm_bus->id, PTR_ERR(dev)); | |
294 | return PTR_ERR(dev); | |
295 | } | |
296 | return 0; | |
297 | } | |
298 | ||
299 | void nvdimm_bus_destroy_ndctl(struct nvdimm_bus *nvdimm_bus) | |
300 | { | |
301 | device_destroy(nd_class, MKDEV(nvdimm_bus_major, nvdimm_bus->id)); | |
302 | } | |
303 | ||
62232e45 DW |
304 | static const struct nd_cmd_desc __nd_cmd_dimm_descs[] = { |
305 | [ND_CMD_IMPLEMENTED] = { }, | |
306 | [ND_CMD_SMART] = { | |
307 | .out_num = 2, | |
308 | .out_sizes = { 4, 8, }, | |
309 | }, | |
310 | [ND_CMD_SMART_THRESHOLD] = { | |
311 | .out_num = 2, | |
312 | .out_sizes = { 4, 8, }, | |
313 | }, | |
314 | [ND_CMD_DIMM_FLAGS] = { | |
315 | .out_num = 2, | |
316 | .out_sizes = { 4, 4 }, | |
317 | }, | |
318 | [ND_CMD_GET_CONFIG_SIZE] = { | |
319 | .out_num = 3, | |
320 | .out_sizes = { 4, 4, 4, }, | |
321 | }, | |
322 | [ND_CMD_GET_CONFIG_DATA] = { | |
323 | .in_num = 2, | |
324 | .in_sizes = { 4, 4, }, | |
325 | .out_num = 2, | |
326 | .out_sizes = { 4, UINT_MAX, }, | |
327 | }, | |
328 | [ND_CMD_SET_CONFIG_DATA] = { | |
329 | .in_num = 3, | |
330 | .in_sizes = { 4, 4, UINT_MAX, }, | |
331 | .out_num = 1, | |
332 | .out_sizes = { 4, }, | |
333 | }, | |
334 | [ND_CMD_VENDOR] = { | |
335 | .in_num = 3, | |
336 | .in_sizes = { 4, 4, UINT_MAX, }, | |
337 | .out_num = 3, | |
338 | .out_sizes = { 4, 4, UINT_MAX, }, | |
339 | }, | |
340 | }; | |
341 | ||
342 | const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd) | |
343 | { | |
344 | if (cmd < ARRAY_SIZE(__nd_cmd_dimm_descs)) | |
345 | return &__nd_cmd_dimm_descs[cmd]; | |
346 | return NULL; | |
347 | } | |
348 | EXPORT_SYMBOL_GPL(nd_cmd_dimm_desc); | |
349 | ||
350 | static const struct nd_cmd_desc __nd_cmd_bus_descs[] = { | |
351 | [ND_CMD_IMPLEMENTED] = { }, | |
352 | [ND_CMD_ARS_CAP] = { | |
353 | .in_num = 2, | |
354 | .in_sizes = { 8, 8, }, | |
355 | .out_num = 2, | |
356 | .out_sizes = { 4, 4, }, | |
357 | }, | |
358 | [ND_CMD_ARS_START] = { | |
359 | .in_num = 4, | |
360 | .in_sizes = { 8, 8, 2, 6, }, | |
361 | .out_num = 1, | |
362 | .out_sizes = { 4, }, | |
363 | }, | |
364 | [ND_CMD_ARS_STATUS] = { | |
365 | .out_num = 2, | |
366 | .out_sizes = { 4, UINT_MAX, }, | |
367 | }, | |
368 | }; | |
369 | ||
370 | const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd) | |
371 | { | |
372 | if (cmd < ARRAY_SIZE(__nd_cmd_bus_descs)) | |
373 | return &__nd_cmd_bus_descs[cmd]; | |
374 | return NULL; | |
375 | } | |
376 | EXPORT_SYMBOL_GPL(nd_cmd_bus_desc); | |
377 | ||
378 | u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, | |
379 | const struct nd_cmd_desc *desc, int idx, void *buf) | |
380 | { | |
381 | if (idx >= desc->in_num) | |
382 | return UINT_MAX; | |
383 | ||
384 | if (desc->in_sizes[idx] < UINT_MAX) | |
385 | return desc->in_sizes[idx]; | |
386 | ||
387 | if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA && idx == 2) { | |
388 | struct nd_cmd_set_config_hdr *hdr = buf; | |
389 | ||
390 | return hdr->in_length; | |
391 | } else if (nvdimm && cmd == ND_CMD_VENDOR && idx == 2) { | |
392 | struct nd_cmd_vendor_hdr *hdr = buf; | |
393 | ||
394 | return hdr->in_length; | |
395 | } | |
396 | ||
397 | return UINT_MAX; | |
398 | } | |
399 | EXPORT_SYMBOL_GPL(nd_cmd_in_size); | |
400 | ||
401 | u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, | |
402 | const struct nd_cmd_desc *desc, int idx, const u32 *in_field, | |
403 | const u32 *out_field) | |
404 | { | |
405 | if (idx >= desc->out_num) | |
406 | return UINT_MAX; | |
407 | ||
408 | if (desc->out_sizes[idx] < UINT_MAX) | |
409 | return desc->out_sizes[idx]; | |
410 | ||
411 | if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA && idx == 1) | |
412 | return in_field[1]; | |
413 | else if (nvdimm && cmd == ND_CMD_VENDOR && idx == 2) | |
414 | return out_field[1]; | |
415 | else if (!nvdimm && cmd == ND_CMD_ARS_STATUS && idx == 1) | |
416 | return ND_CMD_ARS_STATUS_MAX; | |
417 | ||
418 | return UINT_MAX; | |
419 | } | |
420 | EXPORT_SYMBOL_GPL(nd_cmd_out_size); | |
421 | ||
bf9bccc1 | 422 | void wait_nvdimm_bus_probe_idle(struct device *dev) |
eaf96153 | 423 | { |
bf9bccc1 DW |
424 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); |
425 | ||
eaf96153 DW |
426 | do { |
427 | if (nvdimm_bus->probe_active == 0) | |
428 | break; | |
429 | nvdimm_bus_unlock(&nvdimm_bus->dev); | |
430 | wait_event(nvdimm_bus->probe_wait, | |
431 | nvdimm_bus->probe_active == 0); | |
432 | nvdimm_bus_lock(&nvdimm_bus->dev); | |
433 | } while (true); | |
434 | } | |
435 | ||
436 | /* set_config requires an idle interleave set */ | |
437 | static int nd_cmd_clear_to_send(struct nvdimm *nvdimm, unsigned int cmd) | |
438 | { | |
439 | struct nvdimm_bus *nvdimm_bus; | |
440 | ||
441 | if (!nvdimm || cmd != ND_CMD_SET_CONFIG_DATA) | |
442 | return 0; | |
443 | ||
444 | nvdimm_bus = walk_to_nvdimm_bus(&nvdimm->dev); | |
bf9bccc1 | 445 | wait_nvdimm_bus_probe_idle(&nvdimm_bus->dev); |
eaf96153 DW |
446 | |
447 | if (atomic_read(&nvdimm->busy)) | |
448 | return -EBUSY; | |
449 | return 0; | |
450 | } | |
451 | ||
62232e45 DW |
452 | static int __nd_ioctl(struct nvdimm_bus *nvdimm_bus, struct nvdimm *nvdimm, |
453 | int read_only, unsigned int ioctl_cmd, unsigned long arg) | |
454 | { | |
455 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; | |
456 | size_t buf_len = 0, in_len = 0, out_len = 0; | |
457 | static char out_env[ND_CMD_MAX_ENVELOPE]; | |
458 | static char in_env[ND_CMD_MAX_ENVELOPE]; | |
459 | const struct nd_cmd_desc *desc = NULL; | |
460 | unsigned int cmd = _IOC_NR(ioctl_cmd); | |
461 | void __user *p = (void __user *) arg; | |
462 | struct device *dev = &nvdimm_bus->dev; | |
463 | const char *cmd_name, *dimm_name; | |
464 | unsigned long dsm_mask; | |
465 | void *buf; | |
466 | int rc, i; | |
467 | ||
468 | if (nvdimm) { | |
469 | desc = nd_cmd_dimm_desc(cmd); | |
470 | cmd_name = nvdimm_cmd_name(cmd); | |
471 | dsm_mask = nvdimm->dsm_mask ? *(nvdimm->dsm_mask) : 0; | |
472 | dimm_name = dev_name(&nvdimm->dev); | |
473 | } else { | |
474 | desc = nd_cmd_bus_desc(cmd); | |
475 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
476 | dsm_mask = nd_desc->dsm_mask; | |
477 | dimm_name = "bus"; | |
478 | } | |
479 | ||
480 | if (!desc || (desc->out_num + desc->in_num == 0) || | |
481 | !test_bit(cmd, &dsm_mask)) | |
482 | return -ENOTTY; | |
483 | ||
484 | /* fail write commands (when read-only) */ | |
485 | if (read_only) | |
486 | switch (ioctl_cmd) { | |
487 | case ND_IOCTL_VENDOR: | |
488 | case ND_IOCTL_SET_CONFIG_DATA: | |
489 | case ND_IOCTL_ARS_START: | |
490 | dev_dbg(&nvdimm_bus->dev, "'%s' command while read-only.\n", | |
491 | nvdimm ? nvdimm_cmd_name(cmd) | |
492 | : nvdimm_bus_cmd_name(cmd)); | |
493 | return -EPERM; | |
494 | default: | |
495 | break; | |
496 | } | |
497 | ||
498 | /* process an input envelope */ | |
499 | for (i = 0; i < desc->in_num; i++) { | |
500 | u32 in_size, copy; | |
501 | ||
502 | in_size = nd_cmd_in_size(nvdimm, cmd, desc, i, in_env); | |
503 | if (in_size == UINT_MAX) { | |
504 | dev_err(dev, "%s:%s unknown input size cmd: %s field: %d\n", | |
505 | __func__, dimm_name, cmd_name, i); | |
506 | return -ENXIO; | |
507 | } | |
508 | if (!access_ok(VERIFY_READ, p + in_len, in_size)) | |
509 | return -EFAULT; | |
510 | if (in_len < sizeof(in_env)) | |
511 | copy = min_t(u32, sizeof(in_env) - in_len, in_size); | |
512 | else | |
513 | copy = 0; | |
514 | if (copy && copy_from_user(&in_env[in_len], p + in_len, copy)) | |
515 | return -EFAULT; | |
516 | in_len += in_size; | |
517 | } | |
518 | ||
519 | /* process an output envelope */ | |
520 | for (i = 0; i < desc->out_num; i++) { | |
521 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, | |
522 | (u32 *) in_env, (u32 *) out_env); | |
523 | u32 copy; | |
524 | ||
525 | if (out_size == UINT_MAX) { | |
526 | dev_dbg(dev, "%s:%s unknown output size cmd: %s field: %d\n", | |
527 | __func__, dimm_name, cmd_name, i); | |
528 | return -EFAULT; | |
529 | } | |
530 | if (!access_ok(VERIFY_WRITE, p + in_len + out_len, out_size)) | |
531 | return -EFAULT; | |
532 | if (out_len < sizeof(out_env)) | |
533 | copy = min_t(u32, sizeof(out_env) - out_len, out_size); | |
534 | else | |
535 | copy = 0; | |
536 | if (copy && copy_from_user(&out_env[out_len], | |
537 | p + in_len + out_len, copy)) | |
538 | return -EFAULT; | |
539 | out_len += out_size; | |
540 | } | |
541 | ||
542 | buf_len = out_len + in_len; | |
543 | if (!access_ok(VERIFY_WRITE, p, sizeof(buf_len))) | |
544 | return -EFAULT; | |
545 | ||
546 | if (buf_len > ND_IOCTL_MAX_BUFLEN) { | |
547 | dev_dbg(dev, "%s:%s cmd: %s buf_len: %zu > %d\n", __func__, | |
548 | dimm_name, cmd_name, buf_len, | |
549 | ND_IOCTL_MAX_BUFLEN); | |
550 | return -EINVAL; | |
551 | } | |
552 | ||
553 | buf = vmalloc(buf_len); | |
554 | if (!buf) | |
555 | return -ENOMEM; | |
556 | ||
557 | if (copy_from_user(buf, p, buf_len)) { | |
558 | rc = -EFAULT; | |
559 | goto out; | |
560 | } | |
561 | ||
eaf96153 DW |
562 | nvdimm_bus_lock(&nvdimm_bus->dev); |
563 | rc = nd_cmd_clear_to_send(nvdimm, cmd); | |
564 | if (rc) | |
565 | goto out_unlock; | |
566 | ||
62232e45 DW |
567 | rc = nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len); |
568 | if (rc < 0) | |
eaf96153 | 569 | goto out_unlock; |
62232e45 DW |
570 | if (copy_to_user(p, buf, buf_len)) |
571 | rc = -EFAULT; | |
eaf96153 DW |
572 | out_unlock: |
573 | nvdimm_bus_unlock(&nvdimm_bus->dev); | |
62232e45 DW |
574 | out: |
575 | vfree(buf); | |
576 | return rc; | |
577 | } | |
578 | ||
45def22c DW |
579 | static long nd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
580 | { | |
62232e45 DW |
581 | long id = (long) file->private_data; |
582 | int rc = -ENXIO, read_only; | |
583 | struct nvdimm_bus *nvdimm_bus; | |
584 | ||
585 | read_only = (O_RDWR != (file->f_flags & O_ACCMODE)); | |
586 | mutex_lock(&nvdimm_bus_list_mutex); | |
587 | list_for_each_entry(nvdimm_bus, &nvdimm_bus_list, list) { | |
588 | if (nvdimm_bus->id == id) { | |
589 | rc = __nd_ioctl(nvdimm_bus, NULL, read_only, cmd, arg); | |
590 | break; | |
591 | } | |
592 | } | |
593 | mutex_unlock(&nvdimm_bus_list_mutex); | |
594 | ||
595 | return rc; | |
596 | } | |
597 | ||
598 | static int match_dimm(struct device *dev, void *data) | |
599 | { | |
600 | long id = (long) data; | |
601 | ||
602 | if (is_nvdimm(dev)) { | |
603 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
604 | ||
605 | return nvdimm->id == id; | |
606 | } | |
607 | ||
608 | return 0; | |
609 | } | |
610 | ||
611 | static long nvdimm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
612 | { | |
613 | int rc = -ENXIO, read_only; | |
614 | struct nvdimm_bus *nvdimm_bus; | |
615 | ||
616 | read_only = (O_RDWR != (file->f_flags & O_ACCMODE)); | |
617 | mutex_lock(&nvdimm_bus_list_mutex); | |
618 | list_for_each_entry(nvdimm_bus, &nvdimm_bus_list, list) { | |
619 | struct device *dev = device_find_child(&nvdimm_bus->dev, | |
620 | file->private_data, match_dimm); | |
621 | struct nvdimm *nvdimm; | |
622 | ||
623 | if (!dev) | |
624 | continue; | |
625 | ||
626 | nvdimm = to_nvdimm(dev); | |
627 | rc = __nd_ioctl(nvdimm_bus, nvdimm, read_only, cmd, arg); | |
628 | put_device(dev); | |
629 | break; | |
630 | } | |
631 | mutex_unlock(&nvdimm_bus_list_mutex); | |
632 | ||
633 | return rc; | |
634 | } | |
635 | ||
636 | static int nd_open(struct inode *inode, struct file *file) | |
637 | { | |
638 | long minor = iminor(inode); | |
639 | ||
640 | file->private_data = (void *) minor; | |
641 | return 0; | |
45def22c DW |
642 | } |
643 | ||
644 | static const struct file_operations nvdimm_bus_fops = { | |
645 | .owner = THIS_MODULE, | |
62232e45 | 646 | .open = nd_open, |
45def22c DW |
647 | .unlocked_ioctl = nd_ioctl, |
648 | .compat_ioctl = nd_ioctl, | |
649 | .llseek = noop_llseek, | |
650 | }; | |
651 | ||
62232e45 DW |
652 | static const struct file_operations nvdimm_fops = { |
653 | .owner = THIS_MODULE, | |
654 | .open = nd_open, | |
655 | .unlocked_ioctl = nvdimm_ioctl, | |
656 | .compat_ioctl = nvdimm_ioctl, | |
657 | .llseek = noop_llseek, | |
658 | }; | |
659 | ||
45def22c DW |
660 | int __init nvdimm_bus_init(void) |
661 | { | |
662 | int rc; | |
663 | ||
e6dfb2de DW |
664 | rc = bus_register(&nvdimm_bus_type); |
665 | if (rc) | |
666 | return rc; | |
667 | ||
45def22c DW |
668 | rc = register_chrdev(0, "ndctl", &nvdimm_bus_fops); |
669 | if (rc < 0) | |
62232e45 | 670 | goto err_bus_chrdev; |
45def22c DW |
671 | nvdimm_bus_major = rc; |
672 | ||
62232e45 DW |
673 | rc = register_chrdev(0, "dimmctl", &nvdimm_fops); |
674 | if (rc < 0) | |
675 | goto err_dimm_chrdev; | |
676 | nvdimm_major = rc; | |
677 | ||
45def22c DW |
678 | nd_class = class_create(THIS_MODULE, "nd"); |
679 | if (IS_ERR(nd_class)) | |
680 | goto err_class; | |
681 | ||
682 | return 0; | |
683 | ||
684 | err_class: | |
62232e45 DW |
685 | unregister_chrdev(nvdimm_major, "dimmctl"); |
686 | err_dimm_chrdev: | |
45def22c | 687 | unregister_chrdev(nvdimm_bus_major, "ndctl"); |
62232e45 | 688 | err_bus_chrdev: |
e6dfb2de | 689 | bus_unregister(&nvdimm_bus_type); |
45def22c DW |
690 | |
691 | return rc; | |
692 | } | |
693 | ||
4d88a97a | 694 | void nvdimm_bus_exit(void) |
45def22c DW |
695 | { |
696 | class_destroy(nd_class); | |
697 | unregister_chrdev(nvdimm_bus_major, "ndctl"); | |
62232e45 | 698 | unregister_chrdev(nvdimm_major, "dimmctl"); |
e6dfb2de | 699 | bus_unregister(&nvdimm_bus_type); |
45def22c | 700 | } |