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4d88a97a DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #ifndef __ND_H__ | |
14 | #define __ND_H__ | |
1f7df6f8 | 15 | #include <linux/libnvdimm.h> |
200c79da | 16 | #include <linux/badblocks.h> |
f0dc089c | 17 | #include <linux/blkdev.h> |
4d88a97a DW |
18 | #include <linux/device.h> |
19 | #include <linux/mutex.h> | |
20 | #include <linux/ndctl.h> | |
bf9bccc1 | 21 | #include <linux/types.h> |
71999466 | 22 | #include <linux/nd.h> |
4a826c83 | 23 | #include "label.h" |
4d88a97a | 24 | |
8c2f7e86 | 25 | enum { |
5212e11f VV |
26 | /* |
27 | * Limits the maximum number of block apertures a dimm can | |
28 | * support and is an input to the geometry/on-disk-format of a | |
29 | * BTT instance | |
30 | */ | |
31 | ND_MAX_LANES = 256, | |
fcae6957 | 32 | INT_LBASIZE_ALIGNMENT = 64, |
3ae3d67b | 33 | NVDIMM_IO_ATOMIC = 1, |
8c2f7e86 DW |
34 | }; |
35 | ||
4d88a97a DW |
36 | struct nvdimm_drvdata { |
37 | struct device *dev; | |
02881768 | 38 | int nslabel_size; |
4d88a97a DW |
39 | struct nd_cmd_get_config_size nsarea; |
40 | void *data; | |
4a826c83 DW |
41 | int ns_current, ns_next; |
42 | struct resource dpa; | |
bf9bccc1 | 43 | struct kref kref; |
4d88a97a DW |
44 | }; |
45 | ||
e5ae3b25 DW |
46 | struct nd_region_data { |
47 | int ns_count; | |
48 | int ns_active; | |
595c7307 DW |
49 | unsigned int hints_shift; |
50 | void __iomem *flush_wpq[0]; | |
3d88002e DW |
51 | }; |
52 | ||
595c7307 DW |
53 | static inline void __iomem *ndrd_get_flush_wpq(struct nd_region_data *ndrd, |
54 | int dimm, int hint) | |
55 | { | |
56 | unsigned int num = 1 << ndrd->hints_shift; | |
57 | unsigned int mask = num - 1; | |
58 | ||
59 | return ndrd->flush_wpq[dimm * num + (hint & mask)]; | |
60 | } | |
61 | ||
62 | static inline void ndrd_set_flush_wpq(struct nd_region_data *ndrd, int dimm, | |
63 | int hint, void __iomem *flush) | |
64 | { | |
65 | unsigned int num = 1 << ndrd->hints_shift; | |
66 | unsigned int mask = num - 1; | |
67 | ||
68 | ndrd->flush_wpq[dimm * num + (hint & mask)] = flush; | |
69 | } | |
70 | ||
4a826c83 DW |
71 | static inline struct nd_namespace_index *to_namespace_index( |
72 | struct nvdimm_drvdata *ndd, int i) | |
73 | { | |
74 | if (i < 0) | |
75 | return NULL; | |
76 | ||
77 | return ndd->data + sizeof_namespace_index(ndd) * i; | |
78 | } | |
79 | ||
80 | static inline struct nd_namespace_index *to_current_namespace_index( | |
81 | struct nvdimm_drvdata *ndd) | |
82 | { | |
83 | return to_namespace_index(ndd, ndd->ns_current); | |
84 | } | |
85 | ||
86 | static inline struct nd_namespace_index *to_next_namespace_index( | |
87 | struct nvdimm_drvdata *ndd) | |
88 | { | |
89 | return to_namespace_index(ndd, ndd->ns_next); | |
90 | } | |
91 | ||
564e871a DW |
92 | unsigned sizeof_namespace_label(struct nvdimm_drvdata *ndd); |
93 | ||
94 | #define namespace_label_has(ndd, field) \ | |
95 | (offsetof(struct nd_namespace_label, field) \ | |
96 | < sizeof_namespace_label(ndd)) | |
97 | ||
4a826c83 DW |
98 | #define nd_dbg_dpa(r, d, res, fmt, arg...) \ |
99 | dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \ | |
100 | (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \ | |
101 | (unsigned long long) (res ? resource_size(res) : 0), \ | |
102 | (unsigned long long) (res ? res->start : 0), ##arg) | |
103 | ||
bf9bccc1 DW |
104 | #define for_each_dpa_resource(ndd, res) \ |
105 | for (res = (ndd)->dpa.child; res; res = res->sibling) | |
106 | ||
4a826c83 DW |
107 | #define for_each_dpa_resource_safe(ndd, res, next) \ |
108 | for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \ | |
109 | res; res = next, next = next ? next->sibling : NULL) | |
110 | ||
5212e11f VV |
111 | struct nd_percpu_lane { |
112 | int count; | |
113 | spinlock_t lock; | |
114 | }; | |
115 | ||
ae8219f1 DW |
116 | struct nd_label_ent { |
117 | struct list_head list; | |
118 | struct nd_namespace_label *label; | |
119 | }; | |
120 | ||
121 | enum nd_mapping_lock_class { | |
122 | ND_MAPPING_CLASS0, | |
123 | ND_MAPPING_UUID_SCAN, | |
124 | }; | |
125 | ||
44c462eb DW |
126 | struct nd_mapping { |
127 | struct nvdimm *nvdimm; | |
44c462eb DW |
128 | u64 start; |
129 | u64 size; | |
401c0a19 | 130 | int position; |
ae8219f1 DW |
131 | struct list_head labels; |
132 | struct mutex lock; | |
44c462eb DW |
133 | /* |
134 | * @ndd is for private use at region enable / disable time for | |
135 | * get_ndd() + put_ndd(), all other nd_mapping to ndd | |
136 | * conversions use to_ndd() which respects enabled state of the | |
137 | * nvdimm. | |
138 | */ | |
139 | struct nvdimm_drvdata *ndd; | |
140 | }; | |
141 | ||
1f7df6f8 DW |
142 | struct nd_region { |
143 | struct device dev; | |
1b40e09a | 144 | struct ida ns_ida; |
8c2f7e86 | 145 | struct ida btt_ida; |
e1455744 | 146 | struct ida pfn_ida; |
cd03412a | 147 | struct ida dax_ida; |
004f1afb | 148 | unsigned long flags; |
bf9bccc1 | 149 | struct device *ns_seed; |
8c2f7e86 | 150 | struct device *btt_seed; |
e1455744 | 151 | struct device *pfn_seed; |
cd03412a | 152 | struct device *dax_seed; |
1f7df6f8 DW |
153 | u16 ndr_mappings; |
154 | u64 ndr_size; | |
155 | u64 ndr_start; | |
41d7a6d6 | 156 | int id, num_lanes, ro, numa_node; |
1f7df6f8 | 157 | void *provider_data; |
975750a9 | 158 | struct kernfs_node *bb_state; |
6a6bef90 | 159 | struct badblocks bb; |
eaf96153 | 160 | struct nd_interleave_set *nd_set; |
5212e11f | 161 | struct nd_percpu_lane __percpu *lane; |
1f7df6f8 DW |
162 | struct nd_mapping mapping[0]; |
163 | }; | |
164 | ||
047fc8a1 RZ |
165 | struct nd_blk_region { |
166 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
047fc8a1 RZ |
167 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
168 | void *iobuf, u64 len, int rw); | |
169 | void *blk_provider_data; | |
170 | struct nd_region nd_region; | |
171 | }; | |
172 | ||
4a826c83 DW |
173 | /* |
174 | * Lookup next in the repeating sequence of 01, 10, and 11. | |
175 | */ | |
176 | static inline unsigned nd_inc_seq(unsigned seq) | |
177 | { | |
178 | static const unsigned next[] = { 0, 2, 3, 1 }; | |
179 | ||
180 | return next[seq & 3]; | |
181 | } | |
f524bf27 | 182 | |
5212e11f | 183 | struct btt; |
8c2f7e86 DW |
184 | struct nd_btt { |
185 | struct device dev; | |
186 | struct nd_namespace_common *ndns; | |
5212e11f | 187 | struct btt *btt; |
8c2f7e86 | 188 | unsigned long lbasize; |
abe8b4e3 | 189 | u64 size; |
8c2f7e86 DW |
190 | u8 *uuid; |
191 | int id; | |
14e49454 VV |
192 | int initial_offset; |
193 | u16 version_major; | |
194 | u16 version_minor; | |
8c2f7e86 DW |
195 | }; |
196 | ||
e1455744 DW |
197 | enum nd_pfn_mode { |
198 | PFN_MODE_NONE, | |
199 | PFN_MODE_RAM, | |
200 | PFN_MODE_PMEM, | |
201 | }; | |
202 | ||
203 | struct nd_pfn { | |
204 | int id; | |
205 | u8 *uuid; | |
206 | struct device dev; | |
315c5625 | 207 | unsigned long align; |
e1455744 DW |
208 | unsigned long npfns; |
209 | enum nd_pfn_mode mode; | |
210 | struct nd_pfn_sb *pfn_sb; | |
211 | struct nd_namespace_common *ndns; | |
212 | }; | |
213 | ||
cd03412a DW |
214 | struct nd_dax { |
215 | struct nd_pfn nd_pfn; | |
216 | }; | |
217 | ||
4d88a97a DW |
218 | enum nd_async_mode { |
219 | ND_SYNC, | |
220 | ND_ASYNC, | |
221 | }; | |
222 | ||
41cd8b70 | 223 | int nd_integrity_init(struct gendisk *disk, unsigned long meta_size); |
bf9bccc1 | 224 | void wait_nvdimm_bus_probe_idle(struct device *dev); |
4d88a97a DW |
225 | void nd_device_register(struct device *dev); |
226 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode); | |
71999466 | 227 | void nd_device_notify(struct device *dev, enum nvdimm_event event); |
bf9bccc1 DW |
228 | int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf, |
229 | size_t len); | |
b2c48f9f | 230 | ssize_t nd_size_select_show(unsigned long current_size, |
1b40e09a | 231 | const unsigned long *supported, char *buf); |
b2c48f9f DW |
232 | ssize_t nd_size_select_store(struct device *dev, const char *buf, |
233 | unsigned long *current_size, const unsigned long *supported); | |
4d88a97a | 234 | int __init nvdimm_init(void); |
3d88002e | 235 | int __init nd_region_init(void); |
b3fde74e | 236 | int __init nd_label_init(void); |
4d88a97a | 237 | void nvdimm_exit(void); |
3d88002e | 238 | void nd_region_exit(void); |
bf9bccc1 DW |
239 | struct nvdimm; |
240 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); | |
aee65987 | 241 | int nvdimm_check_config_data(struct device *dev); |
4d88a97a DW |
242 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); |
243 | int nvdimm_init_config_data(struct nvdimm_drvdata *ndd); | |
f524bf27 DW |
244 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
245 | void *buf, size_t len); | |
59e64739 DW |
246 | long nvdimm_clear_poison(struct device *dev, phys_addr_t phys, |
247 | unsigned int len); | |
42237e39 | 248 | void nvdimm_set_aliasing(struct device *dev); |
8f078b38 | 249 | void nvdimm_set_locked(struct device *dev); |
d34cb808 | 250 | void nvdimm_clear_locked(struct device *dev); |
8c2f7e86 | 251 | struct nd_btt *to_nd_btt(struct device *dev); |
e1455744 DW |
252 | |
253 | struct nd_gen_sb { | |
254 | char reserved[SZ_4K - 8]; | |
255 | __le64 checksum; | |
256 | }; | |
257 | ||
258 | u64 nd_sb_checksum(struct nd_gen_sb *sb); | |
8c2f7e86 | 259 | #if IS_ENABLED(CONFIG_BTT) |
200c79da | 260 | int nd_btt_probe(struct device *dev, struct nd_namespace_common *ndns); |
8c2f7e86 DW |
261 | bool is_nd_btt(struct device *dev); |
262 | struct device *nd_btt_create(struct nd_region *nd_region); | |
263 | #else | |
e32bc729 | 264 | static inline int nd_btt_probe(struct device *dev, |
200c79da | 265 | struct nd_namespace_common *ndns) |
8c2f7e86 DW |
266 | { |
267 | return -ENODEV; | |
268 | } | |
269 | ||
270 | static inline bool is_nd_btt(struct device *dev) | |
271 | { | |
272 | return false; | |
273 | } | |
274 | ||
275 | static inline struct device *nd_btt_create(struct nd_region *nd_region) | |
276 | { | |
277 | return NULL; | |
278 | } | |
e1455744 | 279 | #endif |
8c2f7e86 | 280 | |
e1455744 DW |
281 | struct nd_pfn *to_nd_pfn(struct device *dev); |
282 | #if IS_ENABLED(CONFIG_NVDIMM_PFN) | |
0dd69643 OH |
283 | |
284 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
285 | #define PFN_DEFAULT_ALIGNMENT HPAGE_PMD_SIZE | |
286 | #else | |
287 | #define PFN_DEFAULT_ALIGNMENT PAGE_SIZE | |
288 | #endif | |
289 | ||
200c79da | 290 | int nd_pfn_probe(struct device *dev, struct nd_namespace_common *ndns); |
e1455744 DW |
291 | bool is_nd_pfn(struct device *dev); |
292 | struct device *nd_pfn_create(struct nd_region *nd_region); | |
cd03412a DW |
293 | struct device *nd_pfn_devinit(struct nd_pfn *nd_pfn, |
294 | struct nd_namespace_common *ndns); | |
c5ed9268 | 295 | int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig); |
cd03412a | 296 | extern struct attribute_group nd_pfn_attribute_group; |
e1455744 | 297 | #else |
200c79da DW |
298 | static inline int nd_pfn_probe(struct device *dev, |
299 | struct nd_namespace_common *ndns) | |
e1455744 DW |
300 | { |
301 | return -ENODEV; | |
302 | } | |
303 | ||
304 | static inline bool is_nd_pfn(struct device *dev) | |
305 | { | |
306 | return false; | |
307 | } | |
308 | ||
309 | static inline struct device *nd_pfn_create(struct nd_region *nd_region) | |
310 | { | |
311 | return NULL; | |
312 | } | |
32ab0a3f | 313 | |
c5ed9268 | 314 | static inline int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig) |
32ab0a3f DW |
315 | { |
316 | return -ENODEV; | |
317 | } | |
8c2f7e86 | 318 | #endif |
e1455744 | 319 | |
cd03412a DW |
320 | struct nd_dax *to_nd_dax(struct device *dev); |
321 | #if IS_ENABLED(CONFIG_NVDIMM_DAX) | |
c5ed9268 | 322 | int nd_dax_probe(struct device *dev, struct nd_namespace_common *ndns); |
cd03412a DW |
323 | bool is_nd_dax(struct device *dev); |
324 | struct device *nd_dax_create(struct nd_region *nd_region); | |
325 | #else | |
c5ed9268 DW |
326 | static inline int nd_dax_probe(struct device *dev, |
327 | struct nd_namespace_common *ndns) | |
328 | { | |
329 | return -ENODEV; | |
330 | } | |
331 | ||
cd03412a DW |
332 | static inline bool is_nd_dax(struct device *dev) |
333 | { | |
334 | return false; | |
335 | } | |
336 | ||
337 | static inline struct device *nd_dax_create(struct nd_region *nd_region) | |
338 | { | |
339 | return NULL; | |
340 | } | |
341 | #endif | |
342 | ||
3d88002e DW |
343 | int nd_region_to_nstype(struct nd_region *nd_region); |
344 | int nd_region_register_namespaces(struct nd_region *nd_region, int *err); | |
c12c48ce DW |
345 | u64 nd_region_interleave_set_cookie(struct nd_region *nd_region, |
346 | struct nd_namespace_index *nsindex); | |
86ef58a4 | 347 | u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region); |
3d88002e DW |
348 | void nvdimm_bus_lock(struct device *dev); |
349 | void nvdimm_bus_unlock(struct device *dev); | |
350 | bool is_nvdimm_bus_locked(struct device *dev); | |
58138820 | 351 | int nvdimm_revalidate_disk(struct gendisk *disk); |
bf9bccc1 DW |
352 | void nvdimm_drvdata_release(struct kref *kref); |
353 | void put_ndd(struct nvdimm_drvdata *ndd); | |
4a826c83 DW |
354 | int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd); |
355 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res); | |
356 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
357 | struct nd_label_id *label_id, resource_size_t start, | |
358 | resource_size_t n); | |
8c2f7e86 | 359 | resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); |
08e6b3c6 | 360 | bool nvdimm_namespace_locked(struct nd_namespace_common *ndns); |
8c2f7e86 | 361 | struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); |
5212e11f | 362 | int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); |
298f2bc5 | 363 | int nvdimm_namespace_detach_btt(struct nd_btt *nd_btt); |
5212e11f VV |
364 | const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns, |
365 | char *name); | |
f979b13c | 366 | unsigned int pmem_sector_size(struct nd_namespace_common *ndns); |
a3901802 DW |
367 | void nvdimm_badblocks_populate(struct nd_region *nd_region, |
368 | struct badblocks *bb, const struct resource *res); | |
200c79da | 369 | #if IS_ENABLED(CONFIG_ND_CLAIM) |
e8d51348 | 370 | int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, struct dev_pagemap *pgmap); |
200c79da DW |
371 | int devm_nsio_enable(struct device *dev, struct nd_namespace_io *nsio); |
372 | void devm_nsio_disable(struct device *dev, struct nd_namespace_io *nsio); | |
373 | #else | |
e8d51348 CH |
374 | static inline int nvdimm_setup_pfn(struct nd_pfn *nd_pfn, |
375 | struct dev_pagemap *pgmap) | |
ac515c08 | 376 | { |
e8d51348 | 377 | return -ENXIO; |
ac515c08 | 378 | } |
200c79da DW |
379 | static inline int devm_nsio_enable(struct device *dev, |
380 | struct nd_namespace_io *nsio) | |
381 | { | |
382 | return -ENXIO; | |
383 | } | |
384 | static inline void devm_nsio_disable(struct device *dev, | |
385 | struct nd_namespace_io *nsio) | |
386 | { | |
387 | } | |
388 | #endif | |
047fc8a1 | 389 | int nd_blk_region_init(struct nd_region *nd_region); |
e5ae3b25 | 390 | int nd_region_activate(struct nd_region *nd_region); |
f0dc089c DW |
391 | void __nd_iostat_start(struct bio *bio, unsigned long *start); |
392 | static inline bool nd_iostat_start(struct bio *bio, unsigned long *start) | |
393 | { | |
74d46992 | 394 | struct gendisk *disk = bio->bi_disk; |
f0dc089c DW |
395 | |
396 | if (!blk_queue_io_stat(disk->queue)) | |
397 | return false; | |
398 | ||
8d7c22ac | 399 | *start = jiffies; |
d62e26b3 | 400 | generic_start_io_acct(disk->queue, bio_data_dir(bio), |
8d7c22ac | 401 | bio_sectors(bio), &disk->part0); |
f0dc089c DW |
402 | return true; |
403 | } | |
8d7c22ac TK |
404 | static inline void nd_iostat_end(struct bio *bio, unsigned long start) |
405 | { | |
74d46992 | 406 | struct gendisk *disk = bio->bi_disk; |
8d7c22ac | 407 | |
d62e26b3 JA |
408 | generic_end_io_acct(disk->queue, bio_data_dir(bio), &disk->part0, |
409 | start); | |
8d7c22ac | 410 | } |
200c79da DW |
411 | static inline bool is_bad_pmem(struct badblocks *bb, sector_t sector, |
412 | unsigned int len) | |
413 | { | |
414 | if (bb->count) { | |
415 | sector_t first_bad; | |
416 | int num_bad; | |
417 | ||
418 | return !!badblocks_check(bb, sector, len / 512, &first_bad, | |
419 | &num_bad); | |
420 | } | |
421 | ||
422 | return false; | |
423 | } | |
047fc8a1 | 424 | resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk); |
6ec68954 | 425 | const u8 *nd_dev_to_uuid(struct device *dev); |
004f1afb | 426 | bool pmem_should_map_pages(struct device *dev); |
4d88a97a | 427 | #endif /* __ND_H__ */ |