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4d88a97a DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #ifndef __ND_H__ | |
14 | #define __ND_H__ | |
1f7df6f8 | 15 | #include <linux/libnvdimm.h> |
200c79da | 16 | #include <linux/badblocks.h> |
f0dc089c | 17 | #include <linux/blkdev.h> |
4d88a97a DW |
18 | #include <linux/device.h> |
19 | #include <linux/mutex.h> | |
20 | #include <linux/ndctl.h> | |
bf9bccc1 | 21 | #include <linux/types.h> |
71999466 | 22 | #include <linux/nd.h> |
4a826c83 | 23 | #include "label.h" |
4d88a97a | 24 | |
8c2f7e86 | 25 | enum { |
5212e11f VV |
26 | /* |
27 | * Limits the maximum number of block apertures a dimm can | |
28 | * support and is an input to the geometry/on-disk-format of a | |
29 | * BTT instance | |
30 | */ | |
31 | ND_MAX_LANES = 256, | |
8c2f7e86 | 32 | SECTOR_SHIFT = 9, |
fcae6957 | 33 | INT_LBASIZE_ALIGNMENT = 64, |
8c2f7e86 DW |
34 | }; |
35 | ||
0caeef63 VV |
36 | struct nd_poison { |
37 | u64 start; | |
38 | u64 length; | |
39 | struct list_head list; | |
40 | }; | |
41 | ||
4d88a97a DW |
42 | struct nvdimm_drvdata { |
43 | struct device *dev; | |
4a826c83 | 44 | int nsindex_size; |
4d88a97a DW |
45 | struct nd_cmd_get_config_size nsarea; |
46 | void *data; | |
4a826c83 DW |
47 | int ns_current, ns_next; |
48 | struct resource dpa; | |
bf9bccc1 | 49 | struct kref kref; |
4d88a97a DW |
50 | }; |
51 | ||
e5ae3b25 DW |
52 | struct nd_region_data { |
53 | int ns_count; | |
54 | int ns_active; | |
595c7307 DW |
55 | unsigned int hints_shift; |
56 | void __iomem *flush_wpq[0]; | |
3d88002e DW |
57 | }; |
58 | ||
595c7307 DW |
59 | static inline void __iomem *ndrd_get_flush_wpq(struct nd_region_data *ndrd, |
60 | int dimm, int hint) | |
61 | { | |
62 | unsigned int num = 1 << ndrd->hints_shift; | |
63 | unsigned int mask = num - 1; | |
64 | ||
65 | return ndrd->flush_wpq[dimm * num + (hint & mask)]; | |
66 | } | |
67 | ||
68 | static inline void ndrd_set_flush_wpq(struct nd_region_data *ndrd, int dimm, | |
69 | int hint, void __iomem *flush) | |
70 | { | |
71 | unsigned int num = 1 << ndrd->hints_shift; | |
72 | unsigned int mask = num - 1; | |
73 | ||
74 | ndrd->flush_wpq[dimm * num + (hint & mask)] = flush; | |
75 | } | |
76 | ||
4a826c83 DW |
77 | static inline struct nd_namespace_index *to_namespace_index( |
78 | struct nvdimm_drvdata *ndd, int i) | |
79 | { | |
80 | if (i < 0) | |
81 | return NULL; | |
82 | ||
83 | return ndd->data + sizeof_namespace_index(ndd) * i; | |
84 | } | |
85 | ||
86 | static inline struct nd_namespace_index *to_current_namespace_index( | |
87 | struct nvdimm_drvdata *ndd) | |
88 | { | |
89 | return to_namespace_index(ndd, ndd->ns_current); | |
90 | } | |
91 | ||
92 | static inline struct nd_namespace_index *to_next_namespace_index( | |
93 | struct nvdimm_drvdata *ndd) | |
94 | { | |
95 | return to_namespace_index(ndd, ndd->ns_next); | |
96 | } | |
97 | ||
98 | #define nd_dbg_dpa(r, d, res, fmt, arg...) \ | |
99 | dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \ | |
100 | (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \ | |
101 | (unsigned long long) (res ? resource_size(res) : 0), \ | |
102 | (unsigned long long) (res ? res->start : 0), ##arg) | |
103 | ||
bf9bccc1 DW |
104 | #define for_each_dpa_resource(ndd, res) \ |
105 | for (res = (ndd)->dpa.child; res; res = res->sibling) | |
106 | ||
4a826c83 DW |
107 | #define for_each_dpa_resource_safe(ndd, res, next) \ |
108 | for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \ | |
109 | res; res = next, next = next ? next->sibling : NULL) | |
110 | ||
5212e11f VV |
111 | struct nd_percpu_lane { |
112 | int count; | |
113 | spinlock_t lock; | |
114 | }; | |
115 | ||
ae8219f1 DW |
116 | struct nd_label_ent { |
117 | struct list_head list; | |
118 | struct nd_namespace_label *label; | |
119 | }; | |
120 | ||
121 | enum nd_mapping_lock_class { | |
122 | ND_MAPPING_CLASS0, | |
123 | ND_MAPPING_UUID_SCAN, | |
124 | }; | |
125 | ||
44c462eb DW |
126 | struct nd_mapping { |
127 | struct nvdimm *nvdimm; | |
44c462eb DW |
128 | u64 start; |
129 | u64 size; | |
ae8219f1 DW |
130 | struct list_head labels; |
131 | struct mutex lock; | |
44c462eb DW |
132 | /* |
133 | * @ndd is for private use at region enable / disable time for | |
134 | * get_ndd() + put_ndd(), all other nd_mapping to ndd | |
135 | * conversions use to_ndd() which respects enabled state of the | |
136 | * nvdimm. | |
137 | */ | |
138 | struct nvdimm_drvdata *ndd; | |
139 | }; | |
140 | ||
1f7df6f8 DW |
141 | struct nd_region { |
142 | struct device dev; | |
1b40e09a | 143 | struct ida ns_ida; |
8c2f7e86 | 144 | struct ida btt_ida; |
e1455744 | 145 | struct ida pfn_ida; |
cd03412a | 146 | struct ida dax_ida; |
004f1afb | 147 | unsigned long flags; |
bf9bccc1 | 148 | struct device *ns_seed; |
8c2f7e86 | 149 | struct device *btt_seed; |
e1455744 | 150 | struct device *pfn_seed; |
cd03412a | 151 | struct device *dax_seed; |
1f7df6f8 DW |
152 | u16 ndr_mappings; |
153 | u64 ndr_size; | |
154 | u64 ndr_start; | |
41d7a6d6 | 155 | int id, num_lanes, ro, numa_node; |
1f7df6f8 | 156 | void *provider_data; |
6a6bef90 | 157 | struct badblocks bb; |
eaf96153 | 158 | struct nd_interleave_set *nd_set; |
5212e11f | 159 | struct nd_percpu_lane __percpu *lane; |
1f7df6f8 DW |
160 | struct nd_mapping mapping[0]; |
161 | }; | |
162 | ||
047fc8a1 RZ |
163 | struct nd_blk_region { |
164 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
047fc8a1 RZ |
165 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, |
166 | void *iobuf, u64 len, int rw); | |
167 | void *blk_provider_data; | |
168 | struct nd_region nd_region; | |
169 | }; | |
170 | ||
4a826c83 DW |
171 | /* |
172 | * Lookup next in the repeating sequence of 01, 10, and 11. | |
173 | */ | |
174 | static inline unsigned nd_inc_seq(unsigned seq) | |
175 | { | |
176 | static const unsigned next[] = { 0, 2, 3, 1 }; | |
177 | ||
178 | return next[seq & 3]; | |
179 | } | |
f524bf27 | 180 | |
5212e11f | 181 | struct btt; |
8c2f7e86 DW |
182 | struct nd_btt { |
183 | struct device dev; | |
184 | struct nd_namespace_common *ndns; | |
5212e11f | 185 | struct btt *btt; |
8c2f7e86 | 186 | unsigned long lbasize; |
abe8b4e3 | 187 | u64 size; |
8c2f7e86 DW |
188 | u8 *uuid; |
189 | int id; | |
190 | }; | |
191 | ||
e1455744 DW |
192 | enum nd_pfn_mode { |
193 | PFN_MODE_NONE, | |
194 | PFN_MODE_RAM, | |
195 | PFN_MODE_PMEM, | |
196 | }; | |
197 | ||
198 | struct nd_pfn { | |
199 | int id; | |
200 | u8 *uuid; | |
201 | struct device dev; | |
315c5625 | 202 | unsigned long align; |
e1455744 DW |
203 | unsigned long npfns; |
204 | enum nd_pfn_mode mode; | |
205 | struct nd_pfn_sb *pfn_sb; | |
206 | struct nd_namespace_common *ndns; | |
207 | }; | |
208 | ||
cd03412a DW |
209 | struct nd_dax { |
210 | struct nd_pfn nd_pfn; | |
211 | }; | |
212 | ||
4d88a97a DW |
213 | enum nd_async_mode { |
214 | ND_SYNC, | |
215 | ND_ASYNC, | |
216 | }; | |
217 | ||
41cd8b70 | 218 | int nd_integrity_init(struct gendisk *disk, unsigned long meta_size); |
bf9bccc1 | 219 | void wait_nvdimm_bus_probe_idle(struct device *dev); |
4d88a97a DW |
220 | void nd_device_register(struct device *dev); |
221 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode); | |
71999466 | 222 | void nd_device_notify(struct device *dev, enum nvdimm_event event); |
bf9bccc1 DW |
223 | int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf, |
224 | size_t len); | |
1b40e09a DW |
225 | ssize_t nd_sector_size_show(unsigned long current_lbasize, |
226 | const unsigned long *supported, char *buf); | |
227 | ssize_t nd_sector_size_store(struct device *dev, const char *buf, | |
228 | unsigned long *current_lbasize, const unsigned long *supported); | |
4d88a97a | 229 | int __init nvdimm_init(void); |
3d88002e | 230 | int __init nd_region_init(void); |
4d88a97a | 231 | void nvdimm_exit(void); |
3d88002e | 232 | void nd_region_exit(void); |
bf9bccc1 DW |
233 | struct nvdimm; |
234 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); | |
aee65987 | 235 | int nvdimm_check_config_data(struct device *dev); |
4d88a97a DW |
236 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); |
237 | int nvdimm_init_config_data(struct nvdimm_drvdata *ndd); | |
f524bf27 DW |
238 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
239 | void *buf, size_t len); | |
59e64739 DW |
240 | long nvdimm_clear_poison(struct device *dev, phys_addr_t phys, |
241 | unsigned int len); | |
42237e39 | 242 | void nvdimm_set_aliasing(struct device *dev); |
8c2f7e86 | 243 | struct nd_btt *to_nd_btt(struct device *dev); |
e1455744 DW |
244 | |
245 | struct nd_gen_sb { | |
246 | char reserved[SZ_4K - 8]; | |
247 | __le64 checksum; | |
248 | }; | |
249 | ||
250 | u64 nd_sb_checksum(struct nd_gen_sb *sb); | |
8c2f7e86 | 251 | #if IS_ENABLED(CONFIG_BTT) |
200c79da | 252 | int nd_btt_probe(struct device *dev, struct nd_namespace_common *ndns); |
8c2f7e86 DW |
253 | bool is_nd_btt(struct device *dev); |
254 | struct device *nd_btt_create(struct nd_region *nd_region); | |
255 | #else | |
e32bc729 | 256 | static inline int nd_btt_probe(struct device *dev, |
200c79da | 257 | struct nd_namespace_common *ndns) |
8c2f7e86 DW |
258 | { |
259 | return -ENODEV; | |
260 | } | |
261 | ||
262 | static inline bool is_nd_btt(struct device *dev) | |
263 | { | |
264 | return false; | |
265 | } | |
266 | ||
267 | static inline struct device *nd_btt_create(struct nd_region *nd_region) | |
268 | { | |
269 | return NULL; | |
270 | } | |
e1455744 | 271 | #endif |
8c2f7e86 | 272 | |
e1455744 DW |
273 | struct nd_pfn *to_nd_pfn(struct device *dev); |
274 | #if IS_ENABLED(CONFIG_NVDIMM_PFN) | |
200c79da | 275 | int nd_pfn_probe(struct device *dev, struct nd_namespace_common *ndns); |
e1455744 DW |
276 | bool is_nd_pfn(struct device *dev); |
277 | struct device *nd_pfn_create(struct nd_region *nd_region); | |
cd03412a DW |
278 | struct device *nd_pfn_devinit(struct nd_pfn *nd_pfn, |
279 | struct nd_namespace_common *ndns); | |
c5ed9268 | 280 | int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig); |
cd03412a | 281 | extern struct attribute_group nd_pfn_attribute_group; |
e1455744 | 282 | #else |
200c79da DW |
283 | static inline int nd_pfn_probe(struct device *dev, |
284 | struct nd_namespace_common *ndns) | |
e1455744 DW |
285 | { |
286 | return -ENODEV; | |
287 | } | |
288 | ||
289 | static inline bool is_nd_pfn(struct device *dev) | |
290 | { | |
291 | return false; | |
292 | } | |
293 | ||
294 | static inline struct device *nd_pfn_create(struct nd_region *nd_region) | |
295 | { | |
296 | return NULL; | |
297 | } | |
32ab0a3f | 298 | |
c5ed9268 | 299 | static inline int nd_pfn_validate(struct nd_pfn *nd_pfn, const char *sig) |
32ab0a3f DW |
300 | { |
301 | return -ENODEV; | |
302 | } | |
8c2f7e86 | 303 | #endif |
e1455744 | 304 | |
cd03412a DW |
305 | struct nd_dax *to_nd_dax(struct device *dev); |
306 | #if IS_ENABLED(CONFIG_NVDIMM_DAX) | |
c5ed9268 | 307 | int nd_dax_probe(struct device *dev, struct nd_namespace_common *ndns); |
cd03412a DW |
308 | bool is_nd_dax(struct device *dev); |
309 | struct device *nd_dax_create(struct nd_region *nd_region); | |
310 | #else | |
c5ed9268 DW |
311 | static inline int nd_dax_probe(struct device *dev, |
312 | struct nd_namespace_common *ndns) | |
313 | { | |
314 | return -ENODEV; | |
315 | } | |
316 | ||
cd03412a DW |
317 | static inline bool is_nd_dax(struct device *dev) |
318 | { | |
319 | return false; | |
320 | } | |
321 | ||
322 | static inline struct device *nd_dax_create(struct nd_region *nd_region) | |
323 | { | |
324 | return NULL; | |
325 | } | |
326 | #endif | |
327 | ||
3d88002e DW |
328 | struct nd_region *to_nd_region(struct device *dev); |
329 | int nd_region_to_nstype(struct nd_region *nd_region); | |
330 | int nd_region_register_namespaces(struct nd_region *nd_region, int *err); | |
bf9bccc1 | 331 | u64 nd_region_interleave_set_cookie(struct nd_region *nd_region); |
86ef58a4 | 332 | u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region); |
3d88002e DW |
333 | void nvdimm_bus_lock(struct device *dev); |
334 | void nvdimm_bus_unlock(struct device *dev); | |
335 | bool is_nvdimm_bus_locked(struct device *dev); | |
58138820 | 336 | int nvdimm_revalidate_disk(struct gendisk *disk); |
bf9bccc1 DW |
337 | void nvdimm_drvdata_release(struct kref *kref); |
338 | void put_ndd(struct nvdimm_drvdata *ndd); | |
4a826c83 DW |
339 | int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd); |
340 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res); | |
341 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
342 | struct nd_label_id *label_id, resource_size_t start, | |
343 | resource_size_t n); | |
8c2f7e86 DW |
344 | resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); |
345 | struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); | |
5212e11f | 346 | int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); |
298f2bc5 | 347 | int nvdimm_namespace_detach_btt(struct nd_btt *nd_btt); |
5212e11f VV |
348 | const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns, |
349 | char *name); | |
a3901802 DW |
350 | void nvdimm_badblocks_populate(struct nd_region *nd_region, |
351 | struct badblocks *bb, const struct resource *res); | |
200c79da | 352 | #if IS_ENABLED(CONFIG_ND_CLAIM) |
ac515c08 DW |
353 | struct vmem_altmap *nvdimm_setup_pfn(struct nd_pfn *nd_pfn, |
354 | struct resource *res, struct vmem_altmap *altmap); | |
200c79da DW |
355 | int devm_nsio_enable(struct device *dev, struct nd_namespace_io *nsio); |
356 | void devm_nsio_disable(struct device *dev, struct nd_namespace_io *nsio); | |
357 | #else | |
ac515c08 DW |
358 | static inline struct vmem_altmap *nvdimm_setup_pfn(struct nd_pfn *nd_pfn, |
359 | struct resource *res, struct vmem_altmap *altmap) | |
360 | { | |
361 | return ERR_PTR(-ENXIO); | |
362 | } | |
200c79da DW |
363 | static inline int devm_nsio_enable(struct device *dev, |
364 | struct nd_namespace_io *nsio) | |
365 | { | |
366 | return -ENXIO; | |
367 | } | |
368 | static inline void devm_nsio_disable(struct device *dev, | |
369 | struct nd_namespace_io *nsio) | |
370 | { | |
371 | } | |
372 | #endif | |
047fc8a1 | 373 | int nd_blk_region_init(struct nd_region *nd_region); |
e5ae3b25 | 374 | int nd_region_activate(struct nd_region *nd_region); |
f0dc089c DW |
375 | void __nd_iostat_start(struct bio *bio, unsigned long *start); |
376 | static inline bool nd_iostat_start(struct bio *bio, unsigned long *start) | |
377 | { | |
378 | struct gendisk *disk = bio->bi_bdev->bd_disk; | |
379 | ||
380 | if (!blk_queue_io_stat(disk->queue)) | |
381 | return false; | |
382 | ||
8d7c22ac TK |
383 | *start = jiffies; |
384 | generic_start_io_acct(bio_data_dir(bio), | |
385 | bio_sectors(bio), &disk->part0); | |
f0dc089c DW |
386 | return true; |
387 | } | |
8d7c22ac TK |
388 | static inline void nd_iostat_end(struct bio *bio, unsigned long start) |
389 | { | |
390 | struct gendisk *disk = bio->bi_bdev->bd_disk; | |
391 | ||
392 | generic_end_io_acct(bio_data_dir(bio), &disk->part0, start); | |
393 | } | |
200c79da DW |
394 | static inline bool is_bad_pmem(struct badblocks *bb, sector_t sector, |
395 | unsigned int len) | |
396 | { | |
397 | if (bb->count) { | |
398 | sector_t first_bad; | |
399 | int num_bad; | |
400 | ||
401 | return !!badblocks_check(bb, sector, len / 512, &first_bad, | |
402 | &num_bad); | |
403 | } | |
404 | ||
405 | return false; | |
406 | } | |
047fc8a1 | 407 | resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk); |
6ec68954 | 408 | const u8 *nd_dev_to_uuid(struct device *dev); |
004f1afb | 409 | bool pmem_should_map_pages(struct device *dev); |
4d88a97a | 410 | #endif /* __ND_H__ */ |