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9e853f23 RZ |
1 | /* |
2 | * Persistent Memory Driver | |
3 | * | |
9f53f9fa | 4 | * Copyright (c) 2014-2015, Intel Corporation. |
9e853f23 RZ |
5 | * Copyright (c) 2015, Christoph Hellwig <hch@lst.de>. |
6 | * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms and conditions of the GNU General Public License, | |
10 | * version 2, as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | */ | |
17 | ||
18 | #include <asm/cacheflush.h> | |
19 | #include <linux/blkdev.h> | |
20 | #include <linux/hdreg.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/moduleparam.h> | |
b95f5f43 | 25 | #include <linux/badblocks.h> |
9476df7d | 26 | #include <linux/memremap.h> |
32ab0a3f | 27 | #include <linux/vmalloc.h> |
34c0fd54 | 28 | #include <linux/pfn_t.h> |
9e853f23 | 29 | #include <linux/slab.h> |
61031952 | 30 | #include <linux/pmem.h> |
9f53f9fa | 31 | #include <linux/nd.h> |
f295e53b | 32 | #include "pmem.h" |
32ab0a3f | 33 | #include "pfn.h" |
9f53f9fa | 34 | #include "nd.h" |
9e853f23 | 35 | |
f284a4f2 DW |
36 | static struct device *to_dev(struct pmem_device *pmem) |
37 | { | |
38 | /* | |
39 | * nvdimm bus services need a 'dev' parameter, and we record the device | |
40 | * at init in bb.dev. | |
41 | */ | |
42 | return pmem->bb.dev; | |
43 | } | |
44 | ||
45 | static struct nd_region *to_region(struct pmem_device *pmem) | |
46 | { | |
47 | return to_nd_region(to_dev(pmem)->parent); | |
48 | } | |
9e853f23 | 49 | |
3115bb02 | 50 | static int pmem_clear_poison(struct pmem_device *pmem, phys_addr_t offset, |
59e64739 DW |
51 | unsigned int len) |
52 | { | |
f284a4f2 | 53 | struct device *dev = to_dev(pmem); |
59e64739 DW |
54 | sector_t sector; |
55 | long cleared; | |
868f036f | 56 | int rc = 0; |
59e64739 DW |
57 | |
58 | sector = (offset - pmem->data_offset) / 512; | |
59e64739 | 59 | |
868f036f DW |
60 | cleared = nvdimm_clear_poison(dev, pmem->phys_addr + offset, len); |
61 | if (cleared < len) | |
62 | rc = -EIO; | |
59e64739 | 63 | if (cleared > 0 && cleared / 512) { |
868f036f DW |
64 | cleared /= 512; |
65 | dev_dbg(dev, "%s: %#llx clear %ld sector%s\n", __func__, | |
66 | (unsigned long long) sector, cleared, | |
67 | cleared > 1 ? "s" : ""); | |
0a3f27b9 | 68 | badblocks_clear(&pmem->bb, sector, cleared); |
59e64739 | 69 | } |
3115bb02 | 70 | |
59e64739 | 71 | invalidate_pmem(pmem->virt_addr + offset, len); |
868f036f DW |
72 | |
73 | return rc; | |
59e64739 DW |
74 | } |
75 | ||
bd697a80 VV |
76 | static void write_pmem(void *pmem_addr, struct page *page, |
77 | unsigned int off, unsigned int len) | |
78 | { | |
79 | void *mem = kmap_atomic(page); | |
80 | ||
81 | memcpy_to_pmem(pmem_addr, mem + off, len); | |
82 | kunmap_atomic(mem); | |
83 | } | |
84 | ||
85 | static int read_pmem(struct page *page, unsigned int off, | |
86 | void *pmem_addr, unsigned int len) | |
87 | { | |
88 | int rc; | |
89 | void *mem = kmap_atomic(page); | |
90 | ||
91 | rc = memcpy_from_pmem(mem + off, pmem_addr, len); | |
92 | kunmap_atomic(mem); | |
d47d1d27 SH |
93 | if (rc) |
94 | return -EIO; | |
95 | return 0; | |
bd697a80 VV |
96 | } |
97 | ||
e10624f8 | 98 | static int pmem_do_bvec(struct pmem_device *pmem, struct page *page, |
c11f0c0b | 99 | unsigned int len, unsigned int off, bool is_write, |
9e853f23 RZ |
100 | sector_t sector) |
101 | { | |
b5ebc8ec | 102 | int rc = 0; |
59e64739 | 103 | bool bad_pmem = false; |
32ab0a3f | 104 | phys_addr_t pmem_off = sector * 512 + pmem->data_offset; |
7a9eb206 | 105 | void *pmem_addr = pmem->virt_addr + pmem_off; |
9e853f23 | 106 | |
59e64739 DW |
107 | if (unlikely(is_bad_pmem(&pmem->bb, sector, len))) |
108 | bad_pmem = true; | |
109 | ||
c11f0c0b | 110 | if (!is_write) { |
59e64739 | 111 | if (unlikely(bad_pmem)) |
b5ebc8ec DW |
112 | rc = -EIO; |
113 | else { | |
bd697a80 | 114 | rc = read_pmem(page, off, pmem_addr, len); |
b5ebc8ec DW |
115 | flush_dcache_page(page); |
116 | } | |
9e853f23 | 117 | } else { |
0a370d26 DW |
118 | /* |
119 | * Note that we write the data both before and after | |
120 | * clearing poison. The write before clear poison | |
121 | * handles situations where the latest written data is | |
122 | * preserved and the clear poison operation simply marks | |
123 | * the address range as valid without changing the data. | |
124 | * In this case application software can assume that an | |
125 | * interrupted write will either return the new good | |
126 | * data or an error. | |
127 | * | |
128 | * However, if pmem_clear_poison() leaves the data in an | |
129 | * indeterminate state we need to perform the write | |
130 | * after clear poison. | |
131 | */ | |
9e853f23 | 132 | flush_dcache_page(page); |
bd697a80 | 133 | write_pmem(pmem_addr, page, off, len); |
59e64739 | 134 | if (unlikely(bad_pmem)) { |
3115bb02 | 135 | rc = pmem_clear_poison(pmem, pmem_off, len); |
bd697a80 | 136 | write_pmem(pmem_addr, page, off, len); |
59e64739 | 137 | } |
9e853f23 RZ |
138 | } |
139 | ||
b5ebc8ec | 140 | return rc; |
9e853f23 RZ |
141 | } |
142 | ||
7e267a8c DW |
143 | /* account for REQ_FLUSH rename, replace with REQ_PREFLUSH after v4.8-rc1 */ |
144 | #ifndef REQ_FLUSH | |
145 | #define REQ_FLUSH REQ_PREFLUSH | |
146 | #endif | |
147 | ||
dece1635 | 148 | static blk_qc_t pmem_make_request(struct request_queue *q, struct bio *bio) |
9e853f23 | 149 | { |
e10624f8 | 150 | int rc = 0; |
f0dc089c DW |
151 | bool do_acct; |
152 | unsigned long start; | |
9e853f23 | 153 | struct bio_vec bvec; |
9e853f23 | 154 | struct bvec_iter iter; |
bd842b8c | 155 | struct pmem_device *pmem = q->queuedata; |
7e267a8c DW |
156 | struct nd_region *nd_region = to_region(pmem); |
157 | ||
1eff9d32 | 158 | if (bio->bi_opf & REQ_FLUSH) |
7e267a8c | 159 | nvdimm_flush(nd_region); |
9e853f23 | 160 | |
f0dc089c | 161 | do_acct = nd_iostat_start(bio, &start); |
e10624f8 DW |
162 | bio_for_each_segment(bvec, bio, iter) { |
163 | rc = pmem_do_bvec(pmem, bvec.bv_page, bvec.bv_len, | |
c11f0c0b | 164 | bvec.bv_offset, op_is_write(bio_op(bio)), |
e10624f8 DW |
165 | iter.bi_sector); |
166 | if (rc) { | |
167 | bio->bi_error = rc; | |
168 | break; | |
169 | } | |
170 | } | |
f0dc089c DW |
171 | if (do_acct) |
172 | nd_iostat_end(bio, start); | |
61031952 | 173 | |
1eff9d32 | 174 | if (bio->bi_opf & REQ_FUA) |
7e267a8c | 175 | nvdimm_flush(nd_region); |
61031952 | 176 | |
4246a0b6 | 177 | bio_endio(bio); |
dece1635 | 178 | return BLK_QC_T_NONE; |
9e853f23 RZ |
179 | } |
180 | ||
181 | static int pmem_rw_page(struct block_device *bdev, sector_t sector, | |
c11f0c0b | 182 | struct page *page, bool is_write) |
9e853f23 | 183 | { |
bd842b8c | 184 | struct pmem_device *pmem = bdev->bd_queue->queuedata; |
e10624f8 | 185 | int rc; |
9e853f23 | 186 | |
c11f0c0b | 187 | rc = pmem_do_bvec(pmem, page, PAGE_SIZE, 0, is_write, sector); |
9e853f23 | 188 | |
e10624f8 DW |
189 | /* |
190 | * The ->rw_page interface is subtle and tricky. The core | |
191 | * retries on any error, so we can only invoke page_endio() in | |
192 | * the successful completion case. Otherwise, we'll see crashes | |
193 | * caused by double completion. | |
194 | */ | |
195 | if (rc == 0) | |
c11f0c0b | 196 | page_endio(page, is_write, 0); |
e10624f8 DW |
197 | |
198 | return rc; | |
9e853f23 RZ |
199 | } |
200 | ||
f295e53b DW |
201 | /* see "strong" declaration in tools/testing/nvdimm/pmem-dax.c */ |
202 | __weak long pmem_direct_access(struct block_device *bdev, sector_t sector, | |
7a9eb206 | 203 | void **kaddr, pfn_t *pfn, long size) |
9e853f23 | 204 | { |
bd842b8c | 205 | struct pmem_device *pmem = bdev->bd_queue->queuedata; |
32ab0a3f | 206 | resource_size_t offset = sector * 512 + pmem->data_offset; |
589e75d1 | 207 | |
0a70bd43 DW |
208 | if (unlikely(is_bad_pmem(&pmem->bb, sector, size))) |
209 | return -EIO; | |
e2e05394 | 210 | *kaddr = pmem->virt_addr + offset; |
34c0fd54 | 211 | *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); |
9e853f23 | 212 | |
0a70bd43 DW |
213 | /* |
214 | * If badblocks are present, limit known good range to the | |
215 | * requested range. | |
216 | */ | |
217 | if (unlikely(pmem->bb.count)) | |
218 | return size; | |
cfe30b87 | 219 | return pmem->size - pmem->pfn_pad - offset; |
9e853f23 RZ |
220 | } |
221 | ||
222 | static const struct block_device_operations pmem_fops = { | |
223 | .owner = THIS_MODULE, | |
224 | .rw_page = pmem_rw_page, | |
225 | .direct_access = pmem_direct_access, | |
58138820 | 226 | .revalidate_disk = nvdimm_revalidate_disk, |
9e853f23 RZ |
227 | }; |
228 | ||
030b99e3 DW |
229 | static void pmem_release_queue(void *q) |
230 | { | |
231 | blk_cleanup_queue(q); | |
232 | } | |
233 | ||
f02716db | 234 | static void pmem_release_disk(void *disk) |
030b99e3 DW |
235 | { |
236 | del_gendisk(disk); | |
237 | put_disk(disk); | |
238 | } | |
239 | ||
200c79da DW |
240 | static int pmem_attach_disk(struct device *dev, |
241 | struct nd_namespace_common *ndns) | |
9e853f23 | 242 | { |
200c79da | 243 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
f284a4f2 | 244 | struct nd_region *nd_region = to_nd_region(dev->parent); |
200c79da DW |
245 | struct vmem_altmap __altmap, *altmap = NULL; |
246 | struct resource *res = &nsio->res; | |
247 | struct nd_pfn *nd_pfn = NULL; | |
248 | int nid = dev_to_node(dev); | |
249 | struct nd_pfn_sb *pfn_sb; | |
9e853f23 | 250 | struct pmem_device *pmem; |
200c79da | 251 | struct resource pfn_res; |
468ded03 | 252 | struct request_queue *q; |
200c79da DW |
253 | struct gendisk *disk; |
254 | void *addr; | |
255 | ||
256 | /* while nsio_rw_bytes is active, parse a pfn info block if present */ | |
257 | if (is_nd_pfn(dev)) { | |
258 | nd_pfn = to_nd_pfn(dev); | |
259 | altmap = nvdimm_setup_pfn(nd_pfn, &pfn_res, &__altmap); | |
260 | if (IS_ERR(altmap)) | |
261 | return PTR_ERR(altmap); | |
262 | } | |
263 | ||
264 | /* we're attaching a block device, disable raw namespace access */ | |
265 | devm_nsio_disable(dev, nsio); | |
9e853f23 | 266 | |
708ab62b | 267 | pmem = devm_kzalloc(dev, sizeof(*pmem), GFP_KERNEL); |
9e853f23 | 268 | if (!pmem) |
200c79da | 269 | return -ENOMEM; |
9e853f23 | 270 | |
200c79da | 271 | dev_set_drvdata(dev, pmem); |
9e853f23 RZ |
272 | pmem->phys_addr = res->start; |
273 | pmem->size = resource_size(res); | |
f284a4f2 | 274 | if (nvdimm_has_flush(nd_region) < 0) |
61031952 | 275 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
9e853f23 | 276 | |
947df02d | 277 | if (!devm_request_mem_region(dev, res->start, resource_size(res), |
450c6633 | 278 | dev_name(&ndns->dev))) { |
947df02d | 279 | dev_warn(dev, "could not reserve region %pR\n", res); |
200c79da | 280 | return -EBUSY; |
9e853f23 RZ |
281 | } |
282 | ||
468ded03 DW |
283 | q = blk_alloc_queue_node(GFP_KERNEL, dev_to_node(dev)); |
284 | if (!q) | |
200c79da | 285 | return -ENOMEM; |
468ded03 | 286 | |
34c0fd54 | 287 | pmem->pfn_flags = PFN_DEV; |
200c79da DW |
288 | if (is_nd_pfn(dev)) { |
289 | addr = devm_memremap_pages(dev, &pfn_res, &q->q_usage_counter, | |
290 | altmap); | |
291 | pfn_sb = nd_pfn->pfn_sb; | |
292 | pmem->data_offset = le64_to_cpu(pfn_sb->dataoff); | |
293 | pmem->pfn_pad = resource_size(res) - resource_size(&pfn_res); | |
294 | pmem->pfn_flags |= PFN_MAP; | |
295 | res = &pfn_res; /* for badblocks populate */ | |
296 | res->start += pmem->data_offset; | |
297 | } else if (pmem_should_map_pages(dev)) { | |
298 | addr = devm_memremap_pages(dev, &nsio->res, | |
5c2c2587 | 299 | &q->q_usage_counter, NULL); |
34c0fd54 DW |
300 | pmem->pfn_flags |= PFN_MAP; |
301 | } else | |
200c79da DW |
302 | addr = devm_memremap(dev, pmem->phys_addr, |
303 | pmem->size, ARCH_MEMREMAP_PMEM); | |
b36f4761 | 304 | |
030b99e3 DW |
305 | /* |
306 | * At release time the queue must be dead before | |
307 | * devm_memremap_pages is unwound | |
308 | */ | |
f02716db | 309 | if (devm_add_action_or_reset(dev, pmem_release_queue, q)) |
200c79da | 310 | return -ENOMEM; |
8c2f7e86 | 311 | |
200c79da DW |
312 | if (IS_ERR(addr)) |
313 | return PTR_ERR(addr); | |
7a9eb206 | 314 | pmem->virt_addr = addr; |
9e853f23 | 315 | |
7e267a8c | 316 | blk_queue_write_cache(q, true, true); |
5a92289f DW |
317 | blk_queue_make_request(q, pmem_make_request); |
318 | blk_queue_physical_block_size(q, PAGE_SIZE); | |
319 | blk_queue_max_hw_sectors(q, UINT_MAX); | |
320 | blk_queue_bounce_limit(q, BLK_BOUNCE_ANY); | |
321 | queue_flag_set_unlocked(QUEUE_FLAG_NONROT, q); | |
163d4baa | 322 | queue_flag_set_unlocked(QUEUE_FLAG_DAX, q); |
5a92289f | 323 | q->queuedata = pmem; |
9e853f23 | 324 | |
538ea4aa | 325 | disk = alloc_disk_node(0, nid); |
030b99e3 DW |
326 | if (!disk) |
327 | return -ENOMEM; | |
9e853f23 | 328 | |
9e853f23 | 329 | disk->fops = &pmem_fops; |
5a92289f | 330 | disk->queue = q; |
9e853f23 | 331 | disk->flags = GENHD_FL_EXT_DEVT; |
5212e11f | 332 | nvdimm_namespace_disk_name(ndns, disk->disk_name); |
cfe30b87 DW |
333 | set_capacity(disk, (pmem->size - pmem->pfn_pad - pmem->data_offset) |
334 | / 512); | |
b95f5f43 DW |
335 | if (devm_init_badblocks(dev, &pmem->bb)) |
336 | return -ENOMEM; | |
f284a4f2 | 337 | nvdimm_badblocks_populate(nd_region, &pmem->bb, res); |
57f7f317 | 338 | disk->bb = &pmem->bb; |
0d52c756 | 339 | device_add_disk(dev, disk); |
f02716db DW |
340 | |
341 | if (devm_add_action_or_reset(dev, pmem_release_disk, disk)) | |
342 | return -ENOMEM; | |
343 | ||
58138820 | 344 | revalidate_disk(disk); |
9e853f23 | 345 | |
8c2f7e86 DW |
346 | return 0; |
347 | } | |
9e853f23 | 348 | |
9f53f9fa | 349 | static int nd_pmem_probe(struct device *dev) |
9e853f23 | 350 | { |
8c2f7e86 | 351 | struct nd_namespace_common *ndns; |
9e853f23 | 352 | |
8c2f7e86 DW |
353 | ndns = nvdimm_namespace_common_probe(dev); |
354 | if (IS_ERR(ndns)) | |
355 | return PTR_ERR(ndns); | |
bf9bccc1 | 356 | |
200c79da DW |
357 | if (devm_nsio_enable(dev, to_nd_namespace_io(&ndns->dev))) |
358 | return -ENXIO; | |
708ab62b | 359 | |
200c79da | 360 | if (is_nd_btt(dev)) |
708ab62b CH |
361 | return nvdimm_namespace_attach_btt(ndns); |
362 | ||
32ab0a3f | 363 | if (is_nd_pfn(dev)) |
200c79da | 364 | return pmem_attach_disk(dev, ndns); |
32ab0a3f | 365 | |
200c79da | 366 | /* if we find a valid info-block we'll come back as that personality */ |
c5ed9268 DW |
367 | if (nd_btt_probe(dev, ndns) == 0 || nd_pfn_probe(dev, ndns) == 0 |
368 | || nd_dax_probe(dev, ndns) == 0) | |
32ab0a3f | 369 | return -ENXIO; |
32ab0a3f | 370 | |
200c79da DW |
371 | /* ...otherwise we're just a raw pmem device */ |
372 | return pmem_attach_disk(dev, ndns); | |
9e853f23 RZ |
373 | } |
374 | ||
9f53f9fa | 375 | static int nd_pmem_remove(struct device *dev) |
9e853f23 | 376 | { |
8c2f7e86 | 377 | if (is_nd_btt(dev)) |
298f2bc5 | 378 | nvdimm_namespace_detach_btt(to_nd_btt(dev)); |
476f848a DW |
379 | nvdimm_flush(to_nd_region(dev->parent)); |
380 | ||
9e853f23 RZ |
381 | return 0; |
382 | } | |
383 | ||
476f848a DW |
384 | static void nd_pmem_shutdown(struct device *dev) |
385 | { | |
386 | nvdimm_flush(to_nd_region(dev->parent)); | |
387 | } | |
388 | ||
71999466 DW |
389 | static void nd_pmem_notify(struct device *dev, enum nvdimm_event event) |
390 | { | |
b2adde73 | 391 | struct nd_region *nd_region; |
298f2bc5 DW |
392 | resource_size_t offset = 0, end_trunc = 0; |
393 | struct nd_namespace_common *ndns; | |
394 | struct nd_namespace_io *nsio; | |
395 | struct resource res; | |
b2adde73 | 396 | struct badblocks *bb; |
71999466 DW |
397 | |
398 | if (event != NVDIMM_REVALIDATE_POISON) | |
399 | return; | |
400 | ||
298f2bc5 DW |
401 | if (is_nd_btt(dev)) { |
402 | struct nd_btt *nd_btt = to_nd_btt(dev); | |
403 | ||
404 | ndns = nd_btt->ndns; | |
b2adde73 TK |
405 | nd_region = to_nd_region(ndns->dev.parent); |
406 | nsio = to_nd_namespace_io(&ndns->dev); | |
407 | bb = &nsio->bb; | |
408 | } else { | |
409 | struct pmem_device *pmem = dev_get_drvdata(dev); | |
a3901802 | 410 | |
b2adde73 TK |
411 | nd_region = to_region(pmem); |
412 | bb = &pmem->bb; | |
413 | ||
414 | if (is_nd_pfn(dev)) { | |
415 | struct nd_pfn *nd_pfn = to_nd_pfn(dev); | |
416 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; | |
417 | ||
418 | ndns = nd_pfn->ndns; | |
419 | offset = pmem->data_offset + | |
420 | __le32_to_cpu(pfn_sb->start_pad); | |
421 | end_trunc = __le32_to_cpu(pfn_sb->end_trunc); | |
422 | } else { | |
423 | ndns = to_ndns(dev); | |
424 | } | |
425 | ||
426 | nsio = to_nd_namespace_io(&ndns->dev); | |
427 | } | |
a3901802 | 428 | |
298f2bc5 DW |
429 | res.start = nsio->res.start + offset; |
430 | res.end = nsio->res.end - end_trunc; | |
b2adde73 | 431 | nvdimm_badblocks_populate(nd_region, bb, &res); |
71999466 DW |
432 | } |
433 | ||
9f53f9fa DW |
434 | MODULE_ALIAS("pmem"); |
435 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_IO); | |
bf9bccc1 | 436 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_PMEM); |
9f53f9fa DW |
437 | static struct nd_device_driver nd_pmem_driver = { |
438 | .probe = nd_pmem_probe, | |
439 | .remove = nd_pmem_remove, | |
71999466 | 440 | .notify = nd_pmem_notify, |
476f848a | 441 | .shutdown = nd_pmem_shutdown, |
9f53f9fa DW |
442 | .drv = { |
443 | .name = "nd_pmem", | |
9e853f23 | 444 | }, |
bf9bccc1 | 445 | .type = ND_DRIVER_NAMESPACE_IO | ND_DRIVER_NAMESPACE_PMEM, |
9e853f23 RZ |
446 | }; |
447 | ||
448 | static int __init pmem_init(void) | |
449 | { | |
55155291 | 450 | return nd_driver_register(&nd_pmem_driver); |
9e853f23 RZ |
451 | } |
452 | module_init(pmem_init); | |
453 | ||
454 | static void pmem_exit(void) | |
455 | { | |
9f53f9fa | 456 | driver_unregister(&nd_pmem_driver.drv); |
9e853f23 RZ |
457 | } |
458 | module_exit(pmem_exit); | |
459 | ||
460 | MODULE_AUTHOR("Ross Zwisler <ross.zwisler@linux.intel.com>"); | |
461 | MODULE_LICENSE("GPL v2"); |